1 | /* SPDX-License-Identifier: GPL-2.0-only |
2 | * |
3 | * Copyright (c) 2021, MediaTek Inc. |
4 | * Copyright (c) 2021-2022, Intel Corporation. |
5 | * |
6 | * Authors: |
7 | * Haijun Liu <haijun.liu@mediatek.com> |
8 | * Moises Veleta <moises.veleta@intel.com> |
9 | * |
10 | * Contributors: |
11 | * Amir Hanania <amir.hanania@intel.com> |
12 | * Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> |
13 | * Ricardo Martinez <ricardo.martinez@linux.intel.com> |
14 | */ |
15 | |
16 | #ifndef __T7XX_NETDEV_H__ |
17 | #define __T7XX_NETDEV_H__ |
18 | |
19 | #include <linux/bits.h> |
20 | #include <linux/netdevice.h> |
21 | #include <linux/types.h> |
22 | |
23 | #include "t7xx_hif_dpmaif.h" |
24 | #include "t7xx_pci.h" |
25 | #include "t7xx_state_monitor.h" |
26 | |
27 | #define RXQ_NUM DPMAIF_RXQ_NUM |
28 | #define NIC_DEV_MAX 21 |
29 | #define NIC_DEV_DEFAULT 2 |
30 | |
31 | #define CCMNI_NETDEV_WDT_TO (1 * HZ) |
32 | #define CCMNI_MTU_MAX 3000 |
33 | #define NIC_NAPI_POLL_BUDGET 128 |
34 | |
35 | struct t7xx_ccmni { |
36 | u8 index; |
37 | atomic_t usage; |
38 | struct net_device *dev; |
39 | struct t7xx_ccmni_ctrl *ctlb; |
40 | }; |
41 | |
42 | struct t7xx_ccmni_ctrl { |
43 | struct t7xx_pci_dev *t7xx_dev; |
44 | struct dpmaif_ctrl *hif_ctrl; |
45 | struct t7xx_ccmni *ccmni_inst[NIC_DEV_MAX]; |
46 | struct dpmaif_callbacks callbacks; |
47 | unsigned int nic_dev_num; |
48 | unsigned int md_sta; |
49 | struct t7xx_fsm_notifier md_status_notify; |
50 | bool wwan_is_registered; |
51 | struct net_device dummy_dev; |
52 | struct napi_struct *napi[RXQ_NUM]; |
53 | atomic_t napi_usr_refcnt; |
54 | bool is_napi_en; |
55 | }; |
56 | |
57 | int t7xx_ccmni_init(struct t7xx_pci_dev *t7xx_dev); |
58 | void t7xx_ccmni_exit(struct t7xx_pci_dev *t7xx_dev); |
59 | |
60 | #endif /* __T7XX_NETDEV_H__ */ |
61 | |