1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Altera PCIe MSI support |
4 | * |
5 | * Author: Ley Foon Tan <lftan@altera.com> |
6 | * |
7 | * Copyright Altera Corporation (C) 2013-2015. All rights reserved |
8 | */ |
9 | |
10 | #include <linux/interrupt.h> |
11 | #include <linux/irqchip/chained_irq.h> |
12 | #include <linux/irqdomain.h> |
13 | #include <linux/init.h> |
14 | #include <linux/module.h> |
15 | #include <linux/msi.h> |
16 | #include <linux/of_address.h> |
17 | #include <linux/of_pci.h> |
18 | #include <linux/pci.h> |
19 | #include <linux/platform_device.h> |
20 | #include <linux/slab.h> |
21 | |
22 | #define MSI_STATUS 0x0 |
23 | #define MSI_ERROR 0x4 |
24 | #define MSI_INTMASK 0x8 |
25 | |
26 | #define MAX_MSI_VECTORS 32 |
27 | |
28 | struct altera_msi { |
29 | DECLARE_BITMAP(used, MAX_MSI_VECTORS); |
30 | struct mutex lock; /* protect "used" bitmap */ |
31 | struct platform_device *pdev; |
32 | struct irq_domain *msi_domain; |
33 | struct irq_domain *inner_domain; |
34 | void __iomem *csr_base; |
35 | void __iomem *vector_base; |
36 | phys_addr_t vector_phy; |
37 | u32 num_of_vectors; |
38 | int irq; |
39 | }; |
40 | |
41 | static inline void msi_writel(struct altera_msi *msi, const u32 value, |
42 | const u32 reg) |
43 | { |
44 | writel_relaxed(value, msi->csr_base + reg); |
45 | } |
46 | |
47 | static inline u32 msi_readl(struct altera_msi *msi, const u32 reg) |
48 | { |
49 | return readl_relaxed(msi->csr_base + reg); |
50 | } |
51 | |
52 | static void altera_msi_isr(struct irq_desc *desc) |
53 | { |
54 | struct irq_chip *chip = irq_desc_get_chip(desc); |
55 | struct altera_msi *msi; |
56 | unsigned long status; |
57 | u32 bit; |
58 | int ret; |
59 | |
60 | chained_irq_enter(chip, desc); |
61 | msi = irq_desc_get_handler_data(desc); |
62 | |
63 | while ((status = msi_readl(msi, MSI_STATUS)) != 0) { |
64 | for_each_set_bit(bit, &status, msi->num_of_vectors) { |
65 | /* Dummy read from vector to clear the interrupt */ |
66 | readl_relaxed(msi->vector_base + (bit * sizeof(u32))); |
67 | |
68 | ret = generic_handle_domain_irq(domain: msi->inner_domain, hwirq: bit); |
69 | if (ret) |
70 | dev_err_ratelimited(&msi->pdev->dev, "unexpected MSI\n" ); |
71 | } |
72 | } |
73 | |
74 | chained_irq_exit(chip, desc); |
75 | } |
76 | |
77 | static struct irq_chip altera_msi_irq_chip = { |
78 | .name = "Altera PCIe MSI" , |
79 | .irq_mask = pci_msi_mask_irq, |
80 | .irq_unmask = pci_msi_unmask_irq, |
81 | }; |
82 | |
83 | static struct msi_domain_info altera_msi_domain_info = { |
84 | .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | |
85 | MSI_FLAG_PCI_MSIX), |
86 | .chip = &altera_msi_irq_chip, |
87 | }; |
88 | |
89 | static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) |
90 | { |
91 | struct altera_msi *msi = irq_data_get_irq_chip_data(d: data); |
92 | phys_addr_t addr = msi->vector_phy + (data->hwirq * sizeof(u32)); |
93 | |
94 | msg->address_lo = lower_32_bits(addr); |
95 | msg->address_hi = upper_32_bits(addr); |
96 | msg->data = data->hwirq; |
97 | |
98 | dev_dbg(&msi->pdev->dev, "msi#%d address_hi %#x address_lo %#x\n" , |
99 | (int)data->hwirq, msg->address_hi, msg->address_lo); |
100 | } |
101 | |
102 | static int altera_msi_set_affinity(struct irq_data *irq_data, |
103 | const struct cpumask *mask, bool force) |
104 | { |
105 | return -EINVAL; |
106 | } |
107 | |
108 | static struct irq_chip altera_msi_bottom_irq_chip = { |
109 | .name = "Altera MSI" , |
110 | .irq_compose_msi_msg = altera_compose_msi_msg, |
111 | .irq_set_affinity = altera_msi_set_affinity, |
112 | }; |
113 | |
114 | static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, |
115 | unsigned int nr_irqs, void *args) |
116 | { |
117 | struct altera_msi *msi = domain->host_data; |
118 | unsigned long bit; |
119 | u32 mask; |
120 | |
121 | WARN_ON(nr_irqs != 1); |
122 | mutex_lock(&msi->lock); |
123 | |
124 | bit = find_first_zero_bit(addr: msi->used, size: msi->num_of_vectors); |
125 | if (bit >= msi->num_of_vectors) { |
126 | mutex_unlock(lock: &msi->lock); |
127 | return -ENOSPC; |
128 | } |
129 | |
130 | set_bit(nr: bit, addr: msi->used); |
131 | |
132 | mutex_unlock(lock: &msi->lock); |
133 | |
134 | irq_domain_set_info(domain, virq, hwirq: bit, chip: &altera_msi_bottom_irq_chip, |
135 | chip_data: domain->host_data, handler: handle_simple_irq, |
136 | NULL, NULL); |
137 | |
138 | mask = msi_readl(msi, MSI_INTMASK); |
139 | mask |= 1 << bit; |
140 | msi_writel(msi, value: mask, MSI_INTMASK); |
141 | |
142 | return 0; |
143 | } |
144 | |
145 | static void altera_irq_domain_free(struct irq_domain *domain, |
146 | unsigned int virq, unsigned int nr_irqs) |
147 | { |
148 | struct irq_data *d = irq_domain_get_irq_data(domain, virq); |
149 | struct altera_msi *msi = irq_data_get_irq_chip_data(d); |
150 | u32 mask; |
151 | |
152 | mutex_lock(&msi->lock); |
153 | |
154 | if (!test_bit(d->hwirq, msi->used)) { |
155 | dev_err(&msi->pdev->dev, "trying to free unused MSI#%lu\n" , |
156 | d->hwirq); |
157 | } else { |
158 | __clear_bit(d->hwirq, msi->used); |
159 | mask = msi_readl(msi, MSI_INTMASK); |
160 | mask &= ~(1 << d->hwirq); |
161 | msi_writel(msi, value: mask, MSI_INTMASK); |
162 | } |
163 | |
164 | mutex_unlock(lock: &msi->lock); |
165 | } |
166 | |
167 | static const struct irq_domain_ops msi_domain_ops = { |
168 | .alloc = altera_irq_domain_alloc, |
169 | .free = altera_irq_domain_free, |
170 | }; |
171 | |
172 | static int altera_allocate_domains(struct altera_msi *msi) |
173 | { |
174 | struct fwnode_handle *fwnode = of_node_to_fwnode(node: msi->pdev->dev.of_node); |
175 | |
176 | msi->inner_domain = irq_domain_add_linear(NULL, size: msi->num_of_vectors, |
177 | ops: &msi_domain_ops, host_data: msi); |
178 | if (!msi->inner_domain) { |
179 | dev_err(&msi->pdev->dev, "failed to create IRQ domain\n" ); |
180 | return -ENOMEM; |
181 | } |
182 | |
183 | msi->msi_domain = pci_msi_create_irq_domain(fwnode, |
184 | info: &altera_msi_domain_info, parent: msi->inner_domain); |
185 | if (!msi->msi_domain) { |
186 | dev_err(&msi->pdev->dev, "failed to create MSI domain\n" ); |
187 | irq_domain_remove(host: msi->inner_domain); |
188 | return -ENOMEM; |
189 | } |
190 | |
191 | return 0; |
192 | } |
193 | |
194 | static void altera_free_domains(struct altera_msi *msi) |
195 | { |
196 | irq_domain_remove(host: msi->msi_domain); |
197 | irq_domain_remove(host: msi->inner_domain); |
198 | } |
199 | |
200 | static void altera_msi_remove(struct platform_device *pdev) |
201 | { |
202 | struct altera_msi *msi = platform_get_drvdata(pdev); |
203 | |
204 | msi_writel(msi, value: 0, MSI_INTMASK); |
205 | irq_set_chained_handler_and_data(irq: msi->irq, NULL, NULL); |
206 | |
207 | altera_free_domains(msi); |
208 | |
209 | platform_set_drvdata(pdev, NULL); |
210 | } |
211 | |
212 | static int altera_msi_probe(struct platform_device *pdev) |
213 | { |
214 | struct altera_msi *msi; |
215 | struct device_node *np = pdev->dev.of_node; |
216 | struct resource *res; |
217 | int ret; |
218 | |
219 | msi = devm_kzalloc(dev: &pdev->dev, size: sizeof(struct altera_msi), |
220 | GFP_KERNEL); |
221 | if (!msi) |
222 | return -ENOMEM; |
223 | |
224 | mutex_init(&msi->lock); |
225 | msi->pdev = pdev; |
226 | |
227 | msi->csr_base = devm_platform_ioremap_resource_byname(pdev, name: "csr" ); |
228 | if (IS_ERR(ptr: msi->csr_base)) { |
229 | dev_err(&pdev->dev, "failed to map csr memory\n" ); |
230 | return PTR_ERR(ptr: msi->csr_base); |
231 | } |
232 | |
233 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
234 | "vector_slave" ); |
235 | msi->vector_base = devm_ioremap_resource(dev: &pdev->dev, res); |
236 | if (IS_ERR(ptr: msi->vector_base)) |
237 | return PTR_ERR(ptr: msi->vector_base); |
238 | |
239 | msi->vector_phy = res->start; |
240 | |
241 | if (of_property_read_u32(np, propname: "num-vectors" , out_value: &msi->num_of_vectors)) { |
242 | dev_err(&pdev->dev, "failed to parse the number of vectors\n" ); |
243 | return -EINVAL; |
244 | } |
245 | |
246 | ret = altera_allocate_domains(msi); |
247 | if (ret) |
248 | return ret; |
249 | |
250 | msi->irq = platform_get_irq(pdev, 0); |
251 | if (msi->irq < 0) { |
252 | ret = msi->irq; |
253 | goto err; |
254 | } |
255 | |
256 | irq_set_chained_handler_and_data(irq: msi->irq, handle: altera_msi_isr, data: msi); |
257 | platform_set_drvdata(pdev, data: msi); |
258 | |
259 | return 0; |
260 | |
261 | err: |
262 | altera_msi_remove(pdev); |
263 | return ret; |
264 | } |
265 | |
266 | static const struct of_device_id altera_msi_of_match[] = { |
267 | { .compatible = "altr,msi-1.0" , NULL }, |
268 | { }, |
269 | }; |
270 | |
271 | static struct platform_driver altera_msi_driver = { |
272 | .driver = { |
273 | .name = "altera-msi" , |
274 | .of_match_table = altera_msi_of_match, |
275 | }, |
276 | .probe = altera_msi_probe, |
277 | .remove_new = altera_msi_remove, |
278 | }; |
279 | |
280 | static int __init altera_msi_init(void) |
281 | { |
282 | return platform_driver_register(&altera_msi_driver); |
283 | } |
284 | |
285 | static void __exit altera_msi_exit(void) |
286 | { |
287 | platform_driver_unregister(&altera_msi_driver); |
288 | } |
289 | |
290 | subsys_initcall(altera_msi_init); |
291 | MODULE_DEVICE_TABLE(of, altera_msi_of_match); |
292 | module_exit(altera_msi_exit); |
293 | MODULE_LICENSE("GPL v2" ); |
294 | |