1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Realtek DHC 1315E pin controller driver |
4 | * |
5 | * Copyright (c) 2023 Realtek Semiconductor Corp. |
6 | * |
7 | */ |
8 | |
9 | #include <linux/module.h> |
10 | #include <linux/of.h> |
11 | #include <linux/platform_device.h> |
12 | #include <linux/pinctrl/pinctrl.h> |
13 | |
14 | #include "pinctrl-rtd.h" |
15 | |
16 | enum rtd13xxe_iso_pins { |
17 | RTD1315E_ISO_GPIO_0 = 0, |
18 | RTD1315E_ISO_GPIO_1, |
19 | RTD1315E_ISO_EMMC_RST_N, |
20 | RTD1315E_ISO_EMMC_DD_SB, |
21 | RTD1315E_ISO_EMMC_CLK, |
22 | RTD1315E_ISO_EMMC_CMD, |
23 | RTD1315E_ISO_GPIO_6, |
24 | RTD1315E_ISO_GPIO_7, |
25 | RTD1315E_ISO_GPIO_8, |
26 | RTD1315E_ISO_GPIO_9, |
27 | RTD1315E_ISO_GPIO_10, |
28 | RTD1315E_ISO_GPIO_11, |
29 | RTD1315E_ISO_GPIO_12, |
30 | RTD1315E_ISO_GPIO_13, |
31 | RTD1315E_ISO_GPIO_14, |
32 | RTD1315E_ISO_GPIO_15, |
33 | RTD1315E_ISO_GPIO_16, |
34 | RTD1315E_ISO_GPIO_17, |
35 | RTD1315E_ISO_GPIO_18, |
36 | RTD1315E_ISO_GPIO_19, |
37 | RTD1315E_ISO_GPIO_20, |
38 | RTD1315E_ISO_EMMC_DATA_0, |
39 | RTD1315E_ISO_EMMC_DATA_1, |
40 | RTD1315E_ISO_EMMC_DATA_2, |
41 | RTD1315E_ISO_USB_CC2, |
42 | RTD1315E_ISO_GPIO_25, |
43 | RTD1315E_ISO_GPIO_26, |
44 | RTD1315E_ISO_GPIO_27, |
45 | RTD1315E_ISO_GPIO_28, |
46 | RTD1315E_ISO_GPIO_29, |
47 | RTD1315E_ISO_GPIO_30, |
48 | RTD1315E_ISO_GPIO_31, |
49 | RTD1315E_ISO_GPIO_32, |
50 | RTD1315E_ISO_GPIO_33, |
51 | RTD1315E_ISO_GPIO_34, |
52 | RTD1315E_ISO_GPIO_35, |
53 | RTD1315E_ISO_HIF_DATA, |
54 | RTD1315E_ISO_HIF_EN, |
55 | RTD1315E_ISO_HIF_RDY, |
56 | RTD1315E_ISO_HIF_CLK, |
57 | RTD1315E_ISO_GPIO_DUMMY_40, |
58 | RTD1315E_ISO_GPIO_DUMMY_41, |
59 | RTD1315E_ISO_GPIO_DUMMY_42, |
60 | RTD1315E_ISO_GPIO_DUMMY_43, |
61 | RTD1315E_ISO_GPIO_DUMMY_44, |
62 | RTD1315E_ISO_GPIO_DUMMY_45, |
63 | RTD1315E_ISO_GPIO_46, |
64 | RTD1315E_ISO_GPIO_47, |
65 | RTD1315E_ISO_GPIO_48, |
66 | RTD1315E_ISO_GPIO_49, |
67 | RTD1315E_ISO_GPIO_50, |
68 | RTD1315E_ISO_USB_CC1, |
69 | RTD1315E_ISO_EMMC_DATA_3, |
70 | RTD1315E_ISO_EMMC_DATA_4, |
71 | RTD1315E_ISO_IR_RX, |
72 | RTD1315E_ISO_UR0_RX, |
73 | RTD1315E_ISO_UR0_TX, |
74 | RTD1315E_ISO_GPIO_57, |
75 | RTD1315E_ISO_GPIO_58, |
76 | RTD1315E_ISO_GPIO_59, |
77 | RTD1315E_ISO_GPIO_60, |
78 | RTD1315E_ISO_GPIO_61, |
79 | RTD1315E_ISO_GPIO_62, |
80 | RTD1315E_ISO_GPIO_DUMMY_63, |
81 | RTD1315E_ISO_GPIO_DUMMY_64, |
82 | RTD1315E_ISO_GPIO_DUMMY_65, |
83 | RTD1315E_ISO_GPIO_66, |
84 | RTD1315E_ISO_GPIO_67, |
85 | RTD1315E_ISO_GPIO_68, |
86 | RTD1315E_ISO_GPIO_69, |
87 | RTD1315E_ISO_GPIO_70, |
88 | RTD1315E_ISO_GPIO_71, |
89 | RTD1315E_ISO_GPIO_72, |
90 | RTD1315E_ISO_GPIO_DUMMY_73, |
91 | RTD1315E_ISO_EMMC_DATA_5, |
92 | RTD1315E_ISO_EMMC_DATA_6, |
93 | RTD1315E_ISO_EMMC_DATA_7, |
94 | RTD1315E_ISO_GPIO_DUMMY_77, |
95 | RTD1315E_ISO_GPIO_78, |
96 | RTD1315E_ISO_GPIO_79, |
97 | RTD1315E_ISO_GPIO_80, |
98 | RTD1315E_ISO_GPIO_81, |
99 | RTD1315E_ISO_UR2_LOC, |
100 | RTD1315E_ISO_GSPI_LOC, |
101 | RTD1315E_ISO_HI_WIDTH, |
102 | RTD1315E_ISO_SF_EN, |
103 | RTD1315E_ISO_ARM_TRACE_DBG_EN, |
104 | RTD1315E_ISO_EJTAG_AUCPU_LOC, |
105 | RTD1315E_ISO_EJTAG_ACPU_LOC, |
106 | RTD1315E_ISO_EJTAG_VCPU_LOC, |
107 | RTD1315E_ISO_EJTAG_SCPU_LOC, |
108 | RTD1315E_ISO_DMIC_LOC, |
109 | RTD1315E_ISO_VTC_DMIC_LOC, |
110 | RTD1315E_ISO_VTC_TDM_LOC, |
111 | RTD1315E_ISO_VTC_I2SI_LOC, |
112 | RTD1315E_ISO_TDM_AI_LOC, |
113 | RTD1315E_ISO_AI_LOC, |
114 | RTD1315E_ISO_SPDIF_LOC, |
115 | RTD1315E_ISO_HIF_EN_LOC, |
116 | RTD1315E_ISO_SCAN_SWITCH, |
117 | RTD1315E_ISO_WD_RSET, |
118 | RTD1315E_ISO_BOOT_SEL, |
119 | RTD1315E_ISO_RESET_N, |
120 | RTD1315E_ISO_TESTMODE, |
121 | }; |
122 | |
123 | static const struct pinctrl_pin_desc rtd1315e_iso_pins[] = { |
124 | PINCTRL_PIN(RTD1315E_ISO_GPIO_0, "gpio_0" ), |
125 | PINCTRL_PIN(RTD1315E_ISO_GPIO_1, "gpio_1" ), |
126 | PINCTRL_PIN(RTD1315E_ISO_EMMC_RST_N, "emmc_rst_n" ), |
127 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DD_SB, "emmc_dd_sb" ), |
128 | PINCTRL_PIN(RTD1315E_ISO_EMMC_CLK, "emmc_clk" ), |
129 | PINCTRL_PIN(RTD1315E_ISO_EMMC_CMD, "emmc_cmd" ), |
130 | PINCTRL_PIN(RTD1315E_ISO_GPIO_6, "gpio_6" ), |
131 | PINCTRL_PIN(RTD1315E_ISO_GPIO_7, "gpio_7" ), |
132 | PINCTRL_PIN(RTD1315E_ISO_GPIO_8, "gpio_8" ), |
133 | PINCTRL_PIN(RTD1315E_ISO_GPIO_9, "gpio_9" ), |
134 | PINCTRL_PIN(RTD1315E_ISO_GPIO_10, "gpio_10" ), |
135 | PINCTRL_PIN(RTD1315E_ISO_GPIO_11, "gpio_11" ), |
136 | PINCTRL_PIN(RTD1315E_ISO_GPIO_12, "gpio_12" ), |
137 | PINCTRL_PIN(RTD1315E_ISO_GPIO_13, "gpio_13" ), |
138 | PINCTRL_PIN(RTD1315E_ISO_GPIO_14, "gpio_14" ), |
139 | PINCTRL_PIN(RTD1315E_ISO_GPIO_15, "gpio_15" ), |
140 | PINCTRL_PIN(RTD1315E_ISO_GPIO_16, "gpio_16" ), |
141 | PINCTRL_PIN(RTD1315E_ISO_GPIO_17, "gpio_17" ), |
142 | PINCTRL_PIN(RTD1315E_ISO_GPIO_18, "gpio_18" ), |
143 | PINCTRL_PIN(RTD1315E_ISO_GPIO_19, "gpio_19" ), |
144 | PINCTRL_PIN(RTD1315E_ISO_GPIO_20, "gpio_20" ), |
145 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_0, "emmc_data_0" ), |
146 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_1, "emmc_data_1" ), |
147 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_2, "emmc_data_2" ), |
148 | PINCTRL_PIN(RTD1315E_ISO_USB_CC2, "usb_cc2" ), |
149 | PINCTRL_PIN(RTD1315E_ISO_GPIO_25, "gpio_25" ), |
150 | PINCTRL_PIN(RTD1315E_ISO_GPIO_26, "gpio_26" ), |
151 | PINCTRL_PIN(RTD1315E_ISO_GPIO_27, "gpio_27" ), |
152 | PINCTRL_PIN(RTD1315E_ISO_GPIO_28, "gpio_28" ), |
153 | PINCTRL_PIN(RTD1315E_ISO_GPIO_29, "gpio_29" ), |
154 | PINCTRL_PIN(RTD1315E_ISO_GPIO_30, "gpio_30" ), |
155 | PINCTRL_PIN(RTD1315E_ISO_GPIO_31, "gpio_31" ), |
156 | PINCTRL_PIN(RTD1315E_ISO_GPIO_32, "gpio_32" ), |
157 | PINCTRL_PIN(RTD1315E_ISO_GPIO_33, "gpio_33" ), |
158 | PINCTRL_PIN(RTD1315E_ISO_GPIO_34, "gpio_34" ), |
159 | PINCTRL_PIN(RTD1315E_ISO_GPIO_35, "gpio_35" ), |
160 | PINCTRL_PIN(RTD1315E_ISO_HIF_DATA, "hif_data" ), |
161 | PINCTRL_PIN(RTD1315E_ISO_HIF_EN, "hif_en" ), |
162 | PINCTRL_PIN(RTD1315E_ISO_HIF_RDY, "hif_rdy" ), |
163 | PINCTRL_PIN(RTD1315E_ISO_HIF_CLK, "hif_clk" ), |
164 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_40, "gpio_dummy_40" ), |
165 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_41, "gpio_dummy_41" ), |
166 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_42, "gpio_dummy_42" ), |
167 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_43, "gpio_dummy_43" ), |
168 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_44, "gpio_dummy_44" ), |
169 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_45, "gpio_dummy_45" ), |
170 | PINCTRL_PIN(RTD1315E_ISO_GPIO_46, "gpio_46" ), |
171 | PINCTRL_PIN(RTD1315E_ISO_GPIO_47, "gpio_47" ), |
172 | PINCTRL_PIN(RTD1315E_ISO_GPIO_48, "gpio_48" ), |
173 | PINCTRL_PIN(RTD1315E_ISO_GPIO_49, "gpio_49" ), |
174 | PINCTRL_PIN(RTD1315E_ISO_GPIO_50, "gpio_50" ), |
175 | PINCTRL_PIN(RTD1315E_ISO_USB_CC1, "usb_cc1" ), |
176 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_3, "emmc_data_3" ), |
177 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_4, "emmc_data_4" ), |
178 | PINCTRL_PIN(RTD1315E_ISO_IR_RX, "ir_rx" ), |
179 | PINCTRL_PIN(RTD1315E_ISO_UR0_RX, "ur0_rx" ), |
180 | PINCTRL_PIN(RTD1315E_ISO_UR0_TX, "ur0_tx" ), |
181 | PINCTRL_PIN(RTD1315E_ISO_GPIO_57, "gpio_57" ), |
182 | PINCTRL_PIN(RTD1315E_ISO_GPIO_58, "gpio_58" ), |
183 | PINCTRL_PIN(RTD1315E_ISO_GPIO_59, "gpio_59" ), |
184 | PINCTRL_PIN(RTD1315E_ISO_GPIO_60, "gpio_60" ), |
185 | PINCTRL_PIN(RTD1315E_ISO_GPIO_61, "gpio_61" ), |
186 | PINCTRL_PIN(RTD1315E_ISO_GPIO_62, "gpio_62" ), |
187 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_63, "gpio_dummy_63" ), |
188 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_64, "gpio_dummy_64" ), |
189 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_65, "gpio_dummy_65" ), |
190 | PINCTRL_PIN(RTD1315E_ISO_GPIO_66, "gpio_66" ), |
191 | PINCTRL_PIN(RTD1315E_ISO_GPIO_67, "gpio_67" ), |
192 | PINCTRL_PIN(RTD1315E_ISO_GPIO_68, "gpio_68" ), |
193 | PINCTRL_PIN(RTD1315E_ISO_GPIO_69, "gpio_69" ), |
194 | PINCTRL_PIN(RTD1315E_ISO_GPIO_70, "gpio_70" ), |
195 | PINCTRL_PIN(RTD1315E_ISO_GPIO_71, "gpio_71" ), |
196 | PINCTRL_PIN(RTD1315E_ISO_GPIO_72, "gpio_72" ), |
197 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_73, "gpio_dummy_73" ), |
198 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_5, "emmc_data_5" ), |
199 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_6, "emmc_data_6" ), |
200 | PINCTRL_PIN(RTD1315E_ISO_EMMC_DATA_7, "emmc_data_7" ), |
201 | PINCTRL_PIN(RTD1315E_ISO_GPIO_DUMMY_77, "gpio_dummy_77" ), |
202 | PINCTRL_PIN(RTD1315E_ISO_GPIO_78, "gpio_78" ), |
203 | PINCTRL_PIN(RTD1315E_ISO_GPIO_79, "gpio_79" ), |
204 | PINCTRL_PIN(RTD1315E_ISO_GPIO_80, "gpio_80" ), |
205 | PINCTRL_PIN(RTD1315E_ISO_GPIO_81, "gpio_81" ), |
206 | PINCTRL_PIN(RTD1315E_ISO_UR2_LOC, "ur2_loc" ), |
207 | PINCTRL_PIN(RTD1315E_ISO_GSPI_LOC, "gspi_loc" ), |
208 | PINCTRL_PIN(RTD1315E_ISO_HI_WIDTH, "hi_width" ), |
209 | PINCTRL_PIN(RTD1315E_ISO_SF_EN, "sf_en" ), |
210 | PINCTRL_PIN(RTD1315E_ISO_ARM_TRACE_DBG_EN, "arm_trace_dbg_en" ), |
211 | PINCTRL_PIN(RTD1315E_ISO_EJTAG_AUCPU_LOC, "ejtag_aucpu_loc" ), |
212 | PINCTRL_PIN(RTD1315E_ISO_EJTAG_ACPU_LOC, "ejtag_acpu_loc" ), |
213 | PINCTRL_PIN(RTD1315E_ISO_EJTAG_VCPU_LOC, "ejtag_vcpu_loc" ), |
214 | PINCTRL_PIN(RTD1315E_ISO_EJTAG_SCPU_LOC, "ejtag_scpu_loc" ), |
215 | PINCTRL_PIN(RTD1315E_ISO_DMIC_LOC, "dmic_loc" ), |
216 | PINCTRL_PIN(RTD1315E_ISO_VTC_DMIC_LOC, "vtc_dmic_loc" ), |
217 | PINCTRL_PIN(RTD1315E_ISO_VTC_TDM_LOC, "vtc_tdm_loc" ), |
218 | PINCTRL_PIN(RTD1315E_ISO_VTC_I2SI_LOC, "vtc_i2si_loc" ), |
219 | PINCTRL_PIN(RTD1315E_ISO_TDM_AI_LOC, "tdm_ai_loc" ), |
220 | PINCTRL_PIN(RTD1315E_ISO_AI_LOC, "ai_loc" ), |
221 | PINCTRL_PIN(RTD1315E_ISO_SPDIF_LOC, "spdif_loc" ), |
222 | PINCTRL_PIN(RTD1315E_ISO_HIF_EN_LOC, "hif_en_loc" ), |
223 | PINCTRL_PIN(RTD1315E_ISO_SCAN_SWITCH, "scan_switch" ), |
224 | PINCTRL_PIN(RTD1315E_ISO_WD_RSET, "wd_rset" ), |
225 | PINCTRL_PIN(RTD1315E_ISO_BOOT_SEL, "boot_sel" ), |
226 | PINCTRL_PIN(RTD1315E_ISO_RESET_N, "reset_n" ), |
227 | PINCTRL_PIN(RTD1315E_ISO_TESTMODE, "testmode" ), |
228 | }; |
229 | |
230 | /* Tagged as __maybe_unused since there are pins we may use in the future */ |
231 | #define DECLARE_RTD1315E_PIN(_pin, _name) \ |
232 | static const unsigned int rtd1315e_## _name ##_pins[] __maybe_unused = { _pin } |
233 | |
234 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_0, gpio_0); |
235 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_1, gpio_1); |
236 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_RST_N, emmc_rst_n); |
237 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DD_SB, emmc_dd_sb); |
238 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_CLK, emmc_clk); |
239 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_CMD, emmc_cmd); |
240 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_6, gpio_6); |
241 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_7, gpio_7); |
242 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_8, gpio_8); |
243 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_9, gpio_9); |
244 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_10, gpio_10); |
245 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_11, gpio_11); |
246 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_12, gpio_12); |
247 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_13, gpio_13); |
248 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_14, gpio_14); |
249 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_15, gpio_15); |
250 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_16, gpio_16); |
251 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_17, gpio_17); |
252 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_18, gpio_18); |
253 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_19, gpio_19); |
254 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_20, gpio_20); |
255 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_0, emmc_data_0); |
256 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_1, emmc_data_1); |
257 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_2, emmc_data_2); |
258 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_USB_CC2, usb_cc2); |
259 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_25, gpio_25); |
260 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_26, gpio_26); |
261 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_27, gpio_27); |
262 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_28, gpio_28); |
263 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_29, gpio_29); |
264 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_30, gpio_30); |
265 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_31, gpio_31); |
266 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_32, gpio_32); |
267 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_33, gpio_33); |
268 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_34, gpio_34); |
269 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_35, gpio_35); |
270 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HIF_DATA, hif_data); |
271 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HIF_EN, hif_en); |
272 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HIF_RDY, hif_rdy); |
273 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HIF_CLK, hif_clk); |
274 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_40, gpio_dummy_40); |
275 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_41, gpio_dummy_41); |
276 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_42, gpio_dummy_42); |
277 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_43, gpio_dummy_43); |
278 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_44, gpio_dummy_44); |
279 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_45, gpio_dummy_45); |
280 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_46, gpio_46); |
281 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_47, gpio_47); |
282 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_48, gpio_48); |
283 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_49, gpio_49); |
284 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_50, gpio_50); |
285 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_USB_CC1, usb_cc1); |
286 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_3, emmc_data_3); |
287 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_4, emmc_data_4); |
288 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_IR_RX, ir_rx); |
289 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_UR0_RX, ur0_rx); |
290 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_UR0_TX, ur0_tx); |
291 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_57, gpio_57); |
292 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_58, gpio_58); |
293 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_59, gpio_59); |
294 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_60, gpio_60); |
295 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_61, gpio_61); |
296 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_62, gpio_62); |
297 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_63, gpio_dummy_63); |
298 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_64, gpio_dummy_64); |
299 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_65, gpio_dummy_65); |
300 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_66, gpio_66); |
301 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_67, gpio_67); |
302 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_68, gpio_68); |
303 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_69, gpio_69); |
304 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_70, gpio_70); |
305 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_71, gpio_71); |
306 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_72, gpio_72); |
307 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_73, gpio_dummy_73); |
308 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_5, emmc_data_5); |
309 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_6, emmc_data_6); |
310 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EMMC_DATA_7, emmc_data_7); |
311 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_DUMMY_77, gpio_dummy_77); |
312 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_78, gpio_78); |
313 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_79, gpio_79); |
314 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_80, gpio_80); |
315 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GPIO_81, gpio_81); |
316 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_UR2_LOC, ur2_loc); |
317 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_GSPI_LOC, gspi_loc); |
318 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HI_WIDTH, hi_width); |
319 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_SF_EN, sf_en); |
320 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_ARM_TRACE_DBG_EN, arm_trace_dbg_en); |
321 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EJTAG_AUCPU_LOC, ejtag_aucpu_loc); |
322 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EJTAG_ACPU_LOC, ejtag_acpu_loc); |
323 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EJTAG_VCPU_LOC, ejtag_vcpu_loc); |
324 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_EJTAG_SCPU_LOC, ejtag_scpu_loc); |
325 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_DMIC_LOC, dmic_loc); |
326 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_VTC_DMIC_LOC, vtc_dmic_loc); |
327 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_VTC_TDM_LOC, vtc_tdm_loc); |
328 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_VTC_I2SI_LOC, vtc_i2si_loc); |
329 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_TDM_AI_LOC, tdm_ai_loc); |
330 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_AI_LOC, ai_loc); |
331 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_SPDIF_LOC, spdif_loc); |
332 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_HIF_EN_LOC, hif_en_loc); |
333 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_SCAN_SWITCH, scan_switch); |
334 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_WD_RSET, wd_rset); |
335 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_BOOT_SEL, boot_sel); |
336 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_RESET_N, reset_n); |
337 | DECLARE_RTD1315E_PIN(RTD1315E_ISO_TESTMODE, testmode); |
338 | |
339 | #define RTD1315E_GROUP(_name) \ |
340 | { \ |
341 | .name = # _name, \ |
342 | .pins = rtd1315e_ ## _name ## _pins, \ |
343 | .num_pins = ARRAY_SIZE(rtd1315e_ ## _name ## _pins), \ |
344 | } |
345 | |
346 | static const struct rtd_pin_group_desc rtd1315e_pin_groups[] = { |
347 | RTD1315E_GROUP(gpio_0), |
348 | RTD1315E_GROUP(gpio_1), |
349 | RTD1315E_GROUP(emmc_rst_n), |
350 | RTD1315E_GROUP(emmc_dd_sb), |
351 | RTD1315E_GROUP(emmc_clk), |
352 | RTD1315E_GROUP(emmc_cmd), |
353 | RTD1315E_GROUP(gpio_6), |
354 | RTD1315E_GROUP(gpio_7), |
355 | RTD1315E_GROUP(gpio_8), |
356 | RTD1315E_GROUP(gpio_9), |
357 | RTD1315E_GROUP(gpio_10), |
358 | RTD1315E_GROUP(gpio_11), |
359 | RTD1315E_GROUP(gpio_12), |
360 | RTD1315E_GROUP(gpio_13), |
361 | RTD1315E_GROUP(gpio_14), |
362 | RTD1315E_GROUP(gpio_15), |
363 | RTD1315E_GROUP(gpio_16), |
364 | RTD1315E_GROUP(gpio_17), |
365 | RTD1315E_GROUP(gpio_18), |
366 | RTD1315E_GROUP(gpio_19), |
367 | RTD1315E_GROUP(gpio_20), |
368 | RTD1315E_GROUP(emmc_data_0), |
369 | RTD1315E_GROUP(emmc_data_1), |
370 | RTD1315E_GROUP(emmc_data_2), |
371 | RTD1315E_GROUP(usb_cc2), |
372 | RTD1315E_GROUP(gpio_25), |
373 | RTD1315E_GROUP(gpio_26), |
374 | RTD1315E_GROUP(gpio_27), |
375 | RTD1315E_GROUP(gpio_28), |
376 | RTD1315E_GROUP(gpio_29), |
377 | RTD1315E_GROUP(gpio_30), |
378 | RTD1315E_GROUP(gpio_31), |
379 | RTD1315E_GROUP(gpio_32), |
380 | RTD1315E_GROUP(gpio_33), |
381 | RTD1315E_GROUP(gpio_34), |
382 | RTD1315E_GROUP(gpio_35), |
383 | RTD1315E_GROUP(hif_data), |
384 | RTD1315E_GROUP(hif_en), |
385 | RTD1315E_GROUP(hif_rdy), |
386 | RTD1315E_GROUP(hif_clk), |
387 | RTD1315E_GROUP(gpio_dummy_40), |
388 | RTD1315E_GROUP(gpio_dummy_41), |
389 | RTD1315E_GROUP(gpio_dummy_42), |
390 | RTD1315E_GROUP(gpio_dummy_43), |
391 | RTD1315E_GROUP(gpio_dummy_44), |
392 | RTD1315E_GROUP(gpio_dummy_45), |
393 | RTD1315E_GROUP(gpio_46), |
394 | RTD1315E_GROUP(gpio_47), |
395 | RTD1315E_GROUP(gpio_48), |
396 | RTD1315E_GROUP(gpio_49), |
397 | RTD1315E_GROUP(gpio_50), |
398 | RTD1315E_GROUP(usb_cc1), |
399 | RTD1315E_GROUP(emmc_data_3), |
400 | RTD1315E_GROUP(emmc_data_4), |
401 | RTD1315E_GROUP(ir_rx), |
402 | RTD1315E_GROUP(ur0_rx), |
403 | RTD1315E_GROUP(ur0_tx), |
404 | RTD1315E_GROUP(gpio_57), |
405 | RTD1315E_GROUP(gpio_58), |
406 | RTD1315E_GROUP(gpio_59), |
407 | RTD1315E_GROUP(gpio_60), |
408 | RTD1315E_GROUP(gpio_61), |
409 | RTD1315E_GROUP(gpio_62), |
410 | RTD1315E_GROUP(gpio_dummy_63), |
411 | RTD1315E_GROUP(gpio_dummy_64), |
412 | RTD1315E_GROUP(gpio_dummy_65), |
413 | RTD1315E_GROUP(gpio_66), |
414 | RTD1315E_GROUP(gpio_67), |
415 | RTD1315E_GROUP(gpio_68), |
416 | RTD1315E_GROUP(gpio_69), |
417 | RTD1315E_GROUP(gpio_70), |
418 | RTD1315E_GROUP(gpio_71), |
419 | RTD1315E_GROUP(gpio_72), |
420 | RTD1315E_GROUP(gpio_dummy_73), |
421 | RTD1315E_GROUP(emmc_data_5), |
422 | RTD1315E_GROUP(emmc_data_6), |
423 | RTD1315E_GROUP(emmc_data_7), |
424 | RTD1315E_GROUP(gpio_dummy_77), |
425 | RTD1315E_GROUP(gpio_78), |
426 | RTD1315E_GROUP(gpio_79), |
427 | RTD1315E_GROUP(gpio_80), |
428 | RTD1315E_GROUP(gpio_81), |
429 | RTD1315E_GROUP(ur2_loc), |
430 | RTD1315E_GROUP(gspi_loc), |
431 | RTD1315E_GROUP(hi_width), |
432 | RTD1315E_GROUP(sf_en), |
433 | RTD1315E_GROUP(arm_trace_dbg_en), |
434 | RTD1315E_GROUP(ejtag_aucpu_loc), |
435 | RTD1315E_GROUP(ejtag_acpu_loc), |
436 | RTD1315E_GROUP(ejtag_vcpu_loc), |
437 | RTD1315E_GROUP(ejtag_scpu_loc), |
438 | RTD1315E_GROUP(dmic_loc), |
439 | RTD1315E_GROUP(vtc_dmic_loc), |
440 | RTD1315E_GROUP(vtc_tdm_loc), |
441 | RTD1315E_GROUP(vtc_i2si_loc), |
442 | RTD1315E_GROUP(tdm_ai_loc), |
443 | RTD1315E_GROUP(ai_loc), |
444 | RTD1315E_GROUP(spdif_loc), |
445 | RTD1315E_GROUP(hif_en_loc), |
446 | |
447 | }; |
448 | |
449 | static const char * const rtd1315e_gpio_groups[] = { |
450 | "gpio_0" , "gpio_1" , "emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" , |
451 | "emmc_cmd" , "gpio_6" , "gpio_7" , "gpio_8" , "gpio_9" , |
452 | "gpio_10" , "gpio_11" , "gpio_12" , "gpio_13" , "gpio_14" , |
453 | "gpio_15" , "gpio_16" , "gpio_17" , "gpio_18" , "gpio_19" , |
454 | "gpio_20" , "emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "usb_cc2" , |
455 | "gpio_25" , "gpio_26" , "gpio_27" , "gpio_28" , "gpio_29" , |
456 | "gpio_30" , "gpio_31" , "gpio_32" , "gpio_33" , "gpio_34" , |
457 | "gpio_35" , "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , |
458 | "gpio_46" , "gpio_47" , "gpio_48" , "gpio_49" , |
459 | "gpio_50" , "usb_cc1" , "emmc_data_3" , "emmc_data_4" , "ir_rx" , |
460 | "ur0_rx" , "ur0_tx" , "gpio_57" , "gpio_58" , "gpio_59" , |
461 | "gpio_60" , "gpio_61" , "gpio_62" , "gpio_66" , "gpio_67" , |
462 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" , |
463 | "emmc_data_5" , "emmc_data_6" , "emmc_data_7" , |
464 | "gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" }; |
465 | static const char * const rtd1315e_nf_groups[] = { |
466 | "emmc_rst_n" , "emmc_clk" , "emmc_cmd" , "emmc_data_0" , |
467 | "emmc_data_1" , "emmc_data_2" , "emmc_data_3" , "emmc_data_4" , |
468 | "emmc_data_5" , "emmc_data_6" , "emmc_data_7" , |
469 | "gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" }; |
470 | static const char * const rtd1315e_emmc_groups[] = { |
471 | "emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" , "emmc_cmd" , |
472 | "emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "emmc_data_3" , |
473 | "emmc_data_4" , "emmc_data_5" , "emmc_data_6" , "emmc_data_7" }; |
474 | |
475 | static const char * const rtd1315e_ao_groups[] = { |
476 | "gpio_66" , "gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" , |
477 | "gpio_71" , "gpio_72" }; |
478 | static const char * const rtd1315e_gspi_loc0_groups[] = { |
479 | "gpio_18" , "gpio_19" , "gpio_20" , "gpio_31" , "gspi_loc" }; |
480 | static const char * const rtd1315e_gspi_loc1_groups[] = { |
481 | "gpio_8" , "gpio_9" , "gpio_10" , "gpio_11" , "gspi_loc" }; |
482 | static const char * const rtd1315e_uart0_groups[] = { "ur0_rx" , "ur0_tx" }; |
483 | static const char * const rtd1315e_uart1_groups[] = { |
484 | "gpio_8" , "gpio_9" , "gpio_10" , "gpio_11" }; |
485 | static const char * const rtd1315e_uart2_loc0_groups[] = { |
486 | "gpio_18" , "gpio_19" , "gpio_20" , "gpio_31" , "ur2_loc" }; |
487 | static const char * const rtd1315e_uart2_loc1_groups[] = { |
488 | "gpio_25" , "gpio_26" , "gpio_27" , "gpio_28" , "ur2_loc" }; |
489 | static const char * const rtd1315e_i2c0_groups[] = { "gpio_12" , "gpio_13" }; |
490 | static const char * const rtd1315e_i2c1_groups[] = { "gpio_16" , "gpio_17" }; |
491 | static const char * const rtd1315e_i2c4_groups[] = { "gpio_34" , "gpio_35" }; |
492 | static const char * const rtd1315e_i2c5_groups[] = { "gpio_29" , "gpio_46" }; |
493 | static const char * const rtd1315e_pcie1_groups[] = { "gpio_25" }; |
494 | static const char * const rtd1315e_etn_led_groups[] = { "gpio_14" , "gpio_15" }; |
495 | static const char * const rtd1315e_etn_phy_groups[] = { "gpio_14" , "gpio_15" }; |
496 | static const char * const rtd1315e_spi_groups[] = { |
497 | "gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" }; |
498 | static const char * const rtd1315e_pwm0_loc0_groups[] = { "gpio_26" }; |
499 | static const char * const rtd1315e_pwm0_loc1_groups[] = { "gpio_20" }; |
500 | static const char * const rtd1315e_pwm1_loc0_groups[] = { "gpio_27" }; |
501 | static const char * const rtd1315e_pwm1_loc1_groups[] = { "gpio_29" }; |
502 | |
503 | static const char * const rtd1315e_pwm2_loc0_groups[] = { "gpio_28" }; |
504 | static const char * const rtd1315e_pwm2_loc1_groups[] = { "gpio_30" }; |
505 | static const char * const rtd1315e_pwm3_loc0_groups[] = { "gpio_47" }; |
506 | static const char * const rtd1315e_pwm3_loc1_groups[] = { "gpio_31" }; |
507 | static const char * const rtd1315e_spdif_optical_loc0_groups[] = { "gpio_20" , "spdif_loc" }; |
508 | static const char * const rtd1315e_spdif_optical_loc1_groups[] = { "gpio_6" , "spdif_loc" }; |
509 | static const char * const rtd1315e_usb_cc1_groups[] = { "usb_cc1" }; |
510 | static const char * const rtd1315e_usb_cc2_groups[] = { "usb_cc2" }; |
511 | |
512 | static const char * const rtd1315e_sd_groups[] = { |
513 | "gpio_32" , "gpio_33" , "gpio_34" , "gpio_35" , |
514 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" }; |
515 | static const char * const rtd1315e_dmic_loc0_groups[] = { |
516 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
517 | "gpio_62" , "gpio_1" , "gpio_6" , "dmic_loc" }; |
518 | static const char * const rtd1315e_dmic_loc1_groups[] = { |
519 | "gpio_32" , "gpio_33" , "gpio_34" , "gpio_35" , |
520 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , |
521 | "dmic_loc" }; |
522 | static const char * const rtd1315e_ai_loc0_groups[] = { |
523 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
524 | "gpio_62" , "gpio_1" , "ai_loc" }; |
525 | static const char * const rtd1315e_ai_loc1_groups[] = { |
526 | "gpio_32" , "gpio_33" , "gpio_34" , "hif_data" , |
527 | "hif_en" , "hif_rdy" , "hif_clk" , "ai_loc" }; |
528 | static const char * const rtd1315e_tdm_ai_loc0_groups[] = { |
529 | "gpio_57" , "gpio_58" , "gpio_59" , |
530 | "gpio_60" , "tdm_ai_loc" }; |
531 | static const char * const rtd1315e_tdm_ai_loc1_groups[] = { |
532 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , "tdm_ai_loc" }; |
533 | static const char * const rtd1315e_hi_loc0_groups[] = { |
534 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" }; |
535 | static const char * const rtd1315e_hi_m_groups[] = { |
536 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" }; |
537 | static const char * const rtd1315e_vtc_i2so_groups[] = { |
538 | "gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" }; |
539 | static const char * const rtd1315e_vtc_i2si_loc0_groups[] = { |
540 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
541 | "vtc_i2si_loc" }; |
542 | static const char * const rtd1315e_vtc_i2si_loc1_groups[] = { |
543 | "gpio_32" , "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , |
544 | "vtc_i2si_loc" }; |
545 | static const char * const rtd1315e_vtc_dmic_loc0_groups[] = { |
546 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , |
547 | "vtc_dmic_loc" }; |
548 | static const char * const rtd1315e_vtc_dmic_loc1_groups[] = { |
549 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , |
550 | "vtc_dmic_loc" }; |
551 | static const char * const rtd1315e_vtc_tdm_loc0_groups[] = { |
552 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , |
553 | "vtc_tdm_loc" }; |
554 | static const char * const rtd1315e_vtc_tdm_loc1_groups[] = { |
555 | "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , |
556 | "vtc_tdm_loc" }; |
557 | static const char * const rtd1315e_dc_fan_groups[] = { "gpio_47" }; |
558 | static const char * const rtd1315e_pll_test_loc0_groups[] = { "gpio_0" , "gpio_1" }; |
559 | static const char * const rtd1315e_pll_test_loc1_groups[] = { "gpio_48" , "gpio_49" }; |
560 | static const char * const rtd1315e_spdif_groups[] = { "gpio_50" }; |
561 | static const char * const rtd1315e_ir_rx_groups[] = { "ir_rx" }; |
562 | static const char * const rtd1315e_uart2_disable_groups[] = { "ur2_loc" }; |
563 | static const char * const rtd1315e_gspi_disable_groups[] = { "gspi_loc" }; |
564 | static const char * const rtd1315e_hi_width_disable_groups[] = { "hi_width" }; |
565 | static const char * const rtd1315e_hi_width_1bit_groups[] = { "hi_width" }; |
566 | static const char * const rtd1315e_sf_disable_groups[] = { "sf_en" }; |
567 | static const char * const rtd1315e_sf_enable_groups[] = { "sf_en" }; |
568 | static const char * const rtd1315e_scpu_ejtag_loc0_groups[] = { |
569 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" , |
570 | "ejtag_scpu_loc" }; |
571 | static const char * const rtd1315e_scpu_ejtag_loc1_groups[] = { |
572 | "gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" , |
573 | "ejtag_scpu_loc" }; |
574 | static const char * const rtd1315e_scpu_ejtag_loc2_groups[] = { |
575 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
576 | "ejtag_scpu_loc" }; |
577 | static const char * const rtd1315e_scpu_ejtag_loc3_groups[] = { |
578 | "hif_data" }; |
579 | static const char * const rtd1315e_acpu_ejtag_loc0_groups[] = { |
580 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" , |
581 | "ejtag_acpu_loc" }; |
582 | static const char * const rtd1315e_acpu_ejtag_loc1_groups[] = { |
583 | "gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" , |
584 | "ejtag_acpu_loc" }; |
585 | static const char * const rtd1315e_acpu_ejtag_loc2_groups[] = { |
586 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
587 | "ejtag_acpu_loc" }; |
588 | static const char * const rtd1315e_vcpu_ejtag_loc0_groups[] = { |
589 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" , |
590 | "ejtag_vcpu_loc" }; |
591 | static const char * const rtd1315e_vcpu_ejtag_loc1_groups[] = { |
592 | "gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" , |
593 | "ejtag_vcpu_loc" }; |
594 | static const char * const rtd1315e_vcpu_ejtag_loc2_groups[] = { |
595 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
596 | "ejtag_vcpu_loc" }; |
597 | static const char * const rtd1315e_aucpu_ejtag_loc0_groups[] = { |
598 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" , |
599 | "ejtag_aucpu_loc" }; |
600 | static const char * const rtd1315e_aucpu_ejtag_loc1_groups[] = { |
601 | "gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" , |
602 | "ejtag_aucpu_loc" }; |
603 | static const char * const rtd1315e_aucpu_ejtag_loc2_groups[] = { |
604 | "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" , |
605 | "ejtag_aucpu_loc" }; |
606 | static const char * const rtd1315e_gpu_ejtag_groups[] = { |
607 | "gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" }; |
608 | |
609 | static const char * const rtd1315e_iso_tristate_groups[] = { |
610 | "emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" , "emmc_cmd" , |
611 | "emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "emmc_data_3" , |
612 | "emmc_data_4" , "emmc_data_5" , "emmc_data_6" , "emmc_data_7" , |
613 | "gpio_1" , "gpio_7" , "gpio_8" , "gpio_9" , "gpio_10" , |
614 | "gpio_11" , "usb_cc2" , "gpio_32" , "gpio_33" , "hif_data" , |
615 | "hif_en" , "hif_rdy" , "hif_clk" , "ir_rx" , "ur0_rx" , |
616 | "ur0_tx" , "gpio_66" , "gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" , |
617 | "gpio_71" , "gpio_72" , "gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" }; |
618 | static const char * const rtd1315e_dbg_out0_groups[] = { |
619 | "gpio_0" , "gpio_12" , "gpio_13" , "gpio_16" , "gpio_17" , "gpio_26" , |
620 | "gpio_27" , "gpio_28" , "gpio_29" , "gpio_30" , "gpio_34" , "gpio_35" , |
621 | "gpio_46" , "gpio_48" , "gpio_49" , "usb_cc1" , "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" }; |
622 | static const char * const rtd1315e_dbg_out1_groups[] = { |
623 | "gpio_6" , "gpio_14" , "gpio_15" , "gpio_18" , "gpio_19" , "gpio_20" , |
624 | "gpio_25" , "gpio_31" , "gpio_47" , "gpio_50" , "gpio_59" , "gpio_61" , |
625 | "gpio_62" }; |
626 | static const char * const rtd1315e_standby_dbg_groups[] = { |
627 | "gpio_1" , "gpio_6" , "ir_rx" }; |
628 | static const char * const rtd1315e_arm_trace_debug_disable_groups[] = { "arm_trace_dbg_en" }; |
629 | static const char * const rtd1315e_arm_trace_debug_enable_groups[] = { "arm_trace_dbg_en" }; |
630 | static const char * const rtd1315e_aucpu_ejtag_disable_groups[] = { "ejtag_aucpu_loc" }; |
631 | static const char * const rtd1315e_acpu_ejtag_disable_groups[] = { "ejtag_acpu_loc" }; |
632 | static const char * const rtd1315e_vcpu_ejtag_disable_groups[] = { "ejtag_vcpu_loc" }; |
633 | static const char * const rtd1315e_scpu_ejtag_disable_groups[] = { "ejtag_scpu_loc" }; |
634 | static const char * const rtd1315e_vtc_dmic_loc_disable_groups[] = { "vtc_dmic_loc" }; |
635 | static const char * const rtd1315e_vtc_tdm_disable_groups[] = { "vtc_tdm_loc" }; |
636 | static const char * const rtd1315e_vtc_i2si_disable_groups[] = { "vtc_i2si_loc" }; |
637 | static const char * const rtd1315e_tdm_ai_disable_groups[] = { "tdm_ai_loc" }; |
638 | static const char * const rtd1315e_ai_disable_groups[] = { "ai_loc" }; |
639 | static const char * const rtd1315e_spdif_disable_groups[] = { "spdif_loc" }; |
640 | static const char * const rtd1315e_hif_disable_groups[] = { "hif_en_loc" }; |
641 | static const char * const rtd1315e_hif_enable_groups[] = { "hif_en_loc" }; |
642 | static const char * const rtd1315e_test_loop_groups[] = { "gpio_50" }; |
643 | static const char * const rtd1315e_pmic_pwrup_groups[] = { "gpio_78" }; |
644 | |
645 | #define RTD1315E_FUNC(_name) \ |
646 | { \ |
647 | .name = # _name, \ |
648 | .groups = rtd1315e_ ## _name ## _groups, \ |
649 | .num_groups = ARRAY_SIZE(rtd1315e_ ## _name ## _groups), \ |
650 | } |
651 | |
652 | static const struct rtd_pin_func_desc rtd1315e_pin_functions[] = { |
653 | RTD1315E_FUNC(gpio), |
654 | RTD1315E_FUNC(nf), |
655 | RTD1315E_FUNC(emmc), |
656 | RTD1315E_FUNC(ao), |
657 | RTD1315E_FUNC(gspi_loc0), |
658 | RTD1315E_FUNC(gspi_loc1), |
659 | RTD1315E_FUNC(uart0), |
660 | RTD1315E_FUNC(uart1), |
661 | RTD1315E_FUNC(uart2_loc0), |
662 | RTD1315E_FUNC(uart2_loc1), |
663 | RTD1315E_FUNC(i2c0), |
664 | RTD1315E_FUNC(i2c1), |
665 | RTD1315E_FUNC(i2c4), |
666 | RTD1315E_FUNC(i2c5), |
667 | RTD1315E_FUNC(pcie1), |
668 | RTD1315E_FUNC(etn_led), |
669 | RTD1315E_FUNC(etn_phy), |
670 | RTD1315E_FUNC(spi), |
671 | RTD1315E_FUNC(pwm0_loc0), |
672 | RTD1315E_FUNC(pwm0_loc1), |
673 | RTD1315E_FUNC(pwm1_loc0), |
674 | RTD1315E_FUNC(pwm1_loc1), |
675 | RTD1315E_FUNC(pwm2_loc0), |
676 | RTD1315E_FUNC(pwm2_loc1), |
677 | RTD1315E_FUNC(pwm3_loc0), |
678 | RTD1315E_FUNC(pwm3_loc1), |
679 | RTD1315E_FUNC(spdif_optical_loc0), |
680 | RTD1315E_FUNC(spdif_optical_loc1), |
681 | RTD1315E_FUNC(usb_cc1), |
682 | RTD1315E_FUNC(usb_cc2), |
683 | RTD1315E_FUNC(sd), |
684 | RTD1315E_FUNC(dmic_loc0), |
685 | RTD1315E_FUNC(dmic_loc1), |
686 | RTD1315E_FUNC(ai_loc0), |
687 | RTD1315E_FUNC(ai_loc1), |
688 | RTD1315E_FUNC(tdm_ai_loc0), |
689 | RTD1315E_FUNC(tdm_ai_loc1), |
690 | RTD1315E_FUNC(hi_loc0), |
691 | RTD1315E_FUNC(hi_m), |
692 | RTD1315E_FUNC(vtc_i2so), |
693 | RTD1315E_FUNC(vtc_i2si_loc0), |
694 | RTD1315E_FUNC(vtc_i2si_loc1), |
695 | RTD1315E_FUNC(vtc_dmic_loc0), |
696 | RTD1315E_FUNC(vtc_dmic_loc1), |
697 | RTD1315E_FUNC(vtc_tdm_loc0), |
698 | RTD1315E_FUNC(vtc_tdm_loc1), |
699 | RTD1315E_FUNC(dc_fan), |
700 | RTD1315E_FUNC(pll_test_loc0), |
701 | RTD1315E_FUNC(pll_test_loc1), |
702 | RTD1315E_FUNC(ir_rx), |
703 | RTD1315E_FUNC(uart2_disable), |
704 | RTD1315E_FUNC(gspi_disable), |
705 | RTD1315E_FUNC(hi_width_disable), |
706 | RTD1315E_FUNC(hi_width_1bit), |
707 | RTD1315E_FUNC(sf_disable), |
708 | RTD1315E_FUNC(sf_enable), |
709 | RTD1315E_FUNC(scpu_ejtag_loc0), |
710 | RTD1315E_FUNC(scpu_ejtag_loc1), |
711 | RTD1315E_FUNC(scpu_ejtag_loc2), |
712 | RTD1315E_FUNC(scpu_ejtag_loc3), |
713 | RTD1315E_FUNC(acpu_ejtag_loc0), |
714 | RTD1315E_FUNC(acpu_ejtag_loc1), |
715 | RTD1315E_FUNC(acpu_ejtag_loc2), |
716 | RTD1315E_FUNC(vcpu_ejtag_loc0), |
717 | RTD1315E_FUNC(vcpu_ejtag_loc1), |
718 | RTD1315E_FUNC(vcpu_ejtag_loc2), |
719 | RTD1315E_FUNC(aucpu_ejtag_loc0), |
720 | RTD1315E_FUNC(aucpu_ejtag_loc1), |
721 | RTD1315E_FUNC(aucpu_ejtag_loc2), |
722 | RTD1315E_FUNC(gpu_ejtag), |
723 | RTD1315E_FUNC(iso_tristate), |
724 | RTD1315E_FUNC(dbg_out0), |
725 | RTD1315E_FUNC(dbg_out1), |
726 | RTD1315E_FUNC(standby_dbg), |
727 | RTD1315E_FUNC(spdif), |
728 | RTD1315E_FUNC(arm_trace_debug_disable), |
729 | RTD1315E_FUNC(arm_trace_debug_enable), |
730 | RTD1315E_FUNC(aucpu_ejtag_disable), |
731 | RTD1315E_FUNC(acpu_ejtag_disable), |
732 | RTD1315E_FUNC(vcpu_ejtag_disable), |
733 | RTD1315E_FUNC(scpu_ejtag_disable), |
734 | RTD1315E_FUNC(vtc_dmic_loc_disable), |
735 | RTD1315E_FUNC(vtc_tdm_disable), |
736 | RTD1315E_FUNC(vtc_i2si_disable), |
737 | RTD1315E_FUNC(tdm_ai_disable), |
738 | RTD1315E_FUNC(ai_disable), |
739 | RTD1315E_FUNC(spdif_disable), |
740 | RTD1315E_FUNC(hif_disable), |
741 | RTD1315E_FUNC(hif_enable), |
742 | RTD1315E_FUNC(test_loop), |
743 | RTD1315E_FUNC(pmic_pwrup), |
744 | }; |
745 | |
746 | #undef RTD1315E_FUNC |
747 | |
748 | static const struct rtd_pin_desc rtd1315e_iso_muxes[ARRAY_SIZE(rtd1315e_iso_pins)] = { |
749 | [RTD1315E_ISO_EMMC_RST_N] = RTK_PIN_MUX(emmc_rst_n, 0x0, GENMASK(3, 0), |
750 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
751 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "nf" ), |
752 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "emmc" ), |
753 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate" )), |
754 | [RTD1315E_ISO_EMMC_DD_SB] = RTK_PIN_MUX(emmc_dd_sb, 0x0, GENMASK(7, 4), |
755 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
756 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "emmc" ), |
757 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate" )), |
758 | [RTD1315E_ISO_EMMC_CLK] = RTK_PIN_MUX(emmc_clk, 0x0, GENMASK(11, 8), |
759 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
760 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "nf" ), |
761 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "emmc" ), |
762 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate" )), |
763 | [RTD1315E_ISO_EMMC_CMD] = RTK_PIN_MUX(emmc_cmd, 0x0, GENMASK(15, 12), |
764 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
765 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "nf" ), |
766 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "emmc" ), |
767 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
768 | [RTD1315E_ISO_EMMC_DATA_0] = RTK_PIN_MUX(emmc_data_0, 0x0, GENMASK(19, 16), |
769 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
770 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "nf" ), |
771 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "emmc" ), |
772 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate" )), |
773 | [RTD1315E_ISO_EMMC_DATA_1] = RTK_PIN_MUX(emmc_data_1, 0x0, GENMASK(23, 20), |
774 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
775 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "nf" ), |
776 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "emmc" ), |
777 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
778 | [RTD1315E_ISO_EMMC_DATA_2] = RTK_PIN_MUX(emmc_data_2, 0x0, GENMASK(27, 24), |
779 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
780 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "nf" ), |
781 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "emmc" ), |
782 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate" )), |
783 | [RTD1315E_ISO_EMMC_DATA_3] = RTK_PIN_MUX(emmc_data_3, 0x0, GENMASK(31, 28), |
784 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
785 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "nf" ), |
786 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "emmc" ), |
787 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate" )), |
788 | |
789 | [RTD1315E_ISO_EMMC_DATA_4] = RTK_PIN_MUX(emmc_data_4, 0x4, GENMASK(3, 0), |
790 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
791 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "nf" ), |
792 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "emmc" ), |
793 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate" )), |
794 | [RTD1315E_ISO_EMMC_DATA_5] = RTK_PIN_MUX(emmc_data_5, 0x4, GENMASK(7, 4), |
795 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
796 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "nf" ), |
797 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "emmc" ), |
798 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate" )), |
799 | [RTD1315E_ISO_EMMC_DATA_6] = RTK_PIN_MUX(emmc_data_6, 0x4, GENMASK(11, 8), |
800 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
801 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "nf" ), |
802 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "emmc" ), |
803 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate" )), |
804 | [RTD1315E_ISO_EMMC_DATA_7] = RTK_PIN_MUX(emmc_data_7, 0x4, GENMASK(15, 12), |
805 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
806 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "nf" ), |
807 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "emmc" ), |
808 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
809 | [RTD1315E_ISO_GPIO_0] = RTK_PIN_MUX(gpio_0, 0x4, GENMASK(19, 16), |
810 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
811 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "pll_test_loc0" ), |
812 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "dbg_out0" )), |
813 | [RTD1315E_ISO_GPIO_1] = RTK_PIN_MUX(gpio_1, 0x4, GENMASK(23, 20), |
814 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
815 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "standby_dbg" ), |
816 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "pll_test_loc0" ), |
817 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "dmic_loc0" ), |
818 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "ai_loc0" ), |
819 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
820 | [RTD1315E_ISO_GPIO_6] = RTK_PIN_MUX(gpio_6, 0x4, GENMASK(27, 24), |
821 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
822 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "standby_dbg" ), |
823 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "dmic_loc0" ), |
824 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "spdif_optical_loc1" ), |
825 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "dbg_out1" )), |
826 | [RTD1315E_ISO_GPIO_7] = RTK_PIN_MUX(gpio_7, 0x4, GENMASK(31, 28), |
827 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
828 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate" )), |
829 | |
830 | [RTD1315E_ISO_GPIO_8] = RTK_PIN_MUX(gpio_8, 0x8, GENMASK(3, 0), |
831 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
832 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart1" ), |
833 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "gspi_loc1" ), |
834 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate" )), |
835 | [RTD1315E_ISO_GPIO_9] = RTK_PIN_MUX(gpio_9, 0x8, GENMASK(7, 4), |
836 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
837 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "uart1" ), |
838 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "gspi_loc1" ), |
839 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate" )), |
840 | [RTD1315E_ISO_GPIO_10] = RTK_PIN_MUX(gpio_10, 0x8, GENMASK(11, 8), |
841 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
842 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart1" ), |
843 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "gspi_loc1" ), |
844 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate" )), |
845 | [RTD1315E_ISO_GPIO_11] = RTK_PIN_MUX(gpio_11, 0x8, GENMASK(15, 12), |
846 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
847 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart1" ), |
848 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "gspi_loc1" ), |
849 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
850 | [RTD1315E_ISO_GPIO_12] = RTK_PIN_MUX(gpio_12, 0x8, GENMASK(19, 16), |
851 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
852 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "i2c0" ), |
853 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "dbg_out0" )), |
854 | [RTD1315E_ISO_GPIO_13] = RTK_PIN_MUX(gpio_13, 0x8, GENMASK(23, 20), |
855 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
856 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "i2c0" ), |
857 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "dbg_out0" )), |
858 | [RTD1315E_ISO_GPIO_14] = RTK_PIN_MUX(gpio_14, 0x8, GENMASK(27, 24), |
859 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
860 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "etn_led" ), |
861 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "etn_phy" ), |
862 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "dbg_out1" )), |
863 | [RTD1315E_ISO_GPIO_15] = RTK_PIN_MUX(gpio_15, 0x8, GENMASK(31, 28), |
864 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
865 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "etn_led" ), |
866 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "etn_phy" ), |
867 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "dbg_out1" )), |
868 | |
869 | [RTD1315E_ISO_GPIO_16] = RTK_PIN_MUX(gpio_16, 0xc, GENMASK(3, 0), |
870 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
871 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "i2c1" ), |
872 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out0" )), |
873 | [RTD1315E_ISO_GPIO_17] = RTK_PIN_MUX(gpio_17, 0xc, GENMASK(7, 4), |
874 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
875 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "i2c1" ), |
876 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "dbg_out0" )), |
877 | [RTD1315E_ISO_GPIO_18] = RTK_PIN_MUX(gpio_18, 0xc, GENMASK(11, 8), |
878 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
879 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart2_loc0" ), |
880 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "gspi_loc0" ), |
881 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "dbg_out1" )), |
882 | [RTD1315E_ISO_GPIO_19] = RTK_PIN_MUX(gpio_19, 0xc, GENMASK(15, 12), |
883 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
884 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart2_loc0" ), |
885 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "gspi_loc0" ), |
886 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "dbg_out1" )), |
887 | [RTD1315E_ISO_GPIO_20] = RTK_PIN_MUX(gpio_20, 0xc, GENMASK(19, 16), |
888 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
889 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "uart2_loc0" ), |
890 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "pwm0_loc1" ), |
891 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "gspi_loc0" ), |
892 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 16), "spdif_optical_loc0" ), |
893 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "dbg_out1" )), |
894 | [RTD1315E_ISO_USB_CC2] = RTK_PIN_MUX(usb_cc2, 0xc, GENMASK(23, 20), |
895 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
896 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "usb_cc2" ), |
897 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
898 | [RTD1315E_ISO_GPIO_25] = RTK_PIN_MUX(gpio_25, 0xc, GENMASK(27, 24), |
899 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
900 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "uart2_loc1" ), |
901 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "pcie1" ), |
902 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "dbg_out1" )), |
903 | [RTD1315E_ISO_GPIO_26] = RTK_PIN_MUX(gpio_26, 0xc, GENMASK(31, 28), |
904 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
905 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "uart2_loc1" ), |
906 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "pwm0_loc0" ), |
907 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "dbg_out0" )), |
908 | |
909 | [RTD1315E_ISO_GPIO_27] = RTK_PIN_MUX(gpio_27, 0x10, GENMASK(3, 0), |
910 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
911 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart2_loc1" ), |
912 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "pwm1_loc0" ), |
913 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out0" )), |
914 | [RTD1315E_ISO_GPIO_28] = RTK_PIN_MUX(gpio_28, 0x10, GENMASK(7, 4), |
915 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
916 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "uart2_loc1" ), |
917 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "pwm2_loc0" ), |
918 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "dbg_out0" )), |
919 | [RTD1315E_ISO_GPIO_29] = RTK_PIN_MUX(gpio_29, 0x10, GENMASK(11, 8), |
920 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
921 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "i2c5" ), |
922 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "pwm1_loc1" ), |
923 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "dbg_out0" )), |
924 | [RTD1315E_ISO_GPIO_30] = RTK_PIN_MUX(gpio_30, 0x10, GENMASK(15, 12), |
925 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
926 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "pwm2_loc1" ), |
927 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "dbg_out0" )), |
928 | [RTD1315E_ISO_GPIO_31] = RTK_PIN_MUX(gpio_31, 0x10, GENMASK(19, 16), |
929 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
930 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "uart2_loc0" ), |
931 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "pwm3_loc1" ), |
932 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "gspi_loc0" ), |
933 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "dbg_out1" )), |
934 | [RTD1315E_ISO_GPIO_32] = RTK_PIN_MUX(gpio_32, 0x10, GENMASK(23, 20), |
935 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
936 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "sd" ), |
937 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "aucpu_ejtag_loc1" ), |
938 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "dmic_loc1" ), |
939 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 20), "scpu_ejtag_loc1" ), |
940 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 20), "acpu_ejtag_loc1" ), |
941 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 20), "vcpu_ejtag_loc1" ), |
942 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 20), "ai_loc1" ), |
943 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 20), "vtc_i2si_loc1" ), |
944 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
945 | [RTD1315E_ISO_GPIO_33] = RTK_PIN_MUX(gpio_33, 0x10, GENMASK(27, 24), |
946 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
947 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "sd" ), |
948 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "aucpu_ejtag_loc1" ), |
949 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "dmic_loc1" ), |
950 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 24), "scpu_ejtag_loc1" ), |
951 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 24), "acpu_ejtag_loc1" ), |
952 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 24), "vcpu_ejtag_loc1" ), |
953 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 24), "ai_loc1" ), |
954 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate" )), |
955 | [RTD1315E_ISO_GPIO_34] = RTK_PIN_MUX(gpio_34, 0x10, GENMASK(31, 28), |
956 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
957 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "sd" ), |
958 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "dmic_loc1" ), |
959 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 28), "i2c4" ), |
960 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 28), "ai_loc1" ), |
961 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "dbg_out0" )), |
962 | |
963 | [RTD1315E_ISO_GPIO_35] = RTK_PIN_MUX(gpio_35, 0x14, GENMASK(3, 0), |
964 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
965 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "sd" ), |
966 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "dmic_loc1" ), |
967 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 0), "i2c4" ), |
968 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out0" )), |
969 | [RTD1315E_ISO_HIF_DATA] = RTK_PIN_MUX(hif_data, 0x14, GENMASK(7, 4), |
970 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
971 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "sd" ), |
972 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "aucpu_ejtag_loc1" ), |
973 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "dmic_loc1" ), |
974 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 4), "tdm_ai_loc1" ), |
975 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "scpu_ejtag_loc1" ), |
976 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 4), "acpu_ejtag_loc1" ), |
977 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 4), "vcpu_ejtag_loc1" ), |
978 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 4), "ai_loc1" ), |
979 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 4), "hi_loc0" ), |
980 | RTK_PIN_FUNC(SHIFT_LEFT(0xa, 4), "hi_m" ), |
981 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 4), "vtc_i2si_loc1" ), |
982 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 4), "vtc_tdm_loc1" ), |
983 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 4), "vtc_dmic_loc1" ), |
984 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 4), "scpu_ejtag_loc3" ), |
985 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate" )), |
986 | [RTD1315E_ISO_HIF_EN] = RTK_PIN_MUX(hif_en, 0x14, GENMASK(11, 8), |
987 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
988 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "sd" ), |
989 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "aucpu_ejtag_loc1" ), |
990 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "dmic_loc1" ), |
991 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "tdm_ai_loc1" ), |
992 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "scpu_ejtag_loc1" ), |
993 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "acpu_ejtag_loc1" ), |
994 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "vcpu_ejtag_loc1" ), |
995 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 8), "ai_loc1" ), |
996 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 8), "hi_loc0" ), |
997 | RTK_PIN_FUNC(SHIFT_LEFT(0xa, 8), "hi_m" ), |
998 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 8), "vtc_i2si_loc1" ), |
999 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 8), "vtc_tdm_loc1" ), |
1000 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 8), "vtc_dmic_loc1" ), |
1001 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate" )), |
1002 | [RTD1315E_ISO_HIF_RDY] = RTK_PIN_MUX(hif_rdy, 0x14, GENMASK(15, 12), |
1003 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
1004 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "sd" ), |
1005 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "dmic_loc1" ), |
1006 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "tdm_ai_loc1" ), |
1007 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 12), "ai_loc1" ), |
1008 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 12), "hi_loc0" ), |
1009 | RTK_PIN_FUNC(SHIFT_LEFT(0xa, 12), "hi_m" ), |
1010 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 12), "vtc_i2si_loc1" ), |
1011 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 12), "vtc_tdm_loc1" ), |
1012 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 12), "vtc_dmic_loc1" ), |
1013 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
1014 | [RTD1315E_ISO_HIF_CLK] = RTK_PIN_MUX(hif_clk, 0x14, GENMASK(19, 16), |
1015 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
1016 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "sd" ), |
1017 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "aucpu_ejtag_loc1" ), |
1018 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "dmic_loc1" ), |
1019 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 16), "tdm_ai_loc1" ), |
1020 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 16), "scpu_ejtag_loc1" ), |
1021 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 16), "acpu_ejtag_loc1" ), |
1022 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 16), "vcpu_ejtag_loc1" ), |
1023 | RTK_PIN_FUNC(SHIFT_LEFT(0x8, 16), "ai_loc1" ), |
1024 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 16), "hi_loc0" ), |
1025 | RTK_PIN_FUNC(SHIFT_LEFT(0xa, 16), "hi_m" ), |
1026 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 16), "vtc_i2si_loc1" ), |
1027 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 16), "vtc_tdm_loc1" ), |
1028 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 16), "vtc_dmic_loc1" ), |
1029 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate" )), |
1030 | [RTD1315E_ISO_GPIO_46] = RTK_PIN_MUX(gpio_46, 0x14, GENMASK(23, 20), |
1031 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
1032 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "i2c5" ), |
1033 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "dbg_out0" )), |
1034 | [RTD1315E_ISO_GPIO_47] = RTK_PIN_MUX(gpio_47, 0x14, GENMASK(27, 24), |
1035 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
1036 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "dc_fan" ), |
1037 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "pwm3_loc0" ), |
1038 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "dbg_out1" )), |
1039 | [RTD1315E_ISO_GPIO_48] = RTK_PIN_MUX(gpio_48, 0x14, GENMASK(31, 28), |
1040 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
1041 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "pll_test_loc1" ), |
1042 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "dbg_out0" )), |
1043 | |
1044 | [RTD1315E_ISO_GPIO_49] = RTK_PIN_MUX(gpio_49, 0x18, GENMASK(3, 0), |
1045 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
1046 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "pll_test_loc1" ), |
1047 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out0" )), |
1048 | [RTD1315E_ISO_GPIO_50] = RTK_PIN_MUX(gpio_50, 0x18, GENMASK(7, 4), |
1049 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
1050 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "spdif" ), |
1051 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "test_loop" ), |
1052 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "dbg_out1" )), |
1053 | [RTD1315E_ISO_USB_CC1] = RTK_PIN_MUX(usb_cc1, 0x18, GENMASK(11, 8), |
1054 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
1055 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "usb_cc1" ), |
1056 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "dbg_out0" )), |
1057 | [RTD1315E_ISO_IR_RX] = RTK_PIN_MUX(ir_rx, 0x18, GENMASK(15, 12), |
1058 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
1059 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "ir_rx" ), |
1060 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "standby_dbg" ), |
1061 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
1062 | [RTD1315E_ISO_UR0_RX] = RTK_PIN_MUX(ur0_rx, 0x18, GENMASK(19, 16), |
1063 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
1064 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "uart0" ), |
1065 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate" )), |
1066 | [RTD1315E_ISO_UR0_TX] = RTK_PIN_MUX(ur0_tx, 0x18, GENMASK(23, 20), |
1067 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
1068 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "uart0" ), |
1069 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
1070 | [RTD1315E_ISO_GPIO_57] = RTK_PIN_MUX(gpio_57, 0x18, GENMASK(27, 24), |
1071 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
1072 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "tdm_ai_loc0" ), |
1073 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "ai_loc0" ), |
1074 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "dmic_loc0" ), |
1075 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 24), "acpu_ejtag_loc2" ), |
1076 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 24), "vcpu_ejtag_loc2" ), |
1077 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 24), "aucpu_ejtag_loc2" ), |
1078 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 24), "vtc_i2si_loc0" ), |
1079 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 24), "vtc_tdm_loc0" ), |
1080 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 24), "vtc_dmic_loc0" ), |
1081 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 24), "scpu_ejtag_loc2" ), |
1082 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "dbg_out0" )), |
1083 | [RTD1315E_ISO_GPIO_58] = RTK_PIN_MUX(gpio_58, 0x18, GENMASK(31, 28), |
1084 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
1085 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "tdm_ai_loc0" ), |
1086 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "ai_loc0" ), |
1087 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "dmic_loc0" ), |
1088 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 28), "acpu_ejtag_loc2" ), |
1089 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 28), "vcpu_ejtag_loc2" ), |
1090 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 28), "aucpu_ejtag_loc2" ), |
1091 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 28), "vtc_i2si_loc0" ), |
1092 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 28), "vtc_tdm_loc0" ), |
1093 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 28), "vtc_dmic_loc0" ), |
1094 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 28), "scpu_ejtag_loc2" ), |
1095 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "dbg_out0" )), |
1096 | |
1097 | [RTD1315E_ISO_GPIO_59] = RTK_PIN_MUX(gpio_59, 0x1c, GENMASK(3, 0), |
1098 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
1099 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "tdm_ai_loc0" ), |
1100 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ai_loc0" ), |
1101 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "dmic_loc0" ), |
1102 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 0), "acpu_ejtag_loc2" ), |
1103 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 0), "vcpu_ejtag_loc2" ), |
1104 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 0), "aucpu_ejtag_loc2" ), |
1105 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 0), "vtc_i2si_loc0" ), |
1106 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 0), "vtc_tdm_loc0" ), |
1107 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 0), "vtc_dmic_loc0" ), |
1108 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 0), "scpu_ejtag_loc2" ), |
1109 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out1" )), |
1110 | [RTD1315E_ISO_GPIO_60] = RTK_PIN_MUX(gpio_60, 0x1c, GENMASK(7, 4), |
1111 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
1112 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "tdm_ai_loc0" ), |
1113 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "ai_loc0" ), |
1114 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "dmic_loc0" ), |
1115 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 4), "acpu_ejtag_loc2" ), |
1116 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 4), "vcpu_ejtag_loc2" ), |
1117 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 4), "aucpu_ejtag_loc2" ), |
1118 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 4), "vtc_i2si_loc0" ), |
1119 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 4), "vtc_tdm_loc0" ), |
1120 | RTK_PIN_FUNC(SHIFT_LEFT(0xd, 4), "vtc_dmic_loc0" ), |
1121 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 4), "scpu_ejtag_loc2" ), |
1122 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "dbg_out0" )), |
1123 | [RTD1315E_ISO_GPIO_61] = RTK_PIN_MUX(gpio_61, 0x1c, GENMASK(11, 8), |
1124 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
1125 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ai_loc0" ), |
1126 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "dmic_loc0" ), |
1127 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "acpu_ejtag_loc2" ), |
1128 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "vcpu_ejtag_loc2" ), |
1129 | RTK_PIN_FUNC(SHIFT_LEFT(0x9, 8), "aucpu_ejtag_loc2" ), |
1130 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 8), "vtc_i2si_loc0" ), |
1131 | RTK_PIN_FUNC(SHIFT_LEFT(0xe, 8), "scpu_ejtag_loc2" ), |
1132 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "dbg_out1" )), |
1133 | [RTD1315E_ISO_GPIO_62] = RTK_PIN_MUX(gpio_62, 0x1c, GENMASK(15, 12), |
1134 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
1135 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "ai_loc0" ), |
1136 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "dmic_loc0" ), |
1137 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "dbg_out1" )), |
1138 | [RTD1315E_ISO_GPIO_66] = RTK_PIN_MUX(gpio_66, 0x1c, GENMASK(19, 16), |
1139 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
1140 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 16), "ao" ), |
1141 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate" )), |
1142 | [RTD1315E_ISO_GPIO_67] = RTK_PIN_MUX(gpio_67, 0x1c, GENMASK(23, 20), |
1143 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
1144 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 20), "vtc_i2so" ), |
1145 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 20), "ao" ), |
1146 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
1147 | [RTD1315E_ISO_GPIO_68] = RTK_PIN_MUX(gpio_68, 0x1c, GENMASK(27, 24), |
1148 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
1149 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "aucpu_ejtag_loc0" ), |
1150 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "gpu_ejtag" ), |
1151 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 24), "scpu_ejtag_loc0" ), |
1152 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 24), "acpu_ejtag_loc0" ), |
1153 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 24), "vcpu_ejtag_loc0" ), |
1154 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 24), "vtc_i2so" ), |
1155 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 24), "ao" ), |
1156 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate" )), |
1157 | [RTD1315E_ISO_GPIO_69] = RTK_PIN_MUX(gpio_69, 0x1c, GENMASK(31, 28), |
1158 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio" ), |
1159 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "aucpu_ejtag_loc0" ), |
1160 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 28), "gpu_ejtag" ), |
1161 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 28), "scpu_ejtag_loc0" ), |
1162 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 28), "acpu_ejtag_loc0" ), |
1163 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 28), "vcpu_ejtag_loc0" ), |
1164 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 28), "vtc_i2so" ), |
1165 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 28), "ao" ), |
1166 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate" )), |
1167 | |
1168 | [RTD1315E_ISO_GPIO_70] = RTK_PIN_MUX(gpio_70, 0x20, GENMASK(3, 0), |
1169 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio" ), |
1170 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "aucpu_ejtag_loc0" ), |
1171 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 0), "gpu_ejtag" ), |
1172 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 0), "scpu_ejtag_loc0" ), |
1173 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 0), "acpu_ejtag_loc0" ), |
1174 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 0), "vcpu_ejtag_loc0" ), |
1175 | RTK_PIN_FUNC(SHIFT_LEFT(0xb, 0), "vtc_i2so" ), |
1176 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 0), "ao" ), |
1177 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate" )), |
1178 | [RTD1315E_ISO_GPIO_71] = RTK_PIN_MUX(gpio_71, 0x20, GENMASK(7, 4), |
1179 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio" ), |
1180 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "aucpu_ejtag_loc0" ), |
1181 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 4), "gpu_ejtag" ), |
1182 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "scpu_ejtag_loc0" ), |
1183 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 4), "acpu_ejtag_loc0" ), |
1184 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 4), "vcpu_ejtag_loc0" ), |
1185 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 4), "ao" ), |
1186 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate" )), |
1187 | [RTD1315E_ISO_GPIO_72] = RTK_PIN_MUX(gpio_72, 0x20, GENMASK(11, 8), |
1188 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio" ), |
1189 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "aucpu_ejtag_loc0" ), |
1190 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "gpu_ejtag" ), |
1191 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "scpu_ejtag_loc0" ), |
1192 | RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "acpu_ejtag_loc0" ), |
1193 | RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "vcpu_ejtag_loc0" ), |
1194 | RTK_PIN_FUNC(SHIFT_LEFT(0xc, 8), "ao" ), |
1195 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate" )), |
1196 | [RTD1315E_ISO_GPIO_78] = RTK_PIN_MUX(gpio_78, 0x20, GENMASK(15, 12), |
1197 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio" ), |
1198 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "nf" ), |
1199 | RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "pmic_pwrup" ), |
1200 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 12), "spi" ), |
1201 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate" )), |
1202 | [RTD1315E_ISO_GPIO_79] = RTK_PIN_MUX(gpio_79, 0x20, GENMASK(19, 16), |
1203 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio" ), |
1204 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "nf" ), |
1205 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 16), "spi" ), |
1206 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate" )), |
1207 | [RTD1315E_ISO_GPIO_80] = RTK_PIN_MUX(gpio_80, 0x20, GENMASK(23, 20), |
1208 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio" ), |
1209 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "nf" ), |
1210 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 20), "spi" ), |
1211 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate" )), |
1212 | [RTD1315E_ISO_GPIO_81] = RTK_PIN_MUX(gpio_81, 0x20, GENMASK(27, 24), |
1213 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio" ), |
1214 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "nf" ), |
1215 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 24), "spi" ), |
1216 | RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate" )), |
1217 | |
1218 | [RTD1315E_ISO_UR2_LOC] = RTK_PIN_MUX(ur2_loc, 0x120, GENMASK(1, 0), |
1219 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "uart2_disable" ), |
1220 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart2_loc0" ), |
1221 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "uart2_loc1" )), |
1222 | [RTD1315E_ISO_GSPI_LOC] = RTK_PIN_MUX(gspi_loc, 0x120, GENMASK(3, 2), |
1223 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 2), "gspi_disable" ), |
1224 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 2), "gspi_loc0" ), |
1225 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 2), "gspi_loc1" )), |
1226 | [RTD1315E_ISO_HI_WIDTH] = RTK_PIN_MUX(hi_width, 0x120, GENMASK(9, 8), |
1227 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "hi_width_disable" ), |
1228 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "hi_width_1bit" )), |
1229 | [RTD1315E_ISO_SF_EN] = RTK_PIN_MUX(sf_en, 0x120, GENMASK(11, 11), |
1230 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 11), "sf_disable" ), |
1231 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 11), "sf_enable" )), |
1232 | [RTD1315E_ISO_ARM_TRACE_DBG_EN] = RTK_PIN_MUX(arm_trace_dbg_en, 0x120, GENMASK(12, 12), |
1233 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "arm_trace_debug_disable" ), |
1234 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "arm_trace_debug_enable" )), |
1235 | [RTD1315E_ISO_EJTAG_AUCPU_LOC] = RTK_PIN_MUX(ejtag_aucpu_loc, 0x120, GENMASK(16, 14), |
1236 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 14), "aucpu_ejtag_disable" ), |
1237 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 14), "aucpu_ejtag_loc0" ), |
1238 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 14), "aucpu_ejtag_loc1" ), |
1239 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 14), "aucpu_ejtag_loc2" )), |
1240 | [RTD1315E_ISO_EJTAG_ACPU_LOC] = RTK_PIN_MUX(ejtag_acpu_loc, 0x120, GENMASK(19, 17), |
1241 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 17), "acpu_ejtag_disable" ), |
1242 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 17), "acpu_ejtag_loc0" ), |
1243 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 17), "acpu_ejtag_loc1" ), |
1244 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 17), "acpu_ejtag_loc2" )), |
1245 | [RTD1315E_ISO_EJTAG_VCPU_LOC] = RTK_PIN_MUX(ejtag_vcpu_loc, 0x120, GENMASK(22, 20), |
1246 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "vcpu_ejtag_disable" ), |
1247 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "vcpu_ejtag_loc0" ), |
1248 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "vcpu_ejtag_loc1" ), |
1249 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "vcpu_ejtag_loc2" )), |
1250 | [RTD1315E_ISO_EJTAG_SCPU_LOC] = RTK_PIN_MUX(ejtag_scpu_loc, 0x120, GENMASK(25, 23), |
1251 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 23), "scpu_ejtag_disable" ), |
1252 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 23), "scpu_ejtag_loc0" ), |
1253 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 23), "scpu_ejtag_loc1" ), |
1254 | RTK_PIN_FUNC(SHIFT_LEFT(0x4, 23), "scpu_ejtag_loc2" )), |
1255 | [RTD1315E_ISO_DMIC_LOC] = RTK_PIN_MUX(dmic_loc, 0x120, GENMASK(27, 26), |
1256 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 26), "dmic_loc0" ), |
1257 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 26), "dmic_loc1" )), |
1258 | |
1259 | [RTD1315E_ISO_VTC_DMIC_LOC] = RTK_PIN_MUX(vtc_dmic_loc, 0x128, GENMASK(1, 0), |
1260 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "vtc_dmic_loc_disable" ), |
1261 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "vtc_dmic_loc0" ), |
1262 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "vtc_dmic_loc1" )), |
1263 | [RTD1315E_ISO_VTC_TDM_LOC] = RTK_PIN_MUX(vtc_tdm_loc, 0x128, GENMASK(3, 2), |
1264 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 2), "vtc_tdm_disable" ), |
1265 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 2), "vtc_tdm_loc0" ), |
1266 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 2), "vtc_tdm_loc1" )), |
1267 | [RTD1315E_ISO_VTC_I2SI_LOC] = RTK_PIN_MUX(vtc_i2si_loc, 0x128, GENMASK(5, 4), |
1268 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "vtc_i2si_disable" ), |
1269 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "vtc_i2si_loc0" ), |
1270 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "vtc_i2si_loc1" )), |
1271 | [RTD1315E_ISO_TDM_AI_LOC] = RTK_PIN_MUX(tdm_ai_loc, 0x128, GENMASK(7, 6), |
1272 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 6), "tdm_ai_disable" ), |
1273 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 6), "tdm_ai_loc0" ), |
1274 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 6), "tdm_ai_loc1" )), |
1275 | [RTD1315E_ISO_AI_LOC] = RTK_PIN_MUX(ai_loc, 0x128, GENMASK(9, 8), |
1276 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "ai_disable" ), |
1277 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "ai_loc0" ), |
1278 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ai_loc1" )), |
1279 | [RTD1315E_ISO_SPDIF_LOC] = RTK_PIN_MUX(spdif_loc, 0x128, GENMASK(11, 10), |
1280 | RTK_PIN_FUNC(SHIFT_LEFT(0x0, 10), "spdif_disable" ), |
1281 | RTK_PIN_FUNC(SHIFT_LEFT(0x1, 10), "spdif_optical_loc0" ), |
1282 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 10), "spdif_optical_loc1" )), |
1283 | |
1284 | [RTD1315E_ISO_HIF_EN_LOC] = RTK_PIN_MUX(hif_en_loc, 0x12c, GENMASK(2, 0), |
1285 | RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "hif_disable" ), |
1286 | RTK_PIN_FUNC(SHIFT_LEFT(0x5, 0), "hif_enable" )), |
1287 | }; |
1288 | |
1289 | static const struct rtd_pin_config_desc rtd1315e_iso_configs[ARRAY_SIZE(rtd1315e_iso_pins)] = { |
1290 | [RTD1315E_ISO_BOOT_SEL] = RTK_PIN_CONFIG(boot_sel, 0x24, 0, 0, 1, NA, 2, 3, NA), |
1291 | [RTD1315E_ISO_EMMC_CLK] = RTK_PIN_CONFIG(emmc_clk, 0x24, 4, 0, 1, NA, 2, 12, NA), |
1292 | [RTD1315E_ISO_EMMC_CMD] = RTK_PIN_CONFIG(emmc_cmd, 0x24, 17, 0, 1, NA, 2, 13, NA), |
1293 | [RTD1315E_ISO_EMMC_DATA_0] = RTK_PIN_CONFIG(emmc_data_0, 0x28, 0, 0, 1, NA, 2, 12, NA), |
1294 | [RTD1315E_ISO_EMMC_DATA_1] = RTK_PIN_CONFIG(emmc_data_1, 0x28, 13, 0, 1, NA, 2, 12, NA), |
1295 | [RTD1315E_ISO_EMMC_DATA_2] = RTK_PIN_CONFIG(emmc_data_2, 0x2c, 0, 0, 1, NA, 2, 12, NA), |
1296 | [RTD1315E_ISO_EMMC_DATA_3] = RTK_PIN_CONFIG(emmc_data_3, 0x2c, 13, 0, 1, NA, 2, 12, NA), |
1297 | [RTD1315E_ISO_EMMC_DATA_4] = RTK_PIN_CONFIG(emmc_data_4, 0x30, 0, 0, 1, NA, 2, 12, NA), |
1298 | [RTD1315E_ISO_EMMC_DATA_5] = RTK_PIN_CONFIG(emmc_data_5, 0x30, 13, 0, 1, NA, 2, 12, NA), |
1299 | [RTD1315E_ISO_EMMC_DATA_6] = RTK_PIN_CONFIG(emmc_data_6, 0x34, 0, 0, 1, NA, 2, 12, NA), |
1300 | [RTD1315E_ISO_EMMC_DATA_7] = RTK_PIN_CONFIG(emmc_data_7, 0x34, 13, 0, 1, NA, 2, 12, NA), |
1301 | [RTD1315E_ISO_EMMC_DD_SB] = RTK_PIN_CONFIG(emmc_dd_sb, 0x38, 0, 0, 1, NA, 2, 12, NA), |
1302 | [RTD1315E_ISO_EMMC_RST_N] = RTK_PIN_CONFIG(emmc_rst_n, 0x38, 13, 0, 1, NA, 2, 12, NA), |
1303 | [RTD1315E_ISO_GPIO_1] = RTK_PIN_CONFIG(gpio_1, 0x3c, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1304 | [RTD1315E_ISO_GPIO_6] = RTK_PIN_CONFIG(gpio_6, 0x3c, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1305 | [RTD1315E_ISO_GPIO_7] = RTK_PIN_CONFIG(gpio_7, 0x3c, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1306 | [RTD1315E_ISO_GPIO_8] = RTK_PIN_CONFIG(gpio_8, 0x3c, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1307 | [RTD1315E_ISO_GPIO_9] = RTK_PIN_CONFIG(gpio_9, 0x3c, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1308 | [RTD1315E_ISO_GPIO_10] = RTK_PIN_CONFIG(gpio_10, 0x3c, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1309 | [RTD1315E_ISO_GPIO_11] = RTK_PIN_CONFIG(gpio_11, 0x40, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1310 | [RTD1315E_ISO_GPIO_12] = RTK_PIN_CONFIG(gpio_12, 0x40, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1311 | [RTD1315E_ISO_GPIO_13] = RTK_PIN_CONFIG(gpio_13, 0x40, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1312 | [RTD1315E_ISO_GPIO_14] = RTK_PIN_CONFIG(gpio_14, 0x40, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1313 | [RTD1315E_ISO_GPIO_15] = RTK_PIN_CONFIG(gpio_15, 0x40, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1314 | [RTD1315E_ISO_GPIO_16] = RTK_PIN_CONFIG(gpio_16, 0x40, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1315 | [RTD1315E_ISO_GPIO_17] = RTK_PIN_CONFIG(gpio_17, 0x44, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1316 | [RTD1315E_ISO_GPIO_18] = RTK_PIN_CONFIG(gpio_18, 0x44, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1317 | [RTD1315E_ISO_GPIO_19] = RTK_PIN_CONFIG(gpio_19, 0x44, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1318 | [RTD1315E_ISO_GPIO_20] = RTK_PIN_CONFIG(gpio_20, 0x44, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1319 | [RTD1315E_ISO_GPIO_25] = RTK_PIN_CONFIG(gpio_25, 0x44, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1320 | [RTD1315E_ISO_GPIO_26] = RTK_PIN_CONFIG(gpio_26, 0x44, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1321 | [RTD1315E_ISO_GPIO_27] = RTK_PIN_CONFIG(gpio_27, 0x48, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1322 | [RTD1315E_ISO_GPIO_28] = RTK_PIN_CONFIG(gpio_28, 0x48, 6, 1, 2, 0, 3, 4, PADDRI_4_8), |
1323 | [RTD1315E_ISO_GPIO_29] = RTK_PIN_CONFIG(gpio_29, 0x48, 12, 1, 2, 0, 3, 4, PADDRI_4_8), |
1324 | [RTD1315E_ISO_GPIO_30] = RTK_PIN_CONFIG(gpio_30, 0x48, 17, 1, 2, 0, 3, 4, PADDRI_4_8), |
1325 | [RTD1315E_ISO_GPIO_31] = RTK_PIN_CONFIG(gpio_31, 0x4c, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1326 | [RTD1315E_ISO_GPIO_32] = RTK_PIN_CONFIG(gpio_32, 0x4c, 5, 0, 1, NA, 2, 12, NA), |
1327 | [RTD1315E_ISO_GPIO_33] = RTK_PIN_CONFIG(gpio_33, 0x4c, 18, 0, 1, NA, 2, 12, NA), |
1328 | [RTD1315E_ISO_GPIO_34] = RTK_PIN_CONFIG(gpio_34, 0x50, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1329 | [RTD1315E_ISO_GPIO_35] = RTK_PIN_CONFIG(gpio_35, 0x50, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1330 | [RTD1315E_ISO_GPIO_46] = RTK_PIN_CONFIG(gpio_46, 0x50, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1331 | [RTD1315E_ISO_GPIO_47] = RTK_PIN_CONFIG(gpio_47, 0x50, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1332 | [RTD1315E_ISO_GPIO_48] = RTK_PIN_CONFIG(gpio_48, 0x50, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1333 | [RTD1315E_ISO_GPIO_49] = RTK_PIN_CONFIG(gpio_49, 0x50, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1334 | [RTD1315E_ISO_GPIO_50] = RTK_PIN_CONFIG(gpio_50, 0x54, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1335 | [RTD1315E_ISO_GPIO_57] = RTK_PIN_CONFIG(gpio_57, 0x54, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1336 | [RTD1315E_ISO_GPIO_58] = RTK_PIN_CONFIG(gpio_58, 0x54, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1337 | [RTD1315E_ISO_GPIO_59] = RTK_PIN_CONFIG(gpio_59, 0x54, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1338 | [RTD1315E_ISO_GPIO_60] = RTK_PIN_CONFIG(gpio_60, 0x54, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1339 | [RTD1315E_ISO_GPIO_61] = RTK_PIN_CONFIG(gpio_61, 0x54, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1340 | [RTD1315E_ISO_GPIO_62] = RTK_PIN_CONFIG(gpio_62, 0x58, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1341 | [RTD1315E_ISO_GPIO_66] = RTK_PIN_CONFIG(gpio_66, 0x58, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1342 | [RTD1315E_ISO_GPIO_67] = RTK_PIN_CONFIG(gpio_67, 0x58, 10, 1, 2, 0, 3, 4, PADDRI_4_8), |
1343 | [RTD1315E_ISO_GPIO_68] = RTK_PIN_CONFIG(gpio_68, 0x58, 15, 1, 2, 0, 3, 4, PADDRI_4_8), |
1344 | [RTD1315E_ISO_GPIO_69] = RTK_PIN_CONFIG(gpio_69, 0x58, 20, 1, 2, 0, 3, 4, PADDRI_4_8), |
1345 | [RTD1315E_ISO_GPIO_70] = RTK_PIN_CONFIG(gpio_70, 0x58, 25, 1, 2, 0, 3, 4, PADDRI_4_8), |
1346 | [RTD1315E_ISO_GPIO_71] = RTK_PIN_CONFIG(gpio_71, 0x5c, 0, 1, 2, 0, 3, 4, PADDRI_4_8), |
1347 | [RTD1315E_ISO_GPIO_72] = RTK_PIN_CONFIG(gpio_72, 0x5c, 5, 1, 2, 0, 3, 4, PADDRI_4_8), |
1348 | [RTD1315E_ISO_GPIO_78] = RTK_PIN_CONFIG(gpio_78, 0x5c, 10, 0, 1, NA, 2, 12, NA), |
1349 | [RTD1315E_ISO_GPIO_79] = RTK_PIN_CONFIG(gpio_79, 0x60, 0, 0, 1, NA, 2, 12, NA), |
1350 | [RTD1315E_ISO_GPIO_80] = RTK_PIN_CONFIG(gpio_80, 0x60, 13, 0, 1, NA, 2, 12, NA), |
1351 | [RTD1315E_ISO_GPIO_81] = RTK_PIN_CONFIG(gpio_81, 0x64, 0, 0, 1, NA, 2, 12, NA), |
1352 | [RTD1315E_ISO_HIF_CLK] = RTK_PIN_CONFIG(hif_clk, 0x64, 13, 0, 1, NA, 2, 12, NA), |
1353 | [RTD1315E_ISO_HIF_DATA] = RTK_PIN_CONFIG(hif_data, 0x68, 0, 0, 1, NA, 2, 12, NA), |
1354 | [RTD1315E_ISO_HIF_EN] = RTK_PIN_CONFIG(hif_en, 0x68, 13, 0, 1, NA, 2, 12, NA), |
1355 | [RTD1315E_ISO_HIF_RDY] = RTK_PIN_CONFIG(hif_rdy, 0x68, 26, 0, 1, NA, 2, 12, NA), |
1356 | [RTD1315E_ISO_IR_RX] = RTK_PIN_CONFIG(ir_rx, 0x6c, 7, 1, 2, 0, 3, 4, PADDRI_4_8), |
1357 | [RTD1315E_ISO_RESET_N] = RTK_PIN_CONFIG(reset_n, 0x6c, 12, 0, 1, NA, 2, 3, PADDRI_4_8), |
1358 | [RTD1315E_ISO_SCAN_SWITCH] = RTK_PIN_CONFIG(scan_switch, 0x6c, 16, NA, NA, 0, 1, 2, PADDRI_4_8), |
1359 | [RTD1315E_ISO_TESTMODE] = RTK_PIN_CONFIG(testmode, 0x6c, 19, 0, 1, NA, 2, 3, PADDRI_4_8), |
1360 | [RTD1315E_ISO_UR0_RX] = RTK_PIN_CONFIG(ur0_rx, 0x6c, 23, 1, 2, 0, 3, 4, PADDRI_4_8), |
1361 | [RTD1315E_ISO_UR0_TX] = RTK_PIN_CONFIG(ur0_tx, 0x6c, 28, 1, 2, 0, 3, 4, PADDRI_4_8), |
1362 | [RTD1315E_ISO_USB_CC1] = RTK_PIN_CONFIG(usb_cc1, 0x70, 1, NA, NA, 0, 1, 2, PADDRI_4_8), |
1363 | [RTD1315E_ISO_USB_CC2] = RTK_PIN_CONFIG(usb_cc2, 0x70, 4, NA, NA, 0, 1, 2, PADDRI_4_8), |
1364 | [RTD1315E_ISO_WD_RSET] = RTK_PIN_CONFIG(wd_rset, 0x70, 7, 1, 2, 0, 3, 4, PADDRI_4_8), |
1365 | }; |
1366 | |
1367 | static const struct rtd_pin_sconfig_desc rtd1315e_iso_sconfigs[] = { |
1368 | RTK_PIN_SCONFIG(emmc_clk, 0x24, 7, 3, 10, 3, 13, 3), |
1369 | RTK_PIN_SCONFIG(emmc_cmd, 0x24, 20, 3, 23, 3, 26, 3), |
1370 | RTK_PIN_SCONFIG(emmc_data_0, 0x28, 3, 3, 6, 3, 9, 3), |
1371 | RTK_PIN_SCONFIG(emmc_data_1, 0x28, 16, 3, 19, 3, 22, 3), |
1372 | RTK_PIN_SCONFIG(emmc_data_2, 0x2c, 3, 3, 6, 3, 9, 3), |
1373 | RTK_PIN_SCONFIG(emmc_data_3, 0x2c, 16, 3, 19, 3, 22, 3), |
1374 | RTK_PIN_SCONFIG(emmc_data_4, 0x30, 3, 3, 6, 3, 9, 3), |
1375 | RTK_PIN_SCONFIG(emmc_data_5, 0x30, 16, 3, 19, 3, 22, 3), |
1376 | RTK_PIN_SCONFIG(emmc_data_6, 0x34, 3, 3, 6, 3, 9, 3), |
1377 | RTK_PIN_SCONFIG(emmc_data_7, 0x34, 16, 3, 19, 3, 22, 3), |
1378 | RTK_PIN_SCONFIG(emmc_dd_sb, 0x38, 3, 3, 6, 3, 9, 3), |
1379 | RTK_PIN_SCONFIG(emmc_rst_n, 0x38, 16, 3, 19, 3, 22, 3), |
1380 | RTK_PIN_SCONFIG(gpio_32, 0x4c, 8, 3, 11, 3, 14, 3), |
1381 | RTK_PIN_SCONFIG(gpio_33, 0x4c, 21, 3, 24, 3, 27, 3), |
1382 | RTK_PIN_SCONFIG(gpio_78, 0x5c, 13, 3, 16, 3, 19, 3), |
1383 | RTK_PIN_SCONFIG(gpio_79, 0x60, 3, 3, 6, 3, 9, 3), |
1384 | RTK_PIN_SCONFIG(gpio_80, 0x60, 16, 3, 19, 3, 22, 3), |
1385 | RTK_PIN_SCONFIG(gpio_81, 0x64, 3, 3, 6, 3, 9, 3), |
1386 | RTK_PIN_SCONFIG(hif_clk, 0x64, 16, 3, 19, 3, 22, 3), |
1387 | RTK_PIN_SCONFIG(hif_data, 0x68, 3, 3, 6, 3, 9, 3), |
1388 | RTK_PIN_SCONFIG(hif_en, 0x68, 16, 3, 19, 3, 22, 3), |
1389 | RTK_PIN_SCONFIG(hif_rdy, 0x68, 29, 3, 32, 3, 35, 3), |
1390 | |
1391 | }; |
1392 | |
1393 | static const struct rtd_pinctrl_desc rtd1315e_iso_pinctrl_desc = { |
1394 | .pins = rtd1315e_iso_pins, |
1395 | .num_pins = ARRAY_SIZE(rtd1315e_iso_pins), |
1396 | .groups = rtd1315e_pin_groups, |
1397 | .num_groups = ARRAY_SIZE(rtd1315e_pin_groups), |
1398 | .functions = rtd1315e_pin_functions, |
1399 | .num_functions = ARRAY_SIZE(rtd1315e_pin_functions), |
1400 | .muxes = rtd1315e_iso_muxes, |
1401 | .num_muxes = ARRAY_SIZE(rtd1315e_iso_muxes), |
1402 | .configs = rtd1315e_iso_configs, |
1403 | .num_configs = ARRAY_SIZE(rtd1315e_iso_configs), |
1404 | .sconfigs = rtd1315e_iso_sconfigs, |
1405 | .num_sconfigs = ARRAY_SIZE(rtd1315e_iso_sconfigs), |
1406 | }; |
1407 | |
1408 | static int rtd1315e_pinctrl_probe(struct platform_device *pdev) |
1409 | { |
1410 | return rtd_pinctrl_probe(pdev, desc: &rtd1315e_iso_pinctrl_desc); |
1411 | } |
1412 | |
1413 | static const struct of_device_id rtd1315e_pinctrl_of_match[] = { |
1414 | { .compatible = "realtek,rtd1315e-pinctrl" , }, |
1415 | {}, |
1416 | }; |
1417 | |
1418 | static struct platform_driver rtd1315e_pinctrl_driver = { |
1419 | .driver = { |
1420 | .name = "rtd1315e-pinctrl" , |
1421 | .of_match_table = rtd1315e_pinctrl_of_match, |
1422 | }, |
1423 | .probe = rtd1315e_pinctrl_probe, |
1424 | }; |
1425 | |
1426 | static int __init rtd1315e_pinctrl_init(void) |
1427 | { |
1428 | return platform_driver_register(&rtd1315e_pinctrl_driver); |
1429 | } |
1430 | arch_initcall(rtd1315e_pinctrl_init); |
1431 | |
1432 | static void __exit rtd1315e_pinctrl_exit(void) |
1433 | { |
1434 | platform_driver_unregister(&rtd1315e_pinctrl_driver); |
1435 | } |
1436 | module_exit(rtd1315e_pinctrl_exit); |
1437 | |
1438 | MODULE_LICENSE("GPL" ); |
1439 | MODULE_AUTHOR("Realtek Semiconductor Corporation" ); |
1440 | MODULE_DESCRIPTION("Realtek DHC SoC RTD1315E pinctrl driver" ); |
1441 | |