1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Common library for ADIS16XXX devices
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8
9#ifndef __IIO_ADIS_H__
10#define __IIO_ADIS_H__
11
12#include <linux/spi/spi.h>
13#include <linux/interrupt.h>
14#include <linux/iio/iio.h>
15#include <linux/iio/types.h>
16
17#define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
18#define ADIS_READ_REG(reg) ((reg) & 0x7f)
19
20#define ADIS_PAGE_SIZE 0x80
21#define ADIS_REG_PAGE_ID 0x00
22
23struct adis;
24
25/**
26 * struct adis_timeouts - ADIS chip variant timeouts
27 * @reset_ms - Wait time after rst pin goes inactive
28 * @sw_reset_ms - Wait time after sw reset command
29 * @self_test_ms - Wait time after self test command
30 */
31struct adis_timeout {
32 u16 reset_ms;
33 u16 sw_reset_ms;
34 u16 self_test_ms;
35};
36
37/**
38 * struct adis_data - ADIS chip variant specific data
39 * @read_delay: SPI delay for read operations in us
40 * @write_delay: SPI delay for write operations in us
41 * @cs_change_delay: SPI delay between CS changes in us
42 * @glob_cmd_reg: Register address of the GLOB_CMD register
43 * @msc_ctrl_reg: Register address of the MSC_CTRL register
44 * @diag_stat_reg: Register address of the DIAG_STAT register
45 * @prod_id_reg: Register address of the PROD_ID register
46 * @prod_id: Product ID code that should be expected when reading @prod_id_reg
47 * @self_test_mask: Bitmask of supported self-test operations
48 * @self_test_reg: Register address to request self test command
49 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
50 * @status_error_msgs: Array of error messages
51 * @status_error_mask: Bitmask of errors supported by the device
52 * @timeouts: Chip specific delays
53 * @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable
54 * @unmasked_drdy: True for devices that cannot mask/unmask the data ready pin
55 * @has_paging: True if ADIS device has paged registers
56 * @burst_reg_cmd: Register command that triggers burst
57 * @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined,
58 * this should be the minimum size supported by the device.
59 * @burst_max_len: Holds the maximum burst size when the device supports
60 * more than one burst mode with different sizes
61 * @burst_max_speed_hz: Maximum spi speed that can be used in burst mode
62 */
63struct adis_data {
64 unsigned int read_delay;
65 unsigned int write_delay;
66 unsigned int cs_change_delay;
67
68 unsigned int glob_cmd_reg;
69 unsigned int msc_ctrl_reg;
70 unsigned int diag_stat_reg;
71 unsigned int prod_id_reg;
72
73 unsigned int prod_id;
74
75 unsigned int self_test_mask;
76 unsigned int self_test_reg;
77 bool self_test_no_autoclear;
78 const struct adis_timeout *timeouts;
79
80 const char * const *status_error_msgs;
81 unsigned int status_error_mask;
82
83 int (*enable_irq)(struct adis *adis, bool enable);
84 bool unmasked_drdy;
85
86 bool has_paging;
87
88 unsigned int burst_reg_cmd;
89 unsigned int burst_len;
90 unsigned int burst_max_len;
91 unsigned int burst_max_speed_hz;
92};
93
94/**
95 * struct adis - ADIS device instance data
96 * @spi: Reference to SPI device which owns this ADIS IIO device
97 * @trig: IIO trigger object data
98 * @data: ADIS chip variant specific data
99 * @burst: ADIS burst transfer information
100 * @burst_extra_len: Burst extra length. Should only be used by devices that can
101 * dynamically change their burst mode length.
102 * @state_lock: Lock used by the device to protect state
103 * @msg: SPI message object
104 * @xfer: SPI transfer objects to be used for a @msg
105 * @current_page: Some ADIS devices have registers, this selects current page
106 * @irq_flag: IRQ handling flags as passed to request_irq()
107 * @buffer: Data buffer for information read from the device
108 * @tx: DMA safe TX buffer for SPI transfers
109 * @rx: DMA safe RX buffer for SPI transfers
110 */
111struct adis {
112 struct spi_device *spi;
113 struct iio_trigger *trig;
114
115 const struct adis_data *data;
116 unsigned int burst_extra_len;
117 /**
118 * The state_lock is meant to be used during operations that require
119 * a sequence of SPI R/W in order to protect the SPI transfer
120 * information (fields 'xfer', 'msg' & 'current_page') between
121 * potential concurrent accesses.
122 * This lock is used by all "adis_{functions}" that have to read/write
123 * registers. These functions also have unlocked variants
124 * (see "__adis_{functions}"), which don't hold this lock.
125 * This allows users of the ADIS library to group SPI R/W into
126 * the drivers, but they also must manage this lock themselves.
127 */
128 struct mutex state_lock;
129 struct spi_message msg;
130 struct spi_transfer *xfer;
131 unsigned int current_page;
132 unsigned long irq_flag;
133 void *buffer;
134
135 u8 tx[10] __aligned(IIO_DMA_MINALIGN);
136 u8 rx[4];
137};
138
139int adis_init(struct adis *adis, struct iio_dev *indio_dev,
140 struct spi_device *spi, const struct adis_data *data);
141int __adis_reset(struct adis *adis);
142
143/**
144 * adis_reset() - Reset the device
145 * @adis: The adis device
146 *
147 * Returns 0 on success, a negative error code otherwise
148 */
149static inline int adis_reset(struct adis *adis)
150{
151 int ret;
152
153 mutex_lock(&adis->state_lock);
154 ret = __adis_reset(adis);
155 mutex_unlock(lock: &adis->state_lock);
156
157 return ret;
158}
159
160int __adis_write_reg(struct adis *adis, unsigned int reg,
161 unsigned int val, unsigned int size);
162int __adis_read_reg(struct adis *adis, unsigned int reg,
163 unsigned int *val, unsigned int size);
164
165/**
166 * __adis_write_reg_8() - Write single byte to a register (unlocked)
167 * @adis: The adis device
168 * @reg: The address of the register to be written
169 * @value: The value to write
170 */
171static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg,
172 u8 val)
173{
174 return __adis_write_reg(adis, reg, val, size: 1);
175}
176
177/**
178 * __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked)
179 * @adis: The adis device
180 * @reg: The address of the lower of the two registers
181 * @value: Value to be written
182 */
183static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg,
184 u16 val)
185{
186 return __adis_write_reg(adis, reg, val, size: 2);
187}
188
189/**
190 * __adis_write_reg_32() - write 4 bytes to four registers (unlocked)
191 * @adis: The adis device
192 * @reg: The address of the lower of the four register
193 * @value: Value to be written
194 */
195static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg,
196 u32 val)
197{
198 return __adis_write_reg(adis, reg, val, size: 4);
199}
200
201/**
202 * __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked)
203 * @adis: The adis device
204 * @reg: The address of the lower of the two registers
205 * @val: The value read back from the device
206 */
207static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg,
208 u16 *val)
209{
210 unsigned int tmp;
211 int ret;
212
213 ret = __adis_read_reg(adis, reg, val: &tmp, size: 2);
214 if (ret == 0)
215 *val = tmp;
216
217 return ret;
218}
219
220/**
221 * __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked)
222 * @adis: The adis device
223 * @reg: The address of the lower of the two registers
224 * @val: The value read back from the device
225 */
226static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg,
227 u32 *val)
228{
229 unsigned int tmp;
230 int ret;
231
232 ret = __adis_read_reg(adis, reg, val: &tmp, size: 4);
233 if (ret == 0)
234 *val = tmp;
235
236 return ret;
237}
238
239/**
240 * adis_write_reg() - write N bytes to register
241 * @adis: The adis device
242 * @reg: The address of the lower of the two registers
243 * @value: The value to write to device (up to 4 bytes)
244 * @size: The size of the @value (in bytes)
245 */
246static inline int adis_write_reg(struct adis *adis, unsigned int reg,
247 unsigned int val, unsigned int size)
248{
249 int ret;
250
251 mutex_lock(&adis->state_lock);
252 ret = __adis_write_reg(adis, reg, val, size);
253 mutex_unlock(lock: &adis->state_lock);
254
255 return ret;
256}
257
258/**
259 * adis_read_reg() - read N bytes from register
260 * @adis: The adis device
261 * @reg: The address of the lower of the two registers
262 * @val: The value read back from the device
263 * @size: The size of the @val buffer
264 */
265static int adis_read_reg(struct adis *adis, unsigned int reg,
266 unsigned int *val, unsigned int size)
267{
268 int ret;
269
270 mutex_lock(&adis->state_lock);
271 ret = __adis_read_reg(adis, reg, val, size);
272 mutex_unlock(lock: &adis->state_lock);
273
274 return ret;
275}
276
277/**
278 * adis_write_reg_8() - Write single byte to a register
279 * @adis: The adis device
280 * @reg: The address of the register to be written
281 * @value: The value to write
282 */
283static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
284 u8 val)
285{
286 return adis_write_reg(adis, reg, val, size: 1);
287}
288
289/**
290 * adis_write_reg_16() - Write 2 bytes to a pair of registers
291 * @adis: The adis device
292 * @reg: The address of the lower of the two registers
293 * @value: Value to be written
294 */
295static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
296 u16 val)
297{
298 return adis_write_reg(adis, reg, val, size: 2);
299}
300
301/**
302 * adis_write_reg_32() - write 4 bytes to four registers
303 * @adis: The adis device
304 * @reg: The address of the lower of the four register
305 * @value: Value to be written
306 */
307static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
308 u32 val)
309{
310 return adis_write_reg(adis, reg, val, size: 4);
311}
312
313/**
314 * adis_read_reg_16() - read 2 bytes from a 16-bit register
315 * @adis: The adis device
316 * @reg: The address of the lower of the two registers
317 * @val: The value read back from the device
318 */
319static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
320 u16 *val)
321{
322 unsigned int tmp;
323 int ret;
324
325 ret = adis_read_reg(adis, reg, val: &tmp, size: 2);
326 if (ret == 0)
327 *val = tmp;
328
329 return ret;
330}
331
332/**
333 * adis_read_reg_32() - read 4 bytes from a 32-bit register
334 * @adis: The adis device
335 * @reg: The address of the lower of the two registers
336 * @val: The value read back from the device
337 */
338static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
339 u32 *val)
340{
341 unsigned int tmp;
342 int ret;
343
344 ret = adis_read_reg(adis, reg, val: &tmp, size: 4);
345 if (ret == 0)
346 *val = tmp;
347
348 return ret;
349}
350
351int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
352 const u32 val, u8 size);
353/**
354 * adis_update_bits_base() - ADIS Update bits function - Locked version
355 * @adis: The adis device
356 * @reg: The address of the lower of the two registers
357 * @mask: Bitmask to change
358 * @val: Value to be written
359 * @size: Size of the register to update
360 *
361 * Updates the desired bits of @reg in accordance with @mask and @val.
362 */
363static inline int adis_update_bits_base(struct adis *adis, unsigned int reg,
364 const u32 mask, const u32 val, u8 size)
365{
366 int ret;
367
368 mutex_lock(&adis->state_lock);
369 ret = __adis_update_bits_base(adis, reg, mask, val, size);
370 mutex_unlock(lock: &adis->state_lock);
371 return ret;
372}
373
374/**
375 * adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version
376 * @adis: The adis device
377 * @reg: The address of the lower of the two registers
378 * @mask: Bitmask to change
379 * @val: Value to be written
380 *
381 * This macro evaluates the sizeof of @val at compile time and calls
382 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
383 * @val can lead to undesired behavior if the register to update is 16bit.
384 */
385#define adis_update_bits(adis, reg, mask, val) ({ \
386 BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
387 adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
388})
389
390/**
391 * adis_update_bits() - Wrapper macro for adis_update_bits_base
392 * @adis: The adis device
393 * @reg: The address of the lower of the two registers
394 * @mask: Bitmask to change
395 * @val: Value to be written
396 *
397 * This macro evaluates the sizeof of @val at compile time and calls
398 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
399 * @val can lead to undesired behavior if the register to update is 16bit.
400 */
401#define __adis_update_bits(adis, reg, mask, val) ({ \
402 BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
403 __adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
404})
405
406int __adis_check_status(struct adis *adis);
407int __adis_initial_startup(struct adis *adis);
408int __adis_enable_irq(struct adis *adis, bool enable);
409
410static inline int adis_enable_irq(struct adis *adis, bool enable)
411{
412 int ret;
413
414 mutex_lock(&adis->state_lock);
415 ret = __adis_enable_irq(adis, enable);
416 mutex_unlock(lock: &adis->state_lock);
417
418 return ret;
419}
420
421static inline int adis_check_status(struct adis *adis)
422{
423 int ret;
424
425 mutex_lock(&adis->state_lock);
426 ret = __adis_check_status(adis);
427 mutex_unlock(lock: &adis->state_lock);
428
429 return ret;
430}
431
432static inline void adis_dev_lock(struct adis *adis)
433{
434 mutex_lock(&adis->state_lock);
435}
436
437static inline void adis_dev_unlock(struct adis *adis)
438{
439 mutex_unlock(lock: &adis->state_lock);
440}
441
442int adis_single_conversion(struct iio_dev *indio_dev,
443 const struct iio_chan_spec *chan,
444 unsigned int error_mask, int *val);
445
446#define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
447 .type = IIO_VOLTAGE, \
448 .indexed = 1, \
449 .channel = (chan), \
450 .extend_name = name, \
451 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
452 BIT(IIO_CHAN_INFO_SCALE), \
453 .info_mask_shared_by_all = info_all, \
454 .address = (addr), \
455 .scan_index = (si), \
456 .scan_type = { \
457 .sign = 'u', \
458 .realbits = (bits), \
459 .storagebits = 16, \
460 .endianness = IIO_BE, \
461 }, \
462}
463
464#define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
465 ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
466
467#define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
468 ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
469
470#define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
471 .type = IIO_TEMP, \
472 .indexed = 1, \
473 .channel = 0, \
474 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
475 BIT(IIO_CHAN_INFO_SCALE) | \
476 BIT(IIO_CHAN_INFO_OFFSET), \
477 .info_mask_shared_by_all = info_all, \
478 .address = (addr), \
479 .scan_index = (si), \
480 .scan_type = { \
481 .sign = 'u', \
482 .realbits = (bits), \
483 .storagebits = 16, \
484 .endianness = IIO_BE, \
485 }, \
486}
487
488#define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
489 .type = (_type), \
490 .modified = 1, \
491 .channel2 = IIO_MOD_ ## mod, \
492 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
493 (info_sep), \
494 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
495 .info_mask_shared_by_all = info_all, \
496 .address = (addr), \
497 .scan_index = (si), \
498 .scan_type = { \
499 .sign = 's', \
500 .realbits = (bits), \
501 .storagebits = 16, \
502 .endianness = IIO_BE, \
503 }, \
504}
505
506#define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
507 ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
508
509#define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
510 ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
511
512#define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
513 ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
514
515#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
516 ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
517
518#ifdef CONFIG_IIO_ADIS_LIB_BUFFER
519
520int
521devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
522 irq_handler_t trigger_handler);
523
524int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
525
526int adis_update_scan_mode(struct iio_dev *indio_dev,
527 const unsigned long *scan_mask);
528
529#else /* CONFIG_IIO_BUFFER */
530
531static inline int
532devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
533 irq_handler_t trigger_handler)
534{
535 return 0;
536}
537
538static inline int devm_adis_probe_trigger(struct adis *adis,
539 struct iio_dev *indio_dev)
540{
541 return 0;
542}
543
544#define adis_update_scan_mode NULL
545
546#endif /* CONFIG_IIO_BUFFER */
547
548#ifdef CONFIG_DEBUG_FS
549
550int adis_debugfs_reg_access(struct iio_dev *indio_dev,
551 unsigned int reg, unsigned int writeval,
552 unsigned int *readval);
553
554#else
555
556#define adis_debugfs_reg_access NULL
557
558#endif
559
560#endif
561

source code of linux/include/linux/iio/imu/adis.h