1 | // SPDX-License-Identifier: GPL-2.0 |
---|---|
2 | /* |
3 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
4 | * Copyright (C) 2005-2006 Thomas Gleixner |
5 | * |
6 | * This file contains driver APIs to the irq subsystem. |
7 | */ |
8 | |
9 | #define pr_fmt(fmt) "genirq: " fmt |
10 | |
11 | #include <linux/irq.h> |
12 | #include <linux/kthread.h> |
13 | #include <linux/module.h> |
14 | #include <linux/random.h> |
15 | #include <linux/interrupt.h> |
16 | #include <linux/irqdomain.h> |
17 | #include <linux/slab.h> |
18 | #include <linux/sched.h> |
19 | #include <linux/sched/rt.h> |
20 | #include <linux/sched/task.h> |
21 | #include <linux/sched/isolation.h> |
22 | #include <uapi/linux/sched/types.h> |
23 | #include <linux/task_work.h> |
24 | |
25 | #include "internals.h" |
26 | |
27 | #if defined(CONFIG_IRQ_FORCED_THREADING) && !defined(CONFIG_PREEMPT_RT) |
28 | DEFINE_STATIC_KEY_FALSE(force_irqthreads_key); |
29 | |
30 | static int __init setup_forced_irqthreads(char *arg) |
31 | { |
32 | static_branch_enable(&force_irqthreads_key); |
33 | return 0; |
34 | } |
35 | early_param("threadirqs", setup_forced_irqthreads); |
36 | #endif |
37 | |
38 | static int __irq_get_irqchip_state(struct irq_data *d, enum irqchip_irq_state which, bool *state); |
39 | |
40 | static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip) |
41 | { |
42 | struct irq_data *irqd = irq_desc_get_irq_data(desc); |
43 | bool inprogress; |
44 | |
45 | do { |
46 | /* |
47 | * Wait until we're out of the critical section. This might |
48 | * give the wrong answer due to the lack of memory barriers. |
49 | */ |
50 | while (irqd_irq_inprogress(d: &desc->irq_data)) |
51 | cpu_relax(); |
52 | |
53 | /* Ok, that indicated we're done: double-check carefully. */ |
54 | guard(raw_spinlock_irqsave)(l: &desc->lock); |
55 | inprogress = irqd_irq_inprogress(d: &desc->irq_data); |
56 | |
57 | /* |
58 | * If requested and supported, check at the chip whether it |
59 | * is in flight at the hardware level, i.e. already pending |
60 | * in a CPU and waiting for service and acknowledge. |
61 | */ |
62 | if (!inprogress && sync_chip) { |
63 | /* |
64 | * Ignore the return code. inprogress is only updated |
65 | * when the chip supports it. |
66 | */ |
67 | __irq_get_irqchip_state(d: irqd, which: IRQCHIP_STATE_ACTIVE, |
68 | state: &inprogress); |
69 | } |
70 | /* Oops, that failed? */ |
71 | } while (inprogress); |
72 | } |
73 | |
74 | /** |
75 | * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs) |
76 | * @irq: interrupt number to wait for |
77 | * |
78 | * This function waits for any pending hard IRQ handlers for this interrupt |
79 | * to complete before returning. If you use this function while holding a |
80 | * resource the IRQ handler may need you will deadlock. It does not take |
81 | * associated threaded handlers into account. |
82 | * |
83 | * Do not use this for shutdown scenarios where you must be sure that all |
84 | * parts (hardirq and threaded handler) have completed. |
85 | * |
86 | * Returns: false if a threaded handler is active. |
87 | * |
88 | * This function may be called - with care - from IRQ context. |
89 | * |
90 | * It does not check whether there is an interrupt in flight at the |
91 | * hardware level, but not serviced yet, as this might deadlock when called |
92 | * with interrupts disabled and the target CPU of the interrupt is the |
93 | * current CPU. |
94 | */ |
95 | bool synchronize_hardirq(unsigned int irq) |
96 | { |
97 | struct irq_desc *desc = irq_to_desc(irq); |
98 | |
99 | if (desc) { |
100 | __synchronize_hardirq(desc, sync_chip: false); |
101 | return !atomic_read(v: &desc->threads_active); |
102 | } |
103 | |
104 | return true; |
105 | } |
106 | EXPORT_SYMBOL(synchronize_hardirq); |
107 | |
108 | static void __synchronize_irq(struct irq_desc *desc) |
109 | { |
110 | __synchronize_hardirq(desc, sync_chip: true); |
111 | /* |
112 | * We made sure that no hardirq handler is running. Now verify that no |
113 | * threaded handlers are active. |
114 | */ |
115 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); |
116 | } |
117 | |
118 | /** |
119 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) |
120 | * @irq: interrupt number to wait for |
121 | * |
122 | * This function waits for any pending IRQ handlers for this interrupt to |
123 | * complete before returning. If you use this function while holding a |
124 | * resource the IRQ handler may need you will deadlock. |
125 | * |
126 | * Can only be called from preemptible code as it might sleep when |
127 | * an interrupt thread is associated to @irq. |
128 | * |
129 | * It optionally makes sure (when the irq chip supports that method) |
130 | * that the interrupt is not pending in any CPU and waiting for |
131 | * service. |
132 | */ |
133 | void synchronize_irq(unsigned int irq) |
134 | { |
135 | struct irq_desc *desc = irq_to_desc(irq); |
136 | |
137 | if (desc) |
138 | __synchronize_irq(desc); |
139 | } |
140 | EXPORT_SYMBOL(synchronize_irq); |
141 | |
142 | #ifdef CONFIG_SMP |
143 | cpumask_var_t irq_default_affinity; |
144 | |
145 | static bool __irq_can_set_affinity(struct irq_desc *desc) |
146 | { |
147 | if (!desc || !irqd_can_balance(d: &desc->irq_data) || |
148 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) |
149 | return false; |
150 | return true; |
151 | } |
152 | |
153 | /** |
154 | * irq_can_set_affinity - Check if the affinity of a given irq can be set |
155 | * @irq: Interrupt to check |
156 | * |
157 | */ |
158 | int irq_can_set_affinity(unsigned int irq) |
159 | { |
160 | return __irq_can_set_affinity(desc: irq_to_desc(irq)); |
161 | } |
162 | |
163 | /** |
164 | * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space |
165 | * @irq: Interrupt to check |
166 | * |
167 | * Like irq_can_set_affinity() above, but additionally checks for the |
168 | * AFFINITY_MANAGED flag. |
169 | */ |
170 | bool irq_can_set_affinity_usr(unsigned int irq) |
171 | { |
172 | struct irq_desc *desc = irq_to_desc(irq); |
173 | |
174 | return __irq_can_set_affinity(desc) && |
175 | !irqd_affinity_is_managed(d: &desc->irq_data); |
176 | } |
177 | |
178 | /** |
179 | * irq_set_thread_affinity - Notify irq threads to adjust affinity |
180 | * @desc: irq descriptor which has affinity changed |
181 | * |
182 | * Just set IRQTF_AFFINITY and delegate the affinity setting to the |
183 | * interrupt thread itself. We can not call set_cpus_allowed_ptr() here as |
184 | * we hold desc->lock and this code can be called from hard interrupt |
185 | * context. |
186 | */ |
187 | static void irq_set_thread_affinity(struct irq_desc *desc) |
188 | { |
189 | struct irqaction *action; |
190 | |
191 | for_each_action_of_desc(desc, action) { |
192 | if (action->thread) { |
193 | set_bit(nr: IRQTF_AFFINITY, addr: &action->thread_flags); |
194 | wake_up_process(tsk: action->thread); |
195 | } |
196 | if (action->secondary && action->secondary->thread) { |
197 | set_bit(nr: IRQTF_AFFINITY, addr: &action->secondary->thread_flags); |
198 | wake_up_process(tsk: action->secondary->thread); |
199 | } |
200 | } |
201 | } |
202 | |
203 | #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK |
204 | static void irq_validate_effective_affinity(struct irq_data *data) |
205 | { |
206 | const struct cpumask *m = irq_data_get_effective_affinity_mask(d: data); |
207 | struct irq_chip *chip = irq_data_get_irq_chip(d: data); |
208 | |
209 | if (!cpumask_empty(srcp: m)) |
210 | return; |
211 | pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n", |
212 | chip->name, data->irq); |
213 | } |
214 | #else |
215 | static inline void irq_validate_effective_affinity(struct irq_data *data) { } |
216 | #endif |
217 | |
218 | static DEFINE_PER_CPU(struct cpumask, __tmp_mask); |
219 | |
220 | int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, |
221 | bool force) |
222 | { |
223 | struct cpumask *tmp_mask = this_cpu_ptr(&__tmp_mask); |
224 | struct irq_desc *desc = irq_data_to_desc(data); |
225 | struct irq_chip *chip = irq_data_get_irq_chip(d: data); |
226 | const struct cpumask *prog_mask; |
227 | int ret; |
228 | |
229 | if (!chip || !chip->irq_set_affinity) |
230 | return -EINVAL; |
231 | |
232 | /* |
233 | * If this is a managed interrupt and housekeeping is enabled on |
234 | * it check whether the requested affinity mask intersects with |
235 | * a housekeeping CPU. If so, then remove the isolated CPUs from |
236 | * the mask and just keep the housekeeping CPU(s). This prevents |
237 | * the affinity setter from routing the interrupt to an isolated |
238 | * CPU to avoid that I/O submitted from a housekeeping CPU causes |
239 | * interrupts on an isolated one. |
240 | * |
241 | * If the masks do not intersect or include online CPU(s) then |
242 | * keep the requested mask. The isolated target CPUs are only |
243 | * receiving interrupts when the I/O operation was submitted |
244 | * directly from them. |
245 | * |
246 | * If all housekeeping CPUs in the affinity mask are offline, the |
247 | * interrupt will be migrated by the CPU hotplug code once a |
248 | * housekeeping CPU which belongs to the affinity mask comes |
249 | * online. |
250 | */ |
251 | if (irqd_affinity_is_managed(d: data) && |
252 | housekeeping_enabled(type: HK_TYPE_MANAGED_IRQ)) { |
253 | const struct cpumask *hk_mask; |
254 | |
255 | hk_mask = housekeeping_cpumask(type: HK_TYPE_MANAGED_IRQ); |
256 | |
257 | cpumask_and(dstp: tmp_mask, src1p: mask, src2p: hk_mask); |
258 | if (!cpumask_intersects(src1p: tmp_mask, cpu_online_mask)) |
259 | prog_mask = mask; |
260 | else |
261 | prog_mask = tmp_mask; |
262 | } else { |
263 | prog_mask = mask; |
264 | } |
265 | |
266 | /* |
267 | * Make sure we only provide online CPUs to the irqchip, |
268 | * unless we are being asked to force the affinity (in which |
269 | * case we do as we are told). |
270 | */ |
271 | cpumask_and(dstp: tmp_mask, src1p: prog_mask, cpu_online_mask); |
272 | if (!force && !cpumask_empty(srcp: tmp_mask)) |
273 | ret = chip->irq_set_affinity(data, tmp_mask, force); |
274 | else if (force) |
275 | ret = chip->irq_set_affinity(data, mask, force); |
276 | else |
277 | ret = -EINVAL; |
278 | |
279 | switch (ret) { |
280 | case IRQ_SET_MASK_OK: |
281 | case IRQ_SET_MASK_OK_DONE: |
282 | cpumask_copy(dstp: desc->irq_common_data.affinity, srcp: mask); |
283 | fallthrough; |
284 | case IRQ_SET_MASK_OK_NOCOPY: |
285 | irq_validate_effective_affinity(data); |
286 | irq_set_thread_affinity(desc); |
287 | ret = 0; |
288 | } |
289 | |
290 | return ret; |
291 | } |
292 | |
293 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
294 | static inline int irq_set_affinity_pending(struct irq_data *data, |
295 | const struct cpumask *dest) |
296 | { |
297 | struct irq_desc *desc = irq_data_to_desc(data); |
298 | |
299 | irqd_set_move_pending(d: data); |
300 | irq_copy_pending(desc, mask: dest); |
301 | return 0; |
302 | } |
303 | #else |
304 | static inline int irq_set_affinity_pending(struct irq_data *data, |
305 | const struct cpumask *dest) |
306 | { |
307 | return -EBUSY; |
308 | } |
309 | #endif |
310 | |
311 | static int irq_try_set_affinity(struct irq_data *data, |
312 | const struct cpumask *dest, bool force) |
313 | { |
314 | int ret = irq_do_set_affinity(data, mask: dest, force); |
315 | |
316 | /* |
317 | * In case that the underlying vector management is busy and the |
318 | * architecture supports the generic pending mechanism then utilize |
319 | * this to avoid returning an error to user space. |
320 | */ |
321 | if (ret == -EBUSY && !force) |
322 | ret = irq_set_affinity_pending(data, dest); |
323 | return ret; |
324 | } |
325 | |
326 | static bool irq_set_affinity_deactivated(struct irq_data *data, |
327 | const struct cpumask *mask) |
328 | { |
329 | struct irq_desc *desc = irq_data_to_desc(data); |
330 | |
331 | /* |
332 | * Handle irq chips which can handle affinity only in activated |
333 | * state correctly |
334 | * |
335 | * If the interrupt is not yet activated, just store the affinity |
336 | * mask and do not call the chip driver at all. On activation the |
337 | * driver has to make sure anyway that the interrupt is in a |
338 | * usable state so startup works. |
339 | */ |
340 | if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) || |
341 | irqd_is_activated(d: data) || !irqd_affinity_on_activate(d: data)) |
342 | return false; |
343 | |
344 | cpumask_copy(dstp: desc->irq_common_data.affinity, srcp: mask); |
345 | irq_data_update_effective_affinity(d: data, m: mask); |
346 | irqd_set(d: data, mask: IRQD_AFFINITY_SET); |
347 | return true; |
348 | } |
349 | |
350 | int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, |
351 | bool force) |
352 | { |
353 | struct irq_chip *chip = irq_data_get_irq_chip(d: data); |
354 | struct irq_desc *desc = irq_data_to_desc(data); |
355 | int ret = 0; |
356 | |
357 | if (!chip || !chip->irq_set_affinity) |
358 | return -EINVAL; |
359 | |
360 | if (irq_set_affinity_deactivated(data, mask)) |
361 | return 0; |
362 | |
363 | if (irq_can_move_pcntxt(data) && !irqd_is_setaffinity_pending(d: data)) { |
364 | ret = irq_try_set_affinity(data, dest: mask, force); |
365 | } else { |
366 | irqd_set_move_pending(d: data); |
367 | irq_copy_pending(desc, mask); |
368 | } |
369 | |
370 | if (desc->affinity_notify) { |
371 | kref_get(kref: &desc->affinity_notify->kref); |
372 | if (!schedule_work(work: &desc->affinity_notify->work)) { |
373 | /* Work was already scheduled, drop our extra ref */ |
374 | kref_put(kref: &desc->affinity_notify->kref, |
375 | release: desc->affinity_notify->release); |
376 | } |
377 | } |
378 | irqd_set(d: data, mask: IRQD_AFFINITY_SET); |
379 | |
380 | return ret; |
381 | } |
382 | |
383 | /** |
384 | * irq_update_affinity_desc - Update affinity management for an interrupt |
385 | * @irq: The interrupt number to update |
386 | * @affinity: Pointer to the affinity descriptor |
387 | * |
388 | * This interface can be used to configure the affinity management of |
389 | * interrupts which have been allocated already. |
390 | * |
391 | * There are certain limitations on when it may be used - attempts to use it |
392 | * for when the kernel is configured for generic IRQ reservation mode (in |
393 | * config GENERIC_IRQ_RESERVATION_MODE) will fail, as it may conflict with |
394 | * managed/non-managed interrupt accounting. In addition, attempts to use it on |
395 | * an interrupt which is already started or which has already been configured |
396 | * as managed will also fail, as these mean invalid init state or double init. |
397 | */ |
398 | int irq_update_affinity_desc(unsigned int irq, struct irq_affinity_desc *affinity) |
399 | { |
400 | /* |
401 | * Supporting this with the reservation scheme used by x86 needs |
402 | * some more thought. Fail it for now. |
403 | */ |
404 | if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE)) |
405 | return -EOPNOTSUPP; |
406 | |
407 | scoped_irqdesc_get_and_buslock(irq, 0) { |
408 | struct irq_desc *desc = scoped_irqdesc; |
409 | bool activated; |
410 | |
411 | /* Requires the interrupt to be shut down */ |
412 | if (irqd_is_started(d: &desc->irq_data)) |
413 | return -EBUSY; |
414 | |
415 | /* Interrupts which are already managed cannot be modified */ |
416 | if (irqd_affinity_is_managed(d: &desc->irq_data)) |
417 | return -EBUSY; |
418 | /* |
419 | * Deactivate the interrupt. That's required to undo |
420 | * anything an earlier activation has established. |
421 | */ |
422 | activated = irqd_is_activated(d: &desc->irq_data); |
423 | if (activated) |
424 | irq_domain_deactivate_irq(irq_data: &desc->irq_data); |
425 | |
426 | if (affinity->is_managed) { |
427 | irqd_set(d: &desc->irq_data, mask: IRQD_AFFINITY_MANAGED); |
428 | irqd_set(d: &desc->irq_data, mask: IRQD_MANAGED_SHUTDOWN); |
429 | } |
430 | |
431 | cpumask_copy(dstp: desc->irq_common_data.affinity, srcp: &affinity->mask); |
432 | |
433 | /* Restore the activation state */ |
434 | if (activated) |
435 | irq_domain_activate_irq(irq_data: &desc->irq_data, early: false); |
436 | return 0; |
437 | } |
438 | return -EINVAL; |
439 | } |
440 | |
441 | static int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, |
442 | bool force) |
443 | { |
444 | struct irq_desc *desc = irq_to_desc(irq); |
445 | |
446 | if (!desc) |
447 | return -EINVAL; |
448 | |
449 | guard(raw_spinlock_irqsave)(l: &desc->lock); |
450 | return irq_set_affinity_locked(data: irq_desc_get_irq_data(desc), mask, force); |
451 | } |
452 | |
453 | /** |
454 | * irq_set_affinity - Set the irq affinity of a given irq |
455 | * @irq: Interrupt to set affinity |
456 | * @cpumask: cpumask |
457 | * |
458 | * Fails if cpumask does not contain an online CPU |
459 | */ |
460 | int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
461 | { |
462 | return __irq_set_affinity(irq, mask: cpumask, force: false); |
463 | } |
464 | EXPORT_SYMBOL_GPL(irq_set_affinity); |
465 | |
466 | /** |
467 | * irq_force_affinity - Force the irq affinity of a given irq |
468 | * @irq: Interrupt to set affinity |
469 | * @cpumask: cpumask |
470 | * |
471 | * Same as irq_set_affinity, but without checking the mask against |
472 | * online cpus. |
473 | * |
474 | * Solely for low level cpu hotplug code, where we need to make per |
475 | * cpu interrupts affine before the cpu becomes online. |
476 | */ |
477 | int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) |
478 | { |
479 | return __irq_set_affinity(irq, mask: cpumask, force: true); |
480 | } |
481 | EXPORT_SYMBOL_GPL(irq_force_affinity); |
482 | |
483 | int __irq_apply_affinity_hint(unsigned int irq, const struct cpumask *m, bool setaffinity) |
484 | { |
485 | int ret = -EINVAL; |
486 | |
487 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { |
488 | scoped_irqdesc->affinity_hint = m; |
489 | ret = 0; |
490 | } |
491 | |
492 | if (!ret && m && setaffinity) |
493 | __irq_set_affinity(irq, mask: m, force: false); |
494 | return ret; |
495 | } |
496 | EXPORT_SYMBOL_GPL(__irq_apply_affinity_hint); |
497 | |
498 | static void irq_affinity_notify(struct work_struct *work) |
499 | { |
500 | struct irq_affinity_notify *notify = container_of(work, struct irq_affinity_notify, work); |
501 | struct irq_desc *desc = irq_to_desc(irq: notify->irq); |
502 | cpumask_var_t cpumask; |
503 | |
504 | if (!desc || !alloc_cpumask_var(mask: &cpumask, GFP_KERNEL)) |
505 | goto out; |
506 | |
507 | scoped_guard(raw_spinlock_irqsave, &desc->lock) { |
508 | if (irq_move_pending(data: &desc->irq_data)) |
509 | irq_get_pending(mask: cpumask, desc); |
510 | else |
511 | cpumask_copy(dstp: cpumask, srcp: desc->irq_common_data.affinity); |
512 | } |
513 | |
514 | notify->notify(notify, cpumask); |
515 | |
516 | free_cpumask_var(mask: cpumask); |
517 | out: |
518 | kref_put(kref: ¬ify->kref, release: notify->release); |
519 | } |
520 | |
521 | /** |
522 | * irq_set_affinity_notifier - control notification of IRQ affinity changes |
523 | * @irq: Interrupt for which to enable/disable notification |
524 | * @notify: Context for notification, or %NULL to disable |
525 | * notification. Function pointers must be initialised; |
526 | * the other fields will be initialised by this function. |
527 | * |
528 | * Must be called in process context. Notification may only be enabled |
529 | * after the IRQ is allocated and must be disabled before the IRQ is freed |
530 | * using free_irq(). |
531 | */ |
532 | int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) |
533 | { |
534 | struct irq_desc *desc = irq_to_desc(irq); |
535 | struct irq_affinity_notify *old_notify; |
536 | |
537 | /* The release function is promised process context */ |
538 | might_sleep(); |
539 | |
540 | if (!desc || irq_is_nmi(desc)) |
541 | return -EINVAL; |
542 | |
543 | /* Complete initialisation of *notify */ |
544 | if (notify) { |
545 | notify->irq = irq; |
546 | kref_init(kref: ¬ify->kref); |
547 | INIT_WORK(¬ify->work, irq_affinity_notify); |
548 | } |
549 | |
550 | scoped_guard(raw_spinlock_irqsave, &desc->lock) { |
551 | old_notify = desc->affinity_notify; |
552 | desc->affinity_notify = notify; |
553 | } |
554 | |
555 | if (old_notify) { |
556 | if (cancel_work_sync(work: &old_notify->work)) { |
557 | /* Pending work had a ref, put that one too */ |
558 | kref_put(kref: &old_notify->kref, release: old_notify->release); |
559 | } |
560 | kref_put(kref: &old_notify->kref, release: old_notify->release); |
561 | } |
562 | |
563 | return 0; |
564 | } |
565 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); |
566 | |
567 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
568 | /* |
569 | * Generic version of the affinity autoselector. |
570 | */ |
571 | int irq_setup_affinity(struct irq_desc *desc) |
572 | { |
573 | struct cpumask *set = irq_default_affinity; |
574 | int node = irq_desc_get_node(desc); |
575 | |
576 | static DEFINE_RAW_SPINLOCK(mask_lock); |
577 | static struct cpumask mask; |
578 | |
579 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
580 | if (!__irq_can_set_affinity(desc)) |
581 | return 0; |
582 | |
583 | guard(raw_spinlock)(l: &mask_lock); |
584 | /* |
585 | * Preserve the managed affinity setting and a userspace affinity |
586 | * setup, but make sure that one of the targets is online. |
587 | */ |
588 | if (irqd_affinity_is_managed(d: &desc->irq_data) || |
589 | irqd_has_set(d: &desc->irq_data, mask: IRQD_AFFINITY_SET)) { |
590 | if (cpumask_intersects(src1p: desc->irq_common_data.affinity, |
591 | cpu_online_mask)) |
592 | set = desc->irq_common_data.affinity; |
593 | else |
594 | irqd_clear(d: &desc->irq_data, mask: IRQD_AFFINITY_SET); |
595 | } |
596 | |
597 | cpumask_and(dstp: &mask, cpu_online_mask, src2p: set); |
598 | if (cpumask_empty(srcp: &mask)) |
599 | cpumask_copy(dstp: &mask, cpu_online_mask); |
600 | |
601 | if (node != NUMA_NO_NODE) { |
602 | const struct cpumask *nodemask = cpumask_of_node(node); |
603 | |
604 | /* make sure at least one of the cpus in nodemask is online */ |
605 | if (cpumask_intersects(src1p: &mask, src2p: nodemask)) |
606 | cpumask_and(dstp: &mask, src1p: &mask, src2p: nodemask); |
607 | } |
608 | return irq_do_set_affinity(data: &desc->irq_data, mask: &mask, force: false); |
609 | } |
610 | #else |
611 | /* Wrapper for ALPHA specific affinity selector magic */ |
612 | int irq_setup_affinity(struct irq_desc *desc) |
613 | { |
614 | return irq_select_affinity(irq_desc_get_irq(desc)); |
615 | } |
616 | #endif /* CONFIG_AUTO_IRQ_AFFINITY */ |
617 | #endif /* CONFIG_SMP */ |
618 | |
619 | |
620 | /** |
621 | * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt |
622 | * @irq: interrupt number to set affinity |
623 | * @vcpu_info: vCPU specific data or pointer to a percpu array of vCPU |
624 | * specific data for percpu_devid interrupts |
625 | * |
626 | * This function uses the vCPU specific data to set the vCPU affinity for |
627 | * an irq. The vCPU specific data is passed from outside, such as KVM. One |
628 | * example code path is as below: KVM -> IOMMU -> irq_set_vcpu_affinity(). |
629 | */ |
630 | int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info) |
631 | { |
632 | scoped_irqdesc_get_and_lock(irq, 0) { |
633 | struct irq_desc *desc = scoped_irqdesc; |
634 | struct irq_data *data; |
635 | struct irq_chip *chip; |
636 | |
637 | data = irq_desc_get_irq_data(desc); |
638 | do { |
639 | chip = irq_data_get_irq_chip(d: data); |
640 | if (chip && chip->irq_set_vcpu_affinity) |
641 | break; |
642 | |
643 | data = irqd_get_parent_data(irqd: data); |
644 | } while (data); |
645 | |
646 | if (!data) |
647 | return -ENOSYS; |
648 | return chip->irq_set_vcpu_affinity(data, vcpu_info); |
649 | } |
650 | return -EINVAL; |
651 | } |
652 | EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity); |
653 | |
654 | void __disable_irq(struct irq_desc *desc) |
655 | { |
656 | if (!desc->depth++) |
657 | irq_disable(desc); |
658 | } |
659 | |
660 | static int __disable_irq_nosync(unsigned int irq) |
661 | { |
662 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { |
663 | __disable_irq(scoped_irqdesc); |
664 | return 0; |
665 | } |
666 | return -EINVAL; |
667 | } |
668 | |
669 | /** |
670 | * disable_irq_nosync - disable an irq without waiting |
671 | * @irq: Interrupt to disable |
672 | * |
673 | * Disable the selected interrupt line. Disables and Enables are |
674 | * nested. |
675 | * Unlike disable_irq(), this function does not ensure existing |
676 | * instances of the IRQ handler have completed before returning. |
677 | * |
678 | * This function may be called from IRQ context. |
679 | */ |
680 | void disable_irq_nosync(unsigned int irq) |
681 | { |
682 | __disable_irq_nosync(irq); |
683 | } |
684 | EXPORT_SYMBOL(disable_irq_nosync); |
685 | |
686 | /** |
687 | * disable_irq - disable an irq and wait for completion |
688 | * @irq: Interrupt to disable |
689 | * |
690 | * Disable the selected interrupt line. Enables and Disables are nested. |
691 | * |
692 | * This function waits for any pending IRQ handlers for this interrupt to |
693 | * complete before returning. If you use this function while holding a |
694 | * resource the IRQ handler may need you will deadlock. |
695 | * |
696 | * Can only be called from preemptible code as it might sleep when an |
697 | * interrupt thread is associated to @irq. |
698 | * |
699 | */ |
700 | void disable_irq(unsigned int irq) |
701 | { |
702 | might_sleep(); |
703 | if (!__disable_irq_nosync(irq)) |
704 | synchronize_irq(irq); |
705 | } |
706 | EXPORT_SYMBOL(disable_irq); |
707 | |
708 | /** |
709 | * disable_hardirq - disables an irq and waits for hardirq completion |
710 | * @irq: Interrupt to disable |
711 | * |
712 | * Disable the selected interrupt line. Enables and Disables are nested. |
713 | * |
714 | * This function waits for any pending hard IRQ handlers for this interrupt |
715 | * to complete before returning. If you use this function while holding a |
716 | * resource the hard IRQ handler may need you will deadlock. |
717 | * |
718 | * When used to optimistically disable an interrupt from atomic context the |
719 | * return value must be checked. |
720 | * |
721 | * Returns: false if a threaded handler is active. |
722 | * |
723 | * This function may be called - with care - from IRQ context. |
724 | */ |
725 | bool disable_hardirq(unsigned int irq) |
726 | { |
727 | if (!__disable_irq_nosync(irq)) |
728 | return synchronize_hardirq(irq); |
729 | return false; |
730 | } |
731 | EXPORT_SYMBOL_GPL(disable_hardirq); |
732 | |
733 | /** |
734 | * disable_nmi_nosync - disable an nmi without waiting |
735 | * @irq: Interrupt to disable |
736 | * |
737 | * Disable the selected interrupt line. Disables and enables are nested. |
738 | * |
739 | * The interrupt to disable must have been requested through request_nmi. |
740 | * Unlike disable_nmi(), this function does not ensure existing |
741 | * instances of the IRQ handler have completed before returning. |
742 | */ |
743 | void disable_nmi_nosync(unsigned int irq) |
744 | { |
745 | disable_irq_nosync(irq); |
746 | } |
747 | |
748 | void __enable_irq(struct irq_desc *desc) |
749 | { |
750 | switch (desc->depth) { |
751 | case 0: |
752 | err_out: |
753 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", |
754 | irq_desc_get_irq(desc)); |
755 | break; |
756 | case 1: { |
757 | if (desc->istate & IRQS_SUSPENDED) |
758 | goto err_out; |
759 | /* Prevent probing on this irq: */ |
760 | irq_settings_set_noprobe(desc); |
761 | /* |
762 | * Call irq_startup() not irq_enable() here because the |
763 | * interrupt might be marked NOAUTOEN so irq_startup() |
764 | * needs to be invoked when it gets enabled the first time. |
765 | * This is also required when __enable_irq() is invoked for |
766 | * a managed and shutdown interrupt from the S3 resume |
767 | * path. |
768 | * |
769 | * If it was already started up, then irq_startup() will |
770 | * invoke irq_enable() under the hood. |
771 | */ |
772 | irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE); |
773 | break; |
774 | } |
775 | default: |
776 | desc->depth--; |
777 | } |
778 | } |
779 | |
780 | /** |
781 | * enable_irq - enable handling of an irq |
782 | * @irq: Interrupt to enable |
783 | * |
784 | * Undoes the effect of one call to disable_irq(). If this matches the |
785 | * last disable, processing of interrupts on this IRQ line is re-enabled. |
786 | * |
787 | * This function may be called from IRQ context only when |
788 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
789 | */ |
790 | void enable_irq(unsigned int irq) |
791 | { |
792 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { |
793 | struct irq_desc *desc = scoped_irqdesc; |
794 | |
795 | if (WARN(!desc->irq_data.chip, "enable_irq before setup/request_irq: irq %u\n", irq)) |
796 | return; |
797 | __enable_irq(desc); |
798 | } |
799 | } |
800 | EXPORT_SYMBOL(enable_irq); |
801 | |
802 | /** |
803 | * enable_nmi - enable handling of an nmi |
804 | * @irq: Interrupt to enable |
805 | * |
806 | * The interrupt to enable must have been requested through request_nmi. |
807 | * Undoes the effect of one call to disable_nmi(). If this matches the last |
808 | * disable, processing of interrupts on this IRQ line is re-enabled. |
809 | */ |
810 | void enable_nmi(unsigned int irq) |
811 | { |
812 | enable_irq(irq); |
813 | } |
814 | |
815 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
816 | { |
817 | struct irq_desc *desc = irq_to_desc(irq); |
818 | int ret = -ENXIO; |
819 | |
820 | if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE) |
821 | return 0; |
822 | |
823 | if (desc->irq_data.chip->irq_set_wake) |
824 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); |
825 | |
826 | return ret; |
827 | } |
828 | |
829 | /** |
830 | * irq_set_irq_wake - control irq power management wakeup |
831 | * @irq: interrupt to control |
832 | * @on: enable/disable power management wakeup |
833 | * |
834 | * Enable/disable power management wakeup mode, which is disabled by |
835 | * default. Enables and disables must match, just as they match for |
836 | * non-wakeup mode support. |
837 | * |
838 | * Wakeup mode lets this IRQ wake the system from sleep states like |
839 | * "suspend to RAM". |
840 | * |
841 | * Note: irq enable/disable state is completely orthogonal to the |
842 | * enable/disable state of irq wake. An irq can be disabled with |
843 | * disable_irq() and still wake the system as long as the irq has wake |
844 | * enabled. If this does not hold, then the underlying irq chip and the |
845 | * related driver need to be investigated. |
846 | */ |
847 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
848 | { |
849 | scoped_irqdesc_get_and_buslock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { |
850 | struct irq_desc *desc = scoped_irqdesc; |
851 | int ret = 0; |
852 | |
853 | /* Don't use NMIs as wake up interrupts please */ |
854 | if (irq_is_nmi(desc)) |
855 | return -EINVAL; |
856 | |
857 | /* |
858 | * wakeup-capable irqs can be shared between drivers that |
859 | * don't need to have the same sleep mode behaviors. |
860 | */ |
861 | if (on) { |
862 | if (desc->wake_depth++ == 0) { |
863 | ret = set_irq_wake_real(irq, on); |
864 | if (ret) |
865 | desc->wake_depth = 0; |
866 | else |
867 | irqd_set(d: &desc->irq_data, mask: IRQD_WAKEUP_STATE); |
868 | } |
869 | } else { |
870 | if (desc->wake_depth == 0) { |
871 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
872 | } else if (--desc->wake_depth == 0) { |
873 | ret = set_irq_wake_real(irq, on); |
874 | if (ret) |
875 | desc->wake_depth = 1; |
876 | else |
877 | irqd_clear(d: &desc->irq_data, mask: IRQD_WAKEUP_STATE); |
878 | } |
879 | } |
880 | return ret; |
881 | } |
882 | return -EINVAL; |
883 | } |
884 | EXPORT_SYMBOL(irq_set_irq_wake); |
885 | |
886 | /* |
887 | * Internal function that tells the architecture code whether a |
888 | * particular irq has been exclusively allocated or is available |
889 | * for driver use. |
890 | */ |
891 | bool can_request_irq(unsigned int irq, unsigned long irqflags) |
892 | { |
893 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { |
894 | struct irq_desc *desc = scoped_irqdesc; |
895 | |
896 | if (irq_settings_can_request(desc)) { |
897 | if (!desc->action || irqflags & desc->action->flags & IRQF_SHARED) |
898 | return true; |
899 | } |
900 | } |
901 | return false; |
902 | } |
903 | |
904 | int __irq_set_trigger(struct irq_desc *desc, unsigned long flags) |
905 | { |
906 | struct irq_chip *chip = desc->irq_data.chip; |
907 | int ret, unmask = 0; |
908 | |
909 | if (!chip || !chip->irq_set_type) { |
910 | /* |
911 | * IRQF_TRIGGER_* but the PIC does not support multiple |
912 | * flow-types? |
913 | */ |
914 | pr_debug("No set_type function for IRQ %d (%s)\n", |
915 | irq_desc_get_irq(desc), |
916 | chip ? (chip->name ? : "unknown") : "unknown"); |
917 | return 0; |
918 | } |
919 | |
920 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { |
921 | if (!irqd_irq_masked(d: &desc->irq_data)) |
922 | mask_irq(desc); |
923 | if (!irqd_irq_disabled(d: &desc->irq_data)) |
924 | unmask = 1; |
925 | } |
926 | |
927 | /* Mask all flags except trigger mode */ |
928 | flags &= IRQ_TYPE_SENSE_MASK; |
929 | ret = chip->irq_set_type(&desc->irq_data, flags); |
930 | |
931 | switch (ret) { |
932 | case IRQ_SET_MASK_OK: |
933 | case IRQ_SET_MASK_OK_DONE: |
934 | irqd_clear(d: &desc->irq_data, mask: IRQD_TRIGGER_MASK); |
935 | irqd_set(d: &desc->irq_data, mask: flags); |
936 | fallthrough; |
937 | |
938 | case IRQ_SET_MASK_OK_NOCOPY: |
939 | flags = irqd_get_trigger_type(d: &desc->irq_data); |
940 | irq_settings_set_trigger_mask(desc, mask: flags); |
941 | irqd_clear(d: &desc->irq_data, mask: IRQD_LEVEL); |
942 | irq_settings_clr_level(desc); |
943 | if (flags & IRQ_TYPE_LEVEL_MASK) { |
944 | irq_settings_set_level(desc); |
945 | irqd_set(d: &desc->irq_data, mask: IRQD_LEVEL); |
946 | } |
947 | |
948 | ret = 0; |
949 | break; |
950 | default: |
951 | pr_err("Setting trigger mode %lu for irq %u failed (%pS)\n", |
952 | flags, irq_desc_get_irq(desc), chip->irq_set_type); |
953 | } |
954 | if (unmask) |
955 | unmask_irq(desc); |
956 | return ret; |
957 | } |
958 | |
959 | #ifdef CONFIG_HARDIRQS_SW_RESEND |
960 | int irq_set_parent(int irq, int parent_irq) |
961 | { |
962 | scoped_irqdesc_get_and_lock(irq, 0) { |
963 | scoped_irqdesc->parent_irq = parent_irq; |
964 | return 0; |
965 | } |
966 | return -EINVAL; |
967 | } |
968 | EXPORT_SYMBOL_GPL(irq_set_parent); |
969 | #endif |
970 | |
971 | /* |
972 | * Default primary interrupt handler for threaded interrupts. Is |
973 | * assigned as primary handler when request_threaded_irq is called |
974 | * with handler == NULL. Useful for oneshot interrupts. |
975 | */ |
976 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) |
977 | { |
978 | return IRQ_WAKE_THREAD; |
979 | } |
980 | |
981 | /* |
982 | * Primary handler for nested threaded interrupts. Should never be |
983 | * called. |
984 | */ |
985 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) |
986 | { |
987 | WARN(1, "Primary handler called for nested irq %d\n", irq); |
988 | return IRQ_NONE; |
989 | } |
990 | |
991 | static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id) |
992 | { |
993 | WARN(1, "Secondary action handler called for irq %d\n", irq); |
994 | return IRQ_NONE; |
995 | } |
996 | |
997 | #ifdef CONFIG_SMP |
998 | /* |
999 | * Check whether we need to change the affinity of the interrupt thread. |
1000 | */ |
1001 | static void irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) |
1002 | { |
1003 | cpumask_var_t mask; |
1004 | bool valid = false; |
1005 | |
1006 | if (!test_and_clear_bit(nr: IRQTF_AFFINITY, addr: &action->thread_flags)) |
1007 | return; |
1008 | |
1009 | __set_current_state(TASK_RUNNING); |
1010 | |
1011 | /* |
1012 | * In case we are out of memory we set IRQTF_AFFINITY again and |
1013 | * try again next time |
1014 | */ |
1015 | if (!alloc_cpumask_var(mask: &mask, GFP_KERNEL)) { |
1016 | set_bit(nr: IRQTF_AFFINITY, addr: &action->thread_flags); |
1017 | return; |
1018 | } |
1019 | |
1020 | scoped_guard(raw_spinlock_irq, &desc->lock) { |
1021 | /* |
1022 | * This code is triggered unconditionally. Check the affinity |
1023 | * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out. |
1024 | */ |
1025 | if (cpumask_available(mask: desc->irq_common_data.affinity)) { |
1026 | const struct cpumask *m; |
1027 | |
1028 | m = irq_data_get_effective_affinity_mask(d: &desc->irq_data); |
1029 | cpumask_copy(dstp: mask, srcp: m); |
1030 | valid = true; |
1031 | } |
1032 | } |
1033 | |
1034 | if (valid) |
1035 | set_cpus_allowed_ptr(current, new_mask: mask); |
1036 | free_cpumask_var(mask); |
1037 | } |
1038 | #else |
1039 | static inline void irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } |
1040 | #endif |
1041 | |
1042 | static int irq_wait_for_interrupt(struct irq_desc *desc, |
1043 | struct irqaction *action) |
1044 | { |
1045 | for (;;) { |
1046 | set_current_state(TASK_INTERRUPTIBLE); |
1047 | irq_thread_check_affinity(desc, action); |
1048 | |
1049 | if (kthread_should_stop()) { |
1050 | /* may need to run one last time */ |
1051 | if (test_and_clear_bit(nr: IRQTF_RUNTHREAD, |
1052 | addr: &action->thread_flags)) { |
1053 | __set_current_state(TASK_RUNNING); |
1054 | return 0; |
1055 | } |
1056 | __set_current_state(TASK_RUNNING); |
1057 | return -1; |
1058 | } |
1059 | |
1060 | if (test_and_clear_bit(nr: IRQTF_RUNTHREAD, |
1061 | addr: &action->thread_flags)) { |
1062 | __set_current_state(TASK_RUNNING); |
1063 | return 0; |
1064 | } |
1065 | schedule(); |
1066 | } |
1067 | } |
1068 | |
1069 | /* |
1070 | * Oneshot interrupts keep the irq line masked until the threaded |
1071 | * handler finished. unmask if the interrupt has not been disabled and |
1072 | * is marked MASKED. |
1073 | */ |
1074 | static void irq_finalize_oneshot(struct irq_desc *desc, |
1075 | struct irqaction *action) |
1076 | { |
1077 | if (!(desc->istate & IRQS_ONESHOT) || |
1078 | action->handler == irq_forced_secondary_handler) |
1079 | return; |
1080 | again: |
1081 | chip_bus_lock(desc); |
1082 | raw_spin_lock_irq(&desc->lock); |
1083 | |
1084 | /* |
1085 | * Implausible though it may be we need to protect us against |
1086 | * the following scenario: |
1087 | * |
1088 | * The thread is faster done than the hard interrupt handler |
1089 | * on the other CPU. If we unmask the irq line then the |
1090 | * interrupt can come in again and masks the line, leaves due |
1091 | * to IRQS_INPROGRESS and the irq line is masked forever. |
1092 | * |
1093 | * This also serializes the state of shared oneshot handlers |
1094 | * versus "desc->threads_oneshot |= action->thread_mask;" in |
1095 | * irq_wake_thread(). See the comment there which explains the |
1096 | * serialization. |
1097 | */ |
1098 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) { |
1099 | raw_spin_unlock_irq(&desc->lock); |
1100 | chip_bus_sync_unlock(desc); |
1101 | cpu_relax(); |
1102 | goto again; |
1103 | } |
1104 | |
1105 | /* |
1106 | * Now check again, whether the thread should run. Otherwise |
1107 | * we would clear the threads_oneshot bit of this thread which |
1108 | * was just set. |
1109 | */ |
1110 | if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags)) |
1111 | goto out_unlock; |
1112 | |
1113 | desc->threads_oneshot &= ~action->thread_mask; |
1114 | |
1115 | if (!desc->threads_oneshot && !irqd_irq_disabled(d: &desc->irq_data) && |
1116 | irqd_irq_masked(d: &desc->irq_data)) |
1117 | unmask_threaded_irq(desc); |
1118 | |
1119 | out_unlock: |
1120 | raw_spin_unlock_irq(&desc->lock); |
1121 | chip_bus_sync_unlock(desc); |
1122 | } |
1123 | |
1124 | /* |
1125 | * Interrupts explicitly requested as threaded interrupts want to be |
1126 | * preemptible - many of them need to sleep and wait for slow busses to |
1127 | * complete. |
1128 | */ |
1129 | static irqreturn_t irq_thread_fn(struct irq_desc *desc, struct irqaction *action) |
1130 | { |
1131 | irqreturn_t ret = action->thread_fn(action->irq, action->dev_id); |
1132 | |
1133 | if (ret == IRQ_HANDLED) |
1134 | atomic_inc(v: &desc->threads_handled); |
1135 | |
1136 | irq_finalize_oneshot(desc, action); |
1137 | return ret; |
1138 | } |
1139 | |
1140 | /* |
1141 | * Interrupts which are not explicitly requested as threaded |
1142 | * interrupts rely on the implicit bh/preempt disable of the hard irq |
1143 | * context. So we need to disable bh here to avoid deadlocks and other |
1144 | * side effects. |
1145 | */ |
1146 | static irqreturn_t irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) |
1147 | { |
1148 | irqreturn_t ret; |
1149 | |
1150 | local_bh_disable(); |
1151 | if (!IS_ENABLED(CONFIG_PREEMPT_RT)) |
1152 | local_irq_disable(); |
1153 | ret = irq_thread_fn(desc, action); |
1154 | if (!IS_ENABLED(CONFIG_PREEMPT_RT)) |
1155 | local_irq_enable(); |
1156 | local_bh_enable(); |
1157 | return ret; |
1158 | } |
1159 | |
1160 | void wake_threads_waitq(struct irq_desc *desc) |
1161 | { |
1162 | if (atomic_dec_and_test(v: &desc->threads_active)) |
1163 | wake_up(&desc->wait_for_threads); |
1164 | } |
1165 | |
1166 | static void irq_thread_dtor(struct callback_head *unused) |
1167 | { |
1168 | struct task_struct *tsk = current; |
1169 | struct irq_desc *desc; |
1170 | struct irqaction *action; |
1171 | |
1172 | if (WARN_ON_ONCE(!(current->flags & PF_EXITING))) |
1173 | return; |
1174 | |
1175 | action = kthread_data(k: tsk); |
1176 | |
1177 | pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", |
1178 | tsk->comm, tsk->pid, action->irq); |
1179 | |
1180 | |
1181 | desc = irq_to_desc(irq: action->irq); |
1182 | /* |
1183 | * If IRQTF_RUNTHREAD is set, we need to decrement |
1184 | * desc->threads_active and wake possible waiters. |
1185 | */ |
1186 | if (test_and_clear_bit(nr: IRQTF_RUNTHREAD, addr: &action->thread_flags)) |
1187 | wake_threads_waitq(desc); |
1188 | |
1189 | /* Prevent a stale desc->threads_oneshot */ |
1190 | irq_finalize_oneshot(desc, action); |
1191 | } |
1192 | |
1193 | static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action) |
1194 | { |
1195 | struct irqaction *secondary = action->secondary; |
1196 | |
1197 | if (WARN_ON_ONCE(!secondary)) |
1198 | return; |
1199 | |
1200 | guard(raw_spinlock_irq)(l: &desc->lock); |
1201 | __irq_wake_thread(desc, action: secondary); |
1202 | } |
1203 | |
1204 | /* |
1205 | * Internal function to notify that a interrupt thread is ready. |
1206 | */ |
1207 | static void irq_thread_set_ready(struct irq_desc *desc, |
1208 | struct irqaction *action) |
1209 | { |
1210 | set_bit(nr: IRQTF_READY, addr: &action->thread_flags); |
1211 | wake_up(&desc->wait_for_threads); |
1212 | } |
1213 | |
1214 | /* |
1215 | * Internal function to wake up a interrupt thread and wait until it is |
1216 | * ready. |
1217 | */ |
1218 | static void wake_up_and_wait_for_irq_thread_ready(struct irq_desc *desc, |
1219 | struct irqaction *action) |
1220 | { |
1221 | if (!action || !action->thread) |
1222 | return; |
1223 | |
1224 | wake_up_process(tsk: action->thread); |
1225 | wait_event(desc->wait_for_threads, |
1226 | test_bit(IRQTF_READY, &action->thread_flags)); |
1227 | } |
1228 | |
1229 | /* |
1230 | * Interrupt handler thread |
1231 | */ |
1232 | static int irq_thread(void *data) |
1233 | { |
1234 | struct callback_head on_exit_work; |
1235 | struct irqaction *action = data; |
1236 | struct irq_desc *desc = irq_to_desc(irq: action->irq); |
1237 | irqreturn_t (*handler_fn)(struct irq_desc *desc, |
1238 | struct irqaction *action); |
1239 | |
1240 | irq_thread_set_ready(desc, action); |
1241 | |
1242 | sched_set_fifo(current); |
1243 | |
1244 | if (force_irqthreads() && test_bit(IRQTF_FORCED_THREAD, |
1245 | &action->thread_flags)) |
1246 | handler_fn = irq_forced_thread_fn; |
1247 | else |
1248 | handler_fn = irq_thread_fn; |
1249 | |
1250 | init_task_work(twork: &on_exit_work, func: irq_thread_dtor); |
1251 | task_work_add(current, twork: &on_exit_work, mode: TWA_NONE); |
1252 | |
1253 | while (!irq_wait_for_interrupt(desc, action)) { |
1254 | irqreturn_t action_ret; |
1255 | |
1256 | action_ret = handler_fn(desc, action); |
1257 | if (action_ret == IRQ_WAKE_THREAD) |
1258 | irq_wake_secondary(desc, action); |
1259 | |
1260 | wake_threads_waitq(desc); |
1261 | } |
1262 | |
1263 | /* |
1264 | * This is the regular exit path. __free_irq() is stopping the |
1265 | * thread via kthread_stop() after calling |
1266 | * synchronize_hardirq(). So neither IRQTF_RUNTHREAD nor the |
1267 | * oneshot mask bit can be set. |
1268 | */ |
1269 | task_work_cancel_func(current, irq_thread_dtor); |
1270 | return 0; |
1271 | } |
1272 | |
1273 | /** |
1274 | * irq_wake_thread - wake the irq thread for the action identified by dev_id |
1275 | * @irq: Interrupt line |
1276 | * @dev_id: Device identity for which the thread should be woken |
1277 | */ |
1278 | void irq_wake_thread(unsigned int irq, void *dev_id) |
1279 | { |
1280 | struct irq_desc *desc = irq_to_desc(irq); |
1281 | struct irqaction *action; |
1282 | |
1283 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
1284 | return; |
1285 | |
1286 | guard(raw_spinlock_irqsave)(l: &desc->lock); |
1287 | for_each_action_of_desc(desc, action) { |
1288 | if (action->dev_id == dev_id) { |
1289 | if (action->thread) |
1290 | __irq_wake_thread(desc, action); |
1291 | break; |
1292 | } |
1293 | } |
1294 | } |
1295 | EXPORT_SYMBOL_GPL(irq_wake_thread); |
1296 | |
1297 | static int irq_setup_forced_threading(struct irqaction *new) |
1298 | { |
1299 | if (!force_irqthreads()) |
1300 | return 0; |
1301 | if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) |
1302 | return 0; |
1303 | |
1304 | /* |
1305 | * No further action required for interrupts which are requested as |
1306 | * threaded interrupts already |
1307 | */ |
1308 | if (new->handler == irq_default_primary_handler) |
1309 | return 0; |
1310 | |
1311 | new->flags |= IRQF_ONESHOT; |
1312 | |
1313 | /* |
1314 | * Handle the case where we have a real primary handler and a |
1315 | * thread handler. We force thread them as well by creating a |
1316 | * secondary action. |
1317 | */ |
1318 | if (new->handler && new->thread_fn) { |
1319 | /* Allocate the secondary action */ |
1320 | new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1321 | if (!new->secondary) |
1322 | return -ENOMEM; |
1323 | new->secondary->handler = irq_forced_secondary_handler; |
1324 | new->secondary->thread_fn = new->thread_fn; |
1325 | new->secondary->dev_id = new->dev_id; |
1326 | new->secondary->irq = new->irq; |
1327 | new->secondary->name = new->name; |
1328 | } |
1329 | /* Deal with the primary handler */ |
1330 | set_bit(nr: IRQTF_FORCED_THREAD, addr: &new->thread_flags); |
1331 | new->thread_fn = new->handler; |
1332 | new->handler = irq_default_primary_handler; |
1333 | return 0; |
1334 | } |
1335 | |
1336 | static int irq_request_resources(struct irq_desc *desc) |
1337 | { |
1338 | struct irq_data *d = &desc->irq_data; |
1339 | struct irq_chip *c = d->chip; |
1340 | |
1341 | return c->irq_request_resources ? c->irq_request_resources(d) : 0; |
1342 | } |
1343 | |
1344 | static void irq_release_resources(struct irq_desc *desc) |
1345 | { |
1346 | struct irq_data *d = &desc->irq_data; |
1347 | struct irq_chip *c = d->chip; |
1348 | |
1349 | if (c->irq_release_resources) |
1350 | c->irq_release_resources(d); |
1351 | } |
1352 | |
1353 | static bool irq_supports_nmi(struct irq_desc *desc) |
1354 | { |
1355 | struct irq_data *d = irq_desc_get_irq_data(desc); |
1356 | |
1357 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1358 | /* Only IRQs directly managed by the root irqchip can be set as NMI */ |
1359 | if (d->parent_data) |
1360 | return false; |
1361 | #endif |
1362 | /* Don't support NMIs for chips behind a slow bus */ |
1363 | if (d->chip->irq_bus_lock || d->chip->irq_bus_sync_unlock) |
1364 | return false; |
1365 | |
1366 | return d->chip->flags & IRQCHIP_SUPPORTS_NMI; |
1367 | } |
1368 | |
1369 | static int irq_nmi_setup(struct irq_desc *desc) |
1370 | { |
1371 | struct irq_data *d = irq_desc_get_irq_data(desc); |
1372 | struct irq_chip *c = d->chip; |
1373 | |
1374 | return c->irq_nmi_setup ? c->irq_nmi_setup(d) : -EINVAL; |
1375 | } |
1376 | |
1377 | static void irq_nmi_teardown(struct irq_desc *desc) |
1378 | { |
1379 | struct irq_data *d = irq_desc_get_irq_data(desc); |
1380 | struct irq_chip *c = d->chip; |
1381 | |
1382 | if (c->irq_nmi_teardown) |
1383 | c->irq_nmi_teardown(d); |
1384 | } |
1385 | |
1386 | static int |
1387 | setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary) |
1388 | { |
1389 | struct task_struct *t; |
1390 | |
1391 | if (!secondary) { |
1392 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, |
1393 | new->name); |
1394 | } else { |
1395 | t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq, |
1396 | new->name); |
1397 | } |
1398 | |
1399 | if (IS_ERR(ptr: t)) |
1400 | return PTR_ERR(ptr: t); |
1401 | |
1402 | /* |
1403 | * We keep the reference to the task struct even if |
1404 | * the thread dies to avoid that the interrupt code |
1405 | * references an already freed task_struct. |
1406 | */ |
1407 | new->thread = get_task_struct(t); |
1408 | /* |
1409 | * Tell the thread to set its affinity. This is |
1410 | * important for shared interrupt handlers as we do |
1411 | * not invoke setup_affinity() for the secondary |
1412 | * handlers as everything is already set up. Even for |
1413 | * interrupts marked with IRQF_NO_BALANCE this is |
1414 | * correct as we want the thread to move to the cpu(s) |
1415 | * on which the requesting code placed the interrupt. |
1416 | */ |
1417 | set_bit(nr: IRQTF_AFFINITY, addr: &new->thread_flags); |
1418 | return 0; |
1419 | } |
1420 | |
1421 | /* |
1422 | * Internal function to register an irqaction - typically used to |
1423 | * allocate special interrupts that are part of the architecture. |
1424 | * |
1425 | * Locking rules: |
1426 | * |
1427 | * desc->request_mutex Provides serialization against a concurrent free_irq() |
1428 | * chip_bus_lock Provides serialization for slow bus operations |
1429 | * desc->lock Provides serialization against hard interrupts |
1430 | * |
1431 | * chip_bus_lock and desc->lock are sufficient for all other management and |
1432 | * interrupt related functions. desc->request_mutex solely serializes |
1433 | * request/free_irq(). |
1434 | */ |
1435 | static int |
1436 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1437 | { |
1438 | struct irqaction *old, **old_ptr; |
1439 | unsigned long flags, thread_mask = 0; |
1440 | int ret, nested, shared = 0; |
1441 | |
1442 | if (!desc) |
1443 | return -EINVAL; |
1444 | |
1445 | if (desc->irq_data.chip == &no_irq_chip) |
1446 | return -ENOSYS; |
1447 | if (!try_module_get(module: desc->owner)) |
1448 | return -ENODEV; |
1449 | |
1450 | new->irq = irq; |
1451 | |
1452 | /* |
1453 | * If the trigger type is not specified by the caller, |
1454 | * then use the default for this interrupt. |
1455 | */ |
1456 | if (!(new->flags & IRQF_TRIGGER_MASK)) |
1457 | new->flags |= irqd_get_trigger_type(d: &desc->irq_data); |
1458 | |
1459 | /* |
1460 | * Check whether the interrupt nests into another interrupt |
1461 | * thread. |
1462 | */ |
1463 | nested = irq_settings_is_nested_thread(desc); |
1464 | if (nested) { |
1465 | if (!new->thread_fn) { |
1466 | ret = -EINVAL; |
1467 | goto out_mput; |
1468 | } |
1469 | /* |
1470 | * Replace the primary handler which was provided from |
1471 | * the driver for non nested interrupt handling by the |
1472 | * dummy function which warns when called. |
1473 | */ |
1474 | new->handler = irq_nested_primary_handler; |
1475 | } else { |
1476 | if (irq_settings_can_thread(desc)) { |
1477 | ret = irq_setup_forced_threading(new); |
1478 | if (ret) |
1479 | goto out_mput; |
1480 | } |
1481 | } |
1482 | |
1483 | /* |
1484 | * Create a handler thread when a thread function is supplied |
1485 | * and the interrupt does not nest into another interrupt |
1486 | * thread. |
1487 | */ |
1488 | if (new->thread_fn && !nested) { |
1489 | ret = setup_irq_thread(new, irq, secondary: false); |
1490 | if (ret) |
1491 | goto out_mput; |
1492 | if (new->secondary) { |
1493 | ret = setup_irq_thread(new: new->secondary, irq, secondary: true); |
1494 | if (ret) |
1495 | goto out_thread; |
1496 | } |
1497 | } |
1498 | |
1499 | /* |
1500 | * Drivers are often written to work w/o knowledge about the |
1501 | * underlying irq chip implementation, so a request for a |
1502 | * threaded irq without a primary hard irq context handler |
1503 | * requires the ONESHOT flag to be set. Some irq chips like |
1504 | * MSI based interrupts are per se one shot safe. Check the |
1505 | * chip flags, so we can avoid the unmask dance at the end of |
1506 | * the threaded handler for those. |
1507 | */ |
1508 | if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE) |
1509 | new->flags &= ~IRQF_ONESHOT; |
1510 | |
1511 | /* |
1512 | * Protects against a concurrent __free_irq() call which might wait |
1513 | * for synchronize_hardirq() to complete without holding the optional |
1514 | * chip bus lock and desc->lock. Also protects against handing out |
1515 | * a recycled oneshot thread_mask bit while it's still in use by |
1516 | * its previous owner. |
1517 | */ |
1518 | mutex_lock(&desc->request_mutex); |
1519 | |
1520 | /* |
1521 | * Acquire bus lock as the irq_request_resources() callback below |
1522 | * might rely on the serialization or the magic power management |
1523 | * functions which are abusing the irq_bus_lock() callback, |
1524 | */ |
1525 | chip_bus_lock(desc); |
1526 | |
1527 | /* First installed action requests resources. */ |
1528 | if (!desc->action) { |
1529 | ret = irq_request_resources(desc); |
1530 | if (ret) { |
1531 | pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n", |
1532 | new->name, irq, desc->irq_data.chip->name); |
1533 | goto out_bus_unlock; |
1534 | } |
1535 | } |
1536 | |
1537 | /* |
1538 | * The following block of code has to be executed atomically |
1539 | * protected against a concurrent interrupt and any of the other |
1540 | * management calls which are not serialized via |
1541 | * desc->request_mutex or the optional bus lock. |
1542 | */ |
1543 | raw_spin_lock_irqsave(&desc->lock, flags); |
1544 | old_ptr = &desc->action; |
1545 | old = *old_ptr; |
1546 | if (old) { |
1547 | /* |
1548 | * Can't share interrupts unless both agree to and are |
1549 | * the same type (level, edge, polarity). So both flag |
1550 | * fields must have IRQF_SHARED set and the bits which |
1551 | * set the trigger type must match. Also all must |
1552 | * agree on ONESHOT. |
1553 | * Interrupt lines used for NMIs cannot be shared. |
1554 | */ |
1555 | unsigned int oldtype; |
1556 | |
1557 | if (irq_is_nmi(desc)) { |
1558 | pr_err("Invalid attempt to share NMI for %s (irq %d) on irqchip %s.\n", |
1559 | new->name, irq, desc->irq_data.chip->name); |
1560 | ret = -EINVAL; |
1561 | goto out_unlock; |
1562 | } |
1563 | |
1564 | /* |
1565 | * If nobody did set the configuration before, inherit |
1566 | * the one provided by the requester. |
1567 | */ |
1568 | if (irqd_trigger_type_was_set(d: &desc->irq_data)) { |
1569 | oldtype = irqd_get_trigger_type(d: &desc->irq_data); |
1570 | } else { |
1571 | oldtype = new->flags & IRQF_TRIGGER_MASK; |
1572 | irqd_set_trigger_type(d: &desc->irq_data, type: oldtype); |
1573 | } |
1574 | |
1575 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
1576 | (oldtype != (new->flags & IRQF_TRIGGER_MASK))) |
1577 | goto mismatch; |
1578 | |
1579 | if ((old->flags & IRQF_ONESHOT) && |
1580 | (new->flags & IRQF_COND_ONESHOT)) |
1581 | new->flags |= IRQF_ONESHOT; |
1582 | else if ((old->flags ^ new->flags) & IRQF_ONESHOT) |
1583 | goto mismatch; |
1584 | |
1585 | /* All handlers must agree on per-cpuness */ |
1586 | if ((old->flags & IRQF_PERCPU) != |
1587 | (new->flags & IRQF_PERCPU)) |
1588 | goto mismatch; |
1589 | |
1590 | /* add new interrupt at end of irq queue */ |
1591 | do { |
1592 | /* |
1593 | * Or all existing action->thread_mask bits, |
1594 | * so we can find the next zero bit for this |
1595 | * new action. |
1596 | */ |
1597 | thread_mask |= old->thread_mask; |
1598 | old_ptr = &old->next; |
1599 | old = *old_ptr; |
1600 | } while (old); |
1601 | shared = 1; |
1602 | } |
1603 | |
1604 | /* |
1605 | * Setup the thread mask for this irqaction for ONESHOT. For |
1606 | * !ONESHOT irqs the thread mask is 0 so we can avoid a |
1607 | * conditional in irq_wake_thread(). |
1608 | */ |
1609 | if (new->flags & IRQF_ONESHOT) { |
1610 | /* |
1611 | * Unlikely to have 32 resp 64 irqs sharing one line, |
1612 | * but who knows. |
1613 | */ |
1614 | if (thread_mask == ~0UL) { |
1615 | ret = -EBUSY; |
1616 | goto out_unlock; |
1617 | } |
1618 | /* |
1619 | * The thread_mask for the action is or'ed to |
1620 | * desc->thread_active to indicate that the |
1621 | * IRQF_ONESHOT thread handler has been woken, but not |
1622 | * yet finished. The bit is cleared when a thread |
1623 | * completes. When all threads of a shared interrupt |
1624 | * line have completed desc->threads_active becomes |
1625 | * zero and the interrupt line is unmasked. See |
1626 | * handle.c:irq_wake_thread() for further information. |
1627 | * |
1628 | * If no thread is woken by primary (hard irq context) |
1629 | * interrupt handlers, then desc->threads_active is |
1630 | * also checked for zero to unmask the irq line in the |
1631 | * affected hard irq flow handlers |
1632 | * (handle_[fasteoi|level]_irq). |
1633 | * |
1634 | * The new action gets the first zero bit of |
1635 | * thread_mask assigned. See the loop above which or's |
1636 | * all existing action->thread_mask bits. |
1637 | */ |
1638 | new->thread_mask = 1UL << ffz(thread_mask); |
1639 | |
1640 | } else if (new->handler == irq_default_primary_handler && |
1641 | !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) { |
1642 | /* |
1643 | * The interrupt was requested with handler = NULL, so |
1644 | * we use the default primary handler for it. But it |
1645 | * does not have the oneshot flag set. In combination |
1646 | * with level interrupts this is deadly, because the |
1647 | * default primary handler just wakes the thread, then |
1648 | * the irq lines is reenabled, but the device still |
1649 | * has the level irq asserted. Rinse and repeat.... |
1650 | * |
1651 | * While this works for edge type interrupts, we play |
1652 | * it safe and reject unconditionally because we can't |
1653 | * say for sure which type this interrupt really |
1654 | * has. The type flags are unreliable as the |
1655 | * underlying chip implementation can override them. |
1656 | */ |
1657 | pr_err("Threaded irq requested with handler=NULL and !ONESHOT for %s (irq %d)\n", |
1658 | new->name, irq); |
1659 | ret = -EINVAL; |
1660 | goto out_unlock; |
1661 | } |
1662 | |
1663 | if (!shared) { |
1664 | /* Setup the type (level, edge polarity) if configured: */ |
1665 | if (new->flags & IRQF_TRIGGER_MASK) { |
1666 | ret = __irq_set_trigger(desc, |
1667 | flags: new->flags & IRQF_TRIGGER_MASK); |
1668 | |
1669 | if (ret) |
1670 | goto out_unlock; |
1671 | } |
1672 | |
1673 | /* |
1674 | * Activate the interrupt. That activation must happen |
1675 | * independently of IRQ_NOAUTOEN. request_irq() can fail |
1676 | * and the callers are supposed to handle |
1677 | * that. enable_irq() of an interrupt requested with |
1678 | * IRQ_NOAUTOEN is not supposed to fail. The activation |
1679 | * keeps it in shutdown mode, it merily associates |
1680 | * resources if necessary and if that's not possible it |
1681 | * fails. Interrupts which are in managed shutdown mode |
1682 | * will simply ignore that activation request. |
1683 | */ |
1684 | ret = irq_activate(desc); |
1685 | if (ret) |
1686 | goto out_unlock; |
1687 | |
1688 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
1689 | IRQS_ONESHOT | IRQS_WAITING); |
1690 | irqd_clear(d: &desc->irq_data, mask: IRQD_IRQ_INPROGRESS); |
1691 | |
1692 | if (new->flags & IRQF_PERCPU) { |
1693 | irqd_set(d: &desc->irq_data, mask: IRQD_PER_CPU); |
1694 | irq_settings_set_per_cpu(desc); |
1695 | if (new->flags & IRQF_NO_DEBUG) |
1696 | irq_settings_set_no_debug(desc); |
1697 | } |
1698 | |
1699 | if (noirqdebug) |
1700 | irq_settings_set_no_debug(desc); |
1701 | |
1702 | if (new->flags & IRQF_ONESHOT) |
1703 | desc->istate |= IRQS_ONESHOT; |
1704 | |
1705 | /* Exclude IRQ from balancing if requested */ |
1706 | if (new->flags & IRQF_NOBALANCING) { |
1707 | irq_settings_set_no_balancing(desc); |
1708 | irqd_set(d: &desc->irq_data, mask: IRQD_NO_BALANCING); |
1709 | } |
1710 | |
1711 | if (!(new->flags & IRQF_NO_AUTOEN) && |
1712 | irq_settings_can_autoenable(desc)) { |
1713 | irq_startup(desc, IRQ_RESEND, IRQ_START_COND); |
1714 | } else { |
1715 | /* |
1716 | * Shared interrupts do not go well with disabling |
1717 | * auto enable. The sharing interrupt might request |
1718 | * it while it's still disabled and then wait for |
1719 | * interrupts forever. |
1720 | */ |
1721 | WARN_ON_ONCE(new->flags & IRQF_SHARED); |
1722 | /* Undo nested disables: */ |
1723 | desc->depth = 1; |
1724 | } |
1725 | |
1726 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
1727 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; |
1728 | unsigned int omsk = irqd_get_trigger_type(d: &desc->irq_data); |
1729 | |
1730 | if (nmsk != omsk) |
1731 | /* hope the handler works with current trigger mode */ |
1732 | pr_warn("irq %d uses trigger mode %u; requested %u\n", |
1733 | irq, omsk, nmsk); |
1734 | } |
1735 | |
1736 | *old_ptr = new; |
1737 | |
1738 | irq_pm_install_action(desc, action: new); |
1739 | |
1740 | /* Reset broken irq detection when installing new handler */ |
1741 | desc->irq_count = 0; |
1742 | desc->irqs_unhandled = 0; |
1743 | |
1744 | /* |
1745 | * Check whether we disabled the irq via the spurious handler |
1746 | * before. Reenable it and give it another chance. |
1747 | */ |
1748 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
1749 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; |
1750 | __enable_irq(desc); |
1751 | } |
1752 | |
1753 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1754 | chip_bus_sync_unlock(desc); |
1755 | mutex_unlock(lock: &desc->request_mutex); |
1756 | |
1757 | irq_setup_timings(desc, act: new); |
1758 | |
1759 | wake_up_and_wait_for_irq_thread_ready(desc, action: new); |
1760 | wake_up_and_wait_for_irq_thread_ready(desc, action: new->secondary); |
1761 | |
1762 | register_irq_proc(irq, desc); |
1763 | new->dir = NULL; |
1764 | register_handler_proc(irq, action: new); |
1765 | return 0; |
1766 | |
1767 | mismatch: |
1768 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
1769 | pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n", |
1770 | irq, new->flags, new->name, old->flags, old->name); |
1771 | #ifdef CONFIG_DEBUG_SHIRQ |
1772 | dump_stack(); |
1773 | #endif |
1774 | } |
1775 | ret = -EBUSY; |
1776 | |
1777 | out_unlock: |
1778 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1779 | |
1780 | if (!desc->action) |
1781 | irq_release_resources(desc); |
1782 | out_bus_unlock: |
1783 | chip_bus_sync_unlock(desc); |
1784 | mutex_unlock(lock: &desc->request_mutex); |
1785 | |
1786 | out_thread: |
1787 | if (new->thread) { |
1788 | struct task_struct *t = new->thread; |
1789 | |
1790 | new->thread = NULL; |
1791 | kthread_stop_put(k: t); |
1792 | } |
1793 | if (new->secondary && new->secondary->thread) { |
1794 | struct task_struct *t = new->secondary->thread; |
1795 | |
1796 | new->secondary->thread = NULL; |
1797 | kthread_stop_put(k: t); |
1798 | } |
1799 | out_mput: |
1800 | module_put(module: desc->owner); |
1801 | return ret; |
1802 | } |
1803 | |
1804 | /* |
1805 | * Internal function to unregister an irqaction - used to free |
1806 | * regular and special interrupts that are part of the architecture. |
1807 | */ |
1808 | static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id) |
1809 | { |
1810 | unsigned irq = desc->irq_data.irq; |
1811 | struct irqaction *action, **action_ptr; |
1812 | unsigned long flags; |
1813 | |
1814 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
1815 | |
1816 | mutex_lock(&desc->request_mutex); |
1817 | chip_bus_lock(desc); |
1818 | raw_spin_lock_irqsave(&desc->lock, flags); |
1819 | |
1820 | /* |
1821 | * There can be multiple actions per IRQ descriptor, find the right |
1822 | * one based on the dev_id: |
1823 | */ |
1824 | action_ptr = &desc->action; |
1825 | for (;;) { |
1826 | action = *action_ptr; |
1827 | |
1828 | if (!action) { |
1829 | WARN(1, "Trying to free already-free IRQ %d\n", irq); |
1830 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1831 | chip_bus_sync_unlock(desc); |
1832 | mutex_unlock(lock: &desc->request_mutex); |
1833 | return NULL; |
1834 | } |
1835 | |
1836 | if (action->dev_id == dev_id) |
1837 | break; |
1838 | action_ptr = &action->next; |
1839 | } |
1840 | |
1841 | /* Found it - now remove it from the list of entries: */ |
1842 | *action_ptr = action->next; |
1843 | |
1844 | irq_pm_remove_action(desc, action); |
1845 | |
1846 | /* If this was the last handler, shut down the IRQ line: */ |
1847 | if (!desc->action) { |
1848 | irq_settings_clr_disable_unlazy(desc); |
1849 | /* Only shutdown. Deactivate after synchronize_hardirq() */ |
1850 | irq_shutdown(desc); |
1851 | } |
1852 | |
1853 | #ifdef CONFIG_SMP |
1854 | /* make sure affinity_hint is cleaned up */ |
1855 | if (WARN_ON_ONCE(desc->affinity_hint)) |
1856 | desc->affinity_hint = NULL; |
1857 | #endif |
1858 | |
1859 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1860 | /* |
1861 | * Drop bus_lock here so the changes which were done in the chip |
1862 | * callbacks above are synced out to the irq chips which hang |
1863 | * behind a slow bus (I2C, SPI) before calling synchronize_hardirq(). |
1864 | * |
1865 | * Aside of that the bus_lock can also be taken from the threaded |
1866 | * handler in irq_finalize_oneshot() which results in a deadlock |
1867 | * because kthread_stop() would wait forever for the thread to |
1868 | * complete, which is blocked on the bus lock. |
1869 | * |
1870 | * The still held desc->request_mutex() protects against a |
1871 | * concurrent request_irq() of this irq so the release of resources |
1872 | * and timing data is properly serialized. |
1873 | */ |
1874 | chip_bus_sync_unlock(desc); |
1875 | |
1876 | unregister_handler_proc(irq, action); |
1877 | |
1878 | /* |
1879 | * Make sure it's not being used on another CPU and if the chip |
1880 | * supports it also make sure that there is no (not yet serviced) |
1881 | * interrupt in flight at the hardware level. |
1882 | */ |
1883 | __synchronize_irq(desc); |
1884 | |
1885 | #ifdef CONFIG_DEBUG_SHIRQ |
1886 | /* |
1887 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ |
1888 | * event to happen even now it's being freed, so let's make sure that |
1889 | * is so by doing an extra call to the handler .... |
1890 | * |
1891 | * ( We do this after actually deregistering it, to make sure that a |
1892 | * 'real' IRQ doesn't run in parallel with our fake. ) |
1893 | */ |
1894 | if (action->flags & IRQF_SHARED) { |
1895 | local_irq_save(flags); |
1896 | action->handler(irq, dev_id); |
1897 | local_irq_restore(flags); |
1898 | } |
1899 | #endif |
1900 | |
1901 | /* |
1902 | * The action has already been removed above, but the thread writes |
1903 | * its oneshot mask bit when it completes. Though request_mutex is |
1904 | * held across this which prevents __setup_irq() from handing out |
1905 | * the same bit to a newly requested action. |
1906 | */ |
1907 | if (action->thread) { |
1908 | kthread_stop_put(k: action->thread); |
1909 | if (action->secondary && action->secondary->thread) |
1910 | kthread_stop_put(k: action->secondary->thread); |
1911 | } |
1912 | |
1913 | /* Last action releases resources */ |
1914 | if (!desc->action) { |
1915 | /* |
1916 | * Reacquire bus lock as irq_release_resources() might |
1917 | * require it to deallocate resources over the slow bus. |
1918 | */ |
1919 | chip_bus_lock(desc); |
1920 | /* |
1921 | * There is no interrupt on the fly anymore. Deactivate it |
1922 | * completely. |
1923 | */ |
1924 | scoped_guard(raw_spinlock_irqsave, &desc->lock) |
1925 | irq_domain_deactivate_irq(irq_data: &desc->irq_data); |
1926 | |
1927 | irq_release_resources(desc); |
1928 | chip_bus_sync_unlock(desc); |
1929 | irq_remove_timings(desc); |
1930 | } |
1931 | |
1932 | mutex_unlock(lock: &desc->request_mutex); |
1933 | |
1934 | irq_chip_pm_put(data: &desc->irq_data); |
1935 | module_put(module: desc->owner); |
1936 | kfree(objp: action->secondary); |
1937 | return action; |
1938 | } |
1939 | |
1940 | /** |
1941 | * free_irq - free an interrupt allocated with request_irq |
1942 | * @irq: Interrupt line to free |
1943 | * @dev_id: Device identity to free |
1944 | * |
1945 | * Remove an interrupt handler. The handler is removed and if the interrupt |
1946 | * line is no longer in use by any driver it is disabled. On a shared IRQ |
1947 | * the caller must ensure the interrupt is disabled on the card it drives |
1948 | * before calling this function. The function does not return until any |
1949 | * executing interrupts for this IRQ have completed. |
1950 | * |
1951 | * This function must not be called from interrupt context. |
1952 | * |
1953 | * Returns the devname argument passed to request_irq. |
1954 | */ |
1955 | const void *free_irq(unsigned int irq, void *dev_id) |
1956 | { |
1957 | struct irq_desc *desc = irq_to_desc(irq); |
1958 | struct irqaction *action; |
1959 | const char *devname; |
1960 | |
1961 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
1962 | return NULL; |
1963 | |
1964 | #ifdef CONFIG_SMP |
1965 | if (WARN_ON(desc->affinity_notify)) |
1966 | desc->affinity_notify = NULL; |
1967 | #endif |
1968 | |
1969 | action = __free_irq(desc, dev_id); |
1970 | |
1971 | if (!action) |
1972 | return NULL; |
1973 | |
1974 | devname = action->name; |
1975 | kfree(objp: action); |
1976 | return devname; |
1977 | } |
1978 | EXPORT_SYMBOL(free_irq); |
1979 | |
1980 | /* This function must be called with desc->lock held */ |
1981 | static const void *__cleanup_nmi(unsigned int irq, struct irq_desc *desc) |
1982 | { |
1983 | const char *devname = NULL; |
1984 | |
1985 | desc->istate &= ~IRQS_NMI; |
1986 | |
1987 | if (!WARN_ON(desc->action == NULL)) { |
1988 | irq_pm_remove_action(desc, action: desc->action); |
1989 | devname = desc->action->name; |
1990 | unregister_handler_proc(irq, action: desc->action); |
1991 | |
1992 | kfree(objp: desc->action); |
1993 | desc->action = NULL; |
1994 | } |
1995 | |
1996 | irq_settings_clr_disable_unlazy(desc); |
1997 | irq_shutdown_and_deactivate(desc); |
1998 | |
1999 | irq_release_resources(desc); |
2000 | |
2001 | irq_chip_pm_put(data: &desc->irq_data); |
2002 | module_put(module: desc->owner); |
2003 | |
2004 | return devname; |
2005 | } |
2006 | |
2007 | const void *free_nmi(unsigned int irq, void *dev_id) |
2008 | { |
2009 | struct irq_desc *desc = irq_to_desc(irq); |
2010 | |
2011 | if (!desc || WARN_ON(!irq_is_nmi(desc))) |
2012 | return NULL; |
2013 | |
2014 | if (WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
2015 | return NULL; |
2016 | |
2017 | /* NMI still enabled */ |
2018 | if (WARN_ON(desc->depth == 0)) |
2019 | disable_nmi_nosync(irq); |
2020 | |
2021 | guard(raw_spinlock_irqsave)(l: &desc->lock); |
2022 | irq_nmi_teardown(desc); |
2023 | return __cleanup_nmi(irq, desc); |
2024 | } |
2025 | |
2026 | /** |
2027 | * request_threaded_irq - allocate an interrupt line |
2028 | * @irq: Interrupt line to allocate |
2029 | * @handler: Function to be called when the IRQ occurs. |
2030 | * Primary handler for threaded interrupts. |
2031 | * If handler is NULL and thread_fn != NULL |
2032 | * the default primary handler is installed. |
2033 | * @thread_fn: Function called from the irq handler thread |
2034 | * If NULL, no irq thread is created |
2035 | * @irqflags: Interrupt type flags |
2036 | * @devname: An ascii name for the claiming device |
2037 | * @dev_id: A cookie passed back to the handler function |
2038 | * |
2039 | * This call allocates interrupt resources and enables the interrupt line |
2040 | * and IRQ handling. From the point this call is made your handler function |
2041 | * may be invoked. Since your handler function must clear any interrupt the |
2042 | * board raises, you must take care both to initialise your hardware and to |
2043 | * set up the interrupt handler in the right order. |
2044 | * |
2045 | * If you want to set up a threaded irq handler for your device then you |
2046 | * need to supply @handler and @thread_fn. @handler is still called in hard |
2047 | * interrupt context and has to check whether the interrupt originates from |
2048 | * the device. If yes it needs to disable the interrupt on the device and |
2049 | * return IRQ_WAKE_THREAD which will wake up the handler thread and run |
2050 | * @thread_fn. This split handler design is necessary to support shared |
2051 | * interrupts. |
2052 | * |
2053 | * @dev_id must be globally unique. Normally the address of the device data |
2054 | * structure is used as the cookie. Since the handler receives this value |
2055 | * it makes sense to use it. |
2056 | * |
2057 | * If your interrupt is shared you must pass a non NULL dev_id as this is |
2058 | * required when freeing the interrupt. |
2059 | * |
2060 | * Flags: |
2061 | * |
2062 | * IRQF_SHARED Interrupt is shared |
2063 | * IRQF_TRIGGER_* Specify active edge(s) or level |
2064 | * IRQF_ONESHOT Run thread_fn with interrupt line masked |
2065 | */ |
2066 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
2067 | irq_handler_t thread_fn, unsigned long irqflags, |
2068 | const char *devname, void *dev_id) |
2069 | { |
2070 | struct irqaction *action; |
2071 | struct irq_desc *desc; |
2072 | int retval; |
2073 | |
2074 | if (irq == IRQ_NOTCONNECTED) |
2075 | return -ENOTCONN; |
2076 | |
2077 | /* |
2078 | * Sanity-check: shared interrupts must pass in a real dev-ID, |
2079 | * otherwise we'll have trouble later trying to figure out |
2080 | * which interrupt is which (messes up the interrupt freeing |
2081 | * logic etc). |
2082 | * |
2083 | * Also shared interrupts do not go well with disabling auto enable. |
2084 | * The sharing interrupt might request it while it's still disabled |
2085 | * and then wait for interrupts forever. |
2086 | * |
2087 | * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and |
2088 | * it cannot be set along with IRQF_NO_SUSPEND. |
2089 | */ |
2090 | if (((irqflags & IRQF_SHARED) && !dev_id) || |
2091 | ((irqflags & IRQF_SHARED) && (irqflags & IRQF_NO_AUTOEN)) || |
2092 | (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) || |
2093 | ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND))) |
2094 | return -EINVAL; |
2095 | |
2096 | desc = irq_to_desc(irq); |
2097 | if (!desc) |
2098 | return -EINVAL; |
2099 | |
2100 | if (!irq_settings_can_request(desc) || |
2101 | WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
2102 | return -EINVAL; |
2103 | |
2104 | if (!handler) { |
2105 | if (!thread_fn) |
2106 | return -EINVAL; |
2107 | handler = irq_default_primary_handler; |
2108 | } |
2109 | |
2110 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
2111 | if (!action) |
2112 | return -ENOMEM; |
2113 | |
2114 | action->handler = handler; |
2115 | action->thread_fn = thread_fn; |
2116 | action->flags = irqflags; |
2117 | action->name = devname; |
2118 | action->dev_id = dev_id; |
2119 | |
2120 | retval = irq_chip_pm_get(data: &desc->irq_data); |
2121 | if (retval < 0) { |
2122 | kfree(objp: action); |
2123 | return retval; |
2124 | } |
2125 | |
2126 | retval = __setup_irq(irq, desc, new: action); |
2127 | |
2128 | if (retval) { |
2129 | irq_chip_pm_put(data: &desc->irq_data); |
2130 | kfree(objp: action->secondary); |
2131 | kfree(objp: action); |
2132 | } |
2133 | |
2134 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
2135 | if (!retval && (irqflags & IRQF_SHARED)) { |
2136 | /* |
2137 | * It's a shared IRQ -- the driver ought to be prepared for it |
2138 | * to happen immediately, so let's make sure.... |
2139 | * We disable the irq to make sure that a 'real' IRQ doesn't |
2140 | * run in parallel with our fake. |
2141 | */ |
2142 | unsigned long flags; |
2143 | |
2144 | disable_irq(irq); |
2145 | local_irq_save(flags); |
2146 | |
2147 | handler(irq, dev_id); |
2148 | |
2149 | local_irq_restore(flags); |
2150 | enable_irq(irq); |
2151 | } |
2152 | #endif |
2153 | return retval; |
2154 | } |
2155 | EXPORT_SYMBOL(request_threaded_irq); |
2156 | |
2157 | /** |
2158 | * request_any_context_irq - allocate an interrupt line |
2159 | * @irq: Interrupt line to allocate |
2160 | * @handler: Function to be called when the IRQ occurs. |
2161 | * Threaded handler for threaded interrupts. |
2162 | * @flags: Interrupt type flags |
2163 | * @name: An ascii name for the claiming device |
2164 | * @dev_id: A cookie passed back to the handler function |
2165 | * |
2166 | * This call allocates interrupt resources and enables the interrupt line |
2167 | * and IRQ handling. It selects either a hardirq or threaded handling |
2168 | * method depending on the context. |
2169 | * |
2170 | * Returns: On failure, it returns a negative value. On success, it returns either |
2171 | * IRQC_IS_HARDIRQ or IRQC_IS_NESTED. |
2172 | */ |
2173 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, |
2174 | unsigned long flags, const char *name, void *dev_id) |
2175 | { |
2176 | struct irq_desc *desc; |
2177 | int ret; |
2178 | |
2179 | if (irq == IRQ_NOTCONNECTED) |
2180 | return -ENOTCONN; |
2181 | |
2182 | desc = irq_to_desc(irq); |
2183 | if (!desc) |
2184 | return -EINVAL; |
2185 | |
2186 | if (irq_settings_is_nested_thread(desc)) { |
2187 | ret = request_threaded_irq(irq, NULL, handler, |
2188 | flags, name, dev_id); |
2189 | return !ret ? IRQC_IS_NESTED : ret; |
2190 | } |
2191 | |
2192 | ret = request_irq(irq, handler, flags, name, dev: dev_id); |
2193 | return !ret ? IRQC_IS_HARDIRQ : ret; |
2194 | } |
2195 | EXPORT_SYMBOL_GPL(request_any_context_irq); |
2196 | |
2197 | /** |
2198 | * request_nmi - allocate an interrupt line for NMI delivery |
2199 | * @irq: Interrupt line to allocate |
2200 | * @handler: Function to be called when the IRQ occurs. |
2201 | * Threaded handler for threaded interrupts. |
2202 | * @irqflags: Interrupt type flags |
2203 | * @name: An ascii name for the claiming device |
2204 | * @dev_id: A cookie passed back to the handler function |
2205 | * |
2206 | * This call allocates interrupt resources and enables the interrupt line |
2207 | * and IRQ handling. It sets up the IRQ line to be handled as an NMI. |
2208 | * |
2209 | * An interrupt line delivering NMIs cannot be shared and IRQ handling |
2210 | * cannot be threaded. |
2211 | * |
2212 | * Interrupt lines requested for NMI delivering must produce per cpu |
2213 | * interrupts and have auto enabling setting disabled. |
2214 | * |
2215 | * @dev_id must be globally unique. Normally the address of the device data |
2216 | * structure is used as the cookie. Since the handler receives this value |
2217 | * it makes sense to use it. |
2218 | * |
2219 | * If the interrupt line cannot be used to deliver NMIs, function will fail |
2220 | * and return a negative value. |
2221 | */ |
2222 | int request_nmi(unsigned int irq, irq_handler_t handler, |
2223 | unsigned long irqflags, const char *name, void *dev_id) |
2224 | { |
2225 | struct irqaction *action; |
2226 | struct irq_desc *desc; |
2227 | int retval; |
2228 | |
2229 | if (irq == IRQ_NOTCONNECTED) |
2230 | return -ENOTCONN; |
2231 | |
2232 | /* NMI cannot be shared, used for Polling */ |
2233 | if (irqflags & (IRQF_SHARED | IRQF_COND_SUSPEND | IRQF_IRQPOLL)) |
2234 | return -EINVAL; |
2235 | |
2236 | if (!(irqflags & IRQF_PERCPU)) |
2237 | return -EINVAL; |
2238 | |
2239 | if (!handler) |
2240 | return -EINVAL; |
2241 | |
2242 | desc = irq_to_desc(irq); |
2243 | |
2244 | if (!desc || (irq_settings_can_autoenable(desc) && |
2245 | !(irqflags & IRQF_NO_AUTOEN)) || |
2246 | !irq_settings_can_request(desc) || |
2247 | WARN_ON(irq_settings_is_per_cpu_devid(desc)) || |
2248 | !irq_supports_nmi(desc)) |
2249 | return -EINVAL; |
2250 | |
2251 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
2252 | if (!action) |
2253 | return -ENOMEM; |
2254 | |
2255 | action->handler = handler; |
2256 | action->flags = irqflags | IRQF_NO_THREAD | IRQF_NOBALANCING; |
2257 | action->name = name; |
2258 | action->dev_id = dev_id; |
2259 | |
2260 | retval = irq_chip_pm_get(data: &desc->irq_data); |
2261 | if (retval < 0) |
2262 | goto err_out; |
2263 | |
2264 | retval = __setup_irq(irq, desc, new: action); |
2265 | if (retval) |
2266 | goto err_irq_setup; |
2267 | |
2268 | scoped_guard(raw_spinlock_irqsave, &desc->lock) { |
2269 | /* Setup NMI state */ |
2270 | desc->istate |= IRQS_NMI; |
2271 | retval = irq_nmi_setup(desc); |
2272 | if (retval) { |
2273 | __cleanup_nmi(irq, desc); |
2274 | return -EINVAL; |
2275 | } |
2276 | return 0; |
2277 | } |
2278 | |
2279 | err_irq_setup: |
2280 | irq_chip_pm_put(data: &desc->irq_data); |
2281 | err_out: |
2282 | kfree(objp: action); |
2283 | |
2284 | return retval; |
2285 | } |
2286 | |
2287 | void enable_percpu_irq(unsigned int irq, unsigned int type) |
2288 | { |
2289 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_PERCPU) { |
2290 | struct irq_desc *desc = scoped_irqdesc; |
2291 | |
2292 | /* |
2293 | * If the trigger type is not specified by the caller, then |
2294 | * use the default for this interrupt. |
2295 | */ |
2296 | type &= IRQ_TYPE_SENSE_MASK; |
2297 | if (type == IRQ_TYPE_NONE) |
2298 | type = irqd_get_trigger_type(d: &desc->irq_data); |
2299 | |
2300 | if (type != IRQ_TYPE_NONE) { |
2301 | if (__irq_set_trigger(desc, flags: type)) { |
2302 | WARN(1, "failed to set type for IRQ%d\n", irq); |
2303 | return; |
2304 | } |
2305 | } |
2306 | irq_percpu_enable(desc, smp_processor_id()); |
2307 | } |
2308 | } |
2309 | EXPORT_SYMBOL_GPL(enable_percpu_irq); |
2310 | |
2311 | void enable_percpu_nmi(unsigned int irq, unsigned int type) |
2312 | { |
2313 | enable_percpu_irq(irq, type); |
2314 | } |
2315 | |
2316 | /** |
2317 | * irq_percpu_is_enabled - Check whether the per cpu irq is enabled |
2318 | * @irq: Linux irq number to check for |
2319 | * |
2320 | * Must be called from a non migratable context. Returns the enable |
2321 | * state of a per cpu interrupt on the current cpu. |
2322 | */ |
2323 | bool irq_percpu_is_enabled(unsigned int irq) |
2324 | { |
2325 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_PERCPU) |
2326 | return cpumask_test_cpu(smp_processor_id(), scoped_irqdesc->percpu_enabled); |
2327 | return false; |
2328 | } |
2329 | EXPORT_SYMBOL_GPL(irq_percpu_is_enabled); |
2330 | |
2331 | void disable_percpu_irq(unsigned int irq) |
2332 | { |
2333 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_PERCPU) |
2334 | irq_percpu_disable(scoped_irqdesc, smp_processor_id()); |
2335 | } |
2336 | EXPORT_SYMBOL_GPL(disable_percpu_irq); |
2337 | |
2338 | void disable_percpu_nmi(unsigned int irq) |
2339 | { |
2340 | disable_percpu_irq(irq); |
2341 | } |
2342 | |
2343 | /* |
2344 | * Internal function to unregister a percpu irqaction. |
2345 | */ |
2346 | static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id) |
2347 | { |
2348 | struct irq_desc *desc = irq_to_desc(irq); |
2349 | struct irqaction *action; |
2350 | |
2351 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
2352 | |
2353 | if (!desc) |
2354 | return NULL; |
2355 | |
2356 | scoped_guard(raw_spinlock_irqsave, &desc->lock) { |
2357 | action = desc->action; |
2358 | if (!action || action->percpu_dev_id != dev_id) { |
2359 | WARN(1, "Trying to free already-free IRQ %d\n", irq); |
2360 | return NULL; |
2361 | } |
2362 | |
2363 | if (!cpumask_empty(srcp: desc->percpu_enabled)) { |
2364 | WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", |
2365 | irq, cpumask_first(desc->percpu_enabled)); |
2366 | return NULL; |
2367 | } |
2368 | |
2369 | /* Found it - now remove it from the list of entries: */ |
2370 | desc->action = NULL; |
2371 | desc->istate &= ~IRQS_NMI; |
2372 | } |
2373 | |
2374 | unregister_handler_proc(irq, action); |
2375 | irq_chip_pm_put(data: &desc->irq_data); |
2376 | module_put(module: desc->owner); |
2377 | return action; |
2378 | } |
2379 | |
2380 | /** |
2381 | * free_percpu_irq - free an interrupt allocated with request_percpu_irq |
2382 | * @irq: Interrupt line to free |
2383 | * @dev_id: Device identity to free |
2384 | * |
2385 | * Remove a percpu interrupt handler. The handler is removed, but the |
2386 | * interrupt line is not disabled. This must be done on each CPU before |
2387 | * calling this function. The function does not return until any executing |
2388 | * interrupts for this IRQ have completed. |
2389 | * |
2390 | * This function must not be called from interrupt context. |
2391 | */ |
2392 | void free_percpu_irq(unsigned int irq, void __percpu *dev_id) |
2393 | { |
2394 | struct irq_desc *desc = irq_to_desc(irq); |
2395 | |
2396 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) |
2397 | return; |
2398 | |
2399 | chip_bus_lock(desc); |
2400 | kfree(objp: __free_percpu_irq(irq, dev_id)); |
2401 | chip_bus_sync_unlock(desc); |
2402 | } |
2403 | EXPORT_SYMBOL_GPL(free_percpu_irq); |
2404 | |
2405 | void free_percpu_nmi(unsigned int irq, void __percpu *dev_id) |
2406 | { |
2407 | struct irq_desc *desc = irq_to_desc(irq); |
2408 | |
2409 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) |
2410 | return; |
2411 | |
2412 | if (WARN_ON(!irq_is_nmi(desc))) |
2413 | return; |
2414 | |
2415 | kfree(objp: __free_percpu_irq(irq, dev_id)); |
2416 | } |
2417 | |
2418 | /** |
2419 | * setup_percpu_irq - setup a per-cpu interrupt |
2420 | * @irq: Interrupt line to setup |
2421 | * @act: irqaction for the interrupt |
2422 | * |
2423 | * Used to statically setup per-cpu interrupts in the early boot process. |
2424 | */ |
2425 | int setup_percpu_irq(unsigned int irq, struct irqaction *act) |
2426 | { |
2427 | struct irq_desc *desc = irq_to_desc(irq); |
2428 | int retval; |
2429 | |
2430 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) |
2431 | return -EINVAL; |
2432 | |
2433 | retval = irq_chip_pm_get(data: &desc->irq_data); |
2434 | if (retval < 0) |
2435 | return retval; |
2436 | |
2437 | retval = __setup_irq(irq, desc, new: act); |
2438 | |
2439 | if (retval) |
2440 | irq_chip_pm_put(data: &desc->irq_data); |
2441 | |
2442 | return retval; |
2443 | } |
2444 | |
2445 | /** |
2446 | * __request_percpu_irq - allocate a percpu interrupt line |
2447 | * @irq: Interrupt line to allocate |
2448 | * @handler: Function to be called when the IRQ occurs. |
2449 | * @flags: Interrupt type flags (IRQF_TIMER only) |
2450 | * @devname: An ascii name for the claiming device |
2451 | * @dev_id: A percpu cookie passed back to the handler function |
2452 | * |
2453 | * This call allocates interrupt resources and enables the interrupt on the |
2454 | * local CPU. If the interrupt is supposed to be enabled on other CPUs, it |
2455 | * has to be done on each CPU using enable_percpu_irq(). |
2456 | * |
2457 | * @dev_id must be globally unique. It is a per-cpu variable, and |
2458 | * the handler gets called with the interrupted CPU's instance of |
2459 | * that variable. |
2460 | */ |
2461 | int __request_percpu_irq(unsigned int irq, irq_handler_t handler, |
2462 | unsigned long flags, const char *devname, |
2463 | void __percpu *dev_id) |
2464 | { |
2465 | struct irqaction *action; |
2466 | struct irq_desc *desc; |
2467 | int retval; |
2468 | |
2469 | if (!dev_id) |
2470 | return -EINVAL; |
2471 | |
2472 | desc = irq_to_desc(irq); |
2473 | if (!desc || !irq_settings_can_request(desc) || |
2474 | !irq_settings_is_per_cpu_devid(desc)) |
2475 | return -EINVAL; |
2476 | |
2477 | if (flags && flags != IRQF_TIMER) |
2478 | return -EINVAL; |
2479 | |
2480 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
2481 | if (!action) |
2482 | return -ENOMEM; |
2483 | |
2484 | action->handler = handler; |
2485 | action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND; |
2486 | action->name = devname; |
2487 | action->percpu_dev_id = dev_id; |
2488 | |
2489 | retval = irq_chip_pm_get(data: &desc->irq_data); |
2490 | if (retval < 0) { |
2491 | kfree(objp: action); |
2492 | return retval; |
2493 | } |
2494 | |
2495 | retval = __setup_irq(irq, desc, new: action); |
2496 | |
2497 | if (retval) { |
2498 | irq_chip_pm_put(data: &desc->irq_data); |
2499 | kfree(objp: action); |
2500 | } |
2501 | |
2502 | return retval; |
2503 | } |
2504 | EXPORT_SYMBOL_GPL(__request_percpu_irq); |
2505 | |
2506 | /** |
2507 | * request_percpu_nmi - allocate a percpu interrupt line for NMI delivery |
2508 | * @irq: Interrupt line to allocate |
2509 | * @handler: Function to be called when the IRQ occurs. |
2510 | * @name: An ascii name for the claiming device |
2511 | * @dev_id: A percpu cookie passed back to the handler function |
2512 | * |
2513 | * This call allocates interrupt resources for a per CPU NMI. Per CPU NMIs |
2514 | * have to be setup on each CPU by calling prepare_percpu_nmi() before |
2515 | * being enabled on the same CPU by using enable_percpu_nmi(). |
2516 | * |
2517 | * @dev_id must be globally unique. It is a per-cpu variable, and the |
2518 | * handler gets called with the interrupted CPU's instance of that |
2519 | * variable. |
2520 | * |
2521 | * Interrupt lines requested for NMI delivering should have auto enabling |
2522 | * setting disabled. |
2523 | * |
2524 | * If the interrupt line cannot be used to deliver NMIs, function |
2525 | * will fail returning a negative value. |
2526 | */ |
2527 | int request_percpu_nmi(unsigned int irq, irq_handler_t handler, |
2528 | const char *name, void __percpu *dev_id) |
2529 | { |
2530 | struct irqaction *action; |
2531 | struct irq_desc *desc; |
2532 | int retval; |
2533 | |
2534 | if (!handler) |
2535 | return -EINVAL; |
2536 | |
2537 | desc = irq_to_desc(irq); |
2538 | |
2539 | if (!desc || !irq_settings_can_request(desc) || |
2540 | !irq_settings_is_per_cpu_devid(desc) || |
2541 | irq_settings_can_autoenable(desc) || |
2542 | !irq_supports_nmi(desc)) |
2543 | return -EINVAL; |
2544 | |
2545 | /* The line cannot already be NMI */ |
2546 | if (irq_is_nmi(desc)) |
2547 | return -EINVAL; |
2548 | |
2549 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
2550 | if (!action) |
2551 | return -ENOMEM; |
2552 | |
2553 | action->handler = handler; |
2554 | action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND | IRQF_NO_THREAD |
2555 | | IRQF_NOBALANCING; |
2556 | action->name = name; |
2557 | action->percpu_dev_id = dev_id; |
2558 | |
2559 | retval = irq_chip_pm_get(data: &desc->irq_data); |
2560 | if (retval < 0) |
2561 | goto err_out; |
2562 | |
2563 | retval = __setup_irq(irq, desc, new: action); |
2564 | if (retval) |
2565 | goto err_irq_setup; |
2566 | |
2567 | scoped_guard(raw_spinlock_irqsave, &desc->lock) |
2568 | desc->istate |= IRQS_NMI; |
2569 | return 0; |
2570 | |
2571 | err_irq_setup: |
2572 | irq_chip_pm_put(data: &desc->irq_data); |
2573 | err_out: |
2574 | kfree(objp: action); |
2575 | |
2576 | return retval; |
2577 | } |
2578 | |
2579 | /** |
2580 | * prepare_percpu_nmi - performs CPU local setup for NMI delivery |
2581 | * @irq: Interrupt line to prepare for NMI delivery |
2582 | * |
2583 | * This call prepares an interrupt line to deliver NMI on the current CPU, |
2584 | * before that interrupt line gets enabled with enable_percpu_nmi(). |
2585 | * |
2586 | * As a CPU local operation, this should be called from non-preemptible |
2587 | * context. |
2588 | * |
2589 | * If the interrupt line cannot be used to deliver NMIs, function will fail |
2590 | * returning a negative value. |
2591 | */ |
2592 | int prepare_percpu_nmi(unsigned int irq) |
2593 | { |
2594 | int ret = -EINVAL; |
2595 | |
2596 | WARN_ON(preemptible()); |
2597 | |
2598 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_PERCPU) { |
2599 | if (WARN(!irq_is_nmi(scoped_irqdesc), |
2600 | "prepare_percpu_nmi called for a non-NMI interrupt: irq %u\n", irq)) |
2601 | return -EINVAL; |
2602 | |
2603 | ret = irq_nmi_setup(scoped_irqdesc); |
2604 | if (ret) |
2605 | pr_err("Failed to setup NMI delivery: irq %u\n", irq); |
2606 | } |
2607 | return ret; |
2608 | } |
2609 | |
2610 | /** |
2611 | * teardown_percpu_nmi - undoes NMI setup of IRQ line |
2612 | * @irq: Interrupt line from which CPU local NMI configuration should be removed |
2613 | * |
2614 | * This call undoes the setup done by prepare_percpu_nmi(). |
2615 | * |
2616 | * IRQ line should not be enabled for the current CPU. |
2617 | * As a CPU local operation, this should be called from non-preemptible |
2618 | * context. |
2619 | */ |
2620 | void teardown_percpu_nmi(unsigned int irq) |
2621 | { |
2622 | WARN_ON(preemptible()); |
2623 | |
2624 | scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_PERCPU) { |
2625 | if (WARN_ON(!irq_is_nmi(scoped_irqdesc))) |
2626 | return; |
2627 | irq_nmi_teardown(scoped_irqdesc); |
2628 | } |
2629 | } |
2630 | |
2631 | static int __irq_get_irqchip_state(struct irq_data *data, enum irqchip_irq_state which, bool *state) |
2632 | { |
2633 | struct irq_chip *chip; |
2634 | int err = -EINVAL; |
2635 | |
2636 | do { |
2637 | chip = irq_data_get_irq_chip(d: data); |
2638 | if (WARN_ON_ONCE(!chip)) |
2639 | return -ENODEV; |
2640 | if (chip->irq_get_irqchip_state) |
2641 | break; |
2642 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2643 | data = data->parent_data; |
2644 | #else |
2645 | data = NULL; |
2646 | #endif |
2647 | } while (data); |
2648 | |
2649 | if (data) |
2650 | err = chip->irq_get_irqchip_state(data, which, state); |
2651 | return err; |
2652 | } |
2653 | |
2654 | /** |
2655 | * irq_get_irqchip_state - returns the irqchip state of a interrupt. |
2656 | * @irq: Interrupt line that is forwarded to a VM |
2657 | * @which: One of IRQCHIP_STATE_* the caller wants to know about |
2658 | * @state: a pointer to a boolean where the state is to be stored |
2659 | * |
2660 | * This call snapshots the internal irqchip state of an interrupt, |
2661 | * returning into @state the bit corresponding to stage @which |
2662 | * |
2663 | * This function should be called with preemption disabled if the interrupt |
2664 | * controller has per-cpu registers. |
2665 | */ |
2666 | int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, bool *state) |
2667 | { |
2668 | scoped_irqdesc_get_and_buslock(irq, 0) { |
2669 | struct irq_data *data = irq_desc_get_irq_data(scoped_irqdesc); |
2670 | |
2671 | return __irq_get_irqchip_state(data, which, state); |
2672 | } |
2673 | return -EINVAL; |
2674 | } |
2675 | EXPORT_SYMBOL_GPL(irq_get_irqchip_state); |
2676 | |
2677 | /** |
2678 | * irq_set_irqchip_state - set the state of a forwarded interrupt. |
2679 | * @irq: Interrupt line that is forwarded to a VM |
2680 | * @which: State to be restored (one of IRQCHIP_STATE_*) |
2681 | * @val: Value corresponding to @which |
2682 | * |
2683 | * This call sets the internal irqchip state of an interrupt, depending on |
2684 | * the value of @which. |
2685 | * |
2686 | * This function should be called with migration disabled if the interrupt |
2687 | * controller has per-cpu registers. |
2688 | */ |
2689 | int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, bool val) |
2690 | { |
2691 | scoped_irqdesc_get_and_buslock(irq, 0) { |
2692 | struct irq_data *data = irq_desc_get_irq_data(scoped_irqdesc); |
2693 | struct irq_chip *chip; |
2694 | |
2695 | do { |
2696 | chip = irq_data_get_irq_chip(d: data); |
2697 | |
2698 | if (WARN_ON_ONCE(!chip)) |
2699 | return -ENODEV; |
2700 | |
2701 | if (chip->irq_set_irqchip_state) |
2702 | break; |
2703 | |
2704 | data = irqd_get_parent_data(irqd: data); |
2705 | } while (data); |
2706 | |
2707 | if (data) |
2708 | return chip->irq_set_irqchip_state(data, which, val); |
2709 | } |
2710 | return -EINVAL; |
2711 | } |
2712 | EXPORT_SYMBOL_GPL(irq_set_irqchip_state); |
2713 | |
2714 | /** |
2715 | * irq_has_action - Check whether an interrupt is requested |
2716 | * @irq: The linux irq number |
2717 | * |
2718 | * Returns: A snapshot of the current state |
2719 | */ |
2720 | bool irq_has_action(unsigned int irq) |
2721 | { |
2722 | bool res; |
2723 | |
2724 | rcu_read_lock(); |
2725 | res = irq_desc_has_action(desc: irq_to_desc(irq)); |
2726 | rcu_read_unlock(); |
2727 | return res; |
2728 | } |
2729 | EXPORT_SYMBOL_GPL(irq_has_action); |
2730 | |
2731 | /** |
2732 | * irq_check_status_bit - Check whether bits in the irq descriptor status are set |
2733 | * @irq: The linux irq number |
2734 | * @bitmask: The bitmask to evaluate |
2735 | * |
2736 | * Returns: True if one of the bits in @bitmask is set |
2737 | */ |
2738 | bool irq_check_status_bit(unsigned int irq, unsigned int bitmask) |
2739 | { |
2740 | struct irq_desc *desc; |
2741 | bool res = false; |
2742 | |
2743 | rcu_read_lock(); |
2744 | desc = irq_to_desc(irq); |
2745 | if (desc) |
2746 | res = !!(desc->status_use_accessors & bitmask); |
2747 | rcu_read_unlock(); |
2748 | return res; |
2749 | } |
2750 | EXPORT_SYMBOL_GPL(irq_check_status_bit); |
2751 |
Definitions
- force_irqthreads_key
- setup_forced_irqthreads
- __synchronize_hardirq
- synchronize_hardirq
- __synchronize_irq
- synchronize_irq
- irq_default_affinity
- __irq_can_set_affinity
- irq_can_set_affinity
- irq_can_set_affinity_usr
- irq_set_thread_affinity
- irq_validate_effective_affinity
- __tmp_mask
- irq_do_set_affinity
- irq_set_affinity_pending
- irq_try_set_affinity
- irq_set_affinity_deactivated
- irq_set_affinity_locked
- irq_update_affinity_desc
- __irq_set_affinity
- irq_set_affinity
- irq_force_affinity
- __irq_apply_affinity_hint
- irq_affinity_notify
- irq_set_affinity_notifier
- irq_setup_affinity
- irq_set_vcpu_affinity
- __disable_irq
- __disable_irq_nosync
- disable_irq_nosync
- disable_irq
- disable_hardirq
- disable_nmi_nosync
- __enable_irq
- enable_irq
- enable_nmi
- set_irq_wake_real
- irq_set_irq_wake
- can_request_irq
- __irq_set_trigger
- irq_set_parent
- irq_default_primary_handler
- irq_nested_primary_handler
- irq_forced_secondary_handler
- irq_thread_check_affinity
- irq_wait_for_interrupt
- irq_finalize_oneshot
- irq_thread_fn
- irq_forced_thread_fn
- wake_threads_waitq
- irq_thread_dtor
- irq_wake_secondary
- irq_thread_set_ready
- wake_up_and_wait_for_irq_thread_ready
- irq_thread
- irq_wake_thread
- irq_setup_forced_threading
- irq_request_resources
- irq_release_resources
- irq_supports_nmi
- irq_nmi_setup
- irq_nmi_teardown
- setup_irq_thread
- __setup_irq
- __free_irq
- free_irq
- __cleanup_nmi
- free_nmi
- request_threaded_irq
- request_any_context_irq
- request_nmi
- enable_percpu_irq
- enable_percpu_nmi
- irq_percpu_is_enabled
- disable_percpu_irq
- disable_percpu_nmi
- __free_percpu_irq
- free_percpu_irq
- free_percpu_nmi
- setup_percpu_irq
- __request_percpu_irq
- request_percpu_nmi
- prepare_percpu_nmi
- teardown_percpu_nmi
- __irq_get_irqchip_state
- irq_get_irqchip_state
- irq_set_irqchip_state
- irq_has_action
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