| 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | // |
| 3 | // Driver for Cirrus Logic CS35L56 smart amp |
| 4 | // |
| 5 | // Copyright (C) 2023 Cirrus Logic, Inc. and |
| 6 | // Cirrus Logic International Semiconductor Ltd. |
| 7 | |
| 8 | #include <linux/acpi.h> |
| 9 | #include <linux/array_size.h> |
| 10 | #include <linux/completion.h> |
| 11 | #include <linux/debugfs.h> |
| 12 | #include <linux/delay.h> |
| 13 | #include <linux/err.h> |
| 14 | #include <linux/gpio/consumer.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/math.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/pm.h> |
| 19 | #include <linux/pm_runtime.h> |
| 20 | #include <linux/property.h> |
| 21 | #include <linux/regmap.h> |
| 22 | #include <linux/regulator/consumer.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/soundwire/sdw.h> |
| 25 | #include <linux/types.h> |
| 26 | #include <linux/workqueue.h> |
| 27 | #include <sound/cs-amp-lib.h> |
| 28 | #include <sound/pcm.h> |
| 29 | #include <sound/pcm_params.h> |
| 30 | #include <sound/soc.h> |
| 31 | #include <sound/soc-dapm.h> |
| 32 | #include <sound/tlv.h> |
| 33 | |
| 34 | #include "wm_adsp.h" |
| 35 | #include "cs35l56.h" |
| 36 | |
| 37 | static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, |
| 38 | struct snd_kcontrol *kcontrol, int event); |
| 39 | |
| 40 | static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56) |
| 41 | { |
| 42 | /* Wait for patching to complete */ |
| 43 | flush_work(work: &cs35l56->dsp_work); |
| 44 | } |
| 45 | |
| 46 | static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol, |
| 47 | struct snd_ctl_elem_value *ucontrol) |
| 48 | { |
| 49 | struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); |
| 50 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 51 | |
| 52 | cs35l56_wait_dsp_ready(cs35l56); |
| 53 | return snd_soc_get_volsw(kcontrol, ucontrol); |
| 54 | } |
| 55 | |
| 56 | static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, |
| 57 | struct snd_ctl_elem_value *ucontrol) |
| 58 | { |
| 59 | struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); |
| 60 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 61 | |
| 62 | cs35l56_wait_dsp_ready(cs35l56); |
| 63 | return snd_soc_put_volsw(kcontrol, ucontrol); |
| 64 | } |
| 65 | |
| 66 | static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0); |
| 67 | |
| 68 | static const struct snd_kcontrol_new cs35l56_controls[] = { |
| 69 | SOC_SINGLE_EXT("Speaker Switch" , |
| 70 | CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1, |
| 71 | cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), |
| 72 | SOC_SINGLE_S_EXT_TLV("Speaker Volume" , |
| 73 | CS35L56_MAIN_RENDER_USER_VOLUME, |
| 74 | CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT, |
| 75 | CS35L56_MAIN_RENDER_USER_VOLUME_MIN, |
| 76 | CS35L56_MAIN_RENDER_USER_VOLUME_MAX, |
| 77 | CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT, |
| 78 | 0, |
| 79 | cs35l56_dspwait_get_volsw, |
| 80 | cs35l56_dspwait_put_volsw, |
| 81 | vol_tlv), |
| 82 | SOC_SINGLE_EXT("Posture Number" , CS35L56_MAIN_POSTURE_NUMBER, |
| 83 | 0, 255, 0, |
| 84 | cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), |
| 85 | }; |
| 86 | |
| 87 | static const struct snd_kcontrol_new cs35l63_controls[] = { |
| 88 | SOC_SINGLE_EXT("Speaker Switch" , |
| 89 | CS35L63_MAIN_RENDER_USER_MUTE, 0, 1, 1, |
| 90 | cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), |
| 91 | SOC_SINGLE_S_EXT_TLV("Speaker Volume" , |
| 92 | CS35L63_MAIN_RENDER_USER_VOLUME, |
| 93 | CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT, |
| 94 | CS35L56_MAIN_RENDER_USER_VOLUME_MIN, |
| 95 | CS35L56_MAIN_RENDER_USER_VOLUME_MAX, |
| 96 | CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT, |
| 97 | 0, |
| 98 | cs35l56_dspwait_get_volsw, |
| 99 | cs35l56_dspwait_put_volsw, |
| 100 | vol_tlv), |
| 101 | SOC_SINGLE_EXT("Posture Number" , CS35L63_MAIN_POSTURE_NUMBER, |
| 102 | 0, 255, 0, |
| 103 | cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), |
| 104 | }; |
| 105 | |
| 106 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum, |
| 107 | CS35L56_ASP1TX1_INPUT, |
| 108 | 0, CS35L56_ASP_TXn_SRC_MASK, |
| 109 | cs35l56_tx_input_texts, |
| 110 | cs35l56_tx_input_values); |
| 111 | |
| 112 | static const struct snd_kcontrol_new asp1_tx1_mux = |
| 113 | SOC_DAPM_ENUM("ASP1TX1 SRC" , cs35l56_asp1tx1_enum); |
| 114 | |
| 115 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum, |
| 116 | CS35L56_ASP1TX2_INPUT, |
| 117 | 0, CS35L56_ASP_TXn_SRC_MASK, |
| 118 | cs35l56_tx_input_texts, |
| 119 | cs35l56_tx_input_values); |
| 120 | |
| 121 | static const struct snd_kcontrol_new asp1_tx2_mux = |
| 122 | SOC_DAPM_ENUM("ASP1TX2 SRC" , cs35l56_asp1tx2_enum); |
| 123 | |
| 124 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum, |
| 125 | CS35L56_ASP1TX3_INPUT, |
| 126 | 0, CS35L56_ASP_TXn_SRC_MASK, |
| 127 | cs35l56_tx_input_texts, |
| 128 | cs35l56_tx_input_values); |
| 129 | |
| 130 | static const struct snd_kcontrol_new asp1_tx3_mux = |
| 131 | SOC_DAPM_ENUM("ASP1TX3 SRC" , cs35l56_asp1tx3_enum); |
| 132 | |
| 133 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum, |
| 134 | CS35L56_ASP1TX4_INPUT, |
| 135 | 0, CS35L56_ASP_TXn_SRC_MASK, |
| 136 | cs35l56_tx_input_texts, |
| 137 | cs35l56_tx_input_values); |
| 138 | |
| 139 | static const struct snd_kcontrol_new asp1_tx4_mux = |
| 140 | SOC_DAPM_ENUM("ASP1TX4 SRC" , cs35l56_asp1tx4_enum); |
| 141 | |
| 142 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum, |
| 143 | CS35L56_SWIRE_DP3_CH1_INPUT, |
| 144 | 0, CS35L56_SWIRETXn_SRC_MASK, |
| 145 | cs35l56_tx_input_texts, |
| 146 | cs35l56_tx_input_values); |
| 147 | |
| 148 | static const struct snd_kcontrol_new sdw1_tx1_mux = |
| 149 | SOC_DAPM_ENUM("SDW1TX1 SRC" , cs35l56_sdw1tx1_enum); |
| 150 | |
| 151 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum, |
| 152 | CS35L56_SWIRE_DP3_CH2_INPUT, |
| 153 | 0, CS35L56_SWIRETXn_SRC_MASK, |
| 154 | cs35l56_tx_input_texts, |
| 155 | cs35l56_tx_input_values); |
| 156 | |
| 157 | static const struct snd_kcontrol_new sdw1_tx2_mux = |
| 158 | SOC_DAPM_ENUM("SDW1TX2 SRC" , cs35l56_sdw1tx2_enum); |
| 159 | |
| 160 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum, |
| 161 | CS35L56_SWIRE_DP3_CH3_INPUT, |
| 162 | 0, CS35L56_SWIRETXn_SRC_MASK, |
| 163 | cs35l56_tx_input_texts, |
| 164 | cs35l56_tx_input_values); |
| 165 | |
| 166 | static const struct snd_kcontrol_new sdw1_tx3_mux = |
| 167 | SOC_DAPM_ENUM("SDW1TX3 SRC" , cs35l56_sdw1tx3_enum); |
| 168 | |
| 169 | static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum, |
| 170 | CS35L56_SWIRE_DP3_CH4_INPUT, |
| 171 | 0, CS35L56_SWIRETXn_SRC_MASK, |
| 172 | cs35l56_tx_input_texts, |
| 173 | cs35l56_tx_input_values); |
| 174 | |
| 175 | static const struct snd_kcontrol_new sdw1_tx4_mux = |
| 176 | SOC_DAPM_ENUM("SDW1TX4 SRC" , cs35l56_sdw1tx4_enum); |
| 177 | |
| 178 | static int cs35l56_play_event(struct snd_soc_dapm_widget *w, |
| 179 | struct snd_kcontrol *kcontrol, int event) |
| 180 | { |
| 181 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
| 182 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 183 | unsigned int val; |
| 184 | int ret; |
| 185 | |
| 186 | dev_dbg(cs35l56->base.dev, "play: %d\n" , event); |
| 187 | |
| 188 | switch (event) { |
| 189 | case SND_SOC_DAPM_PRE_PMU: |
| 190 | /* Don't wait for ACK, we check in POST_PMU that it completed */ |
| 191 | return regmap_write(map: cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, |
| 192 | CS35L56_MBOX_CMD_AUDIO_PLAY); |
| 193 | case SND_SOC_DAPM_POST_PMU: |
| 194 | /* Wait for firmware to enter PS0 power state */ |
| 195 | ret = regmap_read_poll_timeout(cs35l56->base.regmap, |
| 196 | cs35l56->base.fw_reg->transducer_actual_ps, |
| 197 | val, (val == CS35L56_PS0), |
| 198 | CS35L56_PS0_POLL_US, |
| 199 | CS35L56_PS0_TIMEOUT_US); |
| 200 | if (ret) |
| 201 | dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n" , ret); |
| 202 | return ret; |
| 203 | case SND_SOC_DAPM_POST_PMD: |
| 204 | return cs35l56_mbox_send(cs35l56_base: &cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE); |
| 205 | default: |
| 206 | return 0; |
| 207 | } |
| 208 | } |
| 209 | |
| 210 | static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { |
| 211 | SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B" , 0, 0), |
| 212 | SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP" , 0, 0), |
| 213 | |
| 214 | SND_SOC_DAPM_SUPPLY("PLAY" , SND_SOC_NOPM, 0, 0, cs35l56_play_event, |
| 215 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), |
| 216 | |
| 217 | SND_SOC_DAPM_OUT_DRV("AMP" , SND_SOC_NOPM, 0, 0, NULL, 0), |
| 218 | SND_SOC_DAPM_OUTPUT("SPK" ), |
| 219 | |
| 220 | SND_SOC_DAPM_PGA_E("DSP1" , SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event, |
| 221 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
| 222 | |
| 223 | SND_SOC_DAPM_AIF_IN("ASP1RX1" , NULL, 0, CS35L56_ASP1_ENABLES1, |
| 224 | CS35L56_ASP_RX1_EN_SHIFT, 0), |
| 225 | SND_SOC_DAPM_AIF_IN("ASP1RX2" , NULL, 1, CS35L56_ASP1_ENABLES1, |
| 226 | CS35L56_ASP_RX2_EN_SHIFT, 0), |
| 227 | SND_SOC_DAPM_AIF_OUT("ASP1TX1" , NULL, 0, CS35L56_ASP1_ENABLES1, |
| 228 | CS35L56_ASP_TX1_EN_SHIFT, 0), |
| 229 | SND_SOC_DAPM_AIF_OUT("ASP1TX2" , NULL, 1, CS35L56_ASP1_ENABLES1, |
| 230 | CS35L56_ASP_TX2_EN_SHIFT, 0), |
| 231 | SND_SOC_DAPM_AIF_OUT("ASP1TX3" , NULL, 2, CS35L56_ASP1_ENABLES1, |
| 232 | CS35L56_ASP_TX3_EN_SHIFT, 0), |
| 233 | SND_SOC_DAPM_AIF_OUT("ASP1TX4" , NULL, 3, CS35L56_ASP1_ENABLES1, |
| 234 | CS35L56_ASP_TX4_EN_SHIFT, 0), |
| 235 | |
| 236 | SND_SOC_DAPM_MUX("ASP1 TX1 Source" , SND_SOC_NOPM, 0, 0, &asp1_tx1_mux), |
| 237 | SND_SOC_DAPM_MUX("ASP1 TX2 Source" , SND_SOC_NOPM, 0, 0, &asp1_tx2_mux), |
| 238 | SND_SOC_DAPM_MUX("ASP1 TX3 Source" , SND_SOC_NOPM, 0, 0, &asp1_tx3_mux), |
| 239 | SND_SOC_DAPM_MUX("ASP1 TX4 Source" , SND_SOC_NOPM, 0, 0, &asp1_tx4_mux), |
| 240 | |
| 241 | SND_SOC_DAPM_MUX("SDW1 TX1 Source" , SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux), |
| 242 | SND_SOC_DAPM_MUX("SDW1 TX2 Source" , SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux), |
| 243 | SND_SOC_DAPM_MUX("SDW1 TX3 Source" , SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux), |
| 244 | SND_SOC_DAPM_MUX("SDW1 TX4 Source" , SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux), |
| 245 | |
| 246 | SND_SOC_DAPM_SIGGEN("VMON ADC" ), |
| 247 | SND_SOC_DAPM_SIGGEN("IMON ADC" ), |
| 248 | SND_SOC_DAPM_SIGGEN("ERRVOL ADC" ), |
| 249 | SND_SOC_DAPM_SIGGEN("CLASSH ADC" ), |
| 250 | SND_SOC_DAPM_SIGGEN("VDDBMON ADC" ), |
| 251 | SND_SOC_DAPM_SIGGEN("VBSTMON ADC" ), |
| 252 | SND_SOC_DAPM_SIGGEN("TEMPMON ADC" ), |
| 253 | }; |
| 254 | |
| 255 | #define CS35L56_SRC_ROUTE(name) \ |
| 256 | { name" Source", "ASP1RX1", "ASP1RX1" }, \ |
| 257 | { name" Source", "ASP1RX2", "ASP1RX2" }, \ |
| 258 | { name" Source", "VMON", "VMON ADC" }, \ |
| 259 | { name" Source", "IMON", "IMON ADC" }, \ |
| 260 | { name" Source", "ERRVOL", "ERRVOL ADC" }, \ |
| 261 | { name" Source", "CLASSH", "CLASSH ADC" }, \ |
| 262 | { name" Source", "VDDBMON", "VDDBMON ADC" }, \ |
| 263 | { name" Source", "VBSTMON", "VBSTMON ADC" }, \ |
| 264 | { name" Source", "DSP1TX1", "DSP1" }, \ |
| 265 | { name" Source", "DSP1TX2", "DSP1" }, \ |
| 266 | { name" Source", "DSP1TX3", "DSP1" }, \ |
| 267 | { name" Source", "DSP1TX4", "DSP1" }, \ |
| 268 | { name" Source", "DSP1TX5", "DSP1" }, \ |
| 269 | { name" Source", "DSP1TX6", "DSP1" }, \ |
| 270 | { name" Source", "DSP1TX7", "DSP1" }, \ |
| 271 | { name" Source", "DSP1TX8", "DSP1" }, \ |
| 272 | { name" Source", "TEMPMON", "TEMPMON ADC" }, \ |
| 273 | { name" Source", "INTERPOLATOR", "AMP" }, \ |
| 274 | { name" Source", "SDW1RX1", "SDW1 Playback" }, \ |
| 275 | { name" Source", "SDW1RX2", "SDW1 Playback" }, |
| 276 | |
| 277 | static const struct snd_soc_dapm_route cs35l56_audio_map[] = { |
| 278 | { "AMP" , NULL, "VDD_B" }, |
| 279 | { "AMP" , NULL, "VDD_AMP" }, |
| 280 | |
| 281 | { "ASP1 Playback" , NULL, "PLAY" }, |
| 282 | { "SDW1 Playback" , NULL, "PLAY" }, |
| 283 | |
| 284 | { "ASP1RX1" , NULL, "ASP1 Playback" }, |
| 285 | { "ASP1RX2" , NULL, "ASP1 Playback" }, |
| 286 | { "DSP1" , NULL, "ASP1RX1" }, |
| 287 | { "DSP1" , NULL, "ASP1RX2" }, |
| 288 | { "DSP1" , NULL, "SDW1 Playback" }, |
| 289 | { "AMP" , NULL, "DSP1" }, |
| 290 | { "SPK" , NULL, "AMP" }, |
| 291 | |
| 292 | CS35L56_SRC_ROUTE("ASP1 TX1" ) |
| 293 | CS35L56_SRC_ROUTE("ASP1 TX2" ) |
| 294 | CS35L56_SRC_ROUTE("ASP1 TX3" ) |
| 295 | CS35L56_SRC_ROUTE("ASP1 TX4" ) |
| 296 | |
| 297 | { "ASP1TX1" , NULL, "ASP1 TX1 Source" }, |
| 298 | { "ASP1TX2" , NULL, "ASP1 TX2 Source" }, |
| 299 | { "ASP1TX3" , NULL, "ASP1 TX3 Source" }, |
| 300 | { "ASP1TX4" , NULL, "ASP1 TX4 Source" }, |
| 301 | { "ASP1 Capture" , NULL, "ASP1TX1" }, |
| 302 | { "ASP1 Capture" , NULL, "ASP1TX2" }, |
| 303 | { "ASP1 Capture" , NULL, "ASP1TX3" }, |
| 304 | { "ASP1 Capture" , NULL, "ASP1TX4" }, |
| 305 | |
| 306 | CS35L56_SRC_ROUTE("SDW1 TX1" ) |
| 307 | CS35L56_SRC_ROUTE("SDW1 TX2" ) |
| 308 | CS35L56_SRC_ROUTE("SDW1 TX3" ) |
| 309 | CS35L56_SRC_ROUTE("SDW1 TX4" ) |
| 310 | { "SDW1 Capture" , NULL, "SDW1 TX1 Source" }, |
| 311 | { "SDW1 Capture" , NULL, "SDW1 TX2 Source" }, |
| 312 | { "SDW1 Capture" , NULL, "SDW1 TX3 Source" }, |
| 313 | { "SDW1 Capture" , NULL, "SDW1 TX4 Source" }, |
| 314 | }; |
| 315 | |
| 316 | static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, |
| 317 | struct snd_kcontrol *kcontrol, int event) |
| 318 | { |
| 319 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
| 320 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 321 | |
| 322 | dev_dbg(cs35l56->base.dev, "%s: %d\n" , __func__, event); |
| 323 | |
| 324 | return wm_adsp_event(w, kcontrol, event); |
| 325 | } |
| 326 | |
| 327 | static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) |
| 328 | { |
| 329 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: codec_dai->component); |
| 330 | unsigned int val; |
| 331 | |
| 332 | dev_dbg(cs35l56->base.dev, "%s: %#x\n" , __func__, fmt); |
| 333 | |
| 334 | switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { |
| 335 | case SND_SOC_DAIFMT_CBC_CFC: |
| 336 | break; |
| 337 | default: |
| 338 | dev_err(cs35l56->base.dev, "Unsupported clock source mode\n" ); |
| 339 | return -EINVAL; |
| 340 | } |
| 341 | |
| 342 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 343 | case SND_SOC_DAIFMT_DSP_A: |
| 344 | val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT; |
| 345 | cs35l56->tdm_mode = true; |
| 346 | break; |
| 347 | case SND_SOC_DAIFMT_I2S: |
| 348 | val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT; |
| 349 | cs35l56->tdm_mode = false; |
| 350 | break; |
| 351 | default: |
| 352 | dev_err(cs35l56->base.dev, "Unsupported DAI format\n" ); |
| 353 | return -EINVAL; |
| 354 | } |
| 355 | |
| 356 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 357 | case SND_SOC_DAIFMT_NB_IF: |
| 358 | val |= CS35L56_ASP_FSYNC_INV_MASK; |
| 359 | break; |
| 360 | case SND_SOC_DAIFMT_IB_NF: |
| 361 | val |= CS35L56_ASP_BCLK_INV_MASK; |
| 362 | break; |
| 363 | case SND_SOC_DAIFMT_IB_IF: |
| 364 | val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK; |
| 365 | break; |
| 366 | case SND_SOC_DAIFMT_NB_NF: |
| 367 | break; |
| 368 | default: |
| 369 | dev_err(cs35l56->base.dev, "Invalid clock invert\n" ); |
| 370 | return -EINVAL; |
| 371 | } |
| 372 | |
| 373 | regmap_update_bits(map: cs35l56->base.regmap, |
| 374 | CS35L56_ASP1_CONTROL2, |
| 375 | CS35L56_ASP_FMT_MASK | |
| 376 | CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK, |
| 377 | val); |
| 378 | |
| 379 | /* Hi-Z DOUT in unused slots and when all TX are disabled */ |
| 380 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, |
| 381 | CS35L56_ASP1_DOUT_HIZ_CTRL_MASK, |
| 382 | CS35L56_ASP_UNUSED_HIZ_OFF_HIZ); |
| 383 | |
| 384 | return 0; |
| 385 | } |
| 386 | |
| 387 | static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask) |
| 388 | { |
| 389 | unsigned int channel_shift; |
| 390 | int bit_num; |
| 391 | |
| 392 | /* Enable consecutive TX1..TXn for each of the slots set in mask */ |
| 393 | channel_shift = 0; |
| 394 | for_each_set_bit(bit_num, &mask, 32) { |
| 395 | reg_val &= ~(0x3f << channel_shift); |
| 396 | reg_val |= bit_num << channel_shift; |
| 397 | channel_shift += 8; |
| 398 | } |
| 399 | |
| 400 | return reg_val; |
| 401 | } |
| 402 | |
| 403 | static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, |
| 404 | unsigned int rx_mask, int slots, int slot_width) |
| 405 | { |
| 406 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 407 | |
| 408 | if ((slots == 0) || (slot_width == 0)) { |
| 409 | dev_dbg(cs35l56->base.dev, "tdm config cleared\n" ); |
| 410 | cs35l56->asp_slot_width = 0; |
| 411 | cs35l56->asp_slot_count = 0; |
| 412 | return 0; |
| 413 | } |
| 414 | |
| 415 | if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) { |
| 416 | dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n" , slot_width); |
| 417 | return -EINVAL; |
| 418 | } |
| 419 | |
| 420 | /* More than 32 slots would give an unsupportable BCLK frequency */ |
| 421 | if (slots > 32) { |
| 422 | dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n" , slots); |
| 423 | return -EINVAL; |
| 424 | } |
| 425 | |
| 426 | cs35l56->asp_slot_width = (u8)slot_width; |
| 427 | cs35l56->asp_slot_count = (u8)slots; |
| 428 | |
| 429 | // Note: rx/tx is from point of view of the CPU end |
| 430 | if (tx_mask == 0) |
| 431 | tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1 |
| 432 | |
| 433 | if (rx_mask == 0) |
| 434 | rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3 |
| 435 | |
| 436 | /* Default unused slots to 63 */ |
| 437 | regmap_write(map: cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1, |
| 438 | val: cs35l56_make_tdm_config_word(reg_val: 0x3f3f3f3f, mask: rx_mask)); |
| 439 | regmap_write(map: cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5, |
| 440 | val: cs35l56_make_tdm_config_word(reg_val: 0x3f3f3f, mask: tx_mask)); |
| 441 | |
| 442 | dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n" , |
| 443 | cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask); |
| 444 | |
| 445 | return 0; |
| 446 | } |
| 447 | |
| 448 | static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream, |
| 449 | struct snd_pcm_hw_params *params, |
| 450 | struct snd_soc_dai *dai) |
| 451 | { |
| 452 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 453 | unsigned int rate = params_rate(p: params); |
| 454 | u8 asp_width, asp_wl; |
| 455 | |
| 456 | asp_wl = params_width(p: params); |
| 457 | if (cs35l56->asp_slot_width) |
| 458 | asp_width = cs35l56->asp_slot_width; |
| 459 | else |
| 460 | asp_width = asp_wl; |
| 461 | |
| 462 | dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d" , |
| 463 | __func__, asp_wl, asp_width, rate); |
| 464 | |
| 465 | if (!cs35l56->sysclk_set) { |
| 466 | unsigned int slots = cs35l56->asp_slot_count; |
| 467 | unsigned int bclk_freq; |
| 468 | int freq_id; |
| 469 | |
| 470 | if (slots == 0) { |
| 471 | slots = params_channels(p: params); |
| 472 | |
| 473 | /* I2S always has an even number of slots */ |
| 474 | if (!cs35l56->tdm_mode) |
| 475 | slots = round_up(slots, 2); |
| 476 | } |
| 477 | |
| 478 | bclk_freq = asp_width * slots * rate; |
| 479 | freq_id = cs35l56_get_bclk_freq_id(freq: bclk_freq); |
| 480 | if (freq_id < 0) { |
| 481 | dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n" , __func__, bclk_freq); |
| 482 | return -EINVAL; |
| 483 | } |
| 484 | |
| 485 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, |
| 486 | CS35L56_ASP_BCLK_FREQ_MASK, |
| 487 | val: freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); |
| 488 | } |
| 489 | |
| 490 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 491 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, |
| 492 | CS35L56_ASP_RX_WIDTH_MASK, val: asp_width << |
| 493 | CS35L56_ASP_RX_WIDTH_SHIFT); |
| 494 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5, |
| 495 | CS35L56_ASP_RX_WL_MASK, val: asp_wl); |
| 496 | } else { |
| 497 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, |
| 498 | CS35L56_ASP_TX_WIDTH_MASK, val: asp_width << |
| 499 | CS35L56_ASP_TX_WIDTH_SHIFT); |
| 500 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1, |
| 501 | CS35L56_ASP_TX_WL_MASK, val: asp_wl); |
| 502 | } |
| 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai, |
| 508 | int clk_id, unsigned int freq, int dir) |
| 509 | { |
| 510 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 511 | int freq_id; |
| 512 | |
| 513 | if (freq == 0) { |
| 514 | cs35l56->sysclk_set = false; |
| 515 | return 0; |
| 516 | } |
| 517 | |
| 518 | freq_id = cs35l56_get_bclk_freq_id(freq); |
| 519 | if (freq_id < 0) |
| 520 | return freq_id; |
| 521 | |
| 522 | regmap_update_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, |
| 523 | CS35L56_ASP_BCLK_FREQ_MASK, |
| 524 | val: freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); |
| 525 | cs35l56->sysclk_set = true; |
| 526 | |
| 527 | return 0; |
| 528 | } |
| 529 | |
| 530 | static const struct snd_soc_dai_ops cs35l56_ops = { |
| 531 | .set_fmt = cs35l56_asp_dai_set_fmt, |
| 532 | .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot, |
| 533 | .hw_params = cs35l56_asp_dai_hw_params, |
| 534 | .set_sysclk = cs35l56_asp_dai_set_sysclk, |
| 535 | }; |
| 536 | |
| 537 | static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream, |
| 538 | struct snd_soc_dai *dai) |
| 539 | { |
| 540 | snd_soc_dai_set_dma_data(dai, substream, NULL); |
| 541 | } |
| 542 | |
| 543 | static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, |
| 544 | unsigned int rx_mask, int slots, int slot_width) |
| 545 | { |
| 546 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 547 | |
| 548 | /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */ |
| 549 | cs35l56->rx_mask = tx_mask; |
| 550 | cs35l56->tx_mask = rx_mask; |
| 551 | |
| 552 | return 0; |
| 553 | } |
| 554 | |
| 555 | static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream, |
| 556 | struct snd_pcm_hw_params *params, |
| 557 | struct snd_soc_dai *dai) |
| 558 | { |
| 559 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 560 | struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); |
| 561 | struct sdw_stream_config sconfig; |
| 562 | struct sdw_port_config pconfig; |
| 563 | int ret; |
| 564 | |
| 565 | dev_dbg(cs35l56->base.dev, "%s: rate %d\n" , __func__, params_rate(params)); |
| 566 | |
| 567 | if (!cs35l56->base.init_done) |
| 568 | return -ENODEV; |
| 569 | |
| 570 | if (!sdw_stream) |
| 571 | return -EINVAL; |
| 572 | |
| 573 | memset(&sconfig, 0, sizeof(sconfig)); |
| 574 | memset(&pconfig, 0, sizeof(pconfig)); |
| 575 | |
| 576 | sconfig.frame_rate = params_rate(p: params); |
| 577 | sconfig.bps = snd_pcm_format_width(format: params_format(p: params)); |
| 578 | |
| 579 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 580 | sconfig.direction = SDW_DATA_DIR_RX; |
| 581 | pconfig.num = CS35L56_SDW1_PLAYBACK_PORT; |
| 582 | pconfig.ch_mask = cs35l56->rx_mask; |
| 583 | } else { |
| 584 | sconfig.direction = SDW_DATA_DIR_TX; |
| 585 | pconfig.num = CS35L56_SDW1_CAPTURE_PORT; |
| 586 | pconfig.ch_mask = cs35l56->tx_mask; |
| 587 | } |
| 588 | |
| 589 | if (pconfig.ch_mask == 0) { |
| 590 | sconfig.ch_count = params_channels(p: params); |
| 591 | pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0); |
| 592 | } else { |
| 593 | sconfig.ch_count = hweight32(pconfig.ch_mask); |
| 594 | } |
| 595 | |
| 596 | ret = sdw_stream_add_slave(slave: cs35l56->sdw_peripheral, stream_config: &sconfig, port_config: &pconfig, |
| 597 | num_ports: 1, stream: sdw_stream); |
| 598 | if (ret) { |
| 599 | dev_err(dai->dev, "Failed to add sdw stream: %d\n" , ret); |
| 600 | return ret; |
| 601 | } |
| 602 | |
| 603 | return 0; |
| 604 | } |
| 605 | |
| 606 | static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream, |
| 607 | struct snd_soc_dai *dai) |
| 608 | { |
| 609 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: dai->component); |
| 610 | struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); |
| 611 | |
| 612 | if (!cs35l56->sdw_peripheral) |
| 613 | return -EINVAL; |
| 614 | |
| 615 | sdw_stream_remove_slave(slave: cs35l56->sdw_peripheral, stream: sdw_stream); |
| 616 | |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai, |
| 621 | void *sdw_stream, int direction) |
| 622 | { |
| 623 | snd_soc_dai_dma_data_set(dai, stream: direction, data: sdw_stream); |
| 624 | |
| 625 | return 0; |
| 626 | } |
| 627 | |
| 628 | static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = { |
| 629 | .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot, |
| 630 | .shutdown = cs35l56_sdw_dai_shutdown, |
| 631 | .hw_params = cs35l56_sdw_dai_hw_params, |
| 632 | .hw_free = cs35l56_sdw_dai_hw_free, |
| 633 | .set_stream = cs35l56_sdw_dai_set_stream, |
| 634 | }; |
| 635 | |
| 636 | static struct snd_soc_dai_driver cs35l56_dai[] = { |
| 637 | { |
| 638 | .name = "cs35l56-asp1" , |
| 639 | .id = 0, |
| 640 | .playback = { |
| 641 | .stream_name = "ASP1 Playback" , |
| 642 | .channels_min = 1, |
| 643 | .channels_max = 2, |
| 644 | .rates = CS35L56_RATES, |
| 645 | .formats = CS35L56_RX_FORMATS, |
| 646 | }, |
| 647 | .capture = { |
| 648 | .stream_name = "ASP1 Capture" , |
| 649 | .channels_min = 1, |
| 650 | .channels_max = 4, |
| 651 | .rates = CS35L56_RATES, |
| 652 | .formats = CS35L56_TX_FORMATS, |
| 653 | }, |
| 654 | .ops = &cs35l56_ops, |
| 655 | .symmetric_rate = 1, |
| 656 | .symmetric_sample_bits = 1, |
| 657 | }, |
| 658 | { |
| 659 | .name = "cs35l56-sdw1" , |
| 660 | .id = 1, |
| 661 | .playback = { |
| 662 | .stream_name = "SDW1 Playback" , |
| 663 | .channels_min = 1, |
| 664 | .channels_max = 2, |
| 665 | .rates = CS35L56_RATES, |
| 666 | .formats = CS35L56_RX_FORMATS, |
| 667 | }, |
| 668 | .symmetric_rate = 1, |
| 669 | .ops = &cs35l56_sdw_dai_ops, |
| 670 | }, |
| 671 | { |
| 672 | .name = "cs35l56-sdw1c" , |
| 673 | .id = 2, |
| 674 | .capture = { |
| 675 | .stream_name = "SDW1 Capture" , |
| 676 | .channels_min = 1, |
| 677 | .channels_max = 4, |
| 678 | .rates = CS35L56_RATES, |
| 679 | .formats = CS35L56_TX_FORMATS, |
| 680 | }, |
| 681 | .symmetric_rate = 1, |
| 682 | .ops = &cs35l56_sdw_dai_ops, |
| 683 | }, |
| 684 | }; |
| 685 | |
| 686 | static int cs35l56_write_cal(struct cs35l56_private *cs35l56) |
| 687 | { |
| 688 | int ret; |
| 689 | |
| 690 | if (cs35l56->base.secured || !cs35l56->base.cal_data_valid) |
| 691 | return -ENODATA; |
| 692 | |
| 693 | ret = wm_adsp_run(dsp: &cs35l56->dsp); |
| 694 | if (ret) |
| 695 | return ret; |
| 696 | |
| 697 | ret = cs_amp_write_cal_coeffs(dsp: &cs35l56->dsp.cs_dsp, |
| 698 | controls: &cs35l56_calibration_controls, |
| 699 | data: &cs35l56->base.cal_data); |
| 700 | |
| 701 | wm_adsp_stop(dsp: &cs35l56->dsp); |
| 702 | |
| 703 | if (ret == 0) |
| 704 | dev_info(cs35l56->base.dev, "Calibration applied\n" ); |
| 705 | |
| 706 | return ret; |
| 707 | } |
| 708 | |
| 709 | static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56) |
| 710 | { |
| 711 | int ret; |
| 712 | |
| 713 | /* Use wm_adsp to load and apply the firmware patch and coefficient files */ |
| 714 | ret = wm_adsp_power_up(dsp: &cs35l56->dsp, load_firmware: true); |
| 715 | if (ret) { |
| 716 | dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n" , __func__, ret); |
| 717 | return; |
| 718 | } |
| 719 | |
| 720 | cs35l56_write_cal(cs35l56); |
| 721 | |
| 722 | /* Always REINIT after applying patch or coefficients */ |
| 723 | cs35l56_mbox_send(cs35l56_base: &cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); |
| 724 | } |
| 725 | |
| 726 | static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing) |
| 727 | { |
| 728 | int ret; |
| 729 | |
| 730 | /* |
| 731 | * Disable SoundWire interrupts to prevent race with IRQ work. |
| 732 | * Setting sdw_irq_no_unmask prevents the handler re-enabling |
| 733 | * the SoundWire interrupt. |
| 734 | */ |
| 735 | if (cs35l56->sdw_peripheral) { |
| 736 | cs35l56->sdw_irq_no_unmask = true; |
| 737 | flush_work(work: &cs35l56->sdw_irq_work); |
| 738 | sdw_write_no_pm(slave: cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, value: 0); |
| 739 | sdw_read_no_pm(slave: cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1); |
| 740 | sdw_write_no_pm(slave: cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, value: 0xFF); |
| 741 | flush_work(work: &cs35l56->sdw_irq_work); |
| 742 | } |
| 743 | |
| 744 | ret = cs35l56_firmware_shutdown(cs35l56_base: &cs35l56->base); |
| 745 | if (ret) |
| 746 | goto err; |
| 747 | |
| 748 | /* |
| 749 | * Use wm_adsp to load and apply the firmware patch and coefficient files, |
| 750 | * but only if firmware is missing. If firmware is already patched just |
| 751 | * power-up wm_adsp without downloading firmware. |
| 752 | */ |
| 753 | ret = wm_adsp_power_up(dsp: &cs35l56->dsp, load_firmware: !!firmware_missing); |
| 754 | if (ret) { |
| 755 | dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n" , __func__, ret); |
| 756 | goto err; |
| 757 | } |
| 758 | |
| 759 | mutex_lock(&cs35l56->base.irq_lock); |
| 760 | |
| 761 | reinit_completion(x: &cs35l56->init_completion); |
| 762 | |
| 763 | cs35l56->soft_resetting = true; |
| 764 | cs35l56_system_reset(cs35l56_base: &cs35l56->base, is_soundwire: !!cs35l56->sdw_peripheral); |
| 765 | |
| 766 | if (cs35l56->sdw_peripheral) { |
| 767 | /* |
| 768 | * The system-reset causes the CS35L56 to detach from the bus. |
| 769 | * Wait for the manager to re-enumerate the CS35L56 and |
| 770 | * cs35l56_init() to run again. |
| 771 | */ |
| 772 | if (!wait_for_completion_timeout(x: &cs35l56->init_completion, |
| 773 | timeout: msecs_to_jiffies(m: 5000))) { |
| 774 | dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n" , |
| 775 | __func__); |
| 776 | goto err_unlock; |
| 777 | } |
| 778 | } else if (cs35l56_init(cs35l56)) { |
| 779 | goto err_unlock; |
| 780 | } |
| 781 | |
| 782 | regmap_clear_bits(map: cs35l56->base.regmap, |
| 783 | reg: cs35l56->base.fw_reg->prot_sts, |
| 784 | CS35L56_FIRMWARE_MISSING); |
| 785 | cs35l56->base.fw_patched = true; |
| 786 | |
| 787 | if (cs35l56_write_cal(cs35l56) == 0) |
| 788 | cs35l56_mbox_send(cs35l56_base: &cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); |
| 789 | |
| 790 | err_unlock: |
| 791 | mutex_unlock(lock: &cs35l56->base.irq_lock); |
| 792 | err: |
| 793 | /* Re-enable SoundWire interrupts */ |
| 794 | if (cs35l56->sdw_peripheral) { |
| 795 | cs35l56->sdw_irq_no_unmask = false; |
| 796 | sdw_write_no_pm(slave: cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, |
| 797 | CS35L56_SDW_INT_MASK_CODEC_IRQ); |
| 798 | } |
| 799 | } |
| 800 | |
| 801 | static void cs35l56_dsp_work(struct work_struct *work) |
| 802 | { |
| 803 | struct cs35l56_private *cs35l56 = container_of(work, |
| 804 | struct cs35l56_private, |
| 805 | dsp_work); |
| 806 | unsigned int firmware_version; |
| 807 | bool firmware_missing; |
| 808 | int ret; |
| 809 | |
| 810 | if (!cs35l56->base.init_done) |
| 811 | return; |
| 812 | |
| 813 | pm_runtime_get_sync(dev: cs35l56->base.dev); |
| 814 | |
| 815 | ret = cs35l56_read_prot_status(cs35l56_base: &cs35l56->base, fw_missing: &firmware_missing, fw_version: &firmware_version); |
| 816 | if (ret) |
| 817 | goto err; |
| 818 | |
| 819 | /* Populate fw file qualifier with the revision and security state */ |
| 820 | kfree(objp: cs35l56->dsp.fwf_name); |
| 821 | if (firmware_missing) { |
| 822 | cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, fmt: "%02x-dsp1" , cs35l56->base.rev); |
| 823 | } else { |
| 824 | /* Firmware files must match the running firmware version */ |
| 825 | cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, |
| 826 | fmt: "%02x%s-%06x-dsp1" , |
| 827 | cs35l56->base.rev, |
| 828 | cs35l56->base.secured ? "-s" : "" , |
| 829 | firmware_version); |
| 830 | } |
| 831 | |
| 832 | if (!cs35l56->dsp.fwf_name) |
| 833 | goto err; |
| 834 | |
| 835 | dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n" , |
| 836 | cs35l56->dsp.fwf_name, cs35l56->dsp.system_name); |
| 837 | |
| 838 | /* |
| 839 | * The firmware cannot be patched if it is already running from |
| 840 | * patch RAM. In this case the firmware files are versioned to |
| 841 | * match the running firmware version and will only contain |
| 842 | * tunings. We do not need to shutdown the firmware to apply |
| 843 | * tunings so can use the lower cost reinit sequence instead. |
| 844 | */ |
| 845 | if (!firmware_missing) |
| 846 | cs35l56_reinit_patch(cs35l56); |
| 847 | else |
| 848 | cs35l56_patch(cs35l56, firmware_missing); |
| 849 | |
| 850 | cs35l56_log_tuning(cs35l56_base: &cs35l56->base, cs_dsp: &cs35l56->dsp.cs_dsp); |
| 851 | err: |
| 852 | pm_runtime_mark_last_busy(dev: cs35l56->base.dev); |
| 853 | pm_runtime_put_autosuspend(dev: cs35l56->base.dev); |
| 854 | } |
| 855 | |
| 856 | static int cs35l56_component_probe(struct snd_soc_component *component) |
| 857 | { |
| 858 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 859 | struct dentry *debugfs_root = component->debugfs_root; |
| 860 | unsigned short vendor, device; |
| 861 | int ret; |
| 862 | |
| 863 | BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values)); |
| 864 | |
| 865 | if (!cs35l56->dsp.system_name && |
| 866 | (snd_soc_card_get_pci_ssid(card: component->card, vendor: &vendor, device: &device) == 0)) { |
| 867 | /* Append a speaker qualifier if there is a speaker ID */ |
| 868 | if (cs35l56->speaker_id >= 0) { |
| 869 | cs35l56->dsp.system_name = devm_kasprintf(dev: cs35l56->base.dev, |
| 870 | GFP_KERNEL, |
| 871 | fmt: "%04x%04x-spkid%d" , |
| 872 | vendor, device, |
| 873 | cs35l56->speaker_id); |
| 874 | } else { |
| 875 | cs35l56->dsp.system_name = devm_kasprintf(dev: cs35l56->base.dev, |
| 876 | GFP_KERNEL, |
| 877 | fmt: "%04x%04x" , |
| 878 | vendor, device); |
| 879 | } |
| 880 | if (!cs35l56->dsp.system_name) |
| 881 | return -ENOMEM; |
| 882 | } |
| 883 | |
| 884 | if (!wait_for_completion_timeout(x: &cs35l56->init_completion, |
| 885 | timeout: msecs_to_jiffies(m: 5000))) { |
| 886 | dev_err(cs35l56->base.dev, "%s: init_completion timed out\n" , __func__); |
| 887 | return -ENODEV; |
| 888 | } |
| 889 | |
| 890 | cs35l56->dsp.part = kasprintf(GFP_KERNEL, fmt: "cs35l%02x" , cs35l56->base.type); |
| 891 | if (!cs35l56->dsp.part) |
| 892 | return -ENOMEM; |
| 893 | |
| 894 | cs35l56->component = component; |
| 895 | wm_adsp2_component_probe(dsp: &cs35l56->dsp, component); |
| 896 | |
| 897 | debugfs_create_bool(name: "init_done" , mode: 0444, parent: debugfs_root, value: &cs35l56->base.init_done); |
| 898 | debugfs_create_bool(name: "can_hibernate" , mode: 0444, parent: debugfs_root, value: &cs35l56->base.can_hibernate); |
| 899 | debugfs_create_bool(name: "fw_patched" , mode: 0444, parent: debugfs_root, value: &cs35l56->base.fw_patched); |
| 900 | |
| 901 | |
| 902 | switch (cs35l56->base.type) { |
| 903 | case 0x54: |
| 904 | case 0x56: |
| 905 | case 0x57: |
| 906 | ret = snd_soc_add_component_controls(component, controls: cs35l56_controls, |
| 907 | ARRAY_SIZE(cs35l56_controls)); |
| 908 | break; |
| 909 | case 0x63: |
| 910 | ret = snd_soc_add_component_controls(component, controls: cs35l63_controls, |
| 911 | ARRAY_SIZE(cs35l63_controls)); |
| 912 | break; |
| 913 | default: |
| 914 | ret = -ENODEV; |
| 915 | break; |
| 916 | } |
| 917 | |
| 918 | if (ret) |
| 919 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "unable to add controls\n" ); |
| 920 | |
| 921 | queue_work(wq: cs35l56->dsp_wq, work: &cs35l56->dsp_work); |
| 922 | |
| 923 | return 0; |
| 924 | } |
| 925 | |
| 926 | static void cs35l56_component_remove(struct snd_soc_component *component) |
| 927 | { |
| 928 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 929 | |
| 930 | cancel_work_sync(work: &cs35l56->dsp_work); |
| 931 | |
| 932 | if (cs35l56->dsp.cs_dsp.booted) |
| 933 | wm_adsp_power_down(dsp: &cs35l56->dsp); |
| 934 | |
| 935 | wm_adsp2_component_remove(dsp: &cs35l56->dsp, component); |
| 936 | |
| 937 | kfree(objp: cs35l56->dsp.part); |
| 938 | cs35l56->dsp.part = NULL; |
| 939 | |
| 940 | kfree(objp: cs35l56->dsp.fwf_name); |
| 941 | cs35l56->dsp.fwf_name = NULL; |
| 942 | |
| 943 | cs35l56->component = NULL; |
| 944 | } |
| 945 | |
| 946 | static int cs35l56_set_bias_level(struct snd_soc_component *component, |
| 947 | enum snd_soc_bias_level level) |
| 948 | { |
| 949 | struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(c: component); |
| 950 | |
| 951 | switch (level) { |
| 952 | case SND_SOC_BIAS_STANDBY: |
| 953 | /* |
| 954 | * Wait for patching to complete when transitioning from |
| 955 | * BIAS_OFF to BIAS_STANDBY |
| 956 | */ |
| 957 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) |
| 958 | cs35l56_wait_dsp_ready(cs35l56); |
| 959 | |
| 960 | break; |
| 961 | default: |
| 962 | break; |
| 963 | } |
| 964 | |
| 965 | return 0; |
| 966 | } |
| 967 | |
| 968 | static const struct snd_soc_component_driver soc_component_dev_cs35l56 = { |
| 969 | .probe = cs35l56_component_probe, |
| 970 | .remove = cs35l56_component_remove, |
| 971 | |
| 972 | .dapm_widgets = cs35l56_dapm_widgets, |
| 973 | .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets), |
| 974 | .dapm_routes = cs35l56_audio_map, |
| 975 | .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map), |
| 976 | |
| 977 | .set_bias_level = cs35l56_set_bias_level, |
| 978 | |
| 979 | .suspend_bias_off = 1, /* see cs35l56_system_resume() */ |
| 980 | }; |
| 981 | |
| 982 | static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev) |
| 983 | { |
| 984 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 985 | |
| 986 | return cs35l56_runtime_suspend_common(cs35l56_base: &cs35l56->base); |
| 987 | } |
| 988 | |
| 989 | static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev) |
| 990 | { |
| 991 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 992 | |
| 993 | return cs35l56_runtime_resume_common(cs35l56_base: &cs35l56->base, is_soundwire: false); |
| 994 | } |
| 995 | |
| 996 | int cs35l56_system_suspend(struct device *dev) |
| 997 | { |
| 998 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 999 | |
| 1000 | dev_dbg(dev, "system_suspend\n" ); |
| 1001 | |
| 1002 | if (cs35l56->component) |
| 1003 | flush_work(work: &cs35l56->dsp_work); |
| 1004 | |
| 1005 | /* |
| 1006 | * The interrupt line is normally shared, but after we start suspending |
| 1007 | * we can't check if our device is the source of an interrupt, and can't |
| 1008 | * clear it. Prevent this race by temporarily disabling the parent irq |
| 1009 | * until we reach _no_irq. |
| 1010 | */ |
| 1011 | if (cs35l56->base.irq) |
| 1012 | disable_irq(irq: cs35l56->base.irq); |
| 1013 | |
| 1014 | return pm_runtime_force_suspend(dev); |
| 1015 | } |
| 1016 | EXPORT_SYMBOL_GPL(cs35l56_system_suspend); |
| 1017 | |
| 1018 | int cs35l56_system_suspend_late(struct device *dev) |
| 1019 | { |
| 1020 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 1021 | |
| 1022 | dev_dbg(dev, "system_suspend_late\n" ); |
| 1023 | |
| 1024 | /* |
| 1025 | * Assert RESET before removing supplies. |
| 1026 | * RESET is usually shared by all amps so it must not be asserted until |
| 1027 | * all driver instances have done their suspend() stage. |
| 1028 | */ |
| 1029 | if (cs35l56->base.reset_gpio) { |
| 1030 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 0); |
| 1031 | cs35l56_wait_min_reset_pulse(); |
| 1032 | } |
| 1033 | |
| 1034 | regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), consumers: cs35l56->supplies); |
| 1035 | |
| 1036 | return 0; |
| 1037 | } |
| 1038 | EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late); |
| 1039 | |
| 1040 | int cs35l56_system_suspend_no_irq(struct device *dev) |
| 1041 | { |
| 1042 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 1043 | |
| 1044 | dev_dbg(dev, "system_suspend_no_irq\n" ); |
| 1045 | |
| 1046 | /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */ |
| 1047 | if (cs35l56->base.irq) |
| 1048 | enable_irq(irq: cs35l56->base.irq); |
| 1049 | |
| 1050 | return 0; |
| 1051 | } |
| 1052 | EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq); |
| 1053 | |
| 1054 | int cs35l56_system_resume_no_irq(struct device *dev) |
| 1055 | { |
| 1056 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 1057 | |
| 1058 | dev_dbg(dev, "system_resume_no_irq\n" ); |
| 1059 | |
| 1060 | /* |
| 1061 | * WAKE interrupts unmask if the CS35L56 hibernates, which can cause |
| 1062 | * spurious interrupts, and the interrupt line is normally shared. |
| 1063 | * We can't check if our device is the source of an interrupt, and can't |
| 1064 | * clear it, until it has fully resumed. Prevent this race by temporarily |
| 1065 | * disabling the parent irq until we complete resume(). |
| 1066 | */ |
| 1067 | if (cs35l56->base.irq) |
| 1068 | disable_irq(irq: cs35l56->base.irq); |
| 1069 | |
| 1070 | return 0; |
| 1071 | } |
| 1072 | EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq); |
| 1073 | |
| 1074 | int cs35l56_system_resume_early(struct device *dev) |
| 1075 | { |
| 1076 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 1077 | int ret; |
| 1078 | |
| 1079 | dev_dbg(dev, "system_resume_early\n" ); |
| 1080 | |
| 1081 | /* Ensure a spec-compliant RESET pulse. */ |
| 1082 | if (cs35l56->base.reset_gpio) { |
| 1083 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 0); |
| 1084 | cs35l56_wait_min_reset_pulse(); |
| 1085 | } |
| 1086 | |
| 1087 | /* Enable supplies before releasing RESET. */ |
| 1088 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), consumers: cs35l56->supplies); |
| 1089 | if (ret) { |
| 1090 | dev_err(dev, "system_resume_early failed to enable supplies: %d\n" , ret); |
| 1091 | return ret; |
| 1092 | } |
| 1093 | |
| 1094 | /* Release shared RESET before drivers start resume(). */ |
| 1095 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 1); |
| 1096 | |
| 1097 | return 0; |
| 1098 | } |
| 1099 | EXPORT_SYMBOL_GPL(cs35l56_system_resume_early); |
| 1100 | |
| 1101 | int cs35l56_system_resume(struct device *dev) |
| 1102 | { |
| 1103 | struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); |
| 1104 | int ret; |
| 1105 | |
| 1106 | dev_dbg(dev, "system_resume\n" ); |
| 1107 | |
| 1108 | /* |
| 1109 | * We might have done a hard reset or the CS35L56 was power-cycled |
| 1110 | * so wait for control port to be ready. |
| 1111 | */ |
| 1112 | cs35l56_wait_control_port_ready(); |
| 1113 | |
| 1114 | /* Undo pm_runtime_force_suspend() before re-enabling the irq */ |
| 1115 | ret = pm_runtime_force_resume(dev); |
| 1116 | if (cs35l56->base.irq) |
| 1117 | enable_irq(irq: cs35l56->base.irq); |
| 1118 | |
| 1119 | if (ret) |
| 1120 | return ret; |
| 1121 | |
| 1122 | /* Firmware won't have been loaded if the component hasn't probed */ |
| 1123 | if (!cs35l56->component) |
| 1124 | return 0; |
| 1125 | |
| 1126 | ret = cs35l56_is_fw_reload_needed(cs35l56_base: &cs35l56->base); |
| 1127 | dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n" , ret); |
| 1128 | if (ret < 1) |
| 1129 | return ret; |
| 1130 | |
| 1131 | cs35l56->base.fw_patched = false; |
| 1132 | wm_adsp_power_down(dsp: &cs35l56->dsp); |
| 1133 | queue_work(wq: cs35l56->dsp_wq, work: &cs35l56->dsp_work); |
| 1134 | |
| 1135 | /* |
| 1136 | * suspend_bias_off ensures we are now in BIAS_OFF so there will be |
| 1137 | * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching. |
| 1138 | */ |
| 1139 | |
| 1140 | return 0; |
| 1141 | } |
| 1142 | EXPORT_SYMBOL_GPL(cs35l56_system_resume); |
| 1143 | |
| 1144 | static int cs35l56_control_add_nop(struct wm_adsp *dsp, struct cs_dsp_coeff_ctl *cs_ctl) |
| 1145 | { |
| 1146 | return 0; |
| 1147 | } |
| 1148 | |
| 1149 | static int cs35l56_dsp_init(struct cs35l56_private *cs35l56) |
| 1150 | { |
| 1151 | struct wm_adsp *dsp; |
| 1152 | int ret; |
| 1153 | |
| 1154 | cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp" ); |
| 1155 | if (!cs35l56->dsp_wq) |
| 1156 | return -ENOMEM; |
| 1157 | |
| 1158 | INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work); |
| 1159 | |
| 1160 | dsp = &cs35l56->dsp; |
| 1161 | cs35l56_init_cs_dsp(cs35l56_base: &cs35l56->base, cs_dsp: &dsp->cs_dsp); |
| 1162 | |
| 1163 | /* |
| 1164 | * dsp->part is filled in later as it is based on the DEVID. In a |
| 1165 | * SoundWire system that cannot be read until enumeration has occurred |
| 1166 | * and the device has attached. |
| 1167 | */ |
| 1168 | dsp->fw = 12; |
| 1169 | dsp->wmfw_optional = true; |
| 1170 | |
| 1171 | /* |
| 1172 | * None of the firmware controls need to be exported so add a no-op |
| 1173 | * callback that suppresses creating an ALSA control. |
| 1174 | */ |
| 1175 | dsp->control_add = &cs35l56_control_add_nop; |
| 1176 | |
| 1177 | dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n" , dsp->system_name); |
| 1178 | |
| 1179 | ret = wm_halo_init(dsp); |
| 1180 | if (ret != 0) { |
| 1181 | dev_err(cs35l56->base.dev, "wm_halo_init failed\n" ); |
| 1182 | return ret; |
| 1183 | } |
| 1184 | |
| 1185 | return 0; |
| 1186 | } |
| 1187 | |
| 1188 | static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56) |
| 1189 | { |
| 1190 | struct device *dev = cs35l56->base.dev; |
| 1191 | const char *prop; |
| 1192 | int ret; |
| 1193 | |
| 1194 | ret = device_property_read_string(dev, propname: "cirrus,firmware-uid" , val: &prop); |
| 1195 | /* If bad sw node property, return 0 and fallback to legacy firmware path */ |
| 1196 | if (ret < 0) |
| 1197 | return 0; |
| 1198 | |
| 1199 | /* Append a speaker qualifier if there is a speaker ID */ |
| 1200 | if (cs35l56->speaker_id >= 0) |
| 1201 | cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, fmt: "%s-spkid%d" , |
| 1202 | prop, cs35l56->speaker_id); |
| 1203 | else |
| 1204 | cs35l56->dsp.system_name = devm_kstrdup(dev, s: prop, GFP_KERNEL); |
| 1205 | |
| 1206 | if (cs35l56->dsp.system_name == NULL) |
| 1207 | return -ENOMEM; |
| 1208 | |
| 1209 | dev_dbg(dev, "Firmware UID: %s\n" , cs35l56->dsp.system_name); |
| 1210 | |
| 1211 | return 0; |
| 1212 | } |
| 1213 | |
| 1214 | /* |
| 1215 | * Some SoundWire laptops have a spk-id-gpios property but it points to |
| 1216 | * the wrong ACPI Device node so can't be used to get the GPIO. Try to |
| 1217 | * find the SDCA node containing the GpioIo resource and add a GPIO |
| 1218 | * mapping to it. |
| 1219 | */ |
| 1220 | static const struct acpi_gpio_params cs35l56_af01_first_gpio = { 0, 0, false }; |
| 1221 | static const struct acpi_gpio_mapping cs35l56_af01_spkid_gpios_mapping[] = { |
| 1222 | { "spk-id-gpios" , &cs35l56_af01_first_gpio, 1 }, |
| 1223 | { } |
| 1224 | }; |
| 1225 | |
| 1226 | static void cs35l56_acpi_dev_release_driver_gpios(void *adev) |
| 1227 | { |
| 1228 | acpi_dev_remove_driver_gpios(adev); |
| 1229 | } |
| 1230 | |
| 1231 | static int cs35l56_try_get_broken_sdca_spkid_gpio(struct cs35l56_private *cs35l56) |
| 1232 | { |
| 1233 | struct fwnode_handle *af01_fwnode; |
| 1234 | const union acpi_object *obj; |
| 1235 | struct gpio_desc *desc; |
| 1236 | int ret; |
| 1237 | |
| 1238 | /* Find the SDCA node containing the GpioIo */ |
| 1239 | af01_fwnode = device_get_named_child_node(dev: cs35l56->base.dev, childname: "AF01" ); |
| 1240 | if (!af01_fwnode) { |
| 1241 | dev_dbg(cs35l56->base.dev, "No AF01 node\n" ); |
| 1242 | return -ENOENT; |
| 1243 | } |
| 1244 | |
| 1245 | ret = acpi_dev_get_property(ACPI_COMPANION(cs35l56->base.dev), |
| 1246 | name: "spk-id-gpios" , ACPI_TYPE_PACKAGE, obj: &obj); |
| 1247 | if (ret) { |
| 1248 | dev_dbg(cs35l56->base.dev, "Could not get spk-id-gpios package: %d\n" , ret); |
| 1249 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1250 | return -ENOENT; |
| 1251 | } |
| 1252 | |
| 1253 | /* The broken properties we can handle are a 4-element package (one GPIO) */ |
| 1254 | if (obj->package.count != 4) { |
| 1255 | dev_warn(cs35l56->base.dev, "Unexpected spk-id element count %d\n" , |
| 1256 | obj->package.count); |
| 1257 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1258 | return -ENOENT; |
| 1259 | } |
| 1260 | |
| 1261 | /* Add a GPIO mapping if it doesn't already have one */ |
| 1262 | if (!fwnode_property_present(fwnode: af01_fwnode, propname: "spk-id-gpios" )) { |
| 1263 | struct acpi_device *adev = to_acpi_device_node(af01_fwnode); |
| 1264 | |
| 1265 | /* |
| 1266 | * Can't use devm_acpi_dev_add_driver_gpios() because the |
| 1267 | * mapping isn't being added to the node pointed to by |
| 1268 | * ACPI_COMPANION(). |
| 1269 | */ |
| 1270 | ret = acpi_dev_add_driver_gpios(adev, gpios: cs35l56_af01_spkid_gpios_mapping); |
| 1271 | if (ret) { |
| 1272 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1273 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, |
| 1274 | fmt: "Failed to add gpio mapping to AF01\n" ); |
| 1275 | } |
| 1276 | |
| 1277 | ret = devm_add_action_or_reset(cs35l56->base.dev, |
| 1278 | cs35l56_acpi_dev_release_driver_gpios, |
| 1279 | adev); |
| 1280 | if (ret) { |
| 1281 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1282 | return ret; |
| 1283 | } |
| 1284 | |
| 1285 | dev_dbg(cs35l56->base.dev, "Added spk-id-gpios mapping to AF01\n" ); |
| 1286 | } |
| 1287 | |
| 1288 | desc = fwnode_gpiod_get_index(fwnode: af01_fwnode, con_id: "spk-id" , index: 0, flags: GPIOD_IN, NULL); |
| 1289 | if (IS_ERR(ptr: desc)) { |
| 1290 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1291 | ret = PTR_ERR(ptr: desc); |
| 1292 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Get GPIO from AF01 failed\n" ); |
| 1293 | } |
| 1294 | |
| 1295 | ret = gpiod_get_value_cansleep(desc); |
| 1296 | gpiod_put(desc); |
| 1297 | |
| 1298 | if (ret < 0) { |
| 1299 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1300 | dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Error reading spk-id GPIO\n" ); |
| 1301 | return ret; |
| 1302 | } |
| 1303 | |
| 1304 | fwnode_handle_put(fwnode: af01_fwnode); |
| 1305 | |
| 1306 | dev_info(cs35l56->base.dev, "Got spk-id from AF01\n" ); |
| 1307 | |
| 1308 | return ret; |
| 1309 | } |
| 1310 | |
| 1311 | int cs35l56_common_probe(struct cs35l56_private *cs35l56) |
| 1312 | { |
| 1313 | int ret; |
| 1314 | |
| 1315 | init_completion(x: &cs35l56->init_completion); |
| 1316 | mutex_init(&cs35l56->base.irq_lock); |
| 1317 | cs35l56->base.cal_index = -1; |
| 1318 | cs35l56->speaker_id = -ENOENT; |
| 1319 | |
| 1320 | dev_set_drvdata(dev: cs35l56->base.dev, data: cs35l56); |
| 1321 | |
| 1322 | cs35l56_fill_supply_names(data: cs35l56->supplies); |
| 1323 | ret = devm_regulator_bulk_get(dev: cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies), |
| 1324 | consumers: cs35l56->supplies); |
| 1325 | if (ret != 0) |
| 1326 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Failed to request supplies\n" ); |
| 1327 | |
| 1328 | /* Reset could be controlled by the BIOS or shared by multiple amps */ |
| 1329 | cs35l56->base.reset_gpio = devm_gpiod_get_optional(dev: cs35l56->base.dev, con_id: "reset" , |
| 1330 | flags: GPIOD_OUT_LOW); |
| 1331 | if (IS_ERR(ptr: cs35l56->base.reset_gpio)) { |
| 1332 | ret = PTR_ERR(ptr: cs35l56->base.reset_gpio); |
| 1333 | /* |
| 1334 | * If RESET is shared the first amp to probe will grab the reset |
| 1335 | * line and reset all the amps |
| 1336 | */ |
| 1337 | if (ret != -EBUSY) |
| 1338 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Failed to get reset GPIO\n" ); |
| 1339 | |
| 1340 | dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n" ); |
| 1341 | cs35l56->base.reset_gpio = NULL; |
| 1342 | } |
| 1343 | |
| 1344 | ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), consumers: cs35l56->supplies); |
| 1345 | if (ret != 0) |
| 1346 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Failed to enable supplies\n" ); |
| 1347 | |
| 1348 | if (cs35l56->base.reset_gpio) { |
| 1349 | /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */ |
| 1350 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 0); |
| 1351 | cs35l56_wait_min_reset_pulse(); |
| 1352 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 1); |
| 1353 | } |
| 1354 | |
| 1355 | ret = cs35l56_get_speaker_id(cs35l56_base: &cs35l56->base); |
| 1356 | if (ACPI_COMPANION(cs35l56->base.dev) && cs35l56->sdw_peripheral && (ret == -ENOENT)) |
| 1357 | ret = cs35l56_try_get_broken_sdca_spkid_gpio(cs35l56); |
| 1358 | |
| 1359 | if ((ret < 0) && (ret != -ENOENT)) |
| 1360 | goto err; |
| 1361 | |
| 1362 | cs35l56->speaker_id = ret; |
| 1363 | |
| 1364 | ret = cs35l56_get_firmware_uid(cs35l56); |
| 1365 | if (ret != 0) |
| 1366 | goto err; |
| 1367 | |
| 1368 | ret = cs35l56_dsp_init(cs35l56); |
| 1369 | if (ret < 0) { |
| 1370 | dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "DSP init failed\n" ); |
| 1371 | goto err; |
| 1372 | } |
| 1373 | |
| 1374 | ret = devm_snd_soc_register_component(dev: cs35l56->base.dev, |
| 1375 | component_driver: &soc_component_dev_cs35l56, |
| 1376 | dai_drv: cs35l56_dai, ARRAY_SIZE(cs35l56_dai)); |
| 1377 | if (ret < 0) { |
| 1378 | dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Register codec failed\n" ); |
| 1379 | goto err; |
| 1380 | } |
| 1381 | |
| 1382 | return 0; |
| 1383 | |
| 1384 | err: |
| 1385 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 0); |
| 1386 | regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), consumers: cs35l56->supplies); |
| 1387 | |
| 1388 | return ret; |
| 1389 | } |
| 1390 | EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, "SND_SOC_CS35L56_CORE" ); |
| 1391 | |
| 1392 | int cs35l56_init(struct cs35l56_private *cs35l56) |
| 1393 | { |
| 1394 | int ret; |
| 1395 | |
| 1396 | /* |
| 1397 | * Check whether the actions associated with soft reset or one time |
| 1398 | * init need to be performed. |
| 1399 | */ |
| 1400 | if (cs35l56->soft_resetting) |
| 1401 | goto post_soft_reset; |
| 1402 | |
| 1403 | if (cs35l56->base.init_done) |
| 1404 | return 0; |
| 1405 | |
| 1406 | pm_runtime_set_autosuspend_delay(dev: cs35l56->base.dev, delay: 100); |
| 1407 | pm_runtime_use_autosuspend(dev: cs35l56->base.dev); |
| 1408 | pm_runtime_set_active(dev: cs35l56->base.dev); |
| 1409 | pm_runtime_enable(dev: cs35l56->base.dev); |
| 1410 | |
| 1411 | ret = cs35l56_hw_init(cs35l56_base: &cs35l56->base); |
| 1412 | if (ret < 0) |
| 1413 | return ret; |
| 1414 | |
| 1415 | ret = cs35l56_set_patch(cs35l56_base: &cs35l56->base); |
| 1416 | if (ret) |
| 1417 | return ret; |
| 1418 | |
| 1419 | ret = cs35l56_get_calibration(cs35l56_base: &cs35l56->base); |
| 1420 | if (ret) |
| 1421 | return ret; |
| 1422 | |
| 1423 | if (!cs35l56->base.reset_gpio) { |
| 1424 | dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n" ); |
| 1425 | cs35l56->soft_resetting = true; |
| 1426 | cs35l56_system_reset(cs35l56_base: &cs35l56->base, is_soundwire: !!cs35l56->sdw_peripheral); |
| 1427 | if (cs35l56->sdw_peripheral) { |
| 1428 | /* Keep alive while we wait for re-enumeration */ |
| 1429 | pm_runtime_get_noresume(dev: cs35l56->base.dev); |
| 1430 | return 0; |
| 1431 | } |
| 1432 | } |
| 1433 | |
| 1434 | post_soft_reset: |
| 1435 | if (cs35l56->soft_resetting) { |
| 1436 | cs35l56->soft_resetting = false; |
| 1437 | |
| 1438 | /* Done re-enumerating after one-time init so release the keep-alive */ |
| 1439 | if (cs35l56->sdw_peripheral && !cs35l56->base.init_done) |
| 1440 | pm_runtime_put_noidle(dev: cs35l56->base.dev); |
| 1441 | |
| 1442 | regcache_mark_dirty(map: cs35l56->base.regmap); |
| 1443 | ret = cs35l56_wait_for_firmware_boot(cs35l56_base: &cs35l56->base); |
| 1444 | if (ret) |
| 1445 | return ret; |
| 1446 | |
| 1447 | dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n" ); |
| 1448 | |
| 1449 | regcache_cache_only(map: cs35l56->base.regmap, enable: false); |
| 1450 | } |
| 1451 | |
| 1452 | /* Disable auto-hibernate so that runtime_pm has control */ |
| 1453 | ret = cs35l56_mbox_send(cs35l56_base: &cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE); |
| 1454 | if (ret) |
| 1455 | return ret; |
| 1456 | |
| 1457 | /* Registers could be dirty after soft reset or SoundWire enumeration */ |
| 1458 | regcache_sync(map: cs35l56->base.regmap); |
| 1459 | |
| 1460 | /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */ |
| 1461 | ret = regmap_set_bits(map: cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, |
| 1462 | CS35L56_ASP1_DOUT_HIZ_CTRL_MASK); |
| 1463 | if (ret) |
| 1464 | return dev_err_probe(dev: cs35l56->base.dev, err: ret, fmt: "Failed to write ASP1_CONTROL3\n" ); |
| 1465 | |
| 1466 | cs35l56->base.init_done = true; |
| 1467 | complete(&cs35l56->init_completion); |
| 1468 | |
| 1469 | return 0; |
| 1470 | } |
| 1471 | EXPORT_SYMBOL_NS_GPL(cs35l56_init, "SND_SOC_CS35L56_CORE" ); |
| 1472 | |
| 1473 | void cs35l56_remove(struct cs35l56_private *cs35l56) |
| 1474 | { |
| 1475 | cs35l56->base.init_done = false; |
| 1476 | |
| 1477 | /* |
| 1478 | * WAKE IRQs unmask if CS35L56 hibernates so free the handler to |
| 1479 | * prevent it racing with remove(). |
| 1480 | */ |
| 1481 | if (cs35l56->base.irq) |
| 1482 | devm_free_irq(dev: cs35l56->base.dev, irq: cs35l56->base.irq, dev_id: &cs35l56->base); |
| 1483 | |
| 1484 | destroy_workqueue(wq: cs35l56->dsp_wq); |
| 1485 | |
| 1486 | pm_runtime_dont_use_autosuspend(dev: cs35l56->base.dev); |
| 1487 | pm_runtime_suspend(dev: cs35l56->base.dev); |
| 1488 | pm_runtime_disable(dev: cs35l56->base.dev); |
| 1489 | |
| 1490 | regcache_cache_only(map: cs35l56->base.regmap, enable: true); |
| 1491 | |
| 1492 | gpiod_set_value_cansleep(desc: cs35l56->base.reset_gpio, value: 0); |
| 1493 | regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), consumers: cs35l56->supplies); |
| 1494 | } |
| 1495 | EXPORT_SYMBOL_NS_GPL(cs35l56_remove, "SND_SOC_CS35L56_CORE" ); |
| 1496 | |
| 1497 | #if IS_ENABLED(CONFIG_SND_SOC_CS35L56_I2C) || IS_ENABLED(CONFIG_SND_SOC_CS35L56_SPI) |
| 1498 | EXPORT_NS_GPL_DEV_PM_OPS(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE) = { |
| 1499 | SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL) |
| 1500 | SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume) |
| 1501 | LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early) |
| 1502 | NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq) |
| 1503 | }; |
| 1504 | #endif |
| 1505 | |
| 1506 | MODULE_DESCRIPTION("ASoC CS35L56 driver" ); |
| 1507 | MODULE_IMPORT_NS("SND_SOC_CS35L56_SHARED" ); |
| 1508 | MODULE_IMPORT_NS("SND_SOC_CS_AMP_LIB" ); |
| 1509 | MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>" ); |
| 1510 | MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>" ); |
| 1511 | MODULE_LICENSE("GPL" ); |
| 1512 | |