1// SPDX-License-Identifier: GPL-2.0
2//
3// ALSA SoC Texas Instruments TAS2783 Audio Smart Amplifier
4//
5// Copyright (C) 2025 Texas Instruments Incorporated
6// https://www.ti.com
7//
8// The TAS2783 driver implements a flexible and configurable
9// algo coefficient setting for single TAS2783 chips.
10//
11// Author: Niranjan H Y <niranjanhy@ti.com>
12// Author: Baojun Xu <baojun.xu@ti.com>
13// Author: Kevin Lu <kevin-lu@ti.com>
14
15#include <linux/unaligned.h>
16#include <linux/crc32.h>
17#include <linux/efi.h>
18#include <linux/err.h>
19#include <linux/firmware.h>
20#include <linux/init.h>
21#include <linux/module.h>
22#include <sound/pcm_params.h>
23#include <linux/pm.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
26#include <linux/wait.h>
27#include <linux/soundwire/sdw.h>
28#include <linux/soundwire/sdw_registers.h>
29#include <linux/soundwire/sdw_type.h>
30#include <sound/sdw.h>
31#include <sound/soc.h>
32#include <sound/tlv.h>
33#include <sound/tas2781-tlv.h>
34
35#include "tas2783.h"
36
37#define TIMEOUT_FW_DL_MS (3000)
38#define FW_DL_OFFSET 36
39#define FW_FL_HDR 12
40#define TAS2783_PROBE_TIMEOUT 5000
41#define TAS2783_CALI_GUID EFI_GUID(0x1f52d2a1, 0xbb3a, 0x457d, 0xbc, \
42 0x09, 0x43, 0xa3, 0xf4, 0x31, 0x0a, 0x92)
43
44static const u32 tas2783_cali_reg[] = {
45 TAS2783_CAL_R0,
46 TAS2783_CAL_INVR0,
47 TAS2783_CAL_R0LOW,
48 TAS2783_CAL_POWER,
49 TAS2783_CAL_TLIM,
50};
51
52struct bin_header_t {
53 u16 vendor_id;
54 u16 version;
55 u32 file_id;
56 u32 length;
57};
58
59struct calibration_data {
60 u32 is_valid;
61 unsigned long read_sz;
62 u8 data[TAS2783_CALIB_DATA_SZ];
63};
64
65struct tas2783_prv {
66 struct snd_soc_component *component;
67 struct calibration_data cali_data;
68 struct sdw_slave *sdw_peripheral;
69 enum sdw_slave_status status;
70 /* calibration */
71 struct mutex calib_lock;
72 /* pde and firmware download */
73 struct mutex pde_lock;
74 struct regmap *regmap;
75 struct device *dev;
76 struct class *class;
77 struct attribute_group *cal_attr_groups;
78 struct tm tm;
79 u8 rca_binaryname[64];
80 u8 dev_name[32];
81 bool hw_init;
82 /* wq for firmware download */
83 wait_queue_head_t fw_wait;
84 bool fw_dl_task_done;
85 bool fw_dl_success;
86};
87
88static const struct reg_default tas2783_reg_default[] = {
89 {TAS2783_AMP_LEVEL, 0x28},
90 {TASDEV_REG_SDW(0, 0, 0x03), 0x28},
91 {TASDEV_REG_SDW(0, 0, 0x04), 0x21},
92 {TASDEV_REG_SDW(0, 0, 0x05), 0x41},
93 {TASDEV_REG_SDW(0, 0, 0x06), 0x00},
94 {TASDEV_REG_SDW(0, 0, 0x07), 0x20},
95 {TASDEV_REG_SDW(0, 0, 0x08), 0x09},
96 {TASDEV_REG_SDW(0, 0, 0x09), 0x02},
97 {TASDEV_REG_SDW(0, 0, 0x0a), 0x0a},
98 {TASDEV_REG_SDW(0, 0, 0x0c), 0x10},
99 {TASDEV_REG_SDW(0, 0, 0x0d), 0x13},
100 {TASDEV_REG_SDW(0, 0, 0x0e), 0xc2},
101 {TASDEV_REG_SDW(0, 0, 0x0f), 0x40},
102 {TASDEV_REG_SDW(0, 0, 0x10), 0x04},
103 {TASDEV_REG_SDW(0, 0, 0x13), 0x13},
104 {TASDEV_REG_SDW(0, 0, 0x14), 0x12},
105 {TASDEV_REG_SDW(0, 0, 0x15), 0x00},
106 {TASDEV_REG_SDW(0, 0, 0x16), 0x12},
107 {TASDEV_REG_SDW(0, 0, 0x17), 0x80},
108 {TAS2783_DVC_LVL, 0x00},
109 {TASDEV_REG_SDW(0, 0, 0x1b), 0x61},
110 {TASDEV_REG_SDW(0, 0, 0x1c), 0x36},
111 {TASDEV_REG_SDW(0, 0, 0x1d), 0x00},
112 {TASDEV_REG_SDW(0, 0, 0x1f), 0x01},
113 {TASDEV_REG_SDW(0, 0, 0x20), 0x2e},
114 {TASDEV_REG_SDW(0, 0, 0x21), 0x00},
115 {TASDEV_REG_SDW(0, 0, 0x34), 0x06},
116 {TASDEV_REG_SDW(0, 0, 0x35), 0xbd},
117 {TASDEV_REG_SDW(0, 0, 0x36), 0xad},
118 {TASDEV_REG_SDW(0, 0, 0x37), 0xa8},
119 {TASDEV_REG_SDW(0, 0, 0x38), 0x00},
120 {TASDEV_REG_SDW(0, 0, 0x3b), 0xfc},
121 {TASDEV_REG_SDW(0, 0, 0x3d), 0xdd},
122 {TASDEV_REG_SDW(0, 0, 0x40), 0xf6},
123 {TASDEV_REG_SDW(0, 0, 0x41), 0x14},
124 {TASDEV_REG_SDW(0, 0, 0x5c), 0x19},
125 {TASDEV_REG_SDW(0, 0, 0x5d), 0x80},
126 {TASDEV_REG_SDW(0, 0, 0x63), 0x48},
127 {TASDEV_REG_SDW(0, 0, 0x65), 0x08},
128 {TASDEV_REG_SDW(0, 0, 0x66), 0xb2},
129 {TASDEV_REG_SDW(0, 0, 0x67), 0x00},
130 {TASDEV_REG_SDW(0, 0, 0x6a), 0x12},
131 {TASDEV_REG_SDW(0, 0, 0x6b), 0xfb},
132 {TASDEV_REG_SDW(0, 0, 0x6c), 0x00},
133 {TASDEV_REG_SDW(0, 0, 0x6d), 0x00},
134 {TASDEV_REG_SDW(0, 0, 0x6e), 0x1a},
135 {TASDEV_REG_SDW(0, 0, 0x6f), 0x00},
136 {TASDEV_REG_SDW(0, 0, 0x70), 0x96},
137 {TASDEV_REG_SDW(0, 0, 0x71), 0x02},
138 {TASDEV_REG_SDW(0, 0, 0x73), 0x08},
139 {TASDEV_REG_SDW(0, 0, 0x75), 0xe0},
140 {TASDEV_REG_SDW(0, 0, 0x7a), 0x60},
141 {TASDEV_REG_SDW(0, 0, 0x60), 0x21},
142 {TASDEV_REG_SDW(0, 1, 0x02), 0x00},
143 {TASDEV_REG_SDW(0, 1, 0x17), 0xc0},
144 {TASDEV_REG_SDW(0, 1, 0x19), 0x60},
145 {TASDEV_REG_SDW(0, 1, 0x35), 0x75},
146 {TASDEV_REG_SDW(0, 1, 0x3d), 0x00},
147 {TASDEV_REG_SDW(0, 1, 0x3e), 0x00},
148 {TASDEV_REG_SDW(0, 1, 0x3f), 0x00},
149 {TASDEV_REG_SDW(0, 1, 0x40), 0x00},
150 {TASDEV_REG_SDW(0, 1, 0x41), 0x00},
151 {TASDEV_REG_SDW(0, 1, 0x42), 0x00},
152 {TASDEV_REG_SDW(0, 1, 0x43), 0x00},
153 {TASDEV_REG_SDW(0, 1, 0x44), 0x00},
154 {TASDEV_REG_SDW(0, 1, 0x45), 0x00},
155 {TASDEV_REG_SDW(0, 1, 0x47), 0xab},
156 {TASDEV_REG_SDW(0, 0xfd, 0x0d), 0x0d},
157 {TASDEV_REG_SDW(0, 0xfd, 0x39), 0x00},
158 {TASDEV_REG_SDW(0, 0xfd, 0x3e), 0x00},
159 {TASDEV_REG_SDW(0, 0xfd, 0x45), 0x00},
160 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0), 0x0},
161 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0), 0x0},
162 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0), 0x0},
163 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0), 0x0},
164 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0), 0x0},
165 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0), 0x0},
166 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0), 0x0},
167 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0), 0x0},
168 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0), 0x0},
169 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0), 0x0},
170 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x01, 1), 0x1},
171 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1), 0x9c00},
172 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0), 0x1},
173 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1), 0x1},
174 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1), 0x0},
175 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0), 0x0},
176 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1), 0x1},
177 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0), 0x1},
178 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1), 0x0},
179 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0), 0x0},
180 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0), 0x1},
181 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1), 0x1},
182 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2), 0x1},
183 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0), 0x0},
184 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1), 0x0},
185 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2), 0x0},
186 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0), 0x0},
187 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0), 0x0},
188 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0), 0x0},
189 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0), 0x0},
190 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0), 0x0},
191 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0), 0x0},
192 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0), 0x0},
193 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0), 0x0},
194 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0), 0x0},
195 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0), 0x0},
196 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0), 0x0},
197 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0), 0x0},
198 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0), 0x0},
199 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0), 0x0},
200 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0), 0x0},
201 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0), 0x0},
202 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0), 0x0},
203 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0), 0x0},
204 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0), 0x0},
205 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0), 0x1},
206 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0), 0x0},
207 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0), 0x0},
208 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0), 0x0},
209 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0), 0x0},
210 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0), 0x0},
211 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0), 0x0},
212 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0), 0x1},
213 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0), 0x0},
214 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0), 0x0},
215 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0), 0x0},
216 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0), 0x0},
217 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0), 0x0},
218 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1), 0x0},
219 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2), 0x0},
220 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3), 0x0},
221 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4), 0x0},
222 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5), 0x0},
223 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6), 0x0},
224 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7), 0x0},
225 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0), 0x0},
226 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0), 0x0},
227 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0), 0x0},
228 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0), 0x0},
229 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0), 0x0},
230 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0), 0x0},
231 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0), 0x0},
232 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0), 0x0},
233 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0), 0x0},
234 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0), 0x0},
235 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0), 0x0},
236 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0), 0x0},
237 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0), 0x0},
238 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0), 0x0},
239 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0), 0x0},
240 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0), 0x0},
241 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1), 0x0},
242 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2), 0x0},
243 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3), 0x0},
244 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4), 0x0},
245 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5), 0x0},
246 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6), 0x0},
247 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7), 0x0},
248 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8), 0x0},
249 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9), 0x0},
250 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa), 0x0},
251 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb), 0x0},
252 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc), 0x0},
253 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd), 0x0},
254 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe), 0x0},
255 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf), 0x0},
256 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0), 0x3},
257 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0), 0x3},
258 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0), 0x0},
259 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0), 0x0},
260 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0), 0x0},
261 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0), 0x0},
262 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0), 0x0},
263 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0), 0x0},
264 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0), 0x0},
265 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0), 0x0},
266 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0), 0x0},
267 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0), 0x0},
268 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0), 0x0},
269 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0), 0x1},
270 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0), 0x0},
271 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0), 0x0},
272 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0), 0x0},
273 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0), 0x1},
274 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0), 0x0},
275 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0), 0x0},
276 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0), 0x0},
277 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0), 0x0},
278 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0), 0x0},
279 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0), 0x1},
280 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0), 0x0},
281 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0), 0x0},
282 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0), 0x0},
283 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0), 0x0},
284 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0), 0x0},
285 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 0x10, 0), 0x0},
286};
287
288static const struct reg_sequence tas2783_init_seq[] = {
289 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0x00), 0x04),
290 REG_SEQ0(0x00800418, 0x00),
291 REG_SEQ0(0x00800419, 0x00),
292 REG_SEQ0(0x0080041a, 0x00),
293 REG_SEQ0(0x0080041b, 0x00),
294 REG_SEQ0(0x00800428, 0x40),
295 REG_SEQ0(0x00800429, 0x00),
296 REG_SEQ0(0x0080042a, 0x00),
297 REG_SEQ0(0x0080042b, 0x00),
298 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x1, 0x00), 0x00),
299 REG_SEQ0(0x0080005c, 0xD9),
300 REG_SEQ0(0x00800082, 0x20),
301 REG_SEQ0(0x008000a1, 0x00),
302 REG_SEQ0(0x00800097, 0xc8),
303 REG_SEQ0(0x00800099, 0x20),
304 REG_SEQ0(0x008000c7, 0xaa),
305 REG_SEQ0(0x008000b5, 0x74),
306 REG_SEQ0(0x00800082, 0x20),
307 REG_SEQ0(0x00807e8d, 0x0d),
308 REG_SEQ0(0x00807eb9, 0x53),
309 REG_SEQ0(0x00807ebe, 0x42),
310 REG_SEQ0(0x00807ec5, 0x37),
311 REG_SEQ0(0x00800066, 0x92),
312 REG_SEQ0(0x00800003, 0x28),
313 REG_SEQ0(0x00800004, 0x21),
314 REG_SEQ0(0x00800005, 0x41),
315 REG_SEQ0(0x00800006, 0x00),
316 REG_SEQ0(0x00800007, 0x20),
317 REG_SEQ0(0x0080000c, 0x10),
318 REG_SEQ0(0x00800013, 0x08),
319 REG_SEQ0(0x00800015, 0x00),
320 REG_SEQ0(0x00800017, 0x80),
321 REG_SEQ0(0x0080001a, 0x00),
322 REG_SEQ0(0x0080001b, 0x22),
323 REG_SEQ0(0x0080001c, 0x36),
324 REG_SEQ0(0x0080001d, 0x01),
325 REG_SEQ0(0x0080001f, 0x00),
326 REG_SEQ0(0x00800020, 0x2e),
327 REG_SEQ0(0x00800034, 0x06),
328 REG_SEQ0(0x00800035, 0xb9),
329 REG_SEQ0(0x00800036, 0xad),
330 REG_SEQ0(0x00800037, 0xa8),
331 REG_SEQ0(0x00800038, 0x00),
332 REG_SEQ0(0x0080003b, 0xfc),
333 REG_SEQ0(0x0080003d, 0xdd),
334 REG_SEQ0(0x00800040, 0xf6),
335 REG_SEQ0(0x00800041, 0x14),
336 REG_SEQ0(0x0080005c, 0x19),
337 REG_SEQ0(0x0080005d, 0x80),
338 REG_SEQ0(0x00800063, 0x48),
339 REG_SEQ0(0x00800065, 0x08),
340 REG_SEQ0(0x00800067, 0x00),
341 REG_SEQ0(0x0080006a, 0x12),
342 REG_SEQ0(0x0080006b, 0x7b),
343 REG_SEQ0(0x0080006c, 0x00),
344 REG_SEQ0(0x0080006d, 0x00),
345 REG_SEQ0(0x0080006e, 0x1a),
346 REG_SEQ0(0x0080006f, 0x00),
347 REG_SEQ0(0x00800070, 0x96),
348 REG_SEQ0(0x00800071, 0x02),
349 REG_SEQ0(0x00800073, 0x08),
350 REG_SEQ0(0x00800075, 0xe0),
351 REG_SEQ0(0x0080007a, 0x60),
352 REG_SEQ0(0x008000bd, 0x00),
353 REG_SEQ0(0x008000be, 0x00),
354 REG_SEQ0(0x008000bf, 0x00),
355 REG_SEQ0(0x008000c0, 0x00),
356 REG_SEQ0(0x008000c1, 0x00),
357 REG_SEQ0(0x008000c2, 0x00),
358 REG_SEQ0(0x008000c3, 0x00),
359 REG_SEQ0(0x008000c4, 0x00),
360 REG_SEQ0(0x008000c5, 0x00),
361 REG_SEQ0(0x00800008, 0x49),
362 REG_SEQ0(0x00800009, 0x02),
363 REG_SEQ0(0x0080000a, 0x1a),
364 REG_SEQ0(0x0080000d, 0x93),
365 REG_SEQ0(0x0080000e, 0x82),
366 REG_SEQ0(0x0080000f, 0x42),
367 REG_SEQ0(0x00800010, 0x84),
368 REG_SEQ0(0x00800014, 0x0a),
369 REG_SEQ0(0x00800016, 0x00),
370 REG_SEQ0(0x00800060, 0x21),
371};
372
373static int tas2783_sdca_mbq_size(struct device *dev, u32 reg)
374{
375 switch (reg) {
376 case 0x000 ... 0x080: /* Data port 0. */
377 case 0x100 ... 0x140: /* Data port 1. */
378 case 0x200 ... 0x240: /* Data port 2. */
379 case 0x300 ... 0x340: /* Data port 3. */
380 case 0x400 ... 0x440: /* Data port 4. */
381 case 0x500 ... 0x540: /* Data port 5. */
382 case 0x800000 ... 0x803fff: /* Page 0 ~ 127. */
383 case 0x807e80 ... 0x807eff: /* Page 253. */
384 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23,
385 TAS2783_SDCA_CTL_UDMPU_CLUSTER, 0):
386 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, TAS2783_SDCA_CTL_FU_MUTE,
387 TAS2783_DEVICE_CHANNEL_LEFT):
388 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0):
389 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0):
390 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0):
391 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0):
392 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0):
393 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0):
394 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0):
395 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0):
396 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0):
397 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0):
398 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0):
399 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0):
400 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0):
401 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0):
402 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0):
403 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0):
404 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0):
405 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0):
406 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0):
407 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0):
408 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0):
409 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0):
410 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0):
411 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0):
412 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0):
413 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0):
414 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1):
415 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2):
416 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3):
417 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4):
418 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5):
419 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6):
420 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7):
421 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8):
422 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9):
423 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa):
424 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb):
425 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc):
426 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd):
427 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe):
428 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf):
429 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0):
430 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0):
431 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0):
432 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0):
433 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x02, 0):
434 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x10, 0):
435 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0):
436 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0):
437 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0):
438 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0):
439 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0):
440 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0):
441 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0):
442 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0):
443 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0):
444 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0):
445 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0):
446 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1):
447 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2):
448 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0):
449 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1):
450 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0):
451 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0):
452 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0):
453 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0):
454 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0):
455 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0):
456 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0):
457 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1):
458 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0):
459 return 1;
460
461 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0):
462 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0):
463 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0):
464 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0):
465 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0):
466 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0):
467 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0):
468 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0):
469 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0):
470 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0):
471 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0):
472 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1):
473 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2):
474 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3):
475 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4):
476 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5):
477 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6):
478 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7):
479 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1):
480 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1):
481 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1):
482 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2):
483 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0):
484 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 0):
485 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1):
486 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0):
487 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0):
488 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0):
489 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0):
490 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0):
491 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0):
492 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0):
493 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0):
494 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0):
495 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0):
496 return 2;
497
498 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0):
499 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0):
500 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0):
501 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0):
502 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0):
503 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0):
504 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0):
505 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0):
506 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0):
507 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0):
508 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0):
509 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0):
510 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0):
511 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0):
512 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0):
513 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0):
514 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0):
515 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0):
516 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0):
517 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0):
518 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0):
519 return 4;
520
521 default:
522 return 0;
523 }
524}
525
526static bool tas2783_readable_register(struct device *dev, unsigned int reg)
527{
528 return tas2783_sdca_mbq_size(dev, reg) > 0;
529}
530
531static bool tas2783_volatile_register(struct device *dev, u32 reg)
532{
533 switch (reg) {
534 case 0x000 ... 0x080: /* Data port 0. */
535 case 0x100 ... 0x140: /* Data port 1. */
536 case 0x200 ... 0x240: /* Data port 2. */
537 case 0x300 ... 0x340: /* Data port 3. */
538 case 0x400 ... 0x440: /* Data port 4. */
539 case 0x500 ... 0x540: /* Data port 5. */
540 case 0x800001:
541 return true;
542
543 default:
544 return false;
545 }
546}
547
548static const struct regmap_config tas_regmap = {
549 .reg_bits = 32,
550 .val_bits = 8,
551 .readable_reg = tas2783_readable_register,
552 .volatile_reg = tas2783_volatile_register,
553 .reg_defaults = tas2783_reg_default,
554 .num_reg_defaults = ARRAY_SIZE(tas2783_reg_default),
555 .max_register = 0x41008000 + TASDEV_REG_SDW(0xa1, 0x60, 0x7f),
556 .cache_type = REGCACHE_MAPLE,
557 .use_single_read = true,
558 .use_single_write = true,
559};
560
561static const struct regmap_sdw_mbq_cfg tas2783_mbq_cfg = {
562 .mbq_size = tas2783_sdca_mbq_size,
563};
564
565static s32 tas2783_digital_getvol(struct snd_kcontrol *kcontrol,
566 struct snd_ctl_elem_value *ucontrol)
567{
568 return snd_soc_get_volsw(kcontrol, ucontrol);
569}
570
571static s32 tas2783_digital_putvol(struct snd_kcontrol *kcontrol,
572 struct snd_ctl_elem_value *ucontrol)
573{
574 return snd_soc_put_volsw(kcontrol, ucontrol);
575}
576
577static s32 tas2783_amp_getvol(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 return snd_soc_get_volsw(kcontrol, ucontrol);
581}
582
583static s32 tas2783_amp_putvol(struct snd_kcontrol *kcontrol,
584 struct snd_ctl_elem_value *ucontrol)
585{
586 return snd_soc_put_volsw(kcontrol, ucontrol);
587}
588
589static const struct snd_kcontrol_new tas2783_snd_controls[] = {
590 SOC_SINGLE_RANGE_EXT_TLV("Amp Volume", TAS2783_AMP_LEVEL,
591 1, 0, 20, 0, tas2783_amp_getvol,
592 tas2783_amp_putvol, tas2781_amp_tlv),
593 SOC_SINGLE_RANGE_EXT_TLV("Speaker Volume", TAS2783_DVC_LVL,
594 0, 0, 200, 1, tas2783_digital_getvol,
595 tas2783_digital_putvol, tas2781_dvc_tlv),
596};
597
598static s32 tas2783_validate_calibdata(struct tas2783_prv *tas_dev,
599 u8 *data, u32 size)
600{
601 u32 ts, spk_count, size_calculated;
602 u32 crc_calculated, crc_read, i;
603 u32 *tmp_val;
604 struct tm tm;
605
606 i = 0;
607 tmp_val = (u32 *)data;
608 if (tmp_val[i++] != 2783) {
609 dev_err(tas_dev->dev, "cal data magic number mismatch");
610 return -EINVAL;
611 }
612
613 spk_count = tmp_val[i++];
614 if (spk_count > TAS2783_CALIB_MAX_SPK_COUNT) {
615 dev_err(tas_dev->dev, "cal data spk_count too large");
616 return -EINVAL;
617 }
618
619 ts = tmp_val[i++];
620 time64_to_tm(totalsecs: ts, offset: 0, result: &tm);
621 dev_dbg(tas_dev->dev, "cal data timestamp: %ld-%d-%d %d:%d:%d",
622 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
623 tm.tm_hour, tm.tm_min, tm.tm_sec);
624
625 size_calculated =
626 (spk_count * TAS2783_CALIB_PARAMS * sizeof(u32)) +
627 TAS2783_CALIB_HDR_SZ + TAS2783_CALIB_CRC_SZ;
628 if (size_calculated > TAS2783_CALIB_DATA_SZ) {
629 dev_err(tas_dev->dev, "cali data sz too large");
630 return -EINVAL;
631 } else if (size < size_calculated) {
632 dev_err(tas_dev->dev, "cali data size mismatch calc=%u vs %d\n",
633 size, size_calculated);
634 return -EINVAL;
635 }
636
637 crc_calculated = crc32(crc: ~0, p: data,
638 len: size_calculated - TAS2783_CALIB_CRC_SZ) ^ ~0;
639 crc_read = tmp_val[(size_calculated - TAS2783_CALIB_CRC_SZ) / sizeof(u32)];
640 if (crc_calculated != crc_read) {
641 dev_err(tas_dev->dev,
642 "calib data integrity check fail, 0x%08x vs 0x%08x\n",
643 crc_calculated, crc_read);
644 return -EINVAL;
645 }
646
647 return 0;
648}
649
650static void tas2783_set_calib_params_to_device(struct tas2783_prv *tas_dev, u32 *cali_data)
651{
652 u32 dev_count, offset, i, device_num;
653 u32 reg_value;
654 u8 buf[4];
655
656 dev_count = cali_data[1];
657 offset = 3;
658
659 for (device_num = 0; device_num < dev_count; device_num++) {
660 if (cali_data[offset] != tas_dev->sdw_peripheral->id.unique_id) {
661 offset += TAS2783_CALIB_PARAMS;
662 continue;
663 }
664 offset++;
665
666 for (i = 0; i < ARRAY_SIZE(tas2783_cali_reg); i++) {
667 reg_value = cali_data[offset + i];
668 buf[0] = reg_value >> 24;
669 buf[1] = reg_value >> 16;
670 buf[2] = reg_value >> 8;
671 buf[3] = reg_value & 0xff;
672 regmap_bulk_write(map: tas_dev->regmap, reg: tas2783_cali_reg[i],
673 val: buf, val_count: sizeof(u32));
674 }
675 break;
676 }
677
678 if (device_num == dev_count)
679 dev_err(tas_dev->dev, "device not found\n");
680 else
681 dev_dbg(tas_dev->dev, "calib data update done\n");
682}
683
684static s32 tas2783_update_calibdata(struct tas2783_prv *tas_dev)
685{
686 efi_guid_t efi_guid = TAS2783_CALI_GUID;
687 u32 attr, i, *tmp_val;
688 unsigned long size;
689 s32 ret;
690 efi_status_t status;
691 static efi_char16_t efi_names[][32] = {
692 L"SmartAmpCalibrationData", L"CALI_DATA"};
693
694 tmp_val = (u32 *)tas_dev->cali_data.data;
695 attr = 0;
696
697 /*
698 * In some cases, the calibration is performed in Windows,
699 * and data was saved in UEFI. Linux can access it.
700 */
701 for (i = 0; i < ARRAY_SIZE(efi_names); i++) {
702 size = 0;
703 status = efi.get_variable(efi_names[i], &efi_guid, &attr,
704 &size, NULL);
705 if (size > TAS2783_CALIB_DATA_SZ) {
706 dev_err(tas_dev->dev, "cali data too large\n");
707 break;
708 }
709
710 tas_dev->cali_data.read_sz = size;
711 if (status == EFI_BUFFER_TOO_SMALL) {
712 status = efi.get_variable(efi_names[i], &efi_guid, &attr,
713 &tas_dev->cali_data.read_sz,
714 tas_dev->cali_data.data);
715 dev_dbg(tas_dev->dev, "cali get %lu bytes result:%ld\n",
716 tas_dev->cali_data.read_sz, status);
717 }
718 if (status == EFI_SUCCESS)
719 break;
720 }
721
722 if (status != EFI_SUCCESS) {
723 /* Failed got calibration data from EFI. */
724 dev_dbg(tas_dev->dev, "No calibration data in UEFI.");
725 return 0;
726 }
727
728 mutex_lock(&tas_dev->calib_lock);
729 ret = tas2783_validate_calibdata(tas_dev, data: tas_dev->cali_data.data,
730 size: tas_dev->cali_data.read_sz);
731 if (!ret)
732 tas2783_set_calib_params_to_device(tas_dev, cali_data: tmp_val);
733 mutex_unlock(lock: &tas_dev->calib_lock);
734
735 return ret;
736}
737
738static s32 read_header(const u8 *data, struct bin_header_t *hdr)
739{
740 hdr->vendor_id = get_unaligned_le16(p: &data[0]);
741 hdr->file_id = get_unaligned_le32(p: &data[2]);
742 hdr->version = get_unaligned_le16(p: &data[6]);
743 hdr->length = get_unaligned_le32(p: &data[8]);
744 return 12;
745}
746
747static void tas2783_fw_ready(const struct firmware *fmw, void *context)
748{
749 struct tas2783_prv *tas_dev =
750 (struct tas2783_prv *)context;
751 const u8 *buf = NULL;
752 s32 offset = 0, img_sz, file_blk_size, ret;
753 struct bin_header_t hdr;
754
755 if (!fmw || !fmw->data) {
756 /* No firmware binary, devices will work in ROM mode. */
757 dev_err(tas_dev->dev,
758 "Failed to read %s, no side-effect on driver running\n",
759 tas_dev->rca_binaryname);
760 ret = -EINVAL;
761 goto out;
762 }
763
764 img_sz = fmw->size;
765 buf = fmw->data;
766 offset += FW_DL_OFFSET;
767 if (offset >= (img_sz - FW_FL_HDR)) {
768 dev_err(tas_dev->dev,
769 "firmware is too small");
770 ret = -EINVAL;
771 goto out;
772 }
773
774 mutex_lock(&tas_dev->pde_lock);
775 while (offset < (img_sz - FW_FL_HDR)) {
776 memset(&hdr, 0, sizeof(hdr));
777 offset += read_header(data: &buf[offset], hdr: &hdr);
778 dev_dbg(tas_dev->dev,
779 "vndr=%d, file=%d, version=%d, len=%d, off=%d\n",
780 hdr.vendor_id, hdr.file_id, hdr.version,
781 hdr.length, offset);
782 /* size also includes the header */
783 file_blk_size = hdr.length - FW_FL_HDR;
784
785 /* make sure that enough data is there */
786 if (offset + file_blk_size > img_sz) {
787 ret = -EINVAL;
788 dev_err(tas_dev->dev,
789 "corrupt firmware file");
790 break;
791 }
792
793 switch (hdr.file_id) {
794 case 0:
795 ret = sdw_nwrite_no_pm(slave: tas_dev->sdw_peripheral,
796 PRAM_ADDR_START, count: file_blk_size,
797 val: &buf[offset]);
798 if (ret < 0)
799 dev_err(tas_dev->dev,
800 "PRAM update failed: %d", ret);
801 break;
802
803 case 1:
804 ret = sdw_nwrite_no_pm(slave: tas_dev->sdw_peripheral,
805 YRAM_ADDR_START, count: file_blk_size,
806 val: &buf[offset]);
807 if (ret < 0)
808 dev_err(tas_dev->dev,
809 "YRAM update failed: %d", ret);
810
811 break;
812
813 default:
814 ret = -EINVAL;
815 dev_err(tas_dev->dev, "Unsupported file");
816 break;
817 }
818
819 if (ret == 0)
820 offset += file_blk_size;
821 else
822 break;
823 }
824 mutex_unlock(lock: &tas_dev->pde_lock);
825 if (!ret)
826 tas2783_update_calibdata(tas_dev);
827
828out:
829 if (!ret)
830 tas_dev->fw_dl_success = true;
831 tas_dev->fw_dl_task_done = true;
832 wake_up(&tas_dev->fw_wait);
833 if (fmw)
834 release_firmware(fw: fmw);
835}
836
837static inline s32 tas_clear_latch(struct tas2783_prv *priv)
838{
839 return regmap_update_bits(map: priv->regmap,
840 TASDEV_REG_SDW(0, 0, 0x5c),
841 mask: 0x04, val: 0x04);
842}
843
844static s32 tas_fu21_event(struct snd_soc_dapm_widget *w,
845 struct snd_kcontrol *k, s32 event)
846{
847 struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm);
848 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(c: component);
849 s32 mute;
850
851 switch (event) {
852 case SND_SOC_DAPM_POST_PMU:
853 mute = 0;
854 break;
855
856 case SND_SOC_DAPM_PRE_PMD:
857 mute = 1;
858 break;
859 }
860
861 return sdw_write_no_pm(slave: tas_dev->sdw_peripheral,
862 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21,
863 TAS2783_SDCA_CTL_FU_MUTE, 1), value: mute);
864}
865
866static s32 tas_fu23_event(struct snd_soc_dapm_widget *w,
867 struct snd_kcontrol *k, s32 event)
868{
869 struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm);
870 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(c: component);
871 s32 mute;
872
873 switch (event) {
874 case SND_SOC_DAPM_POST_PMU:
875 mute = 0;
876 break;
877
878 case SND_SOC_DAPM_PRE_PMD:
879 mute = 1;
880 break;
881 }
882
883 return sdw_write_no_pm(slave: tas_dev->sdw_peripheral,
884 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23,
885 TAS2783_SDCA_CTL_FU_MUTE, 1), value: mute);
886}
887
888static const struct snd_soc_dapm_widget tas_dapm_widgets[] = {
889 SND_SOC_DAPM_AIF_IN("ASI", "ASI Playback", 0, SND_SOC_NOPM, 0, 0),
890 SND_SOC_DAPM_AIF_OUT("ASI OUT", "ASI Capture", 0, SND_SOC_NOPM,
891 0, 0),
892 SND_SOC_DAPM_DAC_E("FU21", NULL, SND_SOC_NOPM, 0, 0, tas_fu21_event,
893 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
894 SND_SOC_DAPM_DAC_E("FU23", NULL, SND_SOC_NOPM, 0, 0, tas_fu23_event,
895 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
896 SND_SOC_DAPM_OUTPUT("SPK"),
897 SND_SOC_DAPM_INPUT("DMIC"),
898};
899
900static const struct snd_soc_dapm_route tas_audio_map[] = {
901 {"FU21", NULL, "ASI"},
902 {"SPK", NULL, "FU21"},
903 {"FU23", NULL, "ASI"},
904 {"SPK", NULL, "FU23"},
905 {"ASI OUT", NULL, "DMIC"},
906};
907
908static s32 tas_set_sdw_stream(struct snd_soc_dai *dai,
909 void *sdw_stream, s32 direction)
910{
911 if (!sdw_stream)
912 return 0;
913
914 snd_soc_dai_dma_data_set(dai, stream: direction, data: sdw_stream);
915
916 return 0;
917}
918
919static void tas_sdw_shutdown(struct snd_pcm_substream *substream,
920 struct snd_soc_dai *dai)
921{
922 snd_soc_dai_set_dma_data(dai, substream, NULL);
923}
924
925static s32 tas_sdw_hw_params(struct snd_pcm_substream *substream,
926 struct snd_pcm_hw_params *params,
927 struct snd_soc_dai *dai)
928{
929 struct snd_soc_component *component = dai->component;
930 struct tas2783_prv *tas_dev =
931 snd_soc_component_get_drvdata(c: component);
932 struct sdw_stream_config stream_config = {0};
933 struct sdw_port_config port_config = {0};
934 struct sdw_stream_runtime *sdw_stream;
935 struct sdw_slave *sdw_peripheral = tas_dev->sdw_peripheral;
936 s32 ret, retry = 3;
937
938 if (!tas_dev->fw_dl_success) {
939 dev_err(tas_dev->dev, "error playback without fw download");
940 return -EINVAL;
941 }
942
943 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
944 if (!sdw_stream)
945 return -EINVAL;
946
947 ret = tas_clear_latch(priv: tas_dev);
948 if (ret)
949 dev_err(tas_dev->dev,
950 "clear latch failed, err=%d", ret);
951
952 mutex_lock(&tas_dev->pde_lock);
953 /*
954 * Sometimes, there is error returned during power on.
955 * So added retry logic to ensure power on so that
956 * port prepare succeeds
957 */
958 do {
959 ret = regmap_write(map: tas_dev->regmap,
960 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23,
961 TAS2783_SDCA_CTL_REQ_POW_STATE, 0),
962 TAS2783_SDCA_POW_STATE_ON);
963 if (!ret)
964 break;
965 usleep_range(min: 2000, max: 2200);
966 } while (retry--);
967 mutex_unlock(lock: &tas_dev->pde_lock);
968 if (ret)
969 return ret;
970
971 /* SoundWire specific configuration */
972 snd_sdw_params_to_config(substream, params,
973 stream_config: &stream_config, port_config: &port_config);
974 /* port 1 for playback */
975 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
976 port_config.num = 1;
977 else
978 port_config.num = 2;
979
980 ret = sdw_stream_add_slave(slave: sdw_peripheral,
981 stream_config: &stream_config, port_config: &port_config, num_ports: 1, stream: sdw_stream);
982 if (ret)
983 dev_err(dai->dev, "Unable to configure port\n");
984
985 return ret;
986}
987
988static s32 tas_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
989 struct snd_soc_dai *dai)
990{
991 s32 ret;
992 struct snd_soc_component *component = dai->component;
993 struct tas2783_prv *tas_dev =
994 snd_soc_component_get_drvdata(c: component);
995 struct sdw_stream_runtime *sdw_stream =
996 snd_soc_dai_get_dma_data(dai, substream);
997
998 sdw_stream_remove_slave(slave: tas_dev->sdw_peripheral, stream: sdw_stream);
999
1000 mutex_lock(&tas_dev->pde_lock);
1001 ret = regmap_write(map: tas_dev->regmap,
1002 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23,
1003 TAS2783_SDCA_CTL_REQ_POW_STATE, 0),
1004 TAS2783_SDCA_POW_STATE_OFF);
1005 mutex_unlock(lock: &tas_dev->pde_lock);
1006
1007 return ret;
1008}
1009
1010static const struct snd_soc_dai_ops tas_dai_ops = {
1011 .hw_params = tas_sdw_hw_params,
1012 .hw_free = tas_sdw_pcm_hw_free,
1013 .set_stream = tas_set_sdw_stream,
1014 .shutdown = tas_sdw_shutdown,
1015};
1016
1017static struct snd_soc_dai_driver tas_dai_driver[] = {
1018 {
1019 .name = "tas2783-codec",
1020 .id = 0,
1021 .playback = {
1022 .stream_name = "Playback",
1023 .channels_min = 1,
1024 .channels_max = 4,
1025 .rates = TAS2783_DEVICE_RATES,
1026 .formats = TAS2783_DEVICE_FORMATS,
1027 },
1028 .capture = {
1029 .stream_name = "Capture",
1030 .channels_min = 1,
1031 .channels_max = 4,
1032 .rates = TAS2783_DEVICE_RATES,
1033 .formats = TAS2783_DEVICE_FORMATS,
1034 },
1035 .ops = &tas_dai_ops,
1036 .symmetric_rate = 1,
1037 },
1038};
1039
1040static s32 tas_component_probe(struct snd_soc_component *component)
1041{
1042 struct tas2783_prv *tas_dev =
1043 snd_soc_component_get_drvdata(c: component);
1044
1045 tas_dev->component = component;
1046 tas25xx_register_misc(peripheral: tas_dev->sdw_peripheral);
1047
1048 return 0;
1049}
1050
1051static void tas_component_remove(struct snd_soc_component *codec)
1052{
1053 struct tas2783_prv *tas_dev =
1054 snd_soc_component_get_drvdata(c: codec);
1055 tas25xx_deregister_misc();
1056 tas_dev->component = NULL;
1057}
1058
1059static const struct snd_soc_component_driver soc_codec_driver_tasdevice = {
1060 .probe = tas_component_probe,
1061 .remove = tas_component_remove,
1062 .controls = tas2783_snd_controls,
1063 .num_controls = ARRAY_SIZE(tas2783_snd_controls),
1064 .dapm_widgets = tas_dapm_widgets,
1065 .num_dapm_widgets = ARRAY_SIZE(tas_dapm_widgets),
1066 .dapm_routes = tas_audio_map,
1067 .num_dapm_routes = ARRAY_SIZE(tas_audio_map),
1068 .idle_bias_on = 1,
1069 .endianness = 1,
1070};
1071
1072static s32 tas_init(struct tas2783_prv *tas_dev)
1073{
1074 s32 ret;
1075
1076 dev_set_drvdata(dev: tas_dev->dev, data: tas_dev);
1077 ret = devm_snd_soc_register_component(dev: tas_dev->dev,
1078 component_driver: &soc_codec_driver_tasdevice,
1079 dai_drv: tas_dai_driver,
1080 ARRAY_SIZE(tas_dai_driver));
1081 if (ret) {
1082 dev_err(tas_dev->dev, "%s: codec register error:%d.\n",
1083 __func__, ret);
1084 return ret;
1085 }
1086
1087 /* set autosuspend parameters */
1088 pm_runtime_set_autosuspend_delay(dev: tas_dev->dev, delay: 3000);
1089 pm_runtime_use_autosuspend(dev: tas_dev->dev);
1090 /* make sure the device does not suspend immediately */
1091 pm_runtime_mark_last_busy(dev: tas_dev->dev);
1092 pm_runtime_enable(dev: tas_dev->dev);
1093
1094 return ret;
1095}
1096
1097static s32 tas_read_prop(struct sdw_slave *slave)
1098{
1099 struct sdw_slave_prop *prop = &slave->prop;
1100 s32 nval;
1101 s32 i, j;
1102 u32 bit;
1103 unsigned long addr;
1104 struct sdw_dpn_prop *dpn;
1105
1106 prop->scp_int1_mask =
1107 SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
1108 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
1109
1110 prop->paging_support = true;
1111
1112 /* first we need to allocate memory for set bits in port lists */
1113 prop->source_ports = 0x04; /* BITMAP: 00000100 */
1114 prop->sink_ports = 0x2; /* BITMAP: 00000010 */
1115
1116 nval = hweight32(prop->source_ports);
1117 prop->src_dpn_prop = devm_kcalloc(dev: &slave->dev, n: nval,
1118 size: sizeof(*prop->src_dpn_prop), GFP_KERNEL);
1119 if (!prop->src_dpn_prop)
1120 return -ENOMEM;
1121
1122 i = 0;
1123 dpn = prop->src_dpn_prop;
1124 addr = prop->source_ports;
1125 for_each_set_bit(bit, &addr, 32) {
1126 dpn[i].num = bit;
1127 dpn[i].type = SDW_DPN_FULL;
1128 dpn[i].simple_ch_prep_sm = false;
1129 dpn[i].ch_prep_timeout = 10;
1130 i++;
1131 }
1132
1133 /* do this again for sink now */
1134 nval = hweight32(prop->sink_ports);
1135 prop->sink_dpn_prop = devm_kcalloc(dev: &slave->dev, n: nval,
1136 size: sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
1137 if (!prop->sink_dpn_prop)
1138 return -ENOMEM;
1139
1140 j = 0;
1141 dpn = prop->sink_dpn_prop;
1142 addr = prop->sink_ports;
1143 for_each_set_bit(bit, &addr, 32) {
1144 dpn[j].num = bit;
1145 dpn[j].type = SDW_DPN_FULL;
1146 dpn[j].simple_ch_prep_sm = false;
1147 dpn[j].ch_prep_timeout = 10;
1148 j++;
1149 }
1150
1151 /* set the timeout values */
1152 prop->clk_stop_timeout = 200;
1153
1154 return 0;
1155}
1156
1157static s32 tas2783_sdca_dev_suspend(struct device *dev)
1158{
1159 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1160
1161 if (!tas_dev->hw_init)
1162 return 0;
1163
1164 regcache_cache_only(map: tas_dev->regmap, enable: true);
1165 return 0;
1166}
1167
1168static s32 tas2783_sdca_dev_system_suspend(struct device *dev)
1169{
1170 return tas2783_sdca_dev_suspend(dev);
1171}
1172
1173static s32 tas2783_sdca_dev_resume(struct device *dev)
1174{
1175 struct sdw_slave *slave = dev_to_sdw_dev(dev);
1176 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1177 unsigned long t;
1178
1179 if (!slave->unattach_request)
1180 goto regmap_sync;
1181
1182 t = wait_for_completion_timeout(x: &slave->initialization_complete,
1183 timeout: msecs_to_jiffies(TAS2783_PROBE_TIMEOUT));
1184 if (!t) {
1185 dev_err(&slave->dev, "resume: initialization timed out\n");
1186 sdw_show_ping_status(bus: slave->bus, sync_delay: true);
1187 return -ETIMEDOUT;
1188 }
1189
1190 slave->unattach_request = 0;
1191
1192regmap_sync:
1193 regcache_cache_only(map: tas_dev->regmap, enable: false);
1194 regcache_sync(map: tas_dev->regmap);
1195 return 0;
1196}
1197
1198static const struct dev_pm_ops tas2783_sdca_pm = {
1199 SYSTEM_SLEEP_PM_OPS(tas2783_sdca_dev_system_suspend, tas2783_sdca_dev_resume)
1200 RUNTIME_PM_OPS(tas2783_sdca_dev_suspend, tas2783_sdca_dev_resume, NULL)
1201};
1202
1203static s32 tas_io_init(struct device *dev, struct sdw_slave *slave)
1204{
1205 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1206 s32 ret;
1207 u8 unique_id = tas_dev->sdw_peripheral->id.unique_id;
1208
1209 if (tas_dev->hw_init)
1210 return 0;
1211
1212 tas_dev->fw_dl_task_done = false;
1213 tas_dev->fw_dl_success = false;
1214 scnprintf(buf: tas_dev->rca_binaryname, size: sizeof(tas_dev->rca_binaryname),
1215 fmt: "tas2783-%01x.bin", unique_id);
1216
1217 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
1218 name: tas_dev->rca_binaryname, device: tas_dev->dev,
1219 GFP_KERNEL, context: tas_dev, cont: tas2783_fw_ready);
1220 if (ret) {
1221 dev_err(tas_dev->dev,
1222 "firmware request failed for uid=%d, ret=%d\n",
1223 unique_id, ret);
1224 return ret;
1225 }
1226
1227 ret = wait_event_timeout(tas_dev->fw_wait, tas_dev->fw_dl_task_done,
1228 msecs_to_jiffies(TIMEOUT_FW_DL_MS));
1229 if (!ret) {
1230 dev_err(tas_dev->dev, "fw request, wait_event timeout\n");
1231 ret = -EAGAIN;
1232 } else {
1233 ret = regmap_multi_reg_write(map: tas_dev->regmap, regs: tas2783_init_seq,
1234 ARRAY_SIZE(tas2783_init_seq));
1235 tas_dev->hw_init = true;
1236 }
1237
1238 return ret;
1239}
1240
1241static s32 tas_update_status(struct sdw_slave *slave,
1242 enum sdw_slave_status status)
1243{
1244 struct tas2783_prv *tas_dev = dev_get_drvdata(dev: &slave->dev);
1245 struct device *dev = &slave->dev;
1246
1247 dev_dbg(dev, "Peripheral status = %s",
1248 status == SDW_SLAVE_UNATTACHED ? "unattached" :
1249 status == SDW_SLAVE_ATTACHED ? "attached" : "alert");
1250
1251 tas_dev->status = status;
1252 if (status == SDW_SLAVE_UNATTACHED)
1253 tas_dev->hw_init = false;
1254
1255 /* Perform initialization only if slave status
1256 * is present and hw_init flag is false
1257 */
1258 if (tas_dev->hw_init || tas_dev->status != SDW_SLAVE_ATTACHED)
1259 return 0;
1260
1261 /* updated the cache data to device */
1262 regcache_cache_only(map: tas_dev->regmap, enable: false);
1263 regcache_sync(map: tas_dev->regmap);
1264
1265 /* perform I/O transfers required for Slave initialization */
1266 return tas_io_init(dev: &slave->dev, slave);
1267}
1268
1269static const struct sdw_slave_ops tas_sdw_ops = {
1270 .read_prop = tas_read_prop,
1271 .update_status = tas_update_status,
1272};
1273
1274static void tas_remove(struct tas2783_prv *tas_dev)
1275{
1276 snd_soc_unregister_component(tas_dev->dev);
1277}
1278
1279static s32 tas_sdw_probe(struct sdw_slave *peripheral,
1280 const struct sdw_device_id *id)
1281{
1282 struct regmap *regmap;
1283 struct device *dev = &peripheral->dev;
1284 struct tas2783_prv *tas_dev;
1285
1286 tas_dev = devm_kzalloc(dev, size: sizeof(*tas_dev), GFP_KERNEL);
1287 if (!tas_dev)
1288 return dev_err_probe(dev, err: -ENOMEM,
1289 fmt: "Failed devm_kzalloc");
1290
1291 tas_dev->dev = dev;
1292 tas_dev->sdw_peripheral = peripheral;
1293 tas_dev->hw_init = false;
1294 mutex_init(&tas_dev->calib_lock);
1295 mutex_init(&tas_dev->pde_lock);
1296
1297 init_waitqueue_head(&tas_dev->fw_wait);
1298 dev_set_drvdata(dev, data: tas_dev);
1299 regmap = devm_regmap_init_sdw_mbq_cfg(&peripheral->dev,
1300 peripheral,
1301 &tas_regmap,
1302 &tas2783_mbq_cfg);
1303 if (IS_ERR(ptr: regmap))
1304 return dev_err_probe(dev, err: PTR_ERR(ptr: regmap),
1305 fmt: "Failed devm_regmap_init_sdw.");
1306
1307 /* keep in cache until the device is fully initialized */
1308 regcache_cache_only(map: regmap, enable: true);
1309 tas_dev->regmap = regmap;
1310 return tas_init(tas_dev);
1311}
1312
1313static s32 tas_sdw_remove(struct sdw_slave *peripheral)
1314{
1315 struct tas2783_prv *tas_dev = dev_get_drvdata(dev: &peripheral->dev);
1316
1317 pm_runtime_disable(dev: tas_dev->dev);
1318 tas_remove(tas_dev);
1319 mutex_destroy(lock: &tas_dev->calib_lock);
1320 mutex_destroy(lock: &tas_dev->pde_lock);
1321 dev_set_drvdata(dev: &peripheral->dev, NULL);
1322
1323 return 0;
1324}
1325
1326static const struct sdw_device_id tas_sdw_id[] = {
1327 /* chipid for the TAS2783 is 0x0000 */
1328 SDW_SLAVE_ENTRY(0x0102, 0x0000, 0),
1329 {},
1330};
1331MODULE_DEVICE_TABLE(sdw, tas_sdw_id);
1332
1333static struct sdw_driver tas_sdw_driver = {
1334 .driver = {
1335 .name = "slave-tas2783",
1336 .pm = pm_ptr(&tas2783_sdca_pm),
1337 },
1338 .probe = tas_sdw_probe,
1339 .remove = tas_sdw_remove,
1340 .ops = &tas_sdw_ops,
1341 .id_table = tas_sdw_id,
1342};
1343module_sdw_driver(tas_sdw_driver);
1344
1345MODULE_AUTHOR("Texas Instruments Inc.");
1346MODULE_DESCRIPTION("ASoC TAS2783 SoundWire Driver");
1347MODULE_LICENSE("GPL");
1348

source code of linux/sound/soc/codecs/tas2783-sdw.c