| 1 | /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ |
| 2 | /* |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * Copyright(c) 2018 Intel Corporation |
| 7 | * |
| 8 | * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> |
| 9 | */ |
| 10 | |
| 11 | #ifndef __SOUND_SOC_SOF_PRIV_H |
| 12 | #define __SOUND_SOC_SOF_PRIV_H |
| 13 | |
| 14 | #include <linux/device.h> |
| 15 | #include <sound/hdaudio.h> |
| 16 | #include <sound/sof.h> |
| 17 | #include <sound/sof/info.h> |
| 18 | #include <sound/sof/pm.h> |
| 19 | #include <sound/sof/trace.h> |
| 20 | #include <uapi/sound/sof/fw.h> |
| 21 | #include <sound/sof/ext_manifest.h> |
| 22 | |
| 23 | struct snd_sof_pcm_stream; |
| 24 | |
| 25 | /* Flag definitions used in sof_core_debug (sof_debug module parameter) */ |
| 26 | #define SOF_DBG_ENABLE_TRACE BIT(0) |
| 27 | #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ |
| 28 | #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */ |
| 29 | #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token |
| 30 | * 1: override topology |
| 31 | */ |
| 32 | #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines |
| 33 | * 1: use dynamic pipelines |
| 34 | */ |
| 35 | #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets |
| 36 | * on primary core |
| 37 | */ |
| 38 | #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ |
| 39 | #define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability |
| 40 | * and always download firmware upon D3 exit |
| 41 | */ |
| 42 | #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS BIT(8) /* print DMA position updates |
| 43 | * in dmesg logs |
| 44 | */ |
| 45 | #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS BIT(9) /* print IPC success |
| 46 | * in dmesg logs |
| 47 | */ |
| 48 | #define SOF_DBG_FORCE_NOCODEC BIT(10) /* ignore all codec-related |
| 49 | * configurations |
| 50 | */ |
| 51 | #define SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD BIT(11) /* On top of the IPC message header |
| 52 | * dump the message payload also |
| 53 | */ |
| 54 | #define SOF_DBG_DSPLESS_MODE BIT(15) /* Do not initialize and use the DSP */ |
| 55 | |
| 56 | /* Flag definitions used for controlling the DSP dump behavior */ |
| 57 | #define SOF_DBG_DUMP_REGS BIT(0) |
| 58 | #define SOF_DBG_DUMP_MBOX BIT(1) |
| 59 | #define SOF_DBG_DUMP_TEXT BIT(2) |
| 60 | #define SOF_DBG_DUMP_PCI BIT(3) |
| 61 | /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */ |
| 62 | #define SOF_DBG_DUMP_OPTIONAL BIT(4) |
| 63 | |
| 64 | /* global debug state set by SOF_DBG_ flags */ |
| 65 | bool sof_debug_check_flag(int mask); |
| 66 | |
| 67 | /* max BARs mmaped devices can use */ |
| 68 | #define SND_SOF_BARS 8 |
| 69 | |
| 70 | /* time in ms for runtime suspend delay */ |
| 71 | #define SND_SOF_SUSPEND_DELAY_MS 2000 |
| 72 | |
| 73 | /* DMA buffer size for trace */ |
| 74 | #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) |
| 75 | |
| 76 | #define SOF_IPC_DSP_REPLY 0 |
| 77 | #define SOF_IPC_HOST_REPLY 1 |
| 78 | |
| 79 | /* So far the primary core on all DSPs has ID 0 */ |
| 80 | #define SOF_DSP_PRIMARY_CORE 0 |
| 81 | |
| 82 | /* max number of DSP cores */ |
| 83 | #define SOF_MAX_DSP_NUM_CORES 8 |
| 84 | |
| 85 | struct sof_dsp_power_state { |
| 86 | u32 state; |
| 87 | u32 substate; /* platform-specific */ |
| 88 | }; |
| 89 | |
| 90 | /* System suspend target state */ |
| 91 | enum sof_system_suspend_state { |
| 92 | SOF_SUSPEND_NONE = 0, |
| 93 | SOF_SUSPEND_S0IX, |
| 94 | SOF_SUSPEND_S3, |
| 95 | SOF_SUSPEND_S4, |
| 96 | SOF_SUSPEND_S5, |
| 97 | }; |
| 98 | |
| 99 | enum sof_dfsentry_type { |
| 100 | SOF_DFSENTRY_TYPE_IOMEM = 0, |
| 101 | SOF_DFSENTRY_TYPE_BUF, |
| 102 | }; |
| 103 | |
| 104 | enum sof_debugfs_access_type { |
| 105 | SOF_DEBUGFS_ACCESS_ALWAYS = 0, |
| 106 | SOF_DEBUGFS_ACCESS_D0_ONLY, |
| 107 | }; |
| 108 | |
| 109 | struct sof_compr_stream { |
| 110 | u64 copied_total; |
| 111 | u32 sampling_rate; |
| 112 | u16 channels; |
| 113 | u16 sample_container_bytes; |
| 114 | size_t posn_offset; |
| 115 | }; |
| 116 | |
| 117 | struct snd_sof_dev; |
| 118 | struct snd_sof_ipc_msg; |
| 119 | struct snd_sof_ipc; |
| 120 | struct snd_sof_debugfs_map; |
| 121 | struct snd_soc_tplg_ops; |
| 122 | struct snd_soc_component; |
| 123 | struct snd_sof_pdata; |
| 124 | |
| 125 | /** |
| 126 | * struct snd_sof_platform_stream_params - platform dependent stream parameters |
| 127 | * @phy_addr: Platform dependent address to be used, if @use_phy_addr |
| 128 | * is true |
| 129 | * @stream_tag: Stream tag to use |
| 130 | * @use_phy_addr: Use the provided @phy_addr for configuration |
| 131 | * @no_ipc_position: Disable position update IPC from firmware |
| 132 | * @cont_update_posn: Continuous position update. |
| 133 | */ |
| 134 | struct snd_sof_platform_stream_params { |
| 135 | u32 phy_addr; |
| 136 | u16 stream_tag; |
| 137 | bool use_phy_address; |
| 138 | bool no_ipc_position; |
| 139 | bool cont_update_posn; |
| 140 | }; |
| 141 | |
| 142 | /** |
| 143 | * struct sof_firmware - Container struct for SOF firmware |
| 144 | * @fw: Pointer to the firmware |
| 145 | * @payload_offset: Offset of the data within the loaded firmware image to be |
| 146 | * loaded to the DSP (skipping for example ext_manifest section) |
| 147 | */ |
| 148 | struct sof_firmware { |
| 149 | const struct firmware *fw; |
| 150 | u32 payload_offset; |
| 151 | }; |
| 152 | |
| 153 | enum sof_dai_access { |
| 154 | SOF_DAI_DSP_ACCESS, /* access from DSP only */ |
| 155 | SOF_DAI_HOST_ACCESS, /* access from host only */ |
| 156 | |
| 157 | SOF_DAI_ACCESS_NUM |
| 158 | }; |
| 159 | |
| 160 | /* |
| 161 | * SOF DSP HW abstraction operations. |
| 162 | * Used to abstract DSP HW architecture and any IO busses between host CPU |
| 163 | * and DSP device(s). |
| 164 | */ |
| 165 | struct snd_sof_dsp_ops { |
| 166 | |
| 167 | /* probe/remove/shutdown */ |
| 168 | int (*probe_early)(struct snd_sof_dev *sof_dev); /* optional */ |
| 169 | int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ |
| 170 | void (*remove)(struct snd_sof_dev *sof_dev); /* optional */ |
| 171 | void (*remove_late)(struct snd_sof_dev *sof_dev); /* optional */ |
| 172 | int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */ |
| 173 | |
| 174 | /* DSP core boot / reset */ |
| 175 | int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ |
| 176 | int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ |
| 177 | int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ |
| 178 | int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */ |
| 179 | int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */ |
| 180 | |
| 181 | /* |
| 182 | * Register IO: only used by respective drivers themselves, |
| 183 | * TODO: consider removing these operations and calling respective |
| 184 | * implementations directly |
| 185 | */ |
| 186 | void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr, |
| 187 | u8 value); /* optional */ |
| 188 | u8 (*read8)(struct snd_sof_dev *sof_dev, |
| 189 | void __iomem *addr); /* optional */ |
| 190 | void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, |
| 191 | u32 value); /* optional */ |
| 192 | u32 (*read)(struct snd_sof_dev *sof_dev, |
| 193 | void __iomem *addr); /* optional */ |
| 194 | void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, |
| 195 | u64 value); /* optional */ |
| 196 | u64 (*read64)(struct snd_sof_dev *sof_dev, |
| 197 | void __iomem *addr); /* optional */ |
| 198 | |
| 199 | /* memcpy IO */ |
| 200 | int (*block_read)(struct snd_sof_dev *sof_dev, |
| 201 | enum snd_sof_fw_blk_type type, u32 offset, |
| 202 | void *dest, size_t size); /* mandatory */ |
| 203 | int (*block_write)(struct snd_sof_dev *sof_dev, |
| 204 | enum snd_sof_fw_blk_type type, u32 offset, |
| 205 | void *src, size_t size); /* mandatory */ |
| 206 | |
| 207 | /* Mailbox IO */ |
| 208 | void (*mailbox_read)(struct snd_sof_dev *sof_dev, |
| 209 | u32 offset, void *dest, |
| 210 | size_t size); /* optional */ |
| 211 | void (*mailbox_write)(struct snd_sof_dev *sof_dev, |
| 212 | u32 offset, void *src, |
| 213 | size_t size); /* optional */ |
| 214 | |
| 215 | /* doorbell */ |
| 216 | irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ |
| 217 | irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ |
| 218 | |
| 219 | /* ipc */ |
| 220 | int (*send_msg)(struct snd_sof_dev *sof_dev, |
| 221 | struct snd_sof_ipc_msg *msg); /* mandatory */ |
| 222 | |
| 223 | /* FW loading */ |
| 224 | int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ |
| 225 | int (*load_module)(struct snd_sof_dev *sof_dev, |
| 226 | struct snd_sof_mod_hdr *hdr); /* optional */ |
| 227 | |
| 228 | /* connect pcm substream to a host stream */ |
| 229 | int (*pcm_open)(struct snd_sof_dev *sdev, |
| 230 | struct snd_pcm_substream *substream); /* optional */ |
| 231 | /* disconnect pcm substream to a host stream */ |
| 232 | int (*pcm_close)(struct snd_sof_dev *sdev, |
| 233 | struct snd_pcm_substream *substream); /* optional */ |
| 234 | |
| 235 | /* host stream hw params */ |
| 236 | int (*pcm_hw_params)(struct snd_sof_dev *sdev, |
| 237 | struct snd_pcm_substream *substream, |
| 238 | struct snd_pcm_hw_params *params, |
| 239 | struct snd_sof_platform_stream_params *platform_params); /* optional */ |
| 240 | |
| 241 | /* host stream hw_free */ |
| 242 | int (*pcm_hw_free)(struct snd_sof_dev *sdev, |
| 243 | struct snd_pcm_substream *substream); /* optional */ |
| 244 | |
| 245 | /* host stream trigger */ |
| 246 | int (*pcm_trigger)(struct snd_sof_dev *sdev, |
| 247 | struct snd_pcm_substream *substream, |
| 248 | int cmd); /* optional */ |
| 249 | |
| 250 | /* host stream pointer */ |
| 251 | snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, |
| 252 | struct snd_pcm_substream *substream); /* optional */ |
| 253 | |
| 254 | /* pcm ack */ |
| 255 | int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */ |
| 256 | |
| 257 | /* |
| 258 | * optional callback to retrieve the number of frames left/arrived from/to |
| 259 | * the DSP on the DAI side (link/codec/DMIC/etc). |
| 260 | * |
| 261 | * The callback is used when the firmware does not provide this information |
| 262 | * via the shared SRAM window and it can be retrieved by host. |
| 263 | */ |
| 264 | u64 (*get_dai_frame_counter)(struct snd_sof_dev *sdev, |
| 265 | struct snd_soc_component *component, |
| 266 | struct snd_pcm_substream *substream); /* optional */ |
| 267 | |
| 268 | /* |
| 269 | * Optional callback to retrieve the number of bytes left/arrived from/to |
| 270 | * the DSP on the host side (bytes between host ALSA buffer and DSP). |
| 271 | * |
| 272 | * The callback is needed for ALSA delay reporting. |
| 273 | */ |
| 274 | u64 (*get_host_byte_counter)(struct snd_sof_dev *sdev, |
| 275 | struct snd_soc_component *component, |
| 276 | struct snd_pcm_substream *substream); /* optional */ |
| 277 | |
| 278 | /* host read DSP stream data */ |
| 279 | int (*ipc_msg_data)(struct snd_sof_dev *sdev, |
| 280 | struct snd_sof_pcm_stream *sps, |
| 281 | void *p, size_t sz); /* mandatory */ |
| 282 | |
| 283 | /* host side configuration of the stream's data offset in stream mailbox area */ |
| 284 | int (*set_stream_data_offset)(struct snd_sof_dev *sdev, |
| 285 | struct snd_sof_pcm_stream *sps, |
| 286 | size_t posn_offset); /* optional */ |
| 287 | |
| 288 | /* pre/post firmware run */ |
| 289 | int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ |
| 290 | int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ |
| 291 | |
| 292 | /* parse platform specific extended manifest, optional */ |
| 293 | int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, |
| 294 | const struct sof_ext_man_elem_header *hdr); |
| 295 | |
| 296 | /* DSP PM */ |
| 297 | int (*suspend)(struct snd_sof_dev *sof_dev, |
| 298 | u32 target_state); /* optional */ |
| 299 | int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ |
| 300 | int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ |
| 301 | int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ |
| 302 | int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ |
| 303 | int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ |
| 304 | int (*set_power_state)(struct snd_sof_dev *sdev, |
| 305 | const struct sof_dsp_power_state *target_state); /* optional */ |
| 306 | |
| 307 | /* DSP clocking */ |
| 308 | int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ |
| 309 | |
| 310 | /* debug */ |
| 311 | const struct snd_sof_debugfs_map *debug_map; /* optional */ |
| 312 | int debug_map_count; /* optional */ |
| 313 | void (*dbg_dump)(struct snd_sof_dev *sof_dev, |
| 314 | u32 flags); /* optional */ |
| 315 | void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ |
| 316 | int (*debugfs_add_region_item)(struct snd_sof_dev *sdev, |
| 317 | enum snd_sof_fw_blk_type blk_type, u32 offset, |
| 318 | size_t size, const char *name, |
| 319 | enum sof_debugfs_access_type access_type); /* optional */ |
| 320 | |
| 321 | /* host DMA trace (IPC3) */ |
| 322 | int (*trace_init)(struct snd_sof_dev *sdev, |
| 323 | struct snd_dma_buffer *dmatb, |
| 324 | struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */ |
| 325 | int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ |
| 326 | int (*trace_trigger)(struct snd_sof_dev *sdev, |
| 327 | int cmd); /* optional */ |
| 328 | |
| 329 | /* misc */ |
| 330 | int (*get_bar_index)(struct snd_sof_dev *sdev, |
| 331 | u32 type); /* optional */ |
| 332 | int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ |
| 333 | int (*get_window_offset)(struct snd_sof_dev *sdev, |
| 334 | u32 id);/* mandatory for common loader code */ |
| 335 | |
| 336 | /* machine driver ops */ |
| 337 | int (*machine_register)(struct snd_sof_dev *sdev, |
| 338 | void *pdata); /* optional */ |
| 339 | void (*machine_unregister)(struct snd_sof_dev *sdev, |
| 340 | void *pdata); /* optional */ |
| 341 | struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */ |
| 342 | void (*set_mach_params)(struct snd_soc_acpi_mach *mach, |
| 343 | struct snd_sof_dev *sdev); /* optional */ |
| 344 | |
| 345 | /* IPC client ops */ |
| 346 | int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ |
| 347 | void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ |
| 348 | |
| 349 | /* DAI ops */ |
| 350 | struct snd_soc_dai_driver *drv; |
| 351 | int num_drv; |
| 352 | |
| 353 | bool (*is_chain_dma_supported)(struct snd_sof_dev *sdev, u32 dai_type); /* optional */ |
| 354 | |
| 355 | /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ |
| 356 | u32 hw_info; |
| 357 | |
| 358 | const struct dsp_arch_ops *dsp_arch_ops; |
| 359 | }; |
| 360 | |
| 361 | /* DSP architecture specific callbacks for oops and stack dumps */ |
| 362 | struct dsp_arch_ops { |
| 363 | void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops); |
| 364 | void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops, |
| 365 | u32 *stack, u32 stack_words); |
| 366 | }; |
| 367 | |
| 368 | #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops) |
| 369 | |
| 370 | /* FS entry for debug files that can expose DSP memories, registers */ |
| 371 | struct snd_sof_dfsentry { |
| 372 | size_t size; |
| 373 | size_t buf_data_size; /* length of buffered data for file read operation */ |
| 374 | enum sof_dfsentry_type type; |
| 375 | /* |
| 376 | * access_type specifies if the |
| 377 | * memory -> DSP resource (memory, register etc) is always accessible |
| 378 | * or if it is accessible only when the DSP is in D0. |
| 379 | */ |
| 380 | enum sof_debugfs_access_type access_type; |
| 381 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) |
| 382 | char *cache_buf; /* buffer to cache the contents of debugfs memory */ |
| 383 | #endif |
| 384 | struct snd_sof_dev *sdev; |
| 385 | struct list_head list; /* list in sdev dfsentry list */ |
| 386 | union { |
| 387 | void __iomem *io_mem; |
| 388 | void *buf; |
| 389 | }; |
| 390 | }; |
| 391 | |
| 392 | /* Debug mapping for any DSP memory or registers that can used for debug */ |
| 393 | struct snd_sof_debugfs_map { |
| 394 | const char *name; |
| 395 | u32 bar; |
| 396 | u32 offset; |
| 397 | u32 size; |
| 398 | /* |
| 399 | * access_type specifies if the memory is always accessible |
| 400 | * or if it is accessible only when the DSP is in D0. |
| 401 | */ |
| 402 | enum sof_debugfs_access_type access_type; |
| 403 | }; |
| 404 | |
| 405 | /* mailbox descriptor, used for host <-> DSP IPC */ |
| 406 | struct snd_sof_mailbox { |
| 407 | size_t size; |
| 408 | u32 offset; |
| 409 | }; |
| 410 | |
| 411 | /* IPC message descriptor for host <-> DSP IO */ |
| 412 | struct snd_sof_ipc_msg { |
| 413 | /* message data */ |
| 414 | void *msg_data; |
| 415 | void *reply_data; |
| 416 | size_t msg_size; |
| 417 | size_t reply_size; |
| 418 | int reply_error; |
| 419 | |
| 420 | bool ipc_complete; |
| 421 | |
| 422 | wait_queue_head_t waitq; |
| 423 | |
| 424 | /* notification, firmware initiated messages */ |
| 425 | void *rx_data; |
| 426 | }; |
| 427 | |
| 428 | /** |
| 429 | * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops |
| 430 | * @init: Function pointer for initialization of the tracing |
| 431 | * @free: Optional function pointer for freeing of the tracing |
| 432 | * @fw_crashed: Optional function pointer to notify the tracing of a firmware crash |
| 433 | * @suspend: Function pointer for system/runtime suspend |
| 434 | * @resume: Function pointer for system/runtime resume |
| 435 | */ |
| 436 | struct sof_ipc_fw_tracing_ops { |
| 437 | int (*init)(struct snd_sof_dev *sdev); |
| 438 | void (*free)(struct snd_sof_dev *sdev); |
| 439 | void (*fw_crashed)(struct snd_sof_dev *sdev); |
| 440 | void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state); |
| 441 | int (*resume)(struct snd_sof_dev *sdev); |
| 442 | }; |
| 443 | |
| 444 | /** |
| 445 | * struct sof_ipc_pm_ops - IPC-specific PM ops |
| 446 | * @ctx_save: Optional function pointer for context save |
| 447 | * @ctx_restore: Optional function pointer for context restore |
| 448 | * @set_core_state: Optional function pointer for turning on/off a DSP core |
| 449 | * @set_pm_gate: Optional function pointer for pm gate settings |
| 450 | */ |
| 451 | struct sof_ipc_pm_ops { |
| 452 | int (*ctx_save)(struct snd_sof_dev *sdev); |
| 453 | int (*ctx_restore)(struct snd_sof_dev *sdev); |
| 454 | int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on); |
| 455 | int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags); |
| 456 | }; |
| 457 | |
| 458 | /** |
| 459 | * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops |
| 460 | * @validate: Function pointer for validating the firmware image |
| 461 | * @parse_ext_manifest: Function pointer for parsing the manifest of the firmware |
| 462 | * @load_fw_to_dsp: Optional function pointer for loading the firmware to the |
| 463 | * DSP. |
| 464 | * The function implements generic, hardware independent way |
| 465 | * of loading the initial firmware and its modules (if any). |
| 466 | */ |
| 467 | struct sof_ipc_fw_loader_ops { |
| 468 | int (*validate)(struct snd_sof_dev *sdev); |
| 469 | size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev); |
| 470 | int (*load_fw_to_dsp)(struct snd_sof_dev *sdev); |
| 471 | }; |
| 472 | |
| 473 | struct sof_ipc_tplg_ops; |
| 474 | struct sof_ipc_pcm_ops; |
| 475 | |
| 476 | /** |
| 477 | * struct sof_ipc_ops - IPC-specific ops |
| 478 | * @tplg: Pointer to IPC-specific topology ops |
| 479 | * @pm: Pointer to PM ops |
| 480 | * @pcm: Pointer to PCM ops |
| 481 | * @fw_loader: Pointer to Firmware Loader ops |
| 482 | * @fw_tracing: Optional pointer to Firmware tracing ops |
| 483 | * |
| 484 | * @init: Optional pointer for IPC related initialization |
| 485 | * @exit: Optional pointer for IPC related cleanup |
| 486 | * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware |
| 487 | * boot. |
| 488 | * |
| 489 | * @tx_msg: Function pointer for sending a 'short' IPC message |
| 490 | * @set_get_data: Function pointer for set/get data ('large' IPC message). This |
| 491 | * function may split up the 'large' message and use the @tx_msg |
| 492 | * path to transfer individual chunks, or use other means to transfer |
| 493 | * the message. |
| 494 | * @get_reply: Function pointer for fetching the reply to |
| 495 | * sdev->ipc->msg.reply_data |
| 496 | * @rx_msg: Function pointer for handling a received message |
| 497 | * |
| 498 | * Note: both @tx_msg and @set_get_data considered as TX functions and they are |
| 499 | * serialized for the duration of the instructed transfer. A large message sent |
| 500 | * via @set_get_data is a single transfer even if at the hardware level it is |
| 501 | * handled with multiple chunks. |
| 502 | */ |
| 503 | struct sof_ipc_ops { |
| 504 | const struct sof_ipc_tplg_ops *tplg; |
| 505 | const struct sof_ipc_pm_ops *pm; |
| 506 | const struct sof_ipc_pcm_ops *pcm; |
| 507 | const struct sof_ipc_fw_loader_ops *fw_loader; |
| 508 | const struct sof_ipc_fw_tracing_ops *fw_tracing; |
| 509 | |
| 510 | int (*init)(struct snd_sof_dev *sdev); |
| 511 | void (*exit)(struct snd_sof_dev *sdev); |
| 512 | int (*post_fw_boot)(struct snd_sof_dev *sdev); |
| 513 | |
| 514 | int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, |
| 515 | void *reply_data, size_t reply_bytes, bool no_pm); |
| 516 | int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes, |
| 517 | bool set); |
| 518 | int (*get_reply)(struct snd_sof_dev *sdev); |
| 519 | void (*rx_msg)(struct snd_sof_dev *sdev); |
| 520 | }; |
| 521 | |
| 522 | /* SOF generic IPC data */ |
| 523 | struct snd_sof_ipc { |
| 524 | struct snd_sof_dev *sdev; |
| 525 | |
| 526 | /* protects messages and the disable flag */ |
| 527 | struct mutex tx_mutex; |
| 528 | /* disables further sending of ipc's */ |
| 529 | bool disable_ipc_tx; |
| 530 | |
| 531 | /* Maximum allowed size of a single IPC message/reply */ |
| 532 | size_t max_payload_size; |
| 533 | |
| 534 | struct snd_sof_ipc_msg msg; |
| 535 | |
| 536 | /* IPC ops based on version */ |
| 537 | const struct sof_ipc_ops *ops; |
| 538 | }; |
| 539 | |
| 540 | /* Helper to retrieve the IPC ops */ |
| 541 | #define sof_ipc_get_ops(sdev, ops_name) \ |
| 542 | (((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL) |
| 543 | |
| 544 | /* |
| 545 | * SOF Device Level. |
| 546 | */ |
| 547 | struct snd_sof_dev { |
| 548 | struct device *dev; |
| 549 | spinlock_t ipc_lock; /* lock for IPC users */ |
| 550 | spinlock_t hw_lock; /* lock for HW IO access */ |
| 551 | |
| 552 | /* |
| 553 | * When true the DSP is not used. |
| 554 | * It is set under the following condition: |
| 555 | * User sets the SOF_DBG_DSPLESS_MODE flag in sof_debug module parameter |
| 556 | * and |
| 557 | * the platform advertises that it can support such mode |
| 558 | * pdata->desc->dspless_mode_supported is true. |
| 559 | */ |
| 560 | bool dspless_mode_selected; |
| 561 | |
| 562 | /* Main, Base firmware image */ |
| 563 | struct sof_firmware basefw; |
| 564 | |
| 565 | /* |
| 566 | * ASoC components. plat_drv fields are set dynamically so |
| 567 | * can't use const |
| 568 | */ |
| 569 | struct snd_soc_component_driver plat_drv; |
| 570 | |
| 571 | /* current DSP power state */ |
| 572 | struct sof_dsp_power_state dsp_power_state; |
| 573 | /* mutex to protect the dsp_power_state access */ |
| 574 | struct mutex power_state_access; |
| 575 | |
| 576 | /* Intended power target of system suspend */ |
| 577 | enum sof_system_suspend_state system_suspend_target; |
| 578 | |
| 579 | /* DSP firmware boot */ |
| 580 | wait_queue_head_t boot_wait; |
| 581 | enum sof_fw_state fw_state; |
| 582 | bool first_boot; |
| 583 | |
| 584 | /* work queue in case the probe is implemented in two steps */ |
| 585 | struct work_struct probe_work; |
| 586 | bool probe_completed; |
| 587 | |
| 588 | /* DSP HW differentiation */ |
| 589 | struct snd_sof_pdata *pdata; |
| 590 | |
| 591 | /* IPC */ |
| 592 | struct snd_sof_ipc *ipc; |
| 593 | struct snd_sof_mailbox fw_info_box; /* FW shared memory */ |
| 594 | struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ |
| 595 | struct snd_sof_mailbox host_box; /* Host initiated IPC */ |
| 596 | struct snd_sof_mailbox stream_box; /* Stream position update */ |
| 597 | struct snd_sof_mailbox debug_box; /* Debug info updates */ |
| 598 | struct snd_sof_ipc_msg *msg; |
| 599 | int ipc_irq; |
| 600 | u32 next_comp_id; /* monotonic - reset during S3 */ |
| 601 | |
| 602 | /* memory bases for mmaped DSPs - set by dsp_init() */ |
| 603 | void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ |
| 604 | int mmio_bar; |
| 605 | int mailbox_bar; |
| 606 | size_t dsp_oops_offset; |
| 607 | |
| 608 | /* debug */ |
| 609 | struct dentry *debugfs_root; |
| 610 | struct list_head dfsentry_list; |
| 611 | bool dbg_dump_printed; |
| 612 | bool ipc_dump_printed; |
| 613 | bool d3_prevented; /* runtime pm use count incremented to prevent context lost */ |
| 614 | |
| 615 | /* firmware loader */ |
| 616 | struct sof_ipc_fw_ready fw_ready; |
| 617 | struct sof_ipc_fw_version fw_version; |
| 618 | struct sof_ipc_cc_version *cc_version; |
| 619 | |
| 620 | /* topology */ |
| 621 | struct snd_soc_tplg_ops *tplg_ops; |
| 622 | struct list_head pcm_list; |
| 623 | struct list_head kcontrol_list; |
| 624 | struct list_head widget_list; |
| 625 | struct list_head pipeline_list; |
| 626 | struct list_head dai_list; |
| 627 | struct list_head dai_link_list; |
| 628 | struct list_head route_list; |
| 629 | struct snd_soc_component *component; |
| 630 | u32 enabled_cores_mask; /* keep track of enabled cores */ |
| 631 | bool led_present; |
| 632 | |
| 633 | /* FW configuration */ |
| 634 | struct sof_ipc_window *info_window; |
| 635 | |
| 636 | /* IPC timeouts in ms */ |
| 637 | int ipc_timeout; |
| 638 | int boot_timeout; |
| 639 | |
| 640 | /* firmwre tracing */ |
| 641 | bool fw_trace_is_supported; /* set with Kconfig or module parameter */ |
| 642 | void *fw_trace_data; /* private data used by firmware tracing implementation */ |
| 643 | |
| 644 | bool msi_enabled; |
| 645 | |
| 646 | /* DSP core context */ |
| 647 | u32 num_cores; |
| 648 | |
| 649 | /* |
| 650 | * ref count per core that will be modified during system suspend/resume and during pcm |
| 651 | * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm |
| 652 | * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in |
| 653 | * sound/core/ when streams are active and during system suspend/resume, streams are |
| 654 | * already suspended. |
| 655 | */ |
| 656 | int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES]; |
| 657 | |
| 658 | /* |
| 659 | * Used to keep track of registered IPC client devices so that they can |
| 660 | * be removed when the parent SOF module is removed. |
| 661 | */ |
| 662 | struct list_head ipc_client_list; |
| 663 | |
| 664 | /* mutex to protect client list */ |
| 665 | struct mutex ipc_client_mutex; |
| 666 | |
| 667 | /* |
| 668 | * Used for tracking the IPC client's RX registration for DSP initiated |
| 669 | * message handling. |
| 670 | */ |
| 671 | struct list_head ipc_rx_handler_list; |
| 672 | |
| 673 | /* |
| 674 | * Used for tracking the IPC client's registration for DSP state change |
| 675 | * notification |
| 676 | */ |
| 677 | struct list_head fw_state_handler_list; |
| 678 | |
| 679 | /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */ |
| 680 | struct mutex client_event_handler_mutex; |
| 681 | |
| 682 | /* quirks to override topology values */ |
| 683 | bool mclk_id_override; |
| 684 | u16 mclk_id_quirk; /* same size as in IPC3 definitions */ |
| 685 | |
| 686 | void *private; /* core does not touch this */ |
| 687 | }; |
| 688 | |
| 689 | /* |
| 690 | * Device Level. |
| 691 | */ |
| 692 | |
| 693 | int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); |
| 694 | int snd_sof_device_remove(struct device *dev); |
| 695 | int snd_sof_device_shutdown(struct device *dev); |
| 696 | bool snd_sof_device_probe_completed(struct device *dev); |
| 697 | |
| 698 | int snd_sof_runtime_suspend(struct device *dev); |
| 699 | int snd_sof_runtime_resume(struct device *dev); |
| 700 | int snd_sof_runtime_idle(struct device *dev); |
| 701 | int snd_sof_resume(struct device *dev); |
| 702 | int snd_sof_suspend(struct device *dev); |
| 703 | int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); |
| 704 | int snd_sof_prepare(struct device *dev); |
| 705 | void snd_sof_complete(struct device *dev); |
| 706 | |
| 707 | void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); |
| 708 | |
| 709 | /* |
| 710 | * Compress support |
| 711 | */ |
| 712 | extern struct snd_compress_ops sof_compressed_ops; |
| 713 | |
| 714 | /* |
| 715 | * Firmware (firmware, libraries, topologies) file location |
| 716 | */ |
| 717 | int sof_create_ipc_file_profile(struct snd_sof_dev *sdev, |
| 718 | struct sof_loadable_file_profile *base_profile, |
| 719 | struct sof_loadable_file_profile *out_profile); |
| 720 | |
| 721 | /* |
| 722 | * Firmware loading. |
| 723 | */ |
| 724 | int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); |
| 725 | int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); |
| 726 | int snd_sof_run_firmware(struct snd_sof_dev *sdev); |
| 727 | void snd_sof_fw_unload(struct snd_sof_dev *sdev); |
| 728 | |
| 729 | /* |
| 730 | * IPC low level APIs. |
| 731 | */ |
| 732 | struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); |
| 733 | void snd_sof_ipc_free(struct snd_sof_dev *sdev); |
| 734 | void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev); |
| 735 | void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); |
| 736 | static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) |
| 737 | { |
| 738 | sdev->ipc->ops->rx_msg(sdev); |
| 739 | } |
| 740 | int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, |
| 741 | void *reply_data, size_t reply_bytes); |
| 742 | static inline int sof_ipc_tx_message_no_reply(struct snd_sof_ipc *ipc, void *msg_data, |
| 743 | size_t msg_bytes) |
| 744 | { |
| 745 | return sof_ipc_tx_message(ipc, msg_data, msg_bytes, NULL, reply_bytes: 0); |
| 746 | } |
| 747 | int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data, |
| 748 | size_t msg_bytes, bool set); |
| 749 | int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, |
| 750 | void *reply_data, size_t reply_bytes); |
| 751 | static inline int sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc *ipc, void *msg_data, |
| 752 | size_t msg_bytes) |
| 753 | { |
| 754 | return sof_ipc_tx_message_no_pm(ipc, msg_data, msg_bytes, NULL, reply_bytes: 0); |
| 755 | } |
| 756 | int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, |
| 757 | size_t reply_bytes); |
| 758 | |
| 759 | static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id) |
| 760 | { |
| 761 | snd_sof_ipc_get_reply(sdev); |
| 762 | snd_sof_ipc_reply(sdev, msg_id); |
| 763 | } |
| 764 | |
| 765 | /* |
| 766 | * Trace/debug |
| 767 | */ |
| 768 | int snd_sof_dbg_init(struct snd_sof_dev *sdev); |
| 769 | void snd_sof_free_debug(struct snd_sof_dev *sdev); |
| 770 | int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, |
| 771 | void *base, size_t size, |
| 772 | const char *name, mode_t mode); |
| 773 | void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level, |
| 774 | u32 panic_code, u32 tracep_code, void *oops, |
| 775 | struct sof_ipc_panic_info *panic_info, |
| 776 | void *stack, size_t stack_words); |
| 777 | void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg); |
| 778 | int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); |
| 779 | int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev, |
| 780 | enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size, |
| 781 | const char *name, enum sof_debugfs_access_type access_type); |
| 782 | /* Firmware tracing */ |
| 783 | int sof_fw_trace_init(struct snd_sof_dev *sdev); |
| 784 | void sof_fw_trace_free(struct snd_sof_dev *sdev); |
| 785 | void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev); |
| 786 | void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state); |
| 787 | int sof_fw_trace_resume(struct snd_sof_dev *sdev); |
| 788 | |
| 789 | /* |
| 790 | * DSP Architectures. |
| 791 | */ |
| 792 | static inline void sof_stack(struct snd_sof_dev *sdev, const char *level, |
| 793 | void *oops, u32 *stack, u32 stack_words) |
| 794 | { |
| 795 | sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack, |
| 796 | stack_words); |
| 797 | } |
| 798 | |
| 799 | static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops) |
| 800 | { |
| 801 | if (sof_dsp_arch_ops(sdev)->dsp_oops) |
| 802 | sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops); |
| 803 | } |
| 804 | |
| 805 | extern const struct dsp_arch_ops sof_xtensa_arch_ops; |
| 806 | |
| 807 | /* |
| 808 | * Firmware state tracking |
| 809 | */ |
| 810 | void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state); |
| 811 | |
| 812 | /* |
| 813 | * Utilities |
| 814 | */ |
| 815 | void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); |
| 816 | void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); |
| 817 | u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); |
| 818 | u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); |
| 819 | void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, |
| 820 | void *message, size_t bytes); |
| 821 | void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, |
| 822 | void *message, size_t bytes); |
| 823 | int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, |
| 824 | u32 offset, void *src, size_t size); |
| 825 | int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, |
| 826 | u32 offset, void *dest, size_t size); |
| 827 | |
| 828 | int sof_ipc_msg_data(struct snd_sof_dev *sdev, |
| 829 | struct snd_sof_pcm_stream *sps, |
| 830 | void *p, size_t sz); |
| 831 | int sof_set_stream_data_offset(struct snd_sof_dev *sdev, |
| 832 | struct snd_sof_pcm_stream *sps, |
| 833 | size_t posn_offset); |
| 834 | |
| 835 | int sof_stream_pcm_open(struct snd_sof_dev *sdev, |
| 836 | struct snd_pcm_substream *substream); |
| 837 | int sof_stream_pcm_close(struct snd_sof_dev *sdev, |
| 838 | struct snd_pcm_substream *substream); |
| 839 | |
| 840 | /* SOF client support */ |
| 841 | struct sof_client_dev; |
| 842 | |
| 843 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT) |
| 844 | struct snd_sof_dev *sof_client_dev_to_sof_dev(struct sof_client_dev *cdev); |
| 845 | |
| 846 | int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id, |
| 847 | const void *data, size_t size); |
| 848 | void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id); |
| 849 | int sof_register_clients(struct snd_sof_dev *sdev); |
| 850 | void sof_unregister_clients(struct snd_sof_dev *sdev); |
| 851 | void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf); |
| 852 | void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev); |
| 853 | int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state); |
| 854 | int sof_resume_clients(struct snd_sof_dev *sdev); |
| 855 | #else /* CONFIG_SND_SOC_SOF_CLIENT */ |
| 856 | static inline struct snd_sof_dev * |
| 857 | sof_client_dev_to_sof_dev(struct sof_client_dev *cdev) { |
| 858 | return NULL; |
| 859 | } |
| 860 | |
| 861 | static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, |
| 862 | u32 id, const void *data, size_t size) |
| 863 | { |
| 864 | return 0; |
| 865 | } |
| 866 | |
| 867 | static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev, |
| 868 | const char *name, u32 id) |
| 869 | { |
| 870 | } |
| 871 | |
| 872 | static inline int sof_register_clients(struct snd_sof_dev *sdev) |
| 873 | { |
| 874 | return 0; |
| 875 | } |
| 876 | |
| 877 | static inline void sof_unregister_clients(struct snd_sof_dev *sdev) |
| 878 | { |
| 879 | } |
| 880 | |
| 881 | static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf) |
| 882 | { |
| 883 | } |
| 884 | |
| 885 | static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev) |
| 886 | { |
| 887 | } |
| 888 | |
| 889 | static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state) |
| 890 | { |
| 891 | return 0; |
| 892 | } |
| 893 | |
| 894 | static inline int sof_resume_clients(struct snd_sof_dev *sdev) |
| 895 | { |
| 896 | return 0; |
| 897 | } |
| 898 | #endif /* CONFIG_SND_SOC_SOF_CLIENT */ |
| 899 | |
| 900 | /* Main ops for IPC implementations */ |
| 901 | extern const struct sof_ipc_ops ipc3_ops; |
| 902 | extern const struct sof_ipc_ops ipc4_ops; |
| 903 | |
| 904 | #endif |
| 905 | |