1 | //===-- ABISysV_arm64.cpp -------------------------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #include "ABISysV_arm64.h" |
10 | |
11 | #include <optional> |
12 | #include <vector> |
13 | |
14 | #include "llvm/ADT/STLExtras.h" |
15 | #include "llvm/TargetParser/Triple.h" |
16 | |
17 | #include "lldb/Core/Module.h" |
18 | #include "lldb/Core/PluginManager.h" |
19 | #include "lldb/Core/Value.h" |
20 | #include "lldb/Symbol/UnwindPlan.h" |
21 | #include "lldb/Target/Process.h" |
22 | #include "lldb/Target/RegisterContext.h" |
23 | #include "lldb/Target/Target.h" |
24 | #include "lldb/Target/Thread.h" |
25 | #include "lldb/Utility/ConstString.h" |
26 | #include "lldb/Utility/LLDBLog.h" |
27 | #include "lldb/Utility/Log.h" |
28 | #include "lldb/Utility/RegisterValue.h" |
29 | #include "lldb/Utility/Scalar.h" |
30 | #include "lldb/Utility/Status.h" |
31 | #include "lldb/ValueObject/ValueObjectConstResult.h" |
32 | |
33 | using namespace lldb; |
34 | using namespace lldb_private; |
35 | |
36 | bool ABISysV_arm64::GetPointerReturnRegister(const char *&name) { |
37 | name = "x0" ; |
38 | return true; |
39 | } |
40 | |
41 | size_t ABISysV_arm64::GetRedZoneSize() const { return 128; } |
42 | |
43 | // Static Functions |
44 | |
45 | ABISP |
46 | ABISysV_arm64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) { |
47 | const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch(); |
48 | const llvm::Triple::VendorType vendor_type = arch.GetTriple().getVendor(); |
49 | |
50 | if (vendor_type != llvm::Triple::Apple) { |
51 | if (arch_type == llvm::Triple::aarch64 || |
52 | arch_type == llvm::Triple::aarch64_32) { |
53 | return ABISP( |
54 | new ABISysV_arm64(std::move(process_sp), MakeMCRegisterInfo(arch))); |
55 | } |
56 | } |
57 | |
58 | return ABISP(); |
59 | } |
60 | |
61 | static Status PushToLinuxGuardedControlStack(addr_t return_addr, |
62 | RegisterContext *reg_ctx, |
63 | Thread &thread) { |
64 | Status err; |
65 | |
66 | // If the Guarded Control Stack extension is present we may need to put the |
67 | // return address onto that stack. |
68 | const RegisterInfo *gcs_features_enabled_info = |
69 | reg_ctx->GetRegisterInfoByName(reg_name: "gcs_features_enabled" ); |
70 | if (!gcs_features_enabled_info) |
71 | return err; |
72 | |
73 | uint64_t gcs_features_enabled = reg_ctx->ReadRegisterAsUnsigned( |
74 | reg_info: gcs_features_enabled_info, LLDB_INVALID_ADDRESS); |
75 | if (gcs_features_enabled == LLDB_INVALID_ADDRESS) |
76 | return Status("Could not read GCS features enabled register." ); |
77 | |
78 | // Only attempt this if GCS is enabled. If it's not enabled then gcspr_el0 |
79 | // may point to unmapped memory. |
80 | if ((gcs_features_enabled & 1) == 0) |
81 | return err; |
82 | |
83 | const RegisterInfo *gcspr_el0_info = |
84 | reg_ctx->GetRegisterInfoByName(reg_name: "gcspr_el0" ); |
85 | if (!gcspr_el0_info) |
86 | return Status("Could not get register info for gcspr_el0." ); |
87 | |
88 | uint64_t gcspr_el0 = |
89 | reg_ctx->ReadRegisterAsUnsigned(reg_info: gcspr_el0_info, LLDB_INVALID_ADDRESS); |
90 | if (gcspr_el0 == LLDB_INVALID_ADDRESS) |
91 | return Status("Could not read gcspr_el0." ); |
92 | |
93 | // A link register entry on the GCS is 8 bytes. |
94 | gcspr_el0 -= 8; |
95 | if (!reg_ctx->WriteRegisterFromUnsigned(reg_info: gcspr_el0_info, uval: gcspr_el0)) |
96 | return Status( |
97 | "Attempted to decrement gcspr_el0, but could not write to it." ); |
98 | |
99 | Status error; |
100 | size_t wrote = thread.GetProcess()->WriteMemory(vm_addr: gcspr_el0, buf: &return_addr, |
101 | size: sizeof(return_addr), error); |
102 | if ((wrote != sizeof(return_addr) || error.Fail())) { |
103 | // gcspr_el0 will be restored by the ThreadPlan's DoTakedown. |
104 | return Status("Failed to write new Guarded Control Stack entry." ); |
105 | } |
106 | |
107 | Log *log = GetLog(mask: LLDBLog::Expressions); |
108 | LLDB_LOGF(log, |
109 | "Pushed return address 0x%" PRIx64 " to Guarded Control Stack. " |
110 | "gcspr_el0 was 0%" PRIx64 ", is now 0x%" PRIx64 "." , |
111 | return_addr, gcspr_el0 - 8, gcspr_el0); |
112 | |
113 | // gcspr_el0 will be restored to the original value by lldb-server after |
114 | // the call has finished, which serves as the "pop". |
115 | |
116 | return err; |
117 | } |
118 | |
119 | bool ABISysV_arm64::PrepareTrivialCall(Thread &thread, addr_t sp, |
120 | addr_t func_addr, addr_t return_addr, |
121 | llvm::ArrayRef<addr_t> args) const { |
122 | RegisterContext *reg_ctx = thread.GetRegisterContext().get(); |
123 | if (!reg_ctx) |
124 | return false; |
125 | |
126 | Log *log = GetLog(mask: LLDBLog::Expressions); |
127 | |
128 | if (log) { |
129 | StreamString s; |
130 | s.Printf(format: "ABISysV_arm64::PrepareTrivialCall (tid = 0x%" PRIx64 |
131 | ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64 |
132 | ", return_addr = 0x%" PRIx64, |
133 | thread.GetID(), (uint64_t)sp, (uint64_t)func_addr, |
134 | (uint64_t)return_addr); |
135 | |
136 | for (size_t i = 0; i < args.size(); ++i) |
137 | s.Printf(format: ", arg%d = 0x%" PRIx64, static_cast<int>(i + 1), args[i]); |
138 | s.PutCString(cstr: ")" ); |
139 | log->PutString(str: s.GetString()); |
140 | } |
141 | |
142 | // x0 - x7 contain first 8 simple args |
143 | if (args.size() > 8) |
144 | return false; |
145 | |
146 | if (GetProcessSP()->GetTarget().GetArchitecture().GetTriple().isOSLinux()) { |
147 | Status err = PushToLinuxGuardedControlStack(return_addr, reg_ctx, thread); |
148 | // If we could not manage the GCS, the expression will certainly fail, |
149 | // and if we just carried on, that failure would be a lot more cryptic. |
150 | if (err.Fail()) { |
151 | LLDB_LOGF(log, "Failed to setup Guarded Call Stack: %s" , err.AsCString()); |
152 | return false; |
153 | } |
154 | } |
155 | |
156 | for (size_t i = 0; i < args.size(); ++i) { |
157 | const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo( |
158 | reg_kind: eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + i); |
159 | LLDB_LOGF(log, "About to write arg%d (0x%" PRIx64 ") into %s" , |
160 | static_cast<int>(i + 1), args[i], reg_info->name); |
161 | if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, uval: args[i])) |
162 | return false; |
163 | } |
164 | |
165 | // Set "lr" to the return address |
166 | if (!reg_ctx->WriteRegisterFromUnsigned( |
167 | reg_info: reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
168 | LLDB_REGNUM_GENERIC_RA), |
169 | uval: return_addr)) |
170 | return false; |
171 | |
172 | // Set "sp" to the requested value |
173 | if (!reg_ctx->WriteRegisterFromUnsigned( |
174 | reg_info: reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
175 | LLDB_REGNUM_GENERIC_SP), |
176 | uval: sp)) |
177 | return false; |
178 | |
179 | // Set "pc" to the address requested |
180 | if (!reg_ctx->WriteRegisterFromUnsigned( |
181 | reg_info: reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
182 | LLDB_REGNUM_GENERIC_PC), |
183 | uval: func_addr)) |
184 | return false; |
185 | |
186 | return true; |
187 | } |
188 | |
189 | // TODO: We dont support fp/SIMD arguments in v0-v7 |
190 | bool ABISysV_arm64::GetArgumentValues(Thread &thread, ValueList &values) const { |
191 | uint32_t num_values = values.GetSize(); |
192 | |
193 | ExecutionContext exe_ctx(thread.shared_from_this()); |
194 | |
195 | // Extract the register context so we can read arguments from registers |
196 | |
197 | RegisterContext *reg_ctx = thread.GetRegisterContext().get(); |
198 | |
199 | if (!reg_ctx) |
200 | return false; |
201 | |
202 | addr_t sp = 0; |
203 | |
204 | for (uint32_t value_idx = 0; value_idx < num_values; ++value_idx) { |
205 | // We currently only support extracting values with Clang QualTypes. Do we |
206 | // care about others? |
207 | Value *value = values.GetValueAtIndex(idx: value_idx); |
208 | |
209 | if (!value) |
210 | return false; |
211 | |
212 | CompilerType value_type = value->GetCompilerType(); |
213 | if (value_type) { |
214 | bool is_signed = false; |
215 | size_t bit_width = 0; |
216 | std::optional<uint64_t> bit_size = |
217 | llvm::expectedToOptional(E: value_type.GetBitSize(exe_scope: &thread)); |
218 | if (!bit_size) |
219 | return false; |
220 | if (value_type.IsIntegerOrEnumerationType(is_signed)) { |
221 | bit_width = *bit_size; |
222 | } else if (value_type.IsPointerOrReferenceType()) { |
223 | bit_width = *bit_size; |
224 | } else { |
225 | // We only handle integer, pointer and reference types currently... |
226 | return false; |
227 | } |
228 | |
229 | if (bit_width <= (exe_ctx.GetProcessRef().GetAddressByteSize() * 8)) { |
230 | if (value_idx < 8) { |
231 | // Arguments 1-8 are in x0-x7... |
232 | const RegisterInfo *reg_info = nullptr; |
233 | reg_info = reg_ctx->GetRegisterInfo( |
234 | reg_kind: eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + value_idx); |
235 | |
236 | if (reg_info) { |
237 | RegisterValue reg_value; |
238 | |
239 | if (reg_ctx->ReadRegister(reg_info, reg_value)) { |
240 | if (is_signed) |
241 | reg_value.SignExtend(sign_bitpos: bit_width); |
242 | if (!reg_value.GetScalarValue(scalar&: value->GetScalar())) |
243 | return false; |
244 | continue; |
245 | } |
246 | } |
247 | return false; |
248 | } else { |
249 | // TODO: Verify for stack layout for SysV |
250 | if (sp == 0) { |
251 | // Read the stack pointer if we already haven't read it |
252 | sp = reg_ctx->GetSP(fail_value: 0); |
253 | if (sp == 0) |
254 | return false; |
255 | } |
256 | |
257 | // Arguments 5 on up are on the stack |
258 | const uint32_t arg_byte_size = (bit_width + (8 - 1)) / 8; |
259 | Status error; |
260 | if (!exe_ctx.GetProcessRef().ReadScalarIntegerFromMemory( |
261 | addr: sp, byte_size: arg_byte_size, is_signed, scalar&: value->GetScalar(), error)) |
262 | return false; |
263 | |
264 | sp += arg_byte_size; |
265 | // Align up to the next 8 byte boundary if needed |
266 | if (sp % 8) { |
267 | sp >>= 3; |
268 | sp += 1; |
269 | sp <<= 3; |
270 | } |
271 | } |
272 | } |
273 | } |
274 | } |
275 | return true; |
276 | } |
277 | |
278 | Status ABISysV_arm64::SetReturnValueObject(lldb::StackFrameSP &frame_sp, |
279 | lldb::ValueObjectSP &new_value_sp) { |
280 | Status error; |
281 | if (!new_value_sp) { |
282 | error = Status::FromErrorString(str: "Empty value object for return value." ); |
283 | return error; |
284 | } |
285 | |
286 | CompilerType return_value_type = new_value_sp->GetCompilerType(); |
287 | if (!return_value_type) { |
288 | error = Status::FromErrorString(str: "Null clang type for return value." ); |
289 | return error; |
290 | } |
291 | |
292 | Thread *thread = frame_sp->GetThread().get(); |
293 | |
294 | RegisterContext *reg_ctx = thread->GetRegisterContext().get(); |
295 | |
296 | if (reg_ctx) { |
297 | DataExtractor data; |
298 | Status data_error; |
299 | const uint64_t byte_size = new_value_sp->GetData(data, error&: data_error); |
300 | if (data_error.Fail()) { |
301 | error = Status::FromErrorStringWithFormat( |
302 | format: "Couldn't convert return value to raw data: %s" , |
303 | data_error.AsCString()); |
304 | return error; |
305 | } |
306 | |
307 | const uint32_t type_flags = return_value_type.GetTypeInfo(pointee_or_element_compiler_type: nullptr); |
308 | if (type_flags & eTypeIsScalar || type_flags & eTypeIsPointer) { |
309 | if (type_flags & eTypeIsInteger || type_flags & eTypeIsPointer) { |
310 | // Extract the register context so we can read arguments from registers |
311 | lldb::offset_t offset = 0; |
312 | if (byte_size <= 16) { |
313 | const RegisterInfo *x0_info = reg_ctx->GetRegisterInfo( |
314 | reg_kind: eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); |
315 | if (byte_size <= 8) { |
316 | uint64_t raw_value = data.GetMaxU64(offset_ptr: &offset, byte_size); |
317 | |
318 | if (!reg_ctx->WriteRegisterFromUnsigned(reg_info: x0_info, uval: raw_value)) |
319 | error = Status::FromErrorString(str: "failed to write register x0" ); |
320 | } else { |
321 | uint64_t raw_value = data.GetMaxU64(offset_ptr: &offset, byte_size: 8); |
322 | |
323 | if (reg_ctx->WriteRegisterFromUnsigned(reg_info: x0_info, uval: raw_value)) { |
324 | const RegisterInfo *x1_info = reg_ctx->GetRegisterInfo( |
325 | reg_kind: eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2); |
326 | raw_value = data.GetMaxU64(offset_ptr: &offset, byte_size: byte_size - offset); |
327 | |
328 | if (!reg_ctx->WriteRegisterFromUnsigned(reg_info: x1_info, uval: raw_value)) |
329 | error = Status::FromErrorString(str: "failed to write register x1" ); |
330 | } |
331 | } |
332 | } else { |
333 | error = Status::FromErrorString( |
334 | str: "We don't support returning longer than 128 bit " |
335 | "integer values at present." ); |
336 | } |
337 | } else if (type_flags & eTypeIsFloat) { |
338 | if (type_flags & eTypeIsComplex) { |
339 | // Don't handle complex yet. |
340 | error = Status::FromErrorString( |
341 | str: "returning complex float values are not supported" ); |
342 | } else { |
343 | const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName(reg_name: "v0" , start_idx: 0); |
344 | |
345 | if (v0_info) { |
346 | if (byte_size <= 16) { |
347 | RegisterValue reg_value; |
348 | error = reg_value.SetValueFromData(reg_info: *v0_info, data, offset: 0, partial_data_ok: true); |
349 | if (error.Success()) |
350 | if (!reg_ctx->WriteRegister(reg_info: v0_info, reg_value)) |
351 | error = |
352 | Status::FromErrorString(str: "failed to write register v0" ); |
353 | } else { |
354 | error = Status::FromErrorString( |
355 | str: "returning float values longer than 128 " |
356 | "bits are not supported" ); |
357 | } |
358 | } else |
359 | error = Status::FromErrorString( |
360 | str: "v0 register is not available on this target" ); |
361 | } |
362 | } |
363 | } else if (type_flags & eTypeIsVector) { |
364 | if (byte_size > 0) { |
365 | const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName(reg_name: "v0" , start_idx: 0); |
366 | |
367 | if (v0_info) { |
368 | if (byte_size <= v0_info->byte_size) { |
369 | RegisterValue reg_value; |
370 | error = reg_value.SetValueFromData(reg_info: *v0_info, data, offset: 0, partial_data_ok: true); |
371 | if (error.Success()) { |
372 | if (!reg_ctx->WriteRegister(reg_info: v0_info, reg_value)) |
373 | error = Status::FromErrorString(str: "failed to write register v0" ); |
374 | } |
375 | } |
376 | } |
377 | } |
378 | } |
379 | } else { |
380 | error = Status::FromErrorString(str: "no registers are available" ); |
381 | } |
382 | |
383 | return error; |
384 | } |
385 | |
386 | // AAPCS64 (Procedure Call Standard for the ARM 64-bit Architecture) says |
387 | // registers x19 through x28 and sp are callee preserved. v8-v15 are non- |
388 | // volatile (and specifically only the lower 8 bytes of these regs), the rest |
389 | // of the fp/SIMD registers are volatile. |
390 | |
391 | // We treat x29 as callee preserved also, else the unwinder won't try to |
392 | // retrieve fp saves. |
393 | |
394 | bool ABISysV_arm64::RegisterIsVolatile(const RegisterInfo *reg_info) { |
395 | if (reg_info) { |
396 | const char *name = reg_info->name; |
397 | |
398 | // Sometimes we'll be called with the "alternate" name for these registers; |
399 | // recognize them as non-volatile. |
400 | |
401 | if (name[0] == 'p' && name[1] == 'c') // pc |
402 | return false; |
403 | if (name[0] == 'f' && name[1] == 'p') // fp |
404 | return false; |
405 | if (name[0] == 's' && name[1] == 'p') // sp |
406 | return false; |
407 | if (name[0] == 'l' && name[1] == 'r') // lr |
408 | return false; |
409 | |
410 | if (name[0] == 'x' || name[0] == 'r') { |
411 | // Volatile registers: x0-x18 |
412 | // Although documentation says only x19-28 + sp are callee saved We ll |
413 | // also have to treat x30 as non-volatile. Each dwarf frame has its own |
414 | // value of lr. Return false for the non-volatile gpr regs, true for |
415 | // everything else |
416 | switch (name[1]) { |
417 | case '1': |
418 | switch (name[2]) { |
419 | case '9': |
420 | return false; // x19 is non-volatile |
421 | default: |
422 | return true; |
423 | } |
424 | break; |
425 | case '2': |
426 | switch (name[2]) { |
427 | case '0': |
428 | case '1': |
429 | case '2': |
430 | case '3': |
431 | case '4': |
432 | case '5': |
433 | case '6': |
434 | case '7': |
435 | case '8': |
436 | return false; // x20 - 28 are non-volatile |
437 | case '9': |
438 | return false; // x29 aka fp treat as non-volatile |
439 | default: |
440 | return true; |
441 | } |
442 | case '3': // x30 (lr) and x31 (sp) treat as non-volatile |
443 | if (name[2] == '0' || name[2] == '1') |
444 | return false; |
445 | break; |
446 | default: |
447 | return true; // all volatile cases not handled above fall here. |
448 | } |
449 | } else if (name[0] == 'v' || name[0] == 's' || name[0] == 'd') { |
450 | // Volatile registers: v0-7, v16-v31 |
451 | // Return false for non-volatile fp/SIMD regs, true for everything else |
452 | switch (name[1]) { |
453 | case '8': |
454 | case '9': |
455 | return false; // v8-v9 are non-volatile |
456 | case '1': |
457 | switch (name[2]) { |
458 | case '0': |
459 | case '1': |
460 | case '2': |
461 | case '3': |
462 | case '4': |
463 | case '5': |
464 | return false; // v10-v15 are non-volatile |
465 | default: |
466 | return true; |
467 | } |
468 | default: |
469 | return true; |
470 | } |
471 | } |
472 | } |
473 | return true; |
474 | } |
475 | |
476 | static bool ( |
477 | ExecutionContext &exe_ctx, RegisterContext *reg_ctx, |
478 | const CompilerType &value_type, |
479 | bool is_return_value, // false => parameter, true => return value |
480 | uint32_t &NGRN, // NGRN (see ABI documentation) |
481 | uint32_t &NSRN, // NSRN (see ABI documentation) |
482 | DataExtractor &data) { |
483 | std::optional<uint64_t> byte_size = llvm::expectedToOptional( |
484 | E: value_type.GetByteSize(exe_scope: exe_ctx.GetBestExecutionContextScope())); |
485 | |
486 | if (byte_size || *byte_size == 0) |
487 | return false; |
488 | |
489 | std::unique_ptr<DataBufferHeap> heap_data_up( |
490 | new DataBufferHeap(*byte_size, 0)); |
491 | const ByteOrder byte_order = exe_ctx.GetProcessRef().GetByteOrder(); |
492 | Status error; |
493 | |
494 | CompilerType base_type; |
495 | const uint32_t homogeneous_count = |
496 | value_type.IsHomogeneousAggregate(base_type_ptr: &base_type); |
497 | if (homogeneous_count > 0 && homogeneous_count <= 8) { |
498 | // Make sure we have enough registers |
499 | if (NSRN < 8 && (8 - NSRN) >= homogeneous_count) { |
500 | if (!base_type) |
501 | return false; |
502 | std::optional<uint64_t> base_byte_size = llvm::expectedToOptional( |
503 | E: base_type.GetByteSize(exe_scope: exe_ctx.GetBestExecutionContextScope())); |
504 | if (!base_byte_size) |
505 | return false; |
506 | uint32_t data_offset = 0; |
507 | |
508 | for (uint32_t i = 0; i < homogeneous_count; ++i) { |
509 | char v_name[8]; |
510 | ::snprintf(s: v_name, maxlen: sizeof(v_name), format: "v%u" , NSRN); |
511 | const RegisterInfo *reg_info = |
512 | reg_ctx->GetRegisterInfoByName(reg_name: v_name, start_idx: 0); |
513 | if (reg_info == nullptr) |
514 | return false; |
515 | |
516 | if (*base_byte_size > reg_info->byte_size) |
517 | return false; |
518 | |
519 | RegisterValue reg_value; |
520 | |
521 | if (!reg_ctx->ReadRegister(reg_info, reg_value)) |
522 | return false; |
523 | |
524 | // Make sure we have enough room in "heap_data_up" |
525 | if ((data_offset + *base_byte_size) <= heap_data_up->GetByteSize()) { |
526 | const size_t bytes_copied = reg_value.GetAsMemoryData( |
527 | reg_info: *reg_info, dst: heap_data_up->GetBytes() + data_offset, |
528 | dst_len: *base_byte_size, dst_byte_order: byte_order, error); |
529 | if (bytes_copied != *base_byte_size) |
530 | return false; |
531 | data_offset += bytes_copied; |
532 | ++NSRN; |
533 | } else |
534 | return false; |
535 | } |
536 | data.SetByteOrder(byte_order); |
537 | data.SetAddressByteSize(exe_ctx.GetProcessRef().GetAddressByteSize()); |
538 | data.SetData(data_sp: DataBufferSP(heap_data_up.release())); |
539 | return true; |
540 | } |
541 | } |
542 | |
543 | const size_t max_reg_byte_size = 16; |
544 | if (*byte_size <= max_reg_byte_size) { |
545 | size_t bytes_left = *byte_size; |
546 | uint32_t data_offset = 0; |
547 | while (data_offset < *byte_size) { |
548 | if (NGRN >= 8) |
549 | return false; |
550 | |
551 | const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo( |
552 | reg_kind: eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + NGRN); |
553 | if (reg_info == nullptr) |
554 | return false; |
555 | |
556 | RegisterValue reg_value; |
557 | |
558 | if (!reg_ctx->ReadRegister(reg_info, reg_value)) |
559 | return false; |
560 | |
561 | const size_t curr_byte_size = std::min<size_t>(a: 8, b: bytes_left); |
562 | const size_t bytes_copied = reg_value.GetAsMemoryData( |
563 | reg_info: *reg_info, dst: heap_data_up->GetBytes() + data_offset, dst_len: curr_byte_size, |
564 | dst_byte_order: byte_order, error); |
565 | if (bytes_copied == 0) |
566 | return false; |
567 | if (bytes_copied >= bytes_left) |
568 | break; |
569 | data_offset += bytes_copied; |
570 | bytes_left -= bytes_copied; |
571 | ++NGRN; |
572 | } |
573 | } else { |
574 | const RegisterInfo *reg_info = nullptr; |
575 | if (is_return_value) { |
576 | // The SysV arm64 ABI doesn't require you to write the return location |
577 | // back to x8 before returning from the function the way the x86_64 ABI |
578 | // does. It looks like all the users of this ABI currently choose not to |
579 | // do that, and so we can't reconstruct stack based returns on exit |
580 | // from the function. |
581 | return false; |
582 | } else { |
583 | // We are assuming we are stopped at the first instruction in a function |
584 | // and that the ABI is being respected so all parameters appear where |
585 | // they should be (functions with no external linkage can legally violate |
586 | // the ABI). |
587 | if (NGRN >= 8) |
588 | return false; |
589 | |
590 | reg_info = reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
591 | LLDB_REGNUM_GENERIC_ARG1 + NGRN); |
592 | if (reg_info == nullptr) |
593 | return false; |
594 | ++NGRN; |
595 | } |
596 | |
597 | const lldb::addr_t value_addr = |
598 | reg_ctx->ReadRegisterAsUnsigned(reg_info, LLDB_INVALID_ADDRESS); |
599 | |
600 | if (value_addr == LLDB_INVALID_ADDRESS) |
601 | return false; |
602 | |
603 | if (exe_ctx.GetProcessRef().ReadMemory( |
604 | vm_addr: value_addr, buf: heap_data_up->GetBytes(), size: heap_data_up->GetByteSize(), |
605 | error) != heap_data_up->GetByteSize()) { |
606 | return false; |
607 | } |
608 | } |
609 | |
610 | data.SetByteOrder(byte_order); |
611 | data.SetAddressByteSize(exe_ctx.GetProcessRef().GetAddressByteSize()); |
612 | data.SetData(data_sp: DataBufferSP(heap_data_up.release())); |
613 | return true; |
614 | } |
615 | |
616 | ValueObjectSP ABISysV_arm64::GetReturnValueObjectImpl( |
617 | Thread &thread, CompilerType &return_compiler_type) const { |
618 | ValueObjectSP return_valobj_sp; |
619 | Value value; |
620 | |
621 | ExecutionContext exe_ctx(thread.shared_from_this()); |
622 | if (exe_ctx.GetTargetPtr() == nullptr || exe_ctx.GetProcessPtr() == nullptr) |
623 | return return_valobj_sp; |
624 | |
625 | // value.SetContext (Value::eContextTypeClangType, return_compiler_type); |
626 | value.SetCompilerType(return_compiler_type); |
627 | |
628 | RegisterContext *reg_ctx = thread.GetRegisterContext().get(); |
629 | if (!reg_ctx) |
630 | return return_valobj_sp; |
631 | |
632 | std::optional<uint64_t> byte_size = |
633 | llvm::expectedToOptional(E: return_compiler_type.GetByteSize(exe_scope: &thread)); |
634 | if (!byte_size) |
635 | return return_valobj_sp; |
636 | |
637 | const uint32_t type_flags = return_compiler_type.GetTypeInfo(pointee_or_element_compiler_type: nullptr); |
638 | if (type_flags & eTypeIsScalar || type_flags & eTypeIsPointer) { |
639 | value.SetValueType(Value::ValueType::Scalar); |
640 | |
641 | bool success = false; |
642 | if (type_flags & eTypeIsInteger || type_flags & eTypeIsPointer) { |
643 | // Extract the register context so we can read arguments from registers |
644 | if (*byte_size <= 8) { |
645 | const RegisterInfo *x0_reg_info = nullptr; |
646 | x0_reg_info = reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
647 | LLDB_REGNUM_GENERIC_ARG1); |
648 | if (x0_reg_info) { |
649 | uint64_t raw_value = |
650 | thread.GetRegisterContext()->ReadRegisterAsUnsigned(reg_info: x0_reg_info, |
651 | fail_value: 0); |
652 | const bool is_signed = (type_flags & eTypeIsSigned) != 0; |
653 | switch (*byte_size) { |
654 | default: |
655 | break; |
656 | case 16: // uint128_t |
657 | // In register x0 and x1 |
658 | { |
659 | const RegisterInfo *x1_reg_info = nullptr; |
660 | x1_reg_info = reg_ctx->GetRegisterInfo(reg_kind: eRegisterKindGeneric, |
661 | LLDB_REGNUM_GENERIC_ARG2); |
662 | |
663 | if (x1_reg_info) { |
664 | if (*byte_size <= |
665 | x0_reg_info->byte_size + x1_reg_info->byte_size) { |
666 | std::unique_ptr<DataBufferHeap> heap_data_up( |
667 | new DataBufferHeap(*byte_size, 0)); |
668 | const ByteOrder byte_order = |
669 | exe_ctx.GetProcessRef().GetByteOrder(); |
670 | RegisterValue x0_reg_value; |
671 | RegisterValue x1_reg_value; |
672 | if (reg_ctx->ReadRegister(reg_info: x0_reg_info, reg_value&: x0_reg_value) && |
673 | reg_ctx->ReadRegister(reg_info: x1_reg_info, reg_value&: x1_reg_value)) { |
674 | Status error; |
675 | if (x0_reg_value.GetAsMemoryData( |
676 | reg_info: *x0_reg_info, dst: heap_data_up->GetBytes() + 0, dst_len: 8, |
677 | dst_byte_order: byte_order, error) && |
678 | x1_reg_value.GetAsMemoryData( |
679 | reg_info: *x1_reg_info, dst: heap_data_up->GetBytes() + 8, dst_len: 8, |
680 | dst_byte_order: byte_order, error)) { |
681 | DataExtractor data( |
682 | DataBufferSP(heap_data_up.release()), byte_order, |
683 | exe_ctx.GetProcessRef().GetAddressByteSize()); |
684 | |
685 | return_valobj_sp = ValueObjectConstResult::Create( |
686 | exe_scope: &thread, compiler_type: return_compiler_type, name: ConstString("" ), data); |
687 | return return_valobj_sp; |
688 | } |
689 | } |
690 | } |
691 | } |
692 | } |
693 | break; |
694 | case sizeof(uint64_t): |
695 | if (is_signed) |
696 | value.GetScalar() = (int64_t)(raw_value); |
697 | else |
698 | value.GetScalar() = (uint64_t)(raw_value); |
699 | success = true; |
700 | break; |
701 | |
702 | case sizeof(uint32_t): |
703 | if (is_signed) |
704 | value.GetScalar() = (int32_t)(raw_value & UINT32_MAX); |
705 | else |
706 | value.GetScalar() = (uint32_t)(raw_value & UINT32_MAX); |
707 | success = true; |
708 | break; |
709 | |
710 | case sizeof(uint16_t): |
711 | if (is_signed) |
712 | value.GetScalar() = (int16_t)(raw_value & UINT16_MAX); |
713 | else |
714 | value.GetScalar() = (uint16_t)(raw_value & UINT16_MAX); |
715 | success = true; |
716 | break; |
717 | |
718 | case sizeof(uint8_t): |
719 | if (is_signed) |
720 | value.GetScalar() = (int8_t)(raw_value & UINT8_MAX); |
721 | else |
722 | value.GetScalar() = (uint8_t)(raw_value & UINT8_MAX); |
723 | success = true; |
724 | break; |
725 | } |
726 | } |
727 | } |
728 | } else if (type_flags & eTypeIsFloat) { |
729 | if (type_flags & eTypeIsComplex) { |
730 | // Don't handle complex yet. |
731 | } else { |
732 | if (*byte_size <= sizeof(long double)) { |
733 | const RegisterInfo *v0_reg_info = |
734 | reg_ctx->GetRegisterInfoByName(reg_name: "v0" , start_idx: 0); |
735 | RegisterValue v0_value; |
736 | if (reg_ctx->ReadRegister(reg_info: v0_reg_info, reg_value&: v0_value)) { |
737 | DataExtractor data; |
738 | if (v0_value.GetData(data)) { |
739 | lldb::offset_t offset = 0; |
740 | if (*byte_size == sizeof(float)) { |
741 | value.GetScalar() = data.GetFloat(offset_ptr: &offset); |
742 | success = true; |
743 | } else if (*byte_size == sizeof(double)) { |
744 | value.GetScalar() = data.GetDouble(offset_ptr: &offset); |
745 | success = true; |
746 | } else if (*byte_size == sizeof(long double)) { |
747 | value.GetScalar() = data.GetLongDouble(offset_ptr: &offset); |
748 | success = true; |
749 | } |
750 | } |
751 | } |
752 | } |
753 | } |
754 | } |
755 | |
756 | if (success) |
757 | return_valobj_sp = ValueObjectConstResult::Create( |
758 | exe_scope: thread.GetStackFrameAtIndex(idx: 0).get(), value, name: ConstString("" )); |
759 | } else if (type_flags & eTypeIsVector && *byte_size <= 16) { |
760 | if (*byte_size > 0) { |
761 | const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName(reg_name: "v0" , start_idx: 0); |
762 | |
763 | if (v0_info) { |
764 | std::unique_ptr<DataBufferHeap> heap_data_up( |
765 | new DataBufferHeap(*byte_size, 0)); |
766 | const ByteOrder byte_order = exe_ctx.GetProcessRef().GetByteOrder(); |
767 | RegisterValue reg_value; |
768 | if (reg_ctx->ReadRegister(reg_info: v0_info, reg_value)) { |
769 | Status error; |
770 | if (reg_value.GetAsMemoryData(reg_info: *v0_info, dst: heap_data_up->GetBytes(), |
771 | dst_len: heap_data_up->GetByteSize(), dst_byte_order: byte_order, |
772 | error)) { |
773 | DataExtractor data(DataBufferSP(heap_data_up.release()), byte_order, |
774 | exe_ctx.GetProcessRef().GetAddressByteSize()); |
775 | return_valobj_sp = ValueObjectConstResult::Create( |
776 | exe_scope: &thread, compiler_type: return_compiler_type, name: ConstString("" ), data); |
777 | } |
778 | } |
779 | } |
780 | } |
781 | } else if (type_flags & eTypeIsStructUnion || type_flags & eTypeIsClass || |
782 | (type_flags & eTypeIsVector && *byte_size > 16)) { |
783 | DataExtractor data; |
784 | |
785 | uint32_t NGRN = 0; // Search ABI docs for NGRN |
786 | uint32_t NSRN = 0; // Search ABI docs for NSRN |
787 | const bool is_return_value = true; |
788 | if (LoadValueFromConsecutiveGPRRegisters( |
789 | exe_ctx, reg_ctx, value_type: return_compiler_type, is_return_value, NGRN, NSRN, |
790 | data)) { |
791 | return_valobj_sp = ValueObjectConstResult::Create( |
792 | exe_scope: &thread, compiler_type: return_compiler_type, name: ConstString("" ), data); |
793 | } |
794 | } |
795 | return return_valobj_sp; |
796 | } |
797 | |
798 | lldb::addr_t ABISysV_arm64::FixAddress(addr_t pc, addr_t mask) { |
799 | if (mask == LLDB_INVALID_ADDRESS_MASK) |
800 | return pc; |
801 | lldb::addr_t pac_sign_extension = 0x0080000000000000ULL; |
802 | return (pc & pac_sign_extension) ? pc | mask : pc & (~mask); |
803 | } |
804 | |
805 | // Reads code or data address mask for the current Linux process. |
806 | static lldb::addr_t ReadLinuxProcessAddressMask(lldb::ProcessSP process_sp, |
807 | llvm::StringRef reg_name) { |
808 | // LLDB_INVALID_ADDRESS_MASK means there isn't a mask or it has not been read |
809 | // yet. We do not return the top byte mask unless thread_sp is valid. This |
810 | // prevents calls to this function before the thread is setup locking in the |
811 | // value to just the top byte mask, in cases where pointer authentication |
812 | // might also be active. |
813 | uint64_t address_mask = LLDB_INVALID_ADDRESS_MASK; |
814 | lldb::ThreadSP thread_sp = process_sp->GetThreadList().GetSelectedThread(); |
815 | if (thread_sp) { |
816 | // Linux configures user-space virtual addresses with top byte ignored. |
817 | // We set default value of mask such that top byte is masked out. |
818 | address_mask = ~((1ULL << 56) - 1); |
819 | // If Pointer Authentication feature is enabled then Linux exposes |
820 | // PAC data and code mask register. Try reading relevant register |
821 | // below and merge it with default address mask calculated above. |
822 | lldb::RegisterContextSP reg_ctx_sp = thread_sp->GetRegisterContext(); |
823 | if (reg_ctx_sp) { |
824 | const RegisterInfo *reg_info = |
825 | reg_ctx_sp->GetRegisterInfoByName(reg_name, start_idx: 0); |
826 | if (reg_info) { |
827 | lldb::addr_t mask_reg_val = reg_ctx_sp->ReadRegisterAsUnsigned( |
828 | reg: reg_info->kinds[eRegisterKindLLDB], LLDB_INVALID_ADDRESS); |
829 | if (mask_reg_val != LLDB_INVALID_ADDRESS) |
830 | address_mask |= mask_reg_val; |
831 | } |
832 | } |
833 | } |
834 | return address_mask; |
835 | } |
836 | |
837 | lldb::addr_t ABISysV_arm64::FixCodeAddress(lldb::addr_t pc) { |
838 | if (lldb::ProcessSP process_sp = GetProcessSP()) { |
839 | if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSLinux() && |
840 | process_sp->GetCodeAddressMask() == LLDB_INVALID_ADDRESS_MASK) |
841 | process_sp->SetCodeAddressMask( |
842 | ReadLinuxProcessAddressMask(process_sp, reg_name: "code_mask" )); |
843 | |
844 | // b55 is the highest bit outside TBI (if it's enabled), use |
845 | // it to determine if the high bits are set to 0 or 1. |
846 | const addr_t pac_sign_extension = 0x0080000000000000ULL; |
847 | addr_t mask = process_sp->GetCodeAddressMask(); |
848 | // Test if the high memory mask has been overriden separately |
849 | if (pc & pac_sign_extension && |
850 | process_sp->GetHighmemCodeAddressMask() != LLDB_INVALID_ADDRESS_MASK) |
851 | mask = process_sp->GetHighmemCodeAddressMask(); |
852 | |
853 | return FixAddress(pc, mask); |
854 | } |
855 | return pc; |
856 | } |
857 | |
858 | lldb::addr_t ABISysV_arm64::FixDataAddress(lldb::addr_t pc) { |
859 | if (lldb::ProcessSP process_sp = GetProcessSP()) { |
860 | if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSLinux() && |
861 | process_sp->GetDataAddressMask() == LLDB_INVALID_ADDRESS_MASK) |
862 | process_sp->SetDataAddressMask( |
863 | ReadLinuxProcessAddressMask(process_sp, reg_name: "data_mask" )); |
864 | |
865 | // b55 is the highest bit outside TBI (if it's enabled), use |
866 | // it to determine if the high bits are set to 0 or 1. |
867 | const addr_t pac_sign_extension = 0x0080000000000000ULL; |
868 | addr_t mask = process_sp->GetDataAddressMask(); |
869 | // Test if the high memory mask has been overriden separately |
870 | if (pc & pac_sign_extension && |
871 | process_sp->GetHighmemDataAddressMask() != LLDB_INVALID_ADDRESS_MASK) |
872 | mask = process_sp->GetHighmemDataAddressMask(); |
873 | |
874 | return FixAddress(pc, mask); |
875 | } |
876 | return pc; |
877 | } |
878 | |
879 | void ABISysV_arm64::Initialize() { |
880 | PluginManager::RegisterPlugin(name: GetPluginNameStatic(), |
881 | description: "SysV ABI for AArch64 targets" , create_callback: CreateInstance); |
882 | } |
883 | |
884 | void ABISysV_arm64::Terminate() { |
885 | PluginManager::UnregisterPlugin(create_callback: CreateInstance); |
886 | } |
887 | |