1//===-- EmulateInstructionMIPS64.h ------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H
10#define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H
11
12#include "lldb/Core/EmulateInstruction.h"
13#include "lldb/Interpreter/OptionValue.h"
14#include "lldb/Utility/Status.h"
15#include <optional>
16
17namespace llvm {
18class MCDisassembler;
19class MCSubtargetInfo;
20class MCRegisterInfo;
21class MCAsmInfo;
22class MCContext;
23class MCInstrInfo;
24class MCInst;
25} // namespace llvm
26
27class EmulateInstructionMIPS64 : public lldb_private::EmulateInstruction {
28public:
29 EmulateInstructionMIPS64(const lldb_private::ArchSpec &arch);
30
31 static void Initialize();
32
33 static void Terminate();
34
35 static llvm::StringRef GetPluginNameStatic() { return "mips64"; }
36
37 static llvm::StringRef GetPluginDescriptionStatic();
38
39 static lldb_private::EmulateInstruction *
40 CreateInstance(const lldb_private::ArchSpec &arch,
41 lldb_private::InstructionType inst_type);
42
43 static bool SupportsEmulatingInstructionsOfTypeStatic(
44 lldb_private::InstructionType inst_type) {
45 switch (inst_type) {
46 case lldb_private::eInstructionTypeAny:
47 case lldb_private::eInstructionTypePrologueEpilogue:
48 case lldb_private::eInstructionTypePCModifying:
49 return true;
50
51 case lldb_private::eInstructionTypeAll:
52 return false;
53 }
54 return false;
55 }
56
57 llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
58
59 bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
60
61 bool SupportsEmulatingInstructionsOfType(
62 lldb_private::InstructionType inst_type) override {
63 return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
64 }
65
66 bool ReadInstruction() override;
67
68 bool EvaluateInstruction(uint32_t evaluate_options) override;
69
70 bool TestEmulation(lldb_private::Stream &out_stream,
71 lldb_private::ArchSpec &arch,
72 lldb_private::OptionValueDictionary *test_data) override {
73 return false;
74 }
75
76 std::optional<lldb_private::RegisterInfo>
77 GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
78
79 bool
80 CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
81
82protected:
83 typedef struct {
84 const char *op_name;
85 bool (EmulateInstructionMIPS64::*callback)(llvm::MCInst &insn);
86 const char *insn_name;
87 } MipsOpcode;
88
89 static MipsOpcode *GetOpcodeForInstruction(llvm::StringRef op_name);
90
91 bool Emulate_DADDiu(llvm::MCInst &insn);
92
93 bool Emulate_DSUBU_DADDU(llvm::MCInst &insn);
94
95 bool Emulate_LUI(llvm::MCInst &insn);
96
97 bool Emulate_SD(llvm::MCInst &insn);
98
99 bool Emulate_LD(llvm::MCInst &insn);
100
101 bool Emulate_LDST_Imm(llvm::MCInst &insn);
102
103 bool Emulate_LDST_Reg(llvm::MCInst &insn);
104
105 bool Emulate_BXX_3ops(llvm::MCInst &insn);
106
107 bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
108
109 bool Emulate_BXX_2ops(llvm::MCInst &insn);
110
111 bool Emulate_BXX_2ops_C(llvm::MCInst &insn);
112
113 bool Emulate_Bcond_Link_C(llvm::MCInst &insn);
114
115 bool Emulate_Bcond_Link(llvm::MCInst &insn);
116
117 bool Emulate_FP_branch(llvm::MCInst &insn);
118
119 bool Emulate_3D_branch(llvm::MCInst &insn);
120
121 bool Emulate_BAL(llvm::MCInst &insn);
122
123 bool Emulate_BALC(llvm::MCInst &insn);
124
125 bool Emulate_BC(llvm::MCInst &insn);
126
127 bool Emulate_J(llvm::MCInst &insn);
128
129 bool Emulate_JAL(llvm::MCInst &insn);
130
131 bool Emulate_JALR(llvm::MCInst &insn);
132
133 bool Emulate_JIALC(llvm::MCInst &insn);
134
135 bool Emulate_JIC(llvm::MCInst &insn);
136
137 bool Emulate_JR(llvm::MCInst &insn);
138
139 bool Emulate_BC1EQZ(llvm::MCInst &insn);
140
141 bool Emulate_BC1NEZ(llvm::MCInst &insn);
142
143 bool Emulate_BNZB(llvm::MCInst &insn);
144
145 bool Emulate_BNZH(llvm::MCInst &insn);
146
147 bool Emulate_BNZW(llvm::MCInst &insn);
148
149 bool Emulate_BNZD(llvm::MCInst &insn);
150
151 bool Emulate_BZB(llvm::MCInst &insn);
152
153 bool Emulate_BZH(llvm::MCInst &insn);
154
155 bool Emulate_BZW(llvm::MCInst &insn);
156
157 bool Emulate_BZD(llvm::MCInst &insn);
158
159 bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size,
160 bool bnz);
161
162 bool Emulate_BNZV(llvm::MCInst &insn);
163
164 bool Emulate_BZV(llvm::MCInst &insn);
165
166 bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz);
167
168 bool nonvolatile_reg_p(uint64_t regnum);
169
170 const char *GetRegisterName(unsigned reg_num, bool alternate_name);
171
172private:
173 std::unique_ptr<llvm::MCDisassembler> m_disasm;
174 std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info;
175 std::unique_ptr<llvm::MCRegisterInfo> m_reg_info;
176 std::unique_ptr<llvm::MCAsmInfo> m_asm_info;
177 std::unique_ptr<llvm::MCContext> m_context;
178 std::unique_ptr<llvm::MCInstrInfo> m_insn_info;
179};
180
181#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H
182

source code of lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h