1 | //===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the interfaces that ARC uses to lower LLVM code into a |
10 | // selection DAG. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H |
15 | #define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H |
16 | |
17 | #include "ARC.h" |
18 | #include "llvm/CodeGen/SelectionDAG.h" |
19 | #include "llvm/CodeGen/TargetLowering.h" |
20 | |
21 | namespace llvm { |
22 | |
23 | // Forward delcarations |
24 | class ARCSubtarget; |
25 | class ARCTargetMachine; |
26 | |
27 | namespace ARCISD { |
28 | |
29 | enum NodeType : unsigned { |
30 | // Start the numbering where the builtin ops and target ops leave off. |
31 | FIRST_NUMBER = ISD::BUILTIN_OP_END, |
32 | |
33 | // Branch and link (call) |
34 | BL, |
35 | |
36 | // Jump and link (indirect call) |
37 | JL, |
38 | |
39 | // CMP |
40 | CMP, |
41 | |
42 | // CMOV |
43 | CMOV, |
44 | |
45 | // BRcc |
46 | BRcc, |
47 | |
48 | // Global Address Wrapper |
49 | GAWRAPPER, |
50 | |
51 | // return, (j_s [blink]) |
52 | RET |
53 | }; |
54 | |
55 | } // end namespace ARCISD |
56 | |
57 | //===--------------------------------------------------------------------===// |
58 | // TargetLowering Implementation |
59 | //===--------------------------------------------------------------------===// |
60 | class ARCTargetLowering : public TargetLowering { |
61 | public: |
62 | explicit ARCTargetLowering(const TargetMachine &TM, |
63 | const ARCSubtarget &Subtarget); |
64 | |
65 | /// Provide custom lowering hooks for some operations. |
66 | SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; |
67 | |
68 | /// This method returns the name of a target specific DAG node. |
69 | const char *getTargetNodeName(unsigned Opcode) const override; |
70 | |
71 | /// Return true if the addressing mode represented by AM is legal for this |
72 | /// target, for a load/store of the specified type. |
73 | bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, |
74 | unsigned AS, |
75 | Instruction *I = nullptr) const override; |
76 | |
77 | private: |
78 | const ARCSubtarget &Subtarget; |
79 | |
80 | void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, |
81 | SelectionDAG &DAG) const override; |
82 | |
83 | // Lower Operand helpers |
84 | SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv, |
85 | bool isVarArg, |
86 | const SmallVectorImpl<ISD::InputArg> &Ins, |
87 | SDLoc dl, SelectionDAG &DAG, |
88 | SmallVectorImpl<SDValue> &InVals) const; |
89 | // Lower Operand specifics |
90 | SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; |
91 | SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; |
92 | SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; |
93 | SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; |
94 | SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; |
95 | SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; |
96 | SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; |
97 | |
98 | SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, |
99 | bool isVarArg, |
100 | const SmallVectorImpl<ISD::InputArg> &Ins, |
101 | const SDLoc &dl, SelectionDAG &DAG, |
102 | SmallVectorImpl<SDValue> &InVals) const override; |
103 | |
104 | SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, |
105 | SmallVectorImpl<SDValue> &InVals) const override; |
106 | |
107 | SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, |
108 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
109 | const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, |
110 | SelectionDAG &DAG) const override; |
111 | |
112 | bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, |
113 | bool isVarArg, |
114 | const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, |
115 | LLVMContext &Context) const override; |
116 | |
117 | bool mayBeEmittedAsTailCall(const CallInst *CI) const override; |
118 | }; |
119 | |
120 | } // end namespace llvm |
121 | |
122 | #endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H |
123 | |