1/* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2023 Free Software Foundation, Inc.
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 3, or (at your option)
9any later version.
10
11GCC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
19
20#define IN_TARGET_CODE 1
21
22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
25#include "target.h"
26#include "c-family/c-common.h"
27#include "memmodel.h"
28#include "tm_p.h"
29#include "c-family/c-pragma.h"
30
31static bool ix86_pragma_target_parse (tree, tree);
32static void ix86_target_macros_internal
33 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
34 void (*def_or_undef) (cpp_reader *, const char *));
35
36/* Internal function to either define or undef the appropriate system
37 macros. */
38static void
39ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
40 HOST_WIDE_INT isa_flag2,
41 enum processor_type arch,
42 enum processor_type tune,
43 enum fpmath_unit fpmath,
44 void (*def_or_undef) (cpp_reader *,
45 const char *))
46{
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len = strlen (ix86_arch_string);
50 size_t tune_len = strlen (ix86_tune_string);
51 int last_arch_char = ix86_arch_string[arch_len - 1];
52 int last_tune_char = ix86_tune_string[tune_len - 1];
53
54 /* Built-ins based on -march=. */
55 switch (arch)
56 {
57 case PROCESSOR_I386:
58 break;
59 case PROCESSOR_I486:
60 def_or_undef (parse_in, "__i486");
61 def_or_undef (parse_in, "__i486__");
62 break;
63 case PROCESSOR_LAKEMONT:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM:
66 def_or_undef (parse_in, "__i586");
67 def_or_undef (parse_in, "__i586__");
68 def_or_undef (parse_in, "__pentium");
69 def_or_undef (parse_in, "__pentium__");
70 if (isa_flag & OPTION_MASK_ISA_MMX)
71 def_or_undef (parse_in, "__pentium_mmx__");
72 break;
73 case PROCESSOR_PENTIUMPRO:
74 def_or_undef (parse_in, "__i686");
75 def_or_undef (parse_in, "__i686__");
76 def_or_undef (parse_in, "__pentiumpro");
77 def_or_undef (parse_in, "__pentiumpro__");
78 break;
79 case PROCESSOR_GEODE:
80 def_or_undef (parse_in, "__geode");
81 def_or_undef (parse_in, "__geode__");
82 break;
83 case PROCESSOR_K6:
84 def_or_undef (parse_in, "__k6");
85 def_or_undef (parse_in, "__k6__");
86 if (last_arch_char == '2')
87 def_or_undef (parse_in, "__k6_2__");
88 else if (last_arch_char == '3')
89 def_or_undef (parse_in, "__k6_3__");
90 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 def_or_undef (parse_in, "__k6_3__");
92 break;
93 case PROCESSOR_ATHLON:
94 def_or_undef (parse_in, "__athlon");
95 def_or_undef (parse_in, "__athlon__");
96 if (isa_flag & OPTION_MASK_ISA_SSE)
97 def_or_undef (parse_in, "__athlon_sse__");
98 break;
99 case PROCESSOR_K8:
100 def_or_undef (parse_in, "__k8");
101 def_or_undef (parse_in, "__k8__");
102 break;
103 case PROCESSOR_AMDFAM10:
104 def_or_undef (parse_in, "__amdfam10");
105 def_or_undef (parse_in, "__amdfam10__");
106 break;
107 case PROCESSOR_BDVER1:
108 def_or_undef (parse_in, "__bdver1");
109 def_or_undef (parse_in, "__bdver1__");
110 break;
111 case PROCESSOR_BDVER2:
112 def_or_undef (parse_in, "__bdver2");
113 def_or_undef (parse_in, "__bdver2__");
114 break;
115 case PROCESSOR_BDVER3:
116 def_or_undef (parse_in, "__bdver3");
117 def_or_undef (parse_in, "__bdver3__");
118 break;
119 case PROCESSOR_BDVER4:
120 def_or_undef (parse_in, "__bdver4");
121 def_or_undef (parse_in, "__bdver4__");
122 break;
123 case PROCESSOR_ZNVER1:
124 def_or_undef (parse_in, "__znver1");
125 def_or_undef (parse_in, "__znver1__");
126 break;
127 case PROCESSOR_ZNVER2:
128 def_or_undef (parse_in, "__znver2");
129 def_or_undef (parse_in, "__znver2__");
130 break;
131 case PROCESSOR_ZNVER3:
132 def_or_undef (parse_in, "__znver3");
133 def_or_undef (parse_in, "__znver3__");
134 break;
135 case PROCESSOR_ZNVER4:
136 def_or_undef (parse_in, "__znver4");
137 def_or_undef (parse_in, "__znver4__");
138 break;
139 case PROCESSOR_BTVER1:
140 def_or_undef (parse_in, "__btver1");
141 def_or_undef (parse_in, "__btver1__");
142 break;
143 case PROCESSOR_BTVER2:
144 def_or_undef (parse_in, "__btver2");
145 def_or_undef (parse_in, "__btver2__");
146 break;
147 case PROCESSOR_LUJIAZUI:
148 def_or_undef (parse_in, "__lujiazui");
149 def_or_undef (parse_in, "__lujiazui__");
150 break;
151 case PROCESSOR_YONGFENG:
152 def_or_undef (parse_in, "__yongfeng");
153 def_or_undef (parse_in, "__yongfeng__");
154 break;
155 case PROCESSOR_PENTIUM4:
156 def_or_undef (parse_in, "__pentium4");
157 def_or_undef (parse_in, "__pentium4__");
158 break;
159 case PROCESSOR_NOCONA:
160 def_or_undef (parse_in, "__nocona");
161 def_or_undef (parse_in, "__nocona__");
162 break;
163 case PROCESSOR_CORE2:
164 def_or_undef (parse_in, "__core2");
165 def_or_undef (parse_in, "__core2__");
166 break;
167 case PROCESSOR_NEHALEM:
168 def_or_undef (parse_in, "__corei7");
169 def_or_undef (parse_in, "__corei7__");
170 def_or_undef (parse_in, "__nehalem");
171 def_or_undef (parse_in, "__nehalem__");
172 break;
173 case PROCESSOR_SANDYBRIDGE:
174 def_or_undef (parse_in, "__corei7_avx");
175 def_or_undef (parse_in, "__corei7_avx__");
176 def_or_undef (parse_in, "__sandybridge");
177 def_or_undef (parse_in, "__sandybridge__");
178 break;
179 case PROCESSOR_HASWELL:
180 def_or_undef (parse_in, "__core_avx2");
181 def_or_undef (parse_in, "__core_avx2__");
182 def_or_undef (parse_in, "__haswell");
183 def_or_undef (parse_in, "__haswell__");
184 break;
185 case PROCESSOR_BONNELL:
186 def_or_undef (parse_in, "__atom");
187 def_or_undef (parse_in, "__atom__");
188 def_or_undef (parse_in, "__bonnell");
189 def_or_undef (parse_in, "__bonnell__");
190 break;
191 case PROCESSOR_SILVERMONT:
192 def_or_undef (parse_in, "__slm");
193 def_or_undef (parse_in, "__slm__");
194 def_or_undef (parse_in, "__silvermont");
195 def_or_undef (parse_in, "__silvermont__");
196 break;
197 case PROCESSOR_GOLDMONT:
198 def_or_undef (parse_in, "__goldmont");
199 def_or_undef (parse_in, "__goldmont__");
200 break;
201 case PROCESSOR_GOLDMONT_PLUS:
202 def_or_undef (parse_in, "__goldmont_plus");
203 def_or_undef (parse_in, "__goldmont_plus__");
204 break;
205 case PROCESSOR_TREMONT:
206 def_or_undef (parse_in, "__tremont");
207 def_or_undef (parse_in, "__tremont__");
208 break;
209 case PROCESSOR_SIERRAFOREST:
210 def_or_undef (parse_in, "__sierraforest");
211 def_or_undef (parse_in, "__sierraforest__");
212 break;
213 case PROCESSOR_GRANDRIDGE:
214 def_or_undef (parse_in, "__grandridge");
215 def_or_undef (parse_in, "__grandridge__");
216 break;
217 case PROCESSOR_CLEARWATERFOREST:
218 def_or_undef (parse_in, "__clearwaterforest");
219 def_or_undef (parse_in, "__clearwaterforest__");
220 break;
221 case PROCESSOR_KNL:
222 def_or_undef (parse_in, "__knl");
223 def_or_undef (parse_in, "__knl__");
224 break;
225 case PROCESSOR_KNM:
226 def_or_undef (parse_in, "__knm");
227 def_or_undef (parse_in, "__knm__");
228 break;
229 case PROCESSOR_SKYLAKE:
230 def_or_undef (parse_in, "__skylake");
231 def_or_undef (parse_in, "__skylake__");
232 break;
233 case PROCESSOR_SKYLAKE_AVX512:
234 def_or_undef (parse_in, "__skylake_avx512");
235 def_or_undef (parse_in, "__skylake_avx512__");
236 break;
237 case PROCESSOR_CANNONLAKE:
238 def_or_undef (parse_in, "__cannonlake");
239 def_or_undef (parse_in, "__cannonlake__");
240 break;
241 case PROCESSOR_ICELAKE_CLIENT:
242 def_or_undef (parse_in, "__icelake_client");
243 def_or_undef (parse_in, "__icelake_client__");
244 break;
245 case PROCESSOR_ICELAKE_SERVER:
246 def_or_undef (parse_in, "__icelake_server");
247 def_or_undef (parse_in, "__icelake_server__");
248 break;
249 case PROCESSOR_CASCADELAKE:
250 def_or_undef (parse_in, "__cascadelake");
251 def_or_undef (parse_in, "__cascadelake__");
252 break;
253 case PROCESSOR_TIGERLAKE:
254 def_or_undef (parse_in, "__tigerlake");
255 def_or_undef (parse_in, "__tigerlake__");
256 break;
257 case PROCESSOR_COOPERLAKE:
258 def_or_undef (parse_in, "__cooperlake");
259 def_or_undef (parse_in, "__cooperlake__");
260 break;
261 case PROCESSOR_SAPPHIRERAPIDS:
262 def_or_undef (parse_in, "__sapphirerapids");
263 def_or_undef (parse_in, "__sapphirerapids__");
264 break;
265 case PROCESSOR_GRANITERAPIDS:
266 def_or_undef (parse_in, "__graniterapids");
267 def_or_undef (parse_in, "__graniterapids__");
268 break;
269 case PROCESSOR_GRANITERAPIDS_D:
270 def_or_undef (parse_in, "__graniterapids_d");
271 def_or_undef (parse_in, "__graniterapids_d__");
272 break;
273 case PROCESSOR_ALDERLAKE:
274 def_or_undef (parse_in, "__alderlake");
275 def_or_undef (parse_in, "__alderlake__");
276 break;
277 case PROCESSOR_ROCKETLAKE:
278 def_or_undef (parse_in, "__rocketlake");
279 def_or_undef (parse_in, "__rocketlake__");
280 break;
281 case PROCESSOR_ARROWLAKE:
282 def_or_undef (parse_in, "__arrowlake");
283 def_or_undef (parse_in, "__arrowlake__");
284 break;
285 case PROCESSOR_ARROWLAKE_S:
286 def_or_undef (parse_in, "__arrowlake_s");
287 def_or_undef (parse_in, "__arrowlake_s__");
288 break;
289 case PROCESSOR_PANTHERLAKE:
290 def_or_undef (parse_in, "__pantherlake");
291 def_or_undef (parse_in, "__pantherlake__");
292 break;
293
294 /* use PROCESSOR_max to not set/unset the arch macro. */
295 case PROCESSOR_max:
296 break;
297 case PROCESSOR_INTEL:
298 case PROCESSOR_GENERIC:
299 gcc_unreachable ();
300 }
301
302 /* Built-ins based on -mtune=. */
303 switch (tune)
304 {
305 case PROCESSOR_I386:
306 def_or_undef (parse_in, "__tune_i386__");
307 break;
308 case PROCESSOR_I486:
309 def_or_undef (parse_in, "__tune_i486__");
310 break;
311 case PROCESSOR_PENTIUM:
312 def_or_undef (parse_in, "__tune_i586__");
313 def_or_undef (parse_in, "__tune_pentium__");
314 if (last_tune_char == 'x')
315 def_or_undef (parse_in, "__tune_pentium_mmx__");
316 break;
317 case PROCESSOR_PENTIUMPRO:
318 def_or_undef (parse_in, "__tune_i686__");
319 def_or_undef (parse_in, "__tune_pentiumpro__");
320 switch (last_tune_char)
321 {
322 case '3':
323 def_or_undef (parse_in, "__tune_pentium3__");
324 /* FALLTHRU */
325 case '2':
326 def_or_undef (parse_in, "__tune_pentium2__");
327 break;
328 }
329 break;
330 case PROCESSOR_GEODE:
331 def_or_undef (parse_in, "__tune_geode__");
332 break;
333 case PROCESSOR_K6:
334 def_or_undef (parse_in, "__tune_k6__");
335 if (last_tune_char == '2')
336 def_or_undef (parse_in, "__tune_k6_2__");
337 else if (last_tune_char == '3')
338 def_or_undef (parse_in, "__tune_k6_3__");
339 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
340 def_or_undef (parse_in, "__tune_k6_3__");
341 break;
342 case PROCESSOR_ATHLON:
343 def_or_undef (parse_in, "__tune_athlon__");
344 if (isa_flag & OPTION_MASK_ISA_SSE)
345 def_or_undef (parse_in, "__tune_athlon_sse__");
346 break;
347 case PROCESSOR_K8:
348 def_or_undef (parse_in, "__tune_k8__");
349 break;
350 case PROCESSOR_AMDFAM10:
351 def_or_undef (parse_in, "__tune_amdfam10__");
352 break;
353 case PROCESSOR_BDVER1:
354 def_or_undef (parse_in, "__tune_bdver1__");
355 break;
356 case PROCESSOR_BDVER2:
357 def_or_undef (parse_in, "__tune_bdver2__");
358 break;
359 case PROCESSOR_BDVER3:
360 def_or_undef (parse_in, "__tune_bdver3__");
361 break;
362 case PROCESSOR_BDVER4:
363 def_or_undef (parse_in, "__tune_bdver4__");
364 break;
365 case PROCESSOR_ZNVER1:
366 def_or_undef (parse_in, "__tune_znver1__");
367 break;
368 case PROCESSOR_ZNVER2:
369 def_or_undef (parse_in, "__tune_znver2__");
370 break;
371 case PROCESSOR_ZNVER3:
372 def_or_undef (parse_in, "__tune_znver3__");
373 break;
374 case PROCESSOR_ZNVER4:
375 def_or_undef (parse_in, "__tune_znver4__");
376 break;
377 case PROCESSOR_BTVER1:
378 def_or_undef (parse_in, "__tune_btver1__");
379 break;
380 case PROCESSOR_BTVER2:
381 def_or_undef (parse_in, "__tune_btver2__");
382 break;
383 case PROCESSOR_LUJIAZUI:
384 def_or_undef (parse_in, "__tune_lujiazui__");
385 break;
386 case PROCESSOR_YONGFENG:
387 def_or_undef (parse_in, "__tune_yongfeng__");
388 break;
389 case PROCESSOR_PENTIUM4:
390 def_or_undef (parse_in, "__tune_pentium4__");
391 break;
392 case PROCESSOR_NOCONA:
393 def_or_undef (parse_in, "__tune_nocona__");
394 break;
395 case PROCESSOR_CORE2:
396 def_or_undef (parse_in, "__tune_core2__");
397 break;
398 case PROCESSOR_NEHALEM:
399 def_or_undef (parse_in, "__tune_corei7__");
400 def_or_undef (parse_in, "__tune_nehalem__");
401 break;
402 case PROCESSOR_SANDYBRIDGE:
403 def_or_undef (parse_in, "__tune_corei7_avx__");
404 def_or_undef (parse_in, "__tune_sandybridge__");
405 break;
406 case PROCESSOR_HASWELL:
407 def_or_undef (parse_in, "__tune_core_avx2__");
408 def_or_undef (parse_in, "__tune_haswell__");
409 break;
410 case PROCESSOR_BONNELL:
411 def_or_undef (parse_in, "__tune_atom__");
412 def_or_undef (parse_in, "__tune_bonnell__");
413 break;
414 case PROCESSOR_SILVERMONT:
415 def_or_undef (parse_in, "__tune_slm__");
416 def_or_undef (parse_in, "__tune_silvermont__");
417 break;
418 case PROCESSOR_GOLDMONT:
419 def_or_undef (parse_in, "__tune_goldmont__");
420 break;
421 case PROCESSOR_GOLDMONT_PLUS:
422 def_or_undef (parse_in, "__tune_goldmont_plus__");
423 break;
424 case PROCESSOR_TREMONT:
425 def_or_undef (parse_in, "__tune_tremont__");
426 break;
427 case PROCESSOR_SIERRAFOREST:
428 def_or_undef (parse_in, "__tune_sierraforest__");
429 break;
430 case PROCESSOR_GRANDRIDGE:
431 def_or_undef (parse_in, "__tune_grandridge__");
432 break;
433 case PROCESSOR_CLEARWATERFOREST:
434 def_or_undef (parse_in, "__tune_clearwaterforest__");
435 break;
436 case PROCESSOR_KNL:
437 def_or_undef (parse_in, "__tune_knl__");
438 break;
439 case PROCESSOR_KNM:
440 def_or_undef (parse_in, "__tune_knm__");
441 break;
442 case PROCESSOR_SKYLAKE:
443 def_or_undef (parse_in, "__tune_skylake__");
444 break;
445 case PROCESSOR_SKYLAKE_AVX512:
446 def_or_undef (parse_in, "__tune_skylake_avx512__");
447 break;
448 case PROCESSOR_CANNONLAKE:
449 def_or_undef (parse_in, "__tune_cannonlake__");
450 break;
451 case PROCESSOR_ICELAKE_CLIENT:
452 def_or_undef (parse_in, "__tune_icelake_client__");
453 break;
454 case PROCESSOR_ICELAKE_SERVER:
455 def_or_undef (parse_in, "__tune_icelake_server__");
456 break;
457 case PROCESSOR_LAKEMONT:
458 def_or_undef (parse_in, "__tune_lakemont__");
459 break;
460 case PROCESSOR_CASCADELAKE:
461 def_or_undef (parse_in, "__tune_cascadelake__");
462 break;
463 case PROCESSOR_TIGERLAKE:
464 def_or_undef (parse_in, "__tune_tigerlake__");
465 break;
466 case PROCESSOR_COOPERLAKE:
467 def_or_undef (parse_in, "__tune_cooperlake__");
468 break;
469 case PROCESSOR_SAPPHIRERAPIDS:
470 def_or_undef (parse_in, "__tune_sapphirerapids__");
471 break;
472 case PROCESSOR_ALDERLAKE:
473 def_or_undef (parse_in, "__tune_alderlake__");
474 break;
475 case PROCESSOR_ROCKETLAKE:
476 def_or_undef (parse_in, "__tune_rocketlake__");
477 break;
478 case PROCESSOR_GRANITERAPIDS:
479 def_or_undef (parse_in, "__tune_graniterapids__");
480 break;
481 case PROCESSOR_GRANITERAPIDS_D:
482 def_or_undef (parse_in, "__tune_graniterapids_d__");
483 break;
484 case PROCESSOR_ARROWLAKE:
485 def_or_undef (parse_in, "__tune_arrowlake__");
486 break;
487 case PROCESSOR_ARROWLAKE_S:
488 def_or_undef (parse_in, "__tune_arrowlake_s__");
489 break;
490 case PROCESSOR_PANTHERLAKE:
491 def_or_undef (parse_in, "__tune_pantherlake__");
492 break;
493 case PROCESSOR_INTEL:
494 case PROCESSOR_GENERIC:
495 break;
496 /* use PROCESSOR_max to not set/unset the tune macro. */
497 case PROCESSOR_max:
498 break;
499 }
500
501 switch (ix86_cmodel)
502 {
503 case CM_SMALL:
504 case CM_SMALL_PIC:
505 def_or_undef (parse_in, "__code_model_small__");
506 break;
507 case CM_MEDIUM:
508 case CM_MEDIUM_PIC:
509 def_or_undef (parse_in, "__code_model_medium__");
510 break;
511 case CM_LARGE:
512 case CM_LARGE_PIC:
513 def_or_undef (parse_in, "__code_model_large__");
514 break;
515 case CM_32:
516 def_or_undef (parse_in, "__code_model_32__");
517 break;
518 case CM_KERNEL:
519 def_or_undef (parse_in, "__code_model_kernel__");
520 break;
521 default:
522 ;
523 }
524
525 if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
526 def_or_undef (parse_in, "__WBNOINVD__");
527 if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
528 def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
529 if (isa_flag & OPTION_MASK_ISA_MMX)
530 def_or_undef (parse_in, "__MMX__");
531 if (isa_flag & OPTION_MASK_ISA_3DNOW)
532 def_or_undef (parse_in, "__3dNOW__");
533 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
534 def_or_undef (parse_in, "__3dNOW_A__");
535 if (isa_flag & OPTION_MASK_ISA_SSE)
536 def_or_undef (parse_in, "__SSE__");
537 if (isa_flag & OPTION_MASK_ISA_SSE2)
538 def_or_undef (parse_in, "__SSE2__");
539 if (isa_flag & OPTION_MASK_ISA_SSE3)
540 def_or_undef (parse_in, "__SSE3__");
541 if (isa_flag & OPTION_MASK_ISA_SSSE3)
542 def_or_undef (parse_in, "__SSSE3__");
543 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
544 def_or_undef (parse_in, "__SSE4_1__");
545 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
546 def_or_undef (parse_in, "__SSE4_2__");
547 if (isa_flag & OPTION_MASK_ISA_AES)
548 def_or_undef (parse_in, "__AES__");
549 if (isa_flag & OPTION_MASK_ISA_SHA)
550 def_or_undef (parse_in, "__SHA__");
551 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
552 def_or_undef (parse_in, "__PCLMUL__");
553 if (isa_flag & OPTION_MASK_ISA_AVX)
554 def_or_undef (parse_in, "__AVX__");
555 if (isa_flag & OPTION_MASK_ISA_AVX2)
556 def_or_undef (parse_in, "__AVX2__");
557 if (isa_flag & OPTION_MASK_ISA_AVX512F)
558 def_or_undef (parse_in, "__AVX512F__");
559 if (isa_flag & OPTION_MASK_ISA_AVX512ER)
560 def_or_undef (parse_in, "__AVX512ER__");
561 if (isa_flag & OPTION_MASK_ISA_AVX512CD)
562 def_or_undef (parse_in, "__AVX512CD__");
563 if (isa_flag & OPTION_MASK_ISA_AVX512PF)
564 def_or_undef (parse_in, "__AVX512PF__");
565 if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
566 def_or_undef (parse_in, "__AVX512DQ__");
567 if (isa_flag & OPTION_MASK_ISA_AVX512BW)
568 def_or_undef (parse_in, "__AVX512BW__");
569 if (isa_flag & OPTION_MASK_ISA_AVX512VL)
570 {
571 def_or_undef (parse_in, "__AVX512VL__");
572 def_or_undef (parse_in, "__EVEX256__");
573 }
574 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
575 def_or_undef (parse_in, "__AVX512VBMI__");
576 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
577 def_or_undef (parse_in, "__AVX512IFMA__");
578 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124VNNIW)
579 def_or_undef (parse_in, "__AVX5124VNNIW__");
580 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
581 def_or_undef (parse_in, "__AVX512VBMI2__");
582 if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
583 def_or_undef (parse_in, "__AVX512VNNI__");
584 if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
585 def_or_undef (parse_in, "__PCONFIG__");
586 if (isa_flag2 & OPTION_MASK_ISA2_SGX)
587 def_or_undef (parse_in, "__SGX__");
588 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124FMAPS)
589 def_or_undef (parse_in, "__AVX5124FMAPS__");
590 if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
591 def_or_undef (parse_in, "__AVX512BITALG__");
592 if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
593 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
594 if (isa_flag & OPTION_MASK_ISA_FMA)
595 def_or_undef (parse_in, "__FMA__");
596 if (isa_flag & OPTION_MASK_ISA_RTM)
597 def_or_undef (parse_in, "__RTM__");
598 if (isa_flag & OPTION_MASK_ISA_SSE4A)
599 def_or_undef (parse_in, "__SSE4A__");
600 if (isa_flag & OPTION_MASK_ISA_FMA4)
601 def_or_undef (parse_in, "__FMA4__");
602 if (isa_flag & OPTION_MASK_ISA_XOP)
603 def_or_undef (parse_in, "__XOP__");
604 if (isa_flag & OPTION_MASK_ISA_LWP)
605 def_or_undef (parse_in, "__LWP__");
606 if (isa_flag & OPTION_MASK_ISA_ABM)
607 def_or_undef (parse_in, "__ABM__");
608 if (isa_flag & OPTION_MASK_ISA_BMI)
609 def_or_undef (parse_in, "__BMI__");
610 if (isa_flag & OPTION_MASK_ISA_BMI2)
611 def_or_undef (parse_in, "__BMI2__");
612 if (isa_flag & OPTION_MASK_ISA_LZCNT)
613 def_or_undef (parse_in, "__LZCNT__");
614 if (isa_flag & OPTION_MASK_ISA_TBM)
615 def_or_undef (parse_in, "__TBM__");
616 if (isa_flag & OPTION_MASK_ISA_CRC32)
617 def_or_undef (parse_in, "__CRC32__");
618 if (isa_flag & OPTION_MASK_ISA_POPCNT)
619 def_or_undef (parse_in, "__POPCNT__");
620 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
621 def_or_undef (parse_in, "__FSGSBASE__");
622 if (isa_flag & OPTION_MASK_ISA_RDRND)
623 def_or_undef (parse_in, "__RDRND__");
624 if (isa_flag & OPTION_MASK_ISA_F16C)
625 def_or_undef (parse_in, "__F16C__");
626 if (isa_flag & OPTION_MASK_ISA_RDSEED)
627 def_or_undef (parse_in, "__RDSEED__");
628 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
629 def_or_undef (parse_in, "__PRFCHW__");
630 if (isa_flag & OPTION_MASK_ISA_ADX)
631 def_or_undef (parse_in, "__ADX__");
632 if (isa_flag & OPTION_MASK_ISA_FXSR)
633 def_or_undef (parse_in, "__FXSR__");
634 if (isa_flag & OPTION_MASK_ISA_XSAVE)
635 def_or_undef (parse_in, "__XSAVE__");
636 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
637 def_or_undef (parse_in, "__XSAVEOPT__");
638 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
639 def_or_undef (parse_in, "__PREFETCHWT1__");
640 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
641 def_or_undef (parse_in, "__SSE_MATH__");
642 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
643 def_or_undef (parse_in, "__SSE2_MATH__");
644 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
645 def_or_undef (parse_in, "__CLFLUSHOPT__");
646 if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
647 def_or_undef (parse_in, "__CLZERO__");
648 if (isa_flag & OPTION_MASK_ISA_XSAVEC)
649 def_or_undef (parse_in, "__XSAVEC__");
650 if (isa_flag & OPTION_MASK_ISA_XSAVES)
651 def_or_undef (parse_in, "__XSAVES__");
652 if (isa_flag & OPTION_MASK_ISA_CLWB)
653 def_or_undef (parse_in, "__CLWB__");
654 if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
655 def_or_undef (parse_in, "__MWAITX__");
656 if (isa_flag & OPTION_MASK_ISA_PKU)
657 def_or_undef (parse_in, "__PKU__");
658 if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
659 def_or_undef (parse_in, "__RDPID__");
660 if (isa_flag & OPTION_MASK_ISA_GFNI)
661 def_or_undef (parse_in, "__GFNI__");
662 if ((isa_flag & OPTION_MASK_ISA_SHSTK))
663 def_or_undef (parse_in, "__SHSTK__");
664 if (isa_flag2 & OPTION_MASK_ISA2_VAES)
665 def_or_undef (parse_in, "__VAES__");
666 if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
667 def_or_undef (parse_in, "__VPCLMULQDQ__");
668 if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
669 def_or_undef (parse_in, "__MOVDIRI__");
670 if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
671 def_or_undef (parse_in, "__MOVDIR64B__");
672 if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
673 def_or_undef (parse_in, "__WAITPKG__");
674 if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
675 def_or_undef (parse_in, "__CLDEMOTE__");
676 if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE)
677 def_or_undef (parse_in, "__SERIALIZE__");
678 if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
679 def_or_undef (parse_in, "__PTWRITE__");
680 if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
681 def_or_undef (parse_in, "__AVX512BF16__");
682 if (isa_flag2 & OPTION_MASK_ISA2_AVX512FP16)
683 def_or_undef (parse_in, "__AVX512FP16__");
684 if (TARGET_MMX_WITH_SSE)
685 def_or_undef (parse_in, "__MMX_WITH_SSE__");
686 if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
687 def_or_undef (parse_in, "__ENQCMD__");
688 if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
689 def_or_undef (parse_in, "__TSXLDTRK__");
690 if (isa_flag2 & OPTION_MASK_ISA2_AMX_TILE)
691 def_or_undef (parse_in, "__AMX_TILE__");
692 if (isa_flag2 & OPTION_MASK_ISA2_AMX_INT8)
693 def_or_undef (parse_in, "__AMX_INT8__");
694 if (isa_flag2 & OPTION_MASK_ISA2_AMX_BF16)
695 def_or_undef (parse_in, "__AMX_BF16__");
696 if (isa_flag & OPTION_MASK_ISA_SAHF)
697 def_or_undef (parse_in, "__LAHF_SAHF__");
698 if (isa_flag2 & OPTION_MASK_ISA2_MOVBE)
699 def_or_undef (parse_in, "__MOVBE__");
700 if (isa_flag2 & OPTION_MASK_ISA2_UINTR)
701 def_or_undef (parse_in, "__UINTR__");
702 if (isa_flag2 & OPTION_MASK_ISA2_HRESET)
703 def_or_undef (parse_in, "__HRESET__");
704 if (isa_flag2 & OPTION_MASK_ISA2_KL)
705 def_or_undef (parse_in, "__KL__");
706 if (isa_flag2 & OPTION_MASK_ISA2_WIDEKL)
707 def_or_undef (parse_in, "__WIDEKL__");
708 if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI)
709 def_or_undef (parse_in, "__AVXVNNI__");
710 if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA)
711 def_or_undef (parse_in, "__AVXIFMA__");
712 if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8)
713 def_or_undef (parse_in, "__AVXVNNIINT8__");
714 if (isa_flag2 & OPTION_MASK_ISA2_AVXNECONVERT)
715 def_or_undef (parse_in, "__AVXNECONVERT__");
716 if (isa_flag2 & OPTION_MASK_ISA2_CMPCCXADD)
717 def_or_undef (parse_in, "__CMPCCXADD__");
718 if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP16)
719 def_or_undef (parse_in, "__AMX_FP16__");
720 if (isa_flag2 & OPTION_MASK_ISA2_PREFETCHI)
721 def_or_undef (parse_in, "__PREFETCHI__");
722 if (isa_flag2 & OPTION_MASK_ISA2_RAOINT)
723 def_or_undef (parse_in, "__RAOINT__");
724 if (isa_flag2 & OPTION_MASK_ISA2_AMX_COMPLEX)
725 def_or_undef (parse_in, "__AMX_COMPLEX__");
726 if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT16)
727 def_or_undef (parse_in, "__AVXVNNIINT16__");
728 if (isa_flag2 & OPTION_MASK_ISA2_SM3)
729 def_or_undef (parse_in, "__SM3__");
730 if (isa_flag2 & OPTION_MASK_ISA2_SHA512)
731 def_or_undef (parse_in, "__SHA512__");
732 if (isa_flag2 & OPTION_MASK_ISA2_SM4)
733 def_or_undef (parse_in, "__SM4__");
734 if (isa_flag2 & OPTION_MASK_ISA2_EVEX512)
735 def_or_undef (parse_in, "__EVEX512__");
736 if (isa_flag2 & OPTION_MASK_ISA2_USER_MSR)
737 def_or_undef (parse_in, "__USER_MSR__");
738 if (TARGET_IAMCU)
739 {
740 def_or_undef (parse_in, "__iamcu");
741 def_or_undef (parse_in, "__iamcu__");
742 }
743}
744
745
746/* Hook to validate the current #pragma GCC target and set the state, and
747 update the macros based on what was changed. If ARGS is NULL, then
748 POP_TARGET is used to reset the options. */
749
750static bool
751ix86_pragma_target_parse (tree args, tree pop_target)
752{
753 tree prev_tree
754 = build_target_option_node (opts: &global_options, opts_set: &global_options_set);
755 tree cur_tree;
756 struct cl_target_option *prev_opt;
757 struct cl_target_option *cur_opt;
758 HOST_WIDE_INT prev_isa;
759 HOST_WIDE_INT cur_isa;
760 HOST_WIDE_INT diff_isa;
761 HOST_WIDE_INT prev_isa2;
762 HOST_WIDE_INT cur_isa2;
763 HOST_WIDE_INT diff_isa2;
764 enum processor_type prev_arch;
765 enum processor_type prev_tune;
766 enum processor_type cur_arch;
767 enum processor_type cur_tune;
768
769 if (! args)
770 {
771 cur_tree = (pop_target ? pop_target : target_option_default_node);
772 cl_target_option_restore (&global_options, &global_options_set,
773 TREE_TARGET_OPTION (cur_tree));
774 }
775 else
776 {
777 cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
778 &global_options,
779 &global_options_set, 0);
780 if (!cur_tree || cur_tree == error_mark_node)
781 {
782 cl_target_option_restore (&global_options, &global_options_set,
783 TREE_TARGET_OPTION (prev_tree));
784 return false;
785 }
786 }
787
788 target_option_current_node = cur_tree;
789 ix86_reset_previous_fndecl ();
790
791 /* Figure out the previous/current isa, arch, tune and the differences. */
792 prev_opt = TREE_TARGET_OPTION (prev_tree);
793 cur_opt = TREE_TARGET_OPTION (cur_tree);
794 prev_isa = prev_opt->x_ix86_isa_flags;
795 cur_isa = cur_opt->x_ix86_isa_flags;
796 diff_isa = (prev_isa ^ cur_isa);
797 prev_isa2 = prev_opt->x_ix86_isa_flags2;
798 cur_isa2 = cur_opt->x_ix86_isa_flags2;
799 diff_isa2 = (prev_isa2 ^ cur_isa2);
800 prev_arch = (enum processor_type) prev_opt->arch;
801 prev_tune = (enum processor_type) prev_opt->tune;
802 cur_arch = (enum processor_type) cur_opt->arch;
803 cur_tune = (enum processor_type) cur_opt->tune;
804
805 /* If the same processor is used for both previous and current options, don't
806 change the macros. */
807 if (cur_arch == prev_arch)
808 cur_arch = prev_arch = PROCESSOR_max;
809
810 if (cur_tune == prev_tune)
811 cur_tune = prev_tune = PROCESSOR_max;
812
813 /* Undef all of the macros for that are no longer current. */
814 cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
815 ix86_target_macros_internal (isa_flag: prev_isa & diff_isa,
816 isa_flag2: prev_isa2 & diff_isa2,
817 arch: prev_arch,
818 tune: prev_tune,
819 fpmath: (enum fpmath_unit) prev_opt->x_ix86_fpmath,
820 def_or_undef: cpp_undef);
821 cpp_stop_forcing_token_locations (parse_in);
822
823 /* For the definitions, ensure all newly defined macros are considered
824 as used for -Wunused-macros. There is no point warning about the
825 compiler predefined macros. */
826 cpp_options *cpp_opts = cpp_get_options (parse_in);
827 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
828 cpp_opts->warn_unused_macros = 0;
829
830 /* Define all of the macros for new options that were just turned on. */
831 cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
832 ix86_target_macros_internal (isa_flag: cur_isa & diff_isa,
833 isa_flag2: cur_isa2 & diff_isa2,
834 arch: cur_arch,
835 tune: cur_tune,
836 fpmath: (enum fpmath_unit) cur_opt->x_ix86_fpmath,
837 def_or_undef: cpp_define);
838 cpp_stop_forcing_token_locations (parse_in);
839
840 cpp_opts->warn_unused_macros = saved_warn_unused_macros;
841
842 return true;
843}
844
845/* Function to tell the preprocessor about the defines for the current target. */
846
847void
848ix86_target_macros (void)
849{
850 /* 32/64-bit won't change with target specific options, so do the assert and
851 builtin_define_std calls here. */
852 if (TARGET_64BIT)
853 {
854 cpp_assert (parse_in, "cpu=x86_64");
855 cpp_assert (parse_in, "machine=x86_64");
856 cpp_define (parse_in, "__amd64");
857 cpp_define (parse_in, "__amd64__");
858 cpp_define (parse_in, "__x86_64");
859 cpp_define (parse_in, "__x86_64__");
860 if (TARGET_X32)
861 {
862 cpp_define (parse_in, "_ILP32");
863 cpp_define (parse_in, "__ILP32__");
864 }
865 }
866 else
867 {
868 cpp_assert (parse_in, "cpu=i386");
869 cpp_assert (parse_in, "machine=i386");
870 builtin_define_std (macro: "i386");
871 cpp_define (parse_in, "_ILP32");
872 cpp_define (parse_in, "__ILP32__");
873 }
874
875 if (!TARGET_80387)
876 cpp_define (parse_in, "_SOFT_FLOAT");
877
878 /* HFmode/BFmode is supported without depending any isa
879 in scalar_mode_supported_p and libgcc_floating_mode_supported_p,
880 but according to psABI, they're really supported w/ SSE2 and above.
881 Since libstdc++ uses __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__
882 for backend support of the types, undef the macros to avoid
883 build failure, see PR109504. */
884 if (!TARGET_SSE2)
885 {
886 if (c_dialect_cxx () && cxx_dialect > cxx20)
887 {
888 cpp_undef (parse_in, "__STDCPP_FLOAT16_T__");
889 cpp_undef (parse_in, "__STDCPP_BFLOAT16_T__");
890 }
891 }
892
893 if (TARGET_LONG_DOUBLE_64)
894 cpp_define (parse_in, "__LONG_DOUBLE_64__");
895
896 if (TARGET_LONG_DOUBLE_128)
897 cpp_define (parse_in, "__LONG_DOUBLE_128__");
898
899 cpp_define_formatted (pfile: parse_in, fmt: "__SIZEOF_FLOAT80__=%d",
900 GET_MODE_SIZE (XFmode));
901
902 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
903
904 cpp_define_formatted (pfile: parse_in, fmt: "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
905 cpp_define_formatted (pfile: parse_in, fmt: "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
906
907 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
908
909 ix86_target_macros_internal (ix86_isa_flags,
910 ix86_isa_flags2,
911 arch: ix86_arch,
912 tune: ix86_tune,
913 ix86_fpmath,
914 def_or_undef: cpp_define);
915
916 cpp_define (parse_in, "__SEG_FS");
917 cpp_define (parse_in, "__SEG_GS");
918
919 if (flag_cf_protection != CF_NONE)
920 cpp_define_formatted (pfile: parse_in, fmt: "__CET__=%d", flag_cf_protection & ~CF_SET);
921}
922
923
924/* Register target pragmas. We need to add the hook for parsing #pragma GCC
925 option here rather than in i386.cc since it will pull in various preprocessor
926 functions, and those are not present in languages like fortran without a
927 preprocessor. */
928
929void
930ix86_register_pragmas (void)
931{
932 /* Update pragma hook to allow parsing #pragma GCC target. */
933 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
934
935 c_register_addr_space (str: "__seg_fs", as: ADDR_SPACE_SEG_FS);
936 c_register_addr_space (str: "__seg_gs", as: ADDR_SPACE_SEG_GS);
937
938#ifdef REGISTER_SUBTARGET_PRAGMAS
939 REGISTER_SUBTARGET_PRAGMAS ();
940#endif
941}
942

source code of gcc/config/i386/i386-c.cc