1 | /* |
2 | * arch/arm/plat-orion/common.c |
3 | * |
4 | * Marvell Orion SoC common setup code used by multiple mach-/common.c |
5 | * |
6 | * This file is licensed under the terms of the GNU General Public |
7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. |
9 | */ |
10 | |
11 | #include <linux/kernel.h> |
12 | #include <linux/init.h> |
13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> |
15 | #include <linux/serial_8250.h> |
16 | #include <linux/ata_platform.h> |
17 | #include <linux/clk.h> |
18 | #include <linux/clkdev.h> |
19 | #include <linux/mv643xx_eth.h> |
20 | #include <linux/mv643xx_i2c.h> |
21 | #include <linux/platform_data/dma-mv_xor.h> |
22 | #include <linux/platform_data/usb-ehci-orion.h> |
23 | #include <plat/common.h> |
24 | #include <linux/phy.h> |
25 | |
26 | /* Create a clkdev entry for a given device/clk */ |
27 | void __init orion_clkdev_add(const char *con_id, const char *dev_id, |
28 | struct clk *clk) |
29 | { |
30 | clkdev_create(clk, con_id, dev_fmt: "%s" , dev_id); |
31 | } |
32 | |
33 | /* Create clkdev entries for all orion platforms except kirkwood. |
34 | Kirkwood has gated clocks for some of its peripherals, so creates |
35 | its own clkdev entries. For all the other orion devices, create |
36 | clkdev entries to the tclk. */ |
37 | void __init orion_clkdev_init(struct clk *tclk) |
38 | { |
39 | orion_clkdev_add(NULL, dev_id: "orion_spi.0" , clk: tclk); |
40 | orion_clkdev_add(NULL, dev_id: "orion_spi.1" , clk: tclk); |
41 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0" , clk: tclk); |
42 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1" , clk: tclk); |
43 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2" , clk: tclk); |
44 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3" , clk: tclk); |
45 | orion_clkdev_add(NULL, dev_id: "orion_wdt" , clk: tclk); |
46 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0" , clk: tclk); |
47 | } |
48 | |
49 | /* Fill in the resources structure and link it into the platform |
50 | device structure. There is always a memory region, and nearly |
51 | always an interrupt.*/ |
52 | static void fill_resources(struct platform_device *device, |
53 | struct resource *resources, |
54 | resource_size_t mapbase, |
55 | resource_size_t size) |
56 | { |
57 | device->resource = resources; |
58 | device->num_resources = 1; |
59 | resources[0].flags = IORESOURCE_MEM; |
60 | resources[0].start = mapbase; |
61 | resources[0].end = mapbase + size; |
62 | } |
63 | |
64 | static void fill_resources_irq(struct platform_device *device, |
65 | struct resource *resources, |
66 | resource_size_t mapbase, |
67 | resource_size_t size, |
68 | unsigned int irq) |
69 | { |
70 | fill_resources(device, resources, mapbase, size); |
71 | |
72 | device->num_resources++; |
73 | resources[1].flags = IORESOURCE_IRQ; |
74 | resources[1].start = irq; |
75 | resources[1].end = irq; |
76 | } |
77 | |
78 | /***************************************************************************** |
79 | * UART |
80 | ****************************************************************************/ |
81 | static unsigned long __init uart_get_clk_rate(struct clk *clk) |
82 | { |
83 | clk_prepare_enable(clk); |
84 | return clk_get_rate(clk); |
85 | } |
86 | |
87 | static void __init uart_complete( |
88 | struct platform_device *orion_uart, |
89 | struct plat_serial8250_port *data, |
90 | struct resource *resources, |
91 | void __iomem *membase, |
92 | resource_size_t mapbase, |
93 | unsigned int irq, |
94 | struct clk *clk) |
95 | { |
96 | data->mapbase = mapbase; |
97 | data->membase = membase; |
98 | data->irq = irq; |
99 | data->uartclk = uart_get_clk_rate(clk); |
100 | orion_uart->dev.platform_data = data; |
101 | |
102 | fill_resources_irq(device: orion_uart, resources, mapbase, size: 0xff, irq); |
103 | platform_device_register(orion_uart); |
104 | } |
105 | |
106 | /***************************************************************************** |
107 | * UART0 |
108 | ****************************************************************************/ |
109 | static struct plat_serial8250_port orion_uart0_data[] = { |
110 | { |
111 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
112 | .iotype = UPIO_MEM, |
113 | .regshift = 2, |
114 | }, { |
115 | }, |
116 | }; |
117 | |
118 | static struct resource orion_uart0_resources[2]; |
119 | |
120 | static struct platform_device orion_uart0 = { |
121 | .name = "serial8250" , |
122 | .id = PLAT8250_DEV_PLATFORM, |
123 | }; |
124 | |
125 | void __init orion_uart0_init(void __iomem *membase, |
126 | resource_size_t mapbase, |
127 | unsigned int irq, |
128 | struct clk *clk) |
129 | { |
130 | uart_complete(orion_uart: &orion_uart0, data: orion_uart0_data, resources: orion_uart0_resources, |
131 | membase, mapbase, irq, clk); |
132 | } |
133 | |
134 | /***************************************************************************** |
135 | * UART1 |
136 | ****************************************************************************/ |
137 | static struct plat_serial8250_port orion_uart1_data[] = { |
138 | { |
139 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
140 | .iotype = UPIO_MEM, |
141 | .regshift = 2, |
142 | }, { |
143 | }, |
144 | }; |
145 | |
146 | static struct resource orion_uart1_resources[2]; |
147 | |
148 | static struct platform_device orion_uart1 = { |
149 | .name = "serial8250" , |
150 | .id = PLAT8250_DEV_PLATFORM1, |
151 | }; |
152 | |
153 | void __init orion_uart1_init(void __iomem *membase, |
154 | resource_size_t mapbase, |
155 | unsigned int irq, |
156 | struct clk *clk) |
157 | { |
158 | uart_complete(orion_uart: &orion_uart1, data: orion_uart1_data, resources: orion_uart1_resources, |
159 | membase, mapbase, irq, clk); |
160 | } |
161 | |
162 | /***************************************************************************** |
163 | * UART2 |
164 | ****************************************************************************/ |
165 | static struct plat_serial8250_port orion_uart2_data[] = { |
166 | { |
167 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
168 | .iotype = UPIO_MEM, |
169 | .regshift = 2, |
170 | }, { |
171 | }, |
172 | }; |
173 | |
174 | static struct resource orion_uart2_resources[2]; |
175 | |
176 | static struct platform_device orion_uart2 = { |
177 | .name = "serial8250" , |
178 | .id = PLAT8250_DEV_PLATFORM2, |
179 | }; |
180 | |
181 | void __init orion_uart2_init(void __iomem *membase, |
182 | resource_size_t mapbase, |
183 | unsigned int irq, |
184 | struct clk *clk) |
185 | { |
186 | uart_complete(orion_uart: &orion_uart2, data: orion_uart2_data, resources: orion_uart2_resources, |
187 | membase, mapbase, irq, clk); |
188 | } |
189 | |
190 | /***************************************************************************** |
191 | * UART3 |
192 | ****************************************************************************/ |
193 | static struct plat_serial8250_port orion_uart3_data[] = { |
194 | { |
195 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
196 | .iotype = UPIO_MEM, |
197 | .regshift = 2, |
198 | }, { |
199 | }, |
200 | }; |
201 | |
202 | static struct resource orion_uart3_resources[2]; |
203 | |
204 | static struct platform_device orion_uart3 = { |
205 | .name = "serial8250" , |
206 | .id = 3, |
207 | }; |
208 | |
209 | void __init orion_uart3_init(void __iomem *membase, |
210 | resource_size_t mapbase, |
211 | unsigned int irq, |
212 | struct clk *clk) |
213 | { |
214 | uart_complete(orion_uart: &orion_uart3, data: orion_uart3_data, resources: orion_uart3_resources, |
215 | membase, mapbase, irq, clk); |
216 | } |
217 | |
218 | /***************************************************************************** |
219 | * SoC RTC |
220 | ****************************************************************************/ |
221 | static struct resource orion_rtc_resource[2]; |
222 | |
223 | void __init orion_rtc_init(unsigned long mapbase, |
224 | unsigned long irq) |
225 | { |
226 | orion_rtc_resource[0].start = mapbase; |
227 | orion_rtc_resource[0].end = mapbase + SZ_32 - 1; |
228 | orion_rtc_resource[0].flags = IORESOURCE_MEM; |
229 | orion_rtc_resource[1].start = irq; |
230 | orion_rtc_resource[1].end = irq; |
231 | orion_rtc_resource[1].flags = IORESOURCE_IRQ; |
232 | |
233 | platform_device_register_simple(name: "rtc-mv" , id: -1, res: orion_rtc_resource, num: 2); |
234 | } |
235 | |
236 | /***************************************************************************** |
237 | * GE |
238 | ****************************************************************************/ |
239 | static __init void ge_complete( |
240 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, |
241 | struct resource *orion_ge_resource, unsigned long irq, |
242 | struct platform_device *orion_ge_shared, |
243 | struct platform_device *orion_ge_mvmdio, |
244 | struct mv643xx_eth_platform_data *eth_data, |
245 | struct platform_device *orion_ge) |
246 | { |
247 | orion_ge_resource->start = irq; |
248 | orion_ge_resource->end = irq; |
249 | eth_data->shared = orion_ge_shared; |
250 | orion_ge->dev.platform_data = eth_data; |
251 | |
252 | platform_device_register(orion_ge_shared); |
253 | if (orion_ge_mvmdio) |
254 | platform_device_register(orion_ge_mvmdio); |
255 | platform_device_register(orion_ge); |
256 | } |
257 | |
258 | /***************************************************************************** |
259 | * GE00 |
260 | ****************************************************************************/ |
261 | static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; |
262 | |
263 | static struct resource orion_ge00_shared_resources[] = { |
264 | { |
265 | .name = "ge00 base" , |
266 | }, |
267 | }; |
268 | |
269 | static struct platform_device orion_ge00_shared = { |
270 | .name = MV643XX_ETH_SHARED_NAME, |
271 | .id = 0, |
272 | .dev = { |
273 | .platform_data = &orion_ge00_shared_data, |
274 | }, |
275 | }; |
276 | |
277 | static struct resource orion_ge_mvmdio_resources[] = { |
278 | { |
279 | .name = "ge00 mvmdio base" , |
280 | }, { |
281 | .name = "ge00 mvmdio err irq" , |
282 | }, |
283 | }; |
284 | |
285 | static struct platform_device orion_ge_mvmdio = { |
286 | .name = "orion-mdio" , |
287 | .id = -1, |
288 | }; |
289 | |
290 | static struct resource orion_ge00_resources[] = { |
291 | { |
292 | .name = "ge00 irq" , |
293 | .flags = IORESOURCE_IRQ, |
294 | }, |
295 | }; |
296 | |
297 | static struct platform_device orion_ge00 = { |
298 | .name = MV643XX_ETH_NAME, |
299 | .id = 0, |
300 | .num_resources = 1, |
301 | .resource = orion_ge00_resources, |
302 | .dev = { |
303 | .coherent_dma_mask = DMA_BIT_MASK(32), |
304 | }, |
305 | }; |
306 | |
307 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, |
308 | unsigned long mapbase, |
309 | unsigned long irq, |
310 | unsigned long irq_err, |
311 | unsigned int tx_csum_limit) |
312 | { |
313 | fill_resources(device: &orion_ge00_shared, resources: orion_ge00_shared_resources, |
314 | mapbase: mapbase + 0x2000, SZ_16K - 1); |
315 | fill_resources_irq(device: &orion_ge_mvmdio, resources: orion_ge_mvmdio_resources, |
316 | mapbase: mapbase + 0x2004, size: 0x84 - 1, irq: irq_err); |
317 | orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; |
318 | ge_complete(orion_ge_shared_data: &orion_ge00_shared_data, |
319 | orion_ge_resource: orion_ge00_resources, irq, orion_ge_shared: &orion_ge00_shared, |
320 | orion_ge_mvmdio: &orion_ge_mvmdio, |
321 | eth_data, orion_ge: &orion_ge00); |
322 | } |
323 | |
324 | /***************************************************************************** |
325 | * GE01 |
326 | ****************************************************************************/ |
327 | static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; |
328 | |
329 | static struct resource orion_ge01_shared_resources[] = { |
330 | { |
331 | .name = "ge01 base" , |
332 | } |
333 | }; |
334 | |
335 | static struct platform_device orion_ge01_shared = { |
336 | .name = MV643XX_ETH_SHARED_NAME, |
337 | .id = 1, |
338 | .dev = { |
339 | .platform_data = &orion_ge01_shared_data, |
340 | }, |
341 | }; |
342 | |
343 | static struct resource orion_ge01_resources[] = { |
344 | { |
345 | .name = "ge01 irq" , |
346 | .flags = IORESOURCE_IRQ, |
347 | }, |
348 | }; |
349 | |
350 | static struct platform_device orion_ge01 = { |
351 | .name = MV643XX_ETH_NAME, |
352 | .id = 1, |
353 | .num_resources = 1, |
354 | .resource = orion_ge01_resources, |
355 | .dev = { |
356 | .coherent_dma_mask = DMA_BIT_MASK(32), |
357 | }, |
358 | }; |
359 | |
360 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, |
361 | unsigned long mapbase, |
362 | unsigned long irq, |
363 | unsigned int tx_csum_limit) |
364 | { |
365 | fill_resources(device: &orion_ge01_shared, resources: orion_ge01_shared_resources, |
366 | mapbase: mapbase + 0x2000, SZ_16K - 1); |
367 | orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; |
368 | ge_complete(orion_ge_shared_data: &orion_ge01_shared_data, |
369 | orion_ge_resource: orion_ge01_resources, irq, orion_ge_shared: &orion_ge01_shared, |
370 | NULL, |
371 | eth_data, orion_ge: &orion_ge01); |
372 | } |
373 | |
374 | /***************************************************************************** |
375 | * GE10 |
376 | ****************************************************************************/ |
377 | static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; |
378 | |
379 | static struct resource orion_ge10_shared_resources[] = { |
380 | { |
381 | .name = "ge10 base" , |
382 | } |
383 | }; |
384 | |
385 | static struct platform_device orion_ge10_shared = { |
386 | .name = MV643XX_ETH_SHARED_NAME, |
387 | .id = 2, |
388 | .dev = { |
389 | .platform_data = &orion_ge10_shared_data, |
390 | }, |
391 | }; |
392 | |
393 | static struct resource orion_ge10_resources[] = { |
394 | { |
395 | .name = "ge10 irq" , |
396 | .flags = IORESOURCE_IRQ, |
397 | }, |
398 | }; |
399 | |
400 | static struct platform_device orion_ge10 = { |
401 | .name = MV643XX_ETH_NAME, |
402 | .id = 2, |
403 | .num_resources = 1, |
404 | .resource = orion_ge10_resources, |
405 | .dev = { |
406 | .coherent_dma_mask = DMA_BIT_MASK(32), |
407 | }, |
408 | }; |
409 | |
410 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, |
411 | unsigned long mapbase, |
412 | unsigned long irq) |
413 | { |
414 | fill_resources(device: &orion_ge10_shared, resources: orion_ge10_shared_resources, |
415 | mapbase: mapbase + 0x2000, SZ_16K - 1); |
416 | ge_complete(orion_ge_shared_data: &orion_ge10_shared_data, |
417 | orion_ge_resource: orion_ge10_resources, irq, orion_ge_shared: &orion_ge10_shared, |
418 | NULL, |
419 | eth_data, orion_ge: &orion_ge10); |
420 | } |
421 | |
422 | /***************************************************************************** |
423 | * GE11 |
424 | ****************************************************************************/ |
425 | static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; |
426 | |
427 | static struct resource orion_ge11_shared_resources[] = { |
428 | { |
429 | .name = "ge11 base" , |
430 | }, |
431 | }; |
432 | |
433 | static struct platform_device orion_ge11_shared = { |
434 | .name = MV643XX_ETH_SHARED_NAME, |
435 | .id = 3, |
436 | .dev = { |
437 | .platform_data = &orion_ge11_shared_data, |
438 | }, |
439 | }; |
440 | |
441 | static struct resource orion_ge11_resources[] = { |
442 | { |
443 | .name = "ge11 irq" , |
444 | .flags = IORESOURCE_IRQ, |
445 | }, |
446 | }; |
447 | |
448 | static struct platform_device orion_ge11 = { |
449 | .name = MV643XX_ETH_NAME, |
450 | .id = 3, |
451 | .num_resources = 1, |
452 | .resource = orion_ge11_resources, |
453 | .dev = { |
454 | .coherent_dma_mask = DMA_BIT_MASK(32), |
455 | }, |
456 | }; |
457 | |
458 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, |
459 | unsigned long mapbase, |
460 | unsigned long irq) |
461 | { |
462 | fill_resources(device: &orion_ge11_shared, resources: orion_ge11_shared_resources, |
463 | mapbase: mapbase + 0x2000, SZ_16K - 1); |
464 | ge_complete(orion_ge_shared_data: &orion_ge11_shared_data, |
465 | orion_ge_resource: orion_ge11_resources, irq, orion_ge_shared: &orion_ge11_shared, |
466 | NULL, |
467 | eth_data, orion_ge: &orion_ge11); |
468 | } |
469 | |
470 | /***************************************************************************** |
471 | * I2C |
472 | ****************************************************************************/ |
473 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { |
474 | .freq_n = 3, |
475 | .timeout = 1000, /* Default timeout of 1 second */ |
476 | }; |
477 | |
478 | static struct resource orion_i2c_resources[2]; |
479 | |
480 | static struct platform_device orion_i2c = { |
481 | .name = MV64XXX_I2C_CTLR_NAME, |
482 | .id = 0, |
483 | .dev = { |
484 | .platform_data = &orion_i2c_pdata, |
485 | }, |
486 | }; |
487 | |
488 | static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { |
489 | .freq_n = 3, |
490 | .timeout = 1000, /* Default timeout of 1 second */ |
491 | }; |
492 | |
493 | static struct resource orion_i2c_1_resources[2]; |
494 | |
495 | static struct platform_device orion_i2c_1 = { |
496 | .name = MV64XXX_I2C_CTLR_NAME, |
497 | .id = 1, |
498 | .dev = { |
499 | .platform_data = &orion_i2c_1_pdata, |
500 | }, |
501 | }; |
502 | |
503 | void __init orion_i2c_init(unsigned long mapbase, |
504 | unsigned long irq, |
505 | unsigned long freq_m) |
506 | { |
507 | orion_i2c_pdata.freq_m = freq_m; |
508 | fill_resources_irq(device: &orion_i2c, resources: orion_i2c_resources, mapbase, |
509 | SZ_32 - 1, irq); |
510 | platform_device_register(&orion_i2c); |
511 | } |
512 | |
513 | void __init orion_i2c_1_init(unsigned long mapbase, |
514 | unsigned long irq, |
515 | unsigned long freq_m) |
516 | { |
517 | orion_i2c_1_pdata.freq_m = freq_m; |
518 | fill_resources_irq(device: &orion_i2c_1, resources: orion_i2c_1_resources, mapbase, |
519 | SZ_32 - 1, irq); |
520 | platform_device_register(&orion_i2c_1); |
521 | } |
522 | |
523 | /***************************************************************************** |
524 | * SPI |
525 | ****************************************************************************/ |
526 | static struct resource orion_spi_resources; |
527 | |
528 | static struct platform_device orion_spi = { |
529 | .name = "orion_spi" , |
530 | .id = 0, |
531 | }; |
532 | |
533 | static struct resource orion_spi_1_resources; |
534 | |
535 | static struct platform_device orion_spi_1 = { |
536 | .name = "orion_spi" , |
537 | .id = 1, |
538 | }; |
539 | |
540 | /* Note: The SPI silicon core does have interrupts. However the |
541 | * current Linux software driver does not use interrupts. */ |
542 | |
543 | void __init orion_spi_init(unsigned long mapbase) |
544 | { |
545 | fill_resources(device: &orion_spi, resources: &orion_spi_resources, |
546 | mapbase, SZ_512 - 1); |
547 | platform_device_register(&orion_spi); |
548 | } |
549 | |
550 | void __init orion_spi_1_init(unsigned long mapbase) |
551 | { |
552 | fill_resources(device: &orion_spi_1, resources: &orion_spi_1_resources, |
553 | mapbase, SZ_512 - 1); |
554 | platform_device_register(&orion_spi_1); |
555 | } |
556 | |
557 | /***************************************************************************** |
558 | * XOR |
559 | ****************************************************************************/ |
560 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
561 | |
562 | /***************************************************************************** |
563 | * XOR0 |
564 | ****************************************************************************/ |
565 | static struct resource orion_xor0_shared_resources[] = { |
566 | { |
567 | .name = "xor 0 low" , |
568 | .flags = IORESOURCE_MEM, |
569 | }, { |
570 | .name = "xor 0 high" , |
571 | .flags = IORESOURCE_MEM, |
572 | }, { |
573 | .name = "irq channel 0" , |
574 | .flags = IORESOURCE_IRQ, |
575 | }, { |
576 | .name = "irq channel 1" , |
577 | .flags = IORESOURCE_IRQ, |
578 | }, |
579 | }; |
580 | |
581 | static struct mv_xor_channel_data orion_xor0_channels_data[2]; |
582 | |
583 | static struct mv_xor_platform_data orion_xor0_pdata = { |
584 | .channels = orion_xor0_channels_data, |
585 | }; |
586 | |
587 | static struct platform_device orion_xor0_shared = { |
588 | .name = MV_XOR_NAME, |
589 | .id = 0, |
590 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
591 | .resource = orion_xor0_shared_resources, |
592 | .dev = { |
593 | .dma_mask = &orion_xor_dmamask, |
594 | .coherent_dma_mask = DMA_BIT_MASK(32), |
595 | .platform_data = &orion_xor0_pdata, |
596 | }, |
597 | }; |
598 | |
599 | void __init orion_xor0_init(unsigned long mapbase_low, |
600 | unsigned long mapbase_high, |
601 | unsigned long irq_0, |
602 | unsigned long irq_1) |
603 | { |
604 | orion_xor0_shared_resources[0].start = mapbase_low; |
605 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; |
606 | orion_xor0_shared_resources[1].start = mapbase_high; |
607 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; |
608 | |
609 | orion_xor0_shared_resources[2].start = irq_0; |
610 | orion_xor0_shared_resources[2].end = irq_0; |
611 | orion_xor0_shared_resources[3].start = irq_1; |
612 | orion_xor0_shared_resources[3].end = irq_1; |
613 | |
614 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); |
615 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); |
616 | |
617 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); |
618 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); |
619 | |
620 | platform_device_register(&orion_xor0_shared); |
621 | } |
622 | |
623 | /***************************************************************************** |
624 | * XOR1 |
625 | ****************************************************************************/ |
626 | static struct resource orion_xor1_shared_resources[] = { |
627 | { |
628 | .name = "xor 1 low" , |
629 | .flags = IORESOURCE_MEM, |
630 | }, { |
631 | .name = "xor 1 high" , |
632 | .flags = IORESOURCE_MEM, |
633 | }, { |
634 | .name = "irq channel 0" , |
635 | .flags = IORESOURCE_IRQ, |
636 | }, { |
637 | .name = "irq channel 1" , |
638 | .flags = IORESOURCE_IRQ, |
639 | }, |
640 | }; |
641 | |
642 | static struct mv_xor_channel_data orion_xor1_channels_data[2]; |
643 | |
644 | static struct mv_xor_platform_data orion_xor1_pdata = { |
645 | .channels = orion_xor1_channels_data, |
646 | }; |
647 | |
648 | static struct platform_device orion_xor1_shared = { |
649 | .name = MV_XOR_NAME, |
650 | .id = 1, |
651 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
652 | .resource = orion_xor1_shared_resources, |
653 | .dev = { |
654 | .dma_mask = &orion_xor_dmamask, |
655 | .coherent_dma_mask = DMA_BIT_MASK(32), |
656 | .platform_data = &orion_xor1_pdata, |
657 | }, |
658 | }; |
659 | |
660 | void __init orion_xor1_init(unsigned long mapbase_low, |
661 | unsigned long mapbase_high, |
662 | unsigned long irq_0, |
663 | unsigned long irq_1) |
664 | { |
665 | orion_xor1_shared_resources[0].start = mapbase_low; |
666 | orion_xor1_shared_resources[0].end = mapbase_low + 0xff; |
667 | orion_xor1_shared_resources[1].start = mapbase_high; |
668 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; |
669 | |
670 | orion_xor1_shared_resources[2].start = irq_0; |
671 | orion_xor1_shared_resources[2].end = irq_0; |
672 | orion_xor1_shared_resources[3].start = irq_1; |
673 | orion_xor1_shared_resources[3].end = irq_1; |
674 | |
675 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); |
676 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); |
677 | |
678 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); |
679 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); |
680 | |
681 | platform_device_register(&orion_xor1_shared); |
682 | } |
683 | |
684 | /***************************************************************************** |
685 | * EHCI |
686 | ****************************************************************************/ |
687 | static struct orion_ehci_data orion_ehci_data; |
688 | static u64 ehci_dmamask = DMA_BIT_MASK(32); |
689 | |
690 | |
691 | /***************************************************************************** |
692 | * EHCI0 |
693 | ****************************************************************************/ |
694 | static struct resource orion_ehci_resources[2]; |
695 | |
696 | static struct platform_device orion_ehci = { |
697 | .name = "orion-ehci" , |
698 | .id = 0, |
699 | .dev = { |
700 | .dma_mask = &ehci_dmamask, |
701 | .coherent_dma_mask = DMA_BIT_MASK(32), |
702 | .platform_data = &orion_ehci_data, |
703 | }, |
704 | }; |
705 | |
706 | void __init orion_ehci_init(unsigned long mapbase, |
707 | unsigned long irq, |
708 | enum orion_ehci_phy_ver phy_version) |
709 | { |
710 | orion_ehci_data.phy_version = phy_version; |
711 | fill_resources_irq(device: &orion_ehci, resources: orion_ehci_resources, mapbase, SZ_4K - 1, |
712 | irq); |
713 | |
714 | platform_device_register(&orion_ehci); |
715 | } |
716 | |
717 | /***************************************************************************** |
718 | * EHCI1 |
719 | ****************************************************************************/ |
720 | static struct resource orion_ehci_1_resources[2]; |
721 | |
722 | static struct platform_device orion_ehci_1 = { |
723 | .name = "orion-ehci" , |
724 | .id = 1, |
725 | .dev = { |
726 | .dma_mask = &ehci_dmamask, |
727 | .coherent_dma_mask = DMA_BIT_MASK(32), |
728 | .platform_data = &orion_ehci_data, |
729 | }, |
730 | }; |
731 | |
732 | void __init orion_ehci_1_init(unsigned long mapbase, |
733 | unsigned long irq) |
734 | { |
735 | fill_resources_irq(device: &orion_ehci_1, resources: orion_ehci_1_resources, |
736 | mapbase, SZ_4K - 1, irq); |
737 | |
738 | platform_device_register(&orion_ehci_1); |
739 | } |
740 | |
741 | /***************************************************************************** |
742 | * EHCI2 |
743 | ****************************************************************************/ |
744 | static struct resource orion_ehci_2_resources[2]; |
745 | |
746 | static struct platform_device orion_ehci_2 = { |
747 | .name = "orion-ehci" , |
748 | .id = 2, |
749 | .dev = { |
750 | .dma_mask = &ehci_dmamask, |
751 | .coherent_dma_mask = DMA_BIT_MASK(32), |
752 | .platform_data = &orion_ehci_data, |
753 | }, |
754 | }; |
755 | |
756 | void __init orion_ehci_2_init(unsigned long mapbase, |
757 | unsigned long irq) |
758 | { |
759 | fill_resources_irq(device: &orion_ehci_2, resources: orion_ehci_2_resources, |
760 | mapbase, SZ_4K - 1, irq); |
761 | |
762 | platform_device_register(&orion_ehci_2); |
763 | } |
764 | |
765 | /***************************************************************************** |
766 | * SATA |
767 | ****************************************************************************/ |
768 | static struct resource orion_sata_resources[2] = { |
769 | { |
770 | .name = "sata base" , |
771 | }, { |
772 | .name = "sata irq" , |
773 | }, |
774 | }; |
775 | |
776 | static struct platform_device orion_sata = { |
777 | .name = "sata_mv" , |
778 | .id = 0, |
779 | .dev = { |
780 | .coherent_dma_mask = DMA_BIT_MASK(32), |
781 | }, |
782 | }; |
783 | |
784 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, |
785 | unsigned long mapbase, |
786 | unsigned long irq) |
787 | { |
788 | orion_sata.dev.platform_data = sata_data; |
789 | fill_resources_irq(device: &orion_sata, resources: orion_sata_resources, |
790 | mapbase, size: 0x5000 - 1, irq); |
791 | |
792 | platform_device_register(&orion_sata); |
793 | } |
794 | |
795 | /***************************************************************************** |
796 | * Cryptographic Engines and Security Accelerator (CESA) |
797 | ****************************************************************************/ |
798 | static struct resource orion_crypto_resources[] = { |
799 | { |
800 | .name = "regs" , |
801 | }, { |
802 | .name = "crypto interrupt" , |
803 | }, { |
804 | .name = "sram" , |
805 | .flags = IORESOURCE_MEM, |
806 | }, |
807 | }; |
808 | |
809 | static struct platform_device orion_crypto = { |
810 | .name = "mv_crypto" , |
811 | .id = -1, |
812 | }; |
813 | |
814 | void __init orion_crypto_init(unsigned long mapbase, |
815 | unsigned long srambase, |
816 | unsigned long sram_size, |
817 | unsigned long irq) |
818 | { |
819 | fill_resources_irq(device: &orion_crypto, resources: orion_crypto_resources, |
820 | mapbase, size: 0xffff, irq); |
821 | orion_crypto.num_resources = 3; |
822 | orion_crypto_resources[2].start = srambase; |
823 | orion_crypto_resources[2].end = srambase + sram_size - 1; |
824 | |
825 | platform_device_register(&orion_crypto); |
826 | } |
827 | |