1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /***************************************************************************/ |
3 | |
4 | /* |
5 | * m528x.c -- platform support for ColdFire 528x based boards |
6 | * |
7 | * Sub-architcture dependent initialization code for the Freescale |
8 | * 5280, 5281 and 5282 CPUs. |
9 | * |
10 | * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) |
11 | * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) |
12 | */ |
13 | |
14 | /***************************************************************************/ |
15 | |
16 | #include <linux/clkdev.h> |
17 | #include <linux/kernel.h> |
18 | #include <linux/param.h> |
19 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> |
21 | #include <linux/io.h> |
22 | #include <asm/machdep.h> |
23 | #include <asm/coldfire.h> |
24 | #include <asm/mcfsim.h> |
25 | #include <asm/mcfuart.h> |
26 | #include <asm/mcfclk.h> |
27 | |
28 | /***************************************************************************/ |
29 | |
30 | DEFINE_CLK(pll, "pll.0" , MCF_CLK); |
31 | DEFINE_CLK(sys, "sys.0" , MCF_BUSCLK); |
32 | |
33 | static struct clk_lookup m528x_clk_lookup[] = { |
34 | CLKDEV_INIT(NULL, "pll.0" , &clk_pll), |
35 | CLKDEV_INIT(NULL, "sys.0" , &clk_sys), |
36 | CLKDEV_INIT("mcfpit.0" , NULL, &clk_pll), |
37 | CLKDEV_INIT("mcfpit.1" , NULL, &clk_pll), |
38 | CLKDEV_INIT("mcfpit.2" , NULL, &clk_pll), |
39 | CLKDEV_INIT("mcfpit.3" , NULL, &clk_pll), |
40 | CLKDEV_INIT("mcfuart.0" , NULL, &clk_sys), |
41 | CLKDEV_INIT("mcfuart.1" , NULL, &clk_sys), |
42 | CLKDEV_INIT("mcfuart.2" , NULL, &clk_sys), |
43 | CLKDEV_INIT("mcfqspi.0" , NULL, &clk_sys), |
44 | CLKDEV_INIT("fec.0" , NULL, &clk_sys), |
45 | CLKDEV_INIT("imx1-i2c.0" , NULL, &clk_sys), |
46 | }; |
47 | |
48 | /***************************************************************************/ |
49 | |
50 | static void __init m528x_qspi_init(void) |
51 | { |
52 | #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) |
53 | /* setup Port QS for QSPI with gpio CS control */ |
54 | __raw_writeb(0x07, MCFGPIO_PQSPAR); |
55 | #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ |
56 | } |
57 | |
58 | /***************************************************************************/ |
59 | |
60 | static void __init m528x_i2c_init(void) |
61 | { |
62 | #if IS_ENABLED(CONFIG_I2C_IMX) |
63 | u16 paspar; |
64 | |
65 | /* setup Port AS Pin Assignment Register for I2C */ |
66 | /* set PASPA0 to SCL and PASPA1 to SDA */ |
67 | paspar = readw(addr: MCFGPIO_PASPAR); |
68 | paspar |= 0xF; |
69 | writew(val: paspar, addr: MCFGPIO_PASPAR); |
70 | #endif /* IS_ENABLED(CONFIG_I2C_IMX) */ |
71 | } |
72 | |
73 | /***************************************************************************/ |
74 | |
75 | static void __init m528x_uarts_init(void) |
76 | { |
77 | u8 port; |
78 | |
79 | /* make sure PUAPAR is set for UART0 and UART1 */ |
80 | port = readb(addr: MCFGPIO_PUAPAR); |
81 | port |= 0x03 | (0x03 << 2); |
82 | writeb(val: port, addr: MCFGPIO_PUAPAR); |
83 | } |
84 | |
85 | /***************************************************************************/ |
86 | |
87 | static void __init m528x_fec_init(void) |
88 | { |
89 | u16 v16; |
90 | |
91 | /* Set multi-function pins to ethernet mode for fec0 */ |
92 | v16 = readw(addr: MCFGPIO_PASPAR); |
93 | writew(val: v16 | 0xf00, addr: MCFGPIO_PASPAR); |
94 | writeb(val: 0xc0, addr: MCFGPIO_PEHLPAR); |
95 | } |
96 | |
97 | /***************************************************************************/ |
98 | |
99 | #ifdef CONFIG_WILDFIRE |
100 | void wildfire_halt(void) |
101 | { |
102 | writeb(0, 0x30000007); |
103 | writeb(0x2, 0x30000007); |
104 | } |
105 | #endif |
106 | |
107 | #ifdef CONFIG_WILDFIREMOD |
108 | void wildfiremod_halt(void) |
109 | { |
110 | printk(KERN_INFO "WildFireMod hibernating...\n" ); |
111 | |
112 | /* Set portE.5 to Digital IO */ |
113 | writew(readw(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR); |
114 | |
115 | /* Make portE.5 an output */ |
116 | writeb(readb(MCFGPIO_PDDR_E) | (1 << 5), MCFGPIO_PDDR_E); |
117 | |
118 | /* Now toggle portE.5 from low to high */ |
119 | writeb(readb(MCFGPIO_PODR_E) & ~(1 << 5), MCFGPIO_PODR_E); |
120 | writeb(readb(MCFGPIO_PODR_E) | (1 << 5), MCFGPIO_PODR_E); |
121 | |
122 | printk(KERN_EMERG "Failed to hibernate. Halting!\n" ); |
123 | } |
124 | #endif |
125 | |
126 | void __init config_BSP(char *commandp, int size) |
127 | { |
128 | #ifdef CONFIG_WILDFIRE |
129 | mach_halt = wildfire_halt; |
130 | #endif |
131 | #ifdef CONFIG_WILDFIREMOD |
132 | mach_halt = wildfiremod_halt; |
133 | #endif |
134 | mach_sched_init = hw_timer_init; |
135 | m528x_uarts_init(); |
136 | m528x_fec_init(); |
137 | m528x_qspi_init(); |
138 | m528x_i2c_init(); |
139 | |
140 | clkdev_add_table(m528x_clk_lookup, ARRAY_SIZE(m528x_clk_lookup)); |
141 | } |
142 | |
143 | /***************************************************************************/ |
144 | |