1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
4 */
5
6#include <linux/io.h>
7#include <linux/iopoll.h>
8#include <linux/spinlock.h>
9#include <linux/bug.h>
10
11#include "clk-cv18xx-common.h"
12
13int cv1800_clk_setbit(struct cv1800_clk_common *common,
14 struct cv1800_clk_regbit *field)
15{
16 u32 mask = BIT(field->shift);
17 u32 value;
18 unsigned long flags;
19
20 spin_lock_irqsave(common->lock, flags);
21
22 value = readl(addr: common->base + field->reg);
23 writel(val: value | mask, addr: common->base + field->reg);
24
25 spin_unlock_irqrestore(lock: common->lock, flags);
26
27 return 0;
28}
29
30int cv1800_clk_clearbit(struct cv1800_clk_common *common,
31 struct cv1800_clk_regbit *field)
32{
33 u32 mask = BIT(field->shift);
34 u32 value;
35 unsigned long flags;
36
37 spin_lock_irqsave(common->lock, flags);
38
39 value = readl(addr: common->base + field->reg);
40 writel(val: value & ~mask, addr: common->base + field->reg);
41
42 spin_unlock_irqrestore(lock: common->lock, flags);
43
44 return 0;
45}
46
47int cv1800_clk_checkbit(struct cv1800_clk_common *common,
48 struct cv1800_clk_regbit *field)
49{
50 return readl(addr: common->base + field->reg) & BIT(field->shift);
51}
52
53#define PLL_LOCK_TIMEOUT_US (200 * 1000)
54
55void cv1800_clk_wait_for_lock(struct cv1800_clk_common *common,
56 u32 reg, u32 lock)
57{
58 void __iomem *addr = common->base + reg;
59 u32 regval;
60
61 if (!lock)
62 return;
63
64 WARN_ON(readl_relaxed_poll_timeout(addr, regval, regval & lock,
65 100, PLL_LOCK_TIMEOUT_US));
66}
67

source code of linux/drivers/clk/sophgo/clk-cv18xx-common.c