1 | // SPDX-License-Identifier: GPL-2.0-only |
---|---|
2 | |
3 | #include <linux/component.h> |
4 | #include <linux/iopoll.h> |
5 | #include <linux/of.h> |
6 | #include <linux/platform_device.h> |
7 | |
8 | #include <drm/drm_atomic.h> |
9 | #include <drm/drm_atomic_helper.h> |
10 | #include <drm/drm_bridge.h> |
11 | #include <drm/drm_bridge_connector.h> |
12 | #include <drm/drm_drv.h> |
13 | #include <drm/drm_fb_dma_helper.h> |
14 | #include <drm/drm_framebuffer.h> |
15 | #include <drm/drm_gem_atomic_helper.h> |
16 | #include <drm/drm_gem_dma_helper.h> |
17 | #include <drm/drm_gem_framebuffer_helper.h> |
18 | #include <drm/drm_of.h> |
19 | #include <drm/drm_probe_helper.h> |
20 | #include <drm/drm_vblank.h> |
21 | |
22 | #define ADP_INT_STATUS 0x34 |
23 | #define ADP_INT_STATUS_INT_MASK 0x7 |
24 | #define ADP_INT_STATUS_VBLANK 0x1 |
25 | #define ADP_CTRL 0x100 |
26 | #define ADP_CTRL_VBLANK_ON 0x12 |
27 | #define ADP_CTRL_FIFO_ON 0x601 |
28 | #define ADP_SCREEN_SIZE 0x0c |
29 | #define ADP_SCREEN_HSIZE GENMASK(15, 0) |
30 | #define ADP_SCREEN_VSIZE GENMASK(31, 16) |
31 | |
32 | #define ADBE_FIFO 0x10c0 |
33 | #define ADBE_FIFO_SYNC 0xc0000000 |
34 | |
35 | #define ADBE_BLEND_BYPASS 0x2020 |
36 | #define ADBE_BLEND_EN1 0x2028 |
37 | #define ADBE_BLEND_EN2 0x2074 |
38 | #define ADBE_BLEND_EN3 0x202c |
39 | #define ADBE_BLEND_EN4 0x2034 |
40 | #define ADBE_MASK_BUF 0x2200 |
41 | |
42 | #define ADBE_SRC_START 0x4040 |
43 | #define ADBE_SRC_SIZE 0x4048 |
44 | #define ADBE_DST_START 0x4050 |
45 | #define ADBE_DST_SIZE 0x4054 |
46 | #define ADBE_STRIDE 0x4038 |
47 | #define ADBE_FB_BASE 0x4030 |
48 | |
49 | #define ADBE_LAYER_EN1 0x4020 |
50 | #define ADBE_LAYER_EN2 0x4068 |
51 | #define ADBE_LAYER_EN3 0x40b4 |
52 | #define ADBE_LAYER_EN4 0x40f4 |
53 | #define ADBE_SCALE_CTL 0x40ac |
54 | #define ADBE_SCALE_CTL_BYPASS 0x100000 |
55 | |
56 | #define ADBE_LAYER_CTL 0x1038 |
57 | #define ADBE_LAYER_CTL_ENABLE 0x10000 |
58 | |
59 | #define ADBE_PIX_FMT 0x402c |
60 | #define ADBE_PIX_FMT_XRGB32 0x53e4001 |
61 | |
62 | static int adp_open(struct inode *inode, struct file *filp) |
63 | { |
64 | /* |
65 | * The modesetting driver does not check the non-desktop connector |
66 | * property and keeps the device open and locked. If the touchbar daemon |
67 | * opens the device first, modesetting breaks the whole X session. |
68 | * Simply refuse to open the device for X11 server processes as |
69 | * workaround. |
70 | */ |
71 | if (current->comm[0] == 'X') |
72 | return -EBUSY; |
73 | |
74 | return drm_open(inode, filp); |
75 | } |
76 | |
77 | static const struct file_operations adp_fops = { |
78 | .owner = THIS_MODULE, |
79 | .open = adp_open, |
80 | .release = drm_release, |
81 | .unlocked_ioctl = drm_ioctl, |
82 | .compat_ioctl = drm_compat_ioctl, |
83 | .poll = drm_poll, |
84 | .read = drm_read, |
85 | .llseek = noop_llseek, |
86 | .mmap = drm_gem_mmap, |
87 | .fop_flags = FOP_UNSIGNED_OFFSET, |
88 | DRM_GEM_DMA_UNMAPPED_AREA_FOPS |
89 | }; |
90 | |
91 | static int adp_drm_gem_dumb_create(struct drm_file *file_priv, |
92 | struct drm_device *drm, |
93 | struct drm_mode_create_dumb *args) |
94 | { |
95 | args->height = ALIGN(args->height, 64); |
96 | args->size = args->pitch * args->height; |
97 | |
98 | return drm_gem_dma_dumb_create_internal(file_priv, drm, args); |
99 | } |
100 | |
101 | static const struct drm_driver adp_driver = { |
102 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, |
103 | .fops = &adp_fops, |
104 | DRM_GEM_DMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(adp_drm_gem_dumb_create), |
105 | .name = "adp", |
106 | .desc = "Apple Display Pipe DRM Driver", |
107 | .major = 0, |
108 | .minor = 1, |
109 | }; |
110 | |
111 | struct adp_drv_private { |
112 | struct drm_device drm; |
113 | struct drm_crtc crtc; |
114 | struct drm_encoder *encoder; |
115 | struct drm_connector *connector; |
116 | struct drm_bridge *next_bridge; |
117 | void __iomem *be; |
118 | void __iomem *fe; |
119 | u32 *mask_buf; |
120 | u64 mask_buf_size; |
121 | dma_addr_t mask_iova; |
122 | int be_irq; |
123 | int fe_irq; |
124 | struct drm_pending_vblank_event *event; |
125 | }; |
126 | |
127 | #define to_adp(x) container_of(x, struct adp_drv_private, drm) |
128 | #define crtc_to_adp(x) container_of(x, struct adp_drv_private, crtc) |
129 | |
130 | static int adp_plane_atomic_check(struct drm_plane *plane, |
131 | struct drm_atomic_state *state) |
132 | { |
133 | struct drm_plane_state *new_plane_state; |
134 | struct drm_crtc_state *crtc_state; |
135 | |
136 | new_plane_state = drm_atomic_get_new_plane_state(state, plane); |
137 | |
138 | if (!new_plane_state->crtc) |
139 | return 0; |
140 | |
141 | crtc_state = drm_atomic_get_crtc_state(state, crtc: new_plane_state->crtc); |
142 | if (IS_ERR(ptr: crtc_state)) |
143 | return PTR_ERR(ptr: crtc_state); |
144 | |
145 | return drm_atomic_helper_check_plane_state(plane_state: new_plane_state, |
146 | crtc_state, |
147 | DRM_PLANE_NO_SCALING, |
148 | DRM_PLANE_NO_SCALING, |
149 | can_position: true, can_update_disabled: true); |
150 | } |
151 | |
152 | static void adp_plane_atomic_update(struct drm_plane *plane, |
153 | struct drm_atomic_state *state) |
154 | { |
155 | struct adp_drv_private *adp; |
156 | struct drm_rect src_rect; |
157 | struct drm_gem_dma_object *obj; |
158 | struct drm_framebuffer *fb; |
159 | struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); |
160 | u32 src_pos, src_size, dst_pos, dst_size; |
161 | |
162 | if (!plane || !new_state) |
163 | return; |
164 | |
165 | fb = new_state->fb; |
166 | if (!fb) |
167 | return; |
168 | adp = to_adp(plane->dev); |
169 | |
170 | drm_rect_fp_to_int(dst: &src_rect, src: &new_state->src); |
171 | src_pos = src_rect.x1 << 16 | src_rect.y1; |
172 | dst_pos = new_state->dst.x1 << 16 | new_state->dst.y1; |
173 | src_size = drm_rect_width(r: &src_rect) << 16 | drm_rect_height(r: &src_rect); |
174 | dst_size = drm_rect_width(r: &new_state->dst) << 16 | |
175 | drm_rect_height(r: &new_state->dst); |
176 | writel(val: src_pos, addr: adp->be + ADBE_SRC_START); |
177 | writel(val: src_size, addr: adp->be + ADBE_SRC_SIZE); |
178 | writel(val: dst_pos, addr: adp->be + ADBE_DST_START); |
179 | writel(val: dst_size, addr: adp->be + ADBE_DST_SIZE); |
180 | writel(val: fb->pitches[0], addr: adp->be + ADBE_STRIDE); |
181 | obj = drm_fb_dma_get_gem_obj(fb, plane: 0); |
182 | if (obj) |
183 | writel(val: obj->dma_addr + fb->offsets[0], addr: adp->be + ADBE_FB_BASE); |
184 | |
185 | writel(BIT(0), addr: adp->be + ADBE_LAYER_EN1); |
186 | writel(BIT(0), addr: adp->be + ADBE_LAYER_EN2); |
187 | writel(BIT(0), addr: adp->be + ADBE_LAYER_EN3); |
188 | writel(BIT(0), addr: adp->be + ADBE_LAYER_EN4); |
189 | writel(ADBE_SCALE_CTL_BYPASS, addr: adp->be + ADBE_SCALE_CTL); |
190 | writel(ADBE_LAYER_CTL_ENABLE | BIT(0), addr: adp->be + ADBE_LAYER_CTL); |
191 | writel(ADBE_PIX_FMT_XRGB32, addr: adp->be + ADBE_PIX_FMT); |
192 | } |
193 | |
194 | static void adp_plane_atomic_disable(struct drm_plane *plane, |
195 | struct drm_atomic_state *state) |
196 | { |
197 | struct adp_drv_private *adp = to_adp(plane->dev); |
198 | |
199 | writel(val: 0x0, addr: adp->be + ADBE_LAYER_EN1); |
200 | writel(val: 0x0, addr: adp->be + ADBE_LAYER_EN2); |
201 | writel(val: 0x0, addr: adp->be + ADBE_LAYER_EN3); |
202 | writel(val: 0x0, addr: adp->be + ADBE_LAYER_EN4); |
203 | writel(ADBE_LAYER_CTL_ENABLE, addr: adp->be + ADBE_LAYER_CTL); |
204 | } |
205 | |
206 | static const struct drm_plane_helper_funcs adp_plane_helper_funcs = { |
207 | .atomic_check = adp_plane_atomic_check, |
208 | .atomic_update = adp_plane_atomic_update, |
209 | .atomic_disable = adp_plane_atomic_disable, |
210 | DRM_GEM_SHADOW_PLANE_HELPER_FUNCS |
211 | }; |
212 | |
213 | static const struct drm_plane_funcs adp_plane_funcs = { |
214 | .update_plane = drm_atomic_helper_update_plane, |
215 | .disable_plane = drm_atomic_helper_disable_plane, |
216 | DRM_GEM_SHADOW_PLANE_FUNCS |
217 | }; |
218 | |
219 | static const u32 plane_formats[] = { |
220 | DRM_FORMAT_XRGB8888, |
221 | }; |
222 | |
223 | #define ALL_CRTCS 1 |
224 | |
225 | static struct drm_plane *adp_plane_new(struct adp_drv_private *adp) |
226 | { |
227 | struct drm_device *drm = &adp->drm; |
228 | struct drm_plane *plane; |
229 | |
230 | plane = __drmm_universal_plane_alloc(dev: drm, size: sizeof(struct drm_plane), offset: 0, |
231 | ALL_CRTCS, funcs: &adp_plane_funcs, |
232 | formats: plane_formats, ARRAY_SIZE(plane_formats), |
233 | NULL, plane_type: DRM_PLANE_TYPE_PRIMARY, name: "plane"); |
234 | if (IS_ERR(ptr: plane)) { |
235 | drm_err(drm, "failed to allocate plane"); |
236 | return plane; |
237 | } |
238 | |
239 | drm_plane_helper_add(plane, funcs: &adp_plane_helper_funcs); |
240 | return plane; |
241 | } |
242 | |
243 | static void adp_enable_vblank(struct adp_drv_private *adp) |
244 | { |
245 | u32 cur_ctrl; |
246 | |
247 | writel(ADP_INT_STATUS_INT_MASK, addr: adp->fe + ADP_INT_STATUS); |
248 | |
249 | cur_ctrl = readl(addr: adp->fe + ADP_CTRL); |
250 | writel(val: cur_ctrl | ADP_CTRL_VBLANK_ON, addr: adp->fe + ADP_CTRL); |
251 | } |
252 | |
253 | static int adp_crtc_enable_vblank(struct drm_crtc *crtc) |
254 | { |
255 | struct drm_device *dev = crtc->dev; |
256 | struct adp_drv_private *adp = to_adp(dev); |
257 | |
258 | adp_enable_vblank(adp); |
259 | |
260 | return 0; |
261 | } |
262 | |
263 | static void adp_disable_vblank(struct adp_drv_private *adp) |
264 | { |
265 | u32 cur_ctrl; |
266 | |
267 | cur_ctrl = readl(addr: adp->fe + ADP_CTRL); |
268 | writel(val: cur_ctrl & ~ADP_CTRL_VBLANK_ON, addr: adp->fe + ADP_CTRL); |
269 | writel(ADP_INT_STATUS_INT_MASK, addr: adp->fe + ADP_INT_STATUS); |
270 | } |
271 | |
272 | static void adp_crtc_disable_vblank(struct drm_crtc *crtc) |
273 | { |
274 | struct drm_device *dev = crtc->dev; |
275 | struct adp_drv_private *adp = to_adp(dev); |
276 | |
277 | adp_disable_vblank(adp); |
278 | } |
279 | |
280 | static void adp_crtc_atomic_enable(struct drm_crtc *crtc, |
281 | struct drm_atomic_state *state) |
282 | { |
283 | struct adp_drv_private *adp = crtc_to_adp(crtc); |
284 | |
285 | writel(BIT(0), addr: adp->be + ADBE_BLEND_EN2); |
286 | writel(BIT(4), addr: adp->be + ADBE_BLEND_EN1); |
287 | writel(BIT(0), addr: adp->be + ADBE_BLEND_EN3); |
288 | writel(BIT(0), addr: adp->be + ADBE_BLEND_BYPASS); |
289 | writel(BIT(0), addr: adp->be + ADBE_BLEND_EN4); |
290 | drm_crtc_vblank_on(crtc); |
291 | } |
292 | |
293 | static void adp_crtc_atomic_disable(struct drm_crtc *crtc, |
294 | struct drm_atomic_state *state) |
295 | { |
296 | struct adp_drv_private *adp = crtc_to_adp(crtc); |
297 | struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); |
298 | |
299 | drm_atomic_helper_disable_planes_on_crtc(old_crtc_state: old_state, atomic: false); |
300 | |
301 | writel(val: 0x0, addr: adp->be + ADBE_BLEND_EN2); |
302 | writel(val: 0x0, addr: adp->be + ADBE_BLEND_EN1); |
303 | writel(val: 0x0, addr: adp->be + ADBE_BLEND_EN3); |
304 | writel(val: 0x0, addr: adp->be + ADBE_BLEND_BYPASS); |
305 | writel(val: 0x0, addr: adp->be + ADBE_BLEND_EN4); |
306 | drm_crtc_vblank_off(crtc); |
307 | } |
308 | |
309 | static void adp_crtc_atomic_flush(struct drm_crtc *crtc, |
310 | struct drm_atomic_state *state) |
311 | { |
312 | u32 frame_num = 1; |
313 | unsigned long flags; |
314 | struct adp_drv_private *adp = crtc_to_adp(crtc); |
315 | struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc); |
316 | u64 new_size = ALIGN(new_state->mode.hdisplay * |
317 | new_state->mode.vdisplay * 4, PAGE_SIZE); |
318 | |
319 | if (new_size != adp->mask_buf_size) { |
320 | if (adp->mask_buf) |
321 | dma_free_coherent(dev: crtc->dev->dev, size: adp->mask_buf_size, |
322 | cpu_addr: adp->mask_buf, dma_handle: adp->mask_iova); |
323 | adp->mask_buf = NULL; |
324 | if (new_size != 0) { |
325 | adp->mask_buf = dma_alloc_coherent(dev: crtc->dev->dev, size: new_size, |
326 | dma_handle: &adp->mask_iova, GFP_KERNEL); |
327 | memset(adp->mask_buf, 0xFF, new_size); |
328 | writel(val: adp->mask_iova, addr: adp->be + ADBE_MASK_BUF); |
329 | } |
330 | adp->mask_buf_size = new_size; |
331 | } |
332 | writel(ADBE_FIFO_SYNC | frame_num, addr: adp->be + ADBE_FIFO); |
333 | //FIXME: use adbe flush interrupt |
334 | if (crtc->state->event) { |
335 | struct drm_pending_vblank_event *event = crtc->state->event; |
336 | |
337 | crtc->state->event = NULL; |
338 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
339 | |
340 | if (drm_crtc_vblank_get(crtc) != 0) |
341 | drm_crtc_send_vblank_event(crtc, e: event); |
342 | else |
343 | adp->event = event; |
344 | |
345 | spin_unlock_irqrestore(lock: &crtc->dev->event_lock, flags); |
346 | } |
347 | } |
348 | |
349 | static const struct drm_crtc_funcs adp_crtc_funcs = { |
350 | .destroy = drm_crtc_cleanup, |
351 | .set_config = drm_atomic_helper_set_config, |
352 | .page_flip = drm_atomic_helper_page_flip, |
353 | .reset = drm_atomic_helper_crtc_reset, |
354 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, |
355 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, |
356 | .enable_vblank = adp_crtc_enable_vblank, |
357 | .disable_vblank = adp_crtc_disable_vblank, |
358 | }; |
359 | |
360 | |
361 | static const struct drm_crtc_helper_funcs adp_crtc_helper_funcs = { |
362 | .atomic_enable = adp_crtc_atomic_enable, |
363 | .atomic_disable = adp_crtc_atomic_disable, |
364 | .atomic_flush = adp_crtc_atomic_flush, |
365 | }; |
366 | |
367 | static int adp_setup_crtc(struct adp_drv_private *adp) |
368 | { |
369 | struct drm_device *drm = &adp->drm; |
370 | struct drm_plane *primary; |
371 | int ret; |
372 | |
373 | primary = adp_plane_new(adp); |
374 | if (IS_ERR(ptr: primary)) |
375 | return PTR_ERR(ptr: primary); |
376 | |
377 | ret = drm_crtc_init_with_planes(dev: drm, crtc: &adp->crtc, primary, |
378 | NULL, funcs: &adp_crtc_funcs, NULL); |
379 | if (ret) |
380 | return ret; |
381 | |
382 | drm_crtc_helper_add(crtc: &adp->crtc, funcs: &adp_crtc_helper_funcs); |
383 | return 0; |
384 | } |
385 | |
386 | static const struct drm_mode_config_funcs adp_mode_config_funcs = { |
387 | .fb_create = drm_gem_fb_create_with_dirty, |
388 | .atomic_check = drm_atomic_helper_check, |
389 | .atomic_commit = drm_atomic_helper_commit, |
390 | }; |
391 | |
392 | static int adp_setup_mode_config(struct adp_drv_private *adp) |
393 | { |
394 | struct drm_device *drm = &adp->drm; |
395 | int ret; |
396 | u32 size; |
397 | |
398 | ret = drmm_mode_config_init(dev: drm); |
399 | if (ret) |
400 | return ret; |
401 | |
402 | /* |
403 | * Query screen size restrict the frame buffer size to the screen size |
404 | * aligned to the next multiple of 64. This is not necessary but can be |
405 | * used as simple check for non-desktop devices. |
406 | * Xorg's modesetting driver does not care about the connector |
407 | * "non-desktop" property. The max frame buffer width or height can be |
408 | * easily checked and a device can be reject if the max width/height is |
409 | * smaller than 120 for example. |
410 | * Any touchbar daemon is not limited by this small framebuffer size. |
411 | */ |
412 | size = readl(addr: adp->fe + ADP_SCREEN_SIZE); |
413 | |
414 | drm->mode_config.min_width = 32; |
415 | drm->mode_config.min_height = 32; |
416 | drm->mode_config.max_width = ALIGN(FIELD_GET(ADP_SCREEN_HSIZE, size), 64); |
417 | drm->mode_config.max_height = ALIGN(FIELD_GET(ADP_SCREEN_VSIZE, size), 64); |
418 | drm->mode_config.preferred_depth = 24; |
419 | drm->mode_config.prefer_shadow = 0; |
420 | drm->mode_config.funcs = &adp_mode_config_funcs; |
421 | |
422 | ret = adp_setup_crtc(adp); |
423 | if (ret) { |
424 | drm_err(drm, "failed to create crtc"); |
425 | return ret; |
426 | } |
427 | |
428 | adp->encoder = drmm_plain_encoder_alloc(drm, NULL, DRM_MODE_ENCODER_DSI, NULL); |
429 | if (IS_ERR(ptr: adp->encoder)) { |
430 | drm_err(drm, "failed to init encoder"); |
431 | return PTR_ERR(ptr: adp->encoder); |
432 | } |
433 | adp->encoder->possible_crtcs = ALL_CRTCS; |
434 | |
435 | ret = drm_bridge_attach(encoder: adp->encoder, bridge: adp->next_bridge, NULL, |
436 | flags: DRM_BRIDGE_ATTACH_NO_CONNECTOR); |
437 | if (ret) { |
438 | drm_err(drm, "failed to init bridge chain"); |
439 | return ret; |
440 | } |
441 | |
442 | adp->connector = drm_bridge_connector_init(drm, encoder: adp->encoder); |
443 | if (IS_ERR(ptr: adp->connector)) |
444 | return PTR_ERR(ptr: adp->connector); |
445 | |
446 | drm_connector_attach_encoder(connector: adp->connector, encoder: adp->encoder); |
447 | |
448 | ret = drm_vblank_init(dev: drm, num_crtcs: drm->mode_config.num_crtc); |
449 | if (ret < 0) { |
450 | drm_err(drm, "failed to initialize vblank"); |
451 | return ret; |
452 | } |
453 | |
454 | drm_mode_config_reset(dev: drm); |
455 | |
456 | return 0; |
457 | } |
458 | |
459 | static int adp_parse_of(struct platform_device *pdev, struct adp_drv_private *adp) |
460 | { |
461 | struct device *dev = &pdev->dev; |
462 | |
463 | adp->be = devm_platform_ioremap_resource_byname(pdev, name: "be"); |
464 | if (IS_ERR(ptr: adp->be)) { |
465 | dev_err(dev, "failed to map display backend mmio"); |
466 | return PTR_ERR(ptr: adp->be); |
467 | } |
468 | |
469 | adp->fe = devm_platform_ioremap_resource_byname(pdev, name: "fe"); |
470 | if (IS_ERR(ptr: adp->fe)) { |
471 | dev_err(dev, "failed to map display pipe mmio"); |
472 | return PTR_ERR(ptr: adp->fe); |
473 | } |
474 | |
475 | adp->be_irq = platform_get_irq_byname(pdev, "be"); |
476 | if (adp->be_irq < 0) |
477 | return adp->be_irq; |
478 | |
479 | adp->fe_irq = platform_get_irq_byname(pdev, "fe"); |
480 | if (adp->fe_irq < 0) |
481 | return adp->fe_irq; |
482 | |
483 | return 0; |
484 | } |
485 | |
486 | static irqreturn_t adp_fe_irq(int irq, void *arg) |
487 | { |
488 | struct adp_drv_private *adp = (struct adp_drv_private *)arg; |
489 | u32 int_status; |
490 | u32 int_ctl; |
491 | |
492 | int_status = readl(addr: adp->fe + ADP_INT_STATUS); |
493 | if (int_status & ADP_INT_STATUS_VBLANK) { |
494 | drm_crtc_handle_vblank(crtc: &adp->crtc); |
495 | spin_lock(lock: &adp->crtc.dev->event_lock); |
496 | if (adp->event) { |
497 | int_ctl = readl(addr: adp->fe + ADP_CTRL); |
498 | if ((int_ctl & 0xF00) == 0x600) { |
499 | drm_crtc_send_vblank_event(crtc: &adp->crtc, e: adp->event); |
500 | adp->event = NULL; |
501 | drm_crtc_vblank_put(crtc: &adp->crtc); |
502 | } |
503 | } |
504 | spin_unlock(lock: &adp->crtc.dev->event_lock); |
505 | } |
506 | |
507 | writel(val: int_status, addr: adp->fe + ADP_INT_STATUS); |
508 | |
509 | |
510 | return IRQ_HANDLED; |
511 | } |
512 | |
513 | static int adp_drm_bind(struct device *dev) |
514 | { |
515 | struct drm_device *drm = dev_get_drvdata(dev); |
516 | struct adp_drv_private *adp = to_adp(drm); |
517 | int err; |
518 | |
519 | writel(ADP_CTRL_FIFO_ON, addr: adp->fe + ADP_CTRL); |
520 | |
521 | adp->next_bridge = drmm_of_get_bridge(drm: &adp->drm, node: dev->of_node, port: 0, endpoint: 0); |
522 | if (IS_ERR(ptr: adp->next_bridge)) { |
523 | dev_err(dev, "failed to find next bridge"); |
524 | return PTR_ERR(ptr: adp->next_bridge); |
525 | } |
526 | |
527 | err = adp_setup_mode_config(adp); |
528 | if (err < 0) |
529 | return err; |
530 | |
531 | err = request_irq(irq: adp->fe_irq, handler: adp_fe_irq, flags: 0, name: "adp-fe", dev: adp); |
532 | if (err) |
533 | return err; |
534 | |
535 | err = drm_dev_register(dev: &adp->drm, flags: 0); |
536 | if (err) |
537 | return err; |
538 | |
539 | return 0; |
540 | } |
541 | |
542 | static void adp_drm_unbind(struct device *dev) |
543 | { |
544 | struct drm_device *drm = dev_get_drvdata(dev); |
545 | struct adp_drv_private *adp = to_adp(drm); |
546 | |
547 | drm_dev_unregister(dev: drm); |
548 | drm_atomic_helper_shutdown(dev: drm); |
549 | free_irq(adp->fe_irq, adp); |
550 | } |
551 | |
552 | static const struct component_master_ops adp_master_ops = { |
553 | .bind = adp_drm_bind, |
554 | .unbind = adp_drm_unbind, |
555 | }; |
556 | |
557 | static int compare_dev(struct device *dev, void *data) |
558 | { |
559 | return dev->of_node == data; |
560 | } |
561 | |
562 | static int adp_probe(struct platform_device *pdev) |
563 | { |
564 | struct device_node *port; |
565 | struct component_match *match = NULL; |
566 | struct adp_drv_private *adp; |
567 | int err; |
568 | |
569 | adp = devm_drm_dev_alloc(&pdev->dev, &adp_driver, struct adp_drv_private, drm); |
570 | if (IS_ERR(ptr: adp)) |
571 | return PTR_ERR(ptr: adp); |
572 | |
573 | dev_set_drvdata(dev: &pdev->dev, data: &adp->drm); |
574 | |
575 | err = adp_parse_of(pdev, adp); |
576 | if (err < 0) |
577 | return err; |
578 | |
579 | port = of_graph_get_remote_node(node: pdev->dev.of_node, port: 0, endpoint: 0); |
580 | if (!port) |
581 | return -ENODEV; |
582 | |
583 | drm_of_component_match_add(master: &pdev->dev, matchptr: &match, compare: compare_dev, node: port); |
584 | of_node_put(node: port); |
585 | |
586 | return component_master_add_with_match(&pdev->dev, &adp_master_ops, match); |
587 | } |
588 | |
589 | static void adp_remove(struct platform_device *pdev) |
590 | { |
591 | component_master_del(&pdev->dev, &adp_master_ops); |
592 | dev_set_drvdata(dev: &pdev->dev, NULL); |
593 | } |
594 | |
595 | static const struct of_device_id adp_of_match[] = { |
596 | { .compatible = "apple,h7-display-pipe", }, |
597 | { }, |
598 | }; |
599 | MODULE_DEVICE_TABLE(of, adp_of_match); |
600 | |
601 | static struct platform_driver adp_platform_driver = { |
602 | .driver = { |
603 | .name = "adp", |
604 | .of_match_table = adp_of_match, |
605 | }, |
606 | .probe = adp_probe, |
607 | .remove = adp_remove, |
608 | }; |
609 | |
610 | module_platform_driver(adp_platform_driver); |
611 | |
612 | MODULE_DESCRIPTION("Apple Display Pipe DRM driver"); |
613 | MODULE_LICENSE("GPL"); |
614 |
Definitions
- adp_open
- adp_fops
- adp_drm_gem_dumb_create
- adp_driver
- adp_drv_private
- adp_plane_atomic_check
- adp_plane_atomic_update
- adp_plane_atomic_disable
- adp_plane_helper_funcs
- adp_plane_funcs
- plane_formats
- adp_plane_new
- adp_enable_vblank
- adp_crtc_enable_vblank
- adp_disable_vblank
- adp_crtc_disable_vblank
- adp_crtc_atomic_enable
- adp_crtc_atomic_disable
- adp_crtc_atomic_flush
- adp_crtc_funcs
- adp_crtc_helper_funcs
- adp_setup_crtc
- adp_mode_config_funcs
- adp_setup_mode_config
- adp_parse_of
- adp_fe_irq
- adp_drm_bind
- adp_drm_unbind
- adp_master_ops
- compare_dev
- adp_probe
- adp_remove
- adp_of_match
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