1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef __AMDGPU_OBJECT_H__
29#define __AMDGPU_OBJECT_H__
30
31#include <drm/amdgpu_drm.h>
32#include "amdgpu.h"
33#include "amdgpu_res_cursor.h"
34
35#ifdef CONFIG_MMU_NOTIFIER
36#include <linux/mmu_notifier.h>
37#endif
38
39#define AMDGPU_BO_INVALID_OFFSET LONG_MAX
40#define AMDGPU_BO_MAX_PLACEMENTS 3
41
42/* BO flag to indicate a KFD userptr BO */
43#define AMDGPU_AMDKFD_CREATE_USERPTR_BO (1ULL << 63)
44
45#define to_amdgpu_bo_user(abo) container_of((abo), struct amdgpu_bo_user, bo)
46#define to_amdgpu_bo_vm(abo) container_of((abo), struct amdgpu_bo_vm, bo)
47
48struct amdgpu_bo_param {
49 unsigned long size;
50 int byte_align;
51 u32 bo_ptr_size;
52 u32 domain;
53 u32 preferred_domain;
54 u64 flags;
55 enum ttm_bo_type type;
56 bool no_wait_gpu;
57 struct dma_resv *resv;
58 void (*destroy)(struct ttm_buffer_object *bo);
59};
60
61/* bo virtual addresses in a vm */
62struct amdgpu_bo_va_mapping {
63 struct amdgpu_bo_va *bo_va;
64 struct list_head list;
65 struct rb_node rb;
66 uint64_t start;
67 uint64_t last;
68 uint64_t __subtree_last;
69 uint64_t offset;
70 uint64_t flags;
71};
72
73/* User space allocated BO in a VM */
74struct amdgpu_bo_va {
75 struct amdgpu_vm_bo_base base;
76
77 /* protected by bo being reserved */
78 unsigned ref_count;
79
80 /* all other members protected by the VM PD being reserved */
81 struct dma_fence *last_pt_update;
82
83 /* mappings for this bo_va */
84 struct list_head invalids;
85 struct list_head valids;
86
87 /* If the mappings are cleared or filled */
88 bool cleared;
89
90 bool is_xgmi;
91};
92
93struct amdgpu_bo {
94 /* Protected by tbo.reserved */
95 u32 preferred_domains;
96 u32 allowed_domains;
97 struct ttm_place placements[AMDGPU_BO_MAX_PLACEMENTS];
98 struct ttm_placement placement;
99 struct ttm_buffer_object tbo;
100 struct ttm_bo_kmap_obj kmap;
101 u64 flags;
102 /* per VM structure for page tables and with virtual addresses */
103 struct amdgpu_vm_bo_base *vm_bo;
104 /* Constant after initialization */
105 struct amdgpu_bo *parent;
106
107#ifdef CONFIG_MMU_NOTIFIER
108 struct mmu_interval_notifier notifier;
109#endif
110 struct kgd_mem *kfd_bo;
111};
112
113struct amdgpu_bo_user {
114 struct amdgpu_bo bo;
115 u64 tiling_flags;
116 u64 metadata_flags;
117 void *metadata;
118 u32 metadata_size;
119
120};
121
122struct amdgpu_bo_vm {
123 struct amdgpu_bo bo;
124 struct amdgpu_bo *shadow;
125 struct list_head shadow_list;
126 struct amdgpu_vm_bo_base entries[];
127};
128
129struct amdgpu_mem_stats {
130 /* current VRAM usage, includes visible VRAM */
131 uint64_t vram;
132 /* current visible VRAM usage */
133 uint64_t visible_vram;
134 /* current GTT usage */
135 uint64_t gtt;
136 /* current system memory usage */
137 uint64_t cpu;
138 /* sum of evicted buffers, includes visible VRAM */
139 uint64_t evicted_vram;
140 /* sum of evicted buffers due to CPU access */
141 uint64_t evicted_visible_vram;
142 /* how much userspace asked for, includes vis.VRAM */
143 uint64_t requested_vram;
144 /* how much userspace asked for */
145 uint64_t requested_visible_vram;
146 /* how much userspace asked for */
147 uint64_t requested_gtt;
148};
149
150static inline struct amdgpu_bo *ttm_to_amdgpu_bo(struct ttm_buffer_object *tbo)
151{
152 return container_of(tbo, struct amdgpu_bo, tbo);
153}
154
155/**
156 * amdgpu_mem_type_to_domain - return domain corresponding to mem_type
157 * @mem_type: ttm memory type
158 *
159 * Returns corresponding domain of the ttm mem_type
160 */
161static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
162{
163 switch (mem_type) {
164 case TTM_PL_VRAM:
165 return AMDGPU_GEM_DOMAIN_VRAM;
166 case TTM_PL_TT:
167 return AMDGPU_GEM_DOMAIN_GTT;
168 case TTM_PL_SYSTEM:
169 return AMDGPU_GEM_DOMAIN_CPU;
170 case AMDGPU_PL_GDS:
171 return AMDGPU_GEM_DOMAIN_GDS;
172 case AMDGPU_PL_GWS:
173 return AMDGPU_GEM_DOMAIN_GWS;
174 case AMDGPU_PL_OA:
175 return AMDGPU_GEM_DOMAIN_OA;
176 default:
177 break;
178 }
179 return 0;
180}
181
182/**
183 * amdgpu_bo_reserve - reserve bo
184 * @bo: bo structure
185 * @no_intr: don't return -ERESTARTSYS on pending signal
186 *
187 * Returns:
188 * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
189 * a signal. Release all buffer reservations and return to user-space.
190 */
191static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
192{
193 struct amdgpu_device *adev = amdgpu_ttm_adev(bdev: bo->tbo.bdev);
194 int r;
195
196 r = ttm_bo_reserve(bo: &bo->tbo, interruptible: !no_intr, no_wait: false, NULL);
197 if (unlikely(r != 0)) {
198 if (r != -ERESTARTSYS)
199 dev_err(adev->dev, "%p reserve failed\n", bo);
200 return r;
201 }
202 return 0;
203}
204
205static inline void amdgpu_bo_unreserve(struct amdgpu_bo *bo)
206{
207 ttm_bo_unreserve(bo: &bo->tbo);
208}
209
210static inline unsigned long amdgpu_bo_size(struct amdgpu_bo *bo)
211{
212 return bo->tbo.base.size;
213}
214
215static inline unsigned amdgpu_bo_ngpu_pages(struct amdgpu_bo *bo)
216{
217 return bo->tbo.base.size / AMDGPU_GPU_PAGE_SIZE;
218}
219
220static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)
221{
222 return (bo->tbo.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
223}
224
225/**
226 * amdgpu_bo_mmap_offset - return mmap offset of bo
227 * @bo: amdgpu object for which we query the offset
228 *
229 * Returns mmap offset of the object.
230 */
231static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
232{
233 return drm_vma_node_offset_addr(&bo->tbo.base.vma_node);
234}
235
236/**
237 * amdgpu_bo_in_cpu_visible_vram - check if BO is (partly) in visible VRAM
238 */
239static inline bool amdgpu_bo_in_cpu_visible_vram(struct amdgpu_bo *bo)
240{
241 struct amdgpu_device *adev = amdgpu_ttm_adev(bdev: bo->tbo.bdev);
242 struct amdgpu_res_cursor cursor;
243
244 if (bo->tbo.resource->mem_type != TTM_PL_VRAM)
245 return false;
246
247 amdgpu_res_first(res: bo->tbo.resource, start: 0, size: amdgpu_bo_size(bo), cur: &cursor);
248 while (cursor.remaining) {
249 if (cursor.start < adev->gmc.visible_vram_size)
250 return true;
251
252 amdgpu_res_next(cur: &cursor, size: cursor.size);
253 }
254
255 return false;
256}
257
258/**
259 * amdgpu_bo_explicit_sync - return whether the bo is explicitly synced
260 */
261static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo)
262{
263 return bo->flags & AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
264}
265
266/**
267 * amdgpu_bo_encrypted - test if the BO is encrypted
268 * @bo: pointer to a buffer object
269 *
270 * Return true if the buffer object is encrypted, false otherwise.
271 */
272static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
273{
274 return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
275}
276
277/**
278 * amdgpu_bo_shadowed - check if the BO is shadowed
279 *
280 * @bo: BO to be tested.
281 *
282 * Returns:
283 * NULL if not shadowed or else return a BO pointer.
284 */
285static inline struct amdgpu_bo *amdgpu_bo_shadowed(struct amdgpu_bo *bo)
286{
287 if (bo->tbo.type == ttm_bo_type_kernel)
288 return to_amdgpu_bo_vm(bo)->shadow;
289
290 return NULL;
291}
292
293bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
294void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
295
296int amdgpu_bo_create(struct amdgpu_device *adev,
297 struct amdgpu_bo_param *bp,
298 struct amdgpu_bo **bo_ptr);
299int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
300 unsigned long size, int align,
301 u32 domain, struct amdgpu_bo **bo_ptr,
302 u64 *gpu_addr, void **cpu_addr);
303int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
304 unsigned long size, int align,
305 u32 domain, struct amdgpu_bo **bo_ptr,
306 u64 *gpu_addr, void **cpu_addr);
307int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
308 uint64_t offset, uint64_t size,
309 struct amdgpu_bo **bo_ptr, void **cpu_addr);
310int amdgpu_bo_create_user(struct amdgpu_device *adev,
311 struct amdgpu_bo_param *bp,
312 struct amdgpu_bo_user **ubo_ptr);
313int amdgpu_bo_create_vm(struct amdgpu_device *adev,
314 struct amdgpu_bo_param *bp,
315 struct amdgpu_bo_vm **ubo_ptr);
316void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
317 void **cpu_addr);
318int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
319void *amdgpu_bo_kptr(struct amdgpu_bo *bo);
320void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
321struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo);
322void amdgpu_bo_unref(struct amdgpu_bo **bo);
323int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain);
324int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
325 u64 min_offset, u64 max_offset);
326void amdgpu_bo_unpin(struct amdgpu_bo *bo);
327int amdgpu_bo_init(struct amdgpu_device *adev);
328void amdgpu_bo_fini(struct amdgpu_device *adev);
329int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags);
330void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags);
331int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
332 uint32_t metadata_size, uint64_t flags);
333int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
334 size_t buffer_size, uint32_t *metadata_size,
335 uint64_t *flags);
336void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
337 bool evict,
338 struct ttm_resource *new_mem);
339void amdgpu_bo_release_notify(struct ttm_buffer_object *bo);
340vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
341void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
342 bool shared);
343int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
344 enum amdgpu_sync_mode sync_mode, void *owner,
345 bool intr);
346int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
347u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
348u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
349void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
350 struct amdgpu_mem_stats *stats);
351void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
352int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
353 struct dma_fence **fence);
354uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
355 uint32_t domain);
356
357/*
358 * sub allocation
359 */
360static inline struct amdgpu_sa_manager *
361to_amdgpu_sa_manager(struct drm_suballoc_manager *manager)
362{
363 return container_of(manager, struct amdgpu_sa_manager, base);
364}
365
366static inline uint64_t amdgpu_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
367{
368 return to_amdgpu_sa_manager(manager: sa_bo->manager)->gpu_addr +
369 drm_suballoc_soffset(sa: sa_bo);
370}
371
372static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
373{
374 return to_amdgpu_sa_manager(manager: sa_bo->manager)->cpu_ptr +
375 drm_suballoc_soffset(sa: sa_bo);
376}
377
378int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
379 struct amdgpu_sa_manager *sa_manager,
380 unsigned size, u32 align, u32 domain);
381void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
382 struct amdgpu_sa_manager *sa_manager);
383int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
384 struct amdgpu_sa_manager *sa_manager);
385int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
386 struct drm_suballoc **sa_bo,
387 unsigned int size);
388void amdgpu_sa_bo_free(struct amdgpu_device *adev,
389 struct drm_suballoc **sa_bo,
390 struct dma_fence *fence);
391#if defined(CONFIG_DEBUG_FS)
392void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
393 struct seq_file *m);
394u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m);
395#endif
396void amdgpu_debugfs_sa_init(struct amdgpu_device *adev);
397
398bool amdgpu_bo_support_uswc(u64 bo_flags);
399
400
401#endif
402

source code of linux/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h