| 1 | /* |
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| 2 | * Copyright 2012-20 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | * Authors: AMD |
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| 23 | * |
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| 24 | */ |
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| 25 | |
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| 26 | #ifndef __DC_HUBP_DCN32_H__ |
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| 27 | #define __DC_HUBP_DCN32_H__ |
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| 28 | |
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| 29 | #include "dcn20/dcn20_hubp.h" |
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| 30 | #include "dcn21/dcn21_hubp.h" |
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| 31 | #include "dcn30/dcn30_hubp.h" |
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| 32 | #include "dcn31/dcn31_hubp.h" |
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| 33 | |
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| 34 | #define HUBP_MASK_SH_LIST_DCN32(mask_sh)\ |
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| 35 | HUBP_MASK_SH_LIST_DCN31(mask_sh),\ |
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| 36 | HUBP_SF(HUBP0_DCHUBP_MALL_CONFIG, USE_MALL_SEL, mask_sh),\ |
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| 37 | HUBP_SF(HUBP0_DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, mask_sh),\ |
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| 38 | HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, VMPG_SIZE, mask_sh),\ |
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| 39 | HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, PTE_BUFFER_MODE, mask_sh),\ |
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| 40 | HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, BIGK_FRAGMENT_SIZE, mask_sh),\ |
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| 41 | HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, FORCE_ONE_ROW_FOR_FRAME, mask_sh),\ |
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| 42 | HUBP_SF(HUBPREQ0_UCLK_PSTATE_FORCE, DATA_UCLK_PSTATE_FORCE_EN, mask_sh),\ |
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| 43 | HUBP_SF(HUBPREQ0_UCLK_PSTATE_FORCE, DATA_UCLK_PSTATE_FORCE_VALUE, mask_sh),\ |
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| 44 | HUBP_SF(HUBPREQ0_UCLK_PSTATE_FORCE, CURSOR_UCLK_PSTATE_FORCE_EN, mask_sh),\ |
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| 45 | HUBP_SF(HUBPREQ0_UCLK_PSTATE_FORCE, CURSOR_UCLK_PSTATE_FORCE_VALUE, mask_sh) |
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| 46 | |
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| 47 | void hubp32_update_force_pstate_disallow(struct hubp *hubp, bool pstate_disallow); |
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| 48 | |
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| 49 | void hubp32_update_force_cursor_pstate_disallow(struct hubp *hubp, bool pstate_disallow); |
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| 50 | |
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| 51 | void hubp32_update_mall_sel(struct hubp *hubp, uint32_t mall_sel, bool c_cursor); |
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| 52 | |
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| 53 | void hubp32_prepare_subvp_buffering(struct hubp *hubp, bool enable); |
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| 54 | |
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| 55 | void hubp32_phantom_hubp_post_enable(struct hubp *hubp); |
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| 56 | |
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| 57 | void hubp32_cursor_set_attributes(struct hubp *hubp, |
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| 58 | const struct dc_cursor_attributes *attr); |
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| 59 | |
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| 60 | void hubp32_init(struct hubp *hubp); |
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| 61 | |
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| 62 | bool hubp32_construct( |
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| 63 | struct dcn20_hubp *hubp2, |
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| 64 | struct dc_context *ctx, |
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| 65 | uint32_t inst, |
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| 66 | const struct dcn_hubp2_registers *hubp_regs, |
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| 67 | const struct dcn_hubp2_shift *hubp_shift, |
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| 68 | const struct dcn_hubp2_mask *hubp_mask); |
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| 69 | |
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| 70 | #endif /* __DC_HUBP_DCN32_H__ */ |
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| 71 | |
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