1 | /* SPDX-License-Identifier: MIT */ |
2 | /* |
3 | * Copyright 2023 Advanced Micro Devices, Inc. |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * copy of this software and associated documentation files (the "Software"), |
7 | * to deal in the Software without restriction, including without limitation |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * Software is furnished to do so, subject to the following conditions: |
11 | * |
12 | * The above copyright notice and this permission notice shall be included in |
13 | * all copies or substantial portions of the Software. |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
21 | * OTHER DEALINGS IN THE SOFTWARE. |
22 | * |
23 | * Authors: AMD |
24 | * |
25 | */ |
26 | |
27 | #ifndef __DML2_INTERNAL_TYPES_H__ |
28 | #define __DML2_INTERNAL_TYPES_H__ |
29 | |
30 | #include "dml2_dc_types.h" |
31 | #include "display_mode_core.h" |
32 | #include "dml2_wrapper.h" |
33 | #include "dml2_policy.h" |
34 | |
35 | |
36 | struct dml2_wrapper_optimize_configuration_params { |
37 | struct display_mode_lib_st *dml_core_ctx; |
38 | struct dml2_configuration_options *config; |
39 | struct ip_params_st *ip_params; |
40 | struct dml_display_cfg_st *cur_display_config; |
41 | struct dml_display_cfg_st *new_display_config; |
42 | const struct dml_mode_support_info_st *cur_mode_support_info; |
43 | struct dml_mode_eval_policy_st *cur_policy; |
44 | struct dml_mode_eval_policy_st *new_policy; |
45 | }; |
46 | |
47 | struct dml2_calculate_lowest_supported_state_for_temp_read_scratch { |
48 | struct dml_mode_support_info_st evaluation_info; |
49 | dml_float_t uclk_change_latencies[__DML_MAX_STATE_ARRAY_SIZE__]; |
50 | struct dml_display_cfg_st cur_display_config; |
51 | struct dml_display_cfg_st new_display_config; |
52 | struct dml_mode_eval_policy_st new_policy; |
53 | struct dml_mode_eval_policy_st cur_policy; |
54 | }; |
55 | |
56 | struct dml2_create_scratch { |
57 | struct dml2_policy_build_synthetic_soc_states_scratch build_synthetic_socbb_scratch; |
58 | struct soc_states_st in_states; |
59 | }; |
60 | |
61 | struct dml2_calculate_rq_and_dlg_params_scratch { |
62 | struct _vcs_dpi_dml_display_rq_regs_st rq_regs; |
63 | struct _vcs_dpi_dml_display_dlg_regs_st disp_dlg_regs; |
64 | struct _vcs_dpi_dml_display_ttu_regs_st disp_ttu_regs; |
65 | }; |
66 | |
67 | #define __DML2_WRAPPER_MAX_STREAMS_PLANES__ 6 |
68 | |
69 | struct dml2_dml_to_dc_pipe_mapping { |
70 | unsigned int disp_cfg_to_stream_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
71 | bool disp_cfg_to_stream_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
72 | unsigned int disp_cfg_to_plane_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
73 | bool disp_cfg_to_plane_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
74 | unsigned int dml_pipe_idx_to_stream_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
75 | bool dml_pipe_idx_to_stream_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
76 | unsigned int dml_pipe_idx_to_plane_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
77 | bool dml_pipe_idx_to_plane_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
78 | unsigned int dml_pipe_idx_to_plane_index[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
79 | bool dml_pipe_idx_to_plane_index_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__]; |
80 | }; |
81 | |
82 | struct dml2_wrapper_scratch { |
83 | struct dml_display_cfg_st cur_display_config; |
84 | struct dml_display_cfg_st new_display_config; |
85 | struct dml_mode_eval_policy_st new_policy; |
86 | struct dml_mode_eval_policy_st cur_policy; |
87 | struct dml_mode_support_info_st mode_support_info; |
88 | struct dml_mode_support_ex_params_st mode_support_params; |
89 | |
90 | struct dummy_pstate_entry dummy_pstate_table[4]; |
91 | |
92 | struct dml2_create_scratch create_scratch; |
93 | struct dml2_calculate_lowest_supported_state_for_temp_read_scratch dml2_calculate_lowest_supported_state_for_temp_read_scratch; |
94 | struct dml2_calculate_rq_and_dlg_params_scratch calculate_rq_and_dlg_params_scratch; |
95 | |
96 | struct dml2_wrapper_optimize_configuration_params optimize_configuration_params; |
97 | struct dml2_policy_build_synthetic_soc_states_params build_synthetic_socbb_params; |
98 | |
99 | struct dml2_dml_to_dc_pipe_mapping dml_to_dc_pipe_mapping; |
100 | bool enable_flexible_pipe_mapping; |
101 | bool plane_duplicate_exists; |
102 | }; |
103 | |
104 | struct dml2_helper_det_policy_scratch { |
105 | int dpps_per_surface[MAX_PLANES]; |
106 | }; |
107 | |
108 | enum dml2_architecture { |
109 | dml2_architecture_20, |
110 | }; |
111 | |
112 | struct dml2_context { |
113 | enum dml2_architecture architecture; |
114 | struct dml2_configuration_options config; |
115 | struct dml2_helper_det_policy_scratch det_helper_scratch; |
116 | union { |
117 | struct { |
118 | struct display_mode_lib_st dml_core_ctx; |
119 | struct dml2_wrapper_scratch scratch; |
120 | struct dcn_watermarks g6_temp_read_watermark_set; |
121 | } v20; |
122 | }; |
123 | }; |
124 | |
125 | #endif |
126 | |