1 | // SPDX-License-Identifier: MIT |
2 | /* |
3 | * Copyright © 2021 Intel Corporation |
4 | */ |
5 | |
6 | #include <linux/backlight.h> |
7 | #include <linux/kernel.h> |
8 | #include <linux/pwm.h> |
9 | #include <linux/string_helpers.h> |
10 | |
11 | #include <acpi/video.h> |
12 | |
13 | #include "i915_reg.h" |
14 | #include "intel_backlight.h" |
15 | #include "intel_backlight_regs.h" |
16 | #include "intel_connector.h" |
17 | #include "intel_de.h" |
18 | #include "intel_display_types.h" |
19 | #include "intel_dp_aux_backlight.h" |
20 | #include "intel_dsi_dcs_backlight.h" |
21 | #include "intel_panel.h" |
22 | #include "intel_pci_config.h" |
23 | #include "intel_pps.h" |
24 | #include "intel_quirks.h" |
25 | |
26 | /** |
27 | * scale - scale values from one range to another |
28 | * @source_val: value in range [@source_min..@source_max] |
29 | * @source_min: minimum legal value for @source_val |
30 | * @source_max: maximum legal value for @source_val |
31 | * @target_min: corresponding target value for @source_min |
32 | * @target_max: corresponding target value for @source_max |
33 | * |
34 | * Return @source_val in range [@source_min..@source_max] scaled to range |
35 | * [@target_min..@target_max]. |
36 | */ |
37 | static u32 scale(u32 source_val, |
38 | u32 source_min, u32 source_max, |
39 | u32 target_min, u32 target_max) |
40 | { |
41 | u64 target_val; |
42 | |
43 | WARN_ON(source_min > source_max); |
44 | WARN_ON(target_min > target_max); |
45 | |
46 | /* defensive */ |
47 | source_val = clamp(source_val, source_min, source_max); |
48 | |
49 | /* avoid overflows */ |
50 | target_val = mul_u32_u32(a: source_val - source_min, |
51 | b: target_max - target_min); |
52 | target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); |
53 | target_val += target_min; |
54 | |
55 | return target_val; |
56 | } |
57 | |
58 | /* |
59 | * Scale user_level in range [0..user_max] to [0..hw_max], clamping the result |
60 | * to [hw_min..hw_max]. |
61 | */ |
62 | static u32 clamp_user_to_hw(struct intel_connector *connector, |
63 | u32 user_level, u32 user_max) |
64 | { |
65 | struct intel_panel *panel = &connector->panel; |
66 | u32 hw_level; |
67 | |
68 | hw_level = scale(source_val: user_level, source_min: 0, source_max: user_max, target_min: 0, target_max: panel->backlight.max); |
69 | hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); |
70 | |
71 | return hw_level; |
72 | } |
73 | |
74 | /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ |
75 | static u32 scale_hw_to_user(struct intel_connector *connector, |
76 | u32 hw_level, u32 user_max) |
77 | { |
78 | struct intel_panel *panel = &connector->panel; |
79 | |
80 | return scale(source_val: hw_level, source_min: panel->backlight.min, source_max: panel->backlight.max, |
81 | target_min: 0, target_max: user_max); |
82 | } |
83 | |
84 | u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val) |
85 | { |
86 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
87 | struct intel_panel *panel = &connector->panel; |
88 | |
89 | drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0); |
90 | |
91 | if (i915->display.params.invert_brightness < 0) |
92 | return val; |
93 | |
94 | if (i915->display.params.invert_brightness > 0 || |
95 | intel_has_quirk(i915, quirk: QUIRK_INVERT_BRIGHTNESS)) { |
96 | return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; |
97 | } |
98 | |
99 | return val; |
100 | } |
101 | |
102 | void intel_backlight_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) |
103 | { |
104 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
105 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
106 | struct intel_panel *panel = &connector->panel; |
107 | |
108 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight PWM = %d\n" , |
109 | connector->base.base.id, connector->base.name, val); |
110 | panel->backlight.pwm_funcs->set(conn_state, val); |
111 | } |
112 | |
113 | u32 intel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) |
114 | { |
115 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
116 | struct intel_panel *panel = &connector->panel; |
117 | |
118 | drm_WARN_ON_ONCE(&i915->drm, |
119 | panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
120 | |
121 | val = scale(source_val: val, source_min: panel->backlight.min, source_max: panel->backlight.max, |
122 | target_min: panel->backlight.pwm_level_min, target_max: panel->backlight.pwm_level_max); |
123 | |
124 | return intel_backlight_invert_pwm_level(connector, val); |
125 | } |
126 | |
127 | u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) |
128 | { |
129 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
130 | struct intel_panel *panel = &connector->panel; |
131 | |
132 | drm_WARN_ON_ONCE(&i915->drm, |
133 | panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); |
134 | |
135 | if (i915->display.params.invert_brightness > 0 || |
136 | (i915->display.params.invert_brightness == 0 && |
137 | intel_has_quirk(i915, quirk: QUIRK_INVERT_BRIGHTNESS))) |
138 | val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); |
139 | |
140 | return scale(source_val: val, source_min: panel->backlight.pwm_level_min, source_max: panel->backlight.pwm_level_max, |
141 | target_min: panel->backlight.min, target_max: panel->backlight.max); |
142 | } |
143 | |
144 | static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) |
145 | { |
146 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
147 | |
148 | return intel_de_read(i915, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
149 | } |
150 | |
151 | static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) |
152 | { |
153 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
154 | |
155 | return intel_de_read(i915, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
156 | } |
157 | |
158 | static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) |
159 | { |
160 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
161 | struct intel_panel *panel = &connector->panel; |
162 | u32 val; |
163 | |
164 | val = intel_de_read(i915, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
165 | if (DISPLAY_VER(i915) < 4) |
166 | val >>= 1; |
167 | |
168 | if (panel->backlight.combination_mode) { |
169 | u8 lbpc; |
170 | |
171 | pci_read_config_byte(to_pci_dev(i915->drm.dev), LBPC, val: &lbpc); |
172 | val *= lbpc; |
173 | } |
174 | |
175 | return val; |
176 | } |
177 | |
178 | static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) |
179 | { |
180 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
181 | |
182 | if (drm_WARN_ON(&i915->drm, pipe != PIPE_A && pipe != PIPE_B)) |
183 | return 0; |
184 | |
185 | return intel_de_read(i915, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; |
186 | } |
187 | |
188 | static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) |
189 | { |
190 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
191 | struct intel_panel *panel = &connector->panel; |
192 | |
193 | return intel_de_read(i915, BXT_BLC_PWM_DUTY(panel->backlight.controller)); |
194 | } |
195 | |
196 | static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) |
197 | { |
198 | struct intel_panel *panel = &connector->panel; |
199 | struct pwm_state state; |
200 | |
201 | pwm_get_state(pwm: panel->backlight.pwm, state: &state); |
202 | return pwm_get_relative_duty_cycle(state: &state, scale: 100); |
203 | } |
204 | |
205 | static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
206 | { |
207 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
208 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
209 | u32 val; |
210 | |
211 | val = intel_de_read(i915, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
212 | intel_de_write(i915, BLC_PWM_PCH_CTL2, val: val | level); |
213 | } |
214 | |
215 | static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
216 | { |
217 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
218 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
219 | u32 tmp; |
220 | |
221 | tmp = intel_de_read(i915, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
222 | intel_de_write(i915, BLC_PWM_CPU_CTL, val: tmp | level); |
223 | } |
224 | |
225 | static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
226 | { |
227 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
228 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
229 | struct intel_panel *panel = &connector->panel; |
230 | u32 tmp, mask; |
231 | |
232 | drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0); |
233 | |
234 | if (panel->backlight.combination_mode) { |
235 | u8 lbpc; |
236 | |
237 | lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; |
238 | level /= lbpc; |
239 | pci_write_config_byte(to_pci_dev(i915->drm.dev), LBPC, val: lbpc); |
240 | } |
241 | |
242 | if (DISPLAY_VER(i915) == 4) { |
243 | mask = BACKLIGHT_DUTY_CYCLE_MASK; |
244 | } else { |
245 | level <<= 1; |
246 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
247 | } |
248 | |
249 | tmp = intel_de_read(i915, BLC_PWM_CTL) & ~mask; |
250 | intel_de_write(i915, BLC_PWM_CTL, val: tmp | level); |
251 | } |
252 | |
253 | static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
254 | { |
255 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
256 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
257 | enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
258 | u32 tmp; |
259 | |
260 | tmp = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
261 | intel_de_write(i915, VLV_BLC_PWM_CTL(pipe), val: tmp | level); |
262 | } |
263 | |
264 | static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
265 | { |
266 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
267 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
268 | struct intel_panel *panel = &connector->panel; |
269 | |
270 | intel_de_write(i915, BXT_BLC_PWM_DUTY(panel->backlight.controller), val: level); |
271 | } |
272 | |
273 | static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
274 | { |
275 | struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; |
276 | |
277 | pwm_set_relative_duty_cycle(state: &panel->backlight.pwm_state, duty_cycle: level, scale: 100); |
278 | pwm_apply_might_sleep(pwm: panel->backlight.pwm, state: &panel->backlight.pwm_state); |
279 | } |
280 | |
281 | static void |
282 | intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
283 | { |
284 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
285 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
286 | struct intel_panel *panel = &connector->panel; |
287 | |
288 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight level = %d\n" , |
289 | connector->base.base.id, connector->base.name, level); |
290 | |
291 | panel->backlight.funcs->set(conn_state, level); |
292 | } |
293 | |
294 | /* set backlight brightness to level in range [0..max], assuming hw min is |
295 | * respected. |
296 | */ |
297 | void intel_backlight_set_acpi(const struct drm_connector_state *conn_state, |
298 | u32 user_level, u32 user_max) |
299 | { |
300 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
301 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
302 | struct intel_panel *panel = &connector->panel; |
303 | u32 hw_level; |
304 | |
305 | /* |
306 | * Lack of crtc may occur during driver init because |
307 | * connection_mutex isn't held across the entire backlight |
308 | * setup + modeset readout, and the BIOS can issue the |
309 | * requests at any time. |
310 | */ |
311 | if (!panel->backlight.present || !conn_state->crtc) |
312 | return; |
313 | |
314 | mutex_lock(&i915->display.backlight.lock); |
315 | |
316 | drm_WARN_ON(&i915->drm, panel->backlight.max == 0); |
317 | |
318 | hw_level = clamp_user_to_hw(connector, user_level, user_max); |
319 | panel->backlight.level = hw_level; |
320 | |
321 | if (panel->backlight.device) |
322 | panel->backlight.device->props.brightness = |
323 | scale_hw_to_user(connector, |
324 | hw_level: panel->backlight.level, |
325 | user_max: panel->backlight.device->props.max_brightness); |
326 | |
327 | if (panel->backlight.enabled) |
328 | intel_panel_actually_set_backlight(conn_state, level: hw_level); |
329 | |
330 | mutex_unlock(lock: &i915->display.backlight.lock); |
331 | } |
332 | |
333 | static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
334 | { |
335 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
336 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
337 | u32 tmp; |
338 | |
339 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val: level); |
340 | |
341 | /* |
342 | * Although we don't support or enable CPU PWM with LPT/SPT based |
343 | * systems, it may have been enabled prior to loading the |
344 | * driver. Disable to avoid warnings on LCPLL disable. |
345 | * |
346 | * This needs rework if we need to add support for CPU PWM on PCH split |
347 | * platforms. |
348 | */ |
349 | tmp = intel_de_read(i915, BLC_PWM_CPU_CTL2); |
350 | if (tmp & BLM_PWM_ENABLE) { |
351 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight was enabled, disabling\n" , |
352 | connector->base.base.id, connector->base.name); |
353 | intel_de_write(i915, BLC_PWM_CPU_CTL2, val: tmp & ~BLM_PWM_ENABLE); |
354 | } |
355 | |
356 | intel_de_rmw(i915, BLC_PWM_PCH_CTL1, BLM_PCH_PWM_ENABLE, set: 0); |
357 | } |
358 | |
359 | static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
360 | { |
361 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
362 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
363 | |
364 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
365 | |
366 | intel_de_rmw(i915, BLC_PWM_CPU_CTL2, BLM_PWM_ENABLE, set: 0); |
367 | |
368 | intel_de_rmw(i915, BLC_PWM_PCH_CTL1, BLM_PCH_PWM_ENABLE, set: 0); |
369 | } |
370 | |
371 | static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
372 | { |
373 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
374 | } |
375 | |
376 | static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
377 | { |
378 | struct drm_i915_private *i915 = to_i915(dev: old_conn_state->connector->dev); |
379 | |
380 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
381 | |
382 | intel_de_rmw(i915, BLC_PWM_CTL2, BLM_PWM_ENABLE, set: 0); |
383 | } |
384 | |
385 | static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
386 | { |
387 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
388 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
389 | enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; |
390 | |
391 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
392 | |
393 | intel_de_rmw(i915, VLV_BLC_PWM_CTL2(pipe), BLM_PWM_ENABLE, set: 0); |
394 | } |
395 | |
396 | static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
397 | { |
398 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
399 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
400 | struct intel_panel *panel = &connector->panel; |
401 | |
402 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
403 | |
404 | intel_de_rmw(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
405 | BXT_BLC_PWM_ENABLE, set: 0); |
406 | |
407 | if (panel->backlight.controller == 1) |
408 | intel_de_rmw(i915, UTIL_PIN_CTL, UTIL_PIN_ENABLE, set: 0); |
409 | } |
410 | |
411 | static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) |
412 | { |
413 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
414 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
415 | struct intel_panel *panel = &connector->panel; |
416 | |
417 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val); |
418 | |
419 | intel_de_rmw(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
420 | BXT_BLC_PWM_ENABLE, set: 0); |
421 | } |
422 | |
423 | static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) |
424 | { |
425 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
426 | struct intel_panel *panel = &connector->panel; |
427 | |
428 | intel_backlight_set_pwm_level(conn_state: old_conn_state, val: level); |
429 | |
430 | panel->backlight.pwm_state.enabled = false; |
431 | pwm_apply_might_sleep(pwm: panel->backlight.pwm, state: &panel->backlight.pwm_state); |
432 | } |
433 | |
434 | void intel_backlight_disable(const struct drm_connector_state *old_conn_state) |
435 | { |
436 | struct intel_connector *connector = to_intel_connector(old_conn_state->connector); |
437 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
438 | struct intel_panel *panel = &connector->panel; |
439 | |
440 | if (!panel->backlight.present) |
441 | return; |
442 | |
443 | /* |
444 | * Do not disable backlight on the vga_switcheroo path. When switching |
445 | * away from i915, the other client may depend on i915 to handle the |
446 | * backlight. This will leave the backlight on unnecessarily when |
447 | * another client is not activated. |
448 | */ |
449 | if (i915->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { |
450 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Skipping backlight disable on vga switch\n" , |
451 | connector->base.base.id, connector->base.name); |
452 | return; |
453 | } |
454 | |
455 | mutex_lock(&i915->display.backlight.lock); |
456 | |
457 | if (panel->backlight.device) |
458 | panel->backlight.device->props.power = FB_BLANK_POWERDOWN; |
459 | panel->backlight.enabled = false; |
460 | panel->backlight.funcs->disable(old_conn_state, 0); |
461 | |
462 | mutex_unlock(lock: &i915->display.backlight.lock); |
463 | } |
464 | |
465 | static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, |
466 | const struct drm_connector_state *conn_state, u32 level) |
467 | { |
468 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
469 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
470 | struct intel_panel *panel = &connector->panel; |
471 | u32 pch_ctl1, pch_ctl2; |
472 | |
473 | pch_ctl1 = intel_de_read(i915, BLC_PWM_PCH_CTL1); |
474 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
475 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n" , |
476 | connector->base.base.id, connector->base.name); |
477 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
478 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1); |
479 | } |
480 | |
481 | if (HAS_PCH_LPT(i915)) |
482 | intel_de_rmw(i915, SOUTH_CHICKEN2, LPT_PWM_GRANULARITY, |
483 | set: panel->backlight.alternate_pwm_increment ? |
484 | LPT_PWM_GRANULARITY : 0); |
485 | else |
486 | intel_de_rmw(i915, SOUTH_CHICKEN1, SPT_PWM_GRANULARITY, |
487 | set: panel->backlight.alternate_pwm_increment ? |
488 | SPT_PWM_GRANULARITY : 0); |
489 | |
490 | pch_ctl2 = panel->backlight.pwm_level_max << 16; |
491 | intel_de_write(i915, BLC_PWM_PCH_CTL2, val: pch_ctl2); |
492 | |
493 | pch_ctl1 = 0; |
494 | if (panel->backlight.active_low_pwm) |
495 | pch_ctl1 |= BLM_PCH_POLARITY; |
496 | |
497 | /* After LPT, override is the default. */ |
498 | if (HAS_PCH_LPT(i915)) |
499 | pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; |
500 | |
501 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1); |
502 | intel_de_posting_read(i915, BLC_PWM_PCH_CTL1); |
503 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1 | BLM_PCH_PWM_ENABLE); |
504 | |
505 | /* This won't stick until the above enable. */ |
506 | intel_backlight_set_pwm_level(conn_state, val: level); |
507 | } |
508 | |
509 | static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, |
510 | const struct drm_connector_state *conn_state, u32 level) |
511 | { |
512 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
513 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
514 | struct intel_panel *panel = &connector->panel; |
515 | enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; |
516 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
517 | |
518 | cpu_ctl2 = intel_de_read(i915, BLC_PWM_CPU_CTL2); |
519 | if (cpu_ctl2 & BLM_PWM_ENABLE) { |
520 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] CPU backlight already enabled\n" , |
521 | connector->base.base.id, connector->base.name); |
522 | cpu_ctl2 &= ~BLM_PWM_ENABLE; |
523 | intel_de_write(i915, BLC_PWM_CPU_CTL2, val: cpu_ctl2); |
524 | } |
525 | |
526 | pch_ctl1 = intel_de_read(i915, BLC_PWM_PCH_CTL1); |
527 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { |
528 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PCH backlight already enabled\n" , |
529 | connector->base.base.id, connector->base.name); |
530 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; |
531 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1); |
532 | } |
533 | |
534 | if (cpu_transcoder == TRANSCODER_EDP) |
535 | cpu_ctl2 = BLM_TRANSCODER_EDP; |
536 | else |
537 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
538 | intel_de_write(i915, BLC_PWM_CPU_CTL2, val: cpu_ctl2); |
539 | intel_de_posting_read(i915, BLC_PWM_CPU_CTL2); |
540 | intel_de_write(i915, BLC_PWM_CPU_CTL2, val: cpu_ctl2 | BLM_PWM_ENABLE); |
541 | |
542 | /* This won't stick until the above enable. */ |
543 | intel_backlight_set_pwm_level(conn_state, val: level); |
544 | |
545 | pch_ctl2 = panel->backlight.pwm_level_max << 16; |
546 | intel_de_write(i915, BLC_PWM_PCH_CTL2, val: pch_ctl2); |
547 | |
548 | pch_ctl1 = 0; |
549 | if (panel->backlight.active_low_pwm) |
550 | pch_ctl1 |= BLM_PCH_POLARITY; |
551 | |
552 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1); |
553 | intel_de_posting_read(i915, BLC_PWM_PCH_CTL1); |
554 | intel_de_write(i915, BLC_PWM_PCH_CTL1, val: pch_ctl1 | BLM_PCH_PWM_ENABLE); |
555 | } |
556 | |
557 | static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, |
558 | const struct drm_connector_state *conn_state, u32 level) |
559 | { |
560 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
561 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
562 | struct intel_panel *panel = &connector->panel; |
563 | u32 ctl, freq; |
564 | |
565 | ctl = intel_de_read(i915, BLC_PWM_CTL); |
566 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { |
567 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n" , |
568 | connector->base.base.id, connector->base.name); |
569 | intel_de_write(i915, BLC_PWM_CTL, val: 0); |
570 | } |
571 | |
572 | freq = panel->backlight.pwm_level_max; |
573 | if (panel->backlight.combination_mode) |
574 | freq /= 0xff; |
575 | |
576 | ctl = freq << 17; |
577 | if (panel->backlight.combination_mode) |
578 | ctl |= BLM_LEGACY_MODE; |
579 | if (IS_PINEVIEW(i915) && panel->backlight.active_low_pwm) |
580 | ctl |= BLM_POLARITY_PNV; |
581 | |
582 | intel_de_write(i915, BLC_PWM_CTL, val: ctl); |
583 | intel_de_posting_read(i915, BLC_PWM_CTL); |
584 | |
585 | /* XXX: combine this into above write? */ |
586 | intel_backlight_set_pwm_level(conn_state, val: level); |
587 | |
588 | /* |
589 | * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is |
590 | * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 |
591 | * that has backlight. |
592 | */ |
593 | if (DISPLAY_VER(i915) == 2) |
594 | intel_de_write(i915, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); |
595 | } |
596 | |
597 | static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, |
598 | const struct drm_connector_state *conn_state, u32 level) |
599 | { |
600 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
601 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
602 | struct intel_panel *panel = &connector->panel; |
603 | enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; |
604 | u32 ctl, ctl2, freq; |
605 | |
606 | ctl2 = intel_de_read(i915, BLC_PWM_CTL2); |
607 | if (ctl2 & BLM_PWM_ENABLE) { |
608 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n" , |
609 | connector->base.base.id, connector->base.name); |
610 | ctl2 &= ~BLM_PWM_ENABLE; |
611 | intel_de_write(i915, BLC_PWM_CTL2, val: ctl2); |
612 | } |
613 | |
614 | freq = panel->backlight.pwm_level_max; |
615 | if (panel->backlight.combination_mode) |
616 | freq /= 0xff; |
617 | |
618 | ctl = freq << 16; |
619 | intel_de_write(i915, BLC_PWM_CTL, val: ctl); |
620 | |
621 | ctl2 = BLM_PIPE(pipe); |
622 | if (panel->backlight.combination_mode) |
623 | ctl2 |= BLM_COMBINATION_MODE; |
624 | if (panel->backlight.active_low_pwm) |
625 | ctl2 |= BLM_POLARITY_I965; |
626 | intel_de_write(i915, BLC_PWM_CTL2, val: ctl2); |
627 | intel_de_posting_read(i915, BLC_PWM_CTL2); |
628 | intel_de_write(i915, BLC_PWM_CTL2, val: ctl2 | BLM_PWM_ENABLE); |
629 | |
630 | intel_backlight_set_pwm_level(conn_state, val: level); |
631 | } |
632 | |
633 | static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, |
634 | const struct drm_connector_state *conn_state, u32 level) |
635 | { |
636 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
637 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
638 | struct intel_panel *panel = &connector->panel; |
639 | enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
640 | u32 ctl, ctl2; |
641 | |
642 | ctl2 = intel_de_read(i915, VLV_BLC_PWM_CTL2(pipe)); |
643 | if (ctl2 & BLM_PWM_ENABLE) { |
644 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n" , |
645 | connector->base.base.id, connector->base.name); |
646 | ctl2 &= ~BLM_PWM_ENABLE; |
647 | intel_de_write(i915, VLV_BLC_PWM_CTL2(pipe), val: ctl2); |
648 | } |
649 | |
650 | ctl = panel->backlight.pwm_level_max << 16; |
651 | intel_de_write(i915, VLV_BLC_PWM_CTL(pipe), val: ctl); |
652 | |
653 | /* XXX: combine this into above write? */ |
654 | intel_backlight_set_pwm_level(conn_state, val: level); |
655 | |
656 | ctl2 = 0; |
657 | if (panel->backlight.active_low_pwm) |
658 | ctl2 |= BLM_POLARITY_I965; |
659 | intel_de_write(i915, VLV_BLC_PWM_CTL2(pipe), val: ctl2); |
660 | intel_de_posting_read(i915, VLV_BLC_PWM_CTL2(pipe)); |
661 | intel_de_write(i915, VLV_BLC_PWM_CTL2(pipe), val: ctl2 | BLM_PWM_ENABLE); |
662 | } |
663 | |
664 | static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, |
665 | const struct drm_connector_state *conn_state, u32 level) |
666 | { |
667 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
668 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
669 | struct intel_panel *panel = &connector->panel; |
670 | enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
671 | u32 pwm_ctl, val; |
672 | |
673 | /* Controller 1 uses the utility pin. */ |
674 | if (panel->backlight.controller == 1) { |
675 | val = intel_de_read(i915, UTIL_PIN_CTL); |
676 | if (val & UTIL_PIN_ENABLE) { |
677 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] utility pin already enabled\n" , |
678 | connector->base.base.id, connector->base.name); |
679 | val &= ~UTIL_PIN_ENABLE; |
680 | intel_de_write(i915, UTIL_PIN_CTL, val); |
681 | } |
682 | |
683 | val = 0; |
684 | if (panel->backlight.util_pin_active_low) |
685 | val |= UTIL_PIN_POLARITY; |
686 | intel_de_write(i915, UTIL_PIN_CTL, |
687 | val: val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); |
688 | } |
689 | |
690 | pwm_ctl = intel_de_read(i915, BXT_BLC_PWM_CTL(panel->backlight.controller)); |
691 | if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
692 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] backlight already enabled\n" , |
693 | connector->base.base.id, connector->base.name); |
694 | pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
695 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
696 | val: pwm_ctl); |
697 | } |
698 | |
699 | intel_de_write(i915, BXT_BLC_PWM_FREQ(panel->backlight.controller), |
700 | val: panel->backlight.pwm_level_max); |
701 | |
702 | intel_backlight_set_pwm_level(conn_state, val: level); |
703 | |
704 | pwm_ctl = 0; |
705 | if (panel->backlight.active_low_pwm) |
706 | pwm_ctl |= BXT_BLC_PWM_POLARITY; |
707 | |
708 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), val: pwm_ctl); |
709 | intel_de_posting_read(i915, BXT_BLC_PWM_CTL(panel->backlight.controller)); |
710 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
711 | val: pwm_ctl | BXT_BLC_PWM_ENABLE); |
712 | } |
713 | |
714 | static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, |
715 | const struct drm_connector_state *conn_state, u32 level) |
716 | { |
717 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
718 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
719 | struct intel_panel *panel = &connector->panel; |
720 | u32 pwm_ctl; |
721 | |
722 | pwm_ctl = intel_de_read(i915, BXT_BLC_PWM_CTL(panel->backlight.controller)); |
723 | if (pwm_ctl & BXT_BLC_PWM_ENABLE) { |
724 | drm_dbg_kms(&i915->drm, "backlight already enabled\n" ); |
725 | pwm_ctl &= ~BXT_BLC_PWM_ENABLE; |
726 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
727 | val: pwm_ctl); |
728 | } |
729 | |
730 | intel_de_write(i915, BXT_BLC_PWM_FREQ(panel->backlight.controller), |
731 | val: panel->backlight.pwm_level_max); |
732 | |
733 | intel_backlight_set_pwm_level(conn_state, val: level); |
734 | |
735 | pwm_ctl = 0; |
736 | if (panel->backlight.active_low_pwm) |
737 | pwm_ctl |= BXT_BLC_PWM_POLARITY; |
738 | |
739 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), val: pwm_ctl); |
740 | intel_de_posting_read(i915, BXT_BLC_PWM_CTL(panel->backlight.controller)); |
741 | intel_de_write(i915, BXT_BLC_PWM_CTL(panel->backlight.controller), |
742 | val: pwm_ctl | BXT_BLC_PWM_ENABLE); |
743 | } |
744 | |
745 | static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
746 | const struct drm_connector_state *conn_state, u32 level) |
747 | { |
748 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
749 | struct intel_panel *panel = &connector->panel; |
750 | |
751 | pwm_set_relative_duty_cycle(state: &panel->backlight.pwm_state, duty_cycle: level, scale: 100); |
752 | panel->backlight.pwm_state.enabled = true; |
753 | pwm_apply_might_sleep(pwm: panel->backlight.pwm, state: &panel->backlight.pwm_state); |
754 | } |
755 | |
756 | static void __intel_backlight_enable(const struct intel_crtc_state *crtc_state, |
757 | const struct drm_connector_state *conn_state) |
758 | { |
759 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
760 | struct intel_panel *panel = &connector->panel; |
761 | |
762 | WARN_ON(panel->backlight.max == 0); |
763 | |
764 | if (panel->backlight.level <= panel->backlight.min) { |
765 | panel->backlight.level = panel->backlight.max; |
766 | if (panel->backlight.device) |
767 | panel->backlight.device->props.brightness = |
768 | scale_hw_to_user(connector, |
769 | hw_level: panel->backlight.level, |
770 | user_max: panel->backlight.device->props.max_brightness); |
771 | } |
772 | |
773 | panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); |
774 | panel->backlight.enabled = true; |
775 | if (panel->backlight.device) |
776 | panel->backlight.device->props.power = FB_BLANK_UNBLANK; |
777 | } |
778 | |
779 | void intel_backlight_enable(const struct intel_crtc_state *crtc_state, |
780 | const struct drm_connector_state *conn_state) |
781 | { |
782 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
783 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
784 | struct intel_panel *panel = &connector->panel; |
785 | enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; |
786 | |
787 | if (!panel->backlight.present) |
788 | return; |
789 | |
790 | drm_dbg_kms(&i915->drm, "pipe %c\n" , pipe_name(pipe)); |
791 | |
792 | mutex_lock(&i915->display.backlight.lock); |
793 | |
794 | __intel_backlight_enable(crtc_state, conn_state); |
795 | |
796 | mutex_unlock(lock: &i915->display.backlight.lock); |
797 | } |
798 | |
799 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
800 | static u32 intel_panel_get_backlight(struct intel_connector *connector) |
801 | { |
802 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
803 | struct intel_panel *panel = &connector->panel; |
804 | u32 val = 0; |
805 | |
806 | mutex_lock(&i915->display.backlight.lock); |
807 | |
808 | if (panel->backlight.enabled) |
809 | val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); |
810 | |
811 | mutex_unlock(lock: &i915->display.backlight.lock); |
812 | |
813 | drm_dbg_kms(&i915->drm, "get backlight PWM = %d\n" , val); |
814 | return val; |
815 | } |
816 | |
817 | /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ |
818 | static u32 scale_user_to_hw(struct intel_connector *connector, |
819 | u32 user_level, u32 user_max) |
820 | { |
821 | struct intel_panel *panel = &connector->panel; |
822 | |
823 | return scale(source_val: user_level, source_min: 0, source_max: user_max, |
824 | target_min: panel->backlight.min, target_max: panel->backlight.max); |
825 | } |
826 | |
827 | /* set backlight brightness to level in range [0..max], scaling wrt hw min */ |
828 | static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, |
829 | u32 user_level, u32 user_max) |
830 | { |
831 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
832 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
833 | struct intel_panel *panel = &connector->panel; |
834 | u32 hw_level; |
835 | |
836 | if (!panel->backlight.present) |
837 | return; |
838 | |
839 | mutex_lock(&i915->display.backlight.lock); |
840 | |
841 | drm_WARN_ON(&i915->drm, panel->backlight.max == 0); |
842 | |
843 | hw_level = scale_user_to_hw(connector, user_level, user_max); |
844 | panel->backlight.level = hw_level; |
845 | |
846 | if (panel->backlight.enabled) |
847 | intel_panel_actually_set_backlight(conn_state, level: hw_level); |
848 | |
849 | mutex_unlock(lock: &i915->display.backlight.lock); |
850 | } |
851 | |
852 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
853 | { |
854 | struct intel_connector *connector = bl_get_data(bl_dev: bd); |
855 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
856 | struct intel_panel *panel = &connector->panel; |
857 | |
858 | drm_modeset_lock(lock: &i915->drm.mode_config.connection_mutex, NULL); |
859 | |
860 | drm_dbg_kms(&i915->drm, "updating intel_backlight, brightness=%d/%d\n" , |
861 | bd->props.brightness, bd->props.max_brightness); |
862 | intel_panel_set_backlight(conn_state: connector->base.state, user_level: bd->props.brightness, |
863 | user_max: bd->props.max_brightness); |
864 | |
865 | /* |
866 | * Allow flipping bl_power as a sub-state of enabled. Sadly the |
867 | * backlight class device does not make it easy to differentiate |
868 | * between callbacks for brightness and bl_power, so our backlight_power |
869 | * callback needs to take this into account. |
870 | */ |
871 | if (panel->backlight.enabled) { |
872 | if (panel->backlight.power) { |
873 | bool enable = bd->props.power == FB_BLANK_UNBLANK && |
874 | bd->props.brightness != 0; |
875 | panel->backlight.power(connector, enable); |
876 | } |
877 | } else { |
878 | bd->props.power = FB_BLANK_POWERDOWN; |
879 | } |
880 | |
881 | drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
882 | |
883 | return 0; |
884 | } |
885 | |
886 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
887 | { |
888 | struct intel_connector *connector = bl_get_data(bl_dev: bd); |
889 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
890 | intel_wakeref_t wakeref; |
891 | int ret = 0; |
892 | |
893 | with_intel_runtime_pm(&i915->runtime_pm, wakeref) { |
894 | u32 hw_level; |
895 | |
896 | drm_modeset_lock(lock: &i915->drm.mode_config.connection_mutex, NULL); |
897 | |
898 | hw_level = intel_panel_get_backlight(connector); |
899 | ret = scale_hw_to_user(connector, |
900 | hw_level, user_max: bd->props.max_brightness); |
901 | |
902 | drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
903 | } |
904 | |
905 | return ret; |
906 | } |
907 | |
908 | static const struct backlight_ops intel_backlight_device_ops = { |
909 | .update_status = intel_backlight_device_update_status, |
910 | .get_brightness = intel_backlight_device_get_brightness, |
911 | }; |
912 | |
913 | int intel_backlight_device_register(struct intel_connector *connector) |
914 | { |
915 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
916 | struct intel_panel *panel = &connector->panel; |
917 | struct backlight_properties props; |
918 | struct backlight_device *bd; |
919 | const char *name; |
920 | int ret = 0; |
921 | |
922 | if (WARN_ON(panel->backlight.device)) |
923 | return -ENODEV; |
924 | |
925 | if (!panel->backlight.present) |
926 | return 0; |
927 | |
928 | WARN_ON(panel->backlight.max == 0); |
929 | |
930 | if (!acpi_video_backlight_use_native()) { |
931 | drm_info(&i915->drm, "Skipping intel_backlight registration\n" ); |
932 | return 0; |
933 | } |
934 | |
935 | memset(&props, 0, sizeof(props)); |
936 | props.type = BACKLIGHT_RAW; |
937 | |
938 | /* |
939 | * Note: Everything should work even if the backlight device max |
940 | * presented to the userspace is arbitrarily chosen. |
941 | */ |
942 | props.max_brightness = panel->backlight.max; |
943 | props.brightness = scale_hw_to_user(connector, |
944 | hw_level: panel->backlight.level, |
945 | user_max: props.max_brightness); |
946 | |
947 | if (panel->backlight.enabled) |
948 | props.power = FB_BLANK_UNBLANK; |
949 | else |
950 | props.power = FB_BLANK_POWERDOWN; |
951 | |
952 | name = kstrdup(s: "intel_backlight" , GFP_KERNEL); |
953 | if (!name) |
954 | return -ENOMEM; |
955 | |
956 | bd = backlight_device_get_by_name(name); |
957 | if (bd) { |
958 | put_device(dev: &bd->dev); |
959 | /* |
960 | * Using the same name independent of the drm device or connector |
961 | * prevents registration of multiple backlight devices in the |
962 | * driver. However, we need to use the default name for backward |
963 | * compatibility. Use unique names for subsequent backlight devices as a |
964 | * fallback when the default name already exists. |
965 | */ |
966 | kfree(objp: name); |
967 | name = kasprintf(GFP_KERNEL, fmt: "card%d-%s-backlight" , |
968 | i915->drm.primary->index, connector->base.name); |
969 | if (!name) |
970 | return -ENOMEM; |
971 | } |
972 | bd = backlight_device_register(name, dev: connector->base.kdev, devdata: connector, |
973 | ops: &intel_backlight_device_ops, props: &props); |
974 | |
975 | if (IS_ERR(ptr: bd)) { |
976 | drm_err(&i915->drm, |
977 | "[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n" , |
978 | connector->base.base.id, connector->base.name, name, PTR_ERR(bd)); |
979 | ret = PTR_ERR(ptr: bd); |
980 | goto out; |
981 | } |
982 | |
983 | panel->backlight.device = bd; |
984 | |
985 | drm_dbg_kms(&i915->drm, |
986 | "[CONNECTOR:%d:%s] backlight device %s registered\n" , |
987 | connector->base.base.id, connector->base.name, name); |
988 | |
989 | out: |
990 | kfree(objp: name); |
991 | |
992 | return ret; |
993 | } |
994 | |
995 | void intel_backlight_device_unregister(struct intel_connector *connector) |
996 | { |
997 | struct intel_panel *panel = &connector->panel; |
998 | |
999 | if (panel->backlight.device) { |
1000 | backlight_device_unregister(bd: panel->backlight.device); |
1001 | panel->backlight.device = NULL; |
1002 | } |
1003 | } |
1004 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
1005 | |
1006 | /* |
1007 | * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. |
1008 | * PWM increment = 1 |
1009 | */ |
1010 | static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1011 | { |
1012 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1013 | |
1014 | return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), |
1015 | pwm_freq_hz); |
1016 | } |
1017 | |
1018 | /* |
1019 | * BXT: PWM clock frequency = 19.2 MHz. |
1020 | */ |
1021 | static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1022 | { |
1023 | return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); |
1024 | } |
1025 | |
1026 | /* |
1027 | * SPT: This value represents the period of the PWM stream in clock periods |
1028 | * multiplied by 16 (default increment) or 128 (alternate increment selected in |
1029 | * SCHICKEN_1 bit 0). PWM clock is 24 MHz. |
1030 | */ |
1031 | static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1032 | { |
1033 | struct intel_panel *panel = &connector->panel; |
1034 | u32 mul; |
1035 | |
1036 | if (panel->backlight.alternate_pwm_increment) |
1037 | mul = 128; |
1038 | else |
1039 | mul = 16; |
1040 | |
1041 | return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); |
1042 | } |
1043 | |
1044 | /* |
1045 | * LPT: This value represents the period of the PWM stream in clock periods |
1046 | * multiplied by 128 (default increment) or 16 (alternate increment, selected in |
1047 | * LPT SOUTH_CHICKEN2 register bit 5). |
1048 | */ |
1049 | static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1050 | { |
1051 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1052 | struct intel_panel *panel = &connector->panel; |
1053 | u32 mul, clock; |
1054 | |
1055 | if (panel->backlight.alternate_pwm_increment) |
1056 | mul = 16; |
1057 | else |
1058 | mul = 128; |
1059 | |
1060 | if (HAS_PCH_LPT_H(i915)) |
1061 | clock = MHz(135); /* LPT:H */ |
1062 | else |
1063 | clock = MHz(24); /* LPT:LP */ |
1064 | |
1065 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
1066 | } |
1067 | |
1068 | /* |
1069 | * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH |
1070 | * display raw clocks multiplied by 128. |
1071 | */ |
1072 | static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1073 | { |
1074 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1075 | |
1076 | return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), |
1077 | pwm_freq_hz * 128); |
1078 | } |
1079 | |
1080 | /* |
1081 | * Gen2: This field determines the number of time base events (display core |
1082 | * clock frequency/32) in total for a complete cycle of modulated backlight |
1083 | * control. |
1084 | * |
1085 | * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) |
1086 | * divided by 32. |
1087 | */ |
1088 | static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1089 | { |
1090 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1091 | int clock; |
1092 | |
1093 | if (IS_PINEVIEW(i915)) |
1094 | clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); |
1095 | else |
1096 | clock = KHz(i915->display.cdclk.hw.cdclk); |
1097 | |
1098 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); |
1099 | } |
1100 | |
1101 | /* |
1102 | * Gen4: This value represents the period of the PWM stream in display core |
1103 | * clocks ([DevCTG] HRAW clocks) multiplied by 128. |
1104 | * |
1105 | */ |
1106 | static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1107 | { |
1108 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1109 | int clock; |
1110 | |
1111 | if (IS_G4X(i915)) |
1112 | clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); |
1113 | else |
1114 | clock = KHz(i915->display.cdclk.hw.cdclk); |
1115 | |
1116 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); |
1117 | } |
1118 | |
1119 | /* |
1120 | * VLV: This value represents the period of the PWM stream in display core |
1121 | * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks |
1122 | * multiplied by 16. CHV uses a 19.2MHz S0IX clock. |
1123 | */ |
1124 | static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) |
1125 | { |
1126 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1127 | int mul, clock; |
1128 | |
1129 | if ((intel_de_read(i915, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { |
1130 | if (IS_CHERRYVIEW(i915)) |
1131 | clock = KHz(19200); |
1132 | else |
1133 | clock = MHz(25); |
1134 | mul = 16; |
1135 | } else { |
1136 | clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); |
1137 | mul = 128; |
1138 | } |
1139 | |
1140 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); |
1141 | } |
1142 | |
1143 | static u16 get_vbt_pwm_freq(struct intel_connector *connector) |
1144 | { |
1145 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1146 | u16 pwm_freq_hz = connector->panel.vbt.backlight.pwm_freq_hz; |
1147 | |
1148 | if (pwm_freq_hz) { |
1149 | drm_dbg_kms(&i915->drm, |
1150 | "VBT defined backlight frequency %u Hz\n" , |
1151 | pwm_freq_hz); |
1152 | } else { |
1153 | pwm_freq_hz = 200; |
1154 | drm_dbg_kms(&i915->drm, |
1155 | "default backlight frequency %u Hz\n" , |
1156 | pwm_freq_hz); |
1157 | } |
1158 | |
1159 | return pwm_freq_hz; |
1160 | } |
1161 | |
1162 | static u32 get_backlight_max_vbt(struct intel_connector *connector) |
1163 | { |
1164 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1165 | struct intel_panel *panel = &connector->panel; |
1166 | u16 pwm_freq_hz = get_vbt_pwm_freq(connector); |
1167 | u32 pwm; |
1168 | |
1169 | if (!panel->backlight.pwm_funcs->hz_to_pwm) { |
1170 | drm_dbg_kms(&i915->drm, |
1171 | "backlight frequency conversion not supported\n" ); |
1172 | return 0; |
1173 | } |
1174 | |
1175 | pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); |
1176 | if (!pwm) { |
1177 | drm_dbg_kms(&i915->drm, |
1178 | "backlight frequency conversion failed\n" ); |
1179 | return 0; |
1180 | } |
1181 | |
1182 | return pwm; |
1183 | } |
1184 | |
1185 | /* |
1186 | * Note: The setup hooks can't assume pipe is set! |
1187 | */ |
1188 | static u32 get_backlight_min_vbt(struct intel_connector *connector) |
1189 | { |
1190 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1191 | struct intel_panel *panel = &connector->panel; |
1192 | int min; |
1193 | |
1194 | drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0); |
1195 | |
1196 | /* |
1197 | * XXX: If the vbt value is 255, it makes min equal to max, which leads |
1198 | * to problems. There are such machines out there. Either our |
1199 | * interpretation is wrong or the vbt has bogus data. Or both. Safeguard |
1200 | * against this by letting the minimum be at most (arbitrarily chosen) |
1201 | * 25% of the max. |
1202 | */ |
1203 | min = clamp_t(int, connector->panel.vbt.backlight.min_brightness, 0, 64); |
1204 | if (min != connector->panel.vbt.backlight.min_brightness) { |
1205 | drm_dbg_kms(&i915->drm, |
1206 | "clamping VBT min backlight %d/255 to %d/255\n" , |
1207 | connector->panel.vbt.backlight.min_brightness, min); |
1208 | } |
1209 | |
1210 | /* vbt value is a coefficient in range [0..255] */ |
1211 | return scale(source_val: min, source_min: 0, source_max: 255, target_min: 0, target_max: panel->backlight.pwm_level_max); |
1212 | } |
1213 | |
1214 | static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1215 | { |
1216 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1217 | struct intel_panel *panel = &connector->panel; |
1218 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
1219 | bool alt, cpu_mode; |
1220 | |
1221 | if (HAS_PCH_LPT(i915)) |
1222 | alt = intel_de_read(i915, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; |
1223 | else |
1224 | alt = intel_de_read(i915, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; |
1225 | panel->backlight.alternate_pwm_increment = alt; |
1226 | |
1227 | pch_ctl1 = intel_de_read(i915, BLC_PWM_PCH_CTL1); |
1228 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
1229 | |
1230 | pch_ctl2 = intel_de_read(i915, BLC_PWM_PCH_CTL2); |
1231 | panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
1232 | |
1233 | cpu_ctl2 = intel_de_read(i915, BLC_PWM_CPU_CTL2); |
1234 | |
1235 | if (!panel->backlight.pwm_level_max) |
1236 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1237 | |
1238 | if (!panel->backlight.pwm_level_max) |
1239 | return -ENODEV; |
1240 | |
1241 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1242 | |
1243 | panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; |
1244 | |
1245 | cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(i915) && |
1246 | !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && |
1247 | (cpu_ctl2 & BLM_PWM_ENABLE); |
1248 | |
1249 | if (cpu_mode) { |
1250 | val = pch_get_backlight(connector, unused); |
1251 | |
1252 | drm_dbg_kms(&i915->drm, |
1253 | "CPU backlight register was enabled, switching to PCH override\n" ); |
1254 | |
1255 | /* Write converted CPU PWM value to PCH override register */ |
1256 | lpt_set_backlight(conn_state: connector->base.state, level: val); |
1257 | intel_de_write(i915, BLC_PWM_PCH_CTL1, |
1258 | val: pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); |
1259 | |
1260 | intel_de_write(i915, BLC_PWM_CPU_CTL2, |
1261 | val: cpu_ctl2 & ~BLM_PWM_ENABLE); |
1262 | } |
1263 | |
1264 | drm_dbg_kms(&i915->drm, |
1265 | "[CONNECTOR:%d:%s] Using native PCH PWM for backlight control\n" , |
1266 | connector->base.base.id, connector->base.name); |
1267 | |
1268 | return 0; |
1269 | } |
1270 | |
1271 | static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1272 | { |
1273 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1274 | struct intel_panel *panel = &connector->panel; |
1275 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
1276 | |
1277 | pch_ctl1 = intel_de_read(i915, BLC_PWM_PCH_CTL1); |
1278 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; |
1279 | |
1280 | pch_ctl2 = intel_de_read(i915, BLC_PWM_PCH_CTL2); |
1281 | panel->backlight.pwm_level_max = pch_ctl2 >> 16; |
1282 | |
1283 | if (!panel->backlight.pwm_level_max) |
1284 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1285 | |
1286 | if (!panel->backlight.pwm_level_max) |
1287 | return -ENODEV; |
1288 | |
1289 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1290 | |
1291 | cpu_ctl2 = intel_de_read(i915, BLC_PWM_CPU_CTL2); |
1292 | panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && |
1293 | (pch_ctl1 & BLM_PCH_PWM_ENABLE); |
1294 | |
1295 | drm_dbg_kms(&i915->drm, |
1296 | "[CONNECTOR:%d:%s] Using native PCH PWM for backlight control\n" , |
1297 | connector->base.base.id, connector->base.name); |
1298 | |
1299 | return 0; |
1300 | } |
1301 | |
1302 | static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1303 | { |
1304 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1305 | struct intel_panel *panel = &connector->panel; |
1306 | u32 ctl, val; |
1307 | |
1308 | ctl = intel_de_read(i915, BLC_PWM_CTL); |
1309 | |
1310 | if (DISPLAY_VER(i915) == 2 || IS_I915GM(i915) || IS_I945GM(i915)) |
1311 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; |
1312 | |
1313 | if (IS_PINEVIEW(i915)) |
1314 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; |
1315 | |
1316 | panel->backlight.pwm_level_max = ctl >> 17; |
1317 | |
1318 | if (!panel->backlight.pwm_level_max) { |
1319 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1320 | panel->backlight.pwm_level_max >>= 1; |
1321 | } |
1322 | |
1323 | if (!panel->backlight.pwm_level_max) |
1324 | return -ENODEV; |
1325 | |
1326 | if (panel->backlight.combination_mode) |
1327 | panel->backlight.pwm_level_max *= 0xff; |
1328 | |
1329 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1330 | |
1331 | val = i9xx_get_backlight(connector, unused); |
1332 | val = intel_backlight_invert_pwm_level(connector, val); |
1333 | val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); |
1334 | |
1335 | panel->backlight.pwm_enabled = val != 0; |
1336 | |
1337 | drm_dbg_kms(&i915->drm, |
1338 | "[CONNECTOR:%d:%s] Using native PWM for backlight control\n" , |
1339 | connector->base.base.id, connector->base.name); |
1340 | |
1341 | return 0; |
1342 | } |
1343 | |
1344 | static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1345 | { |
1346 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1347 | struct intel_panel *panel = &connector->panel; |
1348 | u32 ctl, ctl2; |
1349 | |
1350 | ctl2 = intel_de_read(i915, BLC_PWM_CTL2); |
1351 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; |
1352 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1353 | |
1354 | ctl = intel_de_read(i915, BLC_PWM_CTL); |
1355 | panel->backlight.pwm_level_max = ctl >> 16; |
1356 | |
1357 | if (!panel->backlight.pwm_level_max) |
1358 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1359 | |
1360 | if (!panel->backlight.pwm_level_max) |
1361 | return -ENODEV; |
1362 | |
1363 | if (panel->backlight.combination_mode) |
1364 | panel->backlight.pwm_level_max *= 0xff; |
1365 | |
1366 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1367 | |
1368 | panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
1369 | |
1370 | drm_dbg_kms(&i915->drm, |
1371 | "[CONNECTOR:%d:%s] Using native PWM for backlight control\n" , |
1372 | connector->base.base.id, connector->base.name); |
1373 | |
1374 | return 0; |
1375 | } |
1376 | |
1377 | static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
1378 | { |
1379 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1380 | struct intel_panel *panel = &connector->panel; |
1381 | u32 ctl, ctl2; |
1382 | |
1383 | if (drm_WARN_ON(&i915->drm, pipe != PIPE_A && pipe != PIPE_B)) |
1384 | return -ENODEV; |
1385 | |
1386 | ctl2 = intel_de_read(i915, VLV_BLC_PWM_CTL2(pipe)); |
1387 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1388 | |
1389 | ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe)); |
1390 | panel->backlight.pwm_level_max = ctl >> 16; |
1391 | |
1392 | if (!panel->backlight.pwm_level_max) |
1393 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1394 | |
1395 | if (!panel->backlight.pwm_level_max) |
1396 | return -ENODEV; |
1397 | |
1398 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1399 | |
1400 | panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; |
1401 | |
1402 | drm_dbg_kms(&i915->drm, |
1403 | "[CONNECTOR:%d:%s] Using native PWM for backlight control (on pipe %c)\n" , |
1404 | connector->base.base.id, connector->base.name, pipe_name(pipe)); |
1405 | |
1406 | return 0; |
1407 | } |
1408 | |
1409 | static int |
1410 | bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1411 | { |
1412 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1413 | struct intel_panel *panel = &connector->panel; |
1414 | u32 pwm_ctl, val; |
1415 | |
1416 | panel->backlight.controller = connector->panel.vbt.backlight.controller; |
1417 | |
1418 | pwm_ctl = intel_de_read(i915, |
1419 | BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1420 | |
1421 | /* Controller 1 uses the utility pin. */ |
1422 | if (panel->backlight.controller == 1) { |
1423 | val = intel_de_read(i915, UTIL_PIN_CTL); |
1424 | panel->backlight.util_pin_active_low = |
1425 | val & UTIL_PIN_POLARITY; |
1426 | } |
1427 | |
1428 | panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
1429 | panel->backlight.pwm_level_max = |
1430 | intel_de_read(i915, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
1431 | |
1432 | if (!panel->backlight.pwm_level_max) |
1433 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1434 | |
1435 | if (!panel->backlight.pwm_level_max) |
1436 | return -ENODEV; |
1437 | |
1438 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1439 | |
1440 | panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
1441 | |
1442 | drm_dbg_kms(&i915->drm, |
1443 | "[CONNECTOR:%d:%s] Using native PWM for backlight control (controller=%d)\n" , |
1444 | connector->base.base.id, connector->base.name, |
1445 | panel->backlight.controller); |
1446 | |
1447 | return 0; |
1448 | } |
1449 | |
1450 | static int cnp_num_backlight_controllers(struct drm_i915_private *i915) |
1451 | { |
1452 | if (INTEL_PCH_TYPE(i915) >= PCH_DG1) |
1453 | return 1; |
1454 | |
1455 | if (INTEL_PCH_TYPE(i915) >= PCH_ICP) |
1456 | return 2; |
1457 | |
1458 | return 1; |
1459 | } |
1460 | |
1461 | static bool cnp_backlight_controller_is_valid(struct drm_i915_private *i915, int controller) |
1462 | { |
1463 | if (controller < 0 || controller >= cnp_num_backlight_controllers(i915)) |
1464 | return false; |
1465 | |
1466 | if (controller == 1 && |
1467 | INTEL_PCH_TYPE(i915) >= PCH_ICP && |
1468 | INTEL_PCH_TYPE(i915) <= PCH_ADP) |
1469 | return intel_de_read(i915, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT; |
1470 | |
1471 | return true; |
1472 | } |
1473 | |
1474 | static int |
1475 | cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) |
1476 | { |
1477 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1478 | struct intel_panel *panel = &connector->panel; |
1479 | u32 pwm_ctl; |
1480 | |
1481 | /* |
1482 | * CNP has the BXT implementation of backlight, but with only one |
1483 | * controller. ICP+ can have two controllers, depending on pin muxing. |
1484 | */ |
1485 | panel->backlight.controller = connector->panel.vbt.backlight.controller; |
1486 | if (!cnp_backlight_controller_is_valid(i915, controller: panel->backlight.controller)) { |
1487 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Invalid backlight controller %d, assuming 0\n" , |
1488 | connector->base.base.id, connector->base.name, |
1489 | panel->backlight.controller); |
1490 | panel->backlight.controller = 0; |
1491 | } |
1492 | |
1493 | pwm_ctl = intel_de_read(i915, |
1494 | BXT_BLC_PWM_CTL(panel->backlight.controller)); |
1495 | |
1496 | panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; |
1497 | panel->backlight.pwm_level_max = |
1498 | intel_de_read(i915, BXT_BLC_PWM_FREQ(panel->backlight.controller)); |
1499 | |
1500 | if (!panel->backlight.pwm_level_max) |
1501 | panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); |
1502 | |
1503 | if (!panel->backlight.pwm_level_max) |
1504 | return -ENODEV; |
1505 | |
1506 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1507 | |
1508 | panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; |
1509 | |
1510 | drm_dbg_kms(&i915->drm, |
1511 | "[CONNECTOR:%d:%s] Using native PCH PWM for backlight control (controller=%d)\n" , |
1512 | connector->base.base.id, connector->base.name, |
1513 | panel->backlight.controller); |
1514 | |
1515 | return 0; |
1516 | } |
1517 | |
1518 | static int ext_pwm_setup_backlight(struct intel_connector *connector, |
1519 | enum pipe pipe) |
1520 | { |
1521 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1522 | struct intel_panel *panel = &connector->panel; |
1523 | const char *desc; |
1524 | u32 level; |
1525 | |
1526 | /* Get the right PWM chip for DSI backlight according to VBT */ |
1527 | if (connector->panel.vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { |
1528 | panel->backlight.pwm = pwm_get(dev: i915->drm.dev, con_id: "pwm_pmic_backlight" ); |
1529 | desc = "PMIC" ; |
1530 | } else { |
1531 | panel->backlight.pwm = pwm_get(dev: i915->drm.dev, con_id: "pwm_soc_backlight" ); |
1532 | desc = "SoC" ; |
1533 | } |
1534 | |
1535 | if (IS_ERR(ptr: panel->backlight.pwm)) { |
1536 | drm_err(&i915->drm, "[CONNECTOR:%d:%s] Failed to get the %s PWM chip\n" , |
1537 | connector->base.base.id, connector->base.name, desc); |
1538 | panel->backlight.pwm = NULL; |
1539 | return -ENODEV; |
1540 | } |
1541 | |
1542 | panel->backlight.pwm_level_max = 100; /* 100% */ |
1543 | panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); |
1544 | |
1545 | if (pwm_is_enabled(pwm: panel->backlight.pwm)) { |
1546 | /* PWM is already enabled, use existing settings */ |
1547 | pwm_get_state(pwm: panel->backlight.pwm, state: &panel->backlight.pwm_state); |
1548 | |
1549 | level = pwm_get_relative_duty_cycle(state: &panel->backlight.pwm_state, |
1550 | scale: 100); |
1551 | level = intel_backlight_invert_pwm_level(connector, val: level); |
1552 | panel->backlight.pwm_enabled = true; |
1553 | |
1554 | drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] PWM already enabled at freq %ld, VBT freq %d, level %d\n" , |
1555 | connector->base.base.id, connector->base.name, |
1556 | NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, |
1557 | get_vbt_pwm_freq(connector), level); |
1558 | } else { |
1559 | /* Set period from VBT frequency, leave other settings at 0. */ |
1560 | panel->backlight.pwm_state.period = |
1561 | NSEC_PER_SEC / get_vbt_pwm_freq(connector); |
1562 | } |
1563 | |
1564 | drm_dbg_kms(&i915->drm, |
1565 | "[CONNECTOR:%d:%s] Using %s PWM for backlight control\n" , |
1566 | connector->base.base.id, connector->base.name, desc); |
1567 | |
1568 | return 0; |
1569 | } |
1570 | |
1571 | static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) |
1572 | { |
1573 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1574 | struct intel_panel *panel = &connector->panel; |
1575 | |
1576 | panel->backlight.pwm_funcs->set(conn_state, |
1577 | intel_backlight_invert_pwm_level(connector, val: level)); |
1578 | } |
1579 | |
1580 | static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) |
1581 | { |
1582 | struct intel_panel *panel = &connector->panel; |
1583 | |
1584 | return intel_backlight_invert_pwm_level(connector, |
1585 | val: panel->backlight.pwm_funcs->get(connector, pipe)); |
1586 | } |
1587 | |
1588 | static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, |
1589 | const struct drm_connector_state *conn_state, u32 level) |
1590 | { |
1591 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1592 | struct intel_panel *panel = &connector->panel; |
1593 | |
1594 | panel->backlight.pwm_funcs->enable(crtc_state, conn_state, |
1595 | intel_backlight_invert_pwm_level(connector, val: level)); |
1596 | } |
1597 | |
1598 | static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) |
1599 | { |
1600 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1601 | struct intel_panel *panel = &connector->panel; |
1602 | |
1603 | panel->backlight.pwm_funcs->disable(conn_state, |
1604 | intel_backlight_invert_pwm_level(connector, val: level)); |
1605 | } |
1606 | |
1607 | static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
1608 | { |
1609 | struct intel_panel *panel = &connector->panel; |
1610 | int ret; |
1611 | |
1612 | ret = panel->backlight.pwm_funcs->setup(connector, pipe); |
1613 | if (ret < 0) |
1614 | return ret; |
1615 | |
1616 | panel->backlight.min = panel->backlight.pwm_level_min; |
1617 | panel->backlight.max = panel->backlight.pwm_level_max; |
1618 | panel->backlight.level = intel_pwm_get_backlight(connector, pipe); |
1619 | panel->backlight.enabled = panel->backlight.pwm_enabled; |
1620 | |
1621 | return 0; |
1622 | } |
1623 | |
1624 | void intel_backlight_update(struct intel_atomic_state *state, |
1625 | struct intel_encoder *encoder, |
1626 | const struct intel_crtc_state *crtc_state, |
1627 | const struct drm_connector_state *conn_state) |
1628 | { |
1629 | struct intel_connector *connector = to_intel_connector(conn_state->connector); |
1630 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1631 | struct intel_panel *panel = &connector->panel; |
1632 | |
1633 | if (!panel->backlight.present) |
1634 | return; |
1635 | |
1636 | mutex_lock(&i915->display.backlight.lock); |
1637 | if (!panel->backlight.enabled) |
1638 | __intel_backlight_enable(crtc_state, conn_state); |
1639 | |
1640 | mutex_unlock(lock: &i915->display.backlight.lock); |
1641 | } |
1642 | |
1643 | int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe) |
1644 | { |
1645 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1646 | struct intel_panel *panel = &connector->panel; |
1647 | int ret; |
1648 | |
1649 | if (!connector->panel.vbt.backlight.present) { |
1650 | if (intel_has_quirk(i915, quirk: QUIRK_BACKLIGHT_PRESENT)) { |
1651 | drm_dbg_kms(&i915->drm, |
1652 | "[CONNECTOR:%d:%s] no backlight present per VBT, but present per quirk\n" , |
1653 | connector->base.base.id, connector->base.name); |
1654 | } else { |
1655 | drm_dbg_kms(&i915->drm, |
1656 | "[CONNECTOR:%d:%s] no backlight present per VBT\n" , |
1657 | connector->base.base.id, connector->base.name); |
1658 | return 0; |
1659 | } |
1660 | } |
1661 | |
1662 | /* ensure intel_panel has been initialized first */ |
1663 | if (drm_WARN_ON(&i915->drm, !panel->backlight.funcs)) |
1664 | return -ENODEV; |
1665 | |
1666 | /* set level and max in panel struct */ |
1667 | mutex_lock(&i915->display.backlight.lock); |
1668 | ret = panel->backlight.funcs->setup(connector, pipe); |
1669 | mutex_unlock(lock: &i915->display.backlight.lock); |
1670 | |
1671 | if (ret) { |
1672 | drm_dbg_kms(&i915->drm, |
1673 | "[CONNECTOR:%d:%s] failed to setup backlight\n" , |
1674 | connector->base.base.id, connector->base.name); |
1675 | return ret; |
1676 | } |
1677 | |
1678 | panel->backlight.present = true; |
1679 | |
1680 | drm_dbg_kms(&i915->drm, |
1681 | "[CONNECTOR:%d:%s] backlight initialized, %s, brightness %u/%u\n" , |
1682 | connector->base.base.id, connector->base.name, |
1683 | str_enabled_disabled(panel->backlight.enabled), |
1684 | panel->backlight.level, panel->backlight.max); |
1685 | |
1686 | return 0; |
1687 | } |
1688 | |
1689 | void intel_backlight_destroy(struct intel_panel *panel) |
1690 | { |
1691 | /* dispose of the pwm */ |
1692 | if (panel->backlight.pwm) |
1693 | pwm_put(pwm: panel->backlight.pwm); |
1694 | |
1695 | panel->backlight.present = false; |
1696 | } |
1697 | |
1698 | static const struct intel_panel_bl_funcs bxt_pwm_funcs = { |
1699 | .setup = bxt_setup_backlight, |
1700 | .enable = bxt_enable_backlight, |
1701 | .disable = bxt_disable_backlight, |
1702 | .set = bxt_set_backlight, |
1703 | .get = bxt_get_backlight, |
1704 | .hz_to_pwm = bxt_hz_to_pwm, |
1705 | }; |
1706 | |
1707 | static const struct intel_panel_bl_funcs cnp_pwm_funcs = { |
1708 | .setup = cnp_setup_backlight, |
1709 | .enable = cnp_enable_backlight, |
1710 | .disable = cnp_disable_backlight, |
1711 | .set = bxt_set_backlight, |
1712 | .get = bxt_get_backlight, |
1713 | .hz_to_pwm = cnp_hz_to_pwm, |
1714 | }; |
1715 | |
1716 | static const struct intel_panel_bl_funcs lpt_pwm_funcs = { |
1717 | .setup = lpt_setup_backlight, |
1718 | .enable = lpt_enable_backlight, |
1719 | .disable = lpt_disable_backlight, |
1720 | .set = lpt_set_backlight, |
1721 | .get = lpt_get_backlight, |
1722 | .hz_to_pwm = lpt_hz_to_pwm, |
1723 | }; |
1724 | |
1725 | static const struct intel_panel_bl_funcs spt_pwm_funcs = { |
1726 | .setup = lpt_setup_backlight, |
1727 | .enable = lpt_enable_backlight, |
1728 | .disable = lpt_disable_backlight, |
1729 | .set = lpt_set_backlight, |
1730 | .get = lpt_get_backlight, |
1731 | .hz_to_pwm = spt_hz_to_pwm, |
1732 | }; |
1733 | |
1734 | static const struct intel_panel_bl_funcs pch_pwm_funcs = { |
1735 | .setup = pch_setup_backlight, |
1736 | .enable = pch_enable_backlight, |
1737 | .disable = pch_disable_backlight, |
1738 | .set = pch_set_backlight, |
1739 | .get = pch_get_backlight, |
1740 | .hz_to_pwm = pch_hz_to_pwm, |
1741 | }; |
1742 | |
1743 | static const struct intel_panel_bl_funcs ext_pwm_funcs = { |
1744 | .setup = ext_pwm_setup_backlight, |
1745 | .enable = ext_pwm_enable_backlight, |
1746 | .disable = ext_pwm_disable_backlight, |
1747 | .set = ext_pwm_set_backlight, |
1748 | .get = ext_pwm_get_backlight, |
1749 | }; |
1750 | |
1751 | static const struct intel_panel_bl_funcs vlv_pwm_funcs = { |
1752 | .setup = vlv_setup_backlight, |
1753 | .enable = vlv_enable_backlight, |
1754 | .disable = vlv_disable_backlight, |
1755 | .set = vlv_set_backlight, |
1756 | .get = vlv_get_backlight, |
1757 | .hz_to_pwm = vlv_hz_to_pwm, |
1758 | }; |
1759 | |
1760 | static const struct intel_panel_bl_funcs i965_pwm_funcs = { |
1761 | .setup = i965_setup_backlight, |
1762 | .enable = i965_enable_backlight, |
1763 | .disable = i965_disable_backlight, |
1764 | .set = i9xx_set_backlight, |
1765 | .get = i9xx_get_backlight, |
1766 | .hz_to_pwm = i965_hz_to_pwm, |
1767 | }; |
1768 | |
1769 | static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { |
1770 | .setup = i9xx_setup_backlight, |
1771 | .enable = i9xx_enable_backlight, |
1772 | .disable = i9xx_disable_backlight, |
1773 | .set = i9xx_set_backlight, |
1774 | .get = i9xx_get_backlight, |
1775 | .hz_to_pwm = i9xx_hz_to_pwm, |
1776 | }; |
1777 | |
1778 | static const struct intel_panel_bl_funcs pwm_bl_funcs = { |
1779 | .setup = intel_pwm_setup_backlight, |
1780 | .enable = intel_pwm_enable_backlight, |
1781 | .disable = intel_pwm_disable_backlight, |
1782 | .set = intel_pwm_set_backlight, |
1783 | .get = intel_pwm_get_backlight, |
1784 | }; |
1785 | |
1786 | /* Set up chip specific backlight functions */ |
1787 | void intel_backlight_init_funcs(struct intel_panel *panel) |
1788 | { |
1789 | struct intel_connector *connector = |
1790 | container_of(panel, struct intel_connector, panel); |
1791 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1792 | |
1793 | if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && |
1794 | intel_dsi_dcs_init_backlight_funcs(intel_connector: connector) == 0) |
1795 | return; |
1796 | |
1797 | if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { |
1798 | panel->backlight.pwm_funcs = &bxt_pwm_funcs; |
1799 | } else if (INTEL_PCH_TYPE(i915) >= PCH_CNP) { |
1800 | panel->backlight.pwm_funcs = &cnp_pwm_funcs; |
1801 | } else if (INTEL_PCH_TYPE(i915) >= PCH_LPT) { |
1802 | if (HAS_PCH_LPT(i915)) |
1803 | panel->backlight.pwm_funcs = &lpt_pwm_funcs; |
1804 | else |
1805 | panel->backlight.pwm_funcs = &spt_pwm_funcs; |
1806 | } else if (HAS_PCH_SPLIT(i915)) { |
1807 | panel->backlight.pwm_funcs = &pch_pwm_funcs; |
1808 | } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { |
1809 | if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { |
1810 | panel->backlight.pwm_funcs = &ext_pwm_funcs; |
1811 | } else { |
1812 | panel->backlight.pwm_funcs = &vlv_pwm_funcs; |
1813 | } |
1814 | } else if (DISPLAY_VER(i915) == 4) { |
1815 | panel->backlight.pwm_funcs = &i965_pwm_funcs; |
1816 | } else { |
1817 | panel->backlight.pwm_funcs = &i9xx_pwm_funcs; |
1818 | } |
1819 | |
1820 | if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) { |
1821 | if (intel_dp_aux_init_backlight_funcs(intel_connector: connector) == 0) |
1822 | return; |
1823 | |
1824 | if (!intel_has_quirk(i915, quirk: QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK)) |
1825 | connector->panel.backlight.power = intel_pps_backlight_power; |
1826 | } |
1827 | |
1828 | /* We're using a standard PWM backlight interface */ |
1829 | panel->backlight.funcs = &pwm_bl_funcs; |
1830 | } |
1831 | |