1 | /* SPDX-License-Identifier: MIT */ |
2 | /* |
3 | * Copyright © 2019 Intel Corporation |
4 | */ |
5 | |
6 | #ifndef __INTEL_DDI_H__ |
7 | #define __INTEL_DDI_H__ |
8 | |
9 | #include "i915_reg_defs.h" |
10 | |
11 | struct drm_connector_state; |
12 | struct drm_i915_private; |
13 | struct intel_atomic_state; |
14 | struct intel_bios_encoder_data; |
15 | struct intel_connector; |
16 | struct intel_crtc; |
17 | struct intel_crtc_state; |
18 | struct intel_dp; |
19 | struct intel_dpll_hw_state; |
20 | struct intel_encoder; |
21 | struct intel_shared_dpll; |
22 | enum pipe; |
23 | enum port; |
24 | enum transcoder; |
25 | |
26 | i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder, |
27 | const struct intel_crtc_state *crtc_state); |
28 | i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder, |
29 | const struct intel_crtc_state *crtc_state); |
30 | i915_reg_t hsw_chicken_trans_reg(struct drm_i915_private *i915, |
31 | enum transcoder cpu_transcoder); |
32 | void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, |
33 | struct intel_encoder *intel_encoder, |
34 | const struct intel_crtc_state *old_crtc_state, |
35 | const struct drm_connector_state *old_conn_state); |
36 | void intel_ddi_enable_clock(struct intel_encoder *encoder, |
37 | const struct intel_crtc_state *crtc_state); |
38 | void intel_ddi_disable_clock(struct intel_encoder *encoder); |
39 | void intel_ddi_get_clock(struct intel_encoder *encoder, |
40 | struct intel_crtc_state *crtc_state, |
41 | struct intel_shared_dpll *pll); |
42 | void hsw_ddi_enable_clock(struct intel_encoder *encoder, |
43 | const struct intel_crtc_state *crtc_state); |
44 | void hsw_ddi_disable_clock(struct intel_encoder *encoder); |
45 | bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder); |
46 | enum icl_port_dpll_id |
47 | intel_ddi_port_pll_type(struct intel_encoder *encoder, |
48 | const struct intel_crtc_state *crtc_state); |
49 | void hsw_ddi_get_config(struct intel_encoder *encoder, |
50 | struct intel_crtc_state *crtc_state); |
51 | struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder); |
52 | void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, |
53 | const struct intel_crtc_state *crtc_state); |
54 | void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, |
55 | enum port port); |
56 | void intel_ddi_init(struct drm_i915_private *dev_priv, |
57 | const struct intel_bios_encoder_data *devdata); |
58 | bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); |
59 | void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder, |
60 | const struct intel_crtc_state *crtc_state); |
61 | void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); |
62 | void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder, |
63 | const struct intel_crtc_state *crtc_state); |
64 | void intel_ddi_disable_transcoder_clock(const struct intel_crtc_state *crtc_state); |
65 | void intel_ddi_wait_for_fec_status(struct intel_encoder *encoder, |
66 | const struct intel_crtc_state *crtc_state, |
67 | bool enabled); |
68 | void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, |
69 | const struct drm_connector_state *conn_state); |
70 | bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
71 | void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, |
72 | bool state); |
73 | void intel_ddi_compute_min_voltage_level(struct intel_crtc_state *crtc_state); |
74 | int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, |
75 | enum transcoder cpu_transcoder, |
76 | bool enable, u32 hdcp_mask); |
77 | void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); |
78 | int intel_ddi_level(struct intel_encoder *encoder, |
79 | const struct intel_crtc_state *crtc_state, |
80 | int lane); |
81 | void intel_ddi_update_active_dpll(struct intel_atomic_state *state, |
82 | struct intel_encoder *encoder, |
83 | struct intel_crtc *crtc); |
84 | |
85 | #endif /* __INTEL_DDI_H__ */ |
86 | |