1 | /* |
2 | * Copyright © 2013 Intel Corporation |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice (including the next |
12 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * Software. |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
21 | * DEALINGS IN THE SOFTWARE. |
22 | */ |
23 | |
24 | #ifndef _INTEL_DSI_H |
25 | #define _INTEL_DSI_H |
26 | |
27 | #include <drm/drm_crtc.h> |
28 | #include <drm/drm_mipi_dsi.h> |
29 | |
30 | #include "intel_display_types.h" |
31 | |
32 | #define INTEL_DSI_VIDEO_MODE 0 |
33 | #define INTEL_DSI_COMMAND_MODE 1 |
34 | |
35 | /* Dual Link support */ |
36 | #define DSI_DUAL_LINK_NONE 0 |
37 | #define DSI_DUAL_LINK_FRONT_BACK 1 |
38 | #define DSI_DUAL_LINK_PIXEL_ALT 2 |
39 | |
40 | struct intel_dsi_host; |
41 | |
42 | struct intel_dsi { |
43 | struct intel_encoder base; |
44 | |
45 | struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; |
46 | intel_wakeref_t io_wakeref[I915_MAX_PORTS]; |
47 | |
48 | /* GPIO Desc for panel and backlight control */ |
49 | struct gpio_desc *gpio_panel; |
50 | struct gpio_desc *gpio_backlight; |
51 | |
52 | struct intel_connector *attached_connector; |
53 | |
54 | /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */ |
55 | union { |
56 | u16 ports; /* VLV DSI */ |
57 | u16 phys; /* ICL DSI */ |
58 | }; |
59 | |
60 | /* virtual channel */ |
61 | int channel; |
62 | |
63 | /* Video mode or command mode */ |
64 | u16 operation_mode; |
65 | |
66 | /* number of DSI lanes */ |
67 | unsigned int lane_count; |
68 | |
69 | /* i2c bus associated with the slave device */ |
70 | int i2c_bus_num; |
71 | |
72 | /* |
73 | * video mode pixel format |
74 | * |
75 | * XXX: consolidate on .format in struct mipi_dsi_device. |
76 | */ |
77 | enum mipi_dsi_pixel_format pixel_format; |
78 | |
79 | /* NON_BURST_SYNC_PULSE, NON_BURST_SYNC_EVENTS, or BURST_MODE */ |
80 | int video_mode; |
81 | |
82 | /* eot for MIPI_EOT_DISABLE register */ |
83 | u8 eotp_pkt; |
84 | u8 clock_stop; |
85 | |
86 | u8 escape_clk_div; |
87 | u8 dual_link; |
88 | |
89 | /* RGB or BGR */ |
90 | bool bgr_enabled; |
91 | |
92 | u8 pixel_overlap; |
93 | u32 bw_timer; |
94 | u32 dphy_reg; |
95 | |
96 | /* data lanes dphy timing */ |
97 | u32 dphy_data_lane_reg; |
98 | u32 video_frmt_cfg_bits; |
99 | u16 lp_byte_clk; |
100 | |
101 | /* timeouts in byte clocks */ |
102 | u16 hs_tx_timeout; |
103 | u16 lp_rx_timeout; |
104 | u16 turn_arnd_val; |
105 | u16 rst_timer_val; |
106 | u16 hs_to_lp_count; |
107 | u16 clk_lp_to_hs_count; |
108 | u16 clk_hs_to_lp_count; |
109 | |
110 | u16 init_count; |
111 | u32 pclk; |
112 | u16 burst_mode_ratio; |
113 | |
114 | /* all delays in ms */ |
115 | u16 backlight_off_delay; |
116 | u16 backlight_on_delay; |
117 | u16 panel_on_delay; |
118 | u16 panel_off_delay; |
119 | u16 panel_pwr_cycle_delay; |
120 | ktime_t panel_power_off_time; |
121 | }; |
122 | |
123 | struct intel_dsi_host { |
124 | struct mipi_dsi_host base; |
125 | struct intel_dsi *intel_dsi; |
126 | enum port port; |
127 | |
128 | /* our little hack */ |
129 | struct mipi_dsi_device *device; |
130 | }; |
131 | |
132 | static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) |
133 | { |
134 | return container_of(h, struct intel_dsi_host, base); |
135 | } |
136 | |
137 | #define for_each_dsi_port(__port, __ports_mask) \ |
138 | for_each_port_masked(__port, __ports_mask) |
139 | #define for_each_dsi_phy(__phy, __phys_mask) \ |
140 | for_each_phy_masked(__phy, __phys_mask) |
141 | |
142 | static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder) |
143 | { |
144 | return container_of(&encoder->base, struct intel_dsi, base.base); |
145 | } |
146 | |
147 | static inline bool is_vid_mode(struct intel_dsi *intel_dsi) |
148 | { |
149 | return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; |
150 | } |
151 | |
152 | static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) |
153 | { |
154 | return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE; |
155 | } |
156 | |
157 | static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) |
158 | { |
159 | return enc_to_intel_dsi(encoder)->ports; |
160 | } |
161 | |
162 | int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); |
163 | int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi); |
164 | enum drm_panel_orientation |
165 | intel_dsi_get_panel_orientation(struct intel_connector *connector); |
166 | int intel_dsi_get_modes(struct drm_connector *connector); |
167 | enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, |
168 | struct drm_display_mode *mode); |
169 | struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, |
170 | const struct mipi_dsi_host_ops *funcs, |
171 | enum port port); |
172 | void intel_dsi_wait_panel_power_cycle(struct intel_dsi *intel_dsi); |
173 | void intel_dsi_shutdown(struct intel_encoder *encoder); |
174 | |
175 | #endif /* _INTEL_DSI_H */ |
176 | |