1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (c) 2022 MediaTek Corporation. All rights reserved. |
4 | * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> |
5 | */ |
6 | |
7 | #include <linux/interrupt.h> |
8 | #include <linux/io.h> |
9 | #include <linux/iopoll.h> |
10 | #include <linux/kernel.h> |
11 | #include <linux/mailbox_controller.h> |
12 | #include <linux/module.h> |
13 | #include <linux/of.h> |
14 | #include <linux/platform_device.h> |
15 | #include <linux/slab.h> |
16 | |
17 | struct mtk_adsp_mbox_priv { |
18 | struct device *dev; |
19 | struct mbox_controller mbox; |
20 | void __iomem *va_mboxreg; |
21 | const struct mtk_adsp_mbox_cfg *cfg; |
22 | }; |
23 | |
24 | struct mtk_adsp_mbox_cfg { |
25 | u32 set_in; |
26 | u32 set_out; |
27 | u32 clr_in; |
28 | u32 clr_out; |
29 | }; |
30 | |
31 | static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox) |
32 | { |
33 | return container_of(mbox, struct mtk_adsp_mbox_priv, mbox); |
34 | } |
35 | |
36 | static irqreturn_t mtk_adsp_mbox_irq(int irq, void *data) |
37 | { |
38 | struct mbox_chan *chan = data; |
39 | struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(mbox: chan->mbox); |
40 | u32 op = readl(addr: priv->va_mboxreg + priv->cfg->set_out); |
41 | |
42 | writel(val: op, addr: priv->va_mboxreg + priv->cfg->clr_out); |
43 | |
44 | return IRQ_WAKE_THREAD; |
45 | } |
46 | |
47 | static irqreturn_t mtk_adsp_mbox_isr(int irq, void *data) |
48 | { |
49 | struct mbox_chan *chan = data; |
50 | |
51 | mbox_chan_received_data(chan, NULL); |
52 | |
53 | return IRQ_HANDLED; |
54 | } |
55 | |
56 | static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox, |
57 | const struct of_phandle_args *sp) |
58 | { |
59 | return mbox->chans; |
60 | } |
61 | |
62 | static int mtk_adsp_mbox_startup(struct mbox_chan *chan) |
63 | { |
64 | struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(mbox: chan->mbox); |
65 | |
66 | /* Clear ADSP mbox command */ |
67 | writel(val: 0xFFFFFFFF, addr: priv->va_mboxreg + priv->cfg->clr_in); |
68 | writel(val: 0xFFFFFFFF, addr: priv->va_mboxreg + priv->cfg->clr_out); |
69 | |
70 | return 0; |
71 | } |
72 | |
73 | static void mtk_adsp_mbox_shutdown(struct mbox_chan *chan) |
74 | { |
75 | struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(mbox: chan->mbox); |
76 | |
77 | /* Clear ADSP mbox command */ |
78 | writel(val: 0xFFFFFFFF, addr: priv->va_mboxreg + priv->cfg->clr_in); |
79 | writel(val: 0xFFFFFFFF, addr: priv->va_mboxreg + priv->cfg->clr_out); |
80 | } |
81 | |
82 | static int mtk_adsp_mbox_send_data(struct mbox_chan *chan, void *data) |
83 | { |
84 | struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(mbox: chan->mbox); |
85 | u32 *msg = data; |
86 | |
87 | writel(val: *msg, addr: priv->va_mboxreg + priv->cfg->set_in); |
88 | |
89 | return 0; |
90 | } |
91 | |
92 | static bool mtk_adsp_mbox_last_tx_done(struct mbox_chan *chan) |
93 | { |
94 | struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(mbox: chan->mbox); |
95 | |
96 | return readl(addr: priv->va_mboxreg + priv->cfg->set_in) == 0; |
97 | } |
98 | |
99 | static const struct mbox_chan_ops mtk_adsp_mbox_chan_ops = { |
100 | .send_data = mtk_adsp_mbox_send_data, |
101 | .startup = mtk_adsp_mbox_startup, |
102 | .shutdown = mtk_adsp_mbox_shutdown, |
103 | .last_tx_done = mtk_adsp_mbox_last_tx_done, |
104 | }; |
105 | |
106 | static int mtk_adsp_mbox_probe(struct platform_device *pdev) |
107 | { |
108 | struct device *dev = &pdev->dev; |
109 | struct mtk_adsp_mbox_priv *priv; |
110 | const struct mtk_adsp_mbox_cfg *cfg; |
111 | struct mbox_controller *mbox; |
112 | int ret, irq; |
113 | |
114 | priv = devm_kzalloc(dev, size: sizeof(*priv), GFP_KERNEL); |
115 | if (!priv) |
116 | return -ENOMEM; |
117 | |
118 | mbox = &priv->mbox; |
119 | mbox->dev = dev; |
120 | mbox->ops = &mtk_adsp_mbox_chan_ops; |
121 | mbox->txdone_irq = false; |
122 | mbox->txdone_poll = true; |
123 | mbox->of_xlate = mtk_adsp_mbox_xlate; |
124 | mbox->num_chans = 1; |
125 | mbox->chans = devm_kzalloc(dev, size: sizeof(*mbox->chans), GFP_KERNEL); |
126 | if (!mbox->chans) |
127 | return -ENOMEM; |
128 | |
129 | priv->va_mboxreg = devm_platform_ioremap_resource(pdev, index: 0); |
130 | if (IS_ERR(ptr: priv->va_mboxreg)) |
131 | return PTR_ERR(ptr: priv->va_mboxreg); |
132 | |
133 | cfg = of_device_get_match_data(dev); |
134 | if (!cfg) |
135 | return -EINVAL; |
136 | priv->cfg = cfg; |
137 | |
138 | irq = platform_get_irq(pdev, 0); |
139 | if (irq < 0) |
140 | return irq; |
141 | |
142 | ret = devm_request_threaded_irq(dev, irq, handler: mtk_adsp_mbox_irq, |
143 | thread_fn: mtk_adsp_mbox_isr, IRQF_TRIGGER_NONE, |
144 | devname: dev_name(dev), dev_id: mbox->chans); |
145 | if (ret < 0) |
146 | return ret; |
147 | |
148 | platform_set_drvdata(pdev, data: priv); |
149 | |
150 | return devm_mbox_controller_register(dev, mbox: &priv->mbox); |
151 | } |
152 | |
153 | static const struct mtk_adsp_mbox_cfg mt8186_adsp_mbox_cfg = { |
154 | .set_in = 0x00, |
155 | .set_out = 0x04, |
156 | .clr_in = 0x08, |
157 | .clr_out = 0x0C, |
158 | }; |
159 | |
160 | static const struct mtk_adsp_mbox_cfg mt8195_adsp_mbox_cfg = { |
161 | .set_in = 0x00, |
162 | .set_out = 0x1c, |
163 | .clr_in = 0x04, |
164 | .clr_out = 0x20, |
165 | }; |
166 | |
167 | static const struct of_device_id mtk_adsp_mbox_of_match[] = { |
168 | { .compatible = "mediatek,mt8186-adsp-mbox" , .data = &mt8186_adsp_mbox_cfg }, |
169 | { .compatible = "mediatek,mt8195-adsp-mbox" , .data = &mt8195_adsp_mbox_cfg }, |
170 | {}, |
171 | }; |
172 | MODULE_DEVICE_TABLE(of, mtk_adsp_mbox_of_match); |
173 | |
174 | static struct platform_driver mtk_adsp_mbox_driver = { |
175 | .probe = mtk_adsp_mbox_probe, |
176 | .driver = { |
177 | .name = "mtk_adsp_mbox" , |
178 | .of_match_table = mtk_adsp_mbox_of_match, |
179 | }, |
180 | }; |
181 | module_platform_driver(mtk_adsp_mbox_driver); |
182 | |
183 | MODULE_AUTHOR("Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>" ); |
184 | MODULE_DESCRIPTION("MTK ADSP Mailbox Controller" ); |
185 | MODULE_LICENSE("GPL v2" ); |
186 | |