1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Broadcom GENET MDIO routines |
4 | * |
5 | * Copyright (c) 2014-2017 Broadcom |
6 | */ |
7 | |
8 | #include <linux/acpi.h> |
9 | #include <linux/types.h> |
10 | #include <linux/delay.h> |
11 | #include <linux/wait.h> |
12 | #include <linux/mii.h> |
13 | #include <linux/ethtool.h> |
14 | #include <linux/bitops.h> |
15 | #include <linux/netdevice.h> |
16 | #include <linux/platform_device.h> |
17 | #include <linux/phy.h> |
18 | #include <linux/phy_fixed.h> |
19 | #include <linux/brcmphy.h> |
20 | #include <linux/of.h> |
21 | #include <linux/of_net.h> |
22 | #include <linux/of_mdio.h> |
23 | #include <linux/platform_data/bcmgenet.h> |
24 | #include <linux/platform_data/mdio-bcm-unimac.h> |
25 | |
26 | #include "bcmgenet.h" |
27 | |
28 | static void bcmgenet_mac_config(struct net_device *dev) |
29 | { |
30 | struct bcmgenet_priv *priv = netdev_priv(dev); |
31 | struct phy_device *phydev = dev->phydev; |
32 | u32 reg, cmd_bits = 0; |
33 | bool active; |
34 | |
35 | /* speed */ |
36 | if (phydev->speed == SPEED_1000) |
37 | cmd_bits = CMD_SPEED_1000; |
38 | else if (phydev->speed == SPEED_100) |
39 | cmd_bits = CMD_SPEED_100; |
40 | else |
41 | cmd_bits = CMD_SPEED_10; |
42 | cmd_bits <<= CMD_SPEED_SHIFT; |
43 | |
44 | /* duplex */ |
45 | if (phydev->duplex != DUPLEX_FULL) { |
46 | cmd_bits |= CMD_HD_EN | |
47 | CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; |
48 | } else { |
49 | /* pause capability defaults to Symmetric */ |
50 | if (priv->autoneg_pause) { |
51 | bool tx_pause = 0, rx_pause = 0; |
52 | |
53 | if (phydev->autoneg) |
54 | phy_get_pause(phydev, tx_pause: &tx_pause, rx_pause: &rx_pause); |
55 | |
56 | if (!tx_pause) |
57 | cmd_bits |= CMD_TX_PAUSE_IGNORE; |
58 | if (!rx_pause) |
59 | cmd_bits |= CMD_RX_PAUSE_IGNORE; |
60 | } |
61 | |
62 | /* Manual override */ |
63 | if (!priv->rx_pause) |
64 | cmd_bits |= CMD_RX_PAUSE_IGNORE; |
65 | if (!priv->tx_pause) |
66 | cmd_bits |= CMD_TX_PAUSE_IGNORE; |
67 | } |
68 | |
69 | /* Program UMAC and RGMII block based on established |
70 | * link speed, duplex, and pause. The speed set in |
71 | * umac->cmd tell RGMII block which clock to use for |
72 | * transmit -- 25MHz(100Mbps) or 125MHz(1Gbps). |
73 | * Receive clock is provided by the PHY. |
74 | */ |
75 | reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL); |
76 | reg |= RGMII_LINK; |
77 | bcmgenet_ext_writel(priv, val: reg, EXT_RGMII_OOB_CTRL); |
78 | |
79 | reg = bcmgenet_umac_readl(priv, UMAC_CMD); |
80 | reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | |
81 | CMD_HD_EN | |
82 | CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE); |
83 | reg |= cmd_bits; |
84 | if (reg & CMD_SW_RESET) { |
85 | reg &= ~CMD_SW_RESET; |
86 | bcmgenet_umac_writel(priv, val: reg, UMAC_CMD); |
87 | udelay(2); |
88 | reg |= CMD_TX_EN | CMD_RX_EN; |
89 | } |
90 | bcmgenet_umac_writel(priv, val: reg, UMAC_CMD); |
91 | |
92 | active = phy_init_eee(phydev, clk_stop_enable: 0) >= 0; |
93 | bcmgenet_eee_enable_set(dev, |
94 | enable: priv->eee.eee_enabled && active, |
95 | tx_lpi_enabled: priv->eee.tx_lpi_enabled); |
96 | } |
97 | |
98 | /* setup netdev link state when PHY link status change and |
99 | * update UMAC and RGMII block when link up |
100 | */ |
101 | void bcmgenet_mii_setup(struct net_device *dev) |
102 | { |
103 | struct bcmgenet_priv *priv = netdev_priv(dev); |
104 | struct phy_device *phydev = dev->phydev; |
105 | u32 reg; |
106 | |
107 | if (phydev->link) { |
108 | bcmgenet_mac_config(dev); |
109 | } else { |
110 | reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL); |
111 | reg &= ~RGMII_LINK; |
112 | bcmgenet_ext_writel(priv, val: reg, EXT_RGMII_OOB_CTRL); |
113 | } |
114 | |
115 | phy_print_status(phydev); |
116 | } |
117 | |
118 | |
119 | static int bcmgenet_fixed_phy_link_update(struct net_device *dev, |
120 | struct fixed_phy_status *status) |
121 | { |
122 | struct bcmgenet_priv *priv; |
123 | u32 reg; |
124 | |
125 | if (dev && dev->phydev && status) { |
126 | priv = netdev_priv(dev); |
127 | reg = bcmgenet_umac_readl(priv, UMAC_MODE); |
128 | status->link = !!(reg & MODE_LINK_STATUS); |
129 | } |
130 | |
131 | return 0; |
132 | } |
133 | |
134 | void bcmgenet_phy_pause_set(struct net_device *dev, bool rx, bool tx) |
135 | { |
136 | struct phy_device *phydev = dev->phydev; |
137 | |
138 | linkmode_mod_bit(nr: ETHTOOL_LINK_MODE_Pause_BIT, addr: phydev->advertising, set: rx); |
139 | linkmode_mod_bit(nr: ETHTOOL_LINK_MODE_Asym_Pause_BIT, addr: phydev->advertising, |
140 | set: rx | tx); |
141 | phy_start_aneg(phydev); |
142 | |
143 | mutex_lock(&phydev->lock); |
144 | if (phydev->link) |
145 | bcmgenet_mac_config(dev); |
146 | mutex_unlock(lock: &phydev->lock); |
147 | } |
148 | |
149 | void bcmgenet_phy_power_set(struct net_device *dev, bool enable) |
150 | { |
151 | struct bcmgenet_priv *priv = netdev_priv(dev); |
152 | u32 reg = 0; |
153 | |
154 | /* EXT_GPHY_CTRL is only valid for GENETv4 and onward */ |
155 | if (GENET_IS_V4(priv) || priv->ephy_16nm) { |
156 | reg = bcmgenet_ext_readl(priv, EXT_GPHY_CTRL); |
157 | if (enable) { |
158 | reg &= ~EXT_CK25_DIS; |
159 | bcmgenet_ext_writel(priv, val: reg, EXT_GPHY_CTRL); |
160 | mdelay(1); |
161 | |
162 | reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN | |
163 | EXT_CFG_IDDQ_GLOBAL_PWR); |
164 | reg |= EXT_GPHY_RESET; |
165 | bcmgenet_ext_writel(priv, val: reg, EXT_GPHY_CTRL); |
166 | mdelay(1); |
167 | |
168 | reg &= ~EXT_GPHY_RESET; |
169 | } else { |
170 | reg |= EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN | |
171 | EXT_GPHY_RESET | EXT_CFG_IDDQ_GLOBAL_PWR; |
172 | bcmgenet_ext_writel(priv, val: reg, EXT_GPHY_CTRL); |
173 | mdelay(1); |
174 | reg |= EXT_CK25_DIS; |
175 | } |
176 | bcmgenet_ext_writel(priv, val: reg, EXT_GPHY_CTRL); |
177 | udelay(60); |
178 | } else { |
179 | mdelay(1); |
180 | } |
181 | } |
182 | |
183 | static void bcmgenet_moca_phy_setup(struct bcmgenet_priv *priv) |
184 | { |
185 | if (priv->hw_params->flags & GENET_HAS_MOCA_LINK_DET) |
186 | fixed_phy_set_link_update(phydev: priv->dev->phydev, |
187 | link_update: bcmgenet_fixed_phy_link_update); |
188 | } |
189 | |
190 | int bcmgenet_mii_config(struct net_device *dev, bool init) |
191 | { |
192 | struct bcmgenet_priv *priv = netdev_priv(dev); |
193 | struct phy_device *phydev = dev->phydev; |
194 | struct device *kdev = &priv->pdev->dev; |
195 | const char *phy_name = NULL; |
196 | u32 id_mode_dis = 0; |
197 | u32 port_ctrl; |
198 | u32 reg; |
199 | |
200 | switch (priv->phy_interface) { |
201 | case PHY_INTERFACE_MODE_INTERNAL: |
202 | phy_name = "internal PHY" ; |
203 | fallthrough; |
204 | case PHY_INTERFACE_MODE_MOCA: |
205 | /* Irrespective of the actually configured PHY speed (100 or |
206 | * 1000) GENETv4 only has an internal GPHY so we will just end |
207 | * up masking the Gigabit features from what we support, not |
208 | * switching to the EPHY |
209 | */ |
210 | if (GENET_IS_V4(priv)) |
211 | port_ctrl = PORT_MODE_INT_GPHY; |
212 | else |
213 | port_ctrl = PORT_MODE_INT_EPHY; |
214 | |
215 | if (!phy_name) { |
216 | phy_name = "MoCA" ; |
217 | if (!GENET_IS_V5(priv)) |
218 | port_ctrl |= LED_ACT_SOURCE_MAC; |
219 | bcmgenet_moca_phy_setup(priv); |
220 | } |
221 | break; |
222 | |
223 | case PHY_INTERFACE_MODE_MII: |
224 | phy_name = "external MII" ; |
225 | phy_set_max_speed(phydev, SPEED_100); |
226 | port_ctrl = PORT_MODE_EXT_EPHY; |
227 | break; |
228 | |
229 | case PHY_INTERFACE_MODE_REVMII: |
230 | phy_name = "external RvMII" ; |
231 | /* of_mdiobus_register took care of reading the 'max-speed' |
232 | * PHY property for us, effectively limiting the PHY supported |
233 | * capabilities, use that knowledge to also configure the |
234 | * Reverse MII interface correctly. |
235 | */ |
236 | if (linkmode_test_bit(nr: ETHTOOL_LINK_MODE_1000baseT_Full_BIT, |
237 | addr: dev->phydev->supported)) |
238 | port_ctrl = PORT_MODE_EXT_RVMII_50; |
239 | else |
240 | port_ctrl = PORT_MODE_EXT_RVMII_25; |
241 | break; |
242 | |
243 | case PHY_INTERFACE_MODE_RGMII: |
244 | /* RGMII_NO_ID: TXC transitions at the same time as TXD |
245 | * (requires PCB or receiver-side delay) |
246 | * |
247 | * ID is implicitly disabled for 100Mbps (RG)MII operation. |
248 | */ |
249 | phy_name = "external RGMII (no delay)" ; |
250 | id_mode_dis = BIT(16); |
251 | port_ctrl = PORT_MODE_EXT_GPHY; |
252 | break; |
253 | |
254 | case PHY_INTERFACE_MODE_RGMII_TXID: |
255 | /* RGMII_TXID: Add 2ns delay on TXC (90 degree shift) */ |
256 | phy_name = "external RGMII (TX delay)" ; |
257 | port_ctrl = PORT_MODE_EXT_GPHY; |
258 | break; |
259 | |
260 | case PHY_INTERFACE_MODE_RGMII_RXID: |
261 | phy_name = "external RGMII (RX delay)" ; |
262 | port_ctrl = PORT_MODE_EXT_GPHY; |
263 | break; |
264 | default: |
265 | dev_err(kdev, "unknown phy mode: %d\n" , priv->phy_interface); |
266 | return -EINVAL; |
267 | } |
268 | |
269 | bcmgenet_sys_writel(priv, val: port_ctrl, SYS_PORT_CTRL); |
270 | |
271 | priv->ext_phy = !priv->internal_phy && |
272 | (priv->phy_interface != PHY_INTERFACE_MODE_MOCA); |
273 | |
274 | /* This is an external PHY (xMII), so we need to enable the RGMII |
275 | * block for the interface to work, unconditionally clear the |
276 | * Out-of-band disable since we do not need it. |
277 | */ |
278 | reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL); |
279 | reg &= ~OOB_DISABLE; |
280 | if (priv->ext_phy) { |
281 | reg &= ~ID_MODE_DIS; |
282 | reg |= id_mode_dis; |
283 | if (GENET_IS_V1(priv) || GENET_IS_V2(priv) || GENET_IS_V3(priv)) |
284 | reg |= RGMII_MODE_EN_V123; |
285 | else |
286 | reg |= RGMII_MODE_EN; |
287 | } |
288 | bcmgenet_ext_writel(priv, val: reg, EXT_RGMII_OOB_CTRL); |
289 | |
290 | if (init) |
291 | dev_info(kdev, "configuring instance for %s\n" , phy_name); |
292 | |
293 | return 0; |
294 | } |
295 | |
296 | int bcmgenet_mii_probe(struct net_device *dev) |
297 | { |
298 | struct bcmgenet_priv *priv = netdev_priv(dev); |
299 | struct device *kdev = &priv->pdev->dev; |
300 | struct device_node *dn = kdev->of_node; |
301 | phy_interface_t phy_iface = priv->phy_interface; |
302 | struct phy_device *phydev; |
303 | u32 phy_flags = PHY_BRCM_AUTO_PWRDWN_ENABLE | |
304 | PHY_BRCM_DIS_TXCRXC_NOENRGY | |
305 | PHY_BRCM_IDDQ_SUSPEND; |
306 | int ret; |
307 | |
308 | /* Communicate the integrated PHY revision */ |
309 | if (priv->internal_phy) |
310 | phy_flags = priv->gphy_rev; |
311 | |
312 | /* This is an ugly quirk but we have not been correctly interpreting |
313 | * the phy_interface values and we have done that across different |
314 | * drivers, so at least we are consistent in our mistakes. |
315 | * |
316 | * When the Generic PHY driver is in use either the PHY has been |
317 | * strapped or programmed correctly by the boot loader so we should |
318 | * stick to our incorrect interpretation since we have validated it. |
319 | * |
320 | * Now when a dedicated PHY driver is in use, we need to reverse the |
321 | * meaning of the phy_interface_mode values to something that the PHY |
322 | * driver will interpret and act on such that we have two mistakes |
323 | * canceling themselves so to speak. We only do this for the two |
324 | * modes that GENET driver officially supports on Broadcom STB chips: |
325 | * PHY_INTERFACE_MODE_RGMII and PHY_INTERFACE_MODE_RGMII_TXID. Other |
326 | * modes are not *officially* supported with the boot loader and the |
327 | * scripted environment generating Device Tree blobs for those |
328 | * platforms. |
329 | * |
330 | * Note that internal PHY, MoCA and fixed-link configurations are not |
331 | * affected because they use different phy_interface_t values or the |
332 | * Generic PHY driver. |
333 | */ |
334 | switch (priv->phy_interface) { |
335 | case PHY_INTERFACE_MODE_RGMII: |
336 | phy_iface = PHY_INTERFACE_MODE_RGMII_ID; |
337 | break; |
338 | case PHY_INTERFACE_MODE_RGMII_TXID: |
339 | phy_iface = PHY_INTERFACE_MODE_RGMII_RXID; |
340 | break; |
341 | default: |
342 | break; |
343 | } |
344 | |
345 | if (dn) { |
346 | phydev = of_phy_connect(dev, phy_np: priv->phy_dn, hndlr: bcmgenet_mii_setup, |
347 | flags: phy_flags, iface: phy_iface); |
348 | if (!phydev) { |
349 | pr_err("could not attach to PHY\n" ); |
350 | return -ENODEV; |
351 | } |
352 | } else { |
353 | if (has_acpi_companion(dev: kdev)) { |
354 | char mdio_bus_id[MII_BUS_ID_SIZE]; |
355 | struct mii_bus *unimacbus; |
356 | |
357 | snprintf(buf: mdio_bus_id, MII_BUS_ID_SIZE, fmt: "%s-%d" , |
358 | UNIMAC_MDIO_DRV_NAME, priv->pdev->id); |
359 | |
360 | unimacbus = mdio_find_bus(mdio_name: mdio_bus_id); |
361 | if (!unimacbus) { |
362 | pr_err("Unable to find mii\n" ); |
363 | return -ENODEV; |
364 | } |
365 | phydev = phy_find_first(bus: unimacbus); |
366 | put_device(dev: &unimacbus->dev); |
367 | if (!phydev) { |
368 | pr_err("Unable to find PHY\n" ); |
369 | return -ENODEV; |
370 | } |
371 | } else { |
372 | phydev = dev->phydev; |
373 | } |
374 | phydev->dev_flags = phy_flags; |
375 | |
376 | ret = phy_connect_direct(dev, phydev, handler: bcmgenet_mii_setup, |
377 | interface: phy_iface); |
378 | if (ret) { |
379 | pr_err("could not attach to PHY\n" ); |
380 | return -ENODEV; |
381 | } |
382 | } |
383 | |
384 | /* Configure port multiplexer based on what the probed PHY device since |
385 | * reading the 'max-speed' property determines the maximum supported |
386 | * PHY speed which is needed for bcmgenet_mii_config() to configure |
387 | * things appropriately. |
388 | */ |
389 | ret = bcmgenet_mii_config(dev, init: true); |
390 | if (ret) { |
391 | phy_disconnect(phydev: dev->phydev); |
392 | return ret; |
393 | } |
394 | |
395 | /* The internal PHY has its link interrupts routed to the |
396 | * Ethernet MAC ISRs. On GENETv5 there is a hardware issue |
397 | * that prevents the signaling of link UP interrupts when |
398 | * the link operates at 10Mbps, so fallback to polling for |
399 | * those versions of GENET. |
400 | */ |
401 | if (priv->internal_phy && !GENET_IS_V5(priv)) |
402 | dev->phydev->irq = PHY_MAC_INTERRUPT; |
403 | |
404 | /* Indicate that the MAC is responsible for PHY PM */ |
405 | dev->phydev->mac_managed_pm = true; |
406 | |
407 | return 0; |
408 | } |
409 | |
410 | static struct device_node *bcmgenet_mii_of_find_mdio(struct bcmgenet_priv *priv) |
411 | { |
412 | struct device_node *dn = priv->pdev->dev.of_node; |
413 | struct device *kdev = &priv->pdev->dev; |
414 | char *compat; |
415 | |
416 | compat = kasprintf(GFP_KERNEL, fmt: "brcm,genet-mdio-v%d" , priv->version); |
417 | if (!compat) |
418 | return NULL; |
419 | |
420 | priv->mdio_dn = of_get_compatible_child(parent: dn, compatible: compat); |
421 | kfree(objp: compat); |
422 | if (!priv->mdio_dn) { |
423 | dev_err(kdev, "unable to find MDIO bus node\n" ); |
424 | return NULL; |
425 | } |
426 | |
427 | return priv->mdio_dn; |
428 | } |
429 | |
430 | static void bcmgenet_mii_pdata_init(struct bcmgenet_priv *priv, |
431 | struct unimac_mdio_pdata *ppd) |
432 | { |
433 | struct device *kdev = &priv->pdev->dev; |
434 | struct bcmgenet_platform_data *pd = kdev->platform_data; |
435 | |
436 | if (pd->phy_interface != PHY_INTERFACE_MODE_MOCA && pd->mdio_enabled) { |
437 | /* |
438 | * Internal or external PHY with MDIO access |
439 | */ |
440 | if (pd->phy_address >= 0 && pd->phy_address < PHY_MAX_ADDR) |
441 | ppd->phy_mask = 1 << pd->phy_address; |
442 | else |
443 | ppd->phy_mask = 0; |
444 | } |
445 | } |
446 | |
447 | static int bcmgenet_mii_wait(void *wait_func_data) |
448 | { |
449 | struct bcmgenet_priv *priv = wait_func_data; |
450 | |
451 | wait_event_timeout(priv->wq, |
452 | !(bcmgenet_umac_readl(priv, UMAC_MDIO_CMD) |
453 | & MDIO_START_BUSY), |
454 | HZ / 100); |
455 | return 0; |
456 | } |
457 | |
458 | static int bcmgenet_mii_register(struct bcmgenet_priv *priv) |
459 | { |
460 | struct platform_device *pdev = priv->pdev; |
461 | struct bcmgenet_platform_data *pdata = pdev->dev.platform_data; |
462 | struct device_node *dn = pdev->dev.of_node; |
463 | struct unimac_mdio_pdata ppd; |
464 | struct platform_device *ppdev; |
465 | struct resource *pres, res; |
466 | int id, ret; |
467 | |
468 | pres = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
469 | if (!pres) { |
470 | dev_err(&pdev->dev, "Invalid resource\n" ); |
471 | return -EINVAL; |
472 | } |
473 | memset(&res, 0, sizeof(res)); |
474 | memset(&ppd, 0, sizeof(ppd)); |
475 | |
476 | ppd.wait_func = bcmgenet_mii_wait; |
477 | ppd.wait_func_data = priv; |
478 | ppd.bus_name = "bcmgenet MII bus" ; |
479 | /* Pass a reference to our "main" clock which is used for MDIO |
480 | * transfers |
481 | */ |
482 | ppd.clk = priv->clk; |
483 | |
484 | /* Unimac MDIO bus controller starts at UniMAC offset + MDIO_CMD |
485 | * and is 2 * 32-bits word long, 8 bytes total. |
486 | */ |
487 | res.start = pres->start + GENET_UMAC_OFF + UMAC_MDIO_CMD; |
488 | res.end = res.start + 8; |
489 | res.flags = IORESOURCE_MEM; |
490 | |
491 | if (dn) |
492 | id = of_alias_get_id(np: dn, stem: "eth" ); |
493 | else |
494 | id = pdev->id; |
495 | |
496 | ppdev = platform_device_alloc(UNIMAC_MDIO_DRV_NAME, id); |
497 | if (!ppdev) |
498 | return -ENOMEM; |
499 | |
500 | /* Retain this platform_device pointer for later cleanup */ |
501 | priv->mii_pdev = ppdev; |
502 | ppdev->dev.parent = &pdev->dev; |
503 | if (dn) |
504 | ppdev->dev.of_node = bcmgenet_mii_of_find_mdio(priv); |
505 | else if (pdata) |
506 | bcmgenet_mii_pdata_init(priv, ppd: &ppd); |
507 | else |
508 | ppd.phy_mask = ~0; |
509 | |
510 | ret = platform_device_add_resources(pdev: ppdev, res: &res, num: 1); |
511 | if (ret) |
512 | goto out; |
513 | |
514 | ret = platform_device_add_data(pdev: ppdev, data: &ppd, size: sizeof(ppd)); |
515 | if (ret) |
516 | goto out; |
517 | |
518 | ret = platform_device_add(pdev: ppdev); |
519 | if (ret) |
520 | goto out; |
521 | |
522 | return 0; |
523 | out: |
524 | platform_device_put(pdev: ppdev); |
525 | return ret; |
526 | } |
527 | |
528 | static int bcmgenet_phy_interface_init(struct bcmgenet_priv *priv) |
529 | { |
530 | struct device *kdev = &priv->pdev->dev; |
531 | int phy_mode = device_get_phy_mode(dev: kdev); |
532 | |
533 | if (phy_mode < 0) { |
534 | dev_err(kdev, "invalid PHY mode property\n" ); |
535 | return phy_mode; |
536 | } |
537 | |
538 | priv->phy_interface = phy_mode; |
539 | |
540 | /* We need to specifically look up whether this PHY interface is |
541 | * internal or not *before* we even try to probe the PHY driver |
542 | * over MDIO as we may have shut down the internal PHY for power |
543 | * saving purposes. |
544 | */ |
545 | if (priv->phy_interface == PHY_INTERFACE_MODE_INTERNAL) |
546 | priv->internal_phy = true; |
547 | |
548 | return 0; |
549 | } |
550 | |
551 | static int bcmgenet_mii_of_init(struct bcmgenet_priv *priv) |
552 | { |
553 | struct device_node *dn = priv->pdev->dev.of_node; |
554 | struct phy_device *phydev; |
555 | int ret; |
556 | |
557 | /* Fetch the PHY phandle */ |
558 | priv->phy_dn = of_parse_phandle(np: dn, phandle_name: "phy-handle" , index: 0); |
559 | |
560 | /* In the case of a fixed PHY, the DT node associated |
561 | * to the PHY is the Ethernet MAC DT node. |
562 | */ |
563 | if (!priv->phy_dn && of_phy_is_fixed_link(np: dn)) { |
564 | ret = of_phy_register_fixed_link(np: dn); |
565 | if (ret) |
566 | return ret; |
567 | |
568 | priv->phy_dn = of_node_get(node: dn); |
569 | } |
570 | |
571 | /* Get the link mode */ |
572 | ret = bcmgenet_phy_interface_init(priv); |
573 | if (ret) |
574 | return ret; |
575 | |
576 | /* Make sure we initialize MoCA PHYs with a link down */ |
577 | if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { |
578 | phydev = of_phy_find_device(phy_np: dn); |
579 | if (phydev) { |
580 | phydev->link = 0; |
581 | put_device(dev: &phydev->mdio.dev); |
582 | } |
583 | } |
584 | |
585 | return 0; |
586 | } |
587 | |
588 | static int bcmgenet_mii_pd_init(struct bcmgenet_priv *priv) |
589 | { |
590 | struct device *kdev = &priv->pdev->dev; |
591 | struct bcmgenet_platform_data *pd = kdev->platform_data; |
592 | char phy_name[MII_BUS_ID_SIZE + 3]; |
593 | char mdio_bus_id[MII_BUS_ID_SIZE]; |
594 | struct phy_device *phydev; |
595 | |
596 | snprintf(buf: mdio_bus_id, MII_BUS_ID_SIZE, fmt: "%s-%d" , |
597 | UNIMAC_MDIO_DRV_NAME, priv->pdev->id); |
598 | |
599 | if (pd->phy_interface != PHY_INTERFACE_MODE_MOCA && pd->mdio_enabled) { |
600 | snprintf(buf: phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, |
601 | mdio_bus_id, pd->phy_address); |
602 | |
603 | /* |
604 | * Internal or external PHY with MDIO access |
605 | */ |
606 | phydev = phy_attach(dev: priv->dev, bus_id: phy_name, interface: pd->phy_interface); |
607 | if (IS_ERR(ptr: phydev)) { |
608 | dev_err(kdev, "failed to register PHY device\n" ); |
609 | return PTR_ERR(ptr: phydev); |
610 | } |
611 | } else { |
612 | /* |
613 | * MoCA port or no MDIO access. |
614 | * Use fixed PHY to represent the link layer. |
615 | */ |
616 | struct fixed_phy_status fphy_status = { |
617 | .link = 1, |
618 | .speed = pd->phy_speed, |
619 | .duplex = pd->phy_duplex, |
620 | .pause = 0, |
621 | .asym_pause = 0, |
622 | }; |
623 | |
624 | phydev = fixed_phy_register(PHY_POLL, status: &fphy_status, NULL); |
625 | if (IS_ERR(ptr: phydev)) { |
626 | dev_err(kdev, "failed to register fixed PHY device\n" ); |
627 | return PTR_ERR(ptr: phydev); |
628 | } |
629 | |
630 | /* Make sure we initialize MoCA PHYs with a link down */ |
631 | phydev->link = 0; |
632 | |
633 | } |
634 | |
635 | priv->phy_interface = pd->phy_interface; |
636 | |
637 | return 0; |
638 | } |
639 | |
640 | static int bcmgenet_mii_bus_init(struct bcmgenet_priv *priv) |
641 | { |
642 | struct device *kdev = &priv->pdev->dev; |
643 | struct device_node *dn = kdev->of_node; |
644 | |
645 | if (dn) |
646 | return bcmgenet_mii_of_init(priv); |
647 | else if (has_acpi_companion(dev: kdev)) |
648 | return bcmgenet_phy_interface_init(priv); |
649 | else |
650 | return bcmgenet_mii_pd_init(priv); |
651 | } |
652 | |
653 | int bcmgenet_mii_init(struct net_device *dev) |
654 | { |
655 | struct bcmgenet_priv *priv = netdev_priv(dev); |
656 | int ret; |
657 | |
658 | ret = bcmgenet_mii_register(priv); |
659 | if (ret) |
660 | return ret; |
661 | |
662 | ret = bcmgenet_mii_bus_init(priv); |
663 | if (ret) |
664 | goto out; |
665 | |
666 | return 0; |
667 | |
668 | out: |
669 | bcmgenet_mii_exit(dev); |
670 | return ret; |
671 | } |
672 | |
673 | void bcmgenet_mii_exit(struct net_device *dev) |
674 | { |
675 | struct bcmgenet_priv *priv = netdev_priv(dev); |
676 | struct device_node *dn = priv->pdev->dev.of_node; |
677 | |
678 | if (of_phy_is_fixed_link(np: dn)) |
679 | of_phy_deregister_fixed_link(np: dn); |
680 | of_node_put(node: priv->phy_dn); |
681 | platform_device_unregister(priv->mii_pdev); |
682 | } |
683 | |