1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef FS_ENET_H
3#define FS_ENET_H
4
5#include <linux/clk.h>
6#include <linux/mii.h>
7#include <linux/netdevice.h>
8#include <linux/types.h>
9#include <linux/list.h>
10#include <linux/phy.h>
11#include <linux/dma-mapping.h>
12
13#ifdef CONFIG_CPM1
14#include <asm/cpm1.h>
15#endif
16
17#if defined(CONFIG_FS_ENET_HAS_FEC)
18#include <asm/cpm.h>
19
20#if defined(CONFIG_FS_ENET_MPC5121_FEC)
21/* MPC5121 FEC has different register layout */
22struct fec {
23 u32 fec_reserved0;
24 u32 fec_ievent; /* Interrupt event reg */
25 u32 fec_imask; /* Interrupt mask reg */
26 u32 fec_reserved1;
27 u32 fec_r_des_active; /* Receive descriptor reg */
28 u32 fec_x_des_active; /* Transmit descriptor reg */
29 u32 fec_reserved2[3];
30 u32 fec_ecntrl; /* Ethernet control reg */
31 u32 fec_reserved3[6];
32 u32 fec_mii_data; /* MII manage frame reg */
33 u32 fec_mii_speed; /* MII speed control reg */
34 u32 fec_reserved4[7];
35 u32 fec_mib_ctrlstat; /* MIB control/status reg */
36 u32 fec_reserved5[7];
37 u32 fec_r_cntrl; /* Receive control reg */
38 u32 fec_reserved6[15];
39 u32 fec_x_cntrl; /* Transmit Control reg */
40 u32 fec_reserved7[7];
41 u32 fec_addr_low; /* Low 32bits MAC address */
42 u32 fec_addr_high; /* High 16bits MAC address */
43 u32 fec_opd; /* Opcode + Pause duration */
44 u32 fec_reserved8[10];
45 u32 fec_hash_table_high; /* High 32bits hash table */
46 u32 fec_hash_table_low; /* Low 32bits hash table */
47 u32 fec_grp_hash_table_high; /* High 32bits hash table */
48 u32 fec_grp_hash_table_low; /* Low 32bits hash table */
49 u32 fec_reserved9[7];
50 u32 fec_x_wmrk; /* FIFO transmit water mark */
51 u32 fec_reserved10;
52 u32 fec_r_bound; /* FIFO receive bound reg */
53 u32 fec_r_fstart; /* FIFO receive start reg */
54 u32 fec_reserved11[11];
55 u32 fec_r_des_start; /* Receive descriptor ring */
56 u32 fec_x_des_start; /* Transmit descriptor ring */
57 u32 fec_r_buff_size; /* Maximum receive buff size */
58 u32 fec_reserved12[26];
59 u32 fec_dma_control; /* DMA Endian and other ctrl */
60};
61#endif
62
63struct fec_info {
64 struct fec __iomem *fecp;
65 u32 mii_speed;
66};
67#endif
68
69#ifdef CONFIG_CPM2
70#include <asm/cpm2.h>
71#endif
72
73/* hw driver ops */
74struct fs_ops {
75 int (*setup_data)(struct net_device *dev);
76 int (*allocate_bd)(struct net_device *dev);
77 void (*free_bd)(struct net_device *dev);
78 void (*cleanup_data)(struct net_device *dev);
79 void (*set_multicast_list)(struct net_device *dev);
80 void (*adjust_link)(struct net_device *dev);
81 void (*restart)(struct net_device *dev);
82 void (*stop)(struct net_device *dev);
83 void (*napi_clear_event)(struct net_device *dev);
84 void (*napi_enable)(struct net_device *dev);
85 void (*napi_disable)(struct net_device *dev);
86 void (*rx_bd_done)(struct net_device *dev);
87 void (*tx_kickstart)(struct net_device *dev);
88 u32 (*get_int_events)(struct net_device *dev);
89 void (*clear_int_events)(struct net_device *dev, u32 int_events);
90 void (*ev_error)(struct net_device *dev, u32 int_events);
91 int (*get_regs)(struct net_device *dev, void *p, int *sizep);
92 int (*get_regs_len)(struct net_device *dev);
93 void (*tx_restart)(struct net_device *dev);
94};
95
96struct phy_info {
97 unsigned int id;
98 const char *name;
99 void (*startup) (struct net_device * dev);
100 void (*shutdown) (struct net_device * dev);
101 void (*ack_int) (struct net_device * dev);
102};
103
104/* The FEC stores dest/src/type, data, and checksum for receive packets.
105 */
106#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
107#define MIN_MTU 46 /* this is data size */
108#define CRC_LEN 4
109
110#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
111#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
112
113/* Must be a multiple of 32 (to cover both FEC & FCC) */
114#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31)
115/* This is needed so that invalidate_xxx wont invalidate too much */
116#define ENET_RX_ALIGN 16
117#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
118
119struct fs_platform_info {
120 /* device specific information */
121 u32 cp_command; /* CPM page/sblock/mcn */
122
123 u32 dpram_offset;
124
125 struct device_node *phy_node;
126
127 int rx_ring, tx_ring; /* number of buffers on rx */
128 int rx_copybreak; /* limit we copy small frames */
129 int napi_weight; /* NAPI weight */
130
131 int use_rmii; /* use RMII mode */
132
133 struct clk *clk_per; /* 'per' clock for register access */
134};
135
136struct fs_enet_private {
137 struct napi_struct napi;
138 struct device *dev; /* pointer back to the device (must be initialized first) */
139 struct net_device *ndev;
140 spinlock_t lock; /* during all ops except TX pckt processing */
141 spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */
142 struct fs_platform_info *fpi;
143 struct work_struct timeout_work;
144 const struct fs_ops *ops;
145 int rx_ring, tx_ring;
146 dma_addr_t ring_mem_addr;
147 void __iomem *ring_base;
148 struct sk_buff **rx_skbuff;
149 struct sk_buff **tx_skbuff;
150 char *mapped_as_page;
151 cbd_t __iomem *rx_bd_base; /* Address of Rx and Tx buffers. */
152 cbd_t __iomem *tx_bd_base;
153 cbd_t __iomem *dirty_tx; /* ring entries to be free()ed. */
154 cbd_t __iomem *cur_rx;
155 cbd_t __iomem *cur_tx;
156 int tx_free;
157 const struct phy_info *phy;
158 u32 msg_enable;
159 struct mii_if_info mii_if;
160 unsigned int last_mii_status;
161 int interrupt;
162
163 int oldduplex, oldspeed, oldlink; /* current settings */
164
165 /* event masks */
166 u32 ev_napi; /* mask of NAPI events */
167 u32 ev; /* event mask */
168 u32 ev_err; /* error event mask */
169
170 u16 bd_rx_empty; /* mask of BD rx empty */
171 u16 bd_rx_err; /* mask of BD rx errors */
172
173 union {
174 struct {
175 int idx; /* FEC1 = 0, FEC2 = 1 */
176 void __iomem *fecp; /* hw registers */
177 u32 hthi, htlo; /* state for multicast */
178 } fec;
179
180 struct {
181 int idx; /* FCC1-3 = 0-2 */
182 void __iomem *fccp; /* hw registers */
183 void __iomem *ep; /* parameter ram */
184 void __iomem *fcccp; /* hw registers cont. */
185 void __iomem *mem; /* FCC DPRAM */
186 u32 gaddrh, gaddrl; /* group address */
187 } fcc;
188
189 struct {
190 int idx; /* FEC1 = 0, FEC2 = 1 */
191 void __iomem *sccp; /* hw registers */
192 void __iomem *ep; /* parameter ram */
193 u32 hthi, htlo; /* state for multicast */
194 } scc;
195
196 };
197};
198
199/***************************************************************************/
200
201void fs_init_bds(struct net_device *dev);
202void fs_cleanup_bds(struct net_device *dev);
203
204/***************************************************************************/
205
206#define DRV_MODULE_NAME "fs_enet"
207#define PFX DRV_MODULE_NAME ": "
208
209/***************************************************************************/
210/* buffer descriptor access macros */
211
212/* access macros */
213#if defined(CONFIG_CPM1)
214/* for a CPM1 __raw_xxx's are sufficient */
215#define __cbd_out32(addr, x) __raw_writel(x, addr)
216#define __cbd_out16(addr, x) __raw_writew(x, addr)
217#define __cbd_in32(addr) __raw_readl(addr)
218#define __cbd_in16(addr) __raw_readw(addr)
219#else
220/* for others play it safe */
221#define __cbd_out32(addr, x) out_be32(addr, x)
222#define __cbd_out16(addr, x) out_be16(addr, x)
223#define __cbd_in32(addr) in_be32(addr)
224#define __cbd_in16(addr) in_be16(addr)
225#endif
226
227/* write */
228#define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc))
229#define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen))
230#define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
231
232/* read */
233#define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc)
234#define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen)
235#define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr)
236
237/* set bits */
238#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))
239
240/* clear bits */
241#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
242
243/*******************************************************************/
244
245extern const struct fs_ops fs_fec_ops;
246extern const struct fs_ops fs_fcc_ops;
247extern const struct fs_ops fs_scc_ops;
248
249/*******************************************************************/
250
251#endif
252

source code of linux/drivers/net/ethernet/freescale/fs_enet/fs_enet.h