| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* Copyright (C) 2021, Intel Corporation. */ |
| 3 | |
| 4 | #ifndef _ICE_PTP_H_ |
| 5 | #define _ICE_PTP_H_ |
| 6 | |
| 7 | #include <linux/ptp_clock_kernel.h> |
| 8 | #include <linux/kthread.h> |
| 9 | |
| 10 | #include "ice_ptp_hw.h" |
| 11 | |
| 12 | /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp |
| 13 | * is stored in a buffer of registers. Depending on the specific hardware, |
| 14 | * this buffer might be shared across multiple PHY ports. |
| 15 | * |
| 16 | * On transmit of a packet to be timestamped, software is responsible for |
| 17 | * selecting an open index. Hardware makes no attempt to lock or prevent |
| 18 | * re-use of an index for multiple packets. |
| 19 | * |
| 20 | * To handle this, timestamp indexes must be tracked by software to ensure |
| 21 | * that an index is not re-used for multiple transmitted packets. The |
| 22 | * structures and functions declared in this file track the available Tx |
| 23 | * register indexes, as well as provide storage for the SKB pointers. |
| 24 | * |
| 25 | * To allow multiple ports to access the shared register block independently, |
| 26 | * the blocks are split up so that indexes are assigned to each port based on |
| 27 | * hardware logical port number. |
| 28 | * |
| 29 | * The timestamp blocks are handled differently for E810- and E822-based |
| 30 | * devices. In E810 devices, each port has its own block of timestamps, while in |
| 31 | * E822 there is a need to logically break the block of registers into smaller |
| 32 | * chunks based on the port number to avoid collisions. |
| 33 | * |
| 34 | * Example for port 5 in E810: |
| 35 | * +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 36 | * |register|register|register|register|register|register|register|register| |
| 37 | * | block | block | block | block | block | block | block | block | |
| 38 | * | for | for | for | for | for | for | for | for | |
| 39 | * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 | |
| 40 | * +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 41 | * ^^ |
| 42 | * || |
| 43 | * |--- quad offset is always 0 |
| 44 | * ---- quad number |
| 45 | * |
| 46 | * Example for port 5 in E822: |
| 47 | * +-----------------------------+-----------------------------+ |
| 48 | * | register block for quad 0 | register block for quad 1 | |
| 49 | * |+------+------+------+------+|+------+------+------+------+| |
| 50 | * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3|| |
| 51 | * |+------+------+------+------+|+------+------+------+------+| |
| 52 | * +-----------------------------+-------^---------------------+ |
| 53 | * ^ | |
| 54 | * | --- quad offset* |
| 55 | * ---- quad number |
| 56 | * |
| 57 | * * PHY port 5 is port 1 in quad 1 |
| 58 | * |
| 59 | */ |
| 60 | |
| 61 | /** |
| 62 | * struct ice_tx_tstamp - Tracking for a single Tx timestamp |
| 63 | * @skb: pointer to the SKB for this timestamp request |
| 64 | * @start: jiffies when the timestamp was first requested |
| 65 | * @cached_tstamp: last read timestamp |
| 66 | * |
| 67 | * This structure tracks a single timestamp request. The SKB pointer is |
| 68 | * provided when initiating a request. The start time is used to ensure that |
| 69 | * we discard old requests that were not fulfilled within a 2 second time |
| 70 | * window. |
| 71 | * Timestamp values in the PHY are read only and do not get cleared except at |
| 72 | * hardware reset or when a new timestamp value is captured. |
| 73 | * |
| 74 | * Some PHY types do not provide a "ready" bitmap indicating which timestamp |
| 75 | * indexes are valid. In these cases, we use a cached_tstamp to keep track of |
| 76 | * the last timestamp we read for a given index. If the current timestamp |
| 77 | * value is the same as the cached value, we assume a new timestamp hasn't |
| 78 | * been captured. This avoids reporting stale timestamps to the stack. This is |
| 79 | * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. |
| 80 | */ |
| 81 | struct ice_tx_tstamp { |
| 82 | struct sk_buff *skb; |
| 83 | unsigned long start; |
| 84 | u64 cached_tstamp; |
| 85 | }; |
| 86 | |
| 87 | /** |
| 88 | * enum ice_tx_tstamp_work - Status of Tx timestamp work function |
| 89 | * @ICE_TX_TSTAMP_WORK_DONE: Tx timestamp processing is complete |
| 90 | * @ICE_TX_TSTAMP_WORK_PENDING: More Tx timestamps are pending |
| 91 | */ |
| 92 | enum ice_tx_tstamp_work { |
| 93 | ICE_TX_TSTAMP_WORK_DONE = 0, |
| 94 | ICE_TX_TSTAMP_WORK_PENDING, |
| 95 | }; |
| 96 | |
| 97 | /** |
| 98 | * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port |
| 99 | * @lock: lock to prevent concurrent access to fields of this struct |
| 100 | * @tstamps: array of len to store outstanding requests |
| 101 | * @in_use: bitmap of len to indicate which slots are in use |
| 102 | * @stale: bitmap of len to indicate slots which have stale timestamps |
| 103 | * @block: which memory block (quad or port) the timestamps are captured in |
| 104 | * @offset: offset into timestamp block to get the real index |
| 105 | * @len: length of the tstamps and in_use fields. |
| 106 | * @init: if true, the tracker is initialized; |
| 107 | * @calibrating: if true, the PHY is calibrating the Tx offset. During this |
| 108 | * window, timestamps are temporarily disabled. |
| 109 | * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready |
| 110 | * bitmap register. If false, fall back to verifying new |
| 111 | * timestamp values against previously cached copy. |
| 112 | * @last_ll_ts_idx_read: index of the last LL TS read by the FW |
| 113 | */ |
| 114 | struct ice_ptp_tx { |
| 115 | spinlock_t lock; /* lock protecting in_use bitmap */ |
| 116 | struct ice_tx_tstamp *tstamps; |
| 117 | unsigned long *in_use; |
| 118 | unsigned long *stale; |
| 119 | u8 block; |
| 120 | u8 offset; |
| 121 | u8 len; |
| 122 | u8 init : 1; |
| 123 | u8 calibrating : 1; |
| 124 | u8 has_ready_bitmap : 1; |
| 125 | s8 last_ll_ts_idx_read; |
| 126 | }; |
| 127 | |
| 128 | /* Quad and port information for initializing timestamp blocks */ |
| 129 | #define INDEX_PER_QUAD 64 |
| 130 | #define INDEX_PER_PORT_E82X 16 |
| 131 | #define INDEX_PER_PORT 64 |
| 132 | |
| 133 | /** |
| 134 | * struct ice_ptp_port - data used to initialize an external port for PTP |
| 135 | * |
| 136 | * This structure contains data indicating whether a single external port is |
| 137 | * ready for PTP functionality. It is used to track the port initialization |
| 138 | * and determine when the port's PHY offset is valid. |
| 139 | * |
| 140 | * @list_node: list member structure |
| 141 | * @tx: Tx timestamp tracking for this port |
| 142 | * @ov_work: delayed work task for tracking when PHY offset is valid |
| 143 | * @ps_lock: mutex used to protect the overall PTP PHY start procedure |
| 144 | * @link_up: indicates whether the link is up |
| 145 | * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy |
| 146 | * @port_num: the port number this structure represents |
| 147 | */ |
| 148 | struct ice_ptp_port { |
| 149 | struct list_head list_node; |
| 150 | struct ice_ptp_tx tx; |
| 151 | struct kthread_delayed_work ov_work; |
| 152 | struct mutex ps_lock; /* protects overall PTP PHY start procedure */ |
| 153 | bool link_up; |
| 154 | u8 tx_fifo_busy_cnt; |
| 155 | u8 port_num; |
| 156 | }; |
| 157 | |
| 158 | enum ice_ptp_tx_interrupt { |
| 159 | ICE_PTP_TX_INTERRUPT_NONE = 0, |
| 160 | ICE_PTP_TX_INTERRUPT_SELF, |
| 161 | ICE_PTP_TX_INTERRUPT_ALL, |
| 162 | }; |
| 163 | |
| 164 | #define GLTSYN_TGT_H_IDX_MAX 4 |
| 165 | |
| 166 | enum ice_ptp_state { |
| 167 | ICE_PTP_UNINIT = 0, |
| 168 | ICE_PTP_INITIALIZING, |
| 169 | ICE_PTP_READY, |
| 170 | ICE_PTP_RESETTING, |
| 171 | ICE_PTP_ERROR, |
| 172 | }; |
| 173 | |
| 174 | enum ice_ptp_pin { |
| 175 | SDP0 = 0, |
| 176 | SDP1, |
| 177 | SDP2, |
| 178 | SDP3, |
| 179 | TIME_SYNC, |
| 180 | ONE_PPS |
| 181 | }; |
| 182 | |
| 183 | enum ice_ptp_pin_nvm { |
| 184 | GNSS = 0, |
| 185 | SMA1, |
| 186 | UFL1, |
| 187 | SMA2, |
| 188 | UFL2, |
| 189 | NUM_PTP_PINS_NVM, |
| 190 | GPIO_NA = 9 |
| 191 | }; |
| 192 | |
| 193 | /* Per-channel register definitions */ |
| 194 | #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) |
| 195 | #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) |
| 196 | #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) |
| 197 | #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) |
| 198 | #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) |
| 199 | #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) |
| 200 | #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) |
| 201 | #define GLTSYN_EVNT_H_IDX_MAX 3 |
| 202 | |
| 203 | /* Pin definitions for PTP */ |
| 204 | #define ICE_N_PINS_MAX 6 |
| 205 | #define ICE_SMA_PINS_NUM 4 |
| 206 | #define ICE_PIN_DESC_ARR_LEN(_arr) (sizeof(_arr) / \ |
| 207 | sizeof(struct ice_ptp_pin_desc)) |
| 208 | |
| 209 | /** |
| 210 | * struct ice_ptp_pin_desc - hardware pin description data |
| 211 | * @name_idx: index of the name of pin in ice_pin_names |
| 212 | * @gpio: the associated GPIO input and output pins |
| 213 | * @delay: input and output signal delays in nanoseconds |
| 214 | * |
| 215 | * Structure describing a PTP-capable GPIO pin that extends ptp_pin_desc array |
| 216 | * for the device. Device families have separate sets of available pins with |
| 217 | * varying restrictions. |
| 218 | */ |
| 219 | struct ice_ptp_pin_desc { |
| 220 | int name_idx; |
| 221 | int gpio[2]; |
| 222 | unsigned int delay[2]; |
| 223 | }; |
| 224 | |
| 225 | /** |
| 226 | * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK |
| 227 | * @state: current state of PTP state machine |
| 228 | * @tx_interrupt_mode: the TX interrupt mode for the PTP clock |
| 229 | * @port: data for the PHY port initialization procedure |
| 230 | * @work: delayed work function for periodic tasks |
| 231 | * @cached_phc_time: a cached copy of the PHC time for timestamp extension |
| 232 | * @cached_phc_jiffies: jiffies when cached_phc_time was last updated |
| 233 | * @kworker: kwork thread for handling periodic work |
| 234 | * @ext_ts_irq: the external timestamp IRQ in use |
| 235 | * @pin_desc: structure defining pins |
| 236 | * @ice_pin_desc: internal structure describing pin relations |
| 237 | * @perout_rqs: cached periodic output requests |
| 238 | * @extts_rqs: cached external timestamp requests |
| 239 | * @info: structure defining PTP hardware capabilities |
| 240 | * @clock: pointer to registered PTP clock device |
| 241 | * @tstamp_config: hardware timestamping configuration |
| 242 | * @reset_time: kernel time after clock stop on reset |
| 243 | * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped |
| 244 | * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp |
| 245 | * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed |
| 246 | * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time |
| 247 | * being too old to correctly extend timestamp |
| 248 | * @late_cached_phc_updates: number of times cached PHC update is late |
| 249 | */ |
| 250 | struct ice_ptp { |
| 251 | enum ice_ptp_state state; |
| 252 | enum ice_ptp_tx_interrupt tx_interrupt_mode; |
| 253 | struct ice_ptp_port port; |
| 254 | struct kthread_delayed_work work; |
| 255 | u64 cached_phc_time; |
| 256 | unsigned long cached_phc_jiffies; |
| 257 | struct kthread_worker *kworker; |
| 258 | u8 ext_ts_irq; |
| 259 | struct ptp_pin_desc pin_desc[ICE_N_PINS_MAX]; |
| 260 | const struct ice_ptp_pin_desc *ice_pin_desc; |
| 261 | struct ptp_perout_request perout_rqs[GLTSYN_TGT_H_IDX_MAX]; |
| 262 | struct ptp_extts_request extts_rqs[GLTSYN_EVNT_H_IDX_MAX]; |
| 263 | struct ptp_clock_info info; |
| 264 | struct ptp_clock *clock; |
| 265 | struct hwtstamp_config tstamp_config; |
| 266 | u64 reset_time; |
| 267 | u32 tx_hwtstamp_skipped; |
| 268 | u32 tx_hwtstamp_timeouts; |
| 269 | u32 tx_hwtstamp_flushed; |
| 270 | u32 tx_hwtstamp_discarded; |
| 271 | u32 late_cached_phc_updates; |
| 272 | }; |
| 273 | |
| 274 | #define __ptp_port_to_ptp(p) \ |
| 275 | container_of((p), struct ice_ptp, port) |
| 276 | #define ptp_port_to_pf(p) \ |
| 277 | container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp) |
| 278 | |
| 279 | #define __ptp_info_to_ptp(i) \ |
| 280 | container_of((i), struct ice_ptp, info) |
| 281 | #define ptp_info_to_pf(i) \ |
| 282 | container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp) |
| 283 | |
| 284 | #define PFTSYN_SEM_BYTES 4 |
| 285 | #define PTP_SHARED_CLK_IDX_VALID BIT(31) |
| 286 | #define TS_CMD_MASK 0xF |
| 287 | #define SYNC_EXEC_CMD 0x3 |
| 288 | #define ICE_PTP_TS_VALID BIT(0) |
| 289 | |
| 290 | #define FIFO_EMPTY BIT(2) |
| 291 | #define FIFO_OK 0xFF |
| 292 | #define ICE_PTP_FIFO_NUM_CHECKS 5 |
| 293 | |
| 294 | #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) |
| 295 | int ice_ptp_clock_index(struct ice_pf *pf); |
| 296 | struct ice_pf; |
| 297 | int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); |
| 298 | int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); |
| 299 | void ice_ptp_restore_timestamp_mode(struct ice_pf *pf); |
| 300 | |
| 301 | void ice_ptp_extts_event(struct ice_pf *pf); |
| 302 | s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); |
| 303 | void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx); |
| 304 | void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx); |
| 305 | enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); |
| 306 | irqreturn_t ice_ptp_ts_irq(struct ice_pf *pf); |
| 307 | u64 ice_ptp_read_src_clk_reg(struct ice_pf *pf, |
| 308 | struct ptp_system_timestamp *sts); |
| 309 | |
| 310 | u64 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, |
| 311 | const struct ice_pkt_ctx *pkt_ctx); |
| 312 | void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type); |
| 313 | void ice_ptp_prepare_for_reset(struct ice_pf *pf, |
| 314 | enum ice_reset_req reset_type); |
| 315 | void ice_ptp_init(struct ice_pf *pf); |
| 316 | void ice_ptp_release(struct ice_pf *pf); |
| 317 | void ice_ptp_link_change(struct ice_pf *pf, bool linkup); |
| 318 | #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ |
| 319 | static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) |
| 320 | { |
| 321 | return -EOPNOTSUPP; |
| 322 | } |
| 323 | |
| 324 | static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) |
| 325 | { |
| 326 | return -EOPNOTSUPP; |
| 327 | } |
| 328 | |
| 329 | static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { } |
| 330 | static inline void ice_ptp_extts_event(struct ice_pf *pf) { } |
| 331 | static inline s8 |
| 332 | ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) |
| 333 | { |
| 334 | return -1; |
| 335 | } |
| 336 | |
| 337 | static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) |
| 338 | { } |
| 339 | |
| 340 | static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { } |
| 341 | |
| 342 | static inline bool ice_ptp_process_ts(struct ice_pf *pf) |
| 343 | { |
| 344 | return true; |
| 345 | } |
| 346 | |
| 347 | static inline irqreturn_t ice_ptp_ts_irq(struct ice_pf *pf) |
| 348 | { |
| 349 | return IRQ_HANDLED; |
| 350 | } |
| 351 | |
| 352 | static inline u64 ice_ptp_read_src_clk_reg(struct ice_pf *pf, |
| 353 | struct ptp_system_timestamp *sts) |
| 354 | { |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | static inline u64 |
| 359 | ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, |
| 360 | const struct ice_pkt_ctx *pkt_ctx) |
| 361 | { |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | static inline void ice_ptp_rebuild(struct ice_pf *pf, |
| 366 | enum ice_reset_req reset_type) |
| 367 | { |
| 368 | } |
| 369 | |
| 370 | static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf, |
| 371 | enum ice_reset_req reset_type) |
| 372 | { |
| 373 | } |
| 374 | static inline void ice_ptp_init(struct ice_pf *pf) { } |
| 375 | static inline void ice_ptp_release(struct ice_pf *pf) { } |
| 376 | static inline void ice_ptp_link_change(struct ice_pf *pf, bool linkup) |
| 377 | { |
| 378 | } |
| 379 | |
| 380 | static inline int ice_ptp_clock_index(struct ice_pf *pf) |
| 381 | { |
| 382 | return -1; |
| 383 | } |
| 384 | #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ |
| 385 | #endif /* _ICE_PTP_H_ */ |
| 386 | |