1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2021, Intel Corporation. */
3
4#ifndef _ICE_PTP_H_
5#define _ICE_PTP_H_
6
7#include <linux/ptp_clock_kernel.h>
8#include <linux/kthread.h>
9
10#include "ice_ptp_hw.h"
11
12enum ice_ptp_pin_e810 {
13 GPIO_20 = 0,
14 GPIO_21,
15 GPIO_22,
16 GPIO_23,
17 NUM_PTP_PIN_E810
18};
19
20enum ice_ptp_pin_e810t {
21 GNSS = 0,
22 SMA1,
23 UFL1,
24 SMA2,
25 UFL2,
26 NUM_PTP_PINS_E810T
27};
28
29struct ice_perout_channel {
30 bool ena;
31 u32 gpio_pin;
32 u64 period;
33 u64 start_time;
34};
35
36/* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
37 * is stored in a buffer of registers. Depending on the specific hardware,
38 * this buffer might be shared across multiple PHY ports.
39 *
40 * On transmit of a packet to be timestamped, software is responsible for
41 * selecting an open index. Hardware makes no attempt to lock or prevent
42 * re-use of an index for multiple packets.
43 *
44 * To handle this, timestamp indexes must be tracked by software to ensure
45 * that an index is not re-used for multiple transmitted packets. The
46 * structures and functions declared in this file track the available Tx
47 * register indexes, as well as provide storage for the SKB pointers.
48 *
49 * To allow multiple ports to access the shared register block independently,
50 * the blocks are split up so that indexes are assigned to each port based on
51 * hardware logical port number.
52 *
53 * The timestamp blocks are handled differently for E810- and E822-based
54 * devices. In E810 devices, each port has its own block of timestamps, while in
55 * E822 there is a need to logically break the block of registers into smaller
56 * chunks based on the port number to avoid collisions.
57 *
58 * Example for port 5 in E810:
59 * +--------+--------+--------+--------+--------+--------+--------+--------+
60 * |register|register|register|register|register|register|register|register|
61 * | block | block | block | block | block | block | block | block |
62 * | for | for | for | for | for | for | for | for |
63 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 |
64 * +--------+--------+--------+--------+--------+--------+--------+--------+
65 * ^^
66 * ||
67 * |--- quad offset is always 0
68 * ---- quad number
69 *
70 * Example for port 5 in E822:
71 * +-----------------------------+-----------------------------+
72 * | register block for quad 0 | register block for quad 1 |
73 * |+------+------+------+------+|+------+------+------+------+|
74 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3||
75 * |+------+------+------+------+|+------+------+------+------+|
76 * +-----------------------------+-------^---------------------+
77 * ^ |
78 * | --- quad offset*
79 * ---- quad number
80 *
81 * * PHY port 5 is port 1 in quad 1
82 *
83 */
84
85/**
86 * struct ice_tx_tstamp - Tracking for a single Tx timestamp
87 * @skb: pointer to the SKB for this timestamp request
88 * @start: jiffies when the timestamp was first requested
89 * @cached_tstamp: last read timestamp
90 *
91 * This structure tracks a single timestamp request. The SKB pointer is
92 * provided when initiating a request. The start time is used to ensure that
93 * we discard old requests that were not fulfilled within a 2 second time
94 * window.
95 * Timestamp values in the PHY are read only and do not get cleared except at
96 * hardware reset or when a new timestamp value is captured.
97 *
98 * Some PHY types do not provide a "ready" bitmap indicating which timestamp
99 * indexes are valid. In these cases, we use a cached_tstamp to keep track of
100 * the last timestamp we read for a given index. If the current timestamp
101 * value is the same as the cached value, we assume a new timestamp hasn't
102 * been captured. This avoids reporting stale timestamps to the stack. This is
103 * only done if the verify_cached flag is set in ice_ptp_tx structure.
104 */
105struct ice_tx_tstamp {
106 struct sk_buff *skb;
107 unsigned long start;
108 u64 cached_tstamp;
109};
110
111/**
112 * enum ice_tx_tstamp_work - Status of Tx timestamp work function
113 * @ICE_TX_TSTAMP_WORK_DONE: Tx timestamp processing is complete
114 * @ICE_TX_TSTAMP_WORK_PENDING: More Tx timestamps are pending
115 */
116enum ice_tx_tstamp_work {
117 ICE_TX_TSTAMP_WORK_DONE = 0,
118 ICE_TX_TSTAMP_WORK_PENDING,
119};
120
121/**
122 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
123 * @lock: lock to prevent concurrent access to fields of this struct
124 * @tstamps: array of len to store outstanding requests
125 * @in_use: bitmap of len to indicate which slots are in use
126 * @stale: bitmap of len to indicate slots which have stale timestamps
127 * @block: which memory block (quad or port) the timestamps are captured in
128 * @offset: offset into timestamp block to get the real index
129 * @len: length of the tstamps and in_use fields.
130 * @init: if true, the tracker is initialized;
131 * @calibrating: if true, the PHY is calibrating the Tx offset. During this
132 * window, timestamps are temporarily disabled.
133 * @verify_cached: if true, verify new timestamp differs from last read value
134 */
135struct ice_ptp_tx {
136 spinlock_t lock; /* lock protecting in_use bitmap */
137 struct ice_tx_tstamp *tstamps;
138 unsigned long *in_use;
139 unsigned long *stale;
140 u8 block;
141 u8 offset;
142 u8 len;
143 u8 init : 1;
144 u8 calibrating : 1;
145 u8 verify_cached : 1;
146};
147
148/* Quad and port information for initializing timestamp blocks */
149#define INDEX_PER_QUAD 64
150#define INDEX_PER_PORT_E822 16
151#define INDEX_PER_PORT_E810 64
152
153/**
154 * struct ice_ptp_port - data used to initialize an external port for PTP
155 *
156 * This structure contains data indicating whether a single external port is
157 * ready for PTP functionality. It is used to track the port initialization
158 * and determine when the port's PHY offset is valid.
159 *
160 * @list_member: list member structure of auxiliary device
161 * @tx: Tx timestamp tracking for this port
162 * @aux_dev: auxiliary device associated with this port
163 * @ov_work: delayed work task for tracking when PHY offset is valid
164 * @ps_lock: mutex used to protect the overall PTP PHY start procedure
165 * @link_up: indicates whether the link is up
166 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy
167 * @port_num: the port number this structure represents
168 */
169struct ice_ptp_port {
170 struct list_head list_member;
171 struct ice_ptp_tx tx;
172 struct auxiliary_device aux_dev;
173 struct kthread_delayed_work ov_work;
174 struct mutex ps_lock; /* protects overall PTP PHY start procedure */
175 bool link_up;
176 u8 tx_fifo_busy_cnt;
177 u8 port_num;
178};
179
180enum ice_ptp_tx_interrupt {
181 ICE_PTP_TX_INTERRUPT_NONE = 0,
182 ICE_PTP_TX_INTERRUPT_SELF,
183 ICE_PTP_TX_INTERRUPT_ALL,
184};
185
186/**
187 * struct ice_ptp_port_owner - data used to handle the PTP clock owner info
188 *
189 * This structure contains data necessary for the PTP clock owner to correctly
190 * handle the timestamping feature for all attached ports.
191 *
192 * @aux_driver: the structure carring the auxiliary driver information
193 * @ports: list of porst handled by this port owner
194 * @lock: protect access to ports list
195 */
196struct ice_ptp_port_owner {
197 struct auxiliary_driver aux_driver;
198 struct list_head ports;
199 struct mutex lock;
200};
201
202#define GLTSYN_TGT_H_IDX_MAX 4
203
204/**
205 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
206 * @tx_interrupt_mode: the TX interrupt mode for the PTP clock
207 * @port: data for the PHY port initialization procedure
208 * @ports_owner: data for the auxiliary driver owner
209 * @work: delayed work function for periodic tasks
210 * @cached_phc_time: a cached copy of the PHC time for timestamp extension
211 * @cached_phc_jiffies: jiffies when cached_phc_time was last updated
212 * @ext_ts_chan: the external timestamp channel in use
213 * @ext_ts_irq: the external timestamp IRQ in use
214 * @kworker: kwork thread for handling periodic work
215 * @perout_channels: periodic output data
216 * @info: structure defining PTP hardware capabilities
217 * @clock: pointer to registered PTP clock device
218 * @tstamp_config: hardware timestamping configuration
219 * @reset_time: kernel time after clock stop on reset
220 * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped
221 * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp
222 * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed
223 * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time
224 * being too old to correctly extend timestamp
225 * @late_cached_phc_updates: number of times cached PHC update is late
226 */
227struct ice_ptp {
228 enum ice_ptp_tx_interrupt tx_interrupt_mode;
229 struct ice_ptp_port port;
230 struct ice_ptp_port_owner ports_owner;
231 struct kthread_delayed_work work;
232 u64 cached_phc_time;
233 unsigned long cached_phc_jiffies;
234 u8 ext_ts_chan;
235 u8 ext_ts_irq;
236 struct kthread_worker *kworker;
237 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
238 struct ptp_clock_info info;
239 struct ptp_clock *clock;
240 struct hwtstamp_config tstamp_config;
241 u64 reset_time;
242 u32 tx_hwtstamp_skipped;
243 u32 tx_hwtstamp_timeouts;
244 u32 tx_hwtstamp_flushed;
245 u32 tx_hwtstamp_discarded;
246 u32 late_cached_phc_updates;
247};
248
249#define __ptp_port_to_ptp(p) \
250 container_of((p), struct ice_ptp, port)
251#define ptp_port_to_pf(p) \
252 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
253
254#define __ptp_info_to_ptp(i) \
255 container_of((i), struct ice_ptp, info)
256#define ptp_info_to_pf(i) \
257 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
258
259#define PFTSYN_SEM_BYTES 4
260#define PTP_SHARED_CLK_IDX_VALID BIT(31)
261#define TS_CMD_MASK 0xF
262#define SYNC_EXEC_CMD 0x3
263#define ICE_PTP_TS_VALID BIT(0)
264
265#define FIFO_EMPTY BIT(2)
266#define FIFO_OK 0xFF
267#define ICE_PTP_FIFO_NUM_CHECKS 5
268/* Per-channel register definitions */
269#define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
270#define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
271#define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
272#define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
273#define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
274#define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
275#define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
276#define GLTSYN_EVNT_H_IDX_MAX 3
277
278/* Pin definitions for PTP PPS out */
279#define PPS_CLK_GEN_CHAN 3
280#define PPS_CLK_SRC_CHAN 2
281#define PPS_PIN_INDEX 5
282#define TIME_SYNC_PIN_INDEX 4
283#define N_EXT_TS_E810 3
284#define N_PER_OUT_E810 4
285#define N_PER_OUT_E810T 3
286#define N_PER_OUT_NO_SMA_E810T 2
287#define N_EXT_TS_NO_SMA_E810T 2
288#define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4))
289
290#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
291int ice_ptp_clock_index(struct ice_pf *pf);
292struct ice_pf;
293int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
294int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
295void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena);
296
297void ice_ptp_extts_event(struct ice_pf *pf);
298s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
299enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf);
300
301void
302ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
303 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb);
304void ice_ptp_reset(struct ice_pf *pf);
305void ice_ptp_prepare_for_reset(struct ice_pf *pf);
306void ice_ptp_init(struct ice_pf *pf);
307void ice_ptp_release(struct ice_pf *pf);
308void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup);
309#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
310static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
311{
312 return -EOPNOTSUPP;
313}
314
315static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
316{
317 return -EOPNOTSUPP;
318}
319
320static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { }
321
322static inline void ice_ptp_extts_event(struct ice_pf *pf) { }
323static inline s8
324ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
325{
326 return -1;
327}
328
329static inline bool ice_ptp_process_ts(struct ice_pf *pf)
330{
331 return true;
332}
333static inline void
334ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
335 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { }
336static inline void ice_ptp_reset(struct ice_pf *pf) { }
337static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { }
338static inline void ice_ptp_init(struct ice_pf *pf) { }
339static inline void ice_ptp_release(struct ice_pf *pf) { }
340static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
341{
342}
343
344static inline int ice_ptp_clock_index(struct ice_pf *pf)
345{
346 return -1;
347}
348#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
349#endif /* _ICE_PTP_H_ */
350

source code of linux/drivers/net/ethernet/intel/ice/ice_ptp.h