1 | /* SPDX-License-Identifier: GPL-2.0 */ |
---|---|
2 | /* Copyright (c) 2018, Intel Corporation. */ |
3 | |
4 | #ifndef _ICE_H_ |
5 | #define _ICE_H_ |
6 | |
7 | #include <linux/types.h> |
8 | #include <linux/errno.h> |
9 | #include <linux/kernel.h> |
10 | #include <linux/module.h> |
11 | #include <linux/firmware.h> |
12 | #include <linux/netdevice.h> |
13 | #include <linux/compiler.h> |
14 | #include <linux/etherdevice.h> |
15 | #include <linux/skbuff.h> |
16 | #include <linux/cpumask.h> |
17 | #include <linux/rtnetlink.h> |
18 | #include <linux/if_vlan.h> |
19 | #include <linux/dma-mapping.h> |
20 | #include <linux/pci.h> |
21 | #include <linux/workqueue.h> |
22 | #include <linux/wait.h> |
23 | #include <linux/interrupt.h> |
24 | #include <linux/ethtool.h> |
25 | #include <linux/timer.h> |
26 | #include <linux/delay.h> |
27 | #include <linux/bitmap.h> |
28 | #include <linux/log2.h> |
29 | #include <linux/ip.h> |
30 | #include <linux/sctp.h> |
31 | #include <linux/ipv6.h> |
32 | #include <linux/pkt_sched.h> |
33 | #include <linux/if_bridge.h> |
34 | #include <linux/ctype.h> |
35 | #include <linux/linkmode.h> |
36 | #include <linux/bpf.h> |
37 | #include <linux/btf.h> |
38 | #include <linux/auxiliary_bus.h> |
39 | #include <linux/avf/virtchnl.h> |
40 | #include <linux/cpu_rmap.h> |
41 | #include <linux/dim.h> |
42 | #include <linux/gnss.h> |
43 | #include <net/pkt_cls.h> |
44 | #include <net/pkt_sched.h> |
45 | #include <net/tc_act/tc_mirred.h> |
46 | #include <net/tc_act/tc_gact.h> |
47 | #include <net/ip.h> |
48 | #include <net/devlink.h> |
49 | #include <net/ipv6.h> |
50 | #include <net/xdp_sock.h> |
51 | #include <net/xdp_sock_drv.h> |
52 | #include <net/geneve.h> |
53 | #include <net/gre.h> |
54 | #include <net/udp_tunnel.h> |
55 | #include <net/vxlan.h> |
56 | #include <net/gtp.h> |
57 | #include <linux/ppp_defs.h> |
58 | #include "ice_devids.h" |
59 | #include "ice_type.h" |
60 | #include "ice_txrx.h" |
61 | #include "ice_dcb.h" |
62 | #include "ice_switch.h" |
63 | #include "ice_common.h" |
64 | #include "ice_flow.h" |
65 | #include "ice_sched.h" |
66 | #include "ice_idc_int.h" |
67 | #include "ice_sriov.h" |
68 | #include "ice_vf_mbx.h" |
69 | #include "ice_ptp.h" |
70 | #include "ice_fdir.h" |
71 | #include "ice_xsk.h" |
72 | #include "ice_arfs.h" |
73 | #include "ice_repr.h" |
74 | #include "ice_eswitch.h" |
75 | #include "ice_lag.h" |
76 | #include "ice_vsi_vlan_ops.h" |
77 | #include "ice_gnss.h" |
78 | #include "ice_irq.h" |
79 | #include "ice_dpll.h" |
80 | #include "ice_adapter.h" |
81 | #include "devlink/health.h" |
82 | |
83 | #define ICE_BAR0 0 |
84 | #define ICE_REQ_DESC_MULTIPLE 32 |
85 | #define ICE_MIN_NUM_DESC 64 |
86 | #define ICE_MAX_NUM_DESC 8160 |
87 | #define ICE_DFLT_MIN_RX_DESC 512 |
88 | #define ICE_DFLT_NUM_TX_DESC 256 |
89 | #define ICE_DFLT_NUM_RX_DESC 2048 |
90 | |
91 | #define ICE_DFLT_TRAFFIC_CLASS BIT(0) |
92 | #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) |
93 | #define ICE_AQ_LEN 192 |
94 | #define ICE_MBXSQ_LEN 64 |
95 | #define ICE_SBQ_LEN 64 |
96 | #define ICE_MIN_LAN_TXRX_MSIX 1 |
97 | #define ICE_MIN_LAN_OICR_MSIX 1 |
98 | #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) |
99 | #define ICE_FDIR_MSIX 2 |
100 | #define ICE_NO_VSI 0xffff |
101 | #define ICE_VSI_MAP_CONTIG 0 |
102 | #define ICE_VSI_MAP_SCATTER 1 |
103 | #define ICE_MAX_SCATTER_TXQS 16 |
104 | #define ICE_MAX_SCATTER_RXQS 16 |
105 | #define ICE_Q_WAIT_RETRY_LIMIT 10 |
106 | #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) |
107 | #define ICE_MAX_LG_RSS_QS 256 |
108 | #define ICE_INVAL_Q_INDEX 0xffff |
109 | |
110 | #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ |
111 | |
112 | #define ICE_CHNL_START_TC 1 |
113 | |
114 | #define ICE_MAX_RESET_WAIT 20 |
115 | |
116 | #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) |
117 | |
118 | #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) |
119 | |
120 | #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) |
121 | |
122 | #define ICE_MAX_TSO_SIZE 131072 |
123 | |
124 | #define ICE_UP_TABLE_TRANSLATE(val, i) \ |
125 | (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ |
126 | ICE_AQ_VSI_UP_TABLE_UP##i##_M) |
127 | |
128 | #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) |
129 | #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) |
130 | #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) |
131 | #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) |
132 | |
133 | /* Minimum BW limit is 500 Kbps for any scheduler node */ |
134 | #define ICE_MIN_BW_LIMIT 500 |
135 | /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. |
136 | * use it to convert user specified BW limit into Kbps |
137 | */ |
138 | #define ICE_BW_KBPS_DIVISOR 125 |
139 | |
140 | /* Default recipes have priority 4 and below, hence priority values between 5..7 |
141 | * can be used as filter priority for advanced switch filter (advanced switch |
142 | * filters need new recipe to be created for specified extraction sequence |
143 | * because default recipe extraction sequence does not represent custom |
144 | * extraction) |
145 | */ |
146 | #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 |
147 | /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + |
148 | * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as |
149 | * SYN/FIN/RST)) |
150 | */ |
151 | #define ICE_SWITCH_FLTR_PRIO_RSVD 6 |
152 | #define ICE_SWITCH_FLTR_PRIO_VSI 5 |
153 | #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI |
154 | |
155 | /* Macro for each VSI in a PF */ |
156 | #define ice_for_each_vsi(pf, i) \ |
157 | for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) |
158 | |
159 | /* Macros for each Tx/Xdp/Rx ring in a VSI */ |
160 | #define ice_for_each_txq(vsi, i) \ |
161 | for ((i) = 0; (i) < (vsi)->num_txq; (i)++) |
162 | |
163 | #define ice_for_each_xdp_txq(vsi, i) \ |
164 | for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) |
165 | |
166 | #define ice_for_each_rxq(vsi, i) \ |
167 | for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) |
168 | |
169 | /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ |
170 | #define ice_for_each_alloc_txq(vsi, i) \ |
171 | for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) |
172 | |
173 | #define ice_for_each_alloc_rxq(vsi, i) \ |
174 | for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) |
175 | |
176 | #define ice_for_each_q_vector(vsi, i) \ |
177 | for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) |
178 | |
179 | #define ice_for_each_chnl_tc(i) \ |
180 | for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) |
181 | |
182 | #define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX |
183 | |
184 | #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \ |
185 | ICE_PROMISC_VLAN_RX) |
186 | |
187 | #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) |
188 | |
189 | #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ |
190 | ICE_PROMISC_MCAST_RX | \ |
191 | ICE_PROMISC_VLAN_TX | \ |
192 | ICE_PROMISC_VLAN_RX) |
193 | |
194 | #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) |
195 | |
196 | enum ice_feature { |
197 | ICE_F_DSCP, |
198 | ICE_F_PHY_RCLK, |
199 | ICE_F_SMA_CTRL, |
200 | ICE_F_CGU, |
201 | ICE_F_GNSS, |
202 | ICE_F_GCS, |
203 | ICE_F_ROCE_LAG, |
204 | ICE_F_SRIOV_LAG, |
205 | ICE_F_MBX_LIMIT, |
206 | ICE_F_MAX |
207 | }; |
208 | |
209 | DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); |
210 | |
211 | struct ice_channel { |
212 | struct list_head list; |
213 | u8 type; |
214 | u16 sw_id; |
215 | u16 base_q; |
216 | u16 num_rxq; |
217 | u16 num_txq; |
218 | u16 vsi_num; |
219 | u8 ena_tc; |
220 | struct ice_aqc_vsi_props info; |
221 | u64 max_tx_rate; |
222 | u64 min_tx_rate; |
223 | atomic_t num_sb_fltr; |
224 | struct ice_vsi *ch_vsi; |
225 | }; |
226 | |
227 | struct ice_txq_meta { |
228 | u32 q_teid; /* Tx-scheduler element identifier */ |
229 | u16 q_id; /* Entry in VSI's txq_map bitmap */ |
230 | u16 q_handle; /* Relative index of Tx queue within TC */ |
231 | u16 vsi_idx; /* VSI index that Tx queue belongs to */ |
232 | u8 tc; /* TC number that Tx queue belongs to */ |
233 | }; |
234 | |
235 | struct ice_tc_info { |
236 | u16 qoffset; |
237 | u16 qcount_tx; |
238 | u16 qcount_rx; |
239 | u8 netdev_tc; |
240 | }; |
241 | |
242 | struct ice_tc_cfg { |
243 | u8 numtc; /* Total number of enabled TCs */ |
244 | u16 ena_tc; /* Tx map */ |
245 | struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; |
246 | }; |
247 | |
248 | struct ice_qs_cfg { |
249 | struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ |
250 | unsigned long *pf_map; |
251 | unsigned long pf_map_size; |
252 | unsigned int q_count; |
253 | unsigned int scatter_count; |
254 | u16 *vsi_map; |
255 | u16 vsi_map_offset; |
256 | u8 mapping_mode; |
257 | }; |
258 | |
259 | struct ice_sw { |
260 | struct ice_pf *pf; |
261 | u16 sw_id; /* switch ID for this switch */ |
262 | u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ |
263 | }; |
264 | |
265 | enum ice_pf_state { |
266 | ICE_TESTING, |
267 | ICE_DOWN, |
268 | ICE_NEEDS_RESTART, |
269 | ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ |
270 | ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ |
271 | ICE_PFR_REQ, /* set by driver */ |
272 | ICE_CORER_REQ, /* set by driver */ |
273 | ICE_GLOBR_REQ, /* set by driver */ |
274 | ICE_CORER_RECV, /* set by OICR handler */ |
275 | ICE_GLOBR_RECV, /* set by OICR handler */ |
276 | ICE_EMPR_RECV, /* set by OICR handler */ |
277 | ICE_SUSPENDED, /* set on module remove path */ |
278 | ICE_RESET_FAILED, /* set by reset/rebuild */ |
279 | /* When checking for the PF to be in a nominal operating state, the |
280 | * bits that are grouped at the beginning of the list need to be |
281 | * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will |
282 | * be checked. If you need to add a bit into consideration for nominal |
283 | * operating state, it must be added before |
284 | * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position |
285 | * without appropriate consideration. |
286 | */ |
287 | ICE_STATE_NOMINAL_CHECK_BITS, |
288 | ICE_ADMINQ_EVENT_PENDING, |
289 | ICE_MAILBOXQ_EVENT_PENDING, |
290 | ICE_SIDEBANDQ_EVENT_PENDING, |
291 | ICE_MDD_EVENT_PENDING, |
292 | ICE_VFLR_EVENT_PENDING, |
293 | ICE_FLTR_OVERFLOW_PROMISC, |
294 | ICE_VF_DIS, |
295 | ICE_CFG_BUSY, |
296 | ICE_SERVICE_SCHED, |
297 | ICE_SERVICE_DIS, |
298 | ICE_FD_FLUSH_REQ, |
299 | ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ |
300 | ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ |
301 | ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ |
302 | ICE_LINK_DEFAULT_OVERRIDE_PENDING, |
303 | ICE_PHY_INIT_COMPLETE, |
304 | ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ |
305 | ICE_AUX_ERR_PENDING, |
306 | ICE_STATE_NBITS /* must be last */ |
307 | }; |
308 | |
309 | enum ice_vsi_state { |
310 | ICE_VSI_DOWN, |
311 | ICE_VSI_NEEDS_RESTART, |
312 | ICE_VSI_NETDEV_ALLOCD, |
313 | ICE_VSI_NETDEV_REGISTERED, |
314 | ICE_VSI_UMAC_FLTR_CHANGED, |
315 | ICE_VSI_MMAC_FLTR_CHANGED, |
316 | ICE_VSI_PROMISC_CHANGED, |
317 | ICE_VSI_REBUILD_PENDING, |
318 | ICE_VSI_STATE_NBITS /* must be last */ |
319 | }; |
320 | |
321 | struct ice_vsi_stats { |
322 | struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ |
323 | struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ |
324 | }; |
325 | |
326 | /* struct that defines a VSI, associated with a dev */ |
327 | struct ice_vsi { |
328 | struct net_device *netdev; |
329 | struct ice_sw *vsw; /* switch this VSI is on */ |
330 | struct ice_pf *back; /* back pointer to PF */ |
331 | struct ice_rx_ring **rx_rings; /* Rx ring array */ |
332 | struct ice_tx_ring **tx_rings; /* Tx ring array */ |
333 | struct ice_q_vector **q_vectors; /* q_vector array */ |
334 | |
335 | irqreturn_t (*irq_handler)(int irq, void *data); |
336 | |
337 | u64 tx_linearize; |
338 | DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); |
339 | unsigned int current_netdev_flags; |
340 | u32 tx_restart; |
341 | u32 tx_busy; |
342 | u32 rx_buf_failed; |
343 | u32 rx_page_failed; |
344 | u16 num_q_vectors; |
345 | /* tell if only dynamic irq allocation is allowed */ |
346 | bool irq_dyn_alloc; |
347 | |
348 | u16 vsi_num; /* HW (absolute) index of this VSI */ |
349 | u16 idx; /* software index in pf->vsi[] */ |
350 | |
351 | u16 num_gfltr; |
352 | u16 num_bfltr; |
353 | |
354 | /* RSS config */ |
355 | u16 rss_table_size; /* HW RSS table size */ |
356 | u16 rss_size; /* Allocated RSS queues */ |
357 | u8 rss_hfunc; /* User configured hash type */ |
358 | u8 *rss_hkey_user; /* User configured hash keys */ |
359 | u8 *rss_lut_user; /* User configured lookup table entries */ |
360 | u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ |
361 | |
362 | /* aRFS members only allocated for the PF VSI */ |
363 | #define ICE_MAX_ARFS_LIST 1024 |
364 | #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) |
365 | struct hlist_head *arfs_fltr_list; |
366 | struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; |
367 | spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ |
368 | atomic_t *arfs_last_fltr_id; |
369 | |
370 | struct ice_aqc_vsi_props info; /* VSI properties */ |
371 | struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */ |
372 | |
373 | /* VSI stats */ |
374 | struct rtnl_link_stats64 net_stats; |
375 | struct rtnl_link_stats64 net_stats_prev; |
376 | struct ice_eth_stats eth_stats; |
377 | struct ice_eth_stats eth_stats_prev; |
378 | |
379 | struct list_head tmp_sync_list; /* MAC filters to be synced */ |
380 | struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ |
381 | |
382 | u8 irqs_ready:1; |
383 | u8 current_isup:1; /* Sync 'link up' logging */ |
384 | u8 stat_offsets_loaded:1; |
385 | struct ice_vsi_vlan_ops inner_vlan_ops; |
386 | struct ice_vsi_vlan_ops outer_vlan_ops; |
387 | u16 num_vlan; |
388 | |
389 | /* queue information */ |
390 | u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ |
391 | u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ |
392 | u16 *txq_map; /* index in pf->avail_txqs */ |
393 | u16 *rxq_map; /* index in pf->avail_rxqs */ |
394 | u16 alloc_txq; /* Allocated Tx queues */ |
395 | u16 num_txq; /* Used Tx queues */ |
396 | u16 alloc_rxq; /* Allocated Rx queues */ |
397 | u16 num_rxq; /* Used Rx queues */ |
398 | u16 req_txq; /* User requested Tx queues */ |
399 | u16 req_rxq; /* User requested Rx queues */ |
400 | u16 num_rx_desc; |
401 | u16 num_tx_desc; |
402 | struct ice_tc_cfg tc_cfg; |
403 | struct bpf_prog *xdp_prog; |
404 | struct ice_tx_ring **xdp_rings; /* XDP ring array */ |
405 | u16 num_xdp_txq; /* Used XDP queues */ |
406 | u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ |
407 | struct mutex xdp_state_lock; |
408 | |
409 | struct net_device **target_netdevs; |
410 | |
411 | struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ |
412 | |
413 | /* Channel Specific Fields */ |
414 | struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; |
415 | u16 cnt_q_avail; |
416 | u16 next_base_q; /* next queue to be used for channel setup */ |
417 | struct list_head ch_list; |
418 | u16 num_chnl_rxq; |
419 | u16 num_chnl_txq; |
420 | u16 ch_rss_size; |
421 | u16 num_chnl_fltr; |
422 | /* store away rss size info before configuring ADQ channels so that, |
423 | * it can be used after tc-qdisc delete, to get back RSS setting as |
424 | * they were before |
425 | */ |
426 | u16 orig_rss_size; |
427 | /* this keeps tracks of all enabled TC with and without DCB |
428 | * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue |
429 | * information |
430 | */ |
431 | u8 all_numtc; |
432 | u16 all_enatc; |
433 | |
434 | /* store away TC info, to be used for rebuild logic */ |
435 | u8 old_numtc; |
436 | u16 old_ena_tc; |
437 | |
438 | /* setup back reference, to which aggregator node this VSI |
439 | * corresponds to |
440 | */ |
441 | struct ice_agg_node *agg_node; |
442 | |
443 | struct_group_tagged(ice_vsi_cfg_params, params, |
444 | struct ice_port_info *port_info; /* back pointer to port_info */ |
445 | struct ice_channel *ch; /* VSI's channel structure, may be NULL */ |
446 | union { |
447 | /* VF associated with this VSI, may be NULL */ |
448 | struct ice_vf *vf; |
449 | /* SF associated with this VSI, may be NULL */ |
450 | struct ice_dynamic_port *sf; |
451 | }; |
452 | u32 flags; /* VSI flags used for rebuild and configuration */ |
453 | enum ice_vsi_type type; /* the type of the VSI */ |
454 | ); |
455 | } ____cacheline_internodealigned_in_smp; |
456 | |
457 | /* struct that defines an interrupt vector */ |
458 | struct ice_q_vector { |
459 | struct ice_vsi *vsi; |
460 | |
461 | u16 v_idx; /* index in the vsi->q_vector array. */ |
462 | u16 reg_idx; /* PF relative register index */ |
463 | u8 num_ring_rx; /* total number of Rx rings in vector */ |
464 | u8 num_ring_tx; /* total number of Tx rings in vector */ |
465 | u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ |
466 | /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this |
467 | * value to the device |
468 | */ |
469 | u8 intrl; |
470 | |
471 | struct napi_struct napi; |
472 | |
473 | struct ice_ring_container rx; |
474 | struct ice_ring_container tx; |
475 | |
476 | struct ice_channel *ch; |
477 | |
478 | char name[ICE_INT_NAME_STR_LEN]; |
479 | |
480 | u16 total_events; /* net_dim(): number of interrupts processed */ |
481 | u16 vf_reg_idx; /* VF relative register index */ |
482 | struct msi_map irq; |
483 | } ____cacheline_internodealigned_in_smp; |
484 | |
485 | enum ice_pf_flags { |
486 | ICE_FLAG_FLTR_SYNC, |
487 | ICE_FLAG_RDMA_ENA, |
488 | ICE_FLAG_RSS_ENA, |
489 | ICE_FLAG_SRIOV_ENA, |
490 | ICE_FLAG_SRIOV_CAPABLE, |
491 | ICE_FLAG_DCB_CAPABLE, |
492 | ICE_FLAG_DCB_ENA, |
493 | ICE_FLAG_FD_ENA, |
494 | ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ |
495 | ICE_FLAG_ADV_FEATURES, |
496 | ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ |
497 | ICE_FLAG_CLS_FLOWER, |
498 | ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, |
499 | ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, |
500 | ICE_FLAG_NO_MEDIA, |
501 | ICE_FLAG_FW_LLDP_AGENT, |
502 | ICE_FLAG_MOD_POWER_UNSUPPORTED, |
503 | ICE_FLAG_PHY_FW_LOAD_FAILED, |
504 | ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ |
505 | ICE_FLAG_LEGACY_RX, |
506 | ICE_FLAG_VF_TRUE_PROMISC_ENA, |
507 | ICE_FLAG_MDD_AUTO_RESET_VF, |
508 | ICE_FLAG_VF_VLAN_PRUNING, |
509 | ICE_FLAG_LINK_LENIENT_MODE_ENA, |
510 | ICE_FLAG_PLUG_AUX_DEV, |
511 | ICE_FLAG_UNPLUG_AUX_DEV, |
512 | ICE_FLAG_MTU_CHANGED, |
513 | ICE_FLAG_GNSS, /* GNSS successfully initialized */ |
514 | ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ |
515 | ICE_FLAG_LLDP_AQ_FLTR, |
516 | ICE_PF_FLAGS_NBITS /* must be last */ |
517 | }; |
518 | |
519 | enum ice_misc_thread_tasks { |
520 | ICE_MISC_THREAD_TX_TSTAMP, |
521 | ICE_MISC_THREAD_NBITS /* must be last */ |
522 | }; |
523 | |
524 | struct ice_eswitch { |
525 | struct ice_vsi *uplink_vsi; |
526 | struct ice_esw_br_offloads *br_offloads; |
527 | struct xarray reprs; |
528 | bool is_running; |
529 | }; |
530 | |
531 | struct ice_agg_node { |
532 | u32 agg_id; |
533 | #define ICE_MAX_VSIS_IN_AGG_NODE 64 |
534 | u32 num_vsis; |
535 | u8 valid; |
536 | }; |
537 | |
538 | struct ice_pf_msix { |
539 | u32 cur; |
540 | u32 min; |
541 | u32 max; |
542 | u32 total; |
543 | u32 rest; |
544 | }; |
545 | |
546 | struct ice_pf { |
547 | struct pci_dev *pdev; |
548 | struct ice_adapter *adapter; |
549 | |
550 | struct devlink_region *nvm_region; |
551 | struct devlink_region *sram_region; |
552 | struct devlink_region *devcaps_region; |
553 | |
554 | /* devlink port data */ |
555 | struct devlink_port devlink_port; |
556 | |
557 | /* OS reserved IRQ details */ |
558 | struct ice_irq_tracker irq_tracker; |
559 | struct ice_virt_irq_tracker virt_irq_tracker; |
560 | |
561 | u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ |
562 | |
563 | struct ice_vsi **vsi; /* VSIs created by the driver */ |
564 | struct ice_vsi_stats **vsi_stats; |
565 | struct ice_sw *first_sw; /* first switch created by firmware */ |
566 | u16 eswitch_mode; /* current mode of eswitch */ |
567 | struct dentry *ice_debugfs_pf; |
568 | struct dentry *ice_debugfs_pf_fwlog; |
569 | /* keep track of all the dentrys for FW log modules */ |
570 | struct dentry **ice_debugfs_pf_fwlog_modules; |
571 | struct ice_vfs vfs; |
572 | DECLARE_BITMAP(features, ICE_F_MAX); |
573 | DECLARE_BITMAP(state, ICE_STATE_NBITS); |
574 | DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); |
575 | DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS); |
576 | unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ |
577 | unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ |
578 | unsigned long serv_tmr_period; |
579 | unsigned long serv_tmr_prev; |
580 | struct timer_list serv_tmr; |
581 | struct work_struct serv_task; |
582 | struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ |
583 | struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ |
584 | struct mutex tc_mutex; /* lock to protect TC changes */ |
585 | struct mutex adev_mutex; /* lock to protect aux device access */ |
586 | struct mutex lag_mutex; /* protect ice_lag struct in PF */ |
587 | u32 msg_enable; |
588 | struct ice_ptp ptp; |
589 | struct gnss_serial *gnss_serial; |
590 | struct gnss_device *gnss_dev; |
591 | u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ |
592 | |
593 | /* spinlock to protect the AdminQ wait list */ |
594 | spinlock_t aq_wait_lock; |
595 | struct hlist_head aq_wait_list; |
596 | wait_queue_head_t aq_wait_queue; |
597 | bool fw_emp_reset_disabled; |
598 | |
599 | wait_queue_head_t reset_wait_queue; |
600 | |
601 | u32 hw_csum_rx_error; |
602 | u32 hw_rx_eipe_error; |
603 | u32 oicr_err_reg; |
604 | struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ |
605 | struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ |
606 | u16 max_pf_txqs; /* Total Tx queues PF wide */ |
607 | u16 max_pf_rxqs; /* Total Rx queues PF wide */ |
608 | struct ice_pf_msix msix; |
609 | u16 num_lan_tx; /* num LAN Tx queues setup */ |
610 | u16 num_lan_rx; /* num LAN Rx queues setup */ |
611 | u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ |
612 | u16 num_alloc_vsi; |
613 | u16 corer_count; /* Core reset count */ |
614 | u16 globr_count; /* Global reset count */ |
615 | u16 empr_count; /* EMP reset count */ |
616 | u16 pfr_count; /* PF reset count */ |
617 | |
618 | u8 wol_ena : 1; /* software state of WoL */ |
619 | u32 wakeup_reason; /* last wakeup reason */ |
620 | struct ice_hw_port_stats stats; |
621 | struct ice_hw_port_stats stats_prev; |
622 | struct ice_hw hw; |
623 | u8 stat_prev_loaded:1; /* has previous stats been loaded */ |
624 | u16 dcbx_cap; |
625 | u32 tx_timeout_count; |
626 | unsigned long tx_timeout_last_recovery; |
627 | u32 tx_timeout_recovery_level; |
628 | char int_name[ICE_INT_NAME_STR_LEN]; |
629 | char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; |
630 | int aux_idx; |
631 | u32 sw_int_count; |
632 | /* count of tc_flower filters specific to channel (aka where filter |
633 | * action is "hw_tc <tc_num>") |
634 | */ |
635 | u16 num_dmac_chnl_fltrs; |
636 | struct hlist_head tc_flower_fltr_list; |
637 | |
638 | u64 supported_rxdids; |
639 | |
640 | __le64 nvm_phy_type_lo; /* NVM PHY type low */ |
641 | __le64 nvm_phy_type_hi; /* NVM PHY type high */ |
642 | struct ice_link_default_override_tlv link_dflt_override; |
643 | struct ice_lag *lag; /* Link Aggregation information */ |
644 | |
645 | struct ice_eswitch eswitch; |
646 | struct ice_esw_br_port *br_port; |
647 | |
648 | struct xarray dyn_ports; |
649 | struct xarray sf_nums; |
650 | |
651 | #define ICE_INVALID_AGG_NODE_ID 0 |
652 | #define ICE_PF_AGG_NODE_ID_START 1 |
653 | #define ICE_MAX_PF_AGG_NODES 32 |
654 | struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; |
655 | #define ICE_VF_AGG_NODE_ID_START 65 |
656 | #define ICE_MAX_VF_AGG_NODES 32 |
657 | struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; |
658 | struct ice_dplls dplls; |
659 | struct device *hwmon_dev; |
660 | struct ice_health health_reporters; |
661 | struct iidc_rdma_core_dev_info *cdev_info; |
662 | |
663 | u8 num_quanta_prof_used; |
664 | }; |
665 | |
666 | extern struct workqueue_struct *ice_lag_wq; |
667 | |
668 | struct ice_netdev_priv { |
669 | struct ice_vsi *vsi; |
670 | struct ice_repr *repr; |
671 | /* indirect block callbacks on registered higher level devices |
672 | * (e.g. tunnel devices) |
673 | * |
674 | * tc_indr_block_cb_priv_list is used to look up indirect callback |
675 | * private data |
676 | */ |
677 | struct list_head tc_indr_block_priv_list; |
678 | }; |
679 | |
680 | /** |
681 | * ice_vector_ch_enabled |
682 | * @qv: pointer to q_vector, can be NULL |
683 | * |
684 | * This function returns true if vector is channel enabled otherwise false |
685 | */ |
686 | static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) |
687 | { |
688 | return !!qv->ch; /* Enable it to run with TC */ |
689 | } |
690 | |
691 | /** |
692 | * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt |
693 | * @pf: Board private structure |
694 | * |
695 | * Return true if this PF should respond to the Tx timestamp interrupt |
696 | * indication in the miscellaneous OICR interrupt handler. |
697 | */ |
698 | static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) |
699 | { |
700 | return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; |
701 | } |
702 | |
703 | /** |
704 | * ice_irq_dynamic_ena - Enable default interrupt generation settings |
705 | * @hw: pointer to HW struct |
706 | * @vsi: pointer to VSI struct, can be NULL |
707 | * @q_vector: pointer to q_vector, can be NULL |
708 | */ |
709 | static inline void |
710 | ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, |
711 | struct ice_q_vector *q_vector) |
712 | { |
713 | u32 vector = (vsi && q_vector) ? q_vector->reg_idx : |
714 | ((struct ice_pf *)hw->back)->oicr_irq.index; |
715 | int itr = ICE_ITR_NONE; |
716 | u32 val; |
717 | |
718 | /* clear the PBA here, as this function is meant to clean out all |
719 | * previous interrupts and enable the interrupt |
720 | */ |
721 | val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | |
722 | (itr << GLINT_DYN_CTL_ITR_INDX_S); |
723 | if (vsi) |
724 | if (test_bit(ICE_VSI_DOWN, vsi->state)) |
725 | return; |
726 | wr32(hw, GLINT_DYN_CTL(vector), val); |
727 | } |
728 | |
729 | /** |
730 | * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev |
731 | * @netdev: pointer to the netdev struct |
732 | */ |
733 | static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) |
734 | { |
735 | struct ice_netdev_priv *np = netdev_priv(dev: netdev); |
736 | |
737 | return np->vsi->back; |
738 | } |
739 | |
740 | static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) |
741 | { |
742 | return !!READ_ONCE(vsi->xdp_prog); |
743 | } |
744 | |
745 | static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) |
746 | { |
747 | ring->flags |= ICE_TX_FLAGS_RING_XDP; |
748 | } |
749 | |
750 | /** |
751 | * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID |
752 | * @vsi: pointer to VSI |
753 | * @qid: index of a queue to look at XSK buff pool presence |
754 | * |
755 | * Return: A pointer to xsk_buff_pool structure if there is a buffer pool |
756 | * attached and configured as zero-copy, NULL otherwise. |
757 | */ |
758 | static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi, |
759 | u16 qid) |
760 | { |
761 | struct xsk_buff_pool *pool = xsk_get_pool_from_qid(dev: vsi->netdev, queue_id: qid); |
762 | |
763 | if (!ice_is_xdp_ena_vsi(vsi)) |
764 | return NULL; |
765 | |
766 | return (pool && pool->dev) ? pool : NULL; |
767 | } |
768 | |
769 | /** |
770 | * ice_rx_xsk_pool - assign XSK buff pool to Rx ring |
771 | * @ring: Rx ring to use |
772 | * |
773 | * Sets XSK buff pool pointer on Rx ring. |
774 | */ |
775 | static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring) |
776 | { |
777 | struct ice_vsi *vsi = ring->vsi; |
778 | u16 qid = ring->q_index; |
779 | |
780 | WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); |
781 | } |
782 | |
783 | /** |
784 | * ice_tx_xsk_pool - assign XSK buff pool to XDP ring |
785 | * @vsi: pointer to VSI |
786 | * @qid: index of a queue to look at XSK buff pool presence |
787 | * |
788 | * Sets XSK buff pool pointer on XDP ring. |
789 | * |
790 | * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided |
791 | * queue id. Reason for doing so is that queue vectors might have assigned more |
792 | * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring |
793 | * carries a pointer to one of these XDP rings for its own purposes, such as |
794 | * handling XDP_TX action, therefore we can piggyback here on the |
795 | * rx_ring->xdp_ring assignment that was done during XDP rings initialization. |
796 | */ |
797 | static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) |
798 | { |
799 | struct ice_tx_ring *ring; |
800 | |
801 | ring = vsi->rx_rings[qid]->xdp_ring; |
802 | if (!ring) |
803 | return; |
804 | |
805 | WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); |
806 | } |
807 | |
808 | /** |
809 | * ice_get_main_vsi - Get the PF VSI |
810 | * @pf: PF instance |
811 | * |
812 | * returns pf->vsi[0], which by definition is the PF VSI |
813 | */ |
814 | static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) |
815 | { |
816 | if (pf->vsi) |
817 | return pf->vsi[0]; |
818 | |
819 | return NULL; |
820 | } |
821 | |
822 | /** |
823 | * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. |
824 | * @np: private netdev structure |
825 | */ |
826 | static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) |
827 | { |
828 | /* In case of port representor return source port VSI. */ |
829 | if (np->repr) |
830 | return np->repr->src_vsi; |
831 | else |
832 | return np->vsi; |
833 | } |
834 | |
835 | /** |
836 | * ice_get_ctrl_vsi - Get the control VSI |
837 | * @pf: PF instance |
838 | */ |
839 | static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) |
840 | { |
841 | /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ |
842 | if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) |
843 | return NULL; |
844 | |
845 | return pf->vsi[pf->ctrl_vsi_idx]; |
846 | } |
847 | |
848 | /** |
849 | * ice_find_vsi - Find the VSI from VSI ID |
850 | * @pf: The PF pointer to search in |
851 | * @vsi_num: The VSI ID to search for |
852 | */ |
853 | static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) |
854 | { |
855 | int i; |
856 | |
857 | ice_for_each_vsi(pf, i) |
858 | if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) |
859 | return pf->vsi[i]; |
860 | return NULL; |
861 | } |
862 | |
863 | /** |
864 | * ice_is_switchdev_running - check if switchdev is configured |
865 | * @pf: pointer to PF structure |
866 | * |
867 | * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV |
868 | * and switchdev is configured, false otherwise. |
869 | */ |
870 | static inline bool ice_is_switchdev_running(struct ice_pf *pf) |
871 | { |
872 | return pf->eswitch.is_running; |
873 | } |
874 | |
875 | #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 |
876 | #define ICE_FD_STAT_PF_IDX(base_idx) \ |
877 | ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) |
878 | #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) |
879 | #define ICE_FD_STAT_CH 1 |
880 | #define ICE_FD_CH_STAT_IDX(base_idx) \ |
881 | (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) |
882 | |
883 | /** |
884 | * ice_is_adq_active - any active ADQs |
885 | * @pf: pointer to PF |
886 | * |
887 | * This function returns true if there are any ADQs configured (which is |
888 | * determined by looking at VSI type (which should be VSI_PF), numtc, and |
889 | * TC_MQPRIO flag) otherwise return false |
890 | */ |
891 | static inline bool ice_is_adq_active(struct ice_pf *pf) |
892 | { |
893 | struct ice_vsi *vsi; |
894 | |
895 | vsi = ice_get_main_vsi(pf); |
896 | if (!vsi) |
897 | return false; |
898 | |
899 | /* is ADQ configured */ |
900 | if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && |
901 | test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) |
902 | return true; |
903 | |
904 | return false; |
905 | } |
906 | |
907 | void ice_debugfs_fwlog_init(struct ice_pf *pf); |
908 | void ice_debugfs_pf_deinit(struct ice_pf *pf); |
909 | void ice_debugfs_init(void); |
910 | void ice_debugfs_exit(void); |
911 | void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); |
912 | |
913 | bool netif_is_ice(const struct net_device *dev); |
914 | int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); |
915 | int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); |
916 | int ice_vsi_open_ctrl(struct ice_vsi *vsi); |
917 | int ice_vsi_open(struct ice_vsi *vsi); |
918 | void ice_set_ethtool_ops(struct net_device *netdev); |
919 | void ice_set_ethtool_repr_ops(struct net_device *netdev); |
920 | void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); |
921 | void ice_set_ethtool_sf_ops(struct net_device *netdev); |
922 | u16 ice_get_avail_txq_count(struct ice_pf *pf); |
923 | u16 ice_get_avail_rxq_count(struct ice_pf *pf); |
924 | int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); |
925 | void ice_update_vsi_stats(struct ice_vsi *vsi); |
926 | void ice_update_pf_stats(struct ice_pf *pf); |
927 | void |
928 | ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, |
929 | struct ice_q_stats stats, u64 *pkts, u64 *bytes); |
930 | int ice_up(struct ice_vsi *vsi); |
931 | int ice_down(struct ice_vsi *vsi); |
932 | int ice_down_up(struct ice_vsi *vsi); |
933 | int ice_vsi_cfg_lan(struct ice_vsi *vsi); |
934 | struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); |
935 | |
936 | enum ice_xdp_cfg { |
937 | ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */ |
938 | ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */ |
939 | }; |
940 | |
941 | int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); |
942 | int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog, |
943 | enum ice_xdp_cfg cfg_type); |
944 | int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type); |
945 | void ice_map_xdp_rings(struct ice_vsi *vsi); |
946 | int |
947 | ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, |
948 | u32 flags); |
949 | int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); |
950 | int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); |
951 | int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); |
952 | int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); |
953 | int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc); |
954 | void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); |
955 | int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); |
956 | void ice_print_link_msg(struct ice_vsi *vsi, bool isup); |
957 | int ice_plug_aux_dev(struct ice_pf *pf); |
958 | void ice_unplug_aux_dev(struct ice_pf *pf); |
959 | int ice_init_rdma(struct ice_pf *pf); |
960 | void ice_deinit_rdma(struct ice_pf *pf); |
961 | const char *ice_aq_str(enum ice_aq_err aq_err); |
962 | bool ice_is_wol_supported(struct ice_hw *hw); |
963 | void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); |
964 | int |
965 | ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, |
966 | bool is_tun); |
967 | void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); |
968 | int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); |
969 | int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); |
970 | int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); |
971 | int |
972 | ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, |
973 | u32 *rule_locs); |
974 | void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); |
975 | void ice_fdir_release_flows(struct ice_hw *hw); |
976 | void ice_fdir_replay_flows(struct ice_hw *hw); |
977 | void ice_fdir_replay_fltrs(struct ice_pf *pf); |
978 | int ice_fdir_create_dflt_rules(struct ice_pf *pf); |
979 | |
980 | enum ice_aq_task_state { |
981 | ICE_AQ_TASK_NOT_PREPARED, |
982 | ICE_AQ_TASK_WAITING, |
983 | ICE_AQ_TASK_COMPLETE, |
984 | ICE_AQ_TASK_CANCELED, |
985 | }; |
986 | |
987 | struct ice_aq_task { |
988 | struct hlist_node entry; |
989 | struct ice_rq_event_info event; |
990 | enum ice_aq_task_state state; |
991 | u16 opcode; |
992 | }; |
993 | |
994 | void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task, |
995 | u16 opcode); |
996 | int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task, |
997 | unsigned long timeout); |
998 | int ice_open(struct net_device *netdev); |
999 | int ice_open_internal(struct net_device *netdev); |
1000 | int ice_stop(struct net_device *netdev); |
1001 | void ice_service_task_schedule(struct ice_pf *pf); |
1002 | int ice_load(struct ice_pf *pf); |
1003 | void ice_unload(struct ice_pf *pf); |
1004 | void ice_adv_lnk_speed_maps_init(void); |
1005 | int ice_init_dev(struct ice_pf *pf); |
1006 | void ice_deinit_dev(struct ice_pf *pf); |
1007 | int ice_change_mtu(struct net_device *netdev, int new_mtu); |
1008 | void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue); |
1009 | int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp); |
1010 | void ice_set_netdev_features(struct net_device *netdev); |
1011 | int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid); |
1012 | int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid); |
1013 | void ice_get_stats64(struct net_device *netdev, |
1014 | struct rtnl_link_stats64 *stats); |
1015 | |
1016 | /** |
1017 | * ice_set_rdma_cap - enable RDMA support |
1018 | * @pf: PF struct |
1019 | */ |
1020 | static inline void ice_set_rdma_cap(struct ice_pf *pf) |
1021 | { |
1022 | if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { |
1023 | set_bit(nr: ICE_FLAG_RDMA_ENA, addr: pf->flags); |
1024 | set_bit(nr: ICE_FLAG_PLUG_AUX_DEV, addr: pf->flags); |
1025 | } |
1026 | } |
1027 | |
1028 | /** |
1029 | * ice_clear_rdma_cap - disable RDMA support |
1030 | * @pf: PF struct |
1031 | */ |
1032 | static inline void ice_clear_rdma_cap(struct ice_pf *pf) |
1033 | { |
1034 | /* defer unplug to service task to avoid RTNL lock and |
1035 | * clear PLUG bit so that pending plugs don't interfere |
1036 | */ |
1037 | clear_bit(nr: ICE_FLAG_PLUG_AUX_DEV, addr: pf->flags); |
1038 | set_bit(nr: ICE_FLAG_UNPLUG_AUX_DEV, addr: pf->flags); |
1039 | clear_bit(nr: ICE_FLAG_RDMA_ENA, addr: pf->flags); |
1040 | } |
1041 | |
1042 | extern const struct xdp_metadata_ops ice_xdp_md_ops; |
1043 | |
1044 | /** |
1045 | * ice_is_dual - Check if given config is multi-NAC |
1046 | * @hw: pointer to HW structure |
1047 | * |
1048 | * Return: true if the device is running in mutli-NAC (Network |
1049 | * Acceleration Complex) configuration variant, false otherwise |
1050 | * (always false for non-E825 devices). |
1051 | */ |
1052 | static inline bool ice_is_dual(struct ice_hw *hw) |
1053 | { |
1054 | return hw->mac_type == ICE_MAC_GENERIC_3K_E825 && |
1055 | (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M); |
1056 | } |
1057 | |
1058 | /** |
1059 | * ice_is_primary - Check if given device belongs to the primary complex |
1060 | * @hw: pointer to HW structure |
1061 | * |
1062 | * Check if given PF/HW is running on primary complex in multi-NAC |
1063 | * configuration. |
1064 | * |
1065 | * Return: true if the device is dual, false otherwise (always true |
1066 | * for non-E825 devices). |
1067 | */ |
1068 | static inline bool ice_is_primary(struct ice_hw *hw) |
1069 | { |
1070 | return hw->mac_type != ICE_MAC_GENERIC_3K_E825 || |
1071 | !ice_is_dual(hw) || |
1072 | (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M); |
1073 | } |
1074 | |
1075 | /** |
1076 | * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF |
1077 | * @pf: pointer to PF structure |
1078 | * |
1079 | * Return: true if PF owns primary timer, false otherwise. |
1080 | */ |
1081 | static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf) |
1082 | { |
1083 | return pf->hw.func_caps.ts_func_info.src_tmr_owned && |
1084 | ice_is_primary(hw: &pf->hw); |
1085 | } |
1086 | |
1087 | /** |
1088 | * ice_get_primary_hw - Get pointer to primary ice_hw structure |
1089 | * @pf: pointer to PF structure |
1090 | * |
1091 | * Return: A pointer to ice_hw structure with access to timesync |
1092 | * register space. |
1093 | */ |
1094 | static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf) |
1095 | { |
1096 | if (!pf->adapter->ctrl_pf) |
1097 | return &pf->hw; |
1098 | else |
1099 | return &pf->adapter->ctrl_pf->hw; |
1100 | } |
1101 | #endif /* _ICE_H_ */ |
1102 |
Definitions
- ice_feature
- ice_channel
- ice_txq_meta
- ice_tc_info
- ice_tc_cfg
- ice_qs_cfg
- ice_sw
- ice_pf_state
- ice_vsi_state
- ice_vsi_stats
- ice_vsi
- ice_vsi_cfg_params
- ice_q_vector
- ice_pf_flags
- ice_misc_thread_tasks
- ice_eswitch
- ice_agg_node
- ice_pf_msix
- ice_pf
- ice_netdev_priv
- ice_vector_ch_enabled
- ice_ptp_pf_handles_tx_interrupt
- ice_irq_dynamic_ena
- ice_netdev_to_pf
- ice_is_xdp_ena_vsi
- ice_set_ring_xdp
- ice_get_xp_from_qid
- ice_rx_xsk_pool
- ice_tx_xsk_pool
- ice_get_main_vsi
- ice_get_netdev_priv_vsi
- ice_get_ctrl_vsi
- ice_find_vsi
- ice_is_switchdev_running
- ice_is_adq_active
- ice_xdp_cfg
- ice_aq_task_state
- ice_aq_task
- ice_set_rdma_cap
- ice_clear_rdma_cap
- ice_is_dual
- ice_is_primary
- ice_pf_src_tmr_owned
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