1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /****************************************************************************** |
3 | ** Device driver for the PCI-SCSI NCR538XX controller family. |
4 | ** |
5 | ** Copyright (C) 1994 Wolfgang Stanglmeier |
6 | ** |
7 | ** |
8 | **----------------------------------------------------------------------------- |
9 | ** |
10 | ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver |
11 | ** and is currently maintained by |
12 | ** |
13 | ** Gerard Roudier <groudier@free.fr> |
14 | ** |
15 | ** Being given that this driver originates from the FreeBSD version, and |
16 | ** in order to keep synergy on both, any suggested enhancements and corrections |
17 | ** received on Linux are automatically a potential candidate for the FreeBSD |
18 | ** version. |
19 | ** |
20 | ** The original driver has been written for 386bsd and FreeBSD by |
21 | ** Wolfgang Stanglmeier <wolf@cologne.de> |
22 | ** Stefan Esser <se@mi.Uni-Koeln.de> |
23 | ** |
24 | ** And has been ported to NetBSD by |
25 | ** Charles M. Hannum <mycroft@gnu.ai.mit.edu> |
26 | ** |
27 | **----------------------------------------------------------------------------- |
28 | ** |
29 | ** Brief history |
30 | ** |
31 | ** December 10 1995 by Gerard Roudier: |
32 | ** Initial port to Linux. |
33 | ** |
34 | ** June 23 1996 by Gerard Roudier: |
35 | ** Support for 64 bits architectures (Alpha). |
36 | ** |
37 | ** November 30 1996 by Gerard Roudier: |
38 | ** Support for Fast-20 scsi. |
39 | ** Support for large DMA fifo and 128 dwords bursting. |
40 | ** |
41 | ** February 27 1997 by Gerard Roudier: |
42 | ** Support for Fast-40 scsi. |
43 | ** Support for on-Board RAM. |
44 | ** |
45 | ** May 3 1997 by Gerard Roudier: |
46 | ** Full support for scsi scripts instructions pre-fetching. |
47 | ** |
48 | ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: |
49 | ** Support for NvRAM detection and reading. |
50 | ** |
51 | ** August 18 1997 by Cort <cort@cs.nmt.edu>: |
52 | ** Support for Power/PC (Big Endian). |
53 | ** |
54 | ** June 20 1998 by Gerard Roudier |
55 | ** Support for up to 64 tags per lun. |
56 | ** O(1) everywhere (C and SCRIPTS) for normal cases. |
57 | ** Low PCI traffic for command handling when on-chip RAM is present. |
58 | ** Aggressive SCSI SCRIPTS optimizations. |
59 | ** |
60 | ** 2005 by Matthew Wilcox and James Bottomley |
61 | ** PCI-ectomy. This driver now supports only the 720 chip (see the |
62 | ** NCR_Q720 and zalon drivers for the bus probe logic). |
63 | ** |
64 | ******************************************************************************* |
65 | */ |
66 | |
67 | /* |
68 | ** Supported SCSI-II features: |
69 | ** Synchronous negotiation |
70 | ** Wide negotiation (depends on the NCR Chip) |
71 | ** Enable disconnection |
72 | ** Tagged command queuing |
73 | ** Parity checking |
74 | ** Etc... |
75 | ** |
76 | ** Supported NCR/SYMBIOS chips: |
77 | ** 53C720 (Wide, Fast SCSI-2, intfly problems) |
78 | */ |
79 | |
80 | /* Name and version of the driver */ |
81 | #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" |
82 | |
83 | #define SCSI_NCR_DEBUG_FLAGS (0) |
84 | |
85 | #include <linux/blkdev.h> |
86 | #include <linux/delay.h> |
87 | #include <linux/dma-mapping.h> |
88 | #include <linux/errno.h> |
89 | #include <linux/gfp.h> |
90 | #include <linux/init.h> |
91 | #include <linux/interrupt.h> |
92 | #include <linux/ioport.h> |
93 | #include <linux/mm.h> |
94 | #include <linux/module.h> |
95 | #include <linux/sched.h> |
96 | #include <linux/signal.h> |
97 | #include <linux/spinlock.h> |
98 | #include <linux/stat.h> |
99 | #include <linux/string.h> |
100 | #include <linux/time.h> |
101 | #include <linux/timer.h> |
102 | #include <linux/types.h> |
103 | |
104 | #include <asm/dma.h> |
105 | #include <asm/io.h> |
106 | |
107 | #include <scsi/scsi.h> |
108 | #include <scsi/scsi_cmnd.h> |
109 | #include <scsi/scsi_dbg.h> |
110 | #include <scsi/scsi_device.h> |
111 | #include <scsi/scsi_tcq.h> |
112 | #include <scsi/scsi_transport.h> |
113 | #include <scsi/scsi_transport_spi.h> |
114 | |
115 | #include "ncr53c8xx.h" |
116 | |
117 | #define NAME53C8XX "ncr53c8xx" |
118 | |
119 | /*========================================================== |
120 | ** |
121 | ** Debugging tags |
122 | ** |
123 | **========================================================== |
124 | */ |
125 | |
126 | #define DEBUG_ALLOC (0x0001) |
127 | #define DEBUG_PHASE (0x0002) |
128 | #define DEBUG_QUEUE (0x0008) |
129 | #define DEBUG_RESULT (0x0010) |
130 | #define DEBUG_POINTER (0x0020) |
131 | #define DEBUG_SCRIPT (0x0040) |
132 | #define DEBUG_TINY (0x0080) |
133 | #define DEBUG_TIMING (0x0100) |
134 | #define DEBUG_NEGO (0x0200) |
135 | #define DEBUG_TAGS (0x0400) |
136 | #define DEBUG_SCATTER (0x0800) |
137 | #define DEBUG_IC (0x1000) |
138 | |
139 | /* |
140 | ** Enable/Disable debug messages. |
141 | ** Can be changed at runtime too. |
142 | */ |
143 | |
144 | #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT |
145 | static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; |
146 | #define DEBUG_FLAGS ncr_debug |
147 | #else |
148 | #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS |
149 | #endif |
150 | |
151 | /* |
152 | * Locally used status flag |
153 | */ |
154 | #define SAM_STAT_ILLEGAL 0xff |
155 | |
156 | static inline struct list_head *ncr_list_pop(struct list_head *head) |
157 | { |
158 | if (!list_empty(head)) { |
159 | struct list_head *elem = head->next; |
160 | |
161 | list_del(entry: elem); |
162 | return elem; |
163 | } |
164 | |
165 | return NULL; |
166 | } |
167 | |
168 | /*========================================================== |
169 | ** |
170 | ** Simple power of two buddy-like allocator. |
171 | ** |
172 | ** This simple code is not intended to be fast, but to |
173 | ** provide power of 2 aligned memory allocations. |
174 | ** Since the SCRIPTS processor only supplies 8 bit |
175 | ** arithmetic, this allocator allows simple and fast |
176 | ** address calculations from the SCRIPTS code. |
177 | ** In addition, cache line alignment is guaranteed for |
178 | ** power of 2 cache line size. |
179 | ** Enhanced in linux-2.3.44 to provide a memory pool |
180 | ** per pcidev to support dynamic dma mapping. (I would |
181 | ** have preferred a real bus abstraction, btw). |
182 | ** |
183 | **========================================================== |
184 | */ |
185 | |
186 | #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ |
187 | #if PAGE_SIZE >= 8192 |
188 | #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ |
189 | #else |
190 | #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ |
191 | #endif |
192 | #define MEMO_FREE_UNUSED /* Free unused pages immediately */ |
193 | #define MEMO_WARN 1 |
194 | #define MEMO_GFP_FLAGS GFP_ATOMIC |
195 | #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) |
196 | #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) |
197 | #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) |
198 | |
199 | typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ |
200 | typedef struct device *m_bush_t; /* Something that addresses DMAable */ |
201 | |
202 | typedef struct m_link { /* Link between free memory chunks */ |
203 | struct m_link *next; |
204 | } m_link_s; |
205 | |
206 | typedef struct m_vtob { /* Virtual to Bus address translation */ |
207 | struct m_vtob *next; |
208 | m_addr_t vaddr; |
209 | m_addr_t baddr; |
210 | } m_vtob_s; |
211 | #define VTOB_HASH_SHIFT 5 |
212 | #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) |
213 | #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) |
214 | #define VTOB_HASH_CODE(m) \ |
215 | ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) |
216 | |
217 | typedef struct m_pool { /* Memory pool of a given kind */ |
218 | m_bush_t bush; |
219 | m_addr_t (*getp)(struct m_pool *); |
220 | void (*freep)(struct m_pool *, m_addr_t); |
221 | int nump; |
222 | m_vtob_s *(vtob[VTOB_HASH_SIZE]); |
223 | struct m_pool *next; |
224 | struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; |
225 | } m_pool_s; |
226 | |
227 | static void *___m_alloc(m_pool_s *mp, int size) |
228 | { |
229 | int i = 0; |
230 | int s = (1 << MEMO_SHIFT); |
231 | int j; |
232 | m_addr_t a; |
233 | m_link_s *h = mp->h; |
234 | |
235 | if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) |
236 | return NULL; |
237 | |
238 | while (size > s) { |
239 | s <<= 1; |
240 | ++i; |
241 | } |
242 | |
243 | j = i; |
244 | while (!h[j].next) { |
245 | if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { |
246 | h[j].next = (m_link_s *)mp->getp(mp); |
247 | if (h[j].next) |
248 | h[j].next->next = NULL; |
249 | break; |
250 | } |
251 | ++j; |
252 | s <<= 1; |
253 | } |
254 | a = (m_addr_t) h[j].next; |
255 | if (a) { |
256 | h[j].next = h[j].next->next; |
257 | while (j > i) { |
258 | j -= 1; |
259 | s >>= 1; |
260 | h[j].next = (m_link_s *) (a+s); |
261 | h[j].next->next = NULL; |
262 | } |
263 | } |
264 | #ifdef DEBUG |
265 | printk("___m_alloc(%d) = %p\n" , size, (void *) a); |
266 | #endif |
267 | return (void *) a; |
268 | } |
269 | |
270 | static void ___m_free(m_pool_s *mp, void *ptr, int size) |
271 | { |
272 | int i = 0; |
273 | int s = (1 << MEMO_SHIFT); |
274 | m_link_s *q; |
275 | m_addr_t a, b; |
276 | m_link_s *h = mp->h; |
277 | |
278 | #ifdef DEBUG |
279 | printk("___m_free(%p, %d)\n" , ptr, size); |
280 | #endif |
281 | |
282 | if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) |
283 | return; |
284 | |
285 | while (size > s) { |
286 | s <<= 1; |
287 | ++i; |
288 | } |
289 | |
290 | a = (m_addr_t) ptr; |
291 | |
292 | while (1) { |
293 | #ifdef MEMO_FREE_UNUSED |
294 | if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { |
295 | mp->freep(mp, a); |
296 | break; |
297 | } |
298 | #endif |
299 | b = a ^ s; |
300 | q = &h[i]; |
301 | while (q->next && q->next != (m_link_s *) b) { |
302 | q = q->next; |
303 | } |
304 | if (!q->next) { |
305 | ((m_link_s *) a)->next = h[i].next; |
306 | h[i].next = (m_link_s *) a; |
307 | break; |
308 | } |
309 | q->next = q->next->next; |
310 | a = a & b; |
311 | s <<= 1; |
312 | ++i; |
313 | } |
314 | } |
315 | |
316 | static DEFINE_SPINLOCK(ncr53c8xx_lock); |
317 | |
318 | static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) |
319 | { |
320 | void *p; |
321 | |
322 | p = ___m_alloc(mp, size); |
323 | |
324 | if (DEBUG_FLAGS & DEBUG_ALLOC) |
325 | printk ("new %-10s[%4d] @%p.\n" , name, size, p); |
326 | |
327 | if (p) |
328 | memset(p, 0, size); |
329 | else if (uflags & MEMO_WARN) |
330 | printk (NAME53C8XX ": failed to allocate %s[%d]\n" , name, size); |
331 | |
332 | return p; |
333 | } |
334 | |
335 | #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) |
336 | |
337 | static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) |
338 | { |
339 | if (DEBUG_FLAGS & DEBUG_ALLOC) |
340 | printk ("freeing %-10s[%4d] @%p.\n" , name, size, ptr); |
341 | |
342 | ___m_free(mp, ptr, size); |
343 | |
344 | } |
345 | |
346 | /* |
347 | * With pci bus iommu support, we use a default pool of unmapped memory |
348 | * for memory we donnot need to DMA from/to and one pool per pcidev for |
349 | * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. |
350 | */ |
351 | |
352 | static m_addr_t ___mp0_getp(m_pool_s *mp) |
353 | { |
354 | m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); |
355 | if (m) |
356 | ++mp->nump; |
357 | return m; |
358 | } |
359 | |
360 | static void ___mp0_freep(m_pool_s *mp, m_addr_t m) |
361 | { |
362 | free_pages(addr: m, MEMO_PAGE_ORDER); |
363 | --mp->nump; |
364 | } |
365 | |
366 | static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; |
367 | |
368 | /* |
369 | * DMAable pools. |
370 | */ |
371 | |
372 | /* |
373 | * With pci bus iommu support, we maintain one pool per pcidev and a |
374 | * hashed reverse table for virtual to bus physical address translations. |
375 | */ |
376 | static m_addr_t ___dma_getp(m_pool_s *mp) |
377 | { |
378 | m_addr_t vp; |
379 | m_vtob_s *vbp; |
380 | |
381 | vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB" ); |
382 | if (vbp) { |
383 | dma_addr_t daddr; |
384 | vp = (m_addr_t) dma_alloc_coherent(dev: mp->bush, |
385 | PAGE_SIZE<<MEMO_PAGE_ORDER, |
386 | dma_handle: &daddr, GFP_ATOMIC); |
387 | if (vp) { |
388 | int hc = VTOB_HASH_CODE(vp); |
389 | vbp->vaddr = vp; |
390 | vbp->baddr = daddr; |
391 | vbp->next = mp->vtob[hc]; |
392 | mp->vtob[hc] = vbp; |
393 | ++mp->nump; |
394 | return vp; |
395 | } |
396 | } |
397 | if (vbp) |
398 | __m_free(mp: &mp0, ptr: vbp, size: sizeof(*vbp), name: "VTOB" ); |
399 | return 0; |
400 | } |
401 | |
402 | static void ___dma_freep(m_pool_s *mp, m_addr_t m) |
403 | { |
404 | m_vtob_s **vbpp, *vbp; |
405 | int hc = VTOB_HASH_CODE(m); |
406 | |
407 | vbpp = &mp->vtob[hc]; |
408 | while (*vbpp && (*vbpp)->vaddr != m) |
409 | vbpp = &(*vbpp)->next; |
410 | if (*vbpp) { |
411 | vbp = *vbpp; |
412 | *vbpp = (*vbpp)->next; |
413 | dma_free_coherent(dev: mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, |
414 | cpu_addr: (void *)vbp->vaddr, dma_handle: (dma_addr_t)vbp->baddr); |
415 | __m_free(mp: &mp0, ptr: vbp, size: sizeof(*vbp), name: "VTOB" ); |
416 | --mp->nump; |
417 | } |
418 | } |
419 | |
420 | static inline m_pool_s *___get_dma_pool(m_bush_t bush) |
421 | { |
422 | m_pool_s *mp; |
423 | for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); |
424 | return mp; |
425 | } |
426 | |
427 | static m_pool_s *___cre_dma_pool(m_bush_t bush) |
428 | { |
429 | m_pool_s *mp; |
430 | mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL" ); |
431 | if (mp) { |
432 | memset(mp, 0, sizeof(*mp)); |
433 | mp->bush = bush; |
434 | mp->getp = ___dma_getp; |
435 | mp->freep = ___dma_freep; |
436 | mp->next = mp0.next; |
437 | mp0.next = mp; |
438 | } |
439 | return mp; |
440 | } |
441 | |
442 | static void ___del_dma_pool(m_pool_s *p) |
443 | { |
444 | struct m_pool **pp = &mp0.next; |
445 | |
446 | while (*pp && *pp != p) |
447 | pp = &(*pp)->next; |
448 | if (*pp) { |
449 | *pp = (*pp)->next; |
450 | __m_free(mp: &mp0, ptr: p, size: sizeof(*p), name: "MPOOL" ); |
451 | } |
452 | } |
453 | |
454 | static void *__m_calloc_dma(m_bush_t bush, int size, char *name) |
455 | { |
456 | u_long flags; |
457 | struct m_pool *mp; |
458 | void *m = NULL; |
459 | |
460 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
461 | mp = ___get_dma_pool(bush); |
462 | if (!mp) |
463 | mp = ___cre_dma_pool(bush); |
464 | if (mp) |
465 | m = __m_calloc(mp, size, name); |
466 | if (mp && !mp->nump) |
467 | ___del_dma_pool(p: mp); |
468 | spin_unlock_irqrestore(lock: &ncr53c8xx_lock, flags); |
469 | |
470 | return m; |
471 | } |
472 | |
473 | static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) |
474 | { |
475 | u_long flags; |
476 | struct m_pool *mp; |
477 | |
478 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
479 | mp = ___get_dma_pool(bush); |
480 | if (mp) |
481 | __m_free(mp, ptr: m, size, name); |
482 | if (mp && !mp->nump) |
483 | ___del_dma_pool(p: mp); |
484 | spin_unlock_irqrestore(lock: &ncr53c8xx_lock, flags); |
485 | } |
486 | |
487 | static m_addr_t __vtobus(m_bush_t bush, void *m) |
488 | { |
489 | u_long flags; |
490 | m_pool_s *mp; |
491 | int hc = VTOB_HASH_CODE(m); |
492 | m_vtob_s *vp = NULL; |
493 | m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; |
494 | |
495 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
496 | mp = ___get_dma_pool(bush); |
497 | if (mp) { |
498 | vp = mp->vtob[hc]; |
499 | while (vp && (m_addr_t) vp->vaddr != a) |
500 | vp = vp->next; |
501 | } |
502 | spin_unlock_irqrestore(lock: &ncr53c8xx_lock, flags); |
503 | return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; |
504 | } |
505 | |
506 | #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) |
507 | #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) |
508 | #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) |
509 | #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) |
510 | #define _vtobus(np, p) __vtobus(np->dev, p) |
511 | #define vtobus(p) _vtobus(np, p) |
512 | |
513 | /* |
514 | * Deal with DMA mapping/unmapping. |
515 | */ |
516 | |
517 | static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) |
518 | { |
519 | struct ncr_cmd_priv *cmd_priv = scsi_cmd_priv(cmd); |
520 | |
521 | switch(cmd_priv->data_mapped) { |
522 | case 2: |
523 | scsi_dma_unmap(cmd); |
524 | break; |
525 | } |
526 | cmd_priv->data_mapped = 0; |
527 | } |
528 | |
529 | static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) |
530 | { |
531 | struct ncr_cmd_priv *cmd_priv = scsi_cmd_priv(cmd); |
532 | int use_sg; |
533 | |
534 | use_sg = scsi_dma_map(cmd); |
535 | if (!use_sg) |
536 | return 0; |
537 | |
538 | cmd_priv->data_mapped = 2; |
539 | cmd_priv->data_mapping = use_sg; |
540 | |
541 | return use_sg; |
542 | } |
543 | |
544 | #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) |
545 | #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) |
546 | |
547 | /*========================================================== |
548 | ** |
549 | ** Driver setup. |
550 | ** |
551 | ** This structure is initialized from linux config |
552 | ** options. It can be overridden at boot-up by the boot |
553 | ** command line. |
554 | ** |
555 | **========================================================== |
556 | */ |
557 | static struct ncr_driver_setup |
558 | driver_setup = SCSI_NCR_DRIVER_SETUP; |
559 | |
560 | #ifndef MODULE |
561 | #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT |
562 | static struct ncr_driver_setup |
563 | driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; |
564 | #endif |
565 | #endif /* !MODULE */ |
566 | |
567 | #define initverbose (driver_setup.verbose) |
568 | #define bootverbose (np->verbose) |
569 | |
570 | |
571 | /*=================================================================== |
572 | ** |
573 | ** Driver setup from the boot command line |
574 | ** |
575 | **=================================================================== |
576 | */ |
577 | |
578 | #ifdef MODULE |
579 | #define ARG_SEP ' ' |
580 | #else |
581 | #define ARG_SEP ',' |
582 | #endif |
583 | |
584 | #define OPT_TAGS 1 |
585 | #define OPT_MASTER_PARITY 2 |
586 | #define OPT_SCSI_PARITY 3 |
587 | #define OPT_DISCONNECTION 4 |
588 | #define OPT_SPECIAL_FEATURES 5 |
589 | #define OPT_UNUSED_1 6 |
590 | #define OPT_FORCE_SYNC_NEGO 7 |
591 | #define OPT_REVERSE_PROBE 8 |
592 | #define OPT_DEFAULT_SYNC 9 |
593 | #define OPT_VERBOSE 10 |
594 | #define OPT_DEBUG 11 |
595 | #define OPT_BURST_MAX 12 |
596 | #define OPT_LED_PIN 13 |
597 | #define OPT_MAX_WIDE 14 |
598 | #define OPT_SETTLE_DELAY 15 |
599 | #define OPT_DIFF_SUPPORT 16 |
600 | #define OPT_IRQM 17 |
601 | #define OPT_PCI_FIX_UP 18 |
602 | #define OPT_BUS_CHECK 19 |
603 | #define OPT_OPTIMIZE 20 |
604 | #define OPT_RECOVERY 21 |
605 | #define OPT_SAFE_SETUP 22 |
606 | #define OPT_USE_NVRAM 23 |
607 | #define OPT_EXCLUDE 24 |
608 | #define OPT_HOST_ID 25 |
609 | |
610 | #ifdef SCSI_NCR_IARB_SUPPORT |
611 | #define OPT_IARB 26 |
612 | #endif |
613 | |
614 | #ifdef MODULE |
615 | #define ARG_SEP ' ' |
616 | #else |
617 | #define ARG_SEP ',' |
618 | #endif |
619 | |
620 | #ifndef MODULE |
621 | static char setup_token[] __initdata = |
622 | "tags:" "mpar:" |
623 | "spar:" "disc:" |
624 | "specf:" "ultra:" |
625 | "fsn:" "revprob:" |
626 | "sync:" "verb:" |
627 | "debug:" "burst:" |
628 | "led:" "wide:" |
629 | "settle:" "diff:" |
630 | "irqm:" "pcifix:" |
631 | "buschk:" "optim:" |
632 | "recovery:" |
633 | "safe:" "nvram:" |
634 | "excl:" "hostid:" |
635 | #ifdef SCSI_NCR_IARB_SUPPORT |
636 | "iarb:" |
637 | #endif |
638 | ; /* DONNOT REMOVE THIS ';' */ |
639 | |
640 | static int __init get_setup_token(char *p) |
641 | { |
642 | char *cur = setup_token; |
643 | char *pc; |
644 | int i = 0; |
645 | |
646 | while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { |
647 | ++pc; |
648 | ++i; |
649 | if (!strncmp(p, cur, pc - cur)) |
650 | return i; |
651 | cur = pc; |
652 | } |
653 | return 0; |
654 | } |
655 | |
656 | static int __init sym53c8xx__setup(char *str) |
657 | { |
658 | #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT |
659 | char *cur = str; |
660 | char *pc, *pv; |
661 | int i, val, c; |
662 | int xi = 0; |
663 | |
664 | while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { |
665 | char *pe; |
666 | |
667 | val = 0; |
668 | pv = pc; |
669 | c = *++pv; |
670 | |
671 | if (c == 'n') |
672 | val = 0; |
673 | else if (c == 'y') |
674 | val = 1; |
675 | else |
676 | val = (int) simple_strtoul(pv, &pe, 0); |
677 | |
678 | switch (get_setup_token(p: cur)) { |
679 | case OPT_TAGS: |
680 | driver_setup.default_tags = val; |
681 | if (pe && *pe == '/') { |
682 | i = 0; |
683 | while (*pe && *pe != ARG_SEP && |
684 | i < sizeof(driver_setup.tag_ctrl)-1) { |
685 | driver_setup.tag_ctrl[i++] = *pe++; |
686 | } |
687 | driver_setup.tag_ctrl[i] = '\0'; |
688 | } |
689 | break; |
690 | case OPT_MASTER_PARITY: |
691 | driver_setup.master_parity = val; |
692 | break; |
693 | case OPT_SCSI_PARITY: |
694 | driver_setup.scsi_parity = val; |
695 | break; |
696 | case OPT_DISCONNECTION: |
697 | driver_setup.disconnection = val; |
698 | break; |
699 | case OPT_SPECIAL_FEATURES: |
700 | driver_setup.special_features = val; |
701 | break; |
702 | case OPT_FORCE_SYNC_NEGO: |
703 | driver_setup.force_sync_nego = val; |
704 | break; |
705 | case OPT_REVERSE_PROBE: |
706 | driver_setup.reverse_probe = val; |
707 | break; |
708 | case OPT_DEFAULT_SYNC: |
709 | driver_setup.default_sync = val; |
710 | break; |
711 | case OPT_VERBOSE: |
712 | driver_setup.verbose = val; |
713 | break; |
714 | case OPT_DEBUG: |
715 | driver_setup.debug = val; |
716 | break; |
717 | case OPT_BURST_MAX: |
718 | driver_setup.burst_max = val; |
719 | break; |
720 | case OPT_LED_PIN: |
721 | driver_setup.led_pin = val; |
722 | break; |
723 | case OPT_MAX_WIDE: |
724 | driver_setup.max_wide = val? 1:0; |
725 | break; |
726 | case OPT_SETTLE_DELAY: |
727 | driver_setup.settle_delay = val; |
728 | break; |
729 | case OPT_DIFF_SUPPORT: |
730 | driver_setup.diff_support = val; |
731 | break; |
732 | case OPT_IRQM: |
733 | driver_setup.irqm = val; |
734 | break; |
735 | case OPT_PCI_FIX_UP: |
736 | driver_setup.pci_fix_up = val; |
737 | break; |
738 | case OPT_BUS_CHECK: |
739 | driver_setup.bus_check = val; |
740 | break; |
741 | case OPT_OPTIMIZE: |
742 | driver_setup.optimize = val; |
743 | break; |
744 | case OPT_RECOVERY: |
745 | driver_setup.recovery = val; |
746 | break; |
747 | case OPT_USE_NVRAM: |
748 | driver_setup.use_nvram = val; |
749 | break; |
750 | case OPT_SAFE_SETUP: |
751 | memcpy(&driver_setup, &driver_safe_setup, |
752 | sizeof(driver_setup)); |
753 | break; |
754 | case OPT_EXCLUDE: |
755 | if (xi < SCSI_NCR_MAX_EXCLUDES) |
756 | driver_setup.excludes[xi++] = val; |
757 | break; |
758 | case OPT_HOST_ID: |
759 | driver_setup.host_id = val; |
760 | break; |
761 | #ifdef SCSI_NCR_IARB_SUPPORT |
762 | case OPT_IARB: |
763 | driver_setup.iarb = val; |
764 | break; |
765 | #endif |
766 | default: |
767 | printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n" , (int)(pc-cur+1), cur); |
768 | break; |
769 | } |
770 | |
771 | if ((cur = strchr(cur, ARG_SEP)) != NULL) |
772 | ++cur; |
773 | } |
774 | #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ |
775 | return 1; |
776 | } |
777 | #endif /* !MODULE */ |
778 | |
779 | /*=================================================================== |
780 | ** |
781 | ** Get device queue depth from boot command line. |
782 | ** |
783 | **=================================================================== |
784 | */ |
785 | #define DEF_DEPTH (driver_setup.default_tags) |
786 | #define ALL_TARGETS -2 |
787 | #define NO_TARGET -1 |
788 | #define ALL_LUNS -2 |
789 | #define NO_LUN -1 |
790 | |
791 | static int device_queue_depth(int unit, int target, int lun) |
792 | { |
793 | int c, h, t, u, v; |
794 | char *p = driver_setup.tag_ctrl; |
795 | char *ep; |
796 | |
797 | h = -1; |
798 | t = NO_TARGET; |
799 | u = NO_LUN; |
800 | while ((c = *p++) != 0) { |
801 | v = simple_strtoul(p, &ep, 0); |
802 | switch(c) { |
803 | case '/': |
804 | ++h; |
805 | t = ALL_TARGETS; |
806 | u = ALL_LUNS; |
807 | break; |
808 | case 't': |
809 | if (t != target) |
810 | t = (target == v) ? v : NO_TARGET; |
811 | u = ALL_LUNS; |
812 | break; |
813 | case 'u': |
814 | if (u != lun) |
815 | u = (lun == v) ? v : NO_LUN; |
816 | break; |
817 | case 'q': |
818 | if (h == unit && |
819 | (t == ALL_TARGETS || t == target) && |
820 | (u == ALL_LUNS || u == lun)) |
821 | return v; |
822 | break; |
823 | case '-': |
824 | t = ALL_TARGETS; |
825 | u = ALL_LUNS; |
826 | break; |
827 | default: |
828 | break; |
829 | } |
830 | p = ep; |
831 | } |
832 | return DEF_DEPTH; |
833 | } |
834 | |
835 | |
836 | /*========================================================== |
837 | ** |
838 | ** The CCB done queue uses an array of CCB virtual |
839 | ** addresses. Empty entries are flagged using the bogus |
840 | ** virtual address 0xffffffff. |
841 | ** |
842 | ** Since PCI ensures that only aligned DWORDs are accessed |
843 | ** atomically, 64 bit little-endian architecture requires |
844 | ** to test the high order DWORD of the entry to determine |
845 | ** if it is empty or valid. |
846 | ** |
847 | ** BTW, I will make things differently as soon as I will |
848 | ** have a better idea, but this is simple and should work. |
849 | ** |
850 | **========================================================== |
851 | */ |
852 | |
853 | #define SCSI_NCR_CCB_DONE_SUPPORT |
854 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
855 | |
856 | #define MAX_DONE 24 |
857 | #define CCB_DONE_EMPTY 0xffffffffUL |
858 | |
859 | /* All 32 bit architectures */ |
860 | #if BITS_PER_LONG == 32 |
861 | #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) |
862 | |
863 | /* All > 32 bit (64 bit) architectures regardless endian-ness */ |
864 | #else |
865 | #define CCB_DONE_VALID(cp) \ |
866 | ((((u_long) cp) & 0xffffffff00000000ul) && \ |
867 | (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) |
868 | #endif |
869 | |
870 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
871 | |
872 | /*========================================================== |
873 | ** |
874 | ** Configuration and Debugging |
875 | ** |
876 | **========================================================== |
877 | */ |
878 | |
879 | /* |
880 | ** SCSI address of this device. |
881 | ** The boot routines should have set it. |
882 | ** If not, use this. |
883 | */ |
884 | |
885 | #ifndef SCSI_NCR_MYADDR |
886 | #define SCSI_NCR_MYADDR (7) |
887 | #endif |
888 | |
889 | /* |
890 | ** The maximum number of tags per logic unit. |
891 | ** Used only for disk devices that support tags. |
892 | */ |
893 | |
894 | #ifndef SCSI_NCR_MAX_TAGS |
895 | #define SCSI_NCR_MAX_TAGS (8) |
896 | #endif |
897 | |
898 | /* |
899 | ** TAGS are actually limited to 64 tags/lun. |
900 | ** We need to deal with power of 2, for alignment constraints. |
901 | */ |
902 | #if SCSI_NCR_MAX_TAGS > 64 |
903 | #define MAX_TAGS (64) |
904 | #else |
905 | #define MAX_TAGS SCSI_NCR_MAX_TAGS |
906 | #endif |
907 | |
908 | #define NO_TAG (255) |
909 | |
910 | /* |
911 | ** Choose appropriate type for tag bitmap. |
912 | */ |
913 | #if MAX_TAGS > 32 |
914 | typedef u64 tagmap_t; |
915 | #else |
916 | typedef u32 tagmap_t; |
917 | #endif |
918 | |
919 | /* |
920 | ** Number of targets supported by the driver. |
921 | ** n permits target numbers 0..n-1. |
922 | ** Default is 16, meaning targets #0..#15. |
923 | ** #7 .. is myself. |
924 | */ |
925 | |
926 | #ifdef SCSI_NCR_MAX_TARGET |
927 | #define MAX_TARGET (SCSI_NCR_MAX_TARGET) |
928 | #else |
929 | #define MAX_TARGET (16) |
930 | #endif |
931 | |
932 | /* |
933 | ** Number of logic units supported by the driver. |
934 | ** n enables logic unit numbers 0..n-1. |
935 | ** The common SCSI devices require only |
936 | ** one lun, so take 1 as the default. |
937 | */ |
938 | |
939 | #ifdef SCSI_NCR_MAX_LUN |
940 | #define MAX_LUN SCSI_NCR_MAX_LUN |
941 | #else |
942 | #define MAX_LUN (1) |
943 | #endif |
944 | |
945 | /* |
946 | ** Asynchronous pre-scaler (ns). Shall be 40 |
947 | */ |
948 | |
949 | #ifndef SCSI_NCR_MIN_ASYNC |
950 | #define SCSI_NCR_MIN_ASYNC (40) |
951 | #endif |
952 | |
953 | /* |
954 | ** The maximum number of jobs scheduled for starting. |
955 | ** There should be one slot per target, and one slot |
956 | ** for each tag of each target in use. |
957 | ** The calculation below is actually quite silly ... |
958 | */ |
959 | |
960 | #ifdef SCSI_NCR_CAN_QUEUE |
961 | #define MAX_START (SCSI_NCR_CAN_QUEUE + 4) |
962 | #else |
963 | #define MAX_START (MAX_TARGET + 7 * MAX_TAGS) |
964 | #endif |
965 | |
966 | /* |
967 | ** We limit the max number of pending IO to 250. |
968 | ** since we donnot want to allocate more than 1 |
969 | ** PAGE for 'scripth'. |
970 | */ |
971 | #if MAX_START > 250 |
972 | #undef MAX_START |
973 | #define MAX_START 250 |
974 | #endif |
975 | |
976 | /* |
977 | ** The maximum number of segments a transfer is split into. |
978 | ** We support up to 127 segments for both read and write. |
979 | ** The data scripts are broken into 2 sub-scripts. |
980 | ** 80 (MAX_SCATTERL) segments are moved from a sub-script |
981 | ** in on-chip RAM. This makes data transfers shorter than |
982 | ** 80k (assuming 1k fs) as fast as possible. |
983 | */ |
984 | |
985 | #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) |
986 | |
987 | #if (MAX_SCATTER > 80) |
988 | #define MAX_SCATTERL 80 |
989 | #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) |
990 | #else |
991 | #define MAX_SCATTERL (MAX_SCATTER-1) |
992 | #define MAX_SCATTERH 1 |
993 | #endif |
994 | |
995 | /* |
996 | ** other |
997 | */ |
998 | |
999 | #define NCR_SNOOP_TIMEOUT (1000000) |
1000 | |
1001 | /* |
1002 | ** Other definitions |
1003 | */ |
1004 | |
1005 | #define initverbose (driver_setup.verbose) |
1006 | #define bootverbose (np->verbose) |
1007 | |
1008 | /*========================================================== |
1009 | ** |
1010 | ** Command control block states. |
1011 | ** |
1012 | **========================================================== |
1013 | */ |
1014 | |
1015 | #define HS_IDLE (0) |
1016 | #define HS_BUSY (1) |
1017 | #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ |
1018 | #define HS_DISCONNECT (3) /* Disconnected by target */ |
1019 | |
1020 | #define HS_DONEMASK (0x80) |
1021 | #define HS_COMPLETE (4|HS_DONEMASK) |
1022 | #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ |
1023 | #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ |
1024 | #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ |
1025 | #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ |
1026 | #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ |
1027 | #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ |
1028 | |
1029 | /* |
1030 | ** Invalid host status values used by the SCRIPTS processor |
1031 | ** when the nexus is not fully identified. |
1032 | ** Shall never appear in a CCB. |
1033 | */ |
1034 | |
1035 | #define HS_INVALMASK (0x40) |
1036 | #define HS_SELECTING (0|HS_INVALMASK) |
1037 | #define HS_IN_RESELECT (1|HS_INVALMASK) |
1038 | #define HS_STARTING (2|HS_INVALMASK) |
1039 | |
1040 | /* |
1041 | ** Flags set by the SCRIPT processor for commands |
1042 | ** that have been skipped. |
1043 | */ |
1044 | #define HS_SKIPMASK (0x20) |
1045 | |
1046 | /*========================================================== |
1047 | ** |
1048 | ** Software Interrupt Codes |
1049 | ** |
1050 | **========================================================== |
1051 | */ |
1052 | |
1053 | #define SIR_BAD_STATUS (1) |
1054 | #define SIR_XXXXXXXXXX (2) |
1055 | #define SIR_NEGO_SYNC (3) |
1056 | #define SIR_NEGO_WIDE (4) |
1057 | #define SIR_NEGO_FAILED (5) |
1058 | #define SIR_NEGO_PROTO (6) |
1059 | #define SIR_REJECT_RECEIVED (7) |
1060 | #define SIR_REJECT_SENT (8) |
1061 | #define SIR_IGN_RESIDUE (9) |
1062 | #define SIR_MISSING_SAVE (10) |
1063 | #define SIR_RESEL_NO_MSG_IN (11) |
1064 | #define SIR_RESEL_NO_IDENTIFY (12) |
1065 | #define SIR_RESEL_BAD_LUN (13) |
1066 | #define SIR_RESEL_BAD_TARGET (14) |
1067 | #define SIR_RESEL_BAD_I_T_L (15) |
1068 | #define SIR_RESEL_BAD_I_T_L_Q (16) |
1069 | #define SIR_DONE_OVERFLOW (17) |
1070 | #define SIR_INTFLY (18) |
1071 | #define SIR_MAX (18) |
1072 | |
1073 | /*========================================================== |
1074 | ** |
1075 | ** Extended error codes. |
1076 | ** xerr_status field of struct ccb. |
1077 | ** |
1078 | **========================================================== |
1079 | */ |
1080 | |
1081 | #define XE_OK (0) |
1082 | #define (1) /* unexpected data phase */ |
1083 | #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ |
1084 | |
1085 | /*========================================================== |
1086 | ** |
1087 | ** Negotiation status. |
1088 | ** nego_status field of struct ccb. |
1089 | ** |
1090 | **========================================================== |
1091 | */ |
1092 | |
1093 | #define NS_NOCHANGE (0) |
1094 | #define NS_SYNC (1) |
1095 | #define NS_WIDE (2) |
1096 | #define NS_PPR (4) |
1097 | |
1098 | /*========================================================== |
1099 | ** |
1100 | ** Misc. |
1101 | ** |
1102 | **========================================================== |
1103 | */ |
1104 | |
1105 | #define CCB_MAGIC (0xf2691ad2) |
1106 | |
1107 | /*========================================================== |
1108 | ** |
1109 | ** Declaration of structs. |
1110 | ** |
1111 | **========================================================== |
1112 | */ |
1113 | |
1114 | static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; |
1115 | |
1116 | struct tcb; |
1117 | struct lcb; |
1118 | struct ccb; |
1119 | struct ncb; |
1120 | struct script; |
1121 | |
1122 | struct link { |
1123 | ncrcmd l_cmd; |
1124 | ncrcmd l_paddr; |
1125 | }; |
1126 | |
1127 | struct usrcmd { |
1128 | u_long target; |
1129 | u_long lun; |
1130 | u_long data; |
1131 | u_long cmd; |
1132 | }; |
1133 | |
1134 | #define UC_SETSYNC 10 |
1135 | #define UC_SETTAGS 11 |
1136 | #define UC_SETDEBUG 12 |
1137 | #define UC_SETORDER 13 |
1138 | #define UC_SETWIDE 14 |
1139 | #define UC_SETFLAG 15 |
1140 | #define UC_SETVERBOSE 17 |
1141 | |
1142 | #define UF_TRACE (0x01) |
1143 | #define UF_NODISC (0x02) |
1144 | #define UF_NOSCAN (0x04) |
1145 | |
1146 | /*======================================================================== |
1147 | ** |
1148 | ** Declaration of structs: target control block |
1149 | ** |
1150 | **======================================================================== |
1151 | */ |
1152 | struct tcb { |
1153 | /*---------------------------------------------------------------- |
1154 | ** During reselection the ncr jumps to this point with SFBR |
1155 | ** set to the encoded target number with bit 7 set. |
1156 | ** if it's not this target, jump to the next. |
1157 | ** |
1158 | ** JUMP IF (SFBR != #target#), @(next tcb) |
1159 | **---------------------------------------------------------------- |
1160 | */ |
1161 | struct link jump_tcb; |
1162 | |
1163 | /*---------------------------------------------------------------- |
1164 | ** Load the actual values for the sxfer and the scntl3 |
1165 | ** register (sync/wide mode). |
1166 | ** |
1167 | ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) |
1168 | ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) |
1169 | **---------------------------------------------------------------- |
1170 | */ |
1171 | ncrcmd getscr[6]; |
1172 | |
1173 | /*---------------------------------------------------------------- |
1174 | ** Get the IDENTIFY message and load the LUN to SFBR. |
1175 | ** |
1176 | ** CALL, <RESEL_LUN> |
1177 | **---------------------------------------------------------------- |
1178 | */ |
1179 | struct link call_lun; |
1180 | |
1181 | /*---------------------------------------------------------------- |
1182 | ** Now look for the right lun. |
1183 | ** |
1184 | ** For i = 0 to 3 |
1185 | ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) |
1186 | ** |
1187 | ** Recent chips will prefetch the 4 JUMPS using only 1 burst. |
1188 | ** It is kind of hashcoding. |
1189 | **---------------------------------------------------------------- |
1190 | */ |
1191 | struct link jump_lcb[4]; /* JUMPs for reselection */ |
1192 | struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ |
1193 | |
1194 | /*---------------------------------------------------------------- |
1195 | ** Pointer to the ccb used for negotiation. |
1196 | ** Prevent from starting a negotiation for all queued commands |
1197 | ** when tagged command queuing is enabled. |
1198 | **---------------------------------------------------------------- |
1199 | */ |
1200 | struct ccb * nego_cp; |
1201 | |
1202 | /*---------------------------------------------------------------- |
1203 | ** statistical data |
1204 | **---------------------------------------------------------------- |
1205 | */ |
1206 | u_long transfers; |
1207 | u_long bytes; |
1208 | |
1209 | /*---------------------------------------------------------------- |
1210 | ** negotiation of wide and synch transfer and device quirks. |
1211 | **---------------------------------------------------------------- |
1212 | */ |
1213 | #ifdef SCSI_NCR_BIG_ENDIAN |
1214 | /*0*/ u16 period; |
1215 | /*2*/ u_char sval; |
1216 | /*3*/ u_char minsync; |
1217 | /*0*/ u_char wval; |
1218 | /*1*/ u_char widedone; |
1219 | /*2*/ u_char quirks; |
1220 | /*3*/ u_char maxoffs; |
1221 | #else |
1222 | /*0*/ u_char minsync; |
1223 | /*1*/ u_char sval; |
1224 | /*2*/ u16 period; |
1225 | /*0*/ u_char maxoffs; |
1226 | /*1*/ u_char quirks; |
1227 | /*2*/ u_char widedone; |
1228 | /*3*/ u_char wval; |
1229 | #endif |
1230 | |
1231 | /* User settable limits and options. */ |
1232 | u_char usrsync; |
1233 | u_char usrwide; |
1234 | u_char usrtags; |
1235 | u_char usrflag; |
1236 | struct scsi_target *starget; |
1237 | }; |
1238 | |
1239 | /*======================================================================== |
1240 | ** |
1241 | ** Declaration of structs: lun control block |
1242 | ** |
1243 | **======================================================================== |
1244 | */ |
1245 | struct lcb { |
1246 | /*---------------------------------------------------------------- |
1247 | ** During reselection the ncr jumps to this point |
1248 | ** with SFBR set to the "Identify" message. |
1249 | ** if it's not this lun, jump to the next. |
1250 | ** |
1251 | ** JUMP IF (SFBR != #lun#), @(next lcb of this target) |
1252 | ** |
1253 | ** It is this lun. Load TEMP with the nexus jumps table |
1254 | ** address and jump to RESEL_TAG (or RESEL_NOTAG). |
1255 | ** |
1256 | ** SCR_COPY (4), p_jump_ccb, TEMP, |
1257 | ** SCR_JUMP, <RESEL_TAG> |
1258 | **---------------------------------------------------------------- |
1259 | */ |
1260 | struct link jump_lcb; |
1261 | ncrcmd load_jump_ccb[3]; |
1262 | struct link jump_tag; |
1263 | ncrcmd p_jump_ccb; /* Jump table bus address */ |
1264 | |
1265 | /*---------------------------------------------------------------- |
1266 | ** Jump table used by the script processor to directly jump |
1267 | ** to the CCB corresponding to the reselected nexus. |
1268 | ** Address is allocated on 256 bytes boundary in order to |
1269 | ** allow 8 bit calculation of the tag jump entry for up to |
1270 | ** 64 possible tags. |
1271 | **---------------------------------------------------------------- |
1272 | */ |
1273 | u32 jump_ccb_0; /* Default table if no tags */ |
1274 | u32 *jump_ccb; /* Virtual address */ |
1275 | |
1276 | /*---------------------------------------------------------------- |
1277 | ** CCB queue management. |
1278 | **---------------------------------------------------------------- |
1279 | */ |
1280 | struct list_head free_ccbq; /* Queue of available CCBs */ |
1281 | struct list_head busy_ccbq; /* Queue of busy CCBs */ |
1282 | struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ |
1283 | struct list_head skip_ccbq; /* Queue of skipped CCBs */ |
1284 | u_char actccbs; /* Number of allocated CCBs */ |
1285 | u_char busyccbs; /* CCBs busy for this lun */ |
1286 | u_char queuedccbs; /* CCBs queued to the controller*/ |
1287 | u_char queuedepth; /* Queue depth for this lun */ |
1288 | u_char scdev_depth; /* SCSI device queue depth */ |
1289 | u_char maxnxs; /* Max possible nexuses */ |
1290 | |
1291 | /*---------------------------------------------------------------- |
1292 | ** Control of tagged command queuing. |
1293 | ** Tags allocation is performed using a circular buffer. |
1294 | ** This avoids using a loop for tag allocation. |
1295 | **---------------------------------------------------------------- |
1296 | */ |
1297 | u_char ia_tag; /* Allocation index */ |
1298 | u_char if_tag; /* Freeing index */ |
1299 | u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ |
1300 | u_char usetags; /* Command queuing is active */ |
1301 | u_char maxtags; /* Max nr of tags asked by user */ |
1302 | u_char numtags; /* Current number of tags */ |
1303 | |
1304 | /*---------------------------------------------------------------- |
1305 | ** QUEUE FULL control and ORDERED tag control. |
1306 | **---------------------------------------------------------------- |
1307 | */ |
1308 | /*---------------------------------------------------------------- |
1309 | ** QUEUE FULL and ORDERED tag control. |
1310 | **---------------------------------------------------------------- |
1311 | */ |
1312 | u16 num_good; /* Nr of GOOD since QUEUE FULL */ |
1313 | tagmap_t tags_umap; /* Used tags bitmap */ |
1314 | tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ |
1315 | u_long tags_stime; /* Last time we set smap=umap */ |
1316 | struct ccb * held_ccb; /* CCB held for QUEUE FULL */ |
1317 | }; |
1318 | |
1319 | /*======================================================================== |
1320 | ** |
1321 | ** Declaration of structs: the launch script. |
1322 | ** |
1323 | **======================================================================== |
1324 | ** |
1325 | ** It is part of the CCB and is called by the scripts processor to |
1326 | ** start or restart the data structure (nexus). |
1327 | ** This 6 DWORDs mini script makes use of prefetching. |
1328 | ** |
1329 | **------------------------------------------------------------------------ |
1330 | */ |
1331 | struct launch { |
1332 | /*---------------------------------------------------------------- |
1333 | ** SCR_COPY(4), @(p_phys), @(dsa register) |
1334 | ** SCR_JUMP, @(scheduler_point) |
1335 | **---------------------------------------------------------------- |
1336 | */ |
1337 | ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ |
1338 | struct link schedule; /* Jump to scheduler point */ |
1339 | ncrcmd p_phys; /* 'phys' header bus address */ |
1340 | }; |
1341 | |
1342 | /*======================================================================== |
1343 | ** |
1344 | ** Declaration of structs: global HEADER. |
1345 | ** |
1346 | **======================================================================== |
1347 | ** |
1348 | ** This substructure is copied from the ccb to a global address after |
1349 | ** selection (or reselection) and copied back before disconnect. |
1350 | ** |
1351 | ** These fields are accessible to the script processor. |
1352 | ** |
1353 | **------------------------------------------------------------------------ |
1354 | */ |
1355 | |
1356 | struct head { |
1357 | /*---------------------------------------------------------------- |
1358 | ** Saved data pointer. |
1359 | ** Points to the position in the script responsible for the |
1360 | ** actual transfer transfer of data. |
1361 | ** It's written after reception of a SAVE_DATA_POINTER message. |
1362 | ** The goalpointer points after the last transfer command. |
1363 | **---------------------------------------------------------------- |
1364 | */ |
1365 | u32 savep; |
1366 | u32 lastp; |
1367 | u32 goalp; |
1368 | |
1369 | /*---------------------------------------------------------------- |
1370 | ** Alternate data pointer. |
1371 | ** They are copied back to savep/lastp/goalp by the SCRIPTS |
1372 | ** when the direction is unknown and the device claims data out. |
1373 | **---------------------------------------------------------------- |
1374 | */ |
1375 | u32 wlastp; |
1376 | u32 wgoalp; |
1377 | |
1378 | /*---------------------------------------------------------------- |
1379 | ** The virtual address of the ccb containing this header. |
1380 | **---------------------------------------------------------------- |
1381 | */ |
1382 | struct ccb * cp; |
1383 | |
1384 | /*---------------------------------------------------------------- |
1385 | ** Status fields. |
1386 | **---------------------------------------------------------------- |
1387 | */ |
1388 | u_char scr_st[4]; /* script status */ |
1389 | u_char status[4]; /* host status. must be the */ |
1390 | /* last DWORD of the header. */ |
1391 | }; |
1392 | |
1393 | /* |
1394 | ** The status bytes are used by the host and the script processor. |
1395 | ** |
1396 | ** The byte corresponding to the host_status must be stored in the |
1397 | ** last DWORD of the CCB header since it is used for command |
1398 | ** completion (ncr_wakeup()). Doing so, we are sure that the header |
1399 | ** has been entirely copied back to the CCB when the host_status is |
1400 | ** seen complete by the CPU. |
1401 | ** |
1402 | ** The last four bytes (status[4]) are copied to the scratchb register |
1403 | ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, |
1404 | ** and copied back just after disconnecting. |
1405 | ** Inside the script the XX_REG are used. |
1406 | ** |
1407 | ** The first four bytes (scr_st[4]) are used inside the script by |
1408 | ** "COPY" commands. |
1409 | ** Because source and destination must have the same alignment |
1410 | ** in a DWORD, the fields HAVE to be at the chosen offsets. |
1411 | ** xerr_st 0 (0x34) scratcha |
1412 | ** sync_st 1 (0x05) sxfer |
1413 | ** wide_st 3 (0x03) scntl3 |
1414 | */ |
1415 | |
1416 | /* |
1417 | ** Last four bytes (script) |
1418 | */ |
1419 | #define QU_REG scr0 |
1420 | #define HS_REG scr1 |
1421 | #define HS_PRT nc_scr1 |
1422 | #define SS_REG scr2 |
1423 | #define SS_PRT nc_scr2 |
1424 | #define PS_REG scr3 |
1425 | |
1426 | /* |
1427 | ** Last four bytes (host) |
1428 | */ |
1429 | #ifdef SCSI_NCR_BIG_ENDIAN |
1430 | #define actualquirks phys.header.status[3] |
1431 | #define host_status phys.header.status[2] |
1432 | #define scsi_status phys.header.status[1] |
1433 | #define parity_status phys.header.status[0] |
1434 | #else |
1435 | #define actualquirks phys.header.status[0] |
1436 | #define host_status phys.header.status[1] |
1437 | #define scsi_status phys.header.status[2] |
1438 | #define parity_status phys.header.status[3] |
1439 | #endif |
1440 | |
1441 | /* |
1442 | ** First four bytes (script) |
1443 | */ |
1444 | #define xerr_st header.scr_st[0] |
1445 | #define sync_st header.scr_st[1] |
1446 | #define nego_st header.scr_st[2] |
1447 | #define wide_st header.scr_st[3] |
1448 | |
1449 | /* |
1450 | ** First four bytes (host) |
1451 | */ |
1452 | #define xerr_status phys.xerr_st |
1453 | #define nego_status phys.nego_st |
1454 | |
1455 | /*========================================================== |
1456 | ** |
1457 | ** Declaration of structs: Data structure block |
1458 | ** |
1459 | **========================================================== |
1460 | ** |
1461 | ** During execution of a ccb by the script processor, |
1462 | ** the DSA (data structure address) register points |
1463 | ** to this substructure of the ccb. |
1464 | ** This substructure contains the header with |
1465 | ** the script-processor-changeable data and |
1466 | ** data blocks for the indirect move commands. |
1467 | ** |
1468 | **---------------------------------------------------------- |
1469 | */ |
1470 | |
1471 | struct dsb { |
1472 | |
1473 | /* |
1474 | ** Header. |
1475 | */ |
1476 | |
1477 | struct head ; |
1478 | |
1479 | /* |
1480 | ** Table data for Script |
1481 | */ |
1482 | |
1483 | struct scr_tblsel select; |
1484 | struct scr_tblmove smsg ; |
1485 | struct scr_tblmove cmd ; |
1486 | struct scr_tblmove sense ; |
1487 | struct scr_tblmove data[MAX_SCATTER]; |
1488 | }; |
1489 | |
1490 | |
1491 | /*======================================================================== |
1492 | ** |
1493 | ** Declaration of structs: Command control block. |
1494 | ** |
1495 | **======================================================================== |
1496 | */ |
1497 | struct ccb { |
1498 | /*---------------------------------------------------------------- |
1499 | ** This is the data structure which is pointed by the DSA |
1500 | ** register when it is executed by the script processor. |
1501 | ** It must be the first entry because it contains the header |
1502 | ** as first entry that must be cache line aligned. |
1503 | **---------------------------------------------------------------- |
1504 | */ |
1505 | struct dsb phys; |
1506 | |
1507 | /*---------------------------------------------------------------- |
1508 | ** Mini-script used at CCB execution start-up. |
1509 | ** Load the DSA with the data structure address (phys) and |
1510 | ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. |
1511 | **---------------------------------------------------------------- |
1512 | */ |
1513 | struct launch start; |
1514 | |
1515 | /*---------------------------------------------------------------- |
1516 | ** Mini-script used at CCB relection to restart the nexus. |
1517 | ** Load the DSA with the data structure address (phys) and |
1518 | ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. |
1519 | **---------------------------------------------------------------- |
1520 | */ |
1521 | struct launch restart; |
1522 | |
1523 | /*---------------------------------------------------------------- |
1524 | ** If a data transfer phase is terminated too early |
1525 | ** (after reception of a message (i.e. DISCONNECT)), |
1526 | ** we have to prepare a mini script to transfer |
1527 | ** the rest of the data. |
1528 | **---------------------------------------------------------------- |
1529 | */ |
1530 | ncrcmd patch[8]; |
1531 | |
1532 | /*---------------------------------------------------------------- |
1533 | ** The general SCSI driver provides a |
1534 | ** pointer to a control block. |
1535 | **---------------------------------------------------------------- |
1536 | */ |
1537 | struct scsi_cmnd *cmd; /* SCSI command */ |
1538 | u_char cdb_buf[16]; /* Copy of CDB */ |
1539 | u_char sense_buf[64]; |
1540 | int data_len; /* Total data length */ |
1541 | |
1542 | /*---------------------------------------------------------------- |
1543 | ** Message areas. |
1544 | ** We prepare a message to be sent after selection. |
1545 | ** We may use a second one if the command is rescheduled |
1546 | ** due to GETCC or QFULL. |
1547 | ** Contents are IDENTIFY and SIMPLE_TAG. |
1548 | ** While negotiating sync or wide transfer, |
1549 | ** a SDTR or WDTR message is appended. |
1550 | **---------------------------------------------------------------- |
1551 | */ |
1552 | u_char scsi_smsg [8]; |
1553 | u_char scsi_smsg2[8]; |
1554 | |
1555 | /*---------------------------------------------------------------- |
1556 | ** Other fields. |
1557 | **---------------------------------------------------------------- |
1558 | */ |
1559 | u_long p_ccb; /* BUS address of this CCB */ |
1560 | u_char sensecmd[6]; /* Sense command */ |
1561 | u_char tag; /* Tag for this transfer */ |
1562 | /* 255 means no tag */ |
1563 | u_char target; |
1564 | u_char lun; |
1565 | u_char queued; |
1566 | u_char auto_sense; |
1567 | struct ccb * link_ccb; /* Host adapter CCB chain */ |
1568 | struct list_head link_ccbq; /* Link to unit CCB queue */ |
1569 | u32 startp; /* Initial data pointer */ |
1570 | u_long magic; /* Free / busy CCB flag */ |
1571 | }; |
1572 | |
1573 | #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) |
1574 | |
1575 | |
1576 | /*======================================================================== |
1577 | ** |
1578 | ** Declaration of structs: NCR device descriptor |
1579 | ** |
1580 | **======================================================================== |
1581 | */ |
1582 | struct ncb { |
1583 | /*---------------------------------------------------------------- |
1584 | ** The global header. |
1585 | ** It is accessible to both the host and the script processor. |
1586 | ** Must be cache line size aligned (32 for x86) in order to |
1587 | ** allow cache line bursting when it is copied to/from CCB. |
1588 | **---------------------------------------------------------------- |
1589 | */ |
1590 | struct head ; |
1591 | |
1592 | /*---------------------------------------------------------------- |
1593 | ** CCBs management queues. |
1594 | **---------------------------------------------------------------- |
1595 | */ |
1596 | struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ |
1597 | /* when lcb is not allocated. */ |
1598 | struct scsi_cmnd *done_list; /* Commands waiting for done() */ |
1599 | /* callback to be invoked. */ |
1600 | spinlock_t smp_lock; /* Lock for SMP threading */ |
1601 | |
1602 | /*---------------------------------------------------------------- |
1603 | ** Chip and controller identification. |
1604 | **---------------------------------------------------------------- |
1605 | */ |
1606 | int unit; /* Unit number */ |
1607 | char inst_name[16]; /* ncb instance name */ |
1608 | |
1609 | /*---------------------------------------------------------------- |
1610 | ** Initial value of some IO register bits. |
1611 | ** These values are assumed to have been set by BIOS, and may |
1612 | ** be used for probing adapter implementation differences. |
1613 | **---------------------------------------------------------------- |
1614 | */ |
1615 | u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, |
1616 | sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; |
1617 | |
1618 | /*---------------------------------------------------------------- |
1619 | ** Actual initial value of IO register bits used by the |
1620 | ** driver. They are loaded at initialisation according to |
1621 | ** features that are to be enabled. |
1622 | **---------------------------------------------------------------- |
1623 | */ |
1624 | u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, |
1625 | rv_ctest4, rv_ctest5, rv_stest2; |
1626 | |
1627 | /*---------------------------------------------------------------- |
1628 | ** Targets management. |
1629 | ** During reselection the ncr jumps to jump_tcb. |
1630 | ** The SFBR register is loaded with the encoded target id. |
1631 | ** For i = 0 to 3 |
1632 | ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) |
1633 | ** |
1634 | ** Recent chips will prefetch the 4 JUMPS using only 1 burst. |
1635 | ** It is kind of hashcoding. |
1636 | **---------------------------------------------------------------- |
1637 | */ |
1638 | struct link jump_tcb[4]; /* JUMPs for reselection */ |
1639 | struct tcb target[MAX_TARGET]; /* Target data */ |
1640 | |
1641 | /*---------------------------------------------------------------- |
1642 | ** Virtual and physical bus addresses of the chip. |
1643 | **---------------------------------------------------------------- |
1644 | */ |
1645 | void __iomem *vaddr; /* Virtual and bus address of */ |
1646 | unsigned long paddr; /* chip's IO registers. */ |
1647 | unsigned long paddr2; /* On-chip RAM bus address. */ |
1648 | volatile /* Pointer to volatile for */ |
1649 | struct ncr_reg __iomem *reg; /* memory mapped IO. */ |
1650 | |
1651 | /*---------------------------------------------------------------- |
1652 | ** SCRIPTS virtual and physical bus addresses. |
1653 | ** 'script' is loaded in the on-chip RAM if present. |
1654 | ** 'scripth' stays in main memory. |
1655 | **---------------------------------------------------------------- |
1656 | */ |
1657 | struct script *script0; /* Copies of script and scripth */ |
1658 | struct scripth *scripth0; /* relocated for this ncb. */ |
1659 | struct scripth *scripth; /* Actual scripth virt. address */ |
1660 | u_long p_script; /* Actual script and scripth */ |
1661 | u_long p_scripth; /* bus addresses. */ |
1662 | |
1663 | /*---------------------------------------------------------------- |
1664 | ** General controller parameters and configuration. |
1665 | **---------------------------------------------------------------- |
1666 | */ |
1667 | struct device *dev; |
1668 | u_char revision_id; /* PCI device revision id */ |
1669 | u32 irq; /* IRQ level */ |
1670 | u32 features; /* Chip features map */ |
1671 | u_char myaddr; /* SCSI id of the adapter */ |
1672 | u_char maxburst; /* log base 2 of dwords burst */ |
1673 | u_char maxwide; /* Maximum transfer width */ |
1674 | u_char minsync; /* Minimum sync period factor */ |
1675 | u_char maxsync; /* Maximum sync period factor */ |
1676 | u_char maxoffs; /* Max scsi offset */ |
1677 | u_char multiplier; /* Clock multiplier (1,2,4) */ |
1678 | u_char clock_divn; /* Number of clock divisors */ |
1679 | u_long clock_khz; /* SCSI clock frequency in KHz */ |
1680 | |
1681 | /*---------------------------------------------------------------- |
1682 | ** Start queue management. |
1683 | ** It is filled up by the host processor and accessed by the |
1684 | ** SCRIPTS processor in order to start SCSI commands. |
1685 | **---------------------------------------------------------------- |
1686 | */ |
1687 | u16 squeueput; /* Next free slot of the queue */ |
1688 | u16 actccbs; /* Number of allocated CCBs */ |
1689 | u16 queuedccbs; /* Number of CCBs in start queue*/ |
1690 | u16 queuedepth; /* Start queue depth */ |
1691 | |
1692 | /*---------------------------------------------------------------- |
1693 | ** Timeout handler. |
1694 | **---------------------------------------------------------------- |
1695 | */ |
1696 | struct timer_list timer; /* Timer handler link header */ |
1697 | u_long lasttime; |
1698 | u_long settle_time; /* Resetting the SCSI BUS */ |
1699 | |
1700 | /*---------------------------------------------------------------- |
1701 | ** Debugging and profiling. |
1702 | **---------------------------------------------------------------- |
1703 | */ |
1704 | struct ncr_reg regdump; /* Register dump */ |
1705 | u_long regtime; /* Time it has been done */ |
1706 | |
1707 | /*---------------------------------------------------------------- |
1708 | ** Miscellaneous buffers accessed by the scripts-processor. |
1709 | ** They shall be DWORD aligned, because they may be read or |
1710 | ** written with a SCR_COPY script command. |
1711 | **---------------------------------------------------------------- |
1712 | */ |
1713 | u_char msgout[8]; /* Buffer for MESSAGE OUT */ |
1714 | u_char msgin [8]; /* Buffer for MESSAGE IN */ |
1715 | u32 lastmsg; /* Last SCSI message sent */ |
1716 | u_char scratch; /* Scratch for SCSI receive */ |
1717 | |
1718 | /*---------------------------------------------------------------- |
1719 | ** Miscellaneous configuration and status parameters. |
1720 | **---------------------------------------------------------------- |
1721 | */ |
1722 | u_char disc; /* Disconnection allowed */ |
1723 | u_char scsi_mode; /* Current SCSI BUS mode */ |
1724 | u_char order; /* Tag order to use */ |
1725 | u_char verbose; /* Verbosity for this controller*/ |
1726 | int ncr_cache; /* Used for cache test at init. */ |
1727 | u_long p_ncb; /* BUS address of this NCB */ |
1728 | |
1729 | /*---------------------------------------------------------------- |
1730 | ** Command completion handling. |
1731 | **---------------------------------------------------------------- |
1732 | */ |
1733 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
1734 | struct ccb *(ccb_done[MAX_DONE]); |
1735 | int ccb_done_ic; |
1736 | #endif |
1737 | /*---------------------------------------------------------------- |
1738 | ** Fields that should be removed or changed. |
1739 | **---------------------------------------------------------------- |
1740 | */ |
1741 | struct ccb *ccb; /* Global CCB */ |
1742 | struct usrcmd user; /* Command from user */ |
1743 | volatile u_char release_stage; /* Synchronisation stage on release */ |
1744 | }; |
1745 | |
1746 | #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) |
1747 | #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) |
1748 | |
1749 | /*========================================================== |
1750 | ** |
1751 | ** |
1752 | ** Script for NCR-Processor. |
1753 | ** |
1754 | ** Use ncr_script_fill() to create the variable parts. |
1755 | ** Use ncr_script_copy_and_bind() to make a copy and |
1756 | ** bind to physical addresses. |
1757 | ** |
1758 | ** |
1759 | **========================================================== |
1760 | ** |
1761 | ** We have to know the offsets of all labels before |
1762 | ** we reach them (for forward jumps). |
1763 | ** Therefore we declare a struct here. |
1764 | ** If you make changes inside the script, |
1765 | ** DONT FORGET TO CHANGE THE LENGTHS HERE! |
1766 | ** |
1767 | **---------------------------------------------------------- |
1768 | */ |
1769 | |
1770 | /* |
1771 | ** For HP Zalon/53c720 systems, the Zalon interface |
1772 | ** between CPU and 53c720 does prefetches, which causes |
1773 | ** problems with self modifying scripts. The problem |
1774 | ** is overcome by calling a dummy subroutine after each |
1775 | ** modification, to force a refetch of the script on |
1776 | ** return from the subroutine. |
1777 | */ |
1778 | |
1779 | #ifdef CONFIG_NCR53C8XX_PREFETCH |
1780 | #define PREFETCH_FLUSH_CNT 2 |
1781 | #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), |
1782 | #else |
1783 | #define PREFETCH_FLUSH_CNT 0 |
1784 | #define PREFETCH_FLUSH |
1785 | #endif |
1786 | |
1787 | /* |
1788 | ** Script fragments which are loaded into the on-chip RAM |
1789 | ** of 825A, 875 and 895 chips. |
1790 | */ |
1791 | struct script { |
1792 | ncrcmd start [ 5]; |
1793 | ncrcmd startpos [ 1]; |
1794 | ncrcmd select [ 6]; |
1795 | ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; |
1796 | ncrcmd loadpos [ 4]; |
1797 | ncrcmd send_ident [ 9]; |
1798 | ncrcmd prepare [ 6]; |
1799 | ncrcmd prepare2 [ 7]; |
1800 | ncrcmd command [ 6]; |
1801 | ncrcmd dispatch [ 32]; |
1802 | ncrcmd clrack [ 4]; |
1803 | ncrcmd no_data [ 17]; |
1804 | ncrcmd status [ 8]; |
1805 | ncrcmd msg_in [ 2]; |
1806 | ncrcmd msg_in2 [ 16]; |
1807 | ncrcmd msg_bad [ 4]; |
1808 | ncrcmd setmsg [ 7]; |
1809 | ncrcmd cleanup [ 6]; |
1810 | ncrcmd complete [ 9]; |
1811 | ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; |
1812 | ncrcmd cleanup0 [ 1]; |
1813 | #ifndef SCSI_NCR_CCB_DONE_SUPPORT |
1814 | ncrcmd signal [ 12]; |
1815 | #else |
1816 | ncrcmd signal [ 9]; |
1817 | ncrcmd done_pos [ 1]; |
1818 | ncrcmd done_plug [ 2]; |
1819 | ncrcmd done_end [ 7]; |
1820 | #endif |
1821 | ncrcmd save_dp [ 7]; |
1822 | ncrcmd restore_dp [ 5]; |
1823 | ncrcmd disconnect [ 10]; |
1824 | ncrcmd msg_out [ 9]; |
1825 | ncrcmd msg_out_done [ 7]; |
1826 | ncrcmd idle [ 2]; |
1827 | ncrcmd reselect [ 8]; |
1828 | ncrcmd reselected [ 8]; |
1829 | ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; |
1830 | ncrcmd loadpos1 [ 4]; |
1831 | ncrcmd resel_lun [ 6]; |
1832 | ncrcmd resel_tag [ 6]; |
1833 | ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; |
1834 | ncrcmd nexus_indirect [ 4]; |
1835 | ncrcmd resel_notag [ 4]; |
1836 | ncrcmd data_in [MAX_SCATTERL * 4]; |
1837 | ncrcmd data_in2 [ 4]; |
1838 | ncrcmd data_out [MAX_SCATTERL * 4]; |
1839 | ncrcmd data_out2 [ 4]; |
1840 | }; |
1841 | |
1842 | /* |
1843 | ** Script fragments which stay in main memory for all chips. |
1844 | */ |
1845 | struct scripth { |
1846 | ncrcmd tryloop [MAX_START*2]; |
1847 | ncrcmd tryloop2 [ 2]; |
1848 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
1849 | ncrcmd done_queue [MAX_DONE*5]; |
1850 | ncrcmd done_queue2 [ 2]; |
1851 | #endif |
1852 | ncrcmd select_no_atn [ 8]; |
1853 | ncrcmd cancel [ 4]; |
1854 | ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; |
1855 | ncrcmd skip2 [ 19]; |
1856 | ncrcmd par_err_data_in [ 6]; |
1857 | ncrcmd par_err_other [ 4]; |
1858 | ncrcmd msg_reject [ 8]; |
1859 | ncrcmd msg_ign_residue [ 24]; |
1860 | ncrcmd msg_extended [ 10]; |
1861 | ncrcmd msg_ext_2 [ 10]; |
1862 | ncrcmd msg_wdtr [ 14]; |
1863 | ncrcmd send_wdtr [ 7]; |
1864 | ncrcmd msg_ext_3 [ 10]; |
1865 | ncrcmd msg_sdtr [ 14]; |
1866 | ncrcmd send_sdtr [ 7]; |
1867 | ncrcmd nego_bad_phase [ 4]; |
1868 | ncrcmd msg_out_abort [ 10]; |
1869 | ncrcmd hdata_in [MAX_SCATTERH * 4]; |
1870 | ncrcmd hdata_in2 [ 2]; |
1871 | ncrcmd hdata_out [MAX_SCATTERH * 4]; |
1872 | ncrcmd hdata_out2 [ 2]; |
1873 | ncrcmd reset [ 4]; |
1874 | ncrcmd aborttag [ 4]; |
1875 | ncrcmd abort [ 2]; |
1876 | ncrcmd abort_resel [ 20]; |
1877 | ncrcmd resend_ident [ 4]; |
1878 | ncrcmd clratn_go_on [ 3]; |
1879 | ncrcmd nxtdsp_go_on [ 1]; |
1880 | ncrcmd sdata_in [ 8]; |
1881 | ncrcmd data_io [ 18]; |
1882 | ncrcmd bad_identify [ 12]; |
1883 | ncrcmd bad_i_t_l [ 4]; |
1884 | ncrcmd bad_i_t_l_q [ 4]; |
1885 | ncrcmd bad_target [ 8]; |
1886 | ncrcmd bad_status [ 8]; |
1887 | ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; |
1888 | ncrcmd start_ram0 [ 4]; |
1889 | ncrcmd sto_restart [ 5]; |
1890 | ncrcmd wait_dma [ 2]; |
1891 | ncrcmd snooptest [ 9]; |
1892 | ncrcmd snoopend [ 2]; |
1893 | }; |
1894 | |
1895 | /*========================================================== |
1896 | ** |
1897 | ** |
1898 | ** Function headers. |
1899 | ** |
1900 | ** |
1901 | **========================================================== |
1902 | */ |
1903 | |
1904 | static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); |
1905 | static void ncr_complete (struct ncb *np, struct ccb *cp); |
1906 | static void ncr_exception (struct ncb *np); |
1907 | static void ncr_free_ccb (struct ncb *np, struct ccb *cp); |
1908 | static void ncr_init_ccb (struct ncb *np, struct ccb *cp); |
1909 | static void ncr_init_tcb (struct ncb *np, u_char tn); |
1910 | static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); |
1911 | static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); |
1912 | static void ncr_getclock (struct ncb *np, int mult); |
1913 | static void ncr_selectclock (struct ncb *np, u_char scntl3); |
1914 | static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); |
1915 | static void ncr_chip_reset (struct ncb *np, int delay); |
1916 | static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); |
1917 | static int ncr_int_sbmc (struct ncb *np); |
1918 | static int ncr_int_par (struct ncb *np); |
1919 | static void ncr_int_ma (struct ncb *np); |
1920 | static void ncr_int_sir (struct ncb *np); |
1921 | static void ncr_int_sto (struct ncb *np); |
1922 | static void ncr_negotiate (struct ncb* np, struct tcb* tp); |
1923 | static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); |
1924 | |
1925 | static void ncr_script_copy_and_bind |
1926 | (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); |
1927 | static void ncr_script_fill (struct script * scr, struct scripth * scripth); |
1928 | static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); |
1929 | static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); |
1930 | static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); |
1931 | static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); |
1932 | static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); |
1933 | static int ncr_snooptest (struct ncb *np); |
1934 | static void ncr_timeout (struct ncb *np); |
1935 | static void ncr_wakeup (struct ncb *np, u_long code); |
1936 | static void ncr_wakeup_done (struct ncb *np); |
1937 | static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); |
1938 | static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); |
1939 | |
1940 | static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); |
1941 | static void process_waiting_list(struct ncb *np, int sts); |
1942 | |
1943 | #define requeue_waiting_list(np) process_waiting_list((np), DID_OK) |
1944 | #define reset_waiting_list(np) process_waiting_list((np), DID_RESET) |
1945 | |
1946 | static inline char *ncr_name (struct ncb *np) |
1947 | { |
1948 | return np->inst_name; |
1949 | } |
1950 | |
1951 | |
1952 | /*========================================================== |
1953 | ** |
1954 | ** |
1955 | ** Scripts for NCR-Processor. |
1956 | ** |
1957 | ** Use ncr_script_bind for binding to physical addresses. |
1958 | ** |
1959 | ** |
1960 | **========================================================== |
1961 | ** |
1962 | ** NADDR generates a reference to a field of the controller data. |
1963 | ** PADDR generates a reference to another part of the script. |
1964 | ** RADDR generates a reference to a script processor register. |
1965 | ** FADDR generates a reference to a script processor register |
1966 | ** with offset. |
1967 | ** |
1968 | **---------------------------------------------------------- |
1969 | */ |
1970 | |
1971 | #define RELOC_SOFTC 0x40000000 |
1972 | #define RELOC_LABEL 0x50000000 |
1973 | #define RELOC_REGISTER 0x60000000 |
1974 | #define RELOC_LABELH 0x80000000 |
1975 | #define RELOC_MASK 0xf0000000 |
1976 | |
1977 | #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) |
1978 | #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) |
1979 | #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) |
1980 | #define RADDR(label) (RELOC_REGISTER | REG(label)) |
1981 | #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) |
1982 | |
1983 | |
1984 | static struct script script0 __initdata = { |
1985 | /*--------------------------< START >-----------------------*/ { |
1986 | /* |
1987 | ** This NOP will be patched with LED ON |
1988 | ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) |
1989 | */ |
1990 | SCR_NO_OP, |
1991 | 0, |
1992 | /* |
1993 | ** Clear SIGP. |
1994 | */ |
1995 | SCR_FROM_REG (ctest2), |
1996 | 0, |
1997 | /* |
1998 | ** Then jump to a certain point in tryloop. |
1999 | ** Due to the lack of indirect addressing the code |
2000 | ** is self modifying here. |
2001 | */ |
2002 | SCR_JUMP, |
2003 | }/*-------------------------< STARTPOS >--------------------*/,{ |
2004 | PADDRH(tryloop), |
2005 | |
2006 | }/*-------------------------< SELECT >----------------------*/,{ |
2007 | /* |
2008 | ** DSA contains the address of a scheduled |
2009 | ** data structure. |
2010 | ** |
2011 | ** SCRATCHA contains the address of the script, |
2012 | ** which starts the next entry. |
2013 | ** |
2014 | ** Set Initiator mode. |
2015 | ** |
2016 | ** (Target mode is left as an exercise for the reader) |
2017 | */ |
2018 | |
2019 | SCR_CLR (SCR_TRG), |
2020 | 0, |
2021 | SCR_LOAD_REG (HS_REG, HS_SELECTING), |
2022 | 0, |
2023 | |
2024 | /* |
2025 | ** And try to select this target. |
2026 | */ |
2027 | SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), |
2028 | PADDR (reselect), |
2029 | |
2030 | }/*-------------------------< SELECT2 >----------------------*/,{ |
2031 | /* |
2032 | ** Now there are 4 possibilities: |
2033 | ** |
2034 | ** (1) The ncr loses arbitration. |
2035 | ** This is ok, because it will try again, |
2036 | ** when the bus becomes idle. |
2037 | ** (But beware of the timeout function!) |
2038 | ** |
2039 | ** (2) The ncr is reselected. |
2040 | ** Then the script processor takes the jump |
2041 | ** to the RESELECT label. |
2042 | ** |
2043 | ** (3) The ncr wins arbitration. |
2044 | ** Then it will execute SCRIPTS instruction until |
2045 | ** the next instruction that checks SCSI phase. |
2046 | ** Then will stop and wait for selection to be |
2047 | ** complete or selection time-out to occur. |
2048 | ** As a result the SCRIPTS instructions until |
2049 | ** LOADPOS + 2 should be executed in parallel with |
2050 | ** the SCSI core performing selection. |
2051 | */ |
2052 | |
2053 | /* |
2054 | ** The MESSAGE_REJECT problem seems to be due to a selection |
2055 | ** timing problem. |
2056 | ** Wait immediately for the selection to complete. |
2057 | ** (2.5x behaves so) |
2058 | */ |
2059 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
2060 | 0, |
2061 | |
2062 | /* |
2063 | ** Next time use the next slot. |
2064 | */ |
2065 | SCR_COPY (4), |
2066 | RADDR (temp), |
2067 | PADDR (startpos), |
2068 | /* |
2069 | ** The ncr doesn't have an indirect load |
2070 | ** or store command. So we have to |
2071 | ** copy part of the control block to a |
2072 | ** fixed place, where we can access it. |
2073 | ** |
2074 | ** We patch the address part of a |
2075 | ** COPY command with the DSA-register. |
2076 | */ |
2077 | SCR_COPY_F (4), |
2078 | RADDR (dsa), |
2079 | PADDR (loadpos), |
2080 | /* |
2081 | ** Flush script prefetch if required |
2082 | */ |
2083 | PREFETCH_FLUSH |
2084 | /* |
2085 | ** then we do the actual copy. |
2086 | */ |
2087 | SCR_COPY (sizeof (struct head)), |
2088 | /* |
2089 | ** continued after the next label ... |
2090 | */ |
2091 | }/*-------------------------< LOADPOS >---------------------*/,{ |
2092 | 0, |
2093 | NADDR (header), |
2094 | /* |
2095 | ** Wait for the next phase or the selection |
2096 | ** to complete or time-out. |
2097 | */ |
2098 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
2099 | PADDR (prepare), |
2100 | |
2101 | }/*-------------------------< SEND_IDENT >----------------------*/,{ |
2102 | /* |
2103 | ** Selection complete. |
2104 | ** Send the IDENTIFY and SIMPLE_TAG messages |
2105 | ** (and the EXTENDED_SDTR message) |
2106 | */ |
2107 | SCR_MOVE_TBL ^ SCR_MSG_OUT, |
2108 | offsetof (struct dsb, smsg), |
2109 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), |
2110 | PADDRH (resend_ident), |
2111 | SCR_LOAD_REG (scratcha, 0x80), |
2112 | 0, |
2113 | SCR_COPY (1), |
2114 | RADDR (scratcha), |
2115 | NADDR (lastmsg), |
2116 | }/*-------------------------< PREPARE >----------------------*/,{ |
2117 | /* |
2118 | ** load the savep (saved pointer) into |
2119 | ** the TEMP register (actual pointer) |
2120 | */ |
2121 | SCR_COPY (4), |
2122 | NADDR (header.savep), |
2123 | RADDR (temp), |
2124 | /* |
2125 | ** Initialize the status registers |
2126 | */ |
2127 | SCR_COPY (4), |
2128 | NADDR (header.status), |
2129 | RADDR (scr0), |
2130 | }/*-------------------------< PREPARE2 >---------------------*/,{ |
2131 | /* |
2132 | ** Initialize the msgout buffer with a NOOP message. |
2133 | */ |
2134 | SCR_LOAD_REG (scratcha, NOP), |
2135 | 0, |
2136 | SCR_COPY (1), |
2137 | RADDR (scratcha), |
2138 | NADDR (msgout), |
2139 | /* |
2140 | ** Anticipate the COMMAND phase. |
2141 | ** This is the normal case for initial selection. |
2142 | */ |
2143 | SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), |
2144 | PADDR (dispatch), |
2145 | |
2146 | }/*-------------------------< COMMAND >--------------------*/,{ |
2147 | /* |
2148 | ** ... and send the command |
2149 | */ |
2150 | SCR_MOVE_TBL ^ SCR_COMMAND, |
2151 | offsetof (struct dsb, cmd), |
2152 | /* |
2153 | ** If status is still HS_NEGOTIATE, negotiation failed. |
2154 | ** We check this here, since we want to do that |
2155 | ** only once. |
2156 | */ |
2157 | SCR_FROM_REG (HS_REG), |
2158 | 0, |
2159 | SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), |
2160 | SIR_NEGO_FAILED, |
2161 | |
2162 | }/*-----------------------< DISPATCH >----------------------*/,{ |
2163 | /* |
2164 | ** MSG_IN is the only phase that shall be |
2165 | ** entered at least once for each (re)selection. |
2166 | ** So we test it first. |
2167 | */ |
2168 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), |
2169 | PADDR (msg_in), |
2170 | |
2171 | SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), |
2172 | 0, |
2173 | /* |
2174 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4. |
2175 | ** Possible data corruption during Memory Write and Invalidate. |
2176 | ** This work-around resets the addressing logic prior to the |
2177 | ** start of the first MOVE of a DATA IN phase. |
2178 | ** (See Documentation/scsi/ncr53c8xx.rst for more information) |
2179 | */ |
2180 | SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), |
2181 | 20, |
2182 | SCR_COPY (4), |
2183 | RADDR (scratcha), |
2184 | RADDR (scratcha), |
2185 | SCR_RETURN, |
2186 | 0, |
2187 | SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), |
2188 | PADDR (status), |
2189 | SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), |
2190 | PADDR (command), |
2191 | SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), |
2192 | PADDR (msg_out), |
2193 | /* |
2194 | ** Discard one illegal phase byte, if required. |
2195 | */ |
2196 | SCR_LOAD_REG (scratcha, XE_BAD_PHASE), |
2197 | 0, |
2198 | SCR_COPY (1), |
2199 | RADDR (scratcha), |
2200 | NADDR (xerr_st), |
2201 | SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), |
2202 | 8, |
2203 | SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, |
2204 | NADDR (scratch), |
2205 | SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), |
2206 | 8, |
2207 | SCR_MOVE_ABS (1) ^ SCR_ILG_IN, |
2208 | NADDR (scratch), |
2209 | SCR_JUMP, |
2210 | PADDR (dispatch), |
2211 | |
2212 | }/*-------------------------< CLRACK >----------------------*/,{ |
2213 | /* |
2214 | ** Terminate possible pending message phase. |
2215 | */ |
2216 | SCR_CLR (SCR_ACK), |
2217 | 0, |
2218 | SCR_JUMP, |
2219 | PADDR (dispatch), |
2220 | |
2221 | }/*-------------------------< NO_DATA >--------------------*/,{ |
2222 | /* |
2223 | ** The target wants to tranfer too much data |
2224 | ** or in the wrong direction. |
2225 | ** Remember that in extended error. |
2226 | */ |
2227 | SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), |
2228 | 0, |
2229 | SCR_COPY (1), |
2230 | RADDR (scratcha), |
2231 | NADDR (xerr_st), |
2232 | /* |
2233 | ** Discard one data byte, if required. |
2234 | */ |
2235 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
2236 | 8, |
2237 | SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, |
2238 | NADDR (scratch), |
2239 | SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), |
2240 | 8, |
2241 | SCR_MOVE_ABS (1) ^ SCR_DATA_IN, |
2242 | NADDR (scratch), |
2243 | /* |
2244 | ** .. and repeat as required. |
2245 | */ |
2246 | SCR_CALL, |
2247 | PADDR (dispatch), |
2248 | SCR_JUMP, |
2249 | PADDR (no_data), |
2250 | |
2251 | }/*-------------------------< STATUS >--------------------*/,{ |
2252 | /* |
2253 | ** get the status |
2254 | */ |
2255 | SCR_MOVE_ABS (1) ^ SCR_STATUS, |
2256 | NADDR (scratch), |
2257 | /* |
2258 | ** save status to scsi_status. |
2259 | ** mark as complete. |
2260 | */ |
2261 | SCR_TO_REG (SS_REG), |
2262 | 0, |
2263 | SCR_LOAD_REG (HS_REG, HS_COMPLETE), |
2264 | 0, |
2265 | SCR_JUMP, |
2266 | PADDR (dispatch), |
2267 | }/*-------------------------< MSG_IN >--------------------*/,{ |
2268 | /* |
2269 | ** Get the first byte of the message |
2270 | ** and save it to SCRATCHA. |
2271 | ** |
2272 | ** The script processor doesn't negate the |
2273 | ** ACK signal after this transfer. |
2274 | */ |
2275 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2276 | NADDR (msgin[0]), |
2277 | }/*-------------------------< MSG_IN2 >--------------------*/,{ |
2278 | /* |
2279 | ** Handle this message. |
2280 | */ |
2281 | SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), |
2282 | PADDR (complete), |
2283 | SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), |
2284 | PADDR (disconnect), |
2285 | SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), |
2286 | PADDR (save_dp), |
2287 | SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), |
2288 | PADDR (restore_dp), |
2289 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), |
2290 | PADDRH (msg_extended), |
2291 | SCR_JUMP ^ IFTRUE (DATA (NOP)), |
2292 | PADDR (clrack), |
2293 | SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), |
2294 | PADDRH (msg_reject), |
2295 | SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), |
2296 | PADDRH (msg_ign_residue), |
2297 | /* |
2298 | ** Rest of the messages left as |
2299 | ** an exercise ... |
2300 | ** |
2301 | ** Unimplemented messages: |
2302 | ** fall through to MSG_BAD. |
2303 | */ |
2304 | }/*-------------------------< MSG_BAD >------------------*/,{ |
2305 | /* |
2306 | ** unimplemented message - reject it. |
2307 | */ |
2308 | SCR_INT, |
2309 | SIR_REJECT_SENT, |
2310 | SCR_LOAD_REG (scratcha, MESSAGE_REJECT), |
2311 | 0, |
2312 | }/*-------------------------< SETMSG >----------------------*/,{ |
2313 | SCR_COPY (1), |
2314 | RADDR (scratcha), |
2315 | NADDR (msgout), |
2316 | SCR_SET (SCR_ATN), |
2317 | 0, |
2318 | SCR_JUMP, |
2319 | PADDR (clrack), |
2320 | }/*-------------------------< CLEANUP >-------------------*/,{ |
2321 | /* |
2322 | ** dsa: Pointer to ccb |
2323 | ** or xxxxxxFF (no ccb) |
2324 | ** |
2325 | ** HS_REG: Host-Status (<>0!) |
2326 | */ |
2327 | SCR_FROM_REG (dsa), |
2328 | 0, |
2329 | SCR_JUMP ^ IFTRUE (DATA (0xff)), |
2330 | PADDR (start), |
2331 | /* |
2332 | ** dsa is valid. |
2333 | ** complete the cleanup. |
2334 | */ |
2335 | SCR_JUMP, |
2336 | PADDR (cleanup_ok), |
2337 | |
2338 | }/*-------------------------< COMPLETE >-----------------*/,{ |
2339 | /* |
2340 | ** Complete message. |
2341 | ** |
2342 | ** Copy TEMP register to LASTP in header. |
2343 | */ |
2344 | SCR_COPY (4), |
2345 | RADDR (temp), |
2346 | NADDR (header.lastp), |
2347 | /* |
2348 | ** When we terminate the cycle by clearing ACK, |
2349 | ** the target may disconnect immediately. |
2350 | ** |
2351 | ** We don't want to be told of an |
2352 | ** "unexpected disconnect", |
2353 | ** so we disable this feature. |
2354 | */ |
2355 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
2356 | 0, |
2357 | /* |
2358 | ** Terminate cycle ... |
2359 | */ |
2360 | SCR_CLR (SCR_ACK|SCR_ATN), |
2361 | 0, |
2362 | /* |
2363 | ** ... and wait for the disconnect. |
2364 | */ |
2365 | SCR_WAIT_DISC, |
2366 | 0, |
2367 | }/*-------------------------< CLEANUP_OK >----------------*/,{ |
2368 | /* |
2369 | ** Save host status to header. |
2370 | */ |
2371 | SCR_COPY (4), |
2372 | RADDR (scr0), |
2373 | NADDR (header.status), |
2374 | /* |
2375 | ** and copy back the header to the ccb. |
2376 | */ |
2377 | SCR_COPY_F (4), |
2378 | RADDR (dsa), |
2379 | PADDR (cleanup0), |
2380 | /* |
2381 | ** Flush script prefetch if required |
2382 | */ |
2383 | PREFETCH_FLUSH |
2384 | SCR_COPY (sizeof (struct head)), |
2385 | NADDR (header), |
2386 | }/*-------------------------< CLEANUP0 >--------------------*/,{ |
2387 | 0, |
2388 | }/*-------------------------< SIGNAL >----------------------*/,{ |
2389 | /* |
2390 | ** if job not completed ... |
2391 | */ |
2392 | SCR_FROM_REG (HS_REG), |
2393 | 0, |
2394 | /* |
2395 | ** ... start the next command. |
2396 | */ |
2397 | SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), |
2398 | PADDR(start), |
2399 | /* |
2400 | ** If command resulted in not GOOD status, |
2401 | ** call the C code if needed. |
2402 | */ |
2403 | SCR_FROM_REG (SS_REG), |
2404 | 0, |
2405 | SCR_CALL ^ IFFALSE (DATA (SAM_STAT_GOOD)), |
2406 | PADDRH (bad_status), |
2407 | |
2408 | #ifndef SCSI_NCR_CCB_DONE_SUPPORT |
2409 | |
2410 | /* |
2411 | ** ... signal completion to the host |
2412 | */ |
2413 | SCR_INT, |
2414 | SIR_INTFLY, |
2415 | /* |
2416 | ** Auf zu neuen Schandtaten! |
2417 | */ |
2418 | SCR_JUMP, |
2419 | PADDR(start), |
2420 | |
2421 | #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ |
2422 | |
2423 | /* |
2424 | ** ... signal completion to the host |
2425 | */ |
2426 | SCR_JUMP, |
2427 | }/*------------------------< DONE_POS >---------------------*/,{ |
2428 | PADDRH (done_queue), |
2429 | }/*------------------------< DONE_PLUG >--------------------*/,{ |
2430 | SCR_INT, |
2431 | SIR_DONE_OVERFLOW, |
2432 | }/*------------------------< DONE_END >---------------------*/,{ |
2433 | SCR_INT, |
2434 | SIR_INTFLY, |
2435 | SCR_COPY (4), |
2436 | RADDR (temp), |
2437 | PADDR (done_pos), |
2438 | SCR_JUMP, |
2439 | PADDR (start), |
2440 | |
2441 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
2442 | |
2443 | }/*-------------------------< SAVE_DP >------------------*/,{ |
2444 | /* |
2445 | ** SAVE_DP message: |
2446 | ** Copy TEMP register to SAVEP in header. |
2447 | */ |
2448 | SCR_COPY (4), |
2449 | RADDR (temp), |
2450 | NADDR (header.savep), |
2451 | SCR_CLR (SCR_ACK), |
2452 | 0, |
2453 | SCR_JUMP, |
2454 | PADDR (dispatch), |
2455 | }/*-------------------------< RESTORE_DP >---------------*/,{ |
2456 | /* |
2457 | ** RESTORE_DP message: |
2458 | ** Copy SAVEP in header to TEMP register. |
2459 | */ |
2460 | SCR_COPY (4), |
2461 | NADDR (header.savep), |
2462 | RADDR (temp), |
2463 | SCR_JUMP, |
2464 | PADDR (clrack), |
2465 | |
2466 | }/*-------------------------< DISCONNECT >---------------*/,{ |
2467 | /* |
2468 | ** DISCONNECTing ... |
2469 | ** |
2470 | ** disable the "unexpected disconnect" feature, |
2471 | ** and remove the ACK signal. |
2472 | */ |
2473 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
2474 | 0, |
2475 | SCR_CLR (SCR_ACK|SCR_ATN), |
2476 | 0, |
2477 | /* |
2478 | ** Wait for the disconnect. |
2479 | */ |
2480 | SCR_WAIT_DISC, |
2481 | 0, |
2482 | /* |
2483 | ** Status is: DISCONNECTED. |
2484 | */ |
2485 | SCR_LOAD_REG (HS_REG, HS_DISCONNECT), |
2486 | 0, |
2487 | SCR_JUMP, |
2488 | PADDR (cleanup_ok), |
2489 | |
2490 | }/*-------------------------< MSG_OUT >-------------------*/,{ |
2491 | /* |
2492 | ** The target requests a message. |
2493 | */ |
2494 | SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, |
2495 | NADDR (msgout), |
2496 | SCR_COPY (1), |
2497 | NADDR (msgout), |
2498 | NADDR (lastmsg), |
2499 | /* |
2500 | ** If it was no ABORT message ... |
2501 | */ |
2502 | SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), |
2503 | PADDRH (msg_out_abort), |
2504 | /* |
2505 | ** ... wait for the next phase |
2506 | ** if it's a message out, send it again, ... |
2507 | */ |
2508 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), |
2509 | PADDR (msg_out), |
2510 | }/*-------------------------< MSG_OUT_DONE >--------------*/,{ |
2511 | /* |
2512 | ** ... else clear the message ... |
2513 | */ |
2514 | SCR_LOAD_REG (scratcha, NOP), |
2515 | 0, |
2516 | SCR_COPY (4), |
2517 | RADDR (scratcha), |
2518 | NADDR (msgout), |
2519 | /* |
2520 | ** ... and process the next phase |
2521 | */ |
2522 | SCR_JUMP, |
2523 | PADDR (dispatch), |
2524 | }/*-------------------------< IDLE >------------------------*/,{ |
2525 | /* |
2526 | ** Nothing to do? |
2527 | ** Wait for reselect. |
2528 | ** This NOP will be patched with LED OFF |
2529 | ** SCR_REG_REG (gpreg, SCR_OR, 0x01) |
2530 | */ |
2531 | SCR_NO_OP, |
2532 | 0, |
2533 | }/*-------------------------< RESELECT >--------------------*/,{ |
2534 | /* |
2535 | ** make the DSA invalid. |
2536 | */ |
2537 | SCR_LOAD_REG (dsa, 0xff), |
2538 | 0, |
2539 | SCR_CLR (SCR_TRG), |
2540 | 0, |
2541 | SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), |
2542 | 0, |
2543 | /* |
2544 | ** Sleep waiting for a reselection. |
2545 | ** If SIGP is set, special treatment. |
2546 | ** |
2547 | ** Zu allem bereit .. |
2548 | */ |
2549 | SCR_WAIT_RESEL, |
2550 | PADDR(start), |
2551 | }/*-------------------------< RESELECTED >------------------*/,{ |
2552 | /* |
2553 | ** This NOP will be patched with LED ON |
2554 | ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) |
2555 | */ |
2556 | SCR_NO_OP, |
2557 | 0, |
2558 | /* |
2559 | ** ... zu nichts zu gebrauchen ? |
2560 | ** |
2561 | ** load the target id into the SFBR |
2562 | ** and jump to the control block. |
2563 | ** |
2564 | ** Look at the declarations of |
2565 | ** - struct ncb |
2566 | ** - struct tcb |
2567 | ** - struct lcb |
2568 | ** - struct ccb |
2569 | ** to understand what's going on. |
2570 | */ |
2571 | SCR_REG_SFBR (ssid, SCR_AND, 0x8F), |
2572 | 0, |
2573 | SCR_TO_REG (sdid), |
2574 | 0, |
2575 | SCR_JUMP, |
2576 | NADDR (jump_tcb), |
2577 | |
2578 | }/*-------------------------< RESEL_DSA >-------------------*/,{ |
2579 | /* |
2580 | ** Ack the IDENTIFY or TAG previously received. |
2581 | */ |
2582 | SCR_CLR (SCR_ACK), |
2583 | 0, |
2584 | /* |
2585 | ** The ncr doesn't have an indirect load |
2586 | ** or store command. So we have to |
2587 | ** copy part of the control block to a |
2588 | ** fixed place, where we can access it. |
2589 | ** |
2590 | ** We patch the address part of a |
2591 | ** COPY command with the DSA-register. |
2592 | */ |
2593 | SCR_COPY_F (4), |
2594 | RADDR (dsa), |
2595 | PADDR (loadpos1), |
2596 | /* |
2597 | ** Flush script prefetch if required |
2598 | */ |
2599 | PREFETCH_FLUSH |
2600 | /* |
2601 | ** then we do the actual copy. |
2602 | */ |
2603 | SCR_COPY (sizeof (struct head)), |
2604 | /* |
2605 | ** continued after the next label ... |
2606 | */ |
2607 | |
2608 | }/*-------------------------< LOADPOS1 >-------------------*/,{ |
2609 | 0, |
2610 | NADDR (header), |
2611 | /* |
2612 | ** The DSA contains the data structure address. |
2613 | */ |
2614 | SCR_JUMP, |
2615 | PADDR (prepare), |
2616 | |
2617 | }/*-------------------------< RESEL_LUN >-------------------*/,{ |
2618 | /* |
2619 | ** come back to this point |
2620 | ** to get an IDENTIFY message |
2621 | ** Wait for a msg_in phase. |
2622 | */ |
2623 | SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2624 | SIR_RESEL_NO_MSG_IN, |
2625 | /* |
2626 | ** message phase. |
2627 | ** Read the data directly from the BUS DATA lines. |
2628 | ** This helps to support very old SCSI devices that |
2629 | ** may reselect without sending an IDENTIFY. |
2630 | */ |
2631 | SCR_FROM_REG (sbdl), |
2632 | 0, |
2633 | /* |
2634 | ** It should be an Identify message. |
2635 | */ |
2636 | SCR_RETURN, |
2637 | 0, |
2638 | }/*-------------------------< RESEL_TAG >-------------------*/,{ |
2639 | /* |
2640 | ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. |
2641 | ** Aggressive optimization, is'nt it? |
2642 | ** No need to test the SIMPLE TAG message, since the |
2643 | ** driver only supports conformant devices for tags. ;-) |
2644 | */ |
2645 | SCR_MOVE_ABS (3) ^ SCR_MSG_IN, |
2646 | NADDR (msgin), |
2647 | /* |
2648 | ** Read the TAG from the SIDL. |
2649 | ** Still an aggressive optimization. ;-) |
2650 | ** Compute the CCB indirect jump address which |
2651 | ** is (#TAG*2 & 0xfc) due to tag numbering using |
2652 | ** 1,3,5..MAXTAGS*2+1 actual values. |
2653 | */ |
2654 | SCR_REG_SFBR (sidl, SCR_SHL, 0), |
2655 | 0, |
2656 | SCR_SFBR_REG (temp, SCR_AND, 0xfc), |
2657 | 0, |
2658 | }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ |
2659 | SCR_COPY_F (4), |
2660 | RADDR (temp), |
2661 | PADDR (nexus_indirect), |
2662 | /* |
2663 | ** Flush script prefetch if required |
2664 | */ |
2665 | PREFETCH_FLUSH |
2666 | SCR_COPY (4), |
2667 | }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ |
2668 | 0, |
2669 | RADDR (temp), |
2670 | SCR_RETURN, |
2671 | 0, |
2672 | }/*-------------------------< RESEL_NOTAG >-------------------*/,{ |
2673 | /* |
2674 | ** No tag expected. |
2675 | ** Read an throw away the IDENTIFY. |
2676 | */ |
2677 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2678 | NADDR (msgin), |
2679 | SCR_JUMP, |
2680 | PADDR (jump_to_nexus), |
2681 | }/*-------------------------< DATA_IN >--------------------*/,{ |
2682 | /* |
2683 | ** Because the size depends on the |
2684 | ** #define MAX_SCATTERL parameter, |
2685 | ** it is filled in at runtime. |
2686 | ** |
2687 | ** ##===========< i=0; i<MAX_SCATTERL >========= |
2688 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
2689 | ** || PADDR (dispatch), |
2690 | ** || SCR_MOVE_TBL ^ SCR_DATA_IN, |
2691 | ** || offsetof (struct dsb, data[ i]), |
2692 | ** ##========================================== |
2693 | ** |
2694 | **--------------------------------------------------------- |
2695 | */ |
2696 | 0 |
2697 | }/*-------------------------< DATA_IN2 >-------------------*/,{ |
2698 | SCR_CALL, |
2699 | PADDR (dispatch), |
2700 | SCR_JUMP, |
2701 | PADDR (no_data), |
2702 | }/*-------------------------< DATA_OUT >--------------------*/,{ |
2703 | /* |
2704 | ** Because the size depends on the |
2705 | ** #define MAX_SCATTERL parameter, |
2706 | ** it is filled in at runtime. |
2707 | ** |
2708 | ** ##===========< i=0; i<MAX_SCATTERL >========= |
2709 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
2710 | ** || PADDR (dispatch), |
2711 | ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, |
2712 | ** || offsetof (struct dsb, data[ i]), |
2713 | ** ##========================================== |
2714 | ** |
2715 | **--------------------------------------------------------- |
2716 | */ |
2717 | 0 |
2718 | }/*-------------------------< DATA_OUT2 >-------------------*/,{ |
2719 | SCR_CALL, |
2720 | PADDR (dispatch), |
2721 | SCR_JUMP, |
2722 | PADDR (no_data), |
2723 | }/*--------------------------------------------------------*/ |
2724 | }; |
2725 | |
2726 | static struct scripth scripth0 __initdata = { |
2727 | /*-------------------------< TRYLOOP >---------------------*/{ |
2728 | /* |
2729 | ** Start the next entry. |
2730 | ** Called addresses point to the launch script in the CCB. |
2731 | ** They are patched by the main processor. |
2732 | ** |
2733 | ** Because the size depends on the |
2734 | ** #define MAX_START parameter, it is filled |
2735 | ** in at runtime. |
2736 | ** |
2737 | **----------------------------------------------------------- |
2738 | ** |
2739 | ** ##===========< I=0; i<MAX_START >=========== |
2740 | ** || SCR_CALL, |
2741 | ** || PADDR (idle), |
2742 | ** ##========================================== |
2743 | ** |
2744 | **----------------------------------------------------------- |
2745 | */ |
2746 | 0 |
2747 | }/*------------------------< TRYLOOP2 >---------------------*/,{ |
2748 | SCR_JUMP, |
2749 | PADDRH(tryloop), |
2750 | |
2751 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
2752 | |
2753 | }/*------------------------< DONE_QUEUE >-------------------*/,{ |
2754 | /* |
2755 | ** Copy the CCB address to the next done entry. |
2756 | ** Because the size depends on the |
2757 | ** #define MAX_DONE parameter, it is filled |
2758 | ** in at runtime. |
2759 | ** |
2760 | **----------------------------------------------------------- |
2761 | ** |
2762 | ** ##===========< I=0; i<MAX_DONE >=========== |
2763 | ** || SCR_COPY (sizeof(struct ccb *), |
2764 | ** || NADDR (header.cp), |
2765 | ** || NADDR (ccb_done[i]), |
2766 | ** || SCR_CALL, |
2767 | ** || PADDR (done_end), |
2768 | ** ##========================================== |
2769 | ** |
2770 | **----------------------------------------------------------- |
2771 | */ |
2772 | 0 |
2773 | }/*------------------------< DONE_QUEUE2 >------------------*/,{ |
2774 | SCR_JUMP, |
2775 | PADDRH (done_queue), |
2776 | |
2777 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
2778 | }/*------------------------< SELECT_NO_ATN >-----------------*/,{ |
2779 | /* |
2780 | ** Set Initiator mode. |
2781 | ** And try to select this target without ATN. |
2782 | */ |
2783 | |
2784 | SCR_CLR (SCR_TRG), |
2785 | 0, |
2786 | SCR_LOAD_REG (HS_REG, HS_SELECTING), |
2787 | 0, |
2788 | SCR_SEL_TBL ^ offsetof (struct dsb, select), |
2789 | PADDR (reselect), |
2790 | SCR_JUMP, |
2791 | PADDR (select2), |
2792 | |
2793 | }/*-------------------------< CANCEL >------------------------*/,{ |
2794 | |
2795 | SCR_LOAD_REG (scratcha, HS_ABORTED), |
2796 | 0, |
2797 | SCR_JUMPR, |
2798 | 8, |
2799 | }/*-------------------------< SKIP >------------------------*/,{ |
2800 | SCR_LOAD_REG (scratcha, 0), |
2801 | 0, |
2802 | /* |
2803 | ** This entry has been canceled. |
2804 | ** Next time use the next slot. |
2805 | */ |
2806 | SCR_COPY (4), |
2807 | RADDR (temp), |
2808 | PADDR (startpos), |
2809 | /* |
2810 | ** The ncr doesn't have an indirect load |
2811 | ** or store command. So we have to |
2812 | ** copy part of the control block to a |
2813 | ** fixed place, where we can access it. |
2814 | ** |
2815 | ** We patch the address part of a |
2816 | ** COPY command with the DSA-register. |
2817 | */ |
2818 | SCR_COPY_F (4), |
2819 | RADDR (dsa), |
2820 | PADDRH (skip2), |
2821 | /* |
2822 | ** Flush script prefetch if required |
2823 | */ |
2824 | PREFETCH_FLUSH |
2825 | /* |
2826 | ** then we do the actual copy. |
2827 | */ |
2828 | SCR_COPY (sizeof (struct head)), |
2829 | /* |
2830 | ** continued after the next label ... |
2831 | */ |
2832 | }/*-------------------------< SKIP2 >---------------------*/,{ |
2833 | 0, |
2834 | NADDR (header), |
2835 | /* |
2836 | ** Initialize the status registers |
2837 | */ |
2838 | SCR_COPY (4), |
2839 | NADDR (header.status), |
2840 | RADDR (scr0), |
2841 | /* |
2842 | ** Force host status. |
2843 | */ |
2844 | SCR_FROM_REG (scratcha), |
2845 | 0, |
2846 | SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), |
2847 | 16, |
2848 | SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), |
2849 | 0, |
2850 | SCR_JUMPR, |
2851 | 8, |
2852 | SCR_TO_REG (HS_REG), |
2853 | 0, |
2854 | SCR_LOAD_REG (SS_REG, SAM_STAT_GOOD), |
2855 | 0, |
2856 | SCR_JUMP, |
2857 | PADDR (cleanup_ok), |
2858 | |
2859 | },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ |
2860 | /* |
2861 | ** Ignore all data in byte, until next phase |
2862 | */ |
2863 | SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), |
2864 | PADDRH (par_err_other), |
2865 | SCR_MOVE_ABS (1) ^ SCR_DATA_IN, |
2866 | NADDR (scratch), |
2867 | SCR_JUMPR, |
2868 | -24, |
2869 | },/*-------------------------< PAR_ERR_OTHER >------------------*/{ |
2870 | /* |
2871 | ** count it. |
2872 | */ |
2873 | SCR_REG_REG (PS_REG, SCR_ADD, 0x01), |
2874 | 0, |
2875 | /* |
2876 | ** jump to dispatcher. |
2877 | */ |
2878 | SCR_JUMP, |
2879 | PADDR (dispatch), |
2880 | }/*-------------------------< MSG_REJECT >---------------*/,{ |
2881 | /* |
2882 | ** If a negotiation was in progress, |
2883 | ** negotiation failed. |
2884 | ** Otherwise, let the C code print |
2885 | ** some message. |
2886 | */ |
2887 | SCR_FROM_REG (HS_REG), |
2888 | 0, |
2889 | SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), |
2890 | SIR_REJECT_RECEIVED, |
2891 | SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), |
2892 | SIR_NEGO_FAILED, |
2893 | SCR_JUMP, |
2894 | PADDR (clrack), |
2895 | |
2896 | }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ |
2897 | /* |
2898 | ** Terminate cycle |
2899 | */ |
2900 | SCR_CLR (SCR_ACK), |
2901 | 0, |
2902 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2903 | PADDR (dispatch), |
2904 | /* |
2905 | ** get residue size. |
2906 | */ |
2907 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2908 | NADDR (msgin[1]), |
2909 | /* |
2910 | ** Size is 0 .. ignore message. |
2911 | */ |
2912 | SCR_JUMP ^ IFTRUE (DATA (0)), |
2913 | PADDR (clrack), |
2914 | /* |
2915 | ** Size is not 1 .. have to interrupt. |
2916 | */ |
2917 | SCR_JUMPR ^ IFFALSE (DATA (1)), |
2918 | 40, |
2919 | /* |
2920 | ** Check for residue byte in swide register |
2921 | */ |
2922 | SCR_FROM_REG (scntl2), |
2923 | 0, |
2924 | SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), |
2925 | 16, |
2926 | /* |
2927 | ** There IS data in the swide register. |
2928 | ** Discard it. |
2929 | */ |
2930 | SCR_REG_REG (scntl2, SCR_OR, WSR), |
2931 | 0, |
2932 | SCR_JUMP, |
2933 | PADDR (clrack), |
2934 | /* |
2935 | ** Load again the size to the sfbr register. |
2936 | */ |
2937 | SCR_FROM_REG (scratcha), |
2938 | 0, |
2939 | SCR_INT, |
2940 | SIR_IGN_RESIDUE, |
2941 | SCR_JUMP, |
2942 | PADDR (clrack), |
2943 | |
2944 | }/*-------------------------< MSG_EXTENDED >-------------*/,{ |
2945 | /* |
2946 | ** Terminate cycle |
2947 | */ |
2948 | SCR_CLR (SCR_ACK), |
2949 | 0, |
2950 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2951 | PADDR (dispatch), |
2952 | /* |
2953 | ** get length. |
2954 | */ |
2955 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2956 | NADDR (msgin[1]), |
2957 | /* |
2958 | */ |
2959 | SCR_JUMP ^ IFTRUE (DATA (3)), |
2960 | PADDRH (msg_ext_3), |
2961 | SCR_JUMP ^ IFFALSE (DATA (2)), |
2962 | PADDR (msg_bad), |
2963 | }/*-------------------------< MSG_EXT_2 >----------------*/,{ |
2964 | SCR_CLR (SCR_ACK), |
2965 | 0, |
2966 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2967 | PADDR (dispatch), |
2968 | /* |
2969 | ** get extended message code. |
2970 | */ |
2971 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2972 | NADDR (msgin[2]), |
2973 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), |
2974 | PADDRH (msg_wdtr), |
2975 | /* |
2976 | ** unknown extended message |
2977 | */ |
2978 | SCR_JUMP, |
2979 | PADDR (msg_bad) |
2980 | }/*-------------------------< MSG_WDTR >-----------------*/,{ |
2981 | SCR_CLR (SCR_ACK), |
2982 | 0, |
2983 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2984 | PADDR (dispatch), |
2985 | /* |
2986 | ** get data bus width |
2987 | */ |
2988 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2989 | NADDR (msgin[3]), |
2990 | /* |
2991 | ** let the host do the real work. |
2992 | */ |
2993 | SCR_INT, |
2994 | SIR_NEGO_WIDE, |
2995 | /* |
2996 | ** let the target fetch our answer. |
2997 | */ |
2998 | SCR_SET (SCR_ATN), |
2999 | 0, |
3000 | SCR_CLR (SCR_ACK), |
3001 | 0, |
3002 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
3003 | PADDRH (nego_bad_phase), |
3004 | |
3005 | }/*-------------------------< SEND_WDTR >----------------*/,{ |
3006 | /* |
3007 | ** Send the EXTENDED_WDTR |
3008 | */ |
3009 | SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, |
3010 | NADDR (msgout), |
3011 | SCR_COPY (1), |
3012 | NADDR (msgout), |
3013 | NADDR (lastmsg), |
3014 | SCR_JUMP, |
3015 | PADDR (msg_out_done), |
3016 | |
3017 | }/*-------------------------< MSG_EXT_3 >----------------*/,{ |
3018 | SCR_CLR (SCR_ACK), |
3019 | 0, |
3020 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3021 | PADDR (dispatch), |
3022 | /* |
3023 | ** get extended message code. |
3024 | */ |
3025 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3026 | NADDR (msgin[2]), |
3027 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), |
3028 | PADDRH (msg_sdtr), |
3029 | /* |
3030 | ** unknown extended message |
3031 | */ |
3032 | SCR_JUMP, |
3033 | PADDR (msg_bad) |
3034 | |
3035 | }/*-------------------------< MSG_SDTR >-----------------*/,{ |
3036 | SCR_CLR (SCR_ACK), |
3037 | 0, |
3038 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3039 | PADDR (dispatch), |
3040 | /* |
3041 | ** get period and offset |
3042 | */ |
3043 | SCR_MOVE_ABS (2) ^ SCR_MSG_IN, |
3044 | NADDR (msgin[3]), |
3045 | /* |
3046 | ** let the host do the real work. |
3047 | */ |
3048 | SCR_INT, |
3049 | SIR_NEGO_SYNC, |
3050 | /* |
3051 | ** let the target fetch our answer. |
3052 | */ |
3053 | SCR_SET (SCR_ATN), |
3054 | 0, |
3055 | SCR_CLR (SCR_ACK), |
3056 | 0, |
3057 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
3058 | PADDRH (nego_bad_phase), |
3059 | |
3060 | }/*-------------------------< SEND_SDTR >-------------*/,{ |
3061 | /* |
3062 | ** Send the EXTENDED_SDTR |
3063 | */ |
3064 | SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, |
3065 | NADDR (msgout), |
3066 | SCR_COPY (1), |
3067 | NADDR (msgout), |
3068 | NADDR (lastmsg), |
3069 | SCR_JUMP, |
3070 | PADDR (msg_out_done), |
3071 | |
3072 | }/*-------------------------< NEGO_BAD_PHASE >------------*/,{ |
3073 | SCR_INT, |
3074 | SIR_NEGO_PROTO, |
3075 | SCR_JUMP, |
3076 | PADDR (dispatch), |
3077 | |
3078 | }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ |
3079 | /* |
3080 | ** After ABORT message, |
3081 | ** |
3082 | ** expect an immediate disconnect, ... |
3083 | */ |
3084 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
3085 | 0, |
3086 | SCR_CLR (SCR_ACK|SCR_ATN), |
3087 | 0, |
3088 | SCR_WAIT_DISC, |
3089 | 0, |
3090 | /* |
3091 | ** ... and set the status to "ABORTED" |
3092 | */ |
3093 | SCR_LOAD_REG (HS_REG, HS_ABORTED), |
3094 | 0, |
3095 | SCR_JUMP, |
3096 | PADDR (cleanup), |
3097 | |
3098 | }/*-------------------------< HDATA_IN >-------------------*/,{ |
3099 | /* |
3100 | ** Because the size depends on the |
3101 | ** #define MAX_SCATTERH parameter, |
3102 | ** it is filled in at runtime. |
3103 | ** |
3104 | ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== |
3105 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
3106 | ** || PADDR (dispatch), |
3107 | ** || SCR_MOVE_TBL ^ SCR_DATA_IN, |
3108 | ** || offsetof (struct dsb, data[ i]), |
3109 | ** ##=================================================== |
3110 | ** |
3111 | **--------------------------------------------------------- |
3112 | */ |
3113 | 0 |
3114 | }/*-------------------------< HDATA_IN2 >------------------*/,{ |
3115 | SCR_JUMP, |
3116 | PADDR (data_in), |
3117 | |
3118 | }/*-------------------------< HDATA_OUT >-------------------*/,{ |
3119 | /* |
3120 | ** Because the size depends on the |
3121 | ** #define MAX_SCATTERH parameter, |
3122 | ** it is filled in at runtime. |
3123 | ** |
3124 | ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== |
3125 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
3126 | ** || PADDR (dispatch), |
3127 | ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, |
3128 | ** || offsetof (struct dsb, data[ i]), |
3129 | ** ##=================================================== |
3130 | ** |
3131 | **--------------------------------------------------------- |
3132 | */ |
3133 | 0 |
3134 | }/*-------------------------< HDATA_OUT2 >------------------*/,{ |
3135 | SCR_JUMP, |
3136 | PADDR (data_out), |
3137 | |
3138 | }/*-------------------------< RESET >----------------------*/,{ |
3139 | /* |
3140 | ** Send a TARGET_RESET message if bad IDENTIFY |
3141 | ** received on reselection. |
3142 | */ |
3143 | SCR_LOAD_REG (scratcha, ABORT_TASK), |
3144 | 0, |
3145 | SCR_JUMP, |
3146 | PADDRH (abort_resel), |
3147 | }/*-------------------------< ABORTTAG >-------------------*/,{ |
3148 | /* |
3149 | ** Abort a wrong tag received on reselection. |
3150 | */ |
3151 | SCR_LOAD_REG (scratcha, ABORT_TASK), |
3152 | 0, |
3153 | SCR_JUMP, |
3154 | PADDRH (abort_resel), |
3155 | }/*-------------------------< ABORT >----------------------*/,{ |
3156 | /* |
3157 | ** Abort a reselection when no active CCB. |
3158 | */ |
3159 | SCR_LOAD_REG (scratcha, ABORT_TASK_SET), |
3160 | 0, |
3161 | }/*-------------------------< ABORT_RESEL >----------------*/,{ |
3162 | SCR_COPY (1), |
3163 | RADDR (scratcha), |
3164 | NADDR (msgout), |
3165 | SCR_SET (SCR_ATN), |
3166 | 0, |
3167 | SCR_CLR (SCR_ACK), |
3168 | 0, |
3169 | /* |
3170 | ** and send it. |
3171 | ** we expect an immediate disconnect |
3172 | */ |
3173 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
3174 | 0, |
3175 | SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, |
3176 | NADDR (msgout), |
3177 | SCR_COPY (1), |
3178 | NADDR (msgout), |
3179 | NADDR (lastmsg), |
3180 | SCR_CLR (SCR_ACK|SCR_ATN), |
3181 | 0, |
3182 | SCR_WAIT_DISC, |
3183 | 0, |
3184 | SCR_JUMP, |
3185 | PADDR (start), |
3186 | }/*-------------------------< RESEND_IDENT >-------------------*/,{ |
3187 | /* |
3188 | ** The target stays in MSG OUT phase after having acked |
3189 | ** Identify [+ Tag [+ Extended message ]]. Targets shall |
3190 | ** behave this way on parity error. |
3191 | ** We must send it again all the messages. |
3192 | */ |
3193 | SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ |
3194 | 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ |
3195 | SCR_JUMP, |
3196 | PADDR (send_ident), |
3197 | }/*-------------------------< CLRATN_GO_ON >-------------------*/,{ |
3198 | SCR_CLR (SCR_ATN), |
3199 | 0, |
3200 | SCR_JUMP, |
3201 | }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ |
3202 | 0, |
3203 | }/*-------------------------< SDATA_IN >-------------------*/,{ |
3204 | SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
3205 | PADDR (dispatch), |
3206 | SCR_MOVE_TBL ^ SCR_DATA_IN, |
3207 | offsetof (struct dsb, sense), |
3208 | SCR_CALL, |
3209 | PADDR (dispatch), |
3210 | SCR_JUMP, |
3211 | PADDR (no_data), |
3212 | }/*-------------------------< DATA_IO >--------------------*/,{ |
3213 | /* |
3214 | ** We jump here if the data direction was unknown at the |
3215 | ** time we had to queue the command to the scripts processor. |
3216 | ** Pointers had been set as follow in this situation: |
3217 | ** savep --> DATA_IO |
3218 | ** lastp --> start pointer when DATA_IN |
3219 | ** goalp --> goal pointer when DATA_IN |
3220 | ** wlastp --> start pointer when DATA_OUT |
3221 | ** wgoalp --> goal pointer when DATA_OUT |
3222 | ** This script sets savep/lastp/goalp according to the |
3223 | ** direction chosen by the target. |
3224 | */ |
3225 | SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), |
3226 | 32, |
3227 | /* |
3228 | ** Direction is DATA IN. |
3229 | ** Warning: we jump here, even when phase is DATA OUT. |
3230 | */ |
3231 | SCR_COPY (4), |
3232 | NADDR (header.lastp), |
3233 | NADDR (header.savep), |
3234 | |
3235 | /* |
3236 | ** Jump to the SCRIPTS according to actual direction. |
3237 | */ |
3238 | SCR_COPY (4), |
3239 | NADDR (header.savep), |
3240 | RADDR (temp), |
3241 | SCR_RETURN, |
3242 | 0, |
3243 | /* |
3244 | ** Direction is DATA OUT. |
3245 | */ |
3246 | SCR_COPY (4), |
3247 | NADDR (header.wlastp), |
3248 | NADDR (header.lastp), |
3249 | SCR_COPY (4), |
3250 | NADDR (header.wgoalp), |
3251 | NADDR (header.goalp), |
3252 | SCR_JUMPR, |
3253 | -64, |
3254 | }/*-------------------------< BAD_IDENTIFY >---------------*/,{ |
3255 | /* |
3256 | ** If message phase but not an IDENTIFY, |
3257 | ** get some help from the C code. |
3258 | ** Old SCSI device may behave so. |
3259 | */ |
3260 | SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), |
3261 | 16, |
3262 | SCR_INT, |
3263 | SIR_RESEL_NO_IDENTIFY, |
3264 | SCR_JUMP, |
3265 | PADDRH (reset), |
3266 | /* |
3267 | ** Message is an IDENTIFY, but lun is unknown. |
3268 | ** Read the message, since we got it directly |
3269 | ** from the SCSI BUS data lines. |
3270 | ** Signal problem to C code for logging the event. |
3271 | ** Send an ABORT_TASK_SET to clear all pending tasks. |
3272 | */ |
3273 | SCR_INT, |
3274 | SIR_RESEL_BAD_LUN, |
3275 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3276 | NADDR (msgin), |
3277 | SCR_JUMP, |
3278 | PADDRH (abort), |
3279 | }/*-------------------------< BAD_I_T_L >------------------*/,{ |
3280 | /* |
3281 | ** We donnot have a task for that I_T_L. |
3282 | ** Signal problem to C code for logging the event. |
3283 | ** Send an ABORT_TASK_SET message. |
3284 | */ |
3285 | SCR_INT, |
3286 | SIR_RESEL_BAD_I_T_L, |
3287 | SCR_JUMP, |
3288 | PADDRH (abort), |
3289 | }/*-------------------------< BAD_I_T_L_Q >----------------*/,{ |
3290 | /* |
3291 | ** We donnot have a task that matches the tag. |
3292 | ** Signal problem to C code for logging the event. |
3293 | ** Send an ABORT_TASK message. |
3294 | */ |
3295 | SCR_INT, |
3296 | SIR_RESEL_BAD_I_T_L_Q, |
3297 | SCR_JUMP, |
3298 | PADDRH (aborttag), |
3299 | }/*-------------------------< BAD_TARGET >-----------------*/,{ |
3300 | /* |
3301 | ** We donnot know the target that reselected us. |
3302 | ** Grab the first message if any (IDENTIFY). |
3303 | ** Signal problem to C code for logging the event. |
3304 | ** TARGET_RESET message. |
3305 | */ |
3306 | SCR_INT, |
3307 | SIR_RESEL_BAD_TARGET, |
3308 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3309 | 8, |
3310 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3311 | NADDR (msgin), |
3312 | SCR_JUMP, |
3313 | PADDRH (reset), |
3314 | }/*-------------------------< BAD_STATUS >-----------------*/,{ |
3315 | /* |
3316 | ** If command resulted in either TASK_SET FULL, |
3317 | ** CHECK CONDITION or COMMAND TERMINATED, |
3318 | ** call the C code. |
3319 | */ |
3320 | SCR_INT ^ IFTRUE (DATA (SAM_STAT_TASK_SET_FULL)), |
3321 | SIR_BAD_STATUS, |
3322 | SCR_INT ^ IFTRUE (DATA (SAM_STAT_CHECK_CONDITION)), |
3323 | SIR_BAD_STATUS, |
3324 | SCR_INT ^ IFTRUE (DATA (SAM_STAT_COMMAND_TERMINATED)), |
3325 | SIR_BAD_STATUS, |
3326 | SCR_RETURN, |
3327 | 0, |
3328 | }/*-------------------------< START_RAM >-------------------*/,{ |
3329 | /* |
3330 | ** Load the script into on-chip RAM, |
3331 | ** and jump to start point. |
3332 | */ |
3333 | SCR_COPY_F (4), |
3334 | RADDR (scratcha), |
3335 | PADDRH (start_ram0), |
3336 | /* |
3337 | ** Flush script prefetch if required |
3338 | */ |
3339 | PREFETCH_FLUSH |
3340 | SCR_COPY (sizeof (struct script)), |
3341 | }/*-------------------------< START_RAM0 >--------------------*/,{ |
3342 | 0, |
3343 | PADDR (start), |
3344 | SCR_JUMP, |
3345 | PADDR (start), |
3346 | }/*-------------------------< STO_RESTART >-------------------*/,{ |
3347 | /* |
3348 | ** |
3349 | ** Repair start queue (e.g. next time use the next slot) |
3350 | ** and jump to start point. |
3351 | */ |
3352 | SCR_COPY (4), |
3353 | RADDR (temp), |
3354 | PADDR (startpos), |
3355 | SCR_JUMP, |
3356 | PADDR (start), |
3357 | }/*-------------------------< WAIT_DMA >-------------------*/,{ |
3358 | /* |
3359 | ** For HP Zalon/53c720 systems, the Zalon interface |
3360 | ** between CPU and 53c720 does prefetches, which causes |
3361 | ** problems with self modifying scripts. The problem |
3362 | ** is overcome by calling a dummy subroutine after each |
3363 | ** modification, to force a refetch of the script on |
3364 | ** return from the subroutine. |
3365 | */ |
3366 | SCR_RETURN, |
3367 | 0, |
3368 | }/*-------------------------< SNOOPTEST >-------------------*/,{ |
3369 | /* |
3370 | ** Read the variable. |
3371 | */ |
3372 | SCR_COPY (4), |
3373 | NADDR(ncr_cache), |
3374 | RADDR (scratcha), |
3375 | /* |
3376 | ** Write the variable. |
3377 | */ |
3378 | SCR_COPY (4), |
3379 | RADDR (temp), |
3380 | NADDR(ncr_cache), |
3381 | /* |
3382 | ** Read back the variable. |
3383 | */ |
3384 | SCR_COPY (4), |
3385 | NADDR(ncr_cache), |
3386 | RADDR (temp), |
3387 | }/*-------------------------< SNOOPEND >-------------------*/,{ |
3388 | /* |
3389 | ** And stop. |
3390 | */ |
3391 | SCR_INT, |
3392 | 99, |
3393 | }/*--------------------------------------------------------*/ |
3394 | }; |
3395 | |
3396 | /*========================================================== |
3397 | ** |
3398 | ** |
3399 | ** Fill in #define dependent parts of the script |
3400 | ** |
3401 | ** |
3402 | **========================================================== |
3403 | */ |
3404 | |
3405 | void __init ncr_script_fill (struct script * scr, struct scripth * scrh) |
3406 | { |
3407 | int i; |
3408 | ncrcmd *p; |
3409 | |
3410 | p = scrh->tryloop; |
3411 | for (i=0; i<MAX_START; i++) { |
3412 | *p++ =SCR_CALL; |
3413 | *p++ =PADDR (idle); |
3414 | } |
3415 | |
3416 | BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); |
3417 | |
3418 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
3419 | |
3420 | p = scrh->done_queue; |
3421 | for (i = 0; i<MAX_DONE; i++) { |
3422 | *p++ =SCR_COPY (sizeof(struct ccb *)); |
3423 | *p++ =NADDR (header.cp); |
3424 | *p++ =NADDR (ccb_done[i]); |
3425 | *p++ =SCR_CALL; |
3426 | *p++ =PADDR (done_end); |
3427 | } |
3428 | |
3429 | BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); |
3430 | |
3431 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
3432 | |
3433 | p = scrh->hdata_in; |
3434 | for (i=0; i<MAX_SCATTERH; i++) { |
3435 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); |
3436 | *p++ =PADDR (dispatch); |
3437 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; |
3438 | *p++ =offsetof (struct dsb, data[i]); |
3439 | } |
3440 | |
3441 | BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); |
3442 | |
3443 | p = scr->data_in; |
3444 | for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { |
3445 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); |
3446 | *p++ =PADDR (dispatch); |
3447 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; |
3448 | *p++ =offsetof (struct dsb, data[i]); |
3449 | } |
3450 | |
3451 | BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); |
3452 | |
3453 | p = scrh->hdata_out; |
3454 | for (i=0; i<MAX_SCATTERH; i++) { |
3455 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); |
3456 | *p++ =PADDR (dispatch); |
3457 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; |
3458 | *p++ =offsetof (struct dsb, data[i]); |
3459 | } |
3460 | |
3461 | BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); |
3462 | |
3463 | p = scr->data_out; |
3464 | for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { |
3465 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); |
3466 | *p++ =PADDR (dispatch); |
3467 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; |
3468 | *p++ =offsetof (struct dsb, data[i]); |
3469 | } |
3470 | |
3471 | BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); |
3472 | } |
3473 | |
3474 | /*========================================================== |
3475 | ** |
3476 | ** |
3477 | ** Copy and rebind a script. |
3478 | ** |
3479 | ** |
3480 | **========================================================== |
3481 | */ |
3482 | |
3483 | static void __init |
3484 | ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) |
3485 | { |
3486 | ncrcmd opcode, new, old, tmp1, tmp2; |
3487 | ncrcmd *start, *end; |
3488 | int relocs; |
3489 | int opchanged = 0; |
3490 | |
3491 | start = src; |
3492 | end = src + len/4; |
3493 | |
3494 | while (src < end) { |
3495 | |
3496 | opcode = *src++; |
3497 | *dst++ = cpu_to_scr(opcode); |
3498 | |
3499 | /* |
3500 | ** If we forget to change the length |
3501 | ** in struct script, a field will be |
3502 | ** padded with 0. This is an illegal |
3503 | ** command. |
3504 | */ |
3505 | |
3506 | if (opcode == 0) { |
3507 | printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n" , |
3508 | ncr_name(np), (int) (src-start-1)); |
3509 | mdelay(1000); |
3510 | } |
3511 | |
3512 | if (DEBUG_FLAGS & DEBUG_SCRIPT) |
3513 | printk (KERN_DEBUG "%p: <%x>\n" , |
3514 | (src-1), (unsigned)opcode); |
3515 | |
3516 | /* |
3517 | ** We don't have to decode ALL commands |
3518 | */ |
3519 | switch (opcode >> 28) { |
3520 | |
3521 | case 0xc: |
3522 | /* |
3523 | ** COPY has TWO arguments. |
3524 | */ |
3525 | relocs = 2; |
3526 | tmp1 = src[0]; |
3527 | #ifdef RELOC_KVAR |
3528 | if ((tmp1 & RELOC_MASK) == RELOC_KVAR) |
3529 | tmp1 = 0; |
3530 | #endif |
3531 | tmp2 = src[1]; |
3532 | #ifdef RELOC_KVAR |
3533 | if ((tmp2 & RELOC_MASK) == RELOC_KVAR) |
3534 | tmp2 = 0; |
3535 | #endif |
3536 | if ((tmp1 ^ tmp2) & 3) { |
3537 | printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n" , |
3538 | ncr_name(np), (int) (src-start-1)); |
3539 | mdelay(1000); |
3540 | } |
3541 | /* |
3542 | ** If PREFETCH feature not enabled, remove |
3543 | ** the NO FLUSH bit if present. |
3544 | */ |
3545 | if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { |
3546 | dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); |
3547 | ++opchanged; |
3548 | } |
3549 | break; |
3550 | |
3551 | case 0x0: |
3552 | /* |
3553 | ** MOVE (absolute address) |
3554 | */ |
3555 | relocs = 1; |
3556 | break; |
3557 | |
3558 | case 0x8: |
3559 | /* |
3560 | ** JUMP / CALL |
3561 | ** don't relocate if relative :-) |
3562 | */ |
3563 | if (opcode & 0x00800000) |
3564 | relocs = 0; |
3565 | else |
3566 | relocs = 1; |
3567 | break; |
3568 | |
3569 | case 0x4: |
3570 | case 0x5: |
3571 | case 0x6: |
3572 | case 0x7: |
3573 | relocs = 1; |
3574 | break; |
3575 | |
3576 | default: |
3577 | relocs = 0; |
3578 | break; |
3579 | } |
3580 | |
3581 | if (relocs) { |
3582 | while (relocs--) { |
3583 | old = *src++; |
3584 | |
3585 | switch (old & RELOC_MASK) { |
3586 | case RELOC_REGISTER: |
3587 | new = (old & ~RELOC_MASK) + np->paddr; |
3588 | break; |
3589 | case RELOC_LABEL: |
3590 | new = (old & ~RELOC_MASK) + np->p_script; |
3591 | break; |
3592 | case RELOC_LABELH: |
3593 | new = (old & ~RELOC_MASK) + np->p_scripth; |
3594 | break; |
3595 | case RELOC_SOFTC: |
3596 | new = (old & ~RELOC_MASK) + np->p_ncb; |
3597 | break; |
3598 | #ifdef RELOC_KVAR |
3599 | case RELOC_KVAR: |
3600 | if (((old & ~RELOC_MASK) < |
3601 | SCRIPT_KVAR_FIRST) || |
3602 | ((old & ~RELOC_MASK) > |
3603 | SCRIPT_KVAR_LAST)) |
3604 | panic("ncr KVAR out of range" ); |
3605 | new = vtophys(script_kvars[old & |
3606 | ~RELOC_MASK]); |
3607 | break; |
3608 | #endif |
3609 | case 0: |
3610 | /* Don't relocate a 0 address. */ |
3611 | if (old == 0) { |
3612 | new = old; |
3613 | break; |
3614 | } |
3615 | fallthrough; |
3616 | default: |
3617 | panic(fmt: "ncr_script_copy_and_bind: weird relocation %x\n" , old); |
3618 | break; |
3619 | } |
3620 | |
3621 | *dst++ = cpu_to_scr(new); |
3622 | } |
3623 | } else |
3624 | *dst++ = cpu_to_scr(*src++); |
3625 | |
3626 | } |
3627 | } |
3628 | |
3629 | /* |
3630 | ** Linux host data structure |
3631 | */ |
3632 | |
3633 | struct host_data { |
3634 | struct ncb *ncb; |
3635 | }; |
3636 | |
3637 | #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) |
3638 | |
3639 | static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) |
3640 | { |
3641 | PRINT_ADDR(cp->cmd, "%s: " , label); |
3642 | |
3643 | spi_print_msg(msg); |
3644 | printk("\n" ); |
3645 | } |
3646 | |
3647 | /*========================================================== |
3648 | ** |
3649 | ** NCR chip clock divisor table. |
3650 | ** Divisors are multiplied by 10,000,000 in order to make |
3651 | ** calculations more simple. |
3652 | ** |
3653 | **========================================================== |
3654 | */ |
3655 | |
3656 | #define _5M 5000000 |
3657 | static u_long div_10M[] = |
3658 | {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; |
3659 | |
3660 | |
3661 | /*=============================================================== |
3662 | ** |
3663 | ** Prepare io register values used by ncr_init() according |
3664 | ** to selected and supported features. |
3665 | ** |
3666 | ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 |
3667 | ** transfers. 32,64,128 are only supported by 875 and 895 chips. |
3668 | ** We use log base 2 (burst length) as internal code, with |
3669 | ** value 0 meaning "burst disabled". |
3670 | ** |
3671 | **=============================================================== |
3672 | */ |
3673 | |
3674 | /* |
3675 | * Burst length from burst code. |
3676 | */ |
3677 | #define burst_length(bc) (!(bc))? 0 : 1 << (bc) |
3678 | |
3679 | /* |
3680 | * Burst code from io register bits. Burst enable is ctest0 for c720 |
3681 | */ |
3682 | #define burst_code(dmode, ctest0) \ |
3683 | (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 |
3684 | |
3685 | /* |
3686 | * Set initial io register bits from burst code. |
3687 | */ |
3688 | static inline void ncr_init_burst(struct ncb *np, u_char bc) |
3689 | { |
3690 | u_char *be = &np->rv_ctest0; |
3691 | *be &= ~0x80; |
3692 | np->rv_dmode &= ~(0x3 << 6); |
3693 | np->rv_ctest5 &= ~0x4; |
3694 | |
3695 | if (!bc) { |
3696 | *be |= 0x80; |
3697 | } else { |
3698 | --bc; |
3699 | np->rv_dmode |= ((bc & 0x3) << 6); |
3700 | np->rv_ctest5 |= (bc & 0x4); |
3701 | } |
3702 | } |
3703 | |
3704 | static void __init ncr_prepare_setting(struct ncb *np) |
3705 | { |
3706 | u_char burst_max; |
3707 | u_long period; |
3708 | int i; |
3709 | |
3710 | /* |
3711 | ** Save assumed BIOS setting |
3712 | */ |
3713 | |
3714 | np->sv_scntl0 = INB(nc_scntl0) & 0x0a; |
3715 | np->sv_scntl3 = INB(nc_scntl3) & 0x07; |
3716 | np->sv_dmode = INB(nc_dmode) & 0xce; |
3717 | np->sv_dcntl = INB(nc_dcntl) & 0xa8; |
3718 | np->sv_ctest0 = INB(nc_ctest0) & 0x84; |
3719 | np->sv_ctest3 = INB(nc_ctest3) & 0x01; |
3720 | np->sv_ctest4 = INB(nc_ctest4) & 0x80; |
3721 | np->sv_ctest5 = INB(nc_ctest5) & 0x24; |
3722 | np->sv_gpcntl = INB(nc_gpcntl); |
3723 | np->sv_stest2 = INB(nc_stest2) & 0x20; |
3724 | np->sv_stest4 = INB(nc_stest4); |
3725 | |
3726 | /* |
3727 | ** Wide ? |
3728 | */ |
3729 | |
3730 | np->maxwide = (np->features & FE_WIDE)? 1 : 0; |
3731 | |
3732 | /* |
3733 | * Guess the frequency of the chip's clock. |
3734 | */ |
3735 | if (np->features & FE_ULTRA) |
3736 | np->clock_khz = 80000; |
3737 | else |
3738 | np->clock_khz = 40000; |
3739 | |
3740 | /* |
3741 | * Get the clock multiplier factor. |
3742 | */ |
3743 | if (np->features & FE_QUAD) |
3744 | np->multiplier = 4; |
3745 | else if (np->features & FE_DBLR) |
3746 | np->multiplier = 2; |
3747 | else |
3748 | np->multiplier = 1; |
3749 | |
3750 | /* |
3751 | * Measure SCSI clock frequency for chips |
3752 | * it may vary from assumed one. |
3753 | */ |
3754 | if (np->features & FE_VARCLK) |
3755 | ncr_getclock(np, mult: np->multiplier); |
3756 | |
3757 | /* |
3758 | * Divisor to be used for async (timer pre-scaler). |
3759 | */ |
3760 | i = np->clock_divn - 1; |
3761 | while (--i >= 0) { |
3762 | if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { |
3763 | ++i; |
3764 | break; |
3765 | } |
3766 | } |
3767 | np->rv_scntl3 = i+1; |
3768 | |
3769 | /* |
3770 | * Minimum synchronous period factor supported by the chip. |
3771 | * Btw, 'period' is in tenths of nanoseconds. |
3772 | */ |
3773 | |
3774 | period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; |
3775 | if (period <= 250) np->minsync = 10; |
3776 | else if (period <= 303) np->minsync = 11; |
3777 | else if (period <= 500) np->minsync = 12; |
3778 | else np->minsync = (period + 40 - 1) / 40; |
3779 | |
3780 | /* |
3781 | * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). |
3782 | */ |
3783 | |
3784 | if (np->minsync < 25 && !(np->features & FE_ULTRA)) |
3785 | np->minsync = 25; |
3786 | |
3787 | /* |
3788 | * Maximum synchronous period factor supported by the chip. |
3789 | */ |
3790 | |
3791 | period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); |
3792 | np->maxsync = period > 2540 ? 254 : period / 10; |
3793 | |
3794 | /* |
3795 | ** Prepare initial value of other IO registers |
3796 | */ |
3797 | #if defined SCSI_NCR_TRUST_BIOS_SETTING |
3798 | np->rv_scntl0 = np->sv_scntl0; |
3799 | np->rv_dmode = np->sv_dmode; |
3800 | np->rv_dcntl = np->sv_dcntl; |
3801 | np->rv_ctest0 = np->sv_ctest0; |
3802 | np->rv_ctest3 = np->sv_ctest3; |
3803 | np->rv_ctest4 = np->sv_ctest4; |
3804 | np->rv_ctest5 = np->sv_ctest5; |
3805 | burst_max = burst_code(np->sv_dmode, np->sv_ctest0); |
3806 | #else |
3807 | |
3808 | /* |
3809 | ** Select burst length (dwords) |
3810 | */ |
3811 | burst_max = driver_setup.burst_max; |
3812 | if (burst_max == 255) |
3813 | burst_max = burst_code(np->sv_dmode, np->sv_ctest0); |
3814 | if (burst_max > 7) |
3815 | burst_max = 7; |
3816 | if (burst_max > np->maxburst) |
3817 | burst_max = np->maxburst; |
3818 | |
3819 | /* |
3820 | ** Select all supported special features |
3821 | */ |
3822 | if (np->features & FE_ERL) |
3823 | np->rv_dmode |= ERL; /* Enable Read Line */ |
3824 | if (np->features & FE_BOF) |
3825 | np->rv_dmode |= BOF; /* Burst Opcode Fetch */ |
3826 | if (np->features & FE_ERMP) |
3827 | np->rv_dmode |= ERMP; /* Enable Read Multiple */ |
3828 | if (np->features & FE_PFEN) |
3829 | np->rv_dcntl |= PFEN; /* Prefetch Enable */ |
3830 | if (np->features & FE_CLSE) |
3831 | np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ |
3832 | if (np->features & FE_WRIE) |
3833 | np->rv_ctest3 |= WRIE; /* Write and Invalidate */ |
3834 | if (np->features & FE_DFS) |
3835 | np->rv_ctest5 |= DFS; /* Dma Fifo Size */ |
3836 | if (np->features & FE_MUX) |
3837 | np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ |
3838 | if (np->features & FE_EA) |
3839 | np->rv_dcntl |= EA; /* Enable ACK */ |
3840 | if (np->features & FE_EHP) |
3841 | np->rv_ctest0 |= EHP; /* Even host parity */ |
3842 | |
3843 | /* |
3844 | ** Select some other |
3845 | */ |
3846 | if (driver_setup.master_parity) |
3847 | np->rv_ctest4 |= MPEE; /* Master parity checking */ |
3848 | if (driver_setup.scsi_parity) |
3849 | np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ |
3850 | |
3851 | /* |
3852 | ** Get SCSI addr of host adapter (set by bios?). |
3853 | */ |
3854 | if (np->myaddr == 255) { |
3855 | np->myaddr = INB(nc_scid) & 0x07; |
3856 | if (!np->myaddr) |
3857 | np->myaddr = SCSI_NCR_MYADDR; |
3858 | } |
3859 | |
3860 | #endif /* SCSI_NCR_TRUST_BIOS_SETTING */ |
3861 | |
3862 | /* |
3863 | * Prepare initial io register bits for burst length |
3864 | */ |
3865 | ncr_init_burst(np, bc: burst_max); |
3866 | |
3867 | /* |
3868 | ** Set SCSI BUS mode. |
3869 | ** |
3870 | ** - ULTRA2 chips (895/895A/896) report the current |
3871 | ** BUS mode through the STEST4 IO register. |
3872 | ** - For previous generation chips (825/825A/875), |
3873 | ** user has to tell us how to check against HVD, |
3874 | ** since a 100% safe algorithm is not possible. |
3875 | */ |
3876 | np->scsi_mode = SMODE_SE; |
3877 | if (np->features & FE_DIFF) { |
3878 | switch(driver_setup.diff_support) { |
3879 | case 4: /* Trust previous settings if present, then GPIO3 */ |
3880 | if (np->sv_scntl3) { |
3881 | if (np->sv_stest2 & 0x20) |
3882 | np->scsi_mode = SMODE_HVD; |
3883 | break; |
3884 | } |
3885 | fallthrough; |
3886 | case 3: /* SYMBIOS controllers report HVD through GPIO3 */ |
3887 | if (INB(nc_gpreg) & 0x08) |
3888 | break; |
3889 | fallthrough; |
3890 | case 2: /* Set HVD unconditionally */ |
3891 | np->scsi_mode = SMODE_HVD; |
3892 | fallthrough; |
3893 | case 1: /* Trust previous settings for HVD */ |
3894 | if (np->sv_stest2 & 0x20) |
3895 | np->scsi_mode = SMODE_HVD; |
3896 | break; |
3897 | default:/* Don't care about HVD */ |
3898 | break; |
3899 | } |
3900 | } |
3901 | if (np->scsi_mode == SMODE_HVD) |
3902 | np->rv_stest2 |= 0x20; |
3903 | |
3904 | /* |
3905 | ** Set LED support from SCRIPTS. |
3906 | ** Ignore this feature for boards known to use a |
3907 | ** specific GPIO wiring and for the 895A or 896 |
3908 | ** that drive the LED directly. |
3909 | ** Also probe initial setting of GPIO0 as output. |
3910 | */ |
3911 | if ((driver_setup.led_pin) && |
3912 | !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) |
3913 | np->features |= FE_LED0; |
3914 | |
3915 | /* |
3916 | ** Set irq mode. |
3917 | */ |
3918 | switch(driver_setup.irqm & 3) { |
3919 | case 2: |
3920 | np->rv_dcntl |= IRQM; |
3921 | break; |
3922 | case 1: |
3923 | np->rv_dcntl |= (np->sv_dcntl & IRQM); |
3924 | break; |
3925 | default: |
3926 | break; |
3927 | } |
3928 | |
3929 | /* |
3930 | ** Configure targets according to driver setup. |
3931 | ** Allow to override sync, wide and NOSCAN from |
3932 | ** boot command line. |
3933 | */ |
3934 | for (i = 0 ; i < MAX_TARGET ; i++) { |
3935 | struct tcb *tp = &np->target[i]; |
3936 | |
3937 | tp->usrsync = driver_setup.default_sync; |
3938 | tp->usrwide = driver_setup.max_wide; |
3939 | tp->usrtags = MAX_TAGS; |
3940 | tp->period = 0xffff; |
3941 | if (!driver_setup.disconnection) |
3942 | np->target[i].usrflag = UF_NODISC; |
3943 | } |
3944 | |
3945 | /* |
3946 | ** Announce all that stuff to user. |
3947 | */ |
3948 | |
3949 | printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n" , ncr_name(np), |
3950 | np->myaddr, |
3951 | np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), |
3952 | (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity" , |
3953 | (np->rv_stest2 & 0x20) ? ", Differential" : "" ); |
3954 | |
3955 | if (bootverbose > 1) { |
3956 | printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
3957 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n" , |
3958 | ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, |
3959 | np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); |
3960 | |
3961 | printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
3962 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n" , |
3963 | ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, |
3964 | np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); |
3965 | } |
3966 | |
3967 | if (bootverbose && np->paddr2) |
3968 | printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n" , |
3969 | ncr_name(np), np->paddr2); |
3970 | } |
3971 | |
3972 | /*========================================================== |
3973 | ** |
3974 | ** |
3975 | ** Done SCSI commands list management. |
3976 | ** |
3977 | ** We donnot enter the scsi_done() callback immediately |
3978 | ** after a command has been seen as completed but we |
3979 | ** insert it into a list which is flushed outside any kind |
3980 | ** of driver critical section. |
3981 | ** This allows to do minimal stuff under interrupt and |
3982 | ** inside critical sections and to also avoid locking up |
3983 | ** on recursive calls to driver entry points under SMP. |
3984 | ** In fact, the only kernel point which is entered by the |
3985 | ** driver with a driver lock set is kmalloc(GFP_ATOMIC) |
3986 | ** that shall not reenter the driver under any circumstances, |
3987 | ** AFAIK. |
3988 | ** |
3989 | **========================================================== |
3990 | */ |
3991 | static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) |
3992 | { |
3993 | unmap_scsi_data(np, cmd); |
3994 | cmd->host_scribble = (char *) np->done_list; |
3995 | np->done_list = cmd; |
3996 | } |
3997 | |
3998 | static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) |
3999 | { |
4000 | struct scsi_cmnd *cmd; |
4001 | |
4002 | while (lcmd) { |
4003 | cmd = lcmd; |
4004 | lcmd = (struct scsi_cmnd *) cmd->host_scribble; |
4005 | scsi_done(cmd); |
4006 | } |
4007 | } |
4008 | |
4009 | /*========================================================== |
4010 | ** |
4011 | ** |
4012 | ** Prepare the next negotiation message if needed. |
4013 | ** |
4014 | ** Fill in the part of message buffer that contains the |
4015 | ** negotiation and the nego_status field of the CCB. |
4016 | ** Returns the size of the message in bytes. |
4017 | ** |
4018 | ** |
4019 | **========================================================== |
4020 | */ |
4021 | |
4022 | |
4023 | static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) |
4024 | { |
4025 | struct tcb *tp = &np->target[cp->target]; |
4026 | int msglen = 0; |
4027 | int nego = 0; |
4028 | struct scsi_target *starget = tp->starget; |
4029 | |
4030 | /* negotiate wide transfers ? */ |
4031 | if (!tp->widedone) { |
4032 | if (spi_support_wide(starget)) { |
4033 | nego = NS_WIDE; |
4034 | } else |
4035 | tp->widedone=1; |
4036 | } |
4037 | |
4038 | /* negotiate synchronous transfers? */ |
4039 | if (!nego && !tp->period) { |
4040 | if (spi_support_sync(starget)) { |
4041 | nego = NS_SYNC; |
4042 | } else { |
4043 | tp->period =0xffff; |
4044 | dev_info(&starget->dev, "target did not report SYNC.\n" ); |
4045 | } |
4046 | } |
4047 | |
4048 | switch (nego) { |
4049 | case NS_SYNC: |
4050 | msglen += spi_populate_sync_msg(msg: msgptr + msglen, |
4051 | period: tp->maxoffs ? tp->minsync : 0, offset: tp->maxoffs); |
4052 | break; |
4053 | case NS_WIDE: |
4054 | msglen += spi_populate_width_msg(msg: msgptr + msglen, width: tp->usrwide); |
4055 | break; |
4056 | } |
4057 | |
4058 | cp->nego_status = nego; |
4059 | |
4060 | if (nego) { |
4061 | tp->nego_cp = cp; |
4062 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
4063 | ncr_print_msg(cp, label: nego == NS_WIDE ? |
4064 | "wide msgout" :"sync_msgout" , msg: msgptr); |
4065 | } |
4066 | } |
4067 | |
4068 | return msglen; |
4069 | } |
4070 | |
4071 | |
4072 | |
4073 | /*========================================================== |
4074 | ** |
4075 | ** |
4076 | ** Start execution of a SCSI command. |
4077 | ** This is called from the generic SCSI driver. |
4078 | ** |
4079 | ** |
4080 | **========================================================== |
4081 | */ |
4082 | static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) |
4083 | { |
4084 | struct scsi_device *sdev = cmd->device; |
4085 | struct tcb *tp = &np->target[sdev->id]; |
4086 | struct lcb *lp = tp->lp[sdev->lun]; |
4087 | struct ccb *cp; |
4088 | |
4089 | int segments; |
4090 | u_char idmsg, *msgptr; |
4091 | u32 msglen; |
4092 | int direction; |
4093 | u32 lastp, goalp; |
4094 | |
4095 | /*--------------------------------------------- |
4096 | ** |
4097 | ** Some shortcuts ... |
4098 | ** |
4099 | **--------------------------------------------- |
4100 | */ |
4101 | if ((sdev->id == np->myaddr ) || |
4102 | (sdev->id >= MAX_TARGET) || |
4103 | (sdev->lun >= MAX_LUN )) { |
4104 | return(DID_BAD_TARGET); |
4105 | } |
4106 | |
4107 | /*--------------------------------------------- |
4108 | ** |
4109 | ** Complete the 1st TEST UNIT READY command |
4110 | ** with error condition if the device is |
4111 | ** flagged NOSCAN, in order to speed up |
4112 | ** the boot. |
4113 | ** |
4114 | **--------------------------------------------- |
4115 | */ |
4116 | if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && |
4117 | (tp->usrflag & UF_NOSCAN)) { |
4118 | tp->usrflag &= ~UF_NOSCAN; |
4119 | return DID_BAD_TARGET; |
4120 | } |
4121 | |
4122 | if (DEBUG_FLAGS & DEBUG_TINY) { |
4123 | PRINT_ADDR(cmd, "CMD=%x " , cmd->cmnd[0]); |
4124 | } |
4125 | |
4126 | /*--------------------------------------------------- |
4127 | ** |
4128 | ** Assign a ccb / bind cmd. |
4129 | ** If resetting, shorten settle_time if necessary |
4130 | ** in order to avoid spurious timeouts. |
4131 | ** If resetting or no free ccb, |
4132 | ** insert cmd into the waiting list. |
4133 | ** |
4134 | **---------------------------------------------------- |
4135 | */ |
4136 | if (np->settle_time && scsi_cmd_to_rq(scmd: cmd)->timeout >= HZ) { |
4137 | u_long tlimit = jiffies + scsi_cmd_to_rq(scmd: cmd)->timeout - HZ; |
4138 | if (time_after(np->settle_time, tlimit)) |
4139 | np->settle_time = tlimit; |
4140 | } |
4141 | |
4142 | if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { |
4143 | insert_into_waiting_list(np, cmd); |
4144 | return(DID_OK); |
4145 | } |
4146 | cp->cmd = cmd; |
4147 | |
4148 | /*---------------------------------------------------- |
4149 | ** |
4150 | ** Build the identify / tag / sdtr message |
4151 | ** |
4152 | **---------------------------------------------------- |
4153 | */ |
4154 | |
4155 | idmsg = IDENTIFY(0, sdev->lun); |
4156 | |
4157 | if (cp ->tag != NO_TAG || |
4158 | (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) |
4159 | idmsg |= 0x40; |
4160 | |
4161 | msgptr = cp->scsi_smsg; |
4162 | msglen = 0; |
4163 | msgptr[msglen++] = idmsg; |
4164 | |
4165 | if (cp->tag != NO_TAG) { |
4166 | char order = np->order; |
4167 | |
4168 | /* |
4169 | ** Force ordered tag if necessary to avoid timeouts |
4170 | ** and to preserve interactivity. |
4171 | */ |
4172 | if (lp && time_after(jiffies, lp->tags_stime)) { |
4173 | if (lp->tags_smap) { |
4174 | order = ORDERED_QUEUE_TAG; |
4175 | if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ |
4176 | PRINT_ADDR(cmd, |
4177 | "ordered tag forced.\n" ); |
4178 | } |
4179 | } |
4180 | lp->tags_stime = jiffies + 3*HZ; |
4181 | lp->tags_smap = lp->tags_umap; |
4182 | } |
4183 | |
4184 | if (order == 0) { |
4185 | /* |
4186 | ** Ordered write ops, unordered read ops. |
4187 | */ |
4188 | switch (cmd->cmnd[0]) { |
4189 | case 0x08: /* READ_SMALL (6) */ |
4190 | case 0x28: /* READ_BIG (10) */ |
4191 | case 0xa8: /* READ_HUGE (12) */ |
4192 | order = SIMPLE_QUEUE_TAG; |
4193 | break; |
4194 | default: |
4195 | order = ORDERED_QUEUE_TAG; |
4196 | } |
4197 | } |
4198 | msgptr[msglen++] = order; |
4199 | /* |
4200 | ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, |
4201 | ** since we may have to deal with devices that have |
4202 | ** problems with #TAG 0 or too great #TAG numbers. |
4203 | */ |
4204 | msgptr[msglen++] = (cp->tag << 1) + 1; |
4205 | } |
4206 | |
4207 | /*---------------------------------------------------- |
4208 | ** |
4209 | ** Build the data descriptors |
4210 | ** |
4211 | **---------------------------------------------------- |
4212 | */ |
4213 | |
4214 | direction = cmd->sc_data_direction; |
4215 | if (direction != DMA_NONE) { |
4216 | segments = ncr_scatter(np, cp, cmd: cp->cmd); |
4217 | if (segments < 0) { |
4218 | ncr_free_ccb(np, cp); |
4219 | return(DID_ERROR); |
4220 | } |
4221 | } |
4222 | else { |
4223 | cp->data_len = 0; |
4224 | segments = 0; |
4225 | } |
4226 | |
4227 | /*--------------------------------------------------- |
4228 | ** |
4229 | ** negotiation required? |
4230 | ** |
4231 | ** (nego_status is filled by ncr_prepare_nego()) |
4232 | ** |
4233 | **--------------------------------------------------- |
4234 | */ |
4235 | |
4236 | cp->nego_status = 0; |
4237 | |
4238 | if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { |
4239 | msglen += ncr_prepare_nego (np, cp, msgptr: msgptr + msglen); |
4240 | } |
4241 | |
4242 | /*---------------------------------------------------- |
4243 | ** |
4244 | ** Determine xfer direction. |
4245 | ** |
4246 | **---------------------------------------------------- |
4247 | */ |
4248 | if (!cp->data_len) |
4249 | direction = DMA_NONE; |
4250 | |
4251 | /* |
4252 | ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE |
4253 | ** but prepare alternate pointers for TO_DEVICE in case |
4254 | ** of our speculation will be just wrong. |
4255 | ** SCRIPTS will swap values if needed. |
4256 | */ |
4257 | switch(direction) { |
4258 | case DMA_BIDIRECTIONAL: |
4259 | case DMA_TO_DEVICE: |
4260 | goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; |
4261 | if (segments <= MAX_SCATTERL) |
4262 | lastp = goalp - 8 - (segments * 16); |
4263 | else { |
4264 | lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); |
4265 | lastp -= (segments - MAX_SCATTERL) * 16; |
4266 | } |
4267 | if (direction != DMA_BIDIRECTIONAL) |
4268 | break; |
4269 | cp->phys.header.wgoalp = cpu_to_scr(goalp); |
4270 | cp->phys.header.wlastp = cpu_to_scr(lastp); |
4271 | fallthrough; |
4272 | case DMA_FROM_DEVICE: |
4273 | goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; |
4274 | if (segments <= MAX_SCATTERL) |
4275 | lastp = goalp - 8 - (segments * 16); |
4276 | else { |
4277 | lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); |
4278 | lastp -= (segments - MAX_SCATTERL) * 16; |
4279 | } |
4280 | break; |
4281 | default: |
4282 | case DMA_NONE: |
4283 | lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); |
4284 | break; |
4285 | } |
4286 | |
4287 | /* |
4288 | ** Set all pointers values needed by SCRIPTS. |
4289 | ** If direction is unknown, start at data_io. |
4290 | */ |
4291 | cp->phys.header.lastp = cpu_to_scr(lastp); |
4292 | cp->phys.header.goalp = cpu_to_scr(goalp); |
4293 | |
4294 | if (direction == DMA_BIDIRECTIONAL) |
4295 | cp->phys.header.savep = |
4296 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); |
4297 | else |
4298 | cp->phys.header.savep= cpu_to_scr(lastp); |
4299 | |
4300 | /* |
4301 | ** Save the initial data pointer in order to be able |
4302 | ** to redo the command. |
4303 | */ |
4304 | cp->startp = cp->phys.header.savep; |
4305 | |
4306 | /*---------------------------------------------------- |
4307 | ** |
4308 | ** fill in ccb |
4309 | ** |
4310 | **---------------------------------------------------- |
4311 | ** |
4312 | ** |
4313 | ** physical -> virtual backlink |
4314 | ** Generic SCSI command |
4315 | */ |
4316 | |
4317 | /* |
4318 | ** Startqueue |
4319 | */ |
4320 | cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
4321 | cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); |
4322 | /* |
4323 | ** select |
4324 | */ |
4325 | cp->phys.select.sel_id = sdev_id(sdev); |
4326 | cp->phys.select.sel_scntl3 = tp->wval; |
4327 | cp->phys.select.sel_sxfer = tp->sval; |
4328 | /* |
4329 | ** message |
4330 | */ |
4331 | cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); |
4332 | cp->phys.smsg.size = cpu_to_scr(msglen); |
4333 | |
4334 | /* |
4335 | ** command |
4336 | */ |
4337 | memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); |
4338 | cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); |
4339 | cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); |
4340 | |
4341 | /* |
4342 | ** status |
4343 | */ |
4344 | cp->actualquirks = 0; |
4345 | cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; |
4346 | cp->scsi_status = SAM_STAT_ILLEGAL; |
4347 | cp->parity_status = 0; |
4348 | |
4349 | cp->xerr_status = XE_OK; |
4350 | |
4351 | /*---------------------------------------------------- |
4352 | ** |
4353 | ** Critical region: start this job. |
4354 | ** |
4355 | **---------------------------------------------------- |
4356 | */ |
4357 | |
4358 | /* activate this job. */ |
4359 | cp->magic = CCB_MAGIC; |
4360 | |
4361 | /* |
4362 | ** insert next CCBs into start queue. |
4363 | ** 2 max at a time is enough to flush the CCB wait queue. |
4364 | */ |
4365 | cp->auto_sense = 0; |
4366 | if (lp) |
4367 | ncr_start_next_ccb(np, lp, maxn: 2); |
4368 | else |
4369 | ncr_put_start_queue(np, cp); |
4370 | |
4371 | /* Command is successfully queued. */ |
4372 | |
4373 | return DID_OK; |
4374 | } |
4375 | |
4376 | |
4377 | /*========================================================== |
4378 | ** |
4379 | ** |
4380 | ** Insert a CCB into the start queue and wake up the |
4381 | ** SCRIPTS processor. |
4382 | ** |
4383 | ** |
4384 | **========================================================== |
4385 | */ |
4386 | |
4387 | static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) |
4388 | { |
4389 | struct list_head *qp; |
4390 | struct ccb *cp; |
4391 | |
4392 | if (lp->held_ccb) |
4393 | return; |
4394 | |
4395 | while (maxn-- && lp->queuedccbs < lp->queuedepth) { |
4396 | qp = ncr_list_pop(head: &lp->wait_ccbq); |
4397 | if (!qp) |
4398 | break; |
4399 | ++lp->queuedccbs; |
4400 | cp = list_entry(qp, struct ccb, link_ccbq); |
4401 | list_add_tail(new: qp, head: &lp->busy_ccbq); |
4402 | lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = |
4403 | cpu_to_scr(CCB_PHYS (cp, restart)); |
4404 | ncr_put_start_queue(np, cp); |
4405 | } |
4406 | } |
4407 | |
4408 | static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) |
4409 | { |
4410 | u16 qidx; |
4411 | |
4412 | /* |
4413 | ** insert into start queue. |
4414 | */ |
4415 | if (!np->squeueput) np->squeueput = 1; |
4416 | qidx = np->squeueput + 2; |
4417 | if (qidx >= MAX_START + MAX_START) qidx = 1; |
4418 | |
4419 | np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
4420 | MEMORY_BARRIER(); |
4421 | np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); |
4422 | |
4423 | np->squeueput = qidx; |
4424 | ++np->queuedccbs; |
4425 | cp->queued = 1; |
4426 | |
4427 | if (DEBUG_FLAGS & DEBUG_QUEUE) |
4428 | printk ("%s: queuepos=%d.\n" , ncr_name (np), np->squeueput); |
4429 | |
4430 | /* |
4431 | ** Script processor may be waiting for reselect. |
4432 | ** Wake it up. |
4433 | */ |
4434 | MEMORY_BARRIER(); |
4435 | OUTB (nc_istat, SIGP); |
4436 | } |
4437 | |
4438 | |
4439 | static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) |
4440 | { |
4441 | u32 term; |
4442 | int retv = 0; |
4443 | |
4444 | np->settle_time = jiffies + settle_delay * HZ; |
4445 | |
4446 | if (bootverbose > 1) |
4447 | printk("%s: resetting, " |
4448 | "command processing suspended for %d seconds\n" , |
4449 | ncr_name(np), settle_delay); |
4450 | |
4451 | ncr_chip_reset(np, delay: 100); |
4452 | udelay(2000); /* The 895 needs time for the bus mode to settle */ |
4453 | if (enab_int) |
4454 | OUTW (nc_sien, RST); |
4455 | /* |
4456 | ** Enable Tolerant, reset IRQD if present and |
4457 | ** properly set IRQ mode, prior to resetting the bus. |
4458 | */ |
4459 | OUTB (nc_stest3, TE); |
4460 | OUTB (nc_scntl1, CRST); |
4461 | udelay(200); |
4462 | |
4463 | if (!driver_setup.bus_check) |
4464 | goto out; |
4465 | /* |
4466 | ** Check for no terminators or SCSI bus shorts to ground. |
4467 | ** Read SCSI data bus, data parity bits and control signals. |
4468 | ** We are expecting RESET to be TRUE and other signals to be |
4469 | ** FALSE. |
4470 | */ |
4471 | |
4472 | term = INB(nc_sstat0); |
4473 | term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ |
4474 | term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ |
4475 | ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ |
4476 | ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ |
4477 | INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ |
4478 | |
4479 | if (!(np->features & FE_WIDE)) |
4480 | term &= 0x3ffff; |
4481 | |
4482 | if (term != (2<<7)) { |
4483 | printk("%s: suspicious SCSI data while resetting the BUS.\n" , |
4484 | ncr_name(np)); |
4485 | printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " |
4486 | "0x%lx, expecting 0x%lx\n" , |
4487 | ncr_name(np), |
4488 | (np->features & FE_WIDE) ? "dp1,d15-8," : "" , |
4489 | (u_long)term, (u_long)(2<<7)); |
4490 | if (driver_setup.bus_check == 1) |
4491 | retv = 1; |
4492 | } |
4493 | out: |
4494 | OUTB (nc_scntl1, 0); |
4495 | return retv; |
4496 | } |
4497 | |
4498 | /* |
4499 | * Start reset process. |
4500 | * If reset in progress do nothing. |
4501 | * The interrupt handler will reinitialize the chip. |
4502 | * The timeout handler will wait for settle_time before |
4503 | * clearing it and so resuming command processing. |
4504 | */ |
4505 | static void ncr_start_reset(struct ncb *np) |
4506 | { |
4507 | if (!np->settle_time) { |
4508 | ncr_reset_scsi_bus(np, enab_int: 1, settle_delay: driver_setup.settle_delay); |
4509 | } |
4510 | } |
4511 | |
4512 | /*========================================================== |
4513 | ** |
4514 | ** |
4515 | ** Reset the SCSI BUS. |
4516 | ** This is called from the generic SCSI driver. |
4517 | ** |
4518 | ** |
4519 | **========================================================== |
4520 | */ |
4521 | static int ncr_reset_bus (struct ncb *np) |
4522 | { |
4523 | /* |
4524 | * Return immediately if reset is in progress. |
4525 | */ |
4526 | if (np->settle_time) { |
4527 | return FAILED; |
4528 | } |
4529 | /* |
4530 | * Start the reset process. |
4531 | * The script processor is then assumed to be stopped. |
4532 | * Commands will now be queued in the waiting list until a settle |
4533 | * delay of 2 seconds will be completed. |
4534 | */ |
4535 | ncr_start_reset(np); |
4536 | /* |
4537 | * Wake-up all awaiting commands with DID_RESET. |
4538 | */ |
4539 | reset_waiting_list(np); |
4540 | /* |
4541 | * Wake-up all pending commands with HS_RESET -> DID_RESET. |
4542 | */ |
4543 | ncr_wakeup(np, HS_RESET); |
4544 | |
4545 | return SUCCESS; |
4546 | } |
4547 | |
4548 | static void ncr_detach(struct ncb *np) |
4549 | { |
4550 | struct ccb *cp; |
4551 | struct tcb *tp; |
4552 | struct lcb *lp; |
4553 | int target, lun; |
4554 | int i; |
4555 | char inst_name[16]; |
4556 | |
4557 | /* Local copy so we don't access np after freeing it! */ |
4558 | strscpy(inst_name, ncr_name(np), sizeof(inst_name)); |
4559 | |
4560 | printk("%s: releasing host resources\n" , ncr_name(np)); |
4561 | |
4562 | /* |
4563 | ** Stop the ncr_timeout process |
4564 | ** Set release_stage to 1 and wait that ncr_timeout() set it to 2. |
4565 | */ |
4566 | |
4567 | #ifdef DEBUG_NCR53C8XX |
4568 | printk("%s: stopping the timer\n" , ncr_name(np)); |
4569 | #endif |
4570 | np->release_stage = 1; |
4571 | for (i = 50 ; i && np->release_stage != 2 ; i--) |
4572 | mdelay(100); |
4573 | if (np->release_stage != 2) |
4574 | printk("%s: the timer seems to be already stopped\n" , ncr_name(np)); |
4575 | else np->release_stage = 2; |
4576 | |
4577 | /* |
4578 | ** Disable chip interrupts |
4579 | */ |
4580 | |
4581 | #ifdef DEBUG_NCR53C8XX |
4582 | printk("%s: disabling chip interrupts\n" , ncr_name(np)); |
4583 | #endif |
4584 | OUTW (nc_sien , 0); |
4585 | OUTB (nc_dien , 0); |
4586 | |
4587 | /* |
4588 | ** Reset NCR chip |
4589 | ** Restore bios setting for automatic clock detection. |
4590 | */ |
4591 | |
4592 | printk("%s: resetting chip\n" , ncr_name(np)); |
4593 | ncr_chip_reset(np, delay: 100); |
4594 | |
4595 | OUTB(nc_dmode, np->sv_dmode); |
4596 | OUTB(nc_dcntl, np->sv_dcntl); |
4597 | OUTB(nc_ctest0, np->sv_ctest0); |
4598 | OUTB(nc_ctest3, np->sv_ctest3); |
4599 | OUTB(nc_ctest4, np->sv_ctest4); |
4600 | OUTB(nc_ctest5, np->sv_ctest5); |
4601 | OUTB(nc_gpcntl, np->sv_gpcntl); |
4602 | OUTB(nc_stest2, np->sv_stest2); |
4603 | |
4604 | ncr_selectclock(np, scntl3: np->sv_scntl3); |
4605 | |
4606 | /* |
4607 | ** Free allocated ccb(s) |
4608 | */ |
4609 | |
4610 | while ((cp=np->ccb->link_ccb) != NULL) { |
4611 | np->ccb->link_ccb = cp->link_ccb; |
4612 | if (cp->host_status) { |
4613 | printk("%s: shall free an active ccb (host_status=%d)\n" , |
4614 | ncr_name(np), cp->host_status); |
4615 | } |
4616 | #ifdef DEBUG_NCR53C8XX |
4617 | printk("%s: freeing ccb (%lx)\n" , ncr_name(np), (u_long) cp); |
4618 | #endif |
4619 | m_free_dma(cp, sizeof(*cp), "CCB" ); |
4620 | } |
4621 | |
4622 | /* Free allocated tp(s) */ |
4623 | |
4624 | for (target = 0; target < MAX_TARGET ; target++) { |
4625 | tp=&np->target[target]; |
4626 | for (lun = 0 ; lun < MAX_LUN ; lun++) { |
4627 | lp = tp->lp[lun]; |
4628 | if (lp) { |
4629 | #ifdef DEBUG_NCR53C8XX |
4630 | printk("%s: freeing lp (%lx)\n" , ncr_name(np), (u_long) lp); |
4631 | #endif |
4632 | if (lp->jump_ccb != &lp->jump_ccb_0) |
4633 | m_free_dma(lp->jump_ccb,256,"JUMP_CCB" ); |
4634 | m_free_dma(lp, sizeof(*lp), "LCB" ); |
4635 | } |
4636 | } |
4637 | } |
4638 | |
4639 | if (np->scripth0) |
4640 | m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH" ); |
4641 | if (np->script0) |
4642 | m_free_dma(np->script0, sizeof(struct script), "SCRIPT" ); |
4643 | if (np->ccb) |
4644 | m_free_dma(np->ccb, sizeof(struct ccb), "CCB" ); |
4645 | m_free_dma(np, sizeof(struct ncb), "NCB" ); |
4646 | |
4647 | printk("%s: host resources successfully released\n" , inst_name); |
4648 | } |
4649 | |
4650 | /*========================================================== |
4651 | ** |
4652 | ** |
4653 | ** Complete execution of a SCSI command. |
4654 | ** Signal completion to the generic SCSI driver. |
4655 | ** |
4656 | ** |
4657 | **========================================================== |
4658 | */ |
4659 | |
4660 | void ncr_complete (struct ncb *np, struct ccb *cp) |
4661 | { |
4662 | struct scsi_cmnd *cmd; |
4663 | struct tcb *tp; |
4664 | struct lcb *lp; |
4665 | |
4666 | /* |
4667 | ** Sanity check |
4668 | */ |
4669 | |
4670 | if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) |
4671 | return; |
4672 | |
4673 | /* |
4674 | ** Print minimal debug information. |
4675 | */ |
4676 | |
4677 | if (DEBUG_FLAGS & DEBUG_TINY) |
4678 | printk ("CCB=%lx STAT=%x/%x\n" , (unsigned long)cp, |
4679 | cp->host_status,cp->scsi_status); |
4680 | |
4681 | /* |
4682 | ** Get command, target and lun pointers. |
4683 | */ |
4684 | |
4685 | cmd = cp->cmd; |
4686 | cp->cmd = NULL; |
4687 | tp = &np->target[cmd->device->id]; |
4688 | lp = tp->lp[cmd->device->lun]; |
4689 | |
4690 | /* |
4691 | ** We donnot queue more than 1 ccb per target |
4692 | ** with negotiation at any time. If this ccb was |
4693 | ** used for negotiation, clear this info in the tcb. |
4694 | */ |
4695 | |
4696 | if (cp == tp->nego_cp) |
4697 | tp->nego_cp = NULL; |
4698 | |
4699 | /* |
4700 | ** If auto-sense performed, change scsi status. |
4701 | */ |
4702 | if (cp->auto_sense) { |
4703 | cp->scsi_status = cp->auto_sense; |
4704 | } |
4705 | |
4706 | /* |
4707 | ** If we were recovering from queue full or performing |
4708 | ** auto-sense, requeue skipped CCBs to the wait queue. |
4709 | */ |
4710 | |
4711 | if (lp && lp->held_ccb) { |
4712 | if (cp == lp->held_ccb) { |
4713 | list_splice_init(list: &lp->skip_ccbq, head: &lp->wait_ccbq); |
4714 | lp->held_ccb = NULL; |
4715 | } |
4716 | } |
4717 | |
4718 | /* |
4719 | ** Check for parity errors. |
4720 | */ |
4721 | |
4722 | if (cp->parity_status > 1) { |
4723 | PRINT_ADDR(cmd, "%d parity error(s).\n" ,cp->parity_status); |
4724 | } |
4725 | |
4726 | /* |
4727 | ** Check for extended errors. |
4728 | */ |
4729 | |
4730 | if (cp->xerr_status != XE_OK) { |
4731 | switch (cp->xerr_status) { |
4732 | case XE_EXTRA_DATA: |
4733 | PRINT_ADDR(cmd, "extraneous data discarded.\n" ); |
4734 | break; |
4735 | case XE_BAD_PHASE: |
4736 | PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n" ); |
4737 | break; |
4738 | default: |
4739 | PRINT_ADDR(cmd, "extended error %d.\n" , |
4740 | cp->xerr_status); |
4741 | break; |
4742 | } |
4743 | if (cp->host_status==HS_COMPLETE) |
4744 | cp->host_status = HS_FAIL; |
4745 | } |
4746 | |
4747 | /* |
4748 | ** Print out any error for debugging purpose. |
4749 | */ |
4750 | if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { |
4751 | if (cp->host_status != HS_COMPLETE || |
4752 | cp->scsi_status != SAM_STAT_GOOD) { |
4753 | PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " |
4754 | "scsi_status=%x\n" , cmd->cmnd[0], |
4755 | cp->host_status, cp->scsi_status); |
4756 | } |
4757 | } |
4758 | |
4759 | /* |
4760 | ** Check the status. |
4761 | */ |
4762 | cmd->result = 0; |
4763 | if ( (cp->host_status == HS_COMPLETE) |
4764 | && (cp->scsi_status == SAM_STAT_GOOD || |
4765 | cp->scsi_status == SAM_STAT_CONDITION_MET)) { |
4766 | /* |
4767 | * All went well (GOOD status). |
4768 | * CONDITION MET status is returned on |
4769 | * `Pre-Fetch' or `Search data' success. |
4770 | */ |
4771 | set_status_byte(cmd, status: cp->scsi_status); |
4772 | |
4773 | /* |
4774 | ** @RESID@ |
4775 | ** Could dig out the correct value for resid, |
4776 | ** but it would be quite complicated. |
4777 | */ |
4778 | /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ |
4779 | |
4780 | /* |
4781 | ** Allocate the lcb if not yet. |
4782 | */ |
4783 | if (!lp) |
4784 | ncr_alloc_lcb (np, tn: cmd->device->id, ln: cmd->device->lun); |
4785 | |
4786 | tp->bytes += cp->data_len; |
4787 | tp->transfers ++; |
4788 | |
4789 | /* |
4790 | ** If tags was reduced due to queue full, |
4791 | ** increase tags if 1000 good status received. |
4792 | */ |
4793 | if (lp && lp->usetags && lp->numtags < lp->maxtags) { |
4794 | ++lp->num_good; |
4795 | if (lp->num_good >= 1000) { |
4796 | lp->num_good = 0; |
4797 | ++lp->numtags; |
4798 | ncr_setup_tags (np, sdev: cmd->device); |
4799 | } |
4800 | } |
4801 | } else if ((cp->host_status == HS_COMPLETE) |
4802 | && (cp->scsi_status == SAM_STAT_CHECK_CONDITION)) { |
4803 | /* |
4804 | ** Check condition code |
4805 | */ |
4806 | set_status_byte(cmd, status: SAM_STAT_CHECK_CONDITION); |
4807 | |
4808 | /* |
4809 | ** Copy back sense data to caller's buffer. |
4810 | */ |
4811 | memcpy(cmd->sense_buffer, cp->sense_buf, |
4812 | min_t(size_t, SCSI_SENSE_BUFFERSIZE, |
4813 | sizeof(cp->sense_buf))); |
4814 | |
4815 | if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { |
4816 | u_char *p = cmd->sense_buffer; |
4817 | int i; |
4818 | PRINT_ADDR(cmd, "sense data:" ); |
4819 | for (i=0; i<14; i++) printk (" %x" , *p++); |
4820 | printk (".\n" ); |
4821 | } |
4822 | } else if ((cp->host_status == HS_COMPLETE) |
4823 | && (cp->scsi_status == SAM_STAT_RESERVATION_CONFLICT)) { |
4824 | /* |
4825 | ** Reservation Conflict condition code |
4826 | */ |
4827 | set_status_byte(cmd, status: SAM_STAT_RESERVATION_CONFLICT); |
4828 | |
4829 | } else if ((cp->host_status == HS_COMPLETE) |
4830 | && (cp->scsi_status == SAM_STAT_BUSY || |
4831 | cp->scsi_status == SAM_STAT_TASK_SET_FULL)) { |
4832 | |
4833 | /* |
4834 | ** Target is busy. |
4835 | */ |
4836 | set_status_byte(cmd, status: cp->scsi_status); |
4837 | |
4838 | } else if ((cp->host_status == HS_SEL_TIMEOUT) |
4839 | || (cp->host_status == HS_TIMEOUT)) { |
4840 | |
4841 | /* |
4842 | ** No response |
4843 | */ |
4844 | set_status_byte(cmd, status: cp->scsi_status); |
4845 | set_host_byte(cmd, status: DID_TIME_OUT); |
4846 | |
4847 | } else if (cp->host_status == HS_RESET) { |
4848 | |
4849 | /* |
4850 | ** SCSI bus reset |
4851 | */ |
4852 | set_status_byte(cmd, status: cp->scsi_status); |
4853 | set_host_byte(cmd, status: DID_RESET); |
4854 | |
4855 | } else if (cp->host_status == HS_ABORTED) { |
4856 | |
4857 | /* |
4858 | ** Transfer aborted |
4859 | */ |
4860 | set_status_byte(cmd, status: cp->scsi_status); |
4861 | set_host_byte(cmd, status: DID_ABORT); |
4862 | |
4863 | } else { |
4864 | |
4865 | /* |
4866 | ** Other protocol messes |
4867 | */ |
4868 | PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n" , |
4869 | cp->host_status, cp->scsi_status, cp); |
4870 | |
4871 | set_status_byte(cmd, status: cp->scsi_status); |
4872 | set_host_byte(cmd, status: DID_ERROR); |
4873 | } |
4874 | |
4875 | /* |
4876 | ** trace output |
4877 | */ |
4878 | |
4879 | if (tp->usrflag & UF_TRACE) { |
4880 | u_char * p; |
4881 | int i; |
4882 | PRINT_ADDR(cmd, " CMD:" ); |
4883 | p = (u_char*) &cmd->cmnd[0]; |
4884 | for (i=0; i<cmd->cmd_len; i++) printk (" %x" , *p++); |
4885 | |
4886 | if (cp->host_status==HS_COMPLETE) { |
4887 | switch (cp->scsi_status) { |
4888 | case SAM_STAT_GOOD: |
4889 | printk (" GOOD" ); |
4890 | break; |
4891 | case SAM_STAT_CHECK_CONDITION: |
4892 | printk (" SENSE:" ); |
4893 | p = (u_char*) &cmd->sense_buffer; |
4894 | for (i=0; i<14; i++) |
4895 | printk (" %x" , *p++); |
4896 | break; |
4897 | default: |
4898 | printk (" STAT: %x\n" , cp->scsi_status); |
4899 | break; |
4900 | } |
4901 | } else printk (" HOSTERROR: %x" , cp->host_status); |
4902 | printk ("\n" ); |
4903 | } |
4904 | |
4905 | /* |
4906 | ** Free this ccb |
4907 | */ |
4908 | ncr_free_ccb (np, cp); |
4909 | |
4910 | /* |
4911 | ** requeue awaiting scsi commands for this lun. |
4912 | */ |
4913 | if (lp && lp->queuedccbs < lp->queuedepth && |
4914 | !list_empty(head: &lp->wait_ccbq)) |
4915 | ncr_start_next_ccb(np, lp, maxn: 2); |
4916 | |
4917 | /* |
4918 | ** requeue awaiting scsi commands for this controller. |
4919 | */ |
4920 | if (np->waiting_list) |
4921 | requeue_waiting_list(np); |
4922 | |
4923 | /* |
4924 | ** signal completion to generic driver. |
4925 | */ |
4926 | ncr_queue_done_cmd(np, cmd); |
4927 | } |
4928 | |
4929 | /*========================================================== |
4930 | ** |
4931 | ** |
4932 | ** Signal all (or one) control block done. |
4933 | ** |
4934 | ** |
4935 | **========================================================== |
4936 | */ |
4937 | |
4938 | /* |
4939 | ** This CCB has been skipped by the NCR. |
4940 | ** Queue it in the corresponding unit queue. |
4941 | */ |
4942 | static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) |
4943 | { |
4944 | struct tcb *tp = &np->target[cp->target]; |
4945 | struct lcb *lp = tp->lp[cp->lun]; |
4946 | |
4947 | if (lp && cp != np->ccb) { |
4948 | cp->host_status &= ~HS_SKIPMASK; |
4949 | cp->start.schedule.l_paddr = |
4950 | cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
4951 | list_move_tail(list: &cp->link_ccbq, head: &lp->skip_ccbq); |
4952 | if (cp->queued) { |
4953 | --lp->queuedccbs; |
4954 | } |
4955 | } |
4956 | if (cp->queued) { |
4957 | --np->queuedccbs; |
4958 | cp->queued = 0; |
4959 | } |
4960 | } |
4961 | |
4962 | /* |
4963 | ** The NCR has completed CCBs. |
4964 | ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs |
4965 | */ |
4966 | void ncr_wakeup_done (struct ncb *np) |
4967 | { |
4968 | struct ccb *cp; |
4969 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
4970 | int i, j; |
4971 | |
4972 | i = np->ccb_done_ic; |
4973 | while (1) { |
4974 | j = i+1; |
4975 | if (j >= MAX_DONE) |
4976 | j = 0; |
4977 | |
4978 | cp = np->ccb_done[j]; |
4979 | if (!CCB_DONE_VALID(cp)) |
4980 | break; |
4981 | |
4982 | np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; |
4983 | np->scripth->done_queue[5*j + 4] = |
4984 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); |
4985 | MEMORY_BARRIER(); |
4986 | np->scripth->done_queue[5*i + 4] = |
4987 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); |
4988 | |
4989 | if (cp->host_status & HS_DONEMASK) |
4990 | ncr_complete (np, cp); |
4991 | else if (cp->host_status & HS_SKIPMASK) |
4992 | ncr_ccb_skipped (np, cp); |
4993 | |
4994 | i = j; |
4995 | } |
4996 | np->ccb_done_ic = i; |
4997 | #else |
4998 | cp = np->ccb; |
4999 | while (cp) { |
5000 | if (cp->host_status & HS_DONEMASK) |
5001 | ncr_complete (np, cp); |
5002 | else if (cp->host_status & HS_SKIPMASK) |
5003 | ncr_ccb_skipped (np, cp); |
5004 | cp = cp->link_ccb; |
5005 | } |
5006 | #endif |
5007 | } |
5008 | |
5009 | /* |
5010 | ** Complete all active CCBs. |
5011 | */ |
5012 | void ncr_wakeup (struct ncb *np, u_long code) |
5013 | { |
5014 | struct ccb *cp = np->ccb; |
5015 | |
5016 | while (cp) { |
5017 | if (cp->host_status != HS_IDLE) { |
5018 | cp->host_status = code; |
5019 | ncr_complete (np, cp); |
5020 | } |
5021 | cp = cp->link_ccb; |
5022 | } |
5023 | } |
5024 | |
5025 | /* |
5026 | ** Reset ncr chip. |
5027 | */ |
5028 | |
5029 | /* Some initialisation must be done immediately following reset, for 53c720, |
5030 | * at least. EA (dcntl bit 5) isn't set here as it is set once only in |
5031 | * the _detect function. |
5032 | */ |
5033 | static void ncr_chip_reset(struct ncb *np, int delay) |
5034 | { |
5035 | OUTB (nc_istat, SRST); |
5036 | udelay(delay); |
5037 | OUTB (nc_istat, 0 ); |
5038 | |
5039 | if (np->features & FE_EHP) |
5040 | OUTB (nc_ctest0, EHP); |
5041 | if (np->features & FE_MUX) |
5042 | OUTB (nc_ctest4, MUX); |
5043 | } |
5044 | |
5045 | |
5046 | /*========================================================== |
5047 | ** |
5048 | ** |
5049 | ** Start NCR chip. |
5050 | ** |
5051 | ** |
5052 | **========================================================== |
5053 | */ |
5054 | |
5055 | void ncr_init (struct ncb *np, int reset, char * msg, u_long code) |
5056 | { |
5057 | int i; |
5058 | |
5059 | /* |
5060 | ** Reset chip if asked, otherwise just clear fifos. |
5061 | */ |
5062 | |
5063 | if (reset) { |
5064 | OUTB (nc_istat, SRST); |
5065 | udelay(100); |
5066 | } |
5067 | else { |
5068 | OUTB (nc_stest3, TE|CSF); |
5069 | OUTONB (nc_ctest3, CLF); |
5070 | } |
5071 | |
5072 | /* |
5073 | ** Message. |
5074 | */ |
5075 | |
5076 | if (msg) printk (KERN_INFO "%s: restart (%s).\n" , ncr_name (np), msg); |
5077 | |
5078 | /* |
5079 | ** Clear Start Queue |
5080 | */ |
5081 | np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ |
5082 | for (i = 1; i < MAX_START + MAX_START; i += 2) |
5083 | np->scripth0->tryloop[i] = |
5084 | cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
5085 | |
5086 | /* |
5087 | ** Start at first entry. |
5088 | */ |
5089 | np->squeueput = 0; |
5090 | np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); |
5091 | |
5092 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
5093 | /* |
5094 | ** Clear Done Queue |
5095 | */ |
5096 | for (i = 0; i < MAX_DONE; i++) { |
5097 | np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; |
5098 | np->scripth0->done_queue[5*i + 4] = |
5099 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); |
5100 | } |
5101 | #endif |
5102 | |
5103 | /* |
5104 | ** Start at first entry. |
5105 | */ |
5106 | np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); |
5107 | np->ccb_done_ic = MAX_DONE-1; |
5108 | np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = |
5109 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); |
5110 | |
5111 | /* |
5112 | ** Wakeup all pending jobs. |
5113 | */ |
5114 | ncr_wakeup (np, code); |
5115 | |
5116 | /* |
5117 | ** Init chip. |
5118 | */ |
5119 | |
5120 | /* |
5121 | ** Remove reset; big delay because the 895 needs time for the |
5122 | ** bus mode to settle |
5123 | */ |
5124 | ncr_chip_reset(np, delay: 2000); |
5125 | |
5126 | OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); |
5127 | /* full arb., ena parity, par->ATN */ |
5128 | OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ |
5129 | |
5130 | ncr_selectclock(np, scntl3: np->rv_scntl3); /* Select SCSI clock */ |
5131 | |
5132 | OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ |
5133 | OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ |
5134 | OUTB (nc_istat , SIGP ); /* Signal Process */ |
5135 | OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ |
5136 | OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ |
5137 | |
5138 | OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ |
5139 | OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ |
5140 | OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ |
5141 | OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ |
5142 | |
5143 | OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ |
5144 | OUTB (nc_stest3, TE); /* TolerANT enable */ |
5145 | OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ |
5146 | |
5147 | /* |
5148 | ** Disable disconnects. |
5149 | */ |
5150 | |
5151 | np->disc = 0; |
5152 | |
5153 | /* |
5154 | ** Enable GPIO0 pin for writing if LED support. |
5155 | */ |
5156 | |
5157 | if (np->features & FE_LED0) { |
5158 | OUTOFFB (nc_gpcntl, 0x01); |
5159 | } |
5160 | |
5161 | /* |
5162 | ** enable ints |
5163 | */ |
5164 | |
5165 | OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); |
5166 | OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); |
5167 | |
5168 | /* |
5169 | ** Fill in target structure. |
5170 | ** Reinitialize usrsync. |
5171 | ** Reinitialize usrwide. |
5172 | ** Prepare sync negotiation according to actual SCSI bus mode. |
5173 | */ |
5174 | |
5175 | for (i=0;i<MAX_TARGET;i++) { |
5176 | struct tcb *tp = &np->target[i]; |
5177 | |
5178 | tp->sval = 0; |
5179 | tp->wval = np->rv_scntl3; |
5180 | |
5181 | if (tp->usrsync != 255) { |
5182 | if (tp->usrsync <= np->maxsync) { |
5183 | if (tp->usrsync < np->minsync) { |
5184 | tp->usrsync = np->minsync; |
5185 | } |
5186 | } |
5187 | else |
5188 | tp->usrsync = 255; |
5189 | } |
5190 | |
5191 | if (tp->usrwide > np->maxwide) |
5192 | tp->usrwide = np->maxwide; |
5193 | |
5194 | } |
5195 | |
5196 | /* |
5197 | ** Start script processor. |
5198 | */ |
5199 | if (np->paddr2) { |
5200 | if (bootverbose) |
5201 | printk ("%s: Downloading SCSI SCRIPTS.\n" , |
5202 | ncr_name(np)); |
5203 | OUTL (nc_scratcha, vtobus(np->script0)); |
5204 | OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); |
5205 | } |
5206 | else |
5207 | OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); |
5208 | } |
5209 | |
5210 | /*========================================================== |
5211 | ** |
5212 | ** Prepare the negotiation values for wide and |
5213 | ** synchronous transfers. |
5214 | ** |
5215 | **========================================================== |
5216 | */ |
5217 | |
5218 | static void ncr_negotiate (struct ncb* np, struct tcb* tp) |
5219 | { |
5220 | /* |
5221 | ** minsync unit is 4ns ! |
5222 | */ |
5223 | |
5224 | u_long minsync = tp->usrsync; |
5225 | |
5226 | /* |
5227 | ** SCSI bus mode limit |
5228 | */ |
5229 | |
5230 | if (np->scsi_mode && np->scsi_mode == SMODE_SE) { |
5231 | if (minsync < 12) minsync = 12; |
5232 | } |
5233 | |
5234 | /* |
5235 | ** our limit .. |
5236 | */ |
5237 | |
5238 | if (minsync < np->minsync) |
5239 | minsync = np->minsync; |
5240 | |
5241 | /* |
5242 | ** divider limit |
5243 | */ |
5244 | |
5245 | if (minsync > np->maxsync) |
5246 | minsync = 255; |
5247 | |
5248 | if (tp->maxoffs > np->maxoffs) |
5249 | tp->maxoffs = np->maxoffs; |
5250 | |
5251 | tp->minsync = minsync; |
5252 | tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); |
5253 | |
5254 | /* |
5255 | ** period=0: has to negotiate sync transfer |
5256 | */ |
5257 | |
5258 | tp->period=0; |
5259 | |
5260 | /* |
5261 | ** widedone=0: has to negotiate wide transfer |
5262 | */ |
5263 | tp->widedone=0; |
5264 | } |
5265 | |
5266 | /*========================================================== |
5267 | ** |
5268 | ** Get clock factor and sync divisor for a given |
5269 | ** synchronous factor period. |
5270 | ** Returns the clock factor (in sxfer) and scntl3 |
5271 | ** synchronous divisor field. |
5272 | ** |
5273 | **========================================================== |
5274 | */ |
5275 | |
5276 | static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) |
5277 | { |
5278 | u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ |
5279 | int div = np->clock_divn; /* Number of divisors supported */ |
5280 | u_long fak; /* Sync factor in sxfer */ |
5281 | u_long per; /* Period in tenths of ns */ |
5282 | u_long kpc; /* (per * clk) */ |
5283 | |
5284 | /* |
5285 | ** Compute the synchronous period in tenths of nano-seconds |
5286 | */ |
5287 | if (sfac <= 10) per = 250; |
5288 | else if (sfac == 11) per = 303; |
5289 | else if (sfac == 12) per = 500; |
5290 | else per = 40 * sfac; |
5291 | |
5292 | /* |
5293 | ** Look for the greatest clock divisor that allows an |
5294 | ** input speed faster than the period. |
5295 | */ |
5296 | kpc = per * clk; |
5297 | while (--div > 0) |
5298 | if (kpc >= (div_10M[div] << 2)) break; |
5299 | |
5300 | /* |
5301 | ** Calculate the lowest clock factor that allows an output |
5302 | ** speed not faster than the period. |
5303 | */ |
5304 | fak = (kpc - 1) / div_10M[div] + 1; |
5305 | |
5306 | if (fak < 4) fak = 4; /* Should never happen, too bad ... */ |
5307 | |
5308 | /* |
5309 | ** Compute and return sync parameters for the ncr |
5310 | */ |
5311 | *fakp = fak - 4; |
5312 | *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); |
5313 | } |
5314 | |
5315 | |
5316 | /*========================================================== |
5317 | ** |
5318 | ** Set actual values, sync status and patch all ccbs of |
5319 | ** a target according to new sync/wide agreement. |
5320 | ** |
5321 | **========================================================== |
5322 | */ |
5323 | |
5324 | static void ncr_set_sync_wide_status (struct ncb *np, u_char target) |
5325 | { |
5326 | struct ccb *cp; |
5327 | struct tcb *tp = &np->target[target]; |
5328 | |
5329 | /* |
5330 | ** set actual value and sync_status |
5331 | */ |
5332 | OUTB (nc_sxfer, tp->sval); |
5333 | np->sync_st = tp->sval; |
5334 | OUTB (nc_scntl3, tp->wval); |
5335 | np->wide_st = tp->wval; |
5336 | |
5337 | /* |
5338 | ** patch ALL ccbs of this target. |
5339 | */ |
5340 | for (cp = np->ccb; cp; cp = cp->link_ccb) { |
5341 | if (!cp->cmd) continue; |
5342 | if (scmd_id(cp->cmd) != target) continue; |
5343 | cp->phys.select.sel_scntl3 = tp->wval; |
5344 | cp->phys.select.sel_sxfer = tp->sval; |
5345 | } |
5346 | } |
5347 | |
5348 | /*========================================================== |
5349 | ** |
5350 | ** Switch sync mode for current job and it's target |
5351 | ** |
5352 | **========================================================== |
5353 | */ |
5354 | |
5355 | static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) |
5356 | { |
5357 | struct scsi_cmnd *cmd = cp->cmd; |
5358 | struct tcb *tp; |
5359 | u_char target = INB (nc_sdid) & 0x0f; |
5360 | u_char idiv; |
5361 | |
5362 | BUG_ON(target != (scmd_id(cmd) & 0xf)); |
5363 | |
5364 | tp = &np->target[target]; |
5365 | |
5366 | if (!scntl3 || !(sxfer & 0x1f)) |
5367 | scntl3 = np->rv_scntl3; |
5368 | scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); |
5369 | |
5370 | /* |
5371 | ** Deduce the value of controller sync period from scntl3. |
5372 | ** period is in tenths of nano-seconds. |
5373 | */ |
5374 | |
5375 | idiv = ((scntl3 >> 4) & 0x7); |
5376 | if ((sxfer & 0x1f) && idiv) |
5377 | tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; |
5378 | else |
5379 | tp->period = 0xffff; |
5380 | |
5381 | /* Stop there if sync parameters are unchanged */ |
5382 | if (tp->sval == sxfer && tp->wval == scntl3) |
5383 | return; |
5384 | tp->sval = sxfer; |
5385 | tp->wval = scntl3; |
5386 | |
5387 | if (sxfer & 0x01f) { |
5388 | /* Disable extended Sreq/Sack filtering */ |
5389 | if (tp->period <= 2000) |
5390 | OUTOFFB(nc_stest2, EXT); |
5391 | } |
5392 | |
5393 | spi_display_xfer_agreement(tp->starget); |
5394 | |
5395 | /* |
5396 | ** set actual value and sync_status |
5397 | ** patch ALL ccbs of this target. |
5398 | */ |
5399 | ncr_set_sync_wide_status(np, target); |
5400 | } |
5401 | |
5402 | /*========================================================== |
5403 | ** |
5404 | ** Switch wide mode for current job and it's target |
5405 | ** SCSI specs say: a SCSI device that accepts a WDTR |
5406 | ** message shall reset the synchronous agreement to |
5407 | ** asynchronous mode. |
5408 | ** |
5409 | **========================================================== |
5410 | */ |
5411 | |
5412 | static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) |
5413 | { |
5414 | struct scsi_cmnd *cmd = cp->cmd; |
5415 | u16 target = INB (nc_sdid) & 0x0f; |
5416 | struct tcb *tp; |
5417 | u_char scntl3; |
5418 | u_char sxfer; |
5419 | |
5420 | BUG_ON(target != (scmd_id(cmd) & 0xf)); |
5421 | |
5422 | tp = &np->target[target]; |
5423 | tp->widedone = wide+1; |
5424 | scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); |
5425 | |
5426 | sxfer = ack ? 0 : tp->sval; |
5427 | |
5428 | /* |
5429 | ** Stop there if sync/wide parameters are unchanged |
5430 | */ |
5431 | if (tp->sval == sxfer && tp->wval == scntl3) return; |
5432 | tp->sval = sxfer; |
5433 | tp->wval = scntl3; |
5434 | |
5435 | /* |
5436 | ** Bells and whistles ;-) |
5437 | */ |
5438 | if (bootverbose >= 2) { |
5439 | dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n" , |
5440 | (scntl3 & EWS) ? "en" : "dis" ); |
5441 | } |
5442 | |
5443 | /* |
5444 | ** set actual value and sync_status |
5445 | ** patch ALL ccbs of this target. |
5446 | */ |
5447 | ncr_set_sync_wide_status(np, target); |
5448 | } |
5449 | |
5450 | /*========================================================== |
5451 | ** |
5452 | ** Switch tagged mode for a target. |
5453 | ** |
5454 | **========================================================== |
5455 | */ |
5456 | |
5457 | static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) |
5458 | { |
5459 | unsigned char tn = sdev->id, ln = sdev->lun; |
5460 | struct tcb *tp = &np->target[tn]; |
5461 | struct lcb *lp = tp->lp[ln]; |
5462 | u_char reqtags, maxdepth; |
5463 | |
5464 | /* |
5465 | ** Just in case ... |
5466 | */ |
5467 | if ((!tp) || (!lp) || !sdev) |
5468 | return; |
5469 | |
5470 | /* |
5471 | ** If SCSI device queue depth is not yet set, leave here. |
5472 | */ |
5473 | if (!lp->scdev_depth) |
5474 | return; |
5475 | |
5476 | /* |
5477 | ** Donnot allow more tags than the SCSI driver can queue |
5478 | ** for this device. |
5479 | ** Donnot allow more tags than we can handle. |
5480 | */ |
5481 | maxdepth = lp->scdev_depth; |
5482 | if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; |
5483 | if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; |
5484 | if (lp->numtags > maxdepth) lp->numtags = maxdepth; |
5485 | |
5486 | /* |
5487 | ** only devices conformant to ANSI Version >= 2 |
5488 | ** only devices capable of tagged commands |
5489 | ** only if enabled by user .. |
5490 | */ |
5491 | if (sdev->tagged_supported && lp->numtags > 1) { |
5492 | reqtags = lp->numtags; |
5493 | } else { |
5494 | reqtags = 1; |
5495 | } |
5496 | |
5497 | /* |
5498 | ** Update max number of tags |
5499 | */ |
5500 | lp->numtags = reqtags; |
5501 | if (lp->numtags > lp->maxtags) |
5502 | lp->maxtags = lp->numtags; |
5503 | |
5504 | /* |
5505 | ** If we want to switch tag mode, we must wait |
5506 | ** for no CCB to be active. |
5507 | */ |
5508 | if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ |
5509 | if (lp->queuedepth == reqtags) /* Already announced */ |
5510 | return; |
5511 | lp->queuedepth = reqtags; |
5512 | } |
5513 | else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ |
5514 | lp->queuedepth = reqtags; |
5515 | return; |
5516 | } |
5517 | else { /* Want to switch tag mode */ |
5518 | if (lp->busyccbs) /* If not yet safe, return */ |
5519 | return; |
5520 | lp->queuedepth = reqtags; |
5521 | lp->usetags = reqtags > 1 ? 1 : 0; |
5522 | } |
5523 | |
5524 | /* |
5525 | ** Patch the lun mini-script, according to tag mode. |
5526 | */ |
5527 | lp->jump_tag.l_paddr = lp->usetags? |
5528 | cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : |
5529 | cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); |
5530 | |
5531 | /* |
5532 | ** Announce change to user. |
5533 | */ |
5534 | if (bootverbose) { |
5535 | if (lp->usetags) { |
5536 | dev_info(&sdev->sdev_gendev, |
5537 | "tagged command queue depth set to %d\n" , |
5538 | reqtags); |
5539 | } else { |
5540 | dev_info(&sdev->sdev_gendev, |
5541 | "tagged command queueing disabled\n" ); |
5542 | } |
5543 | } |
5544 | } |
5545 | |
5546 | /*========================================================== |
5547 | ** |
5548 | ** |
5549 | ** ncr timeout handler. |
5550 | ** |
5551 | ** |
5552 | **========================================================== |
5553 | ** |
5554 | ** Misused to keep the driver running when |
5555 | ** interrupts are not configured correctly. |
5556 | ** |
5557 | **---------------------------------------------------------- |
5558 | */ |
5559 | |
5560 | static void ncr_timeout (struct ncb *np) |
5561 | { |
5562 | u_long thistime = jiffies; |
5563 | |
5564 | /* |
5565 | ** If release process in progress, let's go |
5566 | ** Set the release stage from 1 to 2 to synchronize |
5567 | ** with the release process. |
5568 | */ |
5569 | |
5570 | if (np->release_stage) { |
5571 | if (np->release_stage == 1) np->release_stage = 2; |
5572 | return; |
5573 | } |
5574 | |
5575 | np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; |
5576 | add_timer(timer: &np->timer); |
5577 | |
5578 | /* |
5579 | ** If we are resetting the ncr, wait for settle_time before |
5580 | ** clearing it. Then command processing will be resumed. |
5581 | */ |
5582 | if (np->settle_time) { |
5583 | if (np->settle_time <= thistime) { |
5584 | if (bootverbose > 1) |
5585 | printk("%s: command processing resumed\n" , ncr_name(np)); |
5586 | np->settle_time = 0; |
5587 | np->disc = 1; |
5588 | requeue_waiting_list(np); |
5589 | } |
5590 | return; |
5591 | } |
5592 | |
5593 | /* |
5594 | ** Since the generic scsi driver only allows us 0.5 second |
5595 | ** to perform abort of a command, we must look at ccbs about |
5596 | ** every 0.25 second. |
5597 | */ |
5598 | if (np->lasttime + 4*HZ < thistime) { |
5599 | /* |
5600 | ** block ncr interrupts |
5601 | */ |
5602 | np->lasttime = thistime; |
5603 | } |
5604 | |
5605 | #ifdef SCSI_NCR_BROKEN_INTR |
5606 | if (INB(nc_istat) & (INTF|SIP|DIP)) { |
5607 | |
5608 | /* |
5609 | ** Process pending interrupts. |
5610 | */ |
5611 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("{" ); |
5612 | ncr_exception (np); |
5613 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("}" ); |
5614 | } |
5615 | #endif /* SCSI_NCR_BROKEN_INTR */ |
5616 | } |
5617 | |
5618 | /*========================================================== |
5619 | ** |
5620 | ** log message for real hard errors |
5621 | ** |
5622 | ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." |
5623 | ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." |
5624 | ** |
5625 | ** exception register: |
5626 | ** ds: dstat |
5627 | ** si: sist |
5628 | ** |
5629 | ** SCSI bus lines: |
5630 | ** so: control lines as driver by NCR. |
5631 | ** si: control lines as seen by NCR. |
5632 | ** sd: scsi data lines as seen by NCR. |
5633 | ** |
5634 | ** wide/fastmode: |
5635 | ** sxfer: (see the manual) |
5636 | ** scntl3: (see the manual) |
5637 | ** |
5638 | ** current script command: |
5639 | ** dsp: script address (relative to start of script). |
5640 | ** dbc: first word of script command. |
5641 | ** |
5642 | ** First 16 register of the chip: |
5643 | ** r0..rf |
5644 | ** |
5645 | **========================================================== |
5646 | */ |
5647 | |
5648 | static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) |
5649 | { |
5650 | u32 dsp; |
5651 | int script_ofs; |
5652 | int script_size; |
5653 | char *script_name; |
5654 | u_char *script_base; |
5655 | int i; |
5656 | |
5657 | dsp = INL (nc_dsp); |
5658 | |
5659 | if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { |
5660 | script_ofs = dsp - np->p_script; |
5661 | script_size = sizeof(struct script); |
5662 | script_base = (u_char *) np->script0; |
5663 | script_name = "script" ; |
5664 | } |
5665 | else if (np->p_scripth < dsp && |
5666 | dsp <= np->p_scripth + sizeof(struct scripth)) { |
5667 | script_ofs = dsp - np->p_scripth; |
5668 | script_size = sizeof(struct scripth); |
5669 | script_base = (u_char *) np->scripth0; |
5670 | script_name = "scripth" ; |
5671 | } else { |
5672 | script_ofs = dsp; |
5673 | script_size = 0; |
5674 | script_base = NULL; |
5675 | script_name = "mem" ; |
5676 | } |
5677 | |
5678 | printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n" , |
5679 | ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, |
5680 | (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), |
5681 | (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, |
5682 | (unsigned)INL (nc_dbc)); |
5683 | |
5684 | if (((script_ofs & 3) == 0) && |
5685 | (unsigned)script_ofs < script_size) { |
5686 | printk ("%s: script cmd = %08x\n" , ncr_name(np), |
5687 | scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); |
5688 | } |
5689 | |
5690 | printk ("%s: regdump:" , ncr_name(np)); |
5691 | for (i=0; i<16;i++) |
5692 | printk (" %02x" , (unsigned)INB_OFF(i)); |
5693 | printk (".\n" ); |
5694 | } |
5695 | |
5696 | /*============================================================ |
5697 | ** |
5698 | ** ncr chip exception handler. |
5699 | ** |
5700 | **============================================================ |
5701 | ** |
5702 | ** In normal cases, interrupt conditions occur one at a |
5703 | ** time. The ncr is able to stack in some extra registers |
5704 | ** other interrupts that will occur after the first one. |
5705 | ** But, several interrupts may occur at the same time. |
5706 | ** |
5707 | ** We probably should only try to deal with the normal |
5708 | ** case, but it seems that multiple interrupts occur in |
5709 | ** some cases that are not abnormal at all. |
5710 | ** |
5711 | ** The most frequent interrupt condition is Phase Mismatch. |
5712 | ** We should want to service this interrupt quickly. |
5713 | ** A SCSI parity error may be delivered at the same time. |
5714 | ** The SIR interrupt is not very frequent in this driver, |
5715 | ** since the INTFLY is likely used for command completion |
5716 | ** signaling. |
5717 | ** The Selection Timeout interrupt may be triggered with |
5718 | ** IID and/or UDC. |
5719 | ** The SBMC interrupt (SCSI Bus Mode Change) may probably |
5720 | ** occur at any time. |
5721 | ** |
5722 | ** This handler try to deal as cleverly as possible with all |
5723 | ** the above. |
5724 | ** |
5725 | **============================================================ |
5726 | */ |
5727 | |
5728 | void ncr_exception (struct ncb *np) |
5729 | { |
5730 | u_char istat, dstat; |
5731 | u16 sist; |
5732 | int i; |
5733 | |
5734 | /* |
5735 | ** interrupt on the fly ? |
5736 | ** Since the global header may be copied back to a CCB |
5737 | ** using a posted PCI memory write, the last operation on |
5738 | ** the istat register is a READ in order to flush posted |
5739 | ** PCI write commands. |
5740 | */ |
5741 | istat = INB (nc_istat); |
5742 | if (istat & INTF) { |
5743 | OUTB (nc_istat, (istat & SIGP) | INTF); |
5744 | istat = INB (nc_istat); |
5745 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("F " ); |
5746 | ncr_wakeup_done (np); |
5747 | } |
5748 | |
5749 | if (!(istat & (SIP|DIP))) |
5750 | return; |
5751 | |
5752 | if (istat & CABRT) |
5753 | OUTB (nc_istat, CABRT); |
5754 | |
5755 | /* |
5756 | ** Steinbach's Guideline for Systems Programming: |
5757 | ** Never test for an error condition you don't know how to handle. |
5758 | */ |
5759 | |
5760 | sist = (istat & SIP) ? INW (nc_sist) : 0; |
5761 | dstat = (istat & DIP) ? INB (nc_dstat) : 0; |
5762 | |
5763 | if (DEBUG_FLAGS & DEBUG_TINY) |
5764 | printk ("<%d|%x:%x|%x:%x>" , |
5765 | (int)INB(nc_scr0), |
5766 | dstat,sist, |
5767 | (unsigned)INL(nc_dsp), |
5768 | (unsigned)INL(nc_dbc)); |
5769 | |
5770 | /*======================================================== |
5771 | ** First, interrupts we want to service cleanly. |
5772 | ** |
5773 | ** Phase mismatch is the most frequent interrupt, and |
5774 | ** so we have to service it as quickly and as cleanly |
5775 | ** as possible. |
5776 | ** Programmed interrupts are rarely used in this driver, |
5777 | ** but we must handle them cleanly anyway. |
5778 | ** We try to deal with PAR and SBMC combined with |
5779 | ** some other interrupt(s). |
5780 | **========================================================= |
5781 | */ |
5782 | |
5783 | if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && |
5784 | !(dstat & (MDPE|BF|ABRT|IID))) { |
5785 | if ((sist & SBMC) && ncr_int_sbmc (np)) |
5786 | return; |
5787 | if ((sist & PAR) && ncr_int_par (np)) |
5788 | return; |
5789 | if (sist & MA) { |
5790 | ncr_int_ma (np); |
5791 | return; |
5792 | } |
5793 | if (dstat & SIR) { |
5794 | ncr_int_sir (np); |
5795 | return; |
5796 | } |
5797 | /* |
5798 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. |
5799 | */ |
5800 | if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { |
5801 | printk( "%s: unknown interrupt(s) ignored, " |
5802 | "ISTAT=%x DSTAT=%x SIST=%x\n" , |
5803 | ncr_name(np), istat, dstat, sist); |
5804 | return; |
5805 | } |
5806 | OUTONB_STD (); |
5807 | return; |
5808 | } |
5809 | |
5810 | /*======================================================== |
5811 | ** Now, interrupts that need some fixing up. |
5812 | ** Order and multiple interrupts is so less important. |
5813 | ** |
5814 | ** If SRST has been asserted, we just reset the chip. |
5815 | ** |
5816 | ** Selection is intirely handled by the chip. If the |
5817 | ** chip says STO, we trust it. Seems some other |
5818 | ** interrupts may occur at the same time (UDC, IID), so |
5819 | ** we ignore them. In any case we do enough fix-up |
5820 | ** in the service routine. |
5821 | ** We just exclude some fatal dma errors. |
5822 | **========================================================= |
5823 | */ |
5824 | |
5825 | if (sist & RST) { |
5826 | ncr_init (np, reset: 1, bootverbose ? "scsi reset" : NULL, HS_RESET); |
5827 | return; |
5828 | } |
5829 | |
5830 | if ((sist & STO) && |
5831 | !(dstat & (MDPE|BF|ABRT))) { |
5832 | /* |
5833 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. |
5834 | */ |
5835 | OUTONB (nc_ctest3, CLF); |
5836 | |
5837 | ncr_int_sto (np); |
5838 | return; |
5839 | } |
5840 | |
5841 | /*========================================================= |
5842 | ** Now, interrupts we are not able to recover cleanly. |
5843 | ** (At least for the moment). |
5844 | ** |
5845 | ** Do the register dump. |
5846 | ** Log message for real hard errors. |
5847 | ** Clear all fifos. |
5848 | ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the |
5849 | ** BUS and the chip. |
5850 | ** We are more soft for UDC. |
5851 | **========================================================= |
5852 | */ |
5853 | |
5854 | if (time_after(jiffies, np->regtime)) { |
5855 | np->regtime = jiffies + 10*HZ; |
5856 | for (i = 0; i<sizeof(np->regdump); i++) |
5857 | ((char*)&np->regdump)[i] = INB_OFF(i); |
5858 | np->regdump.nc_dstat = dstat; |
5859 | np->regdump.nc_sist = sist; |
5860 | } |
5861 | |
5862 | ncr_log_hard_error(np, sist, dstat); |
5863 | |
5864 | printk ("%s: have to clear fifos.\n" , ncr_name (np)); |
5865 | OUTB (nc_stest3, TE|CSF); |
5866 | OUTONB (nc_ctest3, CLF); |
5867 | |
5868 | if ((sist & (SGE)) || |
5869 | (dstat & (MDPE|BF|ABRT|IID))) { |
5870 | ncr_start_reset(np); |
5871 | return; |
5872 | } |
5873 | |
5874 | if (sist & HTH) { |
5875 | printk ("%s: handshake timeout\n" , ncr_name(np)); |
5876 | ncr_start_reset(np); |
5877 | return; |
5878 | } |
5879 | |
5880 | if (sist & UDC) { |
5881 | printk ("%s: unexpected disconnect\n" , ncr_name(np)); |
5882 | OUTB (HS_PRT, HS_UNEXPECTED); |
5883 | OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); |
5884 | return; |
5885 | } |
5886 | |
5887 | /*========================================================= |
5888 | ** We just miss the cause of the interrupt. :( |
5889 | ** Print a message. The timeout will do the real work. |
5890 | **========================================================= |
5891 | */ |
5892 | printk ("%s: unknown interrupt\n" , ncr_name(np)); |
5893 | } |
5894 | |
5895 | /*========================================================== |
5896 | ** |
5897 | ** ncr chip exception handler for selection timeout |
5898 | ** |
5899 | **========================================================== |
5900 | ** |
5901 | ** There seems to be a bug in the 53c810. |
5902 | ** Although a STO-Interrupt is pending, |
5903 | ** it continues executing script commands. |
5904 | ** But it will fail and interrupt (IID) on |
5905 | ** the next instruction where it's looking |
5906 | ** for a valid phase. |
5907 | ** |
5908 | **---------------------------------------------------------- |
5909 | */ |
5910 | |
5911 | void ncr_int_sto (struct ncb *np) |
5912 | { |
5913 | u_long dsa; |
5914 | struct ccb *cp; |
5915 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("T" ); |
5916 | |
5917 | /* |
5918 | ** look for ccb and set the status. |
5919 | */ |
5920 | |
5921 | dsa = INL (nc_dsa); |
5922 | cp = np->ccb; |
5923 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
5924 | cp = cp->link_ccb; |
5925 | |
5926 | if (cp) { |
5927 | cp-> host_status = HS_SEL_TIMEOUT; |
5928 | ncr_complete (np, cp); |
5929 | } |
5930 | |
5931 | /* |
5932 | ** repair start queue and jump to start point. |
5933 | */ |
5934 | |
5935 | OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); |
5936 | return; |
5937 | } |
5938 | |
5939 | /*========================================================== |
5940 | ** |
5941 | ** ncr chip exception handler for SCSI bus mode change |
5942 | ** |
5943 | **========================================================== |
5944 | ** |
5945 | ** spi2-r12 11.2.3 says a transceiver mode change must |
5946 | ** generate a reset event and a device that detects a reset |
5947 | ** event shall initiate a hard reset. It says also that a |
5948 | ** device that detects a mode change shall set data transfer |
5949 | ** mode to eight bit asynchronous, etc... |
5950 | ** So, just resetting should be enough. |
5951 | ** |
5952 | ** |
5953 | **---------------------------------------------------------- |
5954 | */ |
5955 | |
5956 | static int ncr_int_sbmc (struct ncb *np) |
5957 | { |
5958 | u_char scsi_mode = INB (nc_stest4) & SMODE; |
5959 | |
5960 | if (scsi_mode != np->scsi_mode) { |
5961 | printk("%s: SCSI bus mode change from %x to %x.\n" , |
5962 | ncr_name(np), np->scsi_mode, scsi_mode); |
5963 | |
5964 | np->scsi_mode = scsi_mode; |
5965 | |
5966 | |
5967 | /* |
5968 | ** Suspend command processing for 1 second and |
5969 | ** reinitialize all except the chip. |
5970 | */ |
5971 | np->settle_time = jiffies + HZ; |
5972 | ncr_init (np, reset: 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); |
5973 | return 1; |
5974 | } |
5975 | return 0; |
5976 | } |
5977 | |
5978 | /*========================================================== |
5979 | ** |
5980 | ** ncr chip exception handler for SCSI parity error. |
5981 | ** |
5982 | **========================================================== |
5983 | ** |
5984 | ** |
5985 | **---------------------------------------------------------- |
5986 | */ |
5987 | |
5988 | static int ncr_int_par (struct ncb *np) |
5989 | { |
5990 | u_char hsts = INB (HS_PRT); |
5991 | u32 dbc = INL (nc_dbc); |
5992 | u_char sstat1 = INB (nc_sstat1); |
5993 | int phase = -1; |
5994 | int msg = -1; |
5995 | u32 jmp; |
5996 | |
5997 | printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n" , |
5998 | ncr_name(np), hsts, dbc, sstat1); |
5999 | |
6000 | /* |
6001 | * Ignore the interrupt if the NCR is not connected |
6002 | * to the SCSI bus, since the right work should have |
6003 | * been done on unexpected disconnection handling. |
6004 | */ |
6005 | if (!(INB (nc_scntl1) & ISCON)) |
6006 | return 0; |
6007 | |
6008 | /* |
6009 | * If the nexus is not clearly identified, reset the bus. |
6010 | * We will try to do better later. |
6011 | */ |
6012 | if (hsts & HS_INVALMASK) |
6013 | goto reset_all; |
6014 | |
6015 | /* |
6016 | * If the SCSI parity error occurs in MSG IN phase, prepare a |
6017 | * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED |
6018 | * ERROR message and let the device decide to retry the command |
6019 | * or to terminate with check condition. If we were in MSG IN |
6020 | * phase waiting for the response of a negotiation, we will |
6021 | * get SIR_NEGO_FAILED at dispatch. |
6022 | */ |
6023 | if (!(dbc & 0xc0000000)) |
6024 | phase = (dbc >> 24) & 7; |
6025 | if (phase == 7) |
6026 | msg = MSG_PARITY_ERROR; |
6027 | else |
6028 | msg = INITIATOR_ERROR; |
6029 | |
6030 | |
6031 | /* |
6032 | * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a |
6033 | * script that will ignore all data in bytes until phase |
6034 | * change, since we are not sure the chip will wait the phase |
6035 | * change prior to delivering the interrupt. |
6036 | */ |
6037 | if (phase == 1) |
6038 | jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); |
6039 | else |
6040 | jmp = NCB_SCRIPTH_PHYS (np, par_err_other); |
6041 | |
6042 | OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ |
6043 | OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ |
6044 | |
6045 | np->msgout[0] = msg; |
6046 | OUTL_DSP (jmp); |
6047 | return 1; |
6048 | |
6049 | reset_all: |
6050 | ncr_start_reset(np); |
6051 | return 1; |
6052 | } |
6053 | |
6054 | /*========================================================== |
6055 | ** |
6056 | ** |
6057 | ** ncr chip exception handler for phase errors. |
6058 | ** |
6059 | ** |
6060 | **========================================================== |
6061 | ** |
6062 | ** We have to construct a new transfer descriptor, |
6063 | ** to transfer the rest of the current block. |
6064 | ** |
6065 | **---------------------------------------------------------- |
6066 | */ |
6067 | |
6068 | static void ncr_int_ma (struct ncb *np) |
6069 | { |
6070 | u32 dbc; |
6071 | u32 rest; |
6072 | u32 dsp; |
6073 | u32 dsa; |
6074 | u32 nxtdsp; |
6075 | u32 newtmp; |
6076 | u32 *vdsp; |
6077 | u32 oadr, olen; |
6078 | u32 *tblp; |
6079 | ncrcmd *newcmd; |
6080 | u_char cmd, sbcl; |
6081 | struct ccb *cp; |
6082 | |
6083 | dsp = INL (nc_dsp); |
6084 | dbc = INL (nc_dbc); |
6085 | sbcl = INB (nc_sbcl); |
6086 | |
6087 | cmd = dbc >> 24; |
6088 | rest = dbc & 0xffffff; |
6089 | |
6090 | /* |
6091 | ** Take into account dma fifo and various buffers and latches, |
6092 | ** only if the interrupted phase is an OUTPUT phase. |
6093 | */ |
6094 | |
6095 | if ((cmd & 1) == 0) { |
6096 | u_char ctest5, ss0, ss2; |
6097 | u16 delta; |
6098 | |
6099 | ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; |
6100 | if (ctest5 & DFS) |
6101 | delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; |
6102 | else |
6103 | delta=(INB (nc_dfifo) - rest) & 0x7f; |
6104 | |
6105 | /* |
6106 | ** The data in the dma fifo has not been transferred to |
6107 | ** the target -> add the amount to the rest |
6108 | ** and clear the data. |
6109 | ** Check the sstat2 register in case of wide transfer. |
6110 | */ |
6111 | |
6112 | rest += delta; |
6113 | ss0 = INB (nc_sstat0); |
6114 | if (ss0 & OLF) rest++; |
6115 | if (ss0 & ORF) rest++; |
6116 | if (INB(nc_scntl3) & EWS) { |
6117 | ss2 = INB (nc_sstat2); |
6118 | if (ss2 & OLF1) rest++; |
6119 | if (ss2 & ORF1) rest++; |
6120 | } |
6121 | |
6122 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) |
6123 | printk ("P%x%x RL=%d D=%d SS0=%x " , cmd&7, sbcl&7, |
6124 | (unsigned) rest, (unsigned) delta, ss0); |
6125 | |
6126 | } else { |
6127 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) |
6128 | printk ("P%x%x RL=%d " , cmd&7, sbcl&7, rest); |
6129 | } |
6130 | |
6131 | /* |
6132 | ** Clear fifos. |
6133 | */ |
6134 | OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ |
6135 | OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ |
6136 | |
6137 | /* |
6138 | ** locate matching cp. |
6139 | ** if the interrupted phase is DATA IN or DATA OUT, |
6140 | ** trust the global header. |
6141 | */ |
6142 | dsa = INL (nc_dsa); |
6143 | if (!(cmd & 6)) { |
6144 | cp = np->header.cp; |
6145 | if (CCB_PHYS(cp, phys) != dsa) |
6146 | cp = NULL; |
6147 | } else { |
6148 | cp = np->ccb; |
6149 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
6150 | cp = cp->link_ccb; |
6151 | } |
6152 | |
6153 | /* |
6154 | ** try to find the interrupted script command, |
6155 | ** and the address at which to continue. |
6156 | */ |
6157 | vdsp = NULL; |
6158 | nxtdsp = 0; |
6159 | if (dsp > np->p_script && |
6160 | dsp <= np->p_script + sizeof(struct script)) { |
6161 | vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); |
6162 | nxtdsp = dsp; |
6163 | } |
6164 | else if (dsp > np->p_scripth && |
6165 | dsp <= np->p_scripth + sizeof(struct scripth)) { |
6166 | vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); |
6167 | nxtdsp = dsp; |
6168 | } |
6169 | else if (cp) { |
6170 | if (dsp == CCB_PHYS (cp, patch[2])) { |
6171 | vdsp = &cp->patch[0]; |
6172 | nxtdsp = scr_to_cpu(vdsp[3]); |
6173 | } |
6174 | else if (dsp == CCB_PHYS (cp, patch[6])) { |
6175 | vdsp = &cp->patch[4]; |
6176 | nxtdsp = scr_to_cpu(vdsp[3]); |
6177 | } |
6178 | } |
6179 | |
6180 | /* |
6181 | ** log the information |
6182 | */ |
6183 | |
6184 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6185 | printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x " , |
6186 | cp, np->header.cp, |
6187 | (unsigned)dsp, |
6188 | (unsigned)nxtdsp, vdsp, cmd); |
6189 | } |
6190 | |
6191 | /* |
6192 | ** cp=0 means that the DSA does not point to a valid control |
6193 | ** block. This should not happen since we donnot use multi-byte |
6194 | ** move while we are being reselected ot after command complete. |
6195 | ** We are not able to recover from such a phase error. |
6196 | */ |
6197 | if (!cp) { |
6198 | printk ("%s: SCSI phase error fixup: " |
6199 | "CCB already dequeued (0x%08lx)\n" , |
6200 | ncr_name (np), (u_long) np->header.cp); |
6201 | goto reset_all; |
6202 | } |
6203 | |
6204 | /* |
6205 | ** get old startaddress and old length. |
6206 | */ |
6207 | |
6208 | oadr = scr_to_cpu(vdsp[1]); |
6209 | |
6210 | if (cmd & 0x10) { /* Table indirect */ |
6211 | tblp = (u32 *) ((char*) &cp->phys + oadr); |
6212 | olen = scr_to_cpu(tblp[0]); |
6213 | oadr = scr_to_cpu(tblp[1]); |
6214 | } else { |
6215 | tblp = (u32 *) 0; |
6216 | olen = scr_to_cpu(vdsp[0]) & 0xffffff; |
6217 | } |
6218 | |
6219 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6220 | printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n" , |
6221 | (unsigned) (scr_to_cpu(vdsp[0]) >> 24), |
6222 | tblp, |
6223 | (unsigned) olen, |
6224 | (unsigned) oadr); |
6225 | } |
6226 | |
6227 | /* |
6228 | ** check cmd against assumed interrupted script command. |
6229 | */ |
6230 | |
6231 | if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { |
6232 | PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " |
6233 | ">> 24)\n" , cmd, scr_to_cpu(vdsp[0]) >> 24); |
6234 | |
6235 | goto reset_all; |
6236 | } |
6237 | |
6238 | /* |
6239 | ** cp != np->header.cp means that the header of the CCB |
6240 | ** currently being processed has not yet been copied to |
6241 | ** the global header area. That may happen if the device did |
6242 | ** not accept all our messages after having been selected. |
6243 | */ |
6244 | if (cp != np->header.cp) { |
6245 | printk ("%s: SCSI phase error fixup: " |
6246 | "CCB address mismatch (0x%08lx != 0x%08lx)\n" , |
6247 | ncr_name (np), (u_long) cp, (u_long) np->header.cp); |
6248 | } |
6249 | |
6250 | /* |
6251 | ** if old phase not dataphase, leave here. |
6252 | */ |
6253 | |
6254 | if (cmd & 0x06) { |
6255 | PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n" , |
6256 | cmd&7, sbcl&7, (unsigned)olen, |
6257 | (unsigned)oadr, (unsigned)rest); |
6258 | goto unexpected_phase; |
6259 | } |
6260 | |
6261 | /* |
6262 | ** choose the correct patch area. |
6263 | ** if savep points to one, choose the other. |
6264 | */ |
6265 | |
6266 | newcmd = cp->patch; |
6267 | newtmp = CCB_PHYS (cp, patch); |
6268 | if (newtmp == scr_to_cpu(cp->phys.header.savep)) { |
6269 | newcmd = &cp->patch[4]; |
6270 | newtmp = CCB_PHYS (cp, patch[4]); |
6271 | } |
6272 | |
6273 | /* |
6274 | ** fillin the commands |
6275 | */ |
6276 | |
6277 | newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); |
6278 | newcmd[1] = cpu_to_scr(oadr + olen - rest); |
6279 | newcmd[2] = cpu_to_scr(SCR_JUMP); |
6280 | newcmd[3] = cpu_to_scr(nxtdsp); |
6281 | |
6282 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6283 | PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n" , |
6284 | (int) (newcmd - cp->patch), |
6285 | (unsigned)scr_to_cpu(newcmd[0]), |
6286 | (unsigned)scr_to_cpu(newcmd[1]), |
6287 | (unsigned)scr_to_cpu(newcmd[2]), |
6288 | (unsigned)scr_to_cpu(newcmd[3])); |
6289 | } |
6290 | /* |
6291 | ** fake the return address (to the patch). |
6292 | ** and restart script processor at dispatcher. |
6293 | */ |
6294 | OUTL (nc_temp, newtmp); |
6295 | OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); |
6296 | return; |
6297 | |
6298 | /* |
6299 | ** Unexpected phase changes that occurs when the current phase |
6300 | ** is not a DATA IN or DATA OUT phase are due to error conditions. |
6301 | ** Such event may only happen when the SCRIPTS is using a |
6302 | ** multibyte SCSI MOVE. |
6303 | ** |
6304 | ** Phase change Some possible cause |
6305 | ** |
6306 | ** COMMAND --> MSG IN SCSI parity error detected by target. |
6307 | ** COMMAND --> STATUS Bad command or refused by target. |
6308 | ** MSG OUT --> MSG IN Message rejected by target. |
6309 | ** MSG OUT --> COMMAND Bogus target that discards extended |
6310 | ** negotiation messages. |
6311 | ** |
6312 | ** The code below does not care of the new phase and so |
6313 | ** trusts the target. Why to annoy it ? |
6314 | ** If the interrupted phase is COMMAND phase, we restart at |
6315 | ** dispatcher. |
6316 | ** If a target does not get all the messages after selection, |
6317 | ** the code assumes blindly that the target discards extended |
6318 | ** messages and clears the negotiation status. |
6319 | ** If the target does not want all our response to negotiation, |
6320 | ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids |
6321 | ** bloat for such a should_not_happen situation). |
6322 | ** In all other situation, we reset the BUS. |
6323 | ** Are these assumptions reasonable ? (Wait and see ...) |
6324 | */ |
6325 | unexpected_phase: |
6326 | dsp -= 8; |
6327 | nxtdsp = 0; |
6328 | |
6329 | switch (cmd & 7) { |
6330 | case 2: /* COMMAND phase */ |
6331 | nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); |
6332 | break; |
6333 | #if 0 |
6334 | case 3: /* STATUS phase */ |
6335 | nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); |
6336 | break; |
6337 | #endif |
6338 | case 6: /* MSG OUT phase */ |
6339 | np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); |
6340 | if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { |
6341 | cp->host_status = HS_BUSY; |
6342 | nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); |
6343 | } |
6344 | else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || |
6345 | dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { |
6346 | nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); |
6347 | } |
6348 | break; |
6349 | #if 0 |
6350 | case 7: /* MSG IN phase */ |
6351 | nxtdsp = NCB_SCRIPT_PHYS (np, clrack); |
6352 | break; |
6353 | #endif |
6354 | } |
6355 | |
6356 | if (nxtdsp) { |
6357 | OUTL_DSP (nxtdsp); |
6358 | return; |
6359 | } |
6360 | |
6361 | reset_all: |
6362 | ncr_start_reset(np); |
6363 | } |
6364 | |
6365 | |
6366 | static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) |
6367 | { |
6368 | struct scsi_cmnd *cmd = cp->cmd; |
6369 | struct tcb *tp = &np->target[cmd->device->id]; |
6370 | struct lcb *lp = tp->lp[cmd->device->lun]; |
6371 | struct list_head *qp; |
6372 | struct ccb * cp2; |
6373 | int disc_cnt = 0; |
6374 | int busy_cnt = 0; |
6375 | u32 startp; |
6376 | u_char s_status = INB (SS_PRT); |
6377 | |
6378 | /* |
6379 | ** Let the SCRIPTS processor skip all not yet started CCBs, |
6380 | ** and count disconnected CCBs. Since the busy queue is in |
6381 | ** the same order as the chip start queue, disconnected CCBs |
6382 | ** are before cp and busy ones after. |
6383 | */ |
6384 | if (lp) { |
6385 | qp = lp->busy_ccbq.prev; |
6386 | while (qp != &lp->busy_ccbq) { |
6387 | cp2 = list_entry(qp, struct ccb, link_ccbq); |
6388 | qp = qp->prev; |
6389 | ++busy_cnt; |
6390 | if (cp2 == cp) |
6391 | break; |
6392 | cp2->start.schedule.l_paddr = |
6393 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); |
6394 | } |
6395 | lp->held_ccb = cp; /* Requeue when this one completes */ |
6396 | disc_cnt = lp->queuedccbs - busy_cnt; |
6397 | } |
6398 | |
6399 | switch(s_status) { |
6400 | default: /* Just for safety, should never happen */ |
6401 | case SAM_STAT_TASK_SET_FULL: |
6402 | /* |
6403 | ** Decrease number of tags to the number of |
6404 | ** disconnected commands. |
6405 | */ |
6406 | if (!lp) |
6407 | goto out; |
6408 | if (bootverbose >= 1) { |
6409 | PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " |
6410 | "CCBs\n" , busy_cnt, disc_cnt); |
6411 | } |
6412 | if (disc_cnt < lp->numtags) { |
6413 | lp->numtags = disc_cnt > 2 ? disc_cnt : 2; |
6414 | lp->num_good = 0; |
6415 | ncr_setup_tags (np, sdev: cmd->device); |
6416 | } |
6417 | /* |
6418 | ** Requeue the command to the start queue. |
6419 | ** If any disconnected commands, |
6420 | ** Clear SIGP. |
6421 | ** Jump to reselect. |
6422 | */ |
6423 | cp->phys.header.savep = cp->startp; |
6424 | cp->host_status = HS_BUSY; |
6425 | cp->scsi_status = SAM_STAT_ILLEGAL; |
6426 | |
6427 | ncr_put_start_queue(np, cp); |
6428 | if (disc_cnt) |
6429 | INB (nc_ctest2); /* Clear SIGP */ |
6430 | OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); |
6431 | return; |
6432 | case SAM_STAT_COMMAND_TERMINATED: |
6433 | case SAM_STAT_CHECK_CONDITION: |
6434 | /* |
6435 | ** If we were requesting sense, give up. |
6436 | */ |
6437 | if (cp->auto_sense) |
6438 | goto out; |
6439 | |
6440 | /* |
6441 | ** Device returned CHECK CONDITION status. |
6442 | ** Prepare all needed data strutures for getting |
6443 | ** sense data. |
6444 | ** |
6445 | ** identify message |
6446 | */ |
6447 | cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); |
6448 | cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); |
6449 | cp->phys.smsg.size = cpu_to_scr(1); |
6450 | |
6451 | /* |
6452 | ** sense command |
6453 | */ |
6454 | cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); |
6455 | cp->phys.cmd.size = cpu_to_scr(6); |
6456 | |
6457 | /* |
6458 | ** patch requested size into sense command |
6459 | */ |
6460 | cp->sensecmd[0] = 0x03; |
6461 | cp->sensecmd[1] = (cmd->device->lun & 0x7) << 5; |
6462 | cp->sensecmd[4] = sizeof(cp->sense_buf); |
6463 | |
6464 | /* |
6465 | ** sense data |
6466 | */ |
6467 | memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); |
6468 | cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); |
6469 | cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); |
6470 | |
6471 | /* |
6472 | ** requeue the command. |
6473 | */ |
6474 | startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); |
6475 | |
6476 | cp->phys.header.savep = startp; |
6477 | cp->phys.header.goalp = startp + 24; |
6478 | cp->phys.header.lastp = startp; |
6479 | cp->phys.header.wgoalp = startp + 24; |
6480 | cp->phys.header.wlastp = startp; |
6481 | |
6482 | cp->host_status = HS_BUSY; |
6483 | cp->scsi_status = SAM_STAT_ILLEGAL; |
6484 | cp->auto_sense = s_status; |
6485 | |
6486 | cp->start.schedule.l_paddr = |
6487 | cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
6488 | |
6489 | /* |
6490 | ** Select without ATN for quirky devices. |
6491 | */ |
6492 | if (cmd->device->select_no_atn) |
6493 | cp->start.schedule.l_paddr = |
6494 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); |
6495 | |
6496 | ncr_put_start_queue(np, cp); |
6497 | |
6498 | OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); |
6499 | return; |
6500 | } |
6501 | |
6502 | out: |
6503 | OUTONB_STD (); |
6504 | return; |
6505 | } |
6506 | |
6507 | |
6508 | /*========================================================== |
6509 | ** |
6510 | ** |
6511 | ** ncr chip exception handler for programmed interrupts. |
6512 | ** |
6513 | ** |
6514 | **========================================================== |
6515 | */ |
6516 | |
6517 | void ncr_int_sir (struct ncb *np) |
6518 | { |
6519 | u_char scntl3; |
6520 | u_char chg, ofs, per, fak, wide; |
6521 | u_char num = INB (nc_dsps); |
6522 | struct ccb *cp=NULL; |
6523 | u_long dsa = INL (nc_dsa); |
6524 | u_char target = INB (nc_sdid) & 0x0f; |
6525 | struct tcb *tp = &np->target[target]; |
6526 | struct scsi_target *starget = tp->starget; |
6527 | |
6528 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d" , num); |
6529 | |
6530 | switch (num) { |
6531 | case SIR_INTFLY: |
6532 | /* |
6533 | ** This is used for HP Zalon/53c720 where INTFLY |
6534 | ** operation is currently broken. |
6535 | */ |
6536 | ncr_wakeup_done(np); |
6537 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
6538 | OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); |
6539 | #else |
6540 | OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); |
6541 | #endif |
6542 | return; |
6543 | case SIR_RESEL_NO_MSG_IN: |
6544 | case SIR_RESEL_NO_IDENTIFY: |
6545 | /* |
6546 | ** If devices reselecting without sending an IDENTIFY |
6547 | ** message still exist, this should help. |
6548 | ** We just assume lun=0, 1 CCB, no tag. |
6549 | */ |
6550 | if (tp->lp[0]) { |
6551 | OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); |
6552 | return; |
6553 | } |
6554 | fallthrough; |
6555 | case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ |
6556 | case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ |
6557 | case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ |
6558 | case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ |
6559 | printk ("%s:%d: SIR %d, " |
6560 | "incorrect nexus identification on reselection\n" , |
6561 | ncr_name (np), target, num); |
6562 | goto out; |
6563 | case SIR_DONE_OVERFLOW: |
6564 | printk ("%s:%d: SIR %d, " |
6565 | "CCB done queue overflow\n" , |
6566 | ncr_name (np), target, num); |
6567 | goto out; |
6568 | case SIR_BAD_STATUS: |
6569 | cp = np->header.cp; |
6570 | if (!cp || CCB_PHYS (cp, phys) != dsa) |
6571 | goto out; |
6572 | ncr_sir_to_redo(np, num, cp); |
6573 | return; |
6574 | default: |
6575 | /* |
6576 | ** lookup the ccb |
6577 | */ |
6578 | cp = np->ccb; |
6579 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
6580 | cp = cp->link_ccb; |
6581 | |
6582 | BUG_ON(!cp); |
6583 | BUG_ON(cp != np->header.cp); |
6584 | |
6585 | if (!cp || cp != np->header.cp) |
6586 | goto out; |
6587 | } |
6588 | |
6589 | switch (num) { |
6590 | /*----------------------------------------------------------------------------- |
6591 | ** |
6592 | ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... |
6593 | ** ("Everything you've always wanted to know about transfer mode |
6594 | ** negotiation") |
6595 | ** |
6596 | ** We try to negotiate sync and wide transfer only after |
6597 | ** a successful inquire command. We look at byte 7 of the |
6598 | ** inquire data to determine the capabilities of the target. |
6599 | ** |
6600 | ** When we try to negotiate, we append the negotiation message |
6601 | ** to the identify and (maybe) simple tag message. |
6602 | ** The host status field is set to HS_NEGOTIATE to mark this |
6603 | ** situation. |
6604 | ** |
6605 | ** If the target doesn't answer this message immediately |
6606 | ** (as required by the standard), the SIR_NEGO_FAIL interrupt |
6607 | ** will be raised eventually. |
6608 | ** The handler removes the HS_NEGOTIATE status, and sets the |
6609 | ** negotiated value to the default (async / nowide). |
6610 | ** |
6611 | ** If we receive a matching answer immediately, we check it |
6612 | ** for validity, and set the values. |
6613 | ** |
6614 | ** If we receive a Reject message immediately, we assume the |
6615 | ** negotiation has failed, and fall back to standard values. |
6616 | ** |
6617 | ** If we receive a negotiation message while not in HS_NEGOTIATE |
6618 | ** state, it's a target initiated negotiation. We prepare a |
6619 | ** (hopefully) valid answer, set our parameters, and send back |
6620 | ** this answer to the target. |
6621 | ** |
6622 | ** If the target doesn't fetch the answer (no message out phase), |
6623 | ** we assume the negotiation has failed, and fall back to default |
6624 | ** settings. |
6625 | ** |
6626 | ** When we set the values, we adjust them in all ccbs belonging |
6627 | ** to this target, in the controller's register, and in the "phys" |
6628 | ** field of the controller's struct ncb. |
6629 | ** |
6630 | ** Possible cases: hs sir msg_in value send goto |
6631 | ** We try to negotiate: |
6632 | ** -> target doesn't msgin NEG FAIL noop defa. - dispatch |
6633 | ** -> target rejected our msg NEG FAIL reject defa. - dispatch |
6634 | ** -> target answered (ok) NEG SYNC sdtr set - clrack |
6635 | ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad |
6636 | ** -> target answered (ok) NEG WIDE wdtr set - clrack |
6637 | ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad |
6638 | ** -> any other msgin NEG FAIL noop defa. - dispatch |
6639 | ** |
6640 | ** Target tries to negotiate: |
6641 | ** -> incoming message --- SYNC sdtr set SDTR - |
6642 | ** -> incoming message --- WIDE wdtr set WDTR - |
6643 | ** We sent our answer: |
6644 | ** -> target doesn't msgout --- PROTO ? defa. - dispatch |
6645 | ** |
6646 | **----------------------------------------------------------------------------- |
6647 | */ |
6648 | |
6649 | case SIR_NEGO_FAILED: |
6650 | /*------------------------------------------------------- |
6651 | ** |
6652 | ** Negotiation failed. |
6653 | ** Target doesn't send an answer message, |
6654 | ** or target rejected our message. |
6655 | ** |
6656 | ** Remove negotiation request. |
6657 | ** |
6658 | **------------------------------------------------------- |
6659 | */ |
6660 | OUTB (HS_PRT, HS_BUSY); |
6661 | |
6662 | fallthrough; |
6663 | |
6664 | case SIR_NEGO_PROTO: |
6665 | /*------------------------------------------------------- |
6666 | ** |
6667 | ** Negotiation failed. |
6668 | ** Target doesn't fetch the answer message. |
6669 | ** |
6670 | **------------------------------------------------------- |
6671 | */ |
6672 | |
6673 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6674 | PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " |
6675 | "status=%x.\n" , num, cp->nego_status); |
6676 | } |
6677 | |
6678 | /* |
6679 | ** any error in negotiation: |
6680 | ** fall back to default mode. |
6681 | */ |
6682 | switch (cp->nego_status) { |
6683 | |
6684 | case NS_SYNC: |
6685 | spi_period(starget) = 0; |
6686 | spi_offset(starget) = 0; |
6687 | ncr_setsync (np, cp, scntl3: 0, sxfer: 0xe0); |
6688 | break; |
6689 | |
6690 | case NS_WIDE: |
6691 | spi_width(starget) = 0; |
6692 | ncr_setwide (np, cp, wide: 0, ack: 0); |
6693 | break; |
6694 | |
6695 | } |
6696 | np->msgin [0] = NOP; |
6697 | np->msgout[0] = NOP; |
6698 | cp->nego_status = 0; |
6699 | break; |
6700 | |
6701 | case SIR_NEGO_SYNC: |
6702 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6703 | ncr_print_msg(cp, label: "sync msgin" , msg: np->msgin); |
6704 | } |
6705 | |
6706 | chg = 0; |
6707 | per = np->msgin[3]; |
6708 | ofs = np->msgin[4]; |
6709 | if (ofs==0) per=255; |
6710 | |
6711 | /* |
6712 | ** if target sends SDTR message, |
6713 | ** it CAN transfer synch. |
6714 | */ |
6715 | |
6716 | if (ofs && starget) |
6717 | spi_support_sync(starget) = 1; |
6718 | |
6719 | /* |
6720 | ** check values against driver limits. |
6721 | */ |
6722 | |
6723 | if (per < np->minsync) |
6724 | {chg = 1; per = np->minsync;} |
6725 | if (per < tp->minsync) |
6726 | {chg = 1; per = tp->minsync;} |
6727 | if (ofs > tp->maxoffs) |
6728 | {chg = 1; ofs = tp->maxoffs;} |
6729 | |
6730 | /* |
6731 | ** Check against controller limits. |
6732 | */ |
6733 | fak = 7; |
6734 | scntl3 = 0; |
6735 | if (ofs != 0) { |
6736 | ncr_getsync(np, sfac: per, fakp: &fak, scntl3p: &scntl3); |
6737 | if (fak > 7) { |
6738 | chg = 1; |
6739 | ofs = 0; |
6740 | } |
6741 | } |
6742 | if (ofs == 0) { |
6743 | fak = 7; |
6744 | per = 0; |
6745 | scntl3 = 0; |
6746 | tp->minsync = 0; |
6747 | } |
6748 | |
6749 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6750 | PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " |
6751 | "fak=%d chg=%d.\n" , per, scntl3, ofs, fak, chg); |
6752 | } |
6753 | |
6754 | if (INB (HS_PRT) == HS_NEGOTIATE) { |
6755 | OUTB (HS_PRT, HS_BUSY); |
6756 | switch (cp->nego_status) { |
6757 | |
6758 | case NS_SYNC: |
6759 | /* This was an answer message */ |
6760 | if (chg) { |
6761 | /* Answer wasn't acceptable. */ |
6762 | spi_period(starget) = 0; |
6763 | spi_offset(starget) = 0; |
6764 | ncr_setsync(np, cp, scntl3: 0, sxfer: 0xe0); |
6765 | OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); |
6766 | } else { |
6767 | /* Answer is ok. */ |
6768 | spi_period(starget) = per; |
6769 | spi_offset(starget) = ofs; |
6770 | ncr_setsync(np, cp, scntl3, sxfer: (fak<<5)|ofs); |
6771 | OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); |
6772 | } |
6773 | return; |
6774 | |
6775 | case NS_WIDE: |
6776 | spi_width(starget) = 0; |
6777 | ncr_setwide(np, cp, wide: 0, ack: 0); |
6778 | break; |
6779 | } |
6780 | } |
6781 | |
6782 | /* |
6783 | ** It was a request. Set value and |
6784 | ** prepare an answer message |
6785 | */ |
6786 | |
6787 | spi_period(starget) = per; |
6788 | spi_offset(starget) = ofs; |
6789 | ncr_setsync(np, cp, scntl3, sxfer: (fak<<5)|ofs); |
6790 | |
6791 | spi_populate_sync_msg(msg: np->msgout, period: per, offset: ofs); |
6792 | cp->nego_status = NS_SYNC; |
6793 | |
6794 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6795 | ncr_print_msg(cp, label: "sync msgout" , msg: np->msgout); |
6796 | } |
6797 | |
6798 | if (!ofs) { |
6799 | OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); |
6800 | return; |
6801 | } |
6802 | np->msgin [0] = NOP; |
6803 | |
6804 | break; |
6805 | |
6806 | case SIR_NEGO_WIDE: |
6807 | /* |
6808 | ** Wide request message received. |
6809 | */ |
6810 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6811 | ncr_print_msg(cp, label: "wide msgin" , msg: np->msgin); |
6812 | } |
6813 | |
6814 | /* |
6815 | ** get requested values. |
6816 | */ |
6817 | |
6818 | chg = 0; |
6819 | wide = np->msgin[3]; |
6820 | |
6821 | /* |
6822 | ** if target sends WDTR message, |
6823 | ** it CAN transfer wide. |
6824 | */ |
6825 | |
6826 | if (wide && starget) |
6827 | spi_support_wide(starget) = 1; |
6828 | |
6829 | /* |
6830 | ** check values against driver limits. |
6831 | */ |
6832 | |
6833 | if (wide > tp->usrwide) |
6834 | {chg = 1; wide = tp->usrwide;} |
6835 | |
6836 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6837 | PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n" , wide, |
6838 | chg); |
6839 | } |
6840 | |
6841 | if (INB (HS_PRT) == HS_NEGOTIATE) { |
6842 | OUTB (HS_PRT, HS_BUSY); |
6843 | switch (cp->nego_status) { |
6844 | |
6845 | case NS_WIDE: |
6846 | /* |
6847 | ** This was an answer message |
6848 | */ |
6849 | if (chg) { |
6850 | /* Answer wasn't acceptable. */ |
6851 | spi_width(starget) = 0; |
6852 | ncr_setwide(np, cp, wide: 0, ack: 1); |
6853 | OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); |
6854 | } else { |
6855 | /* Answer is ok. */ |
6856 | spi_width(starget) = wide; |
6857 | ncr_setwide(np, cp, wide, ack: 1); |
6858 | OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); |
6859 | } |
6860 | return; |
6861 | |
6862 | case NS_SYNC: |
6863 | spi_period(starget) = 0; |
6864 | spi_offset(starget) = 0; |
6865 | ncr_setsync(np, cp, scntl3: 0, sxfer: 0xe0); |
6866 | break; |
6867 | } |
6868 | } |
6869 | |
6870 | /* |
6871 | ** It was a request, set value and |
6872 | ** prepare an answer message |
6873 | */ |
6874 | |
6875 | spi_width(starget) = wide; |
6876 | ncr_setwide(np, cp, wide, ack: 1); |
6877 | spi_populate_width_msg(msg: np->msgout, width: wide); |
6878 | |
6879 | np->msgin [0] = NOP; |
6880 | |
6881 | cp->nego_status = NS_WIDE; |
6882 | |
6883 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6884 | ncr_print_msg(cp, label: "wide msgout" , msg: np->msgin); |
6885 | } |
6886 | break; |
6887 | |
6888 | /*-------------------------------------------------------------------- |
6889 | ** |
6890 | ** Processing of special messages |
6891 | ** |
6892 | **-------------------------------------------------------------------- |
6893 | */ |
6894 | |
6895 | case SIR_REJECT_RECEIVED: |
6896 | /*----------------------------------------------- |
6897 | ** |
6898 | ** We received a MESSAGE_REJECT. |
6899 | ** |
6900 | **----------------------------------------------- |
6901 | */ |
6902 | |
6903 | PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n" , |
6904 | (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); |
6905 | break; |
6906 | |
6907 | case SIR_REJECT_SENT: |
6908 | /*----------------------------------------------- |
6909 | ** |
6910 | ** We received an unknown message |
6911 | ** |
6912 | **----------------------------------------------- |
6913 | */ |
6914 | |
6915 | ncr_print_msg(cp, label: "MESSAGE_REJECT sent for" , msg: np->msgin); |
6916 | break; |
6917 | |
6918 | /*-------------------------------------------------------------------- |
6919 | ** |
6920 | ** Processing of special messages |
6921 | ** |
6922 | **-------------------------------------------------------------------- |
6923 | */ |
6924 | |
6925 | case SIR_IGN_RESIDUE: |
6926 | /*----------------------------------------------- |
6927 | ** |
6928 | ** We received an IGNORE RESIDUE message, |
6929 | ** which couldn't be handled by the script. |
6930 | ** |
6931 | **----------------------------------------------- |
6932 | */ |
6933 | |
6934 | PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " |
6935 | "implemented.\n" ); |
6936 | break; |
6937 | #if 0 |
6938 | case SIR_MISSING_SAVE: |
6939 | /*----------------------------------------------- |
6940 | ** |
6941 | ** We received an DISCONNECT message, |
6942 | ** but the datapointer wasn't saved before. |
6943 | ** |
6944 | **----------------------------------------------- |
6945 | */ |
6946 | |
6947 | PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer " |
6948 | "not saved: data=%x save=%x goal=%x.\n" , |
6949 | (unsigned) INL (nc_temp), |
6950 | (unsigned) scr_to_cpu(np->header.savep), |
6951 | (unsigned) scr_to_cpu(np->header.goalp)); |
6952 | break; |
6953 | #endif |
6954 | } |
6955 | |
6956 | out: |
6957 | OUTONB_STD (); |
6958 | } |
6959 | |
6960 | /*========================================================== |
6961 | ** |
6962 | ** |
6963 | ** Acquire a control block |
6964 | ** |
6965 | ** |
6966 | **========================================================== |
6967 | */ |
6968 | |
6969 | static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) |
6970 | { |
6971 | u_char tn = cmd->device->id; |
6972 | u_char ln = cmd->device->lun; |
6973 | struct tcb *tp = &np->target[tn]; |
6974 | struct lcb *lp = tp->lp[ln]; |
6975 | u_char tag = NO_TAG; |
6976 | struct ccb *cp = NULL; |
6977 | |
6978 | /* |
6979 | ** Lun structure available ? |
6980 | */ |
6981 | if (lp) { |
6982 | struct list_head *qp; |
6983 | /* |
6984 | ** Keep from using more tags than we can handle. |
6985 | */ |
6986 | if (lp->usetags && lp->busyccbs >= lp->maxnxs) |
6987 | return NULL; |
6988 | |
6989 | /* |
6990 | ** Allocate a new CCB if needed. |
6991 | */ |
6992 | if (list_empty(head: &lp->free_ccbq)) |
6993 | ncr_alloc_ccb(np, tn, ln); |
6994 | |
6995 | /* |
6996 | ** Look for free CCB |
6997 | */ |
6998 | qp = ncr_list_pop(head: &lp->free_ccbq); |
6999 | if (qp) { |
7000 | cp = list_entry(qp, struct ccb, link_ccbq); |
7001 | if (cp->magic) { |
7002 | PRINT_ADDR(cmd, "ccb free list corrupted " |
7003 | "(@%p)\n" , cp); |
7004 | cp = NULL; |
7005 | } else { |
7006 | list_add_tail(new: qp, head: &lp->wait_ccbq); |
7007 | ++lp->busyccbs; |
7008 | } |
7009 | } |
7010 | |
7011 | /* |
7012 | ** If a CCB is available, |
7013 | ** Get a tag for this nexus if required. |
7014 | */ |
7015 | if (cp) { |
7016 | if (lp->usetags) |
7017 | tag = lp->cb_tags[lp->ia_tag]; |
7018 | } |
7019 | else if (lp->actccbs > 0) |
7020 | return NULL; |
7021 | } |
7022 | |
7023 | /* |
7024 | ** if nothing available, take the default. |
7025 | */ |
7026 | if (!cp) |
7027 | cp = np->ccb; |
7028 | |
7029 | /* |
7030 | ** Wait until available. |
7031 | */ |
7032 | #if 0 |
7033 | while (cp->magic) { |
7034 | if (flags & SCSI_NOSLEEP) break; |
7035 | if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr" , 0)) |
7036 | break; |
7037 | } |
7038 | #endif |
7039 | |
7040 | if (cp->magic) |
7041 | return NULL; |
7042 | |
7043 | cp->magic = 1; |
7044 | |
7045 | /* |
7046 | ** Move to next available tag if tag used. |
7047 | */ |
7048 | if (lp) { |
7049 | if (tag != NO_TAG) { |
7050 | ++lp->ia_tag; |
7051 | if (lp->ia_tag == MAX_TAGS) |
7052 | lp->ia_tag = 0; |
7053 | lp->tags_umap |= (((tagmap_t) 1) << tag); |
7054 | } |
7055 | } |
7056 | |
7057 | /* |
7058 | ** Remember all informations needed to free this CCB. |
7059 | */ |
7060 | cp->tag = tag; |
7061 | cp->target = tn; |
7062 | cp->lun = ln; |
7063 | |
7064 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
7065 | PRINT_ADDR(cmd, "ccb @%p using tag %d.\n" , cp, tag); |
7066 | } |
7067 | |
7068 | return cp; |
7069 | } |
7070 | |
7071 | /*========================================================== |
7072 | ** |
7073 | ** |
7074 | ** Release one control block |
7075 | ** |
7076 | ** |
7077 | **========================================================== |
7078 | */ |
7079 | |
7080 | static void ncr_free_ccb (struct ncb *np, struct ccb *cp) |
7081 | { |
7082 | struct tcb *tp = &np->target[cp->target]; |
7083 | struct lcb *lp = tp->lp[cp->lun]; |
7084 | |
7085 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
7086 | PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n" , cp, cp->tag); |
7087 | } |
7088 | |
7089 | /* |
7090 | ** If lun control block available, |
7091 | ** decrement active commands and increment credit, |
7092 | ** free the tag if any and remove the JUMP for reselect. |
7093 | */ |
7094 | if (lp) { |
7095 | if (cp->tag != NO_TAG) { |
7096 | lp->cb_tags[lp->if_tag++] = cp->tag; |
7097 | if (lp->if_tag == MAX_TAGS) |
7098 | lp->if_tag = 0; |
7099 | lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); |
7100 | lp->tags_smap &= lp->tags_umap; |
7101 | lp->jump_ccb[cp->tag] = |
7102 | cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); |
7103 | } else { |
7104 | lp->jump_ccb[0] = |
7105 | cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); |
7106 | } |
7107 | } |
7108 | |
7109 | /* |
7110 | ** Make this CCB available. |
7111 | */ |
7112 | |
7113 | if (lp) { |
7114 | if (cp != np->ccb) |
7115 | list_move(list: &cp->link_ccbq, head: &lp->free_ccbq); |
7116 | --lp->busyccbs; |
7117 | if (cp->queued) { |
7118 | --lp->queuedccbs; |
7119 | } |
7120 | } |
7121 | cp -> host_status = HS_IDLE; |
7122 | cp -> magic = 0; |
7123 | if (cp->queued) { |
7124 | --np->queuedccbs; |
7125 | cp->queued = 0; |
7126 | } |
7127 | |
7128 | #if 0 |
7129 | if (cp == np->ccb) |
7130 | wakeup ((caddr_t) cp); |
7131 | #endif |
7132 | } |
7133 | |
7134 | |
7135 | #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) |
7136 | |
7137 | /*------------------------------------------------------------------------ |
7138 | ** Initialize the fixed part of a CCB structure. |
7139 | **------------------------------------------------------------------------ |
7140 | **------------------------------------------------------------------------ |
7141 | */ |
7142 | static void ncr_init_ccb(struct ncb *np, struct ccb *cp) |
7143 | { |
7144 | ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); |
7145 | |
7146 | /* |
7147 | ** Remember virtual and bus address of this ccb. |
7148 | */ |
7149 | cp->p_ccb = vtobus(cp); |
7150 | cp->phys.header.cp = cp; |
7151 | |
7152 | /* |
7153 | ** This allows list_del to work for the default ccb. |
7154 | */ |
7155 | INIT_LIST_HEAD(list: &cp->link_ccbq); |
7156 | |
7157 | /* |
7158 | ** Initialyze the start and restart launch script. |
7159 | ** |
7160 | ** COPY(4) @(...p_phys), @(dsa) |
7161 | ** JUMP @(sched_point) |
7162 | */ |
7163 | cp->start.setup_dsa[0] = cpu_to_scr(copy_4); |
7164 | cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); |
7165 | cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); |
7166 | cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); |
7167 | cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); |
7168 | |
7169 | memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); |
7170 | |
7171 | cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
7172 | cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); |
7173 | } |
7174 | |
7175 | |
7176 | /*------------------------------------------------------------------------ |
7177 | ** Allocate a CCB and initialize its fixed part. |
7178 | **------------------------------------------------------------------------ |
7179 | **------------------------------------------------------------------------ |
7180 | */ |
7181 | static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) |
7182 | { |
7183 | struct tcb *tp = &np->target[tn]; |
7184 | struct lcb *lp = tp->lp[ln]; |
7185 | struct ccb *cp = NULL; |
7186 | |
7187 | /* |
7188 | ** Allocate memory for this CCB. |
7189 | */ |
7190 | cp = m_calloc_dma(sizeof(struct ccb), "CCB" ); |
7191 | if (!cp) |
7192 | return; |
7193 | |
7194 | /* |
7195 | ** Count it and initialyze it. |
7196 | */ |
7197 | lp->actccbs++; |
7198 | np->actccbs++; |
7199 | memset(cp, 0, sizeof (*cp)); |
7200 | ncr_init_ccb(np, cp); |
7201 | |
7202 | /* |
7203 | ** Chain into wakeup list and free ccb queue and take it |
7204 | ** into account for tagged commands. |
7205 | */ |
7206 | cp->link_ccb = np->ccb->link_ccb; |
7207 | np->ccb->link_ccb = cp; |
7208 | |
7209 | list_add(new: &cp->link_ccbq, head: &lp->free_ccbq); |
7210 | } |
7211 | |
7212 | /*========================================================== |
7213 | ** |
7214 | ** |
7215 | ** Allocation of resources for Targets/Luns/Tags. |
7216 | ** |
7217 | ** |
7218 | **========================================================== |
7219 | */ |
7220 | |
7221 | |
7222 | /*------------------------------------------------------------------------ |
7223 | ** Target control block initialisation. |
7224 | **------------------------------------------------------------------------ |
7225 | ** This data structure is fully initialized after a SCSI command |
7226 | ** has been successfully completed for this target. |
7227 | ** It contains a SCRIPT that is called on target reselection. |
7228 | **------------------------------------------------------------------------ |
7229 | */ |
7230 | static void ncr_init_tcb (struct ncb *np, u_char tn) |
7231 | { |
7232 | struct tcb *tp = &np->target[tn]; |
7233 | ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); |
7234 | int th = tn & 3; |
7235 | int i; |
7236 | |
7237 | /* |
7238 | ** Jump to next tcb if SFBR does not match this target. |
7239 | ** JUMP IF (SFBR != #target#), @(next tcb) |
7240 | */ |
7241 | tp->jump_tcb.l_cmd = |
7242 | cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); |
7243 | tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; |
7244 | |
7245 | /* |
7246 | ** Load the synchronous transfer register. |
7247 | ** COPY @(tp->sval), @(sxfer) |
7248 | */ |
7249 | tp->getscr[0] = cpu_to_scr(copy_1); |
7250 | tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); |
7251 | #ifdef SCSI_NCR_BIG_ENDIAN |
7252 | tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); |
7253 | #else |
7254 | tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); |
7255 | #endif |
7256 | |
7257 | /* |
7258 | ** Load the timing register. |
7259 | ** COPY @(tp->wval), @(scntl3) |
7260 | */ |
7261 | tp->getscr[3] = cpu_to_scr(copy_1); |
7262 | tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); |
7263 | #ifdef SCSI_NCR_BIG_ENDIAN |
7264 | tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); |
7265 | #else |
7266 | tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); |
7267 | #endif |
7268 | |
7269 | /* |
7270 | ** Get the IDENTIFY message and the lun. |
7271 | ** CALL @script(resel_lun) |
7272 | */ |
7273 | tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); |
7274 | tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); |
7275 | |
7276 | /* |
7277 | ** Look for the lun control block of this nexus. |
7278 | ** For i = 0 to 3 |
7279 | ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) |
7280 | */ |
7281 | for (i = 0 ; i < 4 ; i++) { |
7282 | tp->jump_lcb[i].l_cmd = |
7283 | cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); |
7284 | tp->jump_lcb[i].l_paddr = |
7285 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); |
7286 | } |
7287 | |
7288 | /* |
7289 | ** Link this target control block to the JUMP chain. |
7290 | */ |
7291 | np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); |
7292 | |
7293 | /* |
7294 | ** These assert's should be moved at driver initialisations. |
7295 | */ |
7296 | #ifdef SCSI_NCR_BIG_ENDIAN |
7297 | BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ |
7298 | offsetof(struct tcb , sval )) &3) != 3); |
7299 | BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ |
7300 | offsetof(struct tcb , wval )) &3) != 3); |
7301 | #else |
7302 | BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ |
7303 | offsetof(struct tcb , sval )) &3) != 0); |
7304 | BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ |
7305 | offsetof(struct tcb , wval )) &3) != 0); |
7306 | #endif |
7307 | } |
7308 | |
7309 | |
7310 | /*------------------------------------------------------------------------ |
7311 | ** Lun control block allocation and initialization. |
7312 | **------------------------------------------------------------------------ |
7313 | ** This data structure is allocated and initialized after a SCSI |
7314 | ** command has been successfully completed for this target/lun. |
7315 | **------------------------------------------------------------------------ |
7316 | */ |
7317 | static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) |
7318 | { |
7319 | struct tcb *tp = &np->target[tn]; |
7320 | struct lcb *lp = tp->lp[ln]; |
7321 | ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); |
7322 | int lh = ln & 3; |
7323 | |
7324 | /* |
7325 | ** Already done, return. |
7326 | */ |
7327 | if (lp) |
7328 | return lp; |
7329 | |
7330 | /* |
7331 | ** Allocate the lcb. |
7332 | */ |
7333 | lp = m_calloc_dma(sizeof(struct lcb), "LCB" ); |
7334 | if (!lp) |
7335 | goto fail; |
7336 | memset(lp, 0, sizeof(*lp)); |
7337 | tp->lp[ln] = lp; |
7338 | |
7339 | /* |
7340 | ** Initialize the target control block if not yet. |
7341 | */ |
7342 | if (!tp->jump_tcb.l_cmd) |
7343 | ncr_init_tcb(np, tn); |
7344 | |
7345 | /* |
7346 | ** Initialize the CCB queue headers. |
7347 | */ |
7348 | INIT_LIST_HEAD(list: &lp->free_ccbq); |
7349 | INIT_LIST_HEAD(list: &lp->busy_ccbq); |
7350 | INIT_LIST_HEAD(list: &lp->wait_ccbq); |
7351 | INIT_LIST_HEAD(list: &lp->skip_ccbq); |
7352 | |
7353 | /* |
7354 | ** Set max CCBs to 1 and use the default 1 entry |
7355 | ** jump table by default. |
7356 | */ |
7357 | lp->maxnxs = 1; |
7358 | lp->jump_ccb = &lp->jump_ccb_0; |
7359 | lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); |
7360 | |
7361 | /* |
7362 | ** Initilialyze the reselect script: |
7363 | ** |
7364 | ** Jump to next lcb if SFBR does not match this lun. |
7365 | ** Load TEMP with the CCB direct jump table bus address. |
7366 | ** Get the SIMPLE TAG message and the tag. |
7367 | ** |
7368 | ** JUMP IF (SFBR != #lun#), @(next lcb) |
7369 | ** COPY @(lp->p_jump_ccb), @(temp) |
7370 | ** JUMP @script(resel_notag) |
7371 | */ |
7372 | lp->jump_lcb.l_cmd = |
7373 | cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); |
7374 | lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; |
7375 | |
7376 | lp->load_jump_ccb[0] = cpu_to_scr(copy_4); |
7377 | lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); |
7378 | lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); |
7379 | |
7380 | lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); |
7381 | lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); |
7382 | |
7383 | /* |
7384 | ** Link this lun control block to the JUMP chain. |
7385 | */ |
7386 | tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); |
7387 | |
7388 | /* |
7389 | ** Initialize command queuing control. |
7390 | */ |
7391 | lp->busyccbs = 1; |
7392 | lp->queuedccbs = 1; |
7393 | lp->queuedepth = 1; |
7394 | fail: |
7395 | return lp; |
7396 | } |
7397 | |
7398 | |
7399 | /*------------------------------------------------------------------------ |
7400 | ** Lun control block setup on INQUIRY data received. |
7401 | **------------------------------------------------------------------------ |
7402 | ** We only support WIDE, SYNC for targets and CMDQ for logical units. |
7403 | ** This setup is done on each INQUIRY since we are expecting user |
7404 | ** will play with CHANGE DEFINITION commands. :-) |
7405 | **------------------------------------------------------------------------ |
7406 | */ |
7407 | static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) |
7408 | { |
7409 | unsigned char tn = sdev->id, ln = sdev->lun; |
7410 | struct tcb *tp = &np->target[tn]; |
7411 | struct lcb *lp = tp->lp[ln]; |
7412 | |
7413 | /* If no lcb, try to allocate it. */ |
7414 | if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) |
7415 | goto fail; |
7416 | |
7417 | /* |
7418 | ** If unit supports tagged commands, allocate the |
7419 | ** CCB JUMP table if not yet. |
7420 | */ |
7421 | if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { |
7422 | int i; |
7423 | lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB" ); |
7424 | if (!lp->jump_ccb) { |
7425 | lp->jump_ccb = &lp->jump_ccb_0; |
7426 | goto fail; |
7427 | } |
7428 | lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); |
7429 | for (i = 0 ; i < 64 ; i++) |
7430 | lp->jump_ccb[i] = |
7431 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); |
7432 | for (i = 0 ; i < MAX_TAGS ; i++) |
7433 | lp->cb_tags[i] = i; |
7434 | lp->maxnxs = MAX_TAGS; |
7435 | lp->tags_stime = jiffies + 3*HZ; |
7436 | ncr_setup_tags (np, sdev); |
7437 | } |
7438 | |
7439 | |
7440 | fail: |
7441 | return lp; |
7442 | } |
7443 | |
7444 | /*========================================================== |
7445 | ** |
7446 | ** |
7447 | ** Build Scatter Gather Block |
7448 | ** |
7449 | ** |
7450 | **========================================================== |
7451 | ** |
7452 | ** The transfer area may be scattered among |
7453 | ** several non adjacent physical pages. |
7454 | ** |
7455 | ** We may use MAX_SCATTER blocks. |
7456 | ** |
7457 | **---------------------------------------------------------- |
7458 | */ |
7459 | |
7460 | /* |
7461 | ** We try to reduce the number of interrupts caused |
7462 | ** by unexpected phase changes due to disconnects. |
7463 | ** A typical harddisk may disconnect before ANY block. |
7464 | ** If we wanted to avoid unexpected phase changes at all |
7465 | ** we had to use a break point every 512 bytes. |
7466 | ** Of course the number of scatter/gather blocks is |
7467 | ** limited. |
7468 | ** Under Linux, the scatter/gatter blocks are provided by |
7469 | ** the generic driver. We just have to copy addresses and |
7470 | ** sizes to the data segment array. |
7471 | */ |
7472 | |
7473 | static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) |
7474 | { |
7475 | int segment = 0; |
7476 | int use_sg = scsi_sg_count(cmd); |
7477 | |
7478 | cp->data_len = 0; |
7479 | |
7480 | use_sg = map_scsi_sg_data(np, cmd); |
7481 | if (use_sg > 0) { |
7482 | struct scatterlist *sg; |
7483 | struct scr_tblmove *data; |
7484 | |
7485 | if (use_sg > MAX_SCATTER) { |
7486 | unmap_scsi_data(np, cmd); |
7487 | return -1; |
7488 | } |
7489 | |
7490 | data = &cp->phys.data[MAX_SCATTER - use_sg]; |
7491 | |
7492 | scsi_for_each_sg(cmd, sg, use_sg, segment) { |
7493 | dma_addr_t baddr = sg_dma_address(sg); |
7494 | unsigned int len = sg_dma_len(sg); |
7495 | |
7496 | ncr_build_sge(np, &data[segment], baddr, len); |
7497 | cp->data_len += len; |
7498 | } |
7499 | } else |
7500 | segment = -2; |
7501 | |
7502 | return segment; |
7503 | } |
7504 | |
7505 | /*========================================================== |
7506 | ** |
7507 | ** |
7508 | ** Test the bus snoop logic :-( |
7509 | ** |
7510 | ** Has to be called with interrupts disabled. |
7511 | ** |
7512 | ** |
7513 | **========================================================== |
7514 | */ |
7515 | |
7516 | static int __init ncr_regtest (struct ncb* np) |
7517 | { |
7518 | register volatile u32 data; |
7519 | /* |
7520 | ** ncr registers may NOT be cached. |
7521 | ** write 0xffffffff to a read only register area, |
7522 | ** and try to read it back. |
7523 | */ |
7524 | data = 0xffffffff; |
7525 | OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); |
7526 | data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); |
7527 | #if 1 |
7528 | if (data == 0xffffffff) { |
7529 | #else |
7530 | if ((data & 0xe2f0fffd) != 0x02000080) { |
7531 | #endif |
7532 | printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n" , |
7533 | (unsigned) data); |
7534 | return (0x10); |
7535 | } |
7536 | return (0); |
7537 | } |
7538 | |
7539 | static int __init ncr_snooptest (struct ncb* np) |
7540 | { |
7541 | u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; |
7542 | int i, err=0; |
7543 | if (np->reg) { |
7544 | err |= ncr_regtest (np); |
7545 | if (err) |
7546 | return (err); |
7547 | } |
7548 | |
7549 | /* init */ |
7550 | pc = NCB_SCRIPTH_PHYS (np, snooptest); |
7551 | host_wr = 1; |
7552 | ncr_wr = 2; |
7553 | /* |
7554 | ** Set memory and register. |
7555 | */ |
7556 | np->ncr_cache = cpu_to_scr(host_wr); |
7557 | OUTL (nc_temp, ncr_wr); |
7558 | /* |
7559 | ** Start script (exchange values) |
7560 | */ |
7561 | OUTL_DSP (pc); |
7562 | /* |
7563 | ** Wait 'til done (with timeout) |
7564 | */ |
7565 | for (i=0; i<NCR_SNOOP_TIMEOUT; i++) |
7566 | if (INB(nc_istat) & (INTF|SIP|DIP)) |
7567 | break; |
7568 | /* |
7569 | ** Save termination position. |
7570 | */ |
7571 | pc = INL (nc_dsp); |
7572 | /* |
7573 | ** Read memory and register. |
7574 | */ |
7575 | host_rd = scr_to_cpu(np->ncr_cache); |
7576 | ncr_rd = INL (nc_scratcha); |
7577 | ncr_bk = INL (nc_temp); |
7578 | /* |
7579 | ** Reset ncr chip |
7580 | */ |
7581 | ncr_chip_reset(np, delay: 100); |
7582 | /* |
7583 | ** check for timeout |
7584 | */ |
7585 | if (i>=NCR_SNOOP_TIMEOUT) { |
7586 | printk ("CACHE TEST FAILED: timeout.\n" ); |
7587 | return (0x20); |
7588 | } |
7589 | /* |
7590 | ** Check termination position. |
7591 | */ |
7592 | if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { |
7593 | printk ("CACHE TEST FAILED: script execution failed.\n" ); |
7594 | printk ("start=%08lx, pc=%08lx, end=%08lx\n" , |
7595 | (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, |
7596 | (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); |
7597 | return (0x40); |
7598 | } |
7599 | /* |
7600 | ** Show results. |
7601 | */ |
7602 | if (host_wr != ncr_rd) { |
7603 | printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n" , |
7604 | (int) host_wr, (int) ncr_rd); |
7605 | err |= 1; |
7606 | } |
7607 | if (host_rd != ncr_wr) { |
7608 | printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n" , |
7609 | (int) ncr_wr, (int) host_rd); |
7610 | err |= 2; |
7611 | } |
7612 | if (ncr_bk != ncr_wr) { |
7613 | printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n" , |
7614 | (int) ncr_wr, (int) ncr_bk); |
7615 | err |= 4; |
7616 | } |
7617 | return (err); |
7618 | } |
7619 | |
7620 | /*========================================================== |
7621 | ** |
7622 | ** Determine the ncr's clock frequency. |
7623 | ** This is essential for the negotiation |
7624 | ** of the synchronous transfer rate. |
7625 | ** |
7626 | **========================================================== |
7627 | ** |
7628 | ** Note: we have to return the correct value. |
7629 | ** THERE IS NO SAFE DEFAULT VALUE. |
7630 | ** |
7631 | ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. |
7632 | ** 53C860 and 53C875 rev. 1 support fast20 transfers but |
7633 | ** do not have a clock doubler and so are provided with a |
7634 | ** 80 MHz clock. All other fast20 boards incorporate a doubler |
7635 | ** and so should be delivered with a 40 MHz clock. |
7636 | ** The future fast40 chips (895/895) use a 40 Mhz base clock |
7637 | ** and provide a clock quadrupler (160 Mhz). The code below |
7638 | ** tries to deal as cleverly as possible with all this stuff. |
7639 | ** |
7640 | **---------------------------------------------------------- |
7641 | */ |
7642 | |
7643 | /* |
7644 | * Select NCR SCSI clock frequency |
7645 | */ |
7646 | static void ncr_selectclock(struct ncb *np, u_char scntl3) |
7647 | { |
7648 | if (np->multiplier < 2) { |
7649 | OUTB(nc_scntl3, scntl3); |
7650 | return; |
7651 | } |
7652 | |
7653 | if (bootverbose >= 2) |
7654 | printk ("%s: enabling clock multiplier\n" , ncr_name(np)); |
7655 | |
7656 | OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ |
7657 | if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ |
7658 | int i = 20; |
7659 | while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) |
7660 | udelay(20); |
7661 | if (!i) |
7662 | printk("%s: the chip cannot lock the frequency\n" , ncr_name(np)); |
7663 | } else /* Wait 20 micro-seconds for doubler */ |
7664 | udelay(20); |
7665 | OUTB(nc_stest3, HSC); /* Halt the scsi clock */ |
7666 | OUTB(nc_scntl3, scntl3); |
7667 | OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ |
7668 | OUTB(nc_stest3, 0x00); /* Restart scsi clock */ |
7669 | } |
7670 | |
7671 | |
7672 | /* |
7673 | * calculate NCR SCSI clock frequency (in KHz) |
7674 | */ |
7675 | static unsigned __init ncrgetfreq (struct ncb *np, int gen) |
7676 | { |
7677 | unsigned ms = 0; |
7678 | char count = 0; |
7679 | |
7680 | /* |
7681 | * Measure GEN timer delay in order |
7682 | * to calculate SCSI clock frequency |
7683 | * |
7684 | * This code will never execute too |
7685 | * many loop iterations (if DELAY is |
7686 | * reasonably correct). It could get |
7687 | * too low a delay (too high a freq.) |
7688 | * if the CPU is slow executing the |
7689 | * loop for some reason (an NMI, for |
7690 | * example). For this reason we will |
7691 | * if multiple measurements are to be |
7692 | * performed trust the higher delay |
7693 | * (lower frequency returned). |
7694 | */ |
7695 | OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ |
7696 | OUTW (nc_sien , 0); /* mask all scsi interrupts */ |
7697 | (void) INW (nc_sist); /* clear pending scsi interrupt */ |
7698 | OUTB (nc_dien , 0); /* mask all dma interrupts */ |
7699 | (void) INW (nc_sist); /* another one, just to be sure :) */ |
7700 | OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ |
7701 | OUTB (nc_stime1, 0); /* disable general purpose timer */ |
7702 | OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ |
7703 | while (!(INW(nc_sist) & GEN) && ms++ < 100000) { |
7704 | for (count = 0; count < 10; count ++) |
7705 | udelay(100); /* count ms */ |
7706 | } |
7707 | OUTB (nc_stime1, 0); /* disable general purpose timer */ |
7708 | /* |
7709 | * set prescaler to divide by whatever 0 means |
7710 | * 0 ought to choose divide by 2, but appears |
7711 | * to set divide by 3.5 mode in my 53c810 ... |
7712 | */ |
7713 | OUTB (nc_scntl3, 0); |
7714 | |
7715 | if (bootverbose >= 2) |
7716 | printk ("%s: Delay (GEN=%d): %u msec\n" , ncr_name(np), gen, ms); |
7717 | /* |
7718 | * adjust for prescaler, and convert into KHz |
7719 | */ |
7720 | return ms ? ((1 << gen) * 4340) / ms : 0; |
7721 | } |
7722 | |
7723 | /* |
7724 | * Get/probe NCR SCSI clock frequency |
7725 | */ |
7726 | static void __init ncr_getclock (struct ncb *np, int mult) |
7727 | { |
7728 | unsigned char scntl3 = INB(nc_scntl3); |
7729 | unsigned char stest1 = INB(nc_stest1); |
7730 | unsigned f1; |
7731 | |
7732 | np->multiplier = 1; |
7733 | f1 = 40000; |
7734 | |
7735 | /* |
7736 | ** True with 875 or 895 with clock multiplier selected |
7737 | */ |
7738 | if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { |
7739 | if (bootverbose >= 2) |
7740 | printk ("%s: clock multiplier found\n" , ncr_name(np)); |
7741 | np->multiplier = mult; |
7742 | } |
7743 | |
7744 | /* |
7745 | ** If multiplier not found or scntl3 not 7,5,3, |
7746 | ** reset chip and get frequency from general purpose timer. |
7747 | ** Otherwise trust scntl3 BIOS setting. |
7748 | */ |
7749 | if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { |
7750 | unsigned f2; |
7751 | |
7752 | ncr_chip_reset(np, delay: 5); |
7753 | |
7754 | (void) ncrgetfreq (np, gen: 11); /* throw away first result */ |
7755 | f1 = ncrgetfreq (np, gen: 11); |
7756 | f2 = ncrgetfreq (np, gen: 11); |
7757 | |
7758 | if(bootverbose) |
7759 | printk ("%s: NCR clock is %uKHz, %uKHz\n" , ncr_name(np), f1, f2); |
7760 | |
7761 | if (f1 > f2) f1 = f2; /* trust lower result */ |
7762 | |
7763 | if (f1 < 45000) f1 = 40000; |
7764 | else if (f1 < 55000) f1 = 50000; |
7765 | else f1 = 80000; |
7766 | |
7767 | if (f1 < 80000 && mult > 1) { |
7768 | if (bootverbose >= 2) |
7769 | printk ("%s: clock multiplier assumed\n" , ncr_name(np)); |
7770 | np->multiplier = mult; |
7771 | } |
7772 | } else { |
7773 | if ((scntl3 & 7) == 3) f1 = 40000; |
7774 | else if ((scntl3 & 7) == 5) f1 = 80000; |
7775 | else f1 = 160000; |
7776 | |
7777 | f1 /= np->multiplier; |
7778 | } |
7779 | |
7780 | /* |
7781 | ** Compute controller synchronous parameters. |
7782 | */ |
7783 | f1 *= np->multiplier; |
7784 | np->clock_khz = f1; |
7785 | } |
7786 | |
7787 | /*===================== LINUX ENTRY POINTS SECTION ==========================*/ |
7788 | |
7789 | static int ncr53c8xx_slave_alloc(struct scsi_device *device) |
7790 | { |
7791 | struct Scsi_Host *host = device->host; |
7792 | struct ncb *np = ((struct host_data *) host->hostdata)->ncb; |
7793 | struct tcb *tp = &np->target[device->id]; |
7794 | tp->starget = device->sdev_target; |
7795 | |
7796 | return 0; |
7797 | } |
7798 | |
7799 | static int ncr53c8xx_slave_configure(struct scsi_device *device) |
7800 | { |
7801 | struct Scsi_Host *host = device->host; |
7802 | struct ncb *np = ((struct host_data *) host->hostdata)->ncb; |
7803 | struct tcb *tp = &np->target[device->id]; |
7804 | struct lcb *lp = tp->lp[device->lun]; |
7805 | int numtags, depth_to_use; |
7806 | |
7807 | ncr_setup_lcb(np, sdev: device); |
7808 | |
7809 | /* |
7810 | ** Select queue depth from driver setup. |
7811 | ** Donnot use more than configured by user. |
7812 | ** Use at least 2. |
7813 | ** Donnot use more than our maximum. |
7814 | */ |
7815 | numtags = device_queue_depth(unit: np->unit, target: device->id, lun: device->lun); |
7816 | if (numtags > tp->usrtags) |
7817 | numtags = tp->usrtags; |
7818 | if (!device->tagged_supported) |
7819 | numtags = 1; |
7820 | depth_to_use = numtags; |
7821 | if (depth_to_use < 2) |
7822 | depth_to_use = 2; |
7823 | if (depth_to_use > MAX_TAGS) |
7824 | depth_to_use = MAX_TAGS; |
7825 | |
7826 | scsi_change_queue_depth(device, depth_to_use); |
7827 | |
7828 | /* |
7829 | ** Since the queue depth is not tunable under Linux, |
7830 | ** we need to know this value in order not to |
7831 | ** announce stupid things to user. |
7832 | ** |
7833 | ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable.. |
7834 | ** In fact we just tuned it, or did I miss |
7835 | ** something important? :) |
7836 | */ |
7837 | if (lp) { |
7838 | lp->numtags = lp->maxtags = numtags; |
7839 | lp->scdev_depth = depth_to_use; |
7840 | } |
7841 | ncr_setup_tags (np, sdev: device); |
7842 | |
7843 | #ifdef DEBUG_NCR53C8XX |
7844 | printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n" , |
7845 | np->unit, device->id, device->lun, depth_to_use); |
7846 | #endif |
7847 | |
7848 | if (spi_support_sync(device->sdev_target) && |
7849 | !spi_initial_dv(device->sdev_target)) |
7850 | spi_dv_device(device); |
7851 | return 0; |
7852 | } |
7853 | |
7854 | static int ncr53c8xx_queue_command_lck(struct scsi_cmnd *cmd) |
7855 | { |
7856 | struct ncr_cmd_priv *cmd_priv = scsi_cmd_priv(cmd); |
7857 | void (*done)(struct scsi_cmnd *) = scsi_done; |
7858 | struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; |
7859 | unsigned long flags; |
7860 | int sts; |
7861 | |
7862 | #ifdef DEBUG_NCR53C8XX |
7863 | printk("ncr53c8xx_queue_command\n" ); |
7864 | #endif |
7865 | |
7866 | cmd->host_scribble = NULL; |
7867 | cmd_priv->data_mapped = 0; |
7868 | cmd_priv->data_mapping = 0; |
7869 | |
7870 | spin_lock_irqsave(&np->smp_lock, flags); |
7871 | |
7872 | if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { |
7873 | set_host_byte(cmd, status: sts); |
7874 | #ifdef DEBUG_NCR53C8XX |
7875 | printk("ncr53c8xx : command not queued - result=%d\n" , sts); |
7876 | #endif |
7877 | } |
7878 | #ifdef DEBUG_NCR53C8XX |
7879 | else |
7880 | printk("ncr53c8xx : command successfully queued\n" ); |
7881 | #endif |
7882 | |
7883 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
7884 | |
7885 | if (sts != DID_OK) { |
7886 | unmap_scsi_data(np, cmd); |
7887 | done(cmd); |
7888 | sts = 0; |
7889 | } |
7890 | |
7891 | return sts; |
7892 | } |
7893 | |
7894 | static DEF_SCSI_QCMD(ncr53c8xx_queue_command) |
7895 | |
7896 | irqreturn_t ncr53c8xx_intr(int irq, void *dev_id) |
7897 | { |
7898 | unsigned long flags; |
7899 | struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; |
7900 | struct host_data *host_data = (struct host_data *)shost->hostdata; |
7901 | struct ncb *np = host_data->ncb; |
7902 | struct scsi_cmnd *done_list; |
7903 | |
7904 | #ifdef DEBUG_NCR53C8XX |
7905 | printk("ncr53c8xx : interrupt received\n" ); |
7906 | #endif |
7907 | |
7908 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("[" ); |
7909 | |
7910 | spin_lock_irqsave(&np->smp_lock, flags); |
7911 | ncr_exception(np); |
7912 | done_list = np->done_list; |
7913 | np->done_list = NULL; |
7914 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
7915 | |
7916 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n" ); |
7917 | |
7918 | if (done_list) |
7919 | ncr_flush_done_cmds(lcmd: done_list); |
7920 | return IRQ_HANDLED; |
7921 | } |
7922 | |
7923 | static void ncr53c8xx_timeout(struct timer_list *t) |
7924 | { |
7925 | struct ncb *np = from_timer(np, t, timer); |
7926 | unsigned long flags; |
7927 | struct scsi_cmnd *done_list; |
7928 | |
7929 | spin_lock_irqsave(&np->smp_lock, flags); |
7930 | ncr_timeout(np); |
7931 | done_list = np->done_list; |
7932 | np->done_list = NULL; |
7933 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
7934 | |
7935 | if (done_list) |
7936 | ncr_flush_done_cmds(lcmd: done_list); |
7937 | } |
7938 | |
7939 | static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) |
7940 | { |
7941 | struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; |
7942 | int sts; |
7943 | unsigned long flags; |
7944 | struct scsi_cmnd *done_list; |
7945 | |
7946 | /* |
7947 | * If the mid-level driver told us reset is synchronous, it seems |
7948 | * that we must call the done() callback for the involved command, |
7949 | * even if this command was not queued to the low-level driver, |
7950 | * before returning SUCCESS. |
7951 | */ |
7952 | |
7953 | spin_lock_irqsave(&np->smp_lock, flags); |
7954 | sts = ncr_reset_bus(np); |
7955 | |
7956 | done_list = np->done_list; |
7957 | np->done_list = NULL; |
7958 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
7959 | |
7960 | ncr_flush_done_cmds(lcmd: done_list); |
7961 | |
7962 | return sts; |
7963 | } |
7964 | |
7965 | |
7966 | /* |
7967 | ** Scsi command waiting list management. |
7968 | ** |
7969 | ** It may happen that we cannot insert a scsi command into the start queue, |
7970 | ** in the following circumstances. |
7971 | ** Too few preallocated ccb(s), |
7972 | ** maxtags < cmd_per_lun of the Linux host control block, |
7973 | ** etc... |
7974 | ** Such scsi commands are inserted into a waiting list. |
7975 | ** When a scsi command complete, we try to requeue the commands of the |
7976 | ** waiting list. |
7977 | */ |
7978 | |
7979 | #define next_wcmd host_scribble |
7980 | |
7981 | static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) |
7982 | { |
7983 | struct scsi_cmnd *wcmd; |
7984 | |
7985 | #ifdef DEBUG_WAITING_LIST |
7986 | printk("%s: cmd %lx inserted into waiting list\n" , ncr_name(np), (u_long) cmd); |
7987 | #endif |
7988 | cmd->next_wcmd = NULL; |
7989 | if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; |
7990 | else { |
7991 | while (wcmd->next_wcmd) |
7992 | wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; |
7993 | wcmd->next_wcmd = (char *) cmd; |
7994 | } |
7995 | } |
7996 | |
7997 | static void process_waiting_list(struct ncb *np, int sts) |
7998 | { |
7999 | struct scsi_cmnd *waiting_list, *wcmd; |
8000 | |
8001 | waiting_list = np->waiting_list; |
8002 | np->waiting_list = NULL; |
8003 | |
8004 | #ifdef DEBUG_WAITING_LIST |
8005 | if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n" , ncr_name(np), (u_long) waiting_list, sts); |
8006 | #endif |
8007 | while ((wcmd = waiting_list) != NULL) { |
8008 | waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; |
8009 | wcmd->next_wcmd = NULL; |
8010 | if (sts == DID_OK) { |
8011 | #ifdef DEBUG_WAITING_LIST |
8012 | printk("%s: cmd %lx trying to requeue\n" , ncr_name(np), (u_long) wcmd); |
8013 | #endif |
8014 | sts = ncr_queue_command(np, cmd: wcmd); |
8015 | } |
8016 | if (sts != DID_OK) { |
8017 | #ifdef DEBUG_WAITING_LIST |
8018 | printk("%s: cmd %lx done forced sts=%d\n" , ncr_name(np), (u_long) wcmd, sts); |
8019 | #endif |
8020 | set_host_byte(cmd: wcmd, status: sts); |
8021 | ncr_queue_done_cmd(np, cmd: wcmd); |
8022 | } |
8023 | } |
8024 | } |
8025 | |
8026 | #undef next_wcmd |
8027 | |
8028 | static ssize_t show_ncr53c8xx_revision(struct device *dev, |
8029 | struct device_attribute *attr, char *buf) |
8030 | { |
8031 | struct Scsi_Host *host = class_to_shost(dev); |
8032 | struct host_data *host_data = (struct host_data *)host->hostdata; |
8033 | |
8034 | return snprintf(buf, size: 20, fmt: "0x%x\n" , host_data->ncb->revision_id); |
8035 | } |
8036 | |
8037 | static struct device_attribute ncr53c8xx_revision_attr = { |
8038 | .attr = { .name = "revision" , .mode = S_IRUGO, }, |
8039 | .show = show_ncr53c8xx_revision, |
8040 | }; |
8041 | |
8042 | static struct attribute *ncr53c8xx_host_attrs[] = { |
8043 | &ncr53c8xx_revision_attr.attr, |
8044 | NULL |
8045 | }; |
8046 | |
8047 | ATTRIBUTE_GROUPS(ncr53c8xx_host); |
8048 | |
8049 | /*========================================================== |
8050 | ** |
8051 | ** Boot command line. |
8052 | ** |
8053 | **========================================================== |
8054 | */ |
8055 | #ifdef MODULE |
8056 | char *ncr53c8xx; /* command line passed by insmod */ |
8057 | module_param(ncr53c8xx, charp, 0); |
8058 | #endif |
8059 | |
8060 | #ifndef MODULE |
8061 | static int __init ncr53c8xx_setup(char *str) |
8062 | { |
8063 | return sym53c8xx__setup(str); |
8064 | } |
8065 | |
8066 | __setup("ncr53c8xx=" , ncr53c8xx_setup); |
8067 | #endif |
8068 | |
8069 | |
8070 | /* |
8071 | * Host attach and initialisations. |
8072 | * |
8073 | * Allocate host data and ncb structure. |
8074 | * Request IO region and remap MMIO region. |
8075 | * Do chip initialization. |
8076 | * If all is OK, install interrupt handling and |
8077 | * start the timer daemon. |
8078 | */ |
8079 | struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, |
8080 | int unit, struct ncr_device *device) |
8081 | { |
8082 | struct host_data *host_data; |
8083 | struct ncb *np = NULL; |
8084 | struct Scsi_Host *instance = NULL; |
8085 | u_long flags = 0; |
8086 | int i; |
8087 | |
8088 | WARN_ON_ONCE(tpnt->cmd_size < sizeof(struct ncr_cmd_priv)); |
8089 | |
8090 | if (!tpnt->name) |
8091 | tpnt->name = SCSI_NCR_DRIVER_NAME; |
8092 | if (!tpnt->shost_groups) |
8093 | tpnt->shost_groups = ncr53c8xx_host_groups; |
8094 | |
8095 | tpnt->queuecommand = ncr53c8xx_queue_command; |
8096 | tpnt->slave_configure = ncr53c8xx_slave_configure; |
8097 | tpnt->slave_alloc = ncr53c8xx_slave_alloc; |
8098 | tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; |
8099 | tpnt->can_queue = SCSI_NCR_CAN_QUEUE; |
8100 | tpnt->this_id = 7; |
8101 | tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; |
8102 | tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; |
8103 | |
8104 | if (device->differential) |
8105 | driver_setup.diff_support = device->differential; |
8106 | |
8107 | printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n" , |
8108 | unit, device->chip.revision_id, device->slot.irq); |
8109 | |
8110 | instance = scsi_host_alloc(tpnt, sizeof(*host_data)); |
8111 | if (!instance) |
8112 | goto attach_error; |
8113 | host_data = (struct host_data *) instance->hostdata; |
8114 | |
8115 | np = __m_calloc_dma(bush: device->dev, size: sizeof(struct ncb), name: "NCB" ); |
8116 | if (!np) |
8117 | goto attach_error; |
8118 | spin_lock_init(&np->smp_lock); |
8119 | np->dev = device->dev; |
8120 | np->p_ncb = vtobus(np); |
8121 | host_data->ncb = np; |
8122 | |
8123 | np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB" ); |
8124 | if (!np->ccb) |
8125 | goto attach_error; |
8126 | |
8127 | /* Store input information in the host data structure. */ |
8128 | np->unit = unit; |
8129 | np->verbose = driver_setup.verbose; |
8130 | sprintf(buf: np->inst_name, fmt: "ncr53c720-%d" , np->unit); |
8131 | np->revision_id = device->chip.revision_id; |
8132 | np->features = device->chip.features; |
8133 | np->clock_divn = device->chip.nr_divisor; |
8134 | np->maxoffs = device->chip.offset_max; |
8135 | np->maxburst = device->chip.burst_max; |
8136 | np->myaddr = device->host_id; |
8137 | |
8138 | /* Allocate SCRIPTS areas. */ |
8139 | np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT" ); |
8140 | if (!np->script0) |
8141 | goto attach_error; |
8142 | np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH" ); |
8143 | if (!np->scripth0) |
8144 | goto attach_error; |
8145 | |
8146 | timer_setup(&np->timer, ncr53c8xx_timeout, 0); |
8147 | |
8148 | /* Try to map the controller chip to virtual and physical memory. */ |
8149 | |
8150 | np->paddr = device->slot.base; |
8151 | np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; |
8152 | |
8153 | if (device->slot.base_v) |
8154 | np->vaddr = device->slot.base_v; |
8155 | else |
8156 | np->vaddr = ioremap(offset: device->slot.base_c, size: 128); |
8157 | |
8158 | if (!np->vaddr) { |
8159 | printk(KERN_ERR |
8160 | "%s: can't map memory mapped IO region\n" ,ncr_name(np)); |
8161 | goto attach_error; |
8162 | } else { |
8163 | if (bootverbose > 1) |
8164 | printk(KERN_INFO |
8165 | "%s: using memory mapped IO at virtual address 0x%lx\n" , ncr_name(np), (u_long) np->vaddr); |
8166 | } |
8167 | |
8168 | /* Make the controller's registers available. Now the INB INW INL |
8169 | * OUTB OUTW OUTL macros can be used safely. |
8170 | */ |
8171 | |
8172 | np->reg = (struct ncr_reg __iomem *)np->vaddr; |
8173 | |
8174 | /* Do chip dependent initialization. */ |
8175 | ncr_prepare_setting(np); |
8176 | |
8177 | if (np->paddr2 && sizeof(struct script) > 4096) { |
8178 | np->paddr2 = 0; |
8179 | printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n" , |
8180 | ncr_name(np)); |
8181 | } |
8182 | |
8183 | instance->max_channel = 0; |
8184 | instance->this_id = np->myaddr; |
8185 | instance->max_id = np->maxwide ? 16 : 8; |
8186 | instance->max_lun = SCSI_NCR_MAX_LUN; |
8187 | instance->base = (unsigned long) np->reg; |
8188 | instance->irq = device->slot.irq; |
8189 | instance->unique_id = device->slot.base; |
8190 | instance->dma_channel = 0; |
8191 | instance->cmd_per_lun = MAX_TAGS; |
8192 | instance->can_queue = (MAX_START-4); |
8193 | /* This can happen if you forget to call ncr53c8xx_init from |
8194 | * your module_init */ |
8195 | BUG_ON(!ncr53c8xx_transport_template); |
8196 | instance->transportt = ncr53c8xx_transport_template; |
8197 | |
8198 | /* Patch script to physical addresses */ |
8199 | ncr_script_fill(scr: &script0, scrh: &scripth0); |
8200 | |
8201 | np->scripth = np->scripth0; |
8202 | np->p_scripth = vtobus(np->scripth); |
8203 | np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); |
8204 | |
8205 | ncr_script_copy_and_bind(np, src: (ncrcmd *) &script0, |
8206 | dst: (ncrcmd *) np->script0, len: sizeof(struct script)); |
8207 | ncr_script_copy_and_bind(np, src: (ncrcmd *) &scripth0, |
8208 | dst: (ncrcmd *) np->scripth0, len: sizeof(struct scripth)); |
8209 | np->ccb->p_ccb = vtobus (np->ccb); |
8210 | |
8211 | /* Patch the script for LED support. */ |
8212 | |
8213 | if (np->features & FE_LED0) { |
8214 | np->script0->idle[0] = |
8215 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); |
8216 | np->script0->reselected[0] = |
8217 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); |
8218 | np->script0->start[0] = |
8219 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); |
8220 | } |
8221 | |
8222 | /* |
8223 | * Look for the target control block of this nexus. |
8224 | * For i = 0 to 3 |
8225 | * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) |
8226 | */ |
8227 | for (i = 0 ; i < 4 ; i++) { |
8228 | np->jump_tcb[i].l_cmd = |
8229 | cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); |
8230 | np->jump_tcb[i].l_paddr = |
8231 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); |
8232 | } |
8233 | |
8234 | ncr_chip_reset(np, delay: 100); |
8235 | |
8236 | /* Now check the cache handling of the chipset. */ |
8237 | |
8238 | if (ncr_snooptest(np)) { |
8239 | printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n" ); |
8240 | goto attach_error; |
8241 | } |
8242 | |
8243 | /* Install the interrupt handler. */ |
8244 | np->irq = device->slot.irq; |
8245 | |
8246 | /* Initialize the fixed part of the default ccb. */ |
8247 | ncr_init_ccb(np, cp: np->ccb); |
8248 | |
8249 | /* |
8250 | * After SCSI devices have been opened, we cannot reset the bus |
8251 | * safely, so we do it here. Interrupt handler does the real work. |
8252 | * Process the reset exception if interrupts are not enabled yet. |
8253 | * Then enable disconnects. |
8254 | */ |
8255 | spin_lock_irqsave(&np->smp_lock, flags); |
8256 | if (ncr_reset_scsi_bus(np, enab_int: 0, settle_delay: driver_setup.settle_delay) != 0) { |
8257 | printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n" , ncr_name(np)); |
8258 | |
8259 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
8260 | goto attach_error; |
8261 | } |
8262 | ncr_exception(np); |
8263 | |
8264 | np->disc = 1; |
8265 | |
8266 | /* |
8267 | * The middle-level SCSI driver does not wait for devices to settle. |
8268 | * Wait synchronously if more than 2 seconds. |
8269 | */ |
8270 | if (driver_setup.settle_delay > 2) { |
8271 | printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n" , |
8272 | ncr_name(np), driver_setup.settle_delay); |
8273 | mdelay(1000 * driver_setup.settle_delay); |
8274 | } |
8275 | |
8276 | /* start the timeout daemon */ |
8277 | np->lasttime=0; |
8278 | ncr_timeout (np); |
8279 | |
8280 | /* use SIMPLE TAG messages by default */ |
8281 | #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG |
8282 | np->order = SIMPLE_QUEUE_TAG; |
8283 | #endif |
8284 | |
8285 | spin_unlock_irqrestore(lock: &np->smp_lock, flags); |
8286 | |
8287 | return instance; |
8288 | |
8289 | attach_error: |
8290 | if (!instance) |
8291 | return NULL; |
8292 | printk(KERN_INFO "%s: detaching...\n" , ncr_name(np)); |
8293 | if (!np) |
8294 | goto unregister; |
8295 | if (np->scripth0) |
8296 | m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH" ); |
8297 | if (np->script0) |
8298 | m_free_dma(np->script0, sizeof(struct script), "SCRIPT" ); |
8299 | if (np->ccb) |
8300 | m_free_dma(np->ccb, sizeof(struct ccb), "CCB" ); |
8301 | m_free_dma(np, sizeof(struct ncb), "NCB" ); |
8302 | host_data->ncb = NULL; |
8303 | |
8304 | unregister: |
8305 | scsi_host_put(t: instance); |
8306 | |
8307 | return NULL; |
8308 | } |
8309 | |
8310 | |
8311 | void ncr53c8xx_release(struct Scsi_Host *host) |
8312 | { |
8313 | struct host_data *host_data = shost_priv(shost: host); |
8314 | #ifdef DEBUG_NCR53C8XX |
8315 | printk("ncr53c8xx: release\n" ); |
8316 | #endif |
8317 | if (host_data->ncb) |
8318 | ncr_detach(np: host_data->ncb); |
8319 | scsi_host_put(t: host); |
8320 | } |
8321 | |
8322 | static void ncr53c8xx_set_period(struct scsi_target *starget, int period) |
8323 | { |
8324 | struct Scsi_Host *shost = dev_to_shost(dev: starget->dev.parent); |
8325 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8326 | struct tcb *tp = &np->target[starget->id]; |
8327 | |
8328 | if (period > np->maxsync) |
8329 | period = np->maxsync; |
8330 | else if (period < np->minsync) |
8331 | period = np->minsync; |
8332 | |
8333 | tp->usrsync = period; |
8334 | |
8335 | ncr_negotiate(np, tp); |
8336 | } |
8337 | |
8338 | static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) |
8339 | { |
8340 | struct Scsi_Host *shost = dev_to_shost(dev: starget->dev.parent); |
8341 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8342 | struct tcb *tp = &np->target[starget->id]; |
8343 | |
8344 | if (offset > np->maxoffs) |
8345 | offset = np->maxoffs; |
8346 | else if (offset < 0) |
8347 | offset = 0; |
8348 | |
8349 | tp->maxoffs = offset; |
8350 | |
8351 | ncr_negotiate(np, tp); |
8352 | } |
8353 | |
8354 | static void ncr53c8xx_set_width(struct scsi_target *starget, int width) |
8355 | { |
8356 | struct Scsi_Host *shost = dev_to_shost(dev: starget->dev.parent); |
8357 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8358 | struct tcb *tp = &np->target[starget->id]; |
8359 | |
8360 | if (width > np->maxwide) |
8361 | width = np->maxwide; |
8362 | else if (width < 0) |
8363 | width = 0; |
8364 | |
8365 | tp->usrwide = width; |
8366 | |
8367 | ncr_negotiate(np, tp); |
8368 | } |
8369 | |
8370 | static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) |
8371 | { |
8372 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8373 | enum spi_signal_type type; |
8374 | |
8375 | switch (np->scsi_mode) { |
8376 | case SMODE_SE: |
8377 | type = SPI_SIGNAL_SE; |
8378 | break; |
8379 | case SMODE_HVD: |
8380 | type = SPI_SIGNAL_HVD; |
8381 | break; |
8382 | default: |
8383 | type = SPI_SIGNAL_UNKNOWN; |
8384 | break; |
8385 | } |
8386 | spi_signalling(shost) = type; |
8387 | } |
8388 | |
8389 | static struct spi_function_template ncr53c8xx_transport_functions = { |
8390 | .set_period = ncr53c8xx_set_period, |
8391 | .show_period = 1, |
8392 | .set_offset = ncr53c8xx_set_offset, |
8393 | .show_offset = 1, |
8394 | .set_width = ncr53c8xx_set_width, |
8395 | .show_width = 1, |
8396 | .get_signalling = ncr53c8xx_get_signalling, |
8397 | }; |
8398 | |
8399 | int __init ncr53c8xx_init(void) |
8400 | { |
8401 | ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); |
8402 | if (!ncr53c8xx_transport_template) |
8403 | return -ENODEV; |
8404 | return 0; |
8405 | } |
8406 | |
8407 | void ncr53c8xx_exit(void) |
8408 | { |
8409 | spi_release_transport(ncr53c8xx_transport_template); |
8410 | } |
8411 | |