1 | // SPDX-License-Identifier: GPL-2.0 |
---|---|
2 | /* |
3 | * MAX3421 Host Controller driver for USB. |
4 | * |
5 | * Author: David Mosberger-Tang <davidm@egauge.net> |
6 | * |
7 | * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net> |
8 | * |
9 | * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host |
10 | * controller on a SPI bus. |
11 | * |
12 | * Based on: |
13 | * o MAX3421E datasheet |
14 | * https://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf |
15 | * o MAX3421E Programming Guide |
16 | * https://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf |
17 | * o gadget/dummy_hcd.c |
18 | * For USB HCD implementation. |
19 | * o Arduino MAX3421 driver |
20 | * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp |
21 | * |
22 | * This file is licenced under the GPL v2. |
23 | * |
24 | * Important note on worst-case (full-speed) packet size constraints |
25 | * (See USB 2.0 Section 5.6.3 and following): |
26 | * |
27 | * - control: 64 bytes |
28 | * - isochronous: 1023 bytes |
29 | * - interrupt: 64 bytes |
30 | * - bulk: 64 bytes |
31 | * |
32 | * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about |
33 | * multi-FIFO writes/reads for a single USB packet *except* for isochronous |
34 | * transfers. We don't support isochronous transfers at this time, so we |
35 | * just assume that a USB packet always fits into a single FIFO buffer. |
36 | * |
37 | * NOTE: The June 2006 version of "MAX3421E Programming Guide" |
38 | * (AN3785) has conflicting info for the RCVDAVIRQ bit: |
39 | * |
40 | * The description of RCVDAVIRQ says "The CPU *must* clear |
41 | * this IRQ bit (by writing a 1 to it) before reading the |
42 | * RCVFIFO data. |
43 | * |
44 | * However, the earlier section on "Programming BULK-IN |
45 | * Transfers" says * that: |
46 | * |
47 | * After the CPU retrieves the data, it clears the |
48 | * RCVDAVIRQ bit. |
49 | * |
50 | * The December 2006 version has been corrected and it consistently |
51 | * states the second behavior is the correct one. |
52 | * |
53 | * Synchronous SPI transactions sleep so we can't perform any such |
54 | * transactions while holding a spin-lock (and/or while interrupts are |
55 | * masked). To achieve this, all SPI transactions are issued from a |
56 | * single thread (max3421_spi_thread). |
57 | */ |
58 | |
59 | #include <linux/jiffies.h> |
60 | #include <linux/module.h> |
61 | #include <linux/spi/spi.h> |
62 | #include <linux/usb.h> |
63 | #include <linux/usb/hcd.h> |
64 | #include <linux/of.h> |
65 | |
66 | #include <linux/platform_data/max3421-hcd.h> |
67 | |
68 | #define DRIVER_DESC "MAX3421 USB Host-Controller Driver" |
69 | #define DRIVER_VERSION "1.0" |
70 | |
71 | /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */ |
72 | #define USB_MAX_FRAME_NUMBER 0x7ff |
73 | #define USB_MAX_RETRIES 3 /* # of retries before error is reported */ |
74 | |
75 | #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */ |
76 | |
77 | /* Port-change mask: */ |
78 | #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \ |
79 | USB_PORT_STAT_C_ENABLE | \ |
80 | USB_PORT_STAT_C_SUSPEND | \ |
81 | USB_PORT_STAT_C_OVERCURRENT | \ |
82 | USB_PORT_STAT_C_RESET) << 16) |
83 | |
84 | #define MAX3421_GPOUT_COUNT 8 |
85 | |
86 | enum max3421_rh_state { |
87 | MAX3421_RH_RESET, |
88 | MAX3421_RH_SUSPENDED, |
89 | MAX3421_RH_RUNNING |
90 | }; |
91 | |
92 | enum pkt_state { |
93 | PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */ |
94 | PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */ |
95 | PKT_STATE_TERMINATE /* waiting to terminate control transfer */ |
96 | }; |
97 | |
98 | enum scheduling_pass { |
99 | SCHED_PASS_PERIODIC, |
100 | SCHED_PASS_NON_PERIODIC, |
101 | SCHED_PASS_DONE |
102 | }; |
103 | |
104 | /* Bit numbers for max3421_hcd->todo: */ |
105 | enum { |
106 | ENABLE_IRQ = 0, |
107 | RESET_HCD, |
108 | RESET_PORT, |
109 | CHECK_UNLINK, |
110 | IOPIN_UPDATE |
111 | }; |
112 | |
113 | struct max3421_dma_buf { |
114 | u8 data[2]; |
115 | }; |
116 | |
117 | struct max3421_hcd { |
118 | spinlock_t lock; |
119 | |
120 | struct task_struct *spi_thread; |
121 | |
122 | enum max3421_rh_state rh_state; |
123 | /* lower 16 bits contain port status, upper 16 bits the change mask: */ |
124 | u32 port_status; |
125 | |
126 | unsigned active:1; |
127 | |
128 | struct list_head ep_list; /* list of EP's with work */ |
129 | |
130 | /* |
131 | * The following are owned by spi_thread (may be accessed by |
132 | * SPI-thread without acquiring the HCD lock: |
133 | */ |
134 | u8 rev; /* chip revision */ |
135 | u16 frame_number; |
136 | /* |
137 | * kmalloc'd buffers guaranteed to be in separate (DMA) |
138 | * cache-lines: |
139 | */ |
140 | struct max3421_dma_buf *tx; |
141 | struct max3421_dma_buf *rx; |
142 | /* |
143 | * URB we're currently processing. Must not be reset to NULL |
144 | * unless MAX3421E chip is idle: |
145 | */ |
146 | struct urb *curr_urb; |
147 | enum scheduling_pass sched_pass; |
148 | int urb_done; /* > 0 -> no errors, < 0: errno */ |
149 | size_t curr_len; |
150 | u8 hien; |
151 | u8 mode; |
152 | u8 iopins[2]; |
153 | unsigned long todo; |
154 | #ifdef DEBUG |
155 | unsigned long err_stat[16]; |
156 | #endif |
157 | }; |
158 | |
159 | struct max3421_ep { |
160 | struct usb_host_endpoint *ep; |
161 | struct list_head ep_list; |
162 | u32 naks; |
163 | u16 last_active; /* frame # this ep was last active */ |
164 | enum pkt_state pkt_state; |
165 | u8 retries; |
166 | u8 retransmit; /* packet needs retransmission */ |
167 | }; |
168 | |
169 | #define MAX3421_FIFO_SIZE 64 |
170 | |
171 | #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */ |
172 | #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */ |
173 | |
174 | /* SPI commands: */ |
175 | #define MAX3421_SPI_DIR_SHIFT 1 |
176 | #define MAX3421_SPI_REG_SHIFT 3 |
177 | |
178 | #define MAX3421_REG_RCVFIFO 1 |
179 | #define MAX3421_REG_SNDFIFO 2 |
180 | #define MAX3421_REG_SUDFIFO 4 |
181 | #define MAX3421_REG_RCVBC 6 |
182 | #define MAX3421_REG_SNDBC 7 |
183 | #define MAX3421_REG_USBIRQ 13 |
184 | #define MAX3421_REG_USBIEN 14 |
185 | #define MAX3421_REG_USBCTL 15 |
186 | #define MAX3421_REG_CPUCTL 16 |
187 | #define MAX3421_REG_PINCTL 17 |
188 | #define MAX3421_REG_REVISION 18 |
189 | #define MAX3421_REG_IOPINS1 20 |
190 | #define MAX3421_REG_IOPINS2 21 |
191 | #define MAX3421_REG_GPINIRQ 22 |
192 | #define MAX3421_REG_GPINIEN 23 |
193 | #define MAX3421_REG_GPINPOL 24 |
194 | #define MAX3421_REG_HIRQ 25 |
195 | #define MAX3421_REG_HIEN 26 |
196 | #define MAX3421_REG_MODE 27 |
197 | #define MAX3421_REG_PERADDR 28 |
198 | #define MAX3421_REG_HCTL 29 |
199 | #define MAX3421_REG_HXFR 30 |
200 | #define MAX3421_REG_HRSL 31 |
201 | |
202 | enum { |
203 | MAX3421_USBIRQ_OSCOKIRQ_BIT = 0, |
204 | MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5, |
205 | MAX3421_USBIRQ_VBUSIRQ_BIT |
206 | }; |
207 | |
208 | enum { |
209 | MAX3421_CPUCTL_IE_BIT = 0, |
210 | MAX3421_CPUCTL_PULSEWID0_BIT = 6, |
211 | MAX3421_CPUCTL_PULSEWID1_BIT |
212 | }; |
213 | |
214 | enum { |
215 | MAX3421_USBCTL_PWRDOWN_BIT = 4, |
216 | MAX3421_USBCTL_CHIPRES_BIT |
217 | }; |
218 | |
219 | enum { |
220 | MAX3421_PINCTL_GPXA_BIT = 0, |
221 | MAX3421_PINCTL_GPXB_BIT, |
222 | MAX3421_PINCTL_POSINT_BIT, |
223 | MAX3421_PINCTL_INTLEVEL_BIT, |
224 | MAX3421_PINCTL_FDUPSPI_BIT, |
225 | MAX3421_PINCTL_EP0INAK_BIT, |
226 | MAX3421_PINCTL_EP2INAK_BIT, |
227 | MAX3421_PINCTL_EP3INAK_BIT, |
228 | }; |
229 | |
230 | enum { |
231 | MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */ |
232 | MAX3421_HI_RWU_BIT, /* remote wakeup */ |
233 | MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */ |
234 | MAX3421_HI_SNDBAV_BIT, /* send buffer available */ |
235 | MAX3421_HI_SUSDN_BIT, /* suspend operation done */ |
236 | MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */ |
237 | MAX3421_HI_FRAME_BIT, /* frame generator */ |
238 | MAX3421_HI_HXFRDN_BIT, /* host transfer done */ |
239 | }; |
240 | |
241 | enum { |
242 | MAX3421_HCTL_BUSRST_BIT = 0, |
243 | MAX3421_HCTL_FRMRST_BIT, |
244 | MAX3421_HCTL_SAMPLEBUS_BIT, |
245 | MAX3421_HCTL_SIGRSM_BIT, |
246 | MAX3421_HCTL_RCVTOG0_BIT, |
247 | MAX3421_HCTL_RCVTOG1_BIT, |
248 | MAX3421_HCTL_SNDTOG0_BIT, |
249 | MAX3421_HCTL_SNDTOG1_BIT |
250 | }; |
251 | |
252 | enum { |
253 | MAX3421_MODE_HOST_BIT = 0, |
254 | MAX3421_MODE_LOWSPEED_BIT, |
255 | MAX3421_MODE_HUBPRE_BIT, |
256 | MAX3421_MODE_SOFKAENAB_BIT, |
257 | MAX3421_MODE_SEPIRQ_BIT, |
258 | MAX3421_MODE_DELAYISO_BIT, |
259 | MAX3421_MODE_DMPULLDN_BIT, |
260 | MAX3421_MODE_DPPULLDN_BIT |
261 | }; |
262 | |
263 | enum { |
264 | MAX3421_HRSL_OK = 0, |
265 | MAX3421_HRSL_BUSY, |
266 | MAX3421_HRSL_BADREQ, |
267 | MAX3421_HRSL_UNDEF, |
268 | MAX3421_HRSL_NAK, |
269 | MAX3421_HRSL_STALL, |
270 | MAX3421_HRSL_TOGERR, |
271 | MAX3421_HRSL_WRONGPID, |
272 | MAX3421_HRSL_BADBC, |
273 | MAX3421_HRSL_PIDERR, |
274 | MAX3421_HRSL_PKTERR, |
275 | MAX3421_HRSL_CRCERR, |
276 | MAX3421_HRSL_KERR, |
277 | MAX3421_HRSL_JERR, |
278 | MAX3421_HRSL_TIMEOUT, |
279 | MAX3421_HRSL_BABBLE, |
280 | MAX3421_HRSL_RESULT_MASK = 0xf, |
281 | MAX3421_HRSL_RCVTOGRD_BIT = 4, |
282 | MAX3421_HRSL_SNDTOGRD_BIT, |
283 | MAX3421_HRSL_KSTATUS_BIT, |
284 | MAX3421_HRSL_JSTATUS_BIT |
285 | }; |
286 | |
287 | /* Return same error-codes as ohci.h:cc_to_error: */ |
288 | static const int hrsl_to_error[] = { |
289 | [MAX3421_HRSL_OK] = 0, |
290 | [MAX3421_HRSL_BUSY] = -EINVAL, |
291 | [MAX3421_HRSL_BADREQ] = -EINVAL, |
292 | [MAX3421_HRSL_UNDEF] = -EINVAL, |
293 | [MAX3421_HRSL_NAK] = -EAGAIN, |
294 | [MAX3421_HRSL_STALL] = -EPIPE, |
295 | [MAX3421_HRSL_TOGERR] = -EILSEQ, |
296 | [MAX3421_HRSL_WRONGPID] = -EPROTO, |
297 | [MAX3421_HRSL_BADBC] = -EREMOTEIO, |
298 | [MAX3421_HRSL_PIDERR] = -EPROTO, |
299 | [MAX3421_HRSL_PKTERR] = -EPROTO, |
300 | [MAX3421_HRSL_CRCERR] = -EILSEQ, |
301 | [MAX3421_HRSL_KERR] = -EIO, |
302 | [MAX3421_HRSL_JERR] = -EIO, |
303 | [MAX3421_HRSL_TIMEOUT] = -ETIME, |
304 | [MAX3421_HRSL_BABBLE] = -EOVERFLOW |
305 | }; |
306 | |
307 | /* |
308 | * See https://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a |
309 | * reasonable overview of how control transfers use the IN/OUT |
310 | * tokens. |
311 | */ |
312 | #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */ |
313 | #define MAX3421_HXFR_SETUP 0x10 |
314 | #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */ |
315 | #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep)) |
316 | #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep)) |
317 | #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */ |
318 | #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */ |
319 | |
320 | #define field(val, bit) ((val) << (bit)) |
321 | |
322 | static inline s16 |
323 | frame_diff(u16 left, u16 right) |
324 | { |
325 | return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1); |
326 | } |
327 | |
328 | static inline struct max3421_hcd * |
329 | hcd_to_max3421(struct usb_hcd *hcd) |
330 | { |
331 | return (struct max3421_hcd *) hcd->hcd_priv; |
332 | } |
333 | |
334 | static inline struct usb_hcd * |
335 | max3421_to_hcd(struct max3421_hcd *max3421_hcd) |
336 | { |
337 | return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv); |
338 | } |
339 | |
340 | static u8 |
341 | spi_rd8(struct usb_hcd *hcd, unsigned int reg) |
342 | { |
343 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
344 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
345 | struct spi_transfer transfer; |
346 | struct spi_message msg; |
347 | |
348 | memset(&transfer, 0, sizeof(transfer)); |
349 | |
350 | spi_message_init(m: &msg); |
351 | |
352 | max3421_hcd->tx->data[0] = |
353 | (field(reg, MAX3421_SPI_REG_SHIFT) | |
354 | field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT)); |
355 | |
356 | transfer.tx_buf = max3421_hcd->tx->data; |
357 | transfer.rx_buf = max3421_hcd->rx->data; |
358 | transfer.len = 2; |
359 | |
360 | spi_message_add_tail(t: &transfer, m: &msg); |
361 | spi_sync(spi, message: &msg); |
362 | |
363 | return max3421_hcd->rx->data[1]; |
364 | } |
365 | |
366 | static void |
367 | spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val) |
368 | { |
369 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
370 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
371 | struct spi_transfer transfer; |
372 | struct spi_message msg; |
373 | |
374 | memset(&transfer, 0, sizeof(transfer)); |
375 | |
376 | spi_message_init(m: &msg); |
377 | |
378 | max3421_hcd->tx->data[0] = |
379 | (field(reg, MAX3421_SPI_REG_SHIFT) | |
380 | field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT)); |
381 | max3421_hcd->tx->data[1] = val; |
382 | |
383 | transfer.tx_buf = max3421_hcd->tx->data; |
384 | transfer.len = 2; |
385 | |
386 | spi_message_add_tail(t: &transfer, m: &msg); |
387 | spi_sync(spi, message: &msg); |
388 | } |
389 | |
390 | static void |
391 | spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len) |
392 | { |
393 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
394 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
395 | struct spi_transfer transfer[2]; |
396 | struct spi_message msg; |
397 | |
398 | memset(transfer, 0, sizeof(transfer)); |
399 | |
400 | spi_message_init(m: &msg); |
401 | |
402 | max3421_hcd->tx->data[0] = |
403 | (field(reg, MAX3421_SPI_REG_SHIFT) | |
404 | field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT)); |
405 | transfer[0].tx_buf = max3421_hcd->tx->data; |
406 | transfer[0].len = 1; |
407 | |
408 | transfer[1].rx_buf = buf; |
409 | transfer[1].len = len; |
410 | |
411 | spi_message_add_tail(t: &transfer[0], m: &msg); |
412 | spi_message_add_tail(t: &transfer[1], m: &msg); |
413 | spi_sync(spi, message: &msg); |
414 | } |
415 | |
416 | static void |
417 | spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len) |
418 | { |
419 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
420 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
421 | struct spi_transfer transfer[2]; |
422 | struct spi_message msg; |
423 | |
424 | memset(transfer, 0, sizeof(transfer)); |
425 | |
426 | spi_message_init(m: &msg); |
427 | |
428 | max3421_hcd->tx->data[0] = |
429 | (field(reg, MAX3421_SPI_REG_SHIFT) | |
430 | field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT)); |
431 | |
432 | transfer[0].tx_buf = max3421_hcd->tx->data; |
433 | transfer[0].len = 1; |
434 | |
435 | transfer[1].tx_buf = buf; |
436 | transfer[1].len = len; |
437 | |
438 | spi_message_add_tail(t: &transfer[0], m: &msg); |
439 | spi_message_add_tail(t: &transfer[1], m: &msg); |
440 | spi_sync(spi, message: &msg); |
441 | } |
442 | |
443 | /* |
444 | * Figure out the correct setting for the LOWSPEED and HUBPRE mode |
445 | * bits. The HUBPRE bit needs to be set when MAX3421E operates at |
446 | * full speed, but it's talking to a low-speed device (i.e., through a |
447 | * hub). Setting that bit ensures that every low-speed packet is |
448 | * preceded by a full-speed PRE PID. Possible configurations: |
449 | * |
450 | * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit: |
451 | * FULL FULL => 0 0 |
452 | * FULL LOW => 1 1 |
453 | * LOW LOW => 1 0 |
454 | * LOW FULL => 1 0 |
455 | */ |
456 | static void |
457 | max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev) |
458 | { |
459 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
460 | u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode; |
461 | |
462 | mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT); |
463 | mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT); |
464 | if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) { |
465 | mode |= mode_lowspeed; |
466 | mode &= ~mode_hubpre; |
467 | } else if (dev->speed == USB_SPEED_LOW) { |
468 | mode |= mode_lowspeed | mode_hubpre; |
469 | } else { |
470 | mode &= ~(mode_lowspeed | mode_hubpre); |
471 | } |
472 | if (mode != max3421_hcd->mode) { |
473 | max3421_hcd->mode = mode; |
474 | spi_wr8(hcd, MAX3421_REG_MODE, val: max3421_hcd->mode); |
475 | } |
476 | |
477 | } |
478 | |
479 | /* |
480 | * Caller must NOT hold HCD spinlock. |
481 | */ |
482 | static void |
483 | max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum) |
484 | { |
485 | int rcvtog, sndtog; |
486 | u8 hctl; |
487 | |
488 | /* setup new endpoint's toggle bits: */ |
489 | rcvtog = usb_gettoggle(dev, epnum, 0); |
490 | sndtog = usb_gettoggle(dev, epnum, 1); |
491 | hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) | |
492 | BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT)); |
493 | |
494 | spi_wr8(hcd, MAX3421_REG_HCTL, val: hctl); |
495 | |
496 | /* |
497 | * Note: devnum for one and the same device can change during |
498 | * address-assignment so it's best to just always load the |
499 | * address whenever the end-point changed/was forced. |
500 | */ |
501 | spi_wr8(hcd, MAX3421_REG_PERADDR, val: dev->devnum); |
502 | } |
503 | |
504 | static int |
505 | max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb) |
506 | { |
507 | spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, buf: urb->setup_packet, len: 8); |
508 | return MAX3421_HXFR_SETUP; |
509 | } |
510 | |
511 | static int |
512 | max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb) |
513 | { |
514 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
515 | int epnum = usb_pipeendpoint(urb->pipe); |
516 | |
517 | max3421_hcd->curr_len = 0; |
518 | max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT); |
519 | return MAX3421_HXFR_BULK_IN(epnum); |
520 | } |
521 | |
522 | static int |
523 | max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit) |
524 | { |
525 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
526 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
527 | int epnum = usb_pipeendpoint(urb->pipe); |
528 | u32 max_packet; |
529 | void *src; |
530 | |
531 | src = urb->transfer_buffer + urb->actual_length; |
532 | |
533 | if (fast_retransmit) { |
534 | if (max3421_hcd->rev == 0x12) { |
535 | /* work around rev 0x12 bug: */ |
536 | spi_wr8(hcd, MAX3421_REG_SNDBC, val: 0); |
537 | spi_wr8(hcd, MAX3421_REG_SNDFIFO, val: ((u8 *) src)[0]); |
538 | spi_wr8(hcd, MAX3421_REG_SNDBC, val: max3421_hcd->curr_len); |
539 | } |
540 | return MAX3421_HXFR_BULK_OUT(epnum); |
541 | } |
542 | |
543 | max_packet = usb_maxpacket(udev: urb->dev, pipe: urb->pipe); |
544 | |
545 | if (max_packet > MAX3421_FIFO_SIZE) { |
546 | /* |
547 | * We do not support isochronous transfers at this |
548 | * time. |
549 | */ |
550 | dev_err(&spi->dev, |
551 | "%s: packet-size of %u too big (limit is %u bytes)", |
552 | __func__, max_packet, MAX3421_FIFO_SIZE); |
553 | max3421_hcd->urb_done = -EMSGSIZE; |
554 | return -EMSGSIZE; |
555 | } |
556 | max3421_hcd->curr_len = min((urb->transfer_buffer_length - |
557 | urb->actual_length), max_packet); |
558 | |
559 | spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, buf: src, len: max3421_hcd->curr_len); |
560 | spi_wr8(hcd, MAX3421_REG_SNDBC, val: max3421_hcd->curr_len); |
561 | return MAX3421_HXFR_BULK_OUT(epnum); |
562 | } |
563 | |
564 | /* |
565 | * Issue the next host-transfer command. |
566 | * Caller must NOT hold HCD spinlock. |
567 | */ |
568 | static void |
569 | max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit) |
570 | { |
571 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
572 | struct urb *urb = max3421_hcd->curr_urb; |
573 | struct max3421_ep *max3421_ep; |
574 | int cmd = -EINVAL; |
575 | |
576 | if (!urb) |
577 | return; /* nothing to do */ |
578 | |
579 | max3421_ep = urb->ep->hcpriv; |
580 | |
581 | switch (max3421_ep->pkt_state) { |
582 | case PKT_STATE_SETUP: |
583 | cmd = max3421_ctrl_setup(hcd, urb); |
584 | break; |
585 | |
586 | case PKT_STATE_TRANSFER: |
587 | if (usb_urb_dir_in(urb)) |
588 | cmd = max3421_transfer_in(hcd, urb); |
589 | else |
590 | cmd = max3421_transfer_out(hcd, urb, fast_retransmit); |
591 | break; |
592 | |
593 | case PKT_STATE_TERMINATE: |
594 | /* |
595 | * IN transfers are terminated with HS_OUT token, |
596 | * OUT transfers with HS_IN: |
597 | */ |
598 | if (usb_urb_dir_in(urb)) |
599 | cmd = MAX3421_HXFR_HS_OUT; |
600 | else |
601 | cmd = MAX3421_HXFR_HS_IN; |
602 | break; |
603 | } |
604 | |
605 | if (cmd < 0) |
606 | return; |
607 | |
608 | /* issue the command and wait for host-xfer-done interrupt: */ |
609 | |
610 | spi_wr8(hcd, MAX3421_REG_HXFR, val: cmd); |
611 | max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT); |
612 | } |
613 | |
614 | /* |
615 | * Find the next URB to process and start its execution. |
616 | * |
617 | * At this time, we do not anticipate ever connecting a USB hub to the |
618 | * MAX3421 chip, so at most USB device can be connected and we can use |
619 | * a simplistic scheduler: at the start of a frame, schedule all |
620 | * periodic transfers. Once that is done, use the remainder of the |
621 | * frame to process non-periodic (bulk & control) transfers. |
622 | * |
623 | * Preconditions: |
624 | * o Caller must NOT hold HCD spinlock. |
625 | * o max3421_hcd->curr_urb MUST BE NULL. |
626 | * o MAX3421E chip must be idle. |
627 | */ |
628 | static int |
629 | max3421_select_and_start_urb(struct usb_hcd *hcd) |
630 | { |
631 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
632 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
633 | struct urb *urb, *curr_urb = NULL; |
634 | struct max3421_ep *max3421_ep; |
635 | int epnum; |
636 | struct usb_host_endpoint *ep; |
637 | struct list_head *pos; |
638 | unsigned long flags; |
639 | |
640 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
641 | |
642 | for (; |
643 | max3421_hcd->sched_pass < SCHED_PASS_DONE; |
644 | ++max3421_hcd->sched_pass) |
645 | list_for_each(pos, &max3421_hcd->ep_list) { |
646 | urb = NULL; |
647 | max3421_ep = container_of(pos, struct max3421_ep, |
648 | ep_list); |
649 | ep = max3421_ep->ep; |
650 | |
651 | switch (usb_endpoint_type(epd: &ep->desc)) { |
652 | case USB_ENDPOINT_XFER_ISOC: |
653 | case USB_ENDPOINT_XFER_INT: |
654 | if (max3421_hcd->sched_pass != |
655 | SCHED_PASS_PERIODIC) |
656 | continue; |
657 | break; |
658 | |
659 | case USB_ENDPOINT_XFER_CONTROL: |
660 | case USB_ENDPOINT_XFER_BULK: |
661 | if (max3421_hcd->sched_pass != |
662 | SCHED_PASS_NON_PERIODIC) |
663 | continue; |
664 | break; |
665 | } |
666 | |
667 | if (list_empty(head: &ep->urb_list)) |
668 | continue; /* nothing to do */ |
669 | urb = list_first_entry(&ep->urb_list, struct urb, |
670 | urb_list); |
671 | if (urb->unlinked) { |
672 | dev_dbg(&spi->dev, "%s: URB %p unlinked=%d", |
673 | __func__, urb, urb->unlinked); |
674 | max3421_hcd->curr_urb = urb; |
675 | max3421_hcd->urb_done = 1; |
676 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, |
677 | flags); |
678 | return 1; |
679 | } |
680 | |
681 | switch (usb_endpoint_type(epd: &ep->desc)) { |
682 | case USB_ENDPOINT_XFER_CONTROL: |
683 | /* |
684 | * Allow one control transaction per |
685 | * frame per endpoint: |
686 | */ |
687 | if (frame_diff(left: max3421_ep->last_active, |
688 | right: max3421_hcd->frame_number) == 0) |
689 | continue; |
690 | break; |
691 | |
692 | case USB_ENDPOINT_XFER_BULK: |
693 | if (max3421_ep->retransmit |
694 | && (frame_diff(left: max3421_ep->last_active, |
695 | right: max3421_hcd->frame_number) |
696 | == 0)) |
697 | /* |
698 | * We already tried this EP |
699 | * during this frame and got a |
700 | * NAK or error; wait for next frame |
701 | */ |
702 | continue; |
703 | break; |
704 | |
705 | case USB_ENDPOINT_XFER_ISOC: |
706 | case USB_ENDPOINT_XFER_INT: |
707 | if (frame_diff(left: max3421_hcd->frame_number, |
708 | right: max3421_ep->last_active) |
709 | < urb->interval) |
710 | /* |
711 | * We already processed this |
712 | * end-point in the current |
713 | * frame |
714 | */ |
715 | continue; |
716 | break; |
717 | } |
718 | |
719 | /* move current ep to tail: */ |
720 | list_move_tail(list: pos, head: &max3421_hcd->ep_list); |
721 | curr_urb = urb; |
722 | goto done; |
723 | } |
724 | done: |
725 | if (!curr_urb) { |
726 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
727 | return 0; |
728 | } |
729 | |
730 | urb = max3421_hcd->curr_urb = curr_urb; |
731 | epnum = usb_endpoint_num(epd: &urb->ep->desc); |
732 | if (max3421_ep->retransmit) |
733 | /* restart (part of) a USB transaction: */ |
734 | max3421_ep->retransmit = 0; |
735 | else { |
736 | /* start USB transaction: */ |
737 | if (usb_endpoint_xfer_control(epd: &ep->desc)) { |
738 | /* |
739 | * See USB 2.0 spec section 8.6.1 |
740 | * Initialization via SETUP Token: |
741 | */ |
742 | usb_settoggle(urb->dev, epnum, 0, 1); |
743 | usb_settoggle(urb->dev, epnum, 1, 1); |
744 | max3421_ep->pkt_state = PKT_STATE_SETUP; |
745 | } else |
746 | max3421_ep->pkt_state = PKT_STATE_TRANSFER; |
747 | } |
748 | |
749 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
750 | |
751 | max3421_ep->last_active = max3421_hcd->frame_number; |
752 | max3421_set_address(hcd, dev: urb->dev, epnum); |
753 | max3421_set_speed(hcd, dev: urb->dev); |
754 | max3421_next_transfer(hcd, fast_retransmit: 0); |
755 | return 1; |
756 | } |
757 | |
758 | /* |
759 | * Check all endpoints for URBs that got unlinked. |
760 | * |
761 | * Caller must NOT hold HCD spinlock. |
762 | */ |
763 | static int |
764 | max3421_check_unlink(struct usb_hcd *hcd) |
765 | { |
766 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
767 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
768 | struct max3421_ep *max3421_ep; |
769 | struct usb_host_endpoint *ep; |
770 | struct urb *urb, *next; |
771 | unsigned long flags; |
772 | int retval = 0; |
773 | |
774 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
775 | list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) { |
776 | ep = max3421_ep->ep; |
777 | list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) { |
778 | if (urb->unlinked) { |
779 | retval = 1; |
780 | dev_dbg(&spi->dev, "%s: URB %p unlinked=%d", |
781 | __func__, urb, urb->unlinked); |
782 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
783 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, |
784 | flags); |
785 | usb_hcd_giveback_urb(hcd, urb, status: 0); |
786 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
787 | } |
788 | } |
789 | } |
790 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
791 | return retval; |
792 | } |
793 | |
794 | /* |
795 | * Caller must NOT hold HCD spinlock. |
796 | */ |
797 | static void |
798 | max3421_slow_retransmit(struct usb_hcd *hcd) |
799 | { |
800 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
801 | struct urb *urb = max3421_hcd->curr_urb; |
802 | struct max3421_ep *max3421_ep; |
803 | |
804 | max3421_ep = urb->ep->hcpriv; |
805 | max3421_ep->retransmit = 1; |
806 | max3421_hcd->curr_urb = NULL; |
807 | } |
808 | |
809 | /* |
810 | * Caller must NOT hold HCD spinlock. |
811 | */ |
812 | static void |
813 | max3421_recv_data_available(struct usb_hcd *hcd) |
814 | { |
815 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
816 | struct urb *urb = max3421_hcd->curr_urb; |
817 | size_t remaining, transfer_size; |
818 | u8 rcvbc; |
819 | |
820 | rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC); |
821 | |
822 | if (rcvbc > MAX3421_FIFO_SIZE) |
823 | rcvbc = MAX3421_FIFO_SIZE; |
824 | if (urb->actual_length >= urb->transfer_buffer_length) |
825 | remaining = 0; |
826 | else |
827 | remaining = urb->transfer_buffer_length - urb->actual_length; |
828 | transfer_size = rcvbc; |
829 | if (transfer_size > remaining) |
830 | transfer_size = remaining; |
831 | if (transfer_size > 0) { |
832 | void *dst = urb->transfer_buffer + urb->actual_length; |
833 | |
834 | spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, buf: dst, len: transfer_size); |
835 | urb->actual_length += transfer_size; |
836 | max3421_hcd->curr_len = transfer_size; |
837 | } |
838 | |
839 | /* ack the RCVDAV irq now that the FIFO has been read: */ |
840 | spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT)); |
841 | } |
842 | |
843 | static void |
844 | max3421_handle_error(struct usb_hcd *hcd, u8 hrsl) |
845 | { |
846 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
847 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
848 | u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK; |
849 | struct urb *urb = max3421_hcd->curr_urb; |
850 | struct max3421_ep *max3421_ep = urb->ep->hcpriv; |
851 | int switch_sndfifo; |
852 | |
853 | /* |
854 | * If an OUT command results in any response other than OK |
855 | * (i.e., error or NAK), we have to perform a dummy-write to |
856 | * SNDBC so the FIFO gets switched back to us. Otherwise, we |
857 | * get out of sync with the SNDFIFO double buffer. |
858 | */ |
859 | switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER && |
860 | usb_urb_dir_out(urb)); |
861 | |
862 | switch (result_code) { |
863 | case MAX3421_HRSL_OK: |
864 | return; /* this shouldn't happen */ |
865 | |
866 | case MAX3421_HRSL_WRONGPID: /* received wrong PID */ |
867 | case MAX3421_HRSL_BUSY: /* SIE busy */ |
868 | case MAX3421_HRSL_BADREQ: /* bad val in HXFR */ |
869 | case MAX3421_HRSL_UNDEF: /* reserved */ |
870 | case MAX3421_HRSL_KERR: /* K-state instead of response */ |
871 | case MAX3421_HRSL_JERR: /* J-state instead of response */ |
872 | /* |
873 | * packet experienced an error that we cannot recover |
874 | * from; report error |
875 | */ |
876 | max3421_hcd->urb_done = hrsl_to_error[result_code]; |
877 | dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x", |
878 | __func__, hrsl); |
879 | break; |
880 | |
881 | case MAX3421_HRSL_TOGERR: |
882 | if (usb_urb_dir_in(urb)) |
883 | ; /* don't do anything (device will switch toggle) */ |
884 | else { |
885 | /* flip the send toggle bit: */ |
886 | int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1; |
887 | |
888 | sndtog ^= 1; |
889 | spi_wr8(hcd, MAX3421_REG_HCTL, |
890 | BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT)); |
891 | } |
892 | fallthrough; |
893 | case MAX3421_HRSL_BADBC: /* bad byte count */ |
894 | case MAX3421_HRSL_PIDERR: /* received PID is corrupted */ |
895 | case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */ |
896 | case MAX3421_HRSL_CRCERR: /* CRC error */ |
897 | case MAX3421_HRSL_BABBLE: /* device talked too long */ |
898 | case MAX3421_HRSL_TIMEOUT: |
899 | if (max3421_ep->retries++ < USB_MAX_RETRIES) |
900 | /* retry the packet again in the next frame */ |
901 | max3421_slow_retransmit(hcd); |
902 | else { |
903 | /* Based on ohci.h cc_to_err[]: */ |
904 | max3421_hcd->urb_done = hrsl_to_error[result_code]; |
905 | dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x", |
906 | __func__, hrsl); |
907 | } |
908 | break; |
909 | |
910 | case MAX3421_HRSL_STALL: |
911 | dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x", |
912 | __func__, hrsl); |
913 | max3421_hcd->urb_done = hrsl_to_error[result_code]; |
914 | break; |
915 | |
916 | case MAX3421_HRSL_NAK: |
917 | /* |
918 | * Device wasn't ready for data or has no data |
919 | * available: retry the packet again. |
920 | */ |
921 | max3421_next_transfer(hcd, fast_retransmit: 1); |
922 | switch_sndfifo = 0; |
923 | break; |
924 | } |
925 | if (switch_sndfifo) |
926 | spi_wr8(hcd, MAX3421_REG_SNDBC, val: 0); |
927 | } |
928 | |
929 | /* |
930 | * Caller must NOT hold HCD spinlock. |
931 | */ |
932 | static int |
933 | max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb) |
934 | { |
935 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
936 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
937 | u32 max_packet; |
938 | |
939 | if (urb->actual_length >= urb->transfer_buffer_length) |
940 | return 1; /* read is complete, so we're done */ |
941 | |
942 | /* |
943 | * USB 2.0 Section 5.3.2 Pipes: packets must be full size |
944 | * except for last one. |
945 | */ |
946 | max_packet = usb_maxpacket(udev: urb->dev, pipe: urb->pipe); |
947 | if (max_packet > MAX3421_FIFO_SIZE) { |
948 | /* |
949 | * We do not support isochronous transfers at this |
950 | * time... |
951 | */ |
952 | dev_err(&spi->dev, |
953 | "%s: packet-size of %u too big (limit is %u bytes)", |
954 | __func__, max_packet, MAX3421_FIFO_SIZE); |
955 | return -EINVAL; |
956 | } |
957 | |
958 | if (max3421_hcd->curr_len < max_packet) { |
959 | if (urb->transfer_flags & URB_SHORT_NOT_OK) { |
960 | /* |
961 | * remaining > 0 and received an |
962 | * unexpected partial packet -> |
963 | * error |
964 | */ |
965 | return -EREMOTEIO; |
966 | } else |
967 | /* short read, but it's OK */ |
968 | return 1; |
969 | } |
970 | return 0; /* not done */ |
971 | } |
972 | |
973 | /* |
974 | * Caller must NOT hold HCD spinlock. |
975 | */ |
976 | static int |
977 | max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb) |
978 | { |
979 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
980 | |
981 | urb->actual_length += max3421_hcd->curr_len; |
982 | if (urb->actual_length < urb->transfer_buffer_length) |
983 | return 0; |
984 | if (urb->transfer_flags & URB_ZERO_PACKET) { |
985 | /* |
986 | * Some hardware needs a zero-size packet at the end |
987 | * of a bulk-out transfer if the last transfer was a |
988 | * full-sized packet (i.e., such hardware use < |
989 | * max_packet as an indicator that the end of the |
990 | * packet has been reached). |
991 | */ |
992 | u32 max_packet = usb_maxpacket(udev: urb->dev, pipe: urb->pipe); |
993 | |
994 | if (max3421_hcd->curr_len == max_packet) |
995 | return 0; |
996 | } |
997 | return 1; |
998 | } |
999 | |
1000 | /* |
1001 | * Caller must NOT hold HCD spinlock. |
1002 | */ |
1003 | static void |
1004 | max3421_host_transfer_done(struct usb_hcd *hcd) |
1005 | { |
1006 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1007 | struct urb *urb = max3421_hcd->curr_urb; |
1008 | struct max3421_ep *max3421_ep; |
1009 | u8 result_code, hrsl; |
1010 | int urb_done = 0; |
1011 | |
1012 | max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) | |
1013 | BIT(MAX3421_HI_RCVDAV_BIT)); |
1014 | |
1015 | hrsl = spi_rd8(hcd, MAX3421_REG_HRSL); |
1016 | result_code = hrsl & MAX3421_HRSL_RESULT_MASK; |
1017 | |
1018 | #ifdef DEBUG |
1019 | ++max3421_hcd->err_stat[result_code]; |
1020 | #endif |
1021 | |
1022 | max3421_ep = urb->ep->hcpriv; |
1023 | |
1024 | if (unlikely(result_code != MAX3421_HRSL_OK)) { |
1025 | max3421_handle_error(hcd, hrsl); |
1026 | return; |
1027 | } |
1028 | |
1029 | max3421_ep->naks = 0; |
1030 | max3421_ep->retries = 0; |
1031 | switch (max3421_ep->pkt_state) { |
1032 | |
1033 | case PKT_STATE_SETUP: |
1034 | if (urb->transfer_buffer_length > 0) |
1035 | max3421_ep->pkt_state = PKT_STATE_TRANSFER; |
1036 | else |
1037 | max3421_ep->pkt_state = PKT_STATE_TERMINATE; |
1038 | break; |
1039 | |
1040 | case PKT_STATE_TRANSFER: |
1041 | if (usb_urb_dir_in(urb)) |
1042 | urb_done = max3421_transfer_in_done(hcd, urb); |
1043 | else |
1044 | urb_done = max3421_transfer_out_done(hcd, urb); |
1045 | if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) { |
1046 | /* |
1047 | * We aren't really done - we still need to |
1048 | * terminate the control transfer: |
1049 | */ |
1050 | max3421_hcd->urb_done = urb_done = 0; |
1051 | max3421_ep->pkt_state = PKT_STATE_TERMINATE; |
1052 | } |
1053 | break; |
1054 | |
1055 | case PKT_STATE_TERMINATE: |
1056 | urb_done = 1; |
1057 | break; |
1058 | } |
1059 | |
1060 | if (urb_done) |
1061 | max3421_hcd->urb_done = urb_done; |
1062 | else |
1063 | max3421_next_transfer(hcd, fast_retransmit: 0); |
1064 | } |
1065 | |
1066 | /* |
1067 | * Caller must NOT hold HCD spinlock. |
1068 | */ |
1069 | static void |
1070 | max3421_detect_conn(struct usb_hcd *hcd) |
1071 | { |
1072 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1073 | unsigned int jk, have_conn = 0; |
1074 | u32 old_port_status, chg; |
1075 | unsigned long flags; |
1076 | u8 hrsl, mode; |
1077 | |
1078 | hrsl = spi_rd8(hcd, MAX3421_REG_HRSL); |
1079 | |
1080 | jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) | |
1081 | (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1)); |
1082 | |
1083 | mode = max3421_hcd->mode; |
1084 | |
1085 | switch (jk) { |
1086 | case 0x0: /* SE0: disconnect */ |
1087 | /* |
1088 | * Turn off SOFKAENAB bit to avoid getting interrupt |
1089 | * every milli-second: |
1090 | */ |
1091 | mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT); |
1092 | break; |
1093 | |
1094 | case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */ |
1095 | case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */ |
1096 | if (jk == 0x2) |
1097 | /* need to switch to the other speed: */ |
1098 | mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT); |
1099 | /* turn on SOFKAENAB bit: */ |
1100 | mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT); |
1101 | have_conn = 1; |
1102 | break; |
1103 | |
1104 | case 0x3: /* illegal */ |
1105 | break; |
1106 | } |
1107 | |
1108 | max3421_hcd->mode = mode; |
1109 | spi_wr8(hcd, MAX3421_REG_MODE, val: max3421_hcd->mode); |
1110 | |
1111 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1112 | old_port_status = max3421_hcd->port_status; |
1113 | if (have_conn) |
1114 | max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION; |
1115 | else |
1116 | max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION; |
1117 | if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT)) |
1118 | max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED; |
1119 | else |
1120 | max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED; |
1121 | chg = (old_port_status ^ max3421_hcd->port_status); |
1122 | max3421_hcd->port_status |= chg << 16; |
1123 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1124 | } |
1125 | |
1126 | static irqreturn_t |
1127 | max3421_irq_handler(int irq, void *dev_id) |
1128 | { |
1129 | struct usb_hcd *hcd = dev_id; |
1130 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
1131 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1132 | |
1133 | if (max3421_hcd->spi_thread) |
1134 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1135 | if (!test_and_set_bit(nr: ENABLE_IRQ, addr: &max3421_hcd->todo)) |
1136 | disable_irq_nosync(irq: spi->irq); |
1137 | return IRQ_HANDLED; |
1138 | } |
1139 | |
1140 | #ifdef DEBUG |
1141 | |
1142 | static void |
1143 | dump_eps(struct usb_hcd *hcd) |
1144 | { |
1145 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1146 | struct max3421_ep *max3421_ep; |
1147 | struct usb_host_endpoint *ep; |
1148 | char ubuf[512], *dp, *end; |
1149 | unsigned long flags; |
1150 | struct urb *urb; |
1151 | int epnum, ret; |
1152 | |
1153 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1154 | list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) { |
1155 | ep = max3421_ep->ep; |
1156 | |
1157 | dp = ubuf; |
1158 | end = dp + sizeof(ubuf); |
1159 | *dp = '\0'; |
1160 | list_for_each_entry(urb, &ep->urb_list, urb_list) { |
1161 | ret = scnprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb, |
1162 | usb_pipetype(urb->pipe), |
1163 | usb_urb_dir_in(urb) ? "IN": "OUT", |
1164 | urb->actual_length, |
1165 | urb->transfer_buffer_length); |
1166 | if (ret == end - dp - 1) |
1167 | break; /* error or buffer full */ |
1168 | dp += ret; |
1169 | } |
1170 | |
1171 | epnum = usb_endpoint_num(&ep->desc); |
1172 | pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n", |
1173 | epnum, max3421_ep->pkt_state, max3421_ep->last_active, |
1174 | max3421_ep->retries, max3421_ep->naks, |
1175 | max3421_ep->retransmit, ubuf); |
1176 | } |
1177 | spin_unlock_irqrestore(&max3421_hcd->lock, flags); |
1178 | } |
1179 | |
1180 | #endif /* DEBUG */ |
1181 | |
1182 | /* Return zero if no work was performed, 1 otherwise. */ |
1183 | static int |
1184 | max3421_handle_irqs(struct usb_hcd *hcd) |
1185 | { |
1186 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1187 | u32 chg, old_port_status; |
1188 | unsigned long flags; |
1189 | u8 hirq; |
1190 | |
1191 | /* |
1192 | * Read and ack pending interrupts (CPU must never |
1193 | * clear SNDBAV directly and RCVDAV must be cleared by |
1194 | * max3421_recv_data_available()!): |
1195 | */ |
1196 | hirq = spi_rd8(hcd, MAX3421_REG_HIRQ); |
1197 | hirq &= max3421_hcd->hien; |
1198 | if (!hirq) |
1199 | return 0; |
1200 | |
1201 | spi_wr8(hcd, MAX3421_REG_HIRQ, |
1202 | val: hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) | |
1203 | BIT(MAX3421_HI_RCVDAV_BIT))); |
1204 | |
1205 | if (hirq & BIT(MAX3421_HI_FRAME_BIT)) { |
1206 | max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1) |
1207 | & USB_MAX_FRAME_NUMBER); |
1208 | max3421_hcd->sched_pass = SCHED_PASS_PERIODIC; |
1209 | } |
1210 | |
1211 | if (hirq & BIT(MAX3421_HI_RCVDAV_BIT)) |
1212 | max3421_recv_data_available(hcd); |
1213 | |
1214 | if (hirq & BIT(MAX3421_HI_HXFRDN_BIT)) |
1215 | max3421_host_transfer_done(hcd); |
1216 | |
1217 | if (hirq & BIT(MAX3421_HI_CONDET_BIT)) |
1218 | max3421_detect_conn(hcd); |
1219 | |
1220 | /* |
1221 | * Now process interrupts that may affect HCD state |
1222 | * other than the end-points: |
1223 | */ |
1224 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1225 | |
1226 | old_port_status = max3421_hcd->port_status; |
1227 | if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) { |
1228 | if (max3421_hcd->port_status & USB_PORT_STAT_RESET) { |
1229 | /* BUSEVENT due to completion of Bus Reset */ |
1230 | max3421_hcd->port_status &= ~USB_PORT_STAT_RESET; |
1231 | max3421_hcd->port_status |= USB_PORT_STAT_ENABLE; |
1232 | } else { |
1233 | /* BUSEVENT due to completion of Bus Resume */ |
1234 | pr_info("%s: BUSEVENT Bus Resume Done\n", __func__); |
1235 | } |
1236 | } |
1237 | if (hirq & BIT(MAX3421_HI_RWU_BIT)) |
1238 | pr_info("%s: RWU\n", __func__); |
1239 | if (hirq & BIT(MAX3421_HI_SUSDN_BIT)) |
1240 | pr_info("%s: SUSDN\n", __func__); |
1241 | |
1242 | chg = (old_port_status ^ max3421_hcd->port_status); |
1243 | max3421_hcd->port_status |= chg << 16; |
1244 | |
1245 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1246 | |
1247 | #ifdef DEBUG |
1248 | { |
1249 | static unsigned long last_time; |
1250 | char sbuf[16 * 16], *dp, *end; |
1251 | int i; |
1252 | |
1253 | if (time_after(jiffies, last_time + 5*HZ)) { |
1254 | dp = sbuf; |
1255 | end = sbuf + sizeof(sbuf); |
1256 | *dp = '\0'; |
1257 | for (i = 0; i < 16; ++i) { |
1258 | int ret = scnprintf(dp, end - dp, " %lu", |
1259 | max3421_hcd->err_stat[i]); |
1260 | if (ret == end - dp - 1) |
1261 | break; /* error or buffer full */ |
1262 | dp += ret; |
1263 | } |
1264 | pr_info("%s: hrsl_stats %s\n", __func__, sbuf); |
1265 | memset(max3421_hcd->err_stat, 0, |
1266 | sizeof(max3421_hcd->err_stat)); |
1267 | last_time = jiffies; |
1268 | |
1269 | dump_eps(hcd); |
1270 | } |
1271 | } |
1272 | #endif |
1273 | return 1; |
1274 | } |
1275 | |
1276 | static int |
1277 | max3421_reset_hcd(struct usb_hcd *hcd) |
1278 | { |
1279 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
1280 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1281 | int timeout; |
1282 | |
1283 | /* perform a chip reset and wait for OSCIRQ signal to appear: */ |
1284 | spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT)); |
1285 | /* clear reset: */ |
1286 | spi_wr8(hcd, MAX3421_REG_USBCTL, val: 0); |
1287 | timeout = 1000; |
1288 | while (1) { |
1289 | if (spi_rd8(hcd, MAX3421_REG_USBIRQ) |
1290 | & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT)) |
1291 | break; |
1292 | if (--timeout < 0) { |
1293 | dev_err(&spi->dev, |
1294 | "timed out waiting for oscillator OK signal"); |
1295 | return 1; |
1296 | } |
1297 | cond_resched(); |
1298 | } |
1299 | |
1300 | /* |
1301 | * Turn on host mode, automatic generation of SOF packets, and |
1302 | * enable pull-down registers on DM/DP: |
1303 | */ |
1304 | max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) | |
1305 | BIT(MAX3421_MODE_SOFKAENAB_BIT) | |
1306 | BIT(MAX3421_MODE_DMPULLDN_BIT) | |
1307 | BIT(MAX3421_MODE_DPPULLDN_BIT)); |
1308 | spi_wr8(hcd, MAX3421_REG_MODE, val: max3421_hcd->mode); |
1309 | |
1310 | /* reset frame-number: */ |
1311 | max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER; |
1312 | spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT)); |
1313 | |
1314 | /* sample the state of the D+ and D- lines */ |
1315 | spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT)); |
1316 | max3421_detect_conn(hcd); |
1317 | |
1318 | /* enable frame, connection-detected, and bus-event interrupts: */ |
1319 | max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) | |
1320 | BIT(MAX3421_HI_CONDET_BIT) | |
1321 | BIT(MAX3421_HI_BUSEVENT_BIT)); |
1322 | spi_wr8(hcd, MAX3421_REG_HIEN, val: max3421_hcd->hien); |
1323 | |
1324 | /* enable interrupts: */ |
1325 | spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT)); |
1326 | return 1; |
1327 | } |
1328 | |
1329 | static int |
1330 | max3421_urb_done(struct usb_hcd *hcd) |
1331 | { |
1332 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1333 | unsigned long flags; |
1334 | struct urb *urb; |
1335 | int status; |
1336 | |
1337 | status = max3421_hcd->urb_done; |
1338 | max3421_hcd->urb_done = 0; |
1339 | if (status > 0) |
1340 | status = 0; |
1341 | urb = max3421_hcd->curr_urb; |
1342 | if (urb) { |
1343 | /* save the old end-points toggles: */ |
1344 | u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL); |
1345 | int rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1; |
1346 | int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1; |
1347 | int epnum = usb_endpoint_num(epd: &urb->ep->desc); |
1348 | |
1349 | /* no locking: HCD (i.e., we) own toggles, don't we? */ |
1350 | usb_settoggle(urb->dev, epnum, 0, rcvtog); |
1351 | usb_settoggle(urb->dev, epnum, 1, sndtog); |
1352 | |
1353 | max3421_hcd->curr_urb = NULL; |
1354 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1355 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
1356 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1357 | |
1358 | /* must be called without the HCD spinlock: */ |
1359 | usb_hcd_giveback_urb(hcd, urb, status); |
1360 | } |
1361 | return 1; |
1362 | } |
1363 | |
1364 | static int |
1365 | max3421_spi_thread(void *dev_id) |
1366 | { |
1367 | struct usb_hcd *hcd = dev_id; |
1368 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
1369 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1370 | int i, i_worked = 1; |
1371 | |
1372 | /* set full-duplex SPI mode, low-active interrupt pin: */ |
1373 | spi_wr8(hcd, MAX3421_REG_PINCTL, |
1374 | val: (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */ |
1375 | BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */ |
1376 | |
1377 | while (!kthread_should_stop()) { |
1378 | max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION); |
1379 | if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13) |
1380 | break; |
1381 | dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev); |
1382 | msleep(msecs: 10000); |
1383 | } |
1384 | dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n", |
1385 | max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word, |
1386 | spi->irq); |
1387 | |
1388 | while (!kthread_should_stop()) { |
1389 | if (!i_worked) { |
1390 | /* |
1391 | * We'll be waiting for wakeups from the hard |
1392 | * interrupt handler, so now is a good time to |
1393 | * sync our hien with the chip: |
1394 | */ |
1395 | spi_wr8(hcd, MAX3421_REG_HIEN, val: max3421_hcd->hien); |
1396 | |
1397 | set_current_state(TASK_INTERRUPTIBLE); |
1398 | if (test_and_clear_bit(nr: ENABLE_IRQ, addr: &max3421_hcd->todo)) |
1399 | enable_irq(irq: spi->irq); |
1400 | schedule(); |
1401 | __set_current_state(TASK_RUNNING); |
1402 | } |
1403 | |
1404 | i_worked = 0; |
1405 | |
1406 | if (max3421_hcd->urb_done) |
1407 | i_worked |= max3421_urb_done(hcd); |
1408 | else if (max3421_handle_irqs(hcd)) |
1409 | i_worked = 1; |
1410 | else if (!max3421_hcd->curr_urb) |
1411 | i_worked |= max3421_select_and_start_urb(hcd); |
1412 | |
1413 | if (test_and_clear_bit(nr: RESET_HCD, addr: &max3421_hcd->todo)) |
1414 | /* reset the HCD: */ |
1415 | i_worked |= max3421_reset_hcd(hcd); |
1416 | if (test_and_clear_bit(nr: RESET_PORT, addr: &max3421_hcd->todo)) { |
1417 | /* perform a USB bus reset: */ |
1418 | spi_wr8(hcd, MAX3421_REG_HCTL, |
1419 | BIT(MAX3421_HCTL_BUSRST_BIT)); |
1420 | i_worked = 1; |
1421 | } |
1422 | if (test_and_clear_bit(nr: CHECK_UNLINK, addr: &max3421_hcd->todo)) |
1423 | i_worked |= max3421_check_unlink(hcd); |
1424 | if (test_and_clear_bit(nr: IOPIN_UPDATE, addr: &max3421_hcd->todo)) { |
1425 | /* |
1426 | * IOPINS1/IOPINS2 do not auto-increment, so we can't |
1427 | * use spi_wr_buf(). |
1428 | */ |
1429 | for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) { |
1430 | u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1 + i); |
1431 | |
1432 | val = ((val & 0xf0) | |
1433 | (max3421_hcd->iopins[i] & 0x0f)); |
1434 | spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val); |
1435 | max3421_hcd->iopins[i] = val; |
1436 | } |
1437 | i_worked = 1; |
1438 | } |
1439 | } |
1440 | set_current_state(TASK_RUNNING); |
1441 | dev_info(&spi->dev, "SPI thread exiting"); |
1442 | return 0; |
1443 | } |
1444 | |
1445 | static int |
1446 | max3421_reset_port(struct usb_hcd *hcd) |
1447 | { |
1448 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1449 | |
1450 | max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE | |
1451 | USB_PORT_STAT_LOW_SPEED); |
1452 | max3421_hcd->port_status |= USB_PORT_STAT_RESET; |
1453 | set_bit(nr: RESET_PORT, addr: &max3421_hcd->todo); |
1454 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1455 | return 0; |
1456 | } |
1457 | |
1458 | static int |
1459 | max3421_reset(struct usb_hcd *hcd) |
1460 | { |
1461 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1462 | |
1463 | hcd->self.sg_tablesize = 0; |
1464 | hcd->speed = HCD_USB2; |
1465 | hcd->self.root_hub->speed = USB_SPEED_FULL; |
1466 | set_bit(nr: RESET_HCD, addr: &max3421_hcd->todo); |
1467 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1468 | return 0; |
1469 | } |
1470 | |
1471 | static int |
1472 | max3421_start(struct usb_hcd *hcd) |
1473 | { |
1474 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1475 | |
1476 | spin_lock_init(&max3421_hcd->lock); |
1477 | max3421_hcd->rh_state = MAX3421_RH_RUNNING; |
1478 | |
1479 | INIT_LIST_HEAD(list: &max3421_hcd->ep_list); |
1480 | |
1481 | hcd->power_budget = POWER_BUDGET; |
1482 | hcd->state = HC_STATE_RUNNING; |
1483 | hcd->uses_new_polling = 1; |
1484 | return 0; |
1485 | } |
1486 | |
1487 | static void |
1488 | max3421_stop(struct usb_hcd *hcd) |
1489 | { |
1490 | } |
1491 | |
1492 | static int |
1493 | max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) |
1494 | { |
1495 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
1496 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1497 | struct max3421_ep *max3421_ep; |
1498 | unsigned long flags; |
1499 | int retval; |
1500 | |
1501 | switch (usb_pipetype(urb->pipe)) { |
1502 | case PIPE_INTERRUPT: |
1503 | case PIPE_ISOCHRONOUS: |
1504 | if (urb->interval < 0) { |
1505 | dev_err(&spi->dev, |
1506 | "%s: interval=%d for intr-/iso-pipe; expected > 0\n", |
1507 | __func__, urb->interval); |
1508 | return -EINVAL; |
1509 | } |
1510 | break; |
1511 | default: |
1512 | break; |
1513 | } |
1514 | |
1515 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1516 | |
1517 | max3421_ep = urb->ep->hcpriv; |
1518 | if (!max3421_ep) { |
1519 | /* gets freed in max3421_endpoint_disable: */ |
1520 | max3421_ep = kzalloc(size: sizeof(struct max3421_ep), GFP_ATOMIC); |
1521 | if (!max3421_ep) { |
1522 | retval = -ENOMEM; |
1523 | goto out; |
1524 | } |
1525 | max3421_ep->ep = urb->ep; |
1526 | max3421_ep->last_active = max3421_hcd->frame_number; |
1527 | urb->ep->hcpriv = max3421_ep; |
1528 | |
1529 | list_add_tail(new: &max3421_ep->ep_list, head: &max3421_hcd->ep_list); |
1530 | } |
1531 | |
1532 | retval = usb_hcd_link_urb_to_ep(hcd, urb); |
1533 | if (retval == 0) { |
1534 | /* Since we added to the queue, restart scheduling: */ |
1535 | max3421_hcd->sched_pass = SCHED_PASS_PERIODIC; |
1536 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1537 | } |
1538 | |
1539 | out: |
1540 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1541 | return retval; |
1542 | } |
1543 | |
1544 | static int |
1545 | max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
1546 | { |
1547 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1548 | unsigned long flags; |
1549 | int retval; |
1550 | |
1551 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1552 | |
1553 | /* |
1554 | * This will set urb->unlinked which in turn causes the entry |
1555 | * to be dropped at the next opportunity. |
1556 | */ |
1557 | retval = usb_hcd_check_unlink_urb(hcd, urb, status); |
1558 | if (retval == 0) { |
1559 | set_bit(nr: CHECK_UNLINK, addr: &max3421_hcd->todo); |
1560 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1561 | } |
1562 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1563 | return retval; |
1564 | } |
1565 | |
1566 | static void |
1567 | max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep) |
1568 | { |
1569 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1570 | unsigned long flags; |
1571 | |
1572 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1573 | |
1574 | if (ep->hcpriv) { |
1575 | struct max3421_ep *max3421_ep = ep->hcpriv; |
1576 | |
1577 | /* remove myself from the ep_list: */ |
1578 | if (!list_empty(head: &max3421_ep->ep_list)) |
1579 | list_del(entry: &max3421_ep->ep_list); |
1580 | kfree(objp: max3421_ep); |
1581 | ep->hcpriv = NULL; |
1582 | } |
1583 | |
1584 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1585 | } |
1586 | |
1587 | static int |
1588 | max3421_get_frame_number(struct usb_hcd *hcd) |
1589 | { |
1590 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1591 | return max3421_hcd->frame_number; |
1592 | } |
1593 | |
1594 | /* |
1595 | * Should return a non-zero value when any port is undergoing a resume |
1596 | * transition while the root hub is suspended. |
1597 | */ |
1598 | static int |
1599 | max3421_hub_status_data(struct usb_hcd *hcd, char *buf) |
1600 | { |
1601 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1602 | unsigned long flags; |
1603 | int retval = 0; |
1604 | |
1605 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1606 | if (!HCD_HW_ACCESSIBLE(hcd)) |
1607 | goto done; |
1608 | |
1609 | *buf = 0; |
1610 | if ((max3421_hcd->port_status & PORT_C_MASK) != 0) { |
1611 | *buf = (1 << 1); /* a hub over-current condition exists */ |
1612 | dev_dbg(hcd->self.controller, |
1613 | "port status 0x%08x has changes\n", |
1614 | max3421_hcd->port_status); |
1615 | retval = 1; |
1616 | if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED) |
1617 | usb_hcd_resume_root_hub(hcd); |
1618 | } |
1619 | done: |
1620 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1621 | return retval; |
1622 | } |
1623 | |
1624 | static inline void |
1625 | hub_descriptor(struct usb_hub_descriptor *desc) |
1626 | { |
1627 | memset(desc, 0, sizeof(*desc)); |
1628 | /* |
1629 | * See Table 11-13: Hub Descriptor in USB 2.0 spec. |
1630 | */ |
1631 | desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */ |
1632 | desc->bDescLength = 9; |
1633 | desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM | |
1634 | HUB_CHAR_COMMON_OCPM); |
1635 | desc->bNbrPorts = 1; |
1636 | } |
1637 | |
1638 | /* |
1639 | * Set the MAX3421E general-purpose output with number PIN_NUMBER to |
1640 | * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For |
1641 | * any other value, this function acts as a no-op. |
1642 | */ |
1643 | static void |
1644 | max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value) |
1645 | { |
1646 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1647 | u8 mask, idx; |
1648 | |
1649 | --pin_number; |
1650 | if (pin_number >= MAX3421_GPOUT_COUNT) |
1651 | return; |
1652 | |
1653 | mask = 1u << (pin_number % 4); |
1654 | idx = pin_number / 4; |
1655 | |
1656 | if (value) |
1657 | max3421_hcd->iopins[idx] |= mask; |
1658 | else |
1659 | max3421_hcd->iopins[idx] &= ~mask; |
1660 | set_bit(nr: IOPIN_UPDATE, addr: &max3421_hcd->todo); |
1661 | wake_up_process(tsk: max3421_hcd->spi_thread); |
1662 | } |
1663 | |
1664 | static int |
1665 | max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index, |
1666 | char *buf, u16 length) |
1667 | { |
1668 | struct spi_device *spi = to_spi_device(dev: hcd->self.controller); |
1669 | struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); |
1670 | struct max3421_hcd_platform_data *pdata; |
1671 | unsigned long flags; |
1672 | int retval = 0; |
1673 | |
1674 | pdata = spi->dev.platform_data; |
1675 | |
1676 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1677 | |
1678 | switch (type_req) { |
1679 | case ClearHubFeature: |
1680 | break; |
1681 | case ClearPortFeature: |
1682 | switch (value) { |
1683 | case USB_PORT_FEAT_SUSPEND: |
1684 | break; |
1685 | case USB_PORT_FEAT_POWER: |
1686 | dev_dbg(hcd->self.controller, "power-off\n"); |
1687 | max3421_gpout_set_value(hcd, pin_number: pdata->vbus_gpout, |
1688 | value: !pdata->vbus_active_level); |
1689 | fallthrough; |
1690 | default: |
1691 | max3421_hcd->port_status &= ~(1 << value); |
1692 | } |
1693 | break; |
1694 | case GetHubDescriptor: |
1695 | hub_descriptor(desc: (struct usb_hub_descriptor *) buf); |
1696 | break; |
1697 | |
1698 | case DeviceRequest | USB_REQ_GET_DESCRIPTOR: |
1699 | case GetPortErrorCount: |
1700 | case SetHubDepth: |
1701 | /* USB3 only */ |
1702 | goto error; |
1703 | |
1704 | case GetHubStatus: |
1705 | *(__le32 *) buf = cpu_to_le32(0); |
1706 | break; |
1707 | |
1708 | case GetPortStatus: |
1709 | if (index != 1) { |
1710 | retval = -EPIPE; |
1711 | goto error; |
1712 | } |
1713 | ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status); |
1714 | ((__le16 *) buf)[1] = |
1715 | cpu_to_le16(max3421_hcd->port_status >> 16); |
1716 | break; |
1717 | |
1718 | case SetHubFeature: |
1719 | retval = -EPIPE; |
1720 | break; |
1721 | |
1722 | case SetPortFeature: |
1723 | switch (value) { |
1724 | case USB_PORT_FEAT_LINK_STATE: |
1725 | case USB_PORT_FEAT_U1_TIMEOUT: |
1726 | case USB_PORT_FEAT_U2_TIMEOUT: |
1727 | case USB_PORT_FEAT_BH_PORT_RESET: |
1728 | goto error; |
1729 | case USB_PORT_FEAT_SUSPEND: |
1730 | if (max3421_hcd->active) |
1731 | max3421_hcd->port_status |= |
1732 | USB_PORT_STAT_SUSPEND; |
1733 | break; |
1734 | case USB_PORT_FEAT_POWER: |
1735 | dev_dbg(hcd->self.controller, "power-on\n"); |
1736 | max3421_hcd->port_status |= USB_PORT_STAT_POWER; |
1737 | max3421_gpout_set_value(hcd, pin_number: pdata->vbus_gpout, |
1738 | value: pdata->vbus_active_level); |
1739 | break; |
1740 | case USB_PORT_FEAT_RESET: |
1741 | max3421_reset_port(hcd); |
1742 | fallthrough; |
1743 | default: |
1744 | if ((max3421_hcd->port_status & USB_PORT_STAT_POWER) |
1745 | != 0) |
1746 | max3421_hcd->port_status |= (1 << value); |
1747 | } |
1748 | break; |
1749 | |
1750 | default: |
1751 | dev_dbg(hcd->self.controller, |
1752 | "hub control req%04x v%04x i%04x l%d\n", |
1753 | type_req, value, index, length); |
1754 | error: /* "protocol stall" on error */ |
1755 | retval = -EPIPE; |
1756 | } |
1757 | |
1758 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1759 | return retval; |
1760 | } |
1761 | |
1762 | static int |
1763 | max3421_bus_suspend(struct usb_hcd *hcd) |
1764 | { |
1765 | return -1; |
1766 | } |
1767 | |
1768 | static int |
1769 | max3421_bus_resume(struct usb_hcd *hcd) |
1770 | { |
1771 | return -1; |
1772 | } |
1773 | |
1774 | static const struct hc_driver max3421_hcd_desc = { |
1775 | .description = "max3421", |
1776 | .product_desc = DRIVER_DESC, |
1777 | .hcd_priv_size = sizeof(struct max3421_hcd), |
1778 | .flags = HCD_USB11, |
1779 | .reset = max3421_reset, |
1780 | .start = max3421_start, |
1781 | .stop = max3421_stop, |
1782 | .get_frame_number = max3421_get_frame_number, |
1783 | .urb_enqueue = max3421_urb_enqueue, |
1784 | .urb_dequeue = max3421_urb_dequeue, |
1785 | .endpoint_disable = max3421_endpoint_disable, |
1786 | .hub_status_data = max3421_hub_status_data, |
1787 | .hub_control = max3421_hub_control, |
1788 | .bus_suspend = max3421_bus_suspend, |
1789 | .bus_resume = max3421_bus_resume, |
1790 | }; |
1791 | |
1792 | static int |
1793 | max3421_of_vbus_en_pin(struct device *dev, struct max3421_hcd_platform_data *pdata) |
1794 | { |
1795 | int retval; |
1796 | uint32_t value[2]; |
1797 | |
1798 | if (!pdata) |
1799 | return -EINVAL; |
1800 | |
1801 | retval = of_property_read_u32_array(np: dev->of_node, propname: "maxim,vbus-en-pin", out_values: value, sz: 2); |
1802 | if (retval) { |
1803 | dev_err(dev, "device tree node property 'maxim,vbus-en-pin' is missing\n"); |
1804 | return retval; |
1805 | } |
1806 | dev_info(dev, "property 'maxim,vbus-en-pin' value is <%d %d>\n", value[0], value[1]); |
1807 | |
1808 | pdata->vbus_gpout = value[0]; |
1809 | pdata->vbus_active_level = value[1]; |
1810 | |
1811 | return 0; |
1812 | } |
1813 | |
1814 | static int |
1815 | max3421_probe(struct spi_device *spi) |
1816 | { |
1817 | struct device *dev = &spi->dev; |
1818 | struct max3421_hcd *max3421_hcd; |
1819 | struct usb_hcd *hcd = NULL; |
1820 | struct max3421_hcd_platform_data *pdata = NULL; |
1821 | int retval; |
1822 | |
1823 | if (spi_setup(spi) < 0) { |
1824 | dev_err(&spi->dev, "Unable to setup SPI bus"); |
1825 | return -EFAULT; |
1826 | } |
1827 | |
1828 | if (!spi->irq) { |
1829 | dev_err(dev, "Failed to get SPI IRQ"); |
1830 | return -EFAULT; |
1831 | } |
1832 | |
1833 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { |
1834 | pdata = devm_kzalloc(dev: &spi->dev, size: sizeof(*pdata), GFP_KERNEL); |
1835 | if (!pdata) { |
1836 | retval = -ENOMEM; |
1837 | goto error; |
1838 | } |
1839 | retval = max3421_of_vbus_en_pin(dev, pdata); |
1840 | if (retval) |
1841 | goto error; |
1842 | |
1843 | spi->dev.platform_data = pdata; |
1844 | } |
1845 | |
1846 | pdata = spi->dev.platform_data; |
1847 | if (!pdata) { |
1848 | dev_err(&spi->dev, "driver configuration data is not provided\n"); |
1849 | retval = -EFAULT; |
1850 | goto error; |
1851 | } |
1852 | if (pdata->vbus_active_level > 1) { |
1853 | dev_err(&spi->dev, "vbus active level value %d is out of range (0/1)\n", pdata->vbus_active_level); |
1854 | retval = -EINVAL; |
1855 | goto error; |
1856 | } |
1857 | if (pdata->vbus_gpout < 1 || pdata->vbus_gpout > MAX3421_GPOUT_COUNT) { |
1858 | dev_err(&spi->dev, "vbus gpout value %d is out of range (1..8)\n", pdata->vbus_gpout); |
1859 | retval = -EINVAL; |
1860 | goto error; |
1861 | } |
1862 | |
1863 | retval = -ENOMEM; |
1864 | hcd = usb_create_hcd(driver: &max3421_hcd_desc, dev: &spi->dev, |
1865 | bus_name: dev_name(dev: &spi->dev)); |
1866 | if (!hcd) { |
1867 | dev_err(&spi->dev, "failed to create HCD structure\n"); |
1868 | goto error; |
1869 | } |
1870 | set_bit(HCD_FLAG_POLL_RH, addr: &hcd->flags); |
1871 | max3421_hcd = hcd_to_max3421(hcd); |
1872 | INIT_LIST_HEAD(list: &max3421_hcd->ep_list); |
1873 | spi_set_drvdata(spi, data: max3421_hcd); |
1874 | |
1875 | max3421_hcd->tx = kmalloc(size: sizeof(*max3421_hcd->tx), GFP_KERNEL); |
1876 | if (!max3421_hcd->tx) |
1877 | goto error; |
1878 | max3421_hcd->rx = kmalloc(size: sizeof(*max3421_hcd->rx), GFP_KERNEL); |
1879 | if (!max3421_hcd->rx) |
1880 | goto error; |
1881 | |
1882 | max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd, |
1883 | "max3421_spi_thread"); |
1884 | if (max3421_hcd->spi_thread == ERR_PTR(error: -ENOMEM)) { |
1885 | dev_err(&spi->dev, |
1886 | "failed to create SPI thread (out of memory)\n"); |
1887 | goto error; |
1888 | } |
1889 | |
1890 | retval = usb_add_hcd(hcd, irqnum: 0, irqflags: 0); |
1891 | if (retval) { |
1892 | dev_err(&spi->dev, "failed to add HCD\n"); |
1893 | goto error; |
1894 | } |
1895 | |
1896 | retval = request_irq(irq: spi->irq, handler: max3421_irq_handler, |
1897 | IRQF_TRIGGER_LOW, name: "max3421", dev: hcd); |
1898 | if (retval < 0) { |
1899 | dev_err(&spi->dev, "failed to request irq %d\n", spi->irq); |
1900 | goto error; |
1901 | } |
1902 | return 0; |
1903 | |
1904 | error: |
1905 | if (IS_ENABLED(CONFIG_OF) && dev->of_node && pdata) { |
1906 | devm_kfree(dev: &spi->dev, p: pdata); |
1907 | spi->dev.platform_data = NULL; |
1908 | } |
1909 | |
1910 | if (hcd) { |
1911 | kfree(objp: max3421_hcd->tx); |
1912 | kfree(objp: max3421_hcd->rx); |
1913 | if (max3421_hcd->spi_thread) |
1914 | kthread_stop(k: max3421_hcd->spi_thread); |
1915 | usb_put_hcd(hcd); |
1916 | } |
1917 | return retval; |
1918 | } |
1919 | |
1920 | static void |
1921 | max3421_remove(struct spi_device *spi) |
1922 | { |
1923 | struct max3421_hcd *max3421_hcd; |
1924 | struct usb_hcd *hcd; |
1925 | unsigned long flags; |
1926 | |
1927 | max3421_hcd = spi_get_drvdata(spi); |
1928 | hcd = max3421_to_hcd(max3421_hcd); |
1929 | |
1930 | usb_remove_hcd(hcd); |
1931 | |
1932 | spin_lock_irqsave(&max3421_hcd->lock, flags); |
1933 | |
1934 | kthread_stop(k: max3421_hcd->spi_thread); |
1935 | |
1936 | spin_unlock_irqrestore(lock: &max3421_hcd->lock, flags); |
1937 | |
1938 | free_irq(spi->irq, hcd); |
1939 | |
1940 | usb_put_hcd(hcd); |
1941 | } |
1942 | |
1943 | static const struct of_device_id max3421_of_match_table[] = { |
1944 | { .compatible = "maxim,max3421", }, |
1945 | {}, |
1946 | }; |
1947 | MODULE_DEVICE_TABLE(of, max3421_of_match_table); |
1948 | |
1949 | static struct spi_driver max3421_driver = { |
1950 | .probe = max3421_probe, |
1951 | .remove = max3421_remove, |
1952 | .driver = { |
1953 | .name = "max3421-hcd", |
1954 | .of_match_table = max3421_of_match_table, |
1955 | }, |
1956 | }; |
1957 | |
1958 | module_spi_driver(max3421_driver); |
1959 | |
1960 | MODULE_DESCRIPTION(DRIVER_DESC); |
1961 | MODULE_AUTHOR("David Mosberger <davidm@egauge.net>"); |
1962 | MODULE_LICENSE("GPL"); |
1963 |
Definitions
- max3421_rh_state
- pkt_state
- scheduling_pass
- max3421_dma_buf
- max3421_hcd
- max3421_ep
- hrsl_to_error
- frame_diff
- hcd_to_max3421
- max3421_to_hcd
- spi_rd8
- spi_wr8
- spi_rd_buf
- spi_wr_buf
- max3421_set_speed
- max3421_set_address
- max3421_ctrl_setup
- max3421_transfer_in
- max3421_transfer_out
- max3421_next_transfer
- max3421_select_and_start_urb
- max3421_check_unlink
- max3421_slow_retransmit
- max3421_recv_data_available
- max3421_handle_error
- max3421_transfer_in_done
- max3421_transfer_out_done
- max3421_host_transfer_done
- max3421_detect_conn
- max3421_irq_handler
- max3421_handle_irqs
- max3421_reset_hcd
- max3421_urb_done
- max3421_spi_thread
- max3421_reset_port
- max3421_reset
- max3421_start
- max3421_stop
- max3421_urb_enqueue
- max3421_urb_dequeue
- max3421_endpoint_disable
- max3421_get_frame_number
- max3421_hub_status_data
- hub_descriptor
- max3421_gpout_set_value
- max3421_hub_control
- max3421_bus_suspend
- max3421_bus_resume
- max3421_hcd_desc
- max3421_of_vbus_en_pin
- max3421_probe
- max3421_remove
- max3421_of_match_table
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