| 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * drivers/char/watchdog/max63xx_wdt.c |
| 4 | * |
| 5 | * Driver for max63{69,70,71,72,73,74} watchdog timers |
| 6 | * |
| 7 | * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org> |
| 8 | * |
| 9 | * This driver assumes the watchdog pins are memory mapped (as it is |
| 10 | * the case for the Arcom Zeus). Should it be connected over GPIOs or |
| 11 | * another interface, some abstraction will have to be introduced. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/moduleparam.h> |
| 17 | #include <linux/mod_devicetable.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/watchdog.h> |
| 21 | #include <linux/bitops.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/spinlock.h> |
| 24 | #include <linux/io.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/property.h> |
| 27 | |
| 28 | #define DEFAULT_HEARTBEAT 60 |
| 29 | #define MAX_HEARTBEAT 60 |
| 30 | |
| 31 | static unsigned int heartbeat = DEFAULT_HEARTBEAT; |
| 32 | static bool nowayout = WATCHDOG_NOWAYOUT; |
| 33 | |
| 34 | /* |
| 35 | * Memory mapping: a single byte, 3 first lower bits to select bit 3 |
| 36 | * to ping the watchdog. |
| 37 | */ |
| 38 | #define MAX6369_WDSET (7 << 0) |
| 39 | #define MAX6369_WDI (1 << 3) |
| 40 | |
| 41 | #define MAX6369_WDSET_DISABLED 3 |
| 42 | |
| 43 | static int nodelay; |
| 44 | |
| 45 | struct max63xx_wdt { |
| 46 | struct watchdog_device wdd; |
| 47 | const struct max63xx_timeout *timeout; |
| 48 | |
| 49 | /* memory mapping */ |
| 50 | void __iomem *base; |
| 51 | spinlock_t lock; |
| 52 | |
| 53 | /* WDI and WSET bits write access routines */ |
| 54 | void (*ping)(struct max63xx_wdt *wdt); |
| 55 | void (*set)(struct max63xx_wdt *wdt, u8 set); |
| 56 | }; |
| 57 | |
| 58 | /* |
| 59 | * The timeout values used are actually the absolute minimum the chip |
| 60 | * offers. Typical values on my board are slightly over twice as long |
| 61 | * (10s setting ends up with a 25s timeout), and can be up to 3 times |
| 62 | * the nominal setting (according to the datasheet). So please take |
| 63 | * these values with a grain of salt. Same goes for the initial delay |
| 64 | * "feature". Only max6373/74 have a few settings without this initial |
| 65 | * delay (selected with the "nodelay" parameter). |
| 66 | * |
| 67 | * I also decided to remove from the tables any timeout smaller than a |
| 68 | * second, as it looked completly overkill... |
| 69 | */ |
| 70 | |
| 71 | /* Timeouts in second */ |
| 72 | struct max63xx_timeout { |
| 73 | const u8 wdset; |
| 74 | const u8 tdelay; |
| 75 | const u8 twd; |
| 76 | }; |
| 77 | |
| 78 | static const struct max63xx_timeout max6369_table[] = { |
| 79 | { 5, 1, 1 }, |
| 80 | { 6, 10, 10 }, |
| 81 | { 7, 60, 60 }, |
| 82 | { }, |
| 83 | }; |
| 84 | |
| 85 | static const struct max63xx_timeout max6371_table[] = { |
| 86 | { 6, 60, 3 }, |
| 87 | { 7, 60, 60 }, |
| 88 | { }, |
| 89 | }; |
| 90 | |
| 91 | static const struct max63xx_timeout max6373_table[] = { |
| 92 | { 2, 60, 1 }, |
| 93 | { 5, 0, 1 }, |
| 94 | { 1, 3, 3 }, |
| 95 | { 7, 60, 10 }, |
| 96 | { 6, 0, 10 }, |
| 97 | { }, |
| 98 | }; |
| 99 | |
| 100 | static const struct max63xx_timeout * |
| 101 | max63xx_select_timeout(const struct max63xx_timeout *table, int value) |
| 102 | { |
| 103 | while (table->twd) { |
| 104 | if (value <= table->twd) { |
| 105 | if (nodelay && table->tdelay == 0) |
| 106 | return table; |
| 107 | |
| 108 | if (!nodelay) |
| 109 | return table; |
| 110 | } |
| 111 | |
| 112 | table++; |
| 113 | } |
| 114 | |
| 115 | return NULL; |
| 116 | } |
| 117 | |
| 118 | static int max63xx_wdt_ping(struct watchdog_device *wdd) |
| 119 | { |
| 120 | struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); |
| 121 | |
| 122 | wdt->ping(wdt); |
| 123 | return 0; |
| 124 | } |
| 125 | |
| 126 | static int max63xx_wdt_start(struct watchdog_device *wdd) |
| 127 | { |
| 128 | struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); |
| 129 | |
| 130 | wdt->set(wdt, wdt->timeout->wdset); |
| 131 | |
| 132 | /* check for a edge triggered startup */ |
| 133 | if (wdt->timeout->tdelay == 0) |
| 134 | wdt->ping(wdt); |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | static int max63xx_wdt_stop(struct watchdog_device *wdd) |
| 139 | { |
| 140 | struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); |
| 141 | |
| 142 | wdt->set(wdt, MAX6369_WDSET_DISABLED); |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | static const struct watchdog_ops max63xx_wdt_ops = { |
| 147 | .owner = THIS_MODULE, |
| 148 | .start = max63xx_wdt_start, |
| 149 | .stop = max63xx_wdt_stop, |
| 150 | .ping = max63xx_wdt_ping, |
| 151 | }; |
| 152 | |
| 153 | static const struct watchdog_info max63xx_wdt_info = { |
| 154 | .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
| 155 | .identity = "max63xx Watchdog" , |
| 156 | }; |
| 157 | |
| 158 | static void max63xx_mmap_ping(struct max63xx_wdt *wdt) |
| 159 | { |
| 160 | u8 val; |
| 161 | |
| 162 | spin_lock(lock: &wdt->lock); |
| 163 | |
| 164 | val = __raw_readb(addr: wdt->base); |
| 165 | |
| 166 | __raw_writeb(val: val | MAX6369_WDI, addr: wdt->base); |
| 167 | __raw_writeb(val: val & ~MAX6369_WDI, addr: wdt->base); |
| 168 | |
| 169 | spin_unlock(lock: &wdt->lock); |
| 170 | } |
| 171 | |
| 172 | static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set) |
| 173 | { |
| 174 | u8 val; |
| 175 | |
| 176 | spin_lock(lock: &wdt->lock); |
| 177 | |
| 178 | val = __raw_readb(addr: wdt->base); |
| 179 | val &= ~MAX6369_WDSET; |
| 180 | val |= set & MAX6369_WDSET; |
| 181 | __raw_writeb(val, addr: wdt->base); |
| 182 | |
| 183 | spin_unlock(lock: &wdt->lock); |
| 184 | } |
| 185 | |
| 186 | static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt) |
| 187 | { |
| 188 | wdt->base = devm_platform_ioremap_resource(pdev: p, index: 0); |
| 189 | if (IS_ERR(ptr: wdt->base)) |
| 190 | return PTR_ERR(ptr: wdt->base); |
| 191 | |
| 192 | spin_lock_init(&wdt->lock); |
| 193 | |
| 194 | wdt->ping = max63xx_mmap_ping; |
| 195 | wdt->set = max63xx_mmap_set; |
| 196 | return 0; |
| 197 | } |
| 198 | |
| 199 | static int max63xx_wdt_probe(struct platform_device *pdev) |
| 200 | { |
| 201 | struct device *dev = &pdev->dev; |
| 202 | struct max63xx_wdt *wdt; |
| 203 | const struct max63xx_timeout *table; |
| 204 | int err; |
| 205 | |
| 206 | wdt = devm_kzalloc(dev, size: sizeof(*wdt), GFP_KERNEL); |
| 207 | if (!wdt) |
| 208 | return -ENOMEM; |
| 209 | |
| 210 | /* Attempt to use fwnode first */ |
| 211 | table = device_get_match_data(dev); |
| 212 | if (!table) |
| 213 | table = (struct max63xx_timeout *)pdev->id_entry->driver_data; |
| 214 | |
| 215 | if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) |
| 216 | heartbeat = DEFAULT_HEARTBEAT; |
| 217 | |
| 218 | wdt->timeout = max63xx_select_timeout(table, value: heartbeat); |
| 219 | if (!wdt->timeout) { |
| 220 | dev_err(dev, "unable to satisfy %ds heartbeat request\n" , |
| 221 | heartbeat); |
| 222 | return -EINVAL; |
| 223 | } |
| 224 | |
| 225 | err = max63xx_mmap_init(p: pdev, wdt); |
| 226 | if (err) |
| 227 | return err; |
| 228 | |
| 229 | platform_set_drvdata(pdev, data: &wdt->wdd); |
| 230 | watchdog_set_drvdata(wdd: &wdt->wdd, data: wdt); |
| 231 | |
| 232 | wdt->wdd.parent = dev; |
| 233 | wdt->wdd.timeout = wdt->timeout->twd; |
| 234 | wdt->wdd.info = &max63xx_wdt_info; |
| 235 | wdt->wdd.ops = &max63xx_wdt_ops; |
| 236 | |
| 237 | watchdog_set_nowayout(wdd: &wdt->wdd, nowayout); |
| 238 | |
| 239 | err = devm_watchdog_register_device(dev, &wdt->wdd); |
| 240 | if (err) |
| 241 | return err; |
| 242 | |
| 243 | dev_info(dev, "using %ds heartbeat with %ds initial delay\n" , |
| 244 | wdt->timeout->twd, wdt->timeout->tdelay); |
| 245 | return 0; |
| 246 | } |
| 247 | |
| 248 | static const struct platform_device_id max63xx_id_table[] = { |
| 249 | { "max6369_wdt" , (kernel_ulong_t)max6369_table, }, |
| 250 | { "max6370_wdt" , (kernel_ulong_t)max6369_table, }, |
| 251 | { "max6371_wdt" , (kernel_ulong_t)max6371_table, }, |
| 252 | { "max6372_wdt" , (kernel_ulong_t)max6371_table, }, |
| 253 | { "max6373_wdt" , (kernel_ulong_t)max6373_table, }, |
| 254 | { "max6374_wdt" , (kernel_ulong_t)max6373_table, }, |
| 255 | { }, |
| 256 | }; |
| 257 | MODULE_DEVICE_TABLE(platform, max63xx_id_table); |
| 258 | |
| 259 | static const struct of_device_id max63xx_dt_id_table[] = { |
| 260 | { .compatible = "maxim,max6369" , .data = max6369_table, }, |
| 261 | { .compatible = "maxim,max6370" , .data = max6369_table, }, |
| 262 | { .compatible = "maxim,max6371" , .data = max6371_table, }, |
| 263 | { .compatible = "maxim,max6372" , .data = max6371_table, }, |
| 264 | { .compatible = "maxim,max6373" , .data = max6373_table, }, |
| 265 | { .compatible = "maxim,max6374" , .data = max6373_table, }, |
| 266 | { } |
| 267 | }; |
| 268 | MODULE_DEVICE_TABLE(of, max63xx_dt_id_table); |
| 269 | |
| 270 | static struct platform_driver max63xx_wdt_driver = { |
| 271 | .probe = max63xx_wdt_probe, |
| 272 | .id_table = max63xx_id_table, |
| 273 | .driver = { |
| 274 | .name = "max63xx_wdt" , |
| 275 | .of_match_table = max63xx_dt_id_table, |
| 276 | }, |
| 277 | }; |
| 278 | |
| 279 | module_platform_driver(max63xx_wdt_driver); |
| 280 | |
| 281 | MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>" ); |
| 282 | MODULE_DESCRIPTION("max63xx Watchdog Driver" ); |
| 283 | |
| 284 | module_param(heartbeat, int, 0); |
| 285 | MODULE_PARM_DESC(heartbeat, |
| 286 | "Watchdog heartbeat period in seconds from 1 to " |
| 287 | __MODULE_STRING(MAX_HEARTBEAT) ", default " |
| 288 | __MODULE_STRING(DEFAULT_HEARTBEAT)); |
| 289 | |
| 290 | module_param(nowayout, bool, 0); |
| 291 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
| 292 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")" ); |
| 293 | |
| 294 | module_param(nodelay, int, 0); |
| 295 | MODULE_PARM_DESC(nodelay, |
| 296 | "Force selection of a timeout setting without initial delay " |
| 297 | "(max6373/74 only, default=0)" ); |
| 298 | |
| 299 | MODULE_LICENSE("GPL v2" ); |
| 300 | |