| 1 | //===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This file contains the SPIR-V implementation of the TargetInstrInfo class. |
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| 10 | // |
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| 11 | //===----------------------------------------------------------------------===// |
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| 12 | |
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| 13 | #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H |
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| 14 | #define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H |
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| 15 | |
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| 16 | #include "SPIRVRegisterInfo.h" |
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| 17 | #include "llvm/CodeGen/TargetInstrInfo.h" |
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| 18 | |
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| 19 | #define |
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| 20 | #include "SPIRVGenInstrInfo.inc" |
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| 21 | |
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| 22 | namespace llvm { |
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| 23 | |
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| 24 | class SPIRVInstrInfo : public SPIRVGenInstrInfo { |
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| 25 | const SPIRVRegisterInfo RI; |
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| 26 | |
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| 27 | public: |
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| 28 | SPIRVInstrInfo(); |
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| 29 | |
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| 30 | const SPIRVRegisterInfo &getRegisterInfo() const { return RI; } |
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| 31 | bool (const MachineInstr &MI) const; |
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| 32 | bool isConstantInstr(const MachineInstr &MI) const; |
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| 33 | bool isTypeDeclInstr(const MachineInstr &MI) const; |
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| 34 | bool isDecorationInstr(const MachineInstr &MI) const; |
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| 35 | bool canUseFastMathFlags(const MachineInstr &MI) const; |
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| 36 | bool canUseNSW(const MachineInstr &MI) const; |
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| 37 | bool canUseNUW(const MachineInstr &MI) const; |
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| 38 | |
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| 39 | bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, |
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| 40 | MachineBasicBlock *&FBB, |
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| 41 | SmallVectorImpl<MachineOperand> &Cond, |
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| 42 | bool AllowModify = false) const override; |
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| 43 | |
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| 44 | unsigned removeBranch(MachineBasicBlock &MBB, |
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| 45 | int *BytesRemoved = nullptr) const override; |
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| 46 | |
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| 47 | unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, |
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| 48 | MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, |
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| 49 | const DebugLoc &DL, |
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| 50 | int *BytesAdded = nullptr) const override; |
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| 51 | void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
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| 52 | const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, |
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| 53 | bool KillSrc) const override; |
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| 54 | bool expandPostRAPseudo(MachineInstr &MI) const override; |
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| 55 | }; |
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| 56 | |
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| 57 | namespace SPIRV { |
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| 58 | enum { |
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| 59 | // It is a half type |
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| 60 | ASM_PRINTER_WIDTH16 = MachineInstr::TAsmComments |
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| 61 | }; |
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| 62 | } // namespace SPIRV |
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| 63 | |
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| 64 | } // namespace llvm |
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| 65 | |
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| 66 | #endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H |
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| 67 | |
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