1//===--------- SCEVAffinator.cpp - Create Scops from LLVM IR -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Create a polyhedral description for a SCEV value.
10//
11//===----------------------------------------------------------------------===//
12
13#include "polly/Support/SCEVAffinator.h"
14#include "polly/Options.h"
15#include "polly/ScopInfo.h"
16#include "polly/Support/GICHelper.h"
17#include "polly/Support/SCEVValidator.h"
18#include "isl/aff.h"
19#include "isl/local_space.h"
20#include "isl/set.h"
21#include "isl/val.h"
22
23using namespace llvm;
24using namespace polly;
25
26static cl::opt<bool> IgnoreIntegerWrapping(
27 "polly-ignore-integer-wrapping",
28 cl::desc("Do not build run-time checks to proof absence of integer "
29 "wrapping"),
30 cl::Hidden, cl::cat(PollyCategory));
31
32// The maximal number of basic sets we allow during the construction of a
33// piecewise affine function. More complex ones will result in very high
34// compile time.
35static int const MaxDisjunctionsInPwAff = 100;
36
37// The maximal number of bits for which a general expression is modeled
38// precisely.
39static unsigned const MaxSmallBitWidth = 7;
40
41/// Add the number of basic sets in @p Domain to @p User
42static isl_stat addNumBasicSets(__isl_take isl_set *Domain,
43 __isl_take isl_aff *Aff, void *User) {
44 auto *NumBasicSets = static_cast<unsigned *>(User);
45 *NumBasicSets += isl_set_n_basic_set(set: Domain);
46 isl_set_free(set: Domain);
47 isl_aff_free(aff: Aff);
48 return isl_stat_ok;
49}
50
51/// Determine if @p PWAC is too complex to continue.
52static bool isTooComplex(PWACtx PWAC) {
53 unsigned NumBasicSets = 0;
54 isl_pw_aff_foreach_piece(pwaff: PWAC.first.get(), fn: addNumBasicSets, user: &NumBasicSets);
55 if (NumBasicSets <= MaxDisjunctionsInPwAff)
56 return false;
57 return true;
58}
59
60/// Return the flag describing the possible wrapping of @p Expr.
61static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) {
62 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Val: Expr))
63 return NAry->getNoWrapFlags();
64 return SCEV::NoWrapMask;
65}
66
67static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1,
68 __isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *,
69 __isl_take isl_pw_aff *)) {
70 PWAC0.first = isl::manage(ptr: Fn(PWAC0.first.release(), PWAC1.first.release()));
71 PWAC0.second = PWAC0.second.unite(set2: PWAC1.second);
72 return PWAC0;
73}
74
75static __isl_give isl_pw_aff *getWidthExpValOnDomain(unsigned Width,
76 __isl_take isl_set *Dom) {
77 auto *Ctx = isl_set_get_ctx(set: Dom);
78 auto *WidthVal = isl_val_int_from_ui(ctx: Ctx, u: Width);
79 auto *ExpVal = isl_val_2exp(v: WidthVal);
80 return isl_pw_aff_val_on_domain(domain: Dom, v: ExpVal);
81}
82
83SCEVAffinator::SCEVAffinator(Scop *S, LoopInfo &LI)
84 : S(S), Ctx(S->getIslCtx().get()), SE(*S->getSE()), LI(LI),
85 TD(S->getFunction().getParent()->getDataLayout()) {}
86
87Loop *SCEVAffinator::getScope() { return BB ? LI.getLoopFor(BB) : nullptr; }
88
89void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) {
90 auto *NonNegDom = isl_pw_aff_nonneg_set(pwaff: PWAC.first.copy());
91 auto *NonNegPWA =
92 isl_pw_aff_intersect_domain(pa: PWAC.first.copy(), set: isl_set_copy(set: NonNegDom));
93 auto *ExpPWA = getWidthExpValOnDomain(Width, Dom: isl_set_complement(set: NonNegDom));
94 PWAC.first = isl::manage(ptr: isl_pw_aff_union_add(
95 pwaff1: NonNegPWA, pwaff2: isl_pw_aff_add(pwaff1: PWAC.first.release(), pwaff2: ExpPWA)));
96}
97
98void SCEVAffinator::takeNonNegativeAssumption(
99 PWACtx &PWAC, RecordedAssumptionsTy *RecordedAssumptions) {
100 this->RecordedAssumptions = RecordedAssumptions;
101
102 auto *NegPWA = isl_pw_aff_neg(pwaff: PWAC.first.copy());
103 auto *NegDom = isl_pw_aff_pos_set(pa: NegPWA);
104 PWAC.second =
105 isl::manage(ptr: isl_set_union(set1: PWAC.second.release(), set2: isl_set_copy(set: NegDom)));
106 auto *Restriction = BB ? NegDom : isl_set_params(set: NegDom);
107 auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
108 recordAssumption(RecordedAssumptions, Kind: UNSIGNED, Set: isl::manage(ptr: Restriction), Loc: DL,
109 Sign: AS_RESTRICTION, BB);
110}
111
112PWACtx SCEVAffinator::getPWACtxFromPWA(isl::pw_aff PWA) {
113 return std::make_pair(x&: PWA, y: isl::set::empty(space: isl::space(Ctx, 0, NumIterators)));
114}
115
116PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB,
117 RecordedAssumptionsTy *RecordedAssumptions) {
118 this->BB = BB;
119 this->RecordedAssumptions = RecordedAssumptions;
120
121 if (BB) {
122 auto *DC = S->getDomainConditions(BB).release();
123 NumIterators = isl_set_n_dim(set: DC);
124 isl_set_free(set: DC);
125 } else
126 NumIterators = 0;
127
128 return visit(E: Expr);
129}
130
131PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr, PWACtx PWAC) const {
132 // If the SCEV flags do contain NSW (no signed wrap) then PWA already
133 // represents Expr in modulo semantic (it is not allowed to overflow), thus we
134 // are done. Otherwise, we will compute:
135 // PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1)
136 // whereas n is the number of bits of the Expr, hence:
137 // n = bitwidth(ExprType)
138
139 if (IgnoreIntegerWrapping || (getNoWrapFlags(Expr) & SCEV::FlagNSW))
140 return PWAC;
141
142 isl::pw_aff PWAMod = addModuloSemantic(PWA: PWAC.first, ExprType: Expr->getType());
143
144 isl::set NotEqualSet = PWAC.first.ne_set(pwaff2: PWAMod);
145 PWAC.second = PWAC.second.unite(set2: NotEqualSet).coalesce();
146
147 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
148 if (!BB)
149 NotEqualSet = NotEqualSet.params();
150 NotEqualSet = NotEqualSet.coalesce();
151
152 if (!NotEqualSet.is_empty())
153 recordAssumption(RecordedAssumptions, Kind: WRAPPING, Set: NotEqualSet, Loc,
154 Sign: AS_RESTRICTION, BB);
155
156 return PWAC;
157}
158
159isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA,
160 Type *ExprType) const {
161 unsigned Width = TD.getTypeSizeInBits(Ty: ExprType);
162
163 auto ModVal = isl::val::int_from_ui(ctx: Ctx, u: Width);
164 ModVal = ModVal.pow2();
165
166 isl::set Domain = PWA.domain();
167 isl::pw_aff AddPW =
168 isl::manage(ptr: getWidthExpValOnDomain(Width: Width - 1, Dom: Domain.release()));
169
170 return PWA.add(pwaff2: AddPW).mod(mod: ModVal).sub(pwaff2: AddPW);
171}
172
173bool SCEVAffinator::hasNSWAddRecForLoop(Loop *L) const {
174 for (const auto &CachedPair : CachedExpressions) {
175 auto *AddRec = dyn_cast<SCEVAddRecExpr>(Val: CachedPair.first.first);
176 if (!AddRec)
177 continue;
178 if (AddRec->getLoop() != L)
179 continue;
180 if (AddRec->getNoWrapFlags() & SCEV::FlagNSW)
181 return true;
182 }
183
184 return false;
185}
186
187bool SCEVAffinator::computeModuloForExpr(const SCEV *Expr) {
188 unsigned Width = TD.getTypeSizeInBits(Ty: Expr->getType());
189 // We assume nsw expressions never overflow.
190 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Val: Expr))
191 if (NAry->getNoWrapFlags() & SCEV::FlagNSW)
192 return false;
193 return Width <= MaxSmallBitWidth;
194}
195
196PWACtx SCEVAffinator::visit(const SCEV *Expr) {
197
198 auto Key = std::make_pair(x&: Expr, y&: BB);
199 PWACtx PWAC = CachedExpressions[Key];
200 if (!PWAC.first.is_null())
201 return PWAC;
202
203 auto ConstantAndLeftOverPair = extractConstantFactor(M: Expr, SE);
204 auto *Factor = ConstantAndLeftOverPair.first;
205 Expr = ConstantAndLeftOverPair.second;
206
207 auto *Scope = getScope();
208 S->addParams(NewParameters: getParamsInAffineExpr(R: &S->getRegion(), Scope, Expression: Expr, SE));
209
210 // In case the scev is a valid parameter, we do not further analyze this
211 // expression, but create a new parameter in the isl_pw_aff. This allows us
212 // to treat subexpressions that we cannot translate into an piecewise affine
213 // expression, as constant parameters of the piecewise affine expression.
214 if (isl_id *Id = S->getIdForParam(Parameter: Expr).release()) {
215 isl_space *Space = isl_space_set_alloc(ctx: Ctx.get(), nparam: 1, dim: NumIterators);
216 Space = isl_space_set_dim_id(space: Space, type: isl_dim_param, pos: 0, id: Id);
217
218 isl_set *Domain = isl_set_universe(space: isl_space_copy(space: Space));
219 isl_aff *Affine = isl_aff_zero_on_domain(ls: isl_local_space_from_space(space: Space));
220 Affine = isl_aff_add_coefficient_si(aff: Affine, type: isl_dim_param, pos: 0, v: 1);
221
222 PWAC = getPWACtxFromPWA(PWA: isl::manage(ptr: isl_pw_aff_alloc(set: Domain, aff: Affine)));
223 } else {
224 PWAC = SCEVVisitor<SCEVAffinator, PWACtx>::visit(S: Expr);
225 if (computeModuloForExpr(Expr))
226 PWAC.first = addModuloSemantic(PWA: PWAC.first, ExprType: Expr->getType());
227 else
228 PWAC = checkForWrapping(Expr, PWAC);
229 }
230
231 if (!Factor->getType()->isIntegerTy(Bitwidth: 1)) {
232 PWAC = combine(PWAC0: PWAC, PWAC1: visitConstant(E: Factor), Fn: isl_pw_aff_mul);
233 if (computeModuloForExpr(Expr: Key.first))
234 PWAC.first = addModuloSemantic(PWA: PWAC.first, ExprType: Expr->getType());
235 }
236
237 // For compile time reasons we need to simplify the PWAC before we cache and
238 // return it.
239 PWAC.first = PWAC.first.coalesce();
240 if (!computeModuloForExpr(Expr: Key.first))
241 PWAC = checkForWrapping(Expr: Key.first, PWAC);
242
243 CachedExpressions[Key] = PWAC;
244 return PWAC;
245}
246
247PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) {
248 ConstantInt *Value = Expr->getValue();
249 isl_val *v;
250
251 // LLVM does not define if an integer value is interpreted as a signed or
252 // unsigned value. Hence, without further information, it is unknown how
253 // this value needs to be converted to GMP. At the moment, we only support
254 // signed operations. So we just interpret it as signed. Later, there are
255 // two options:
256 //
257 // 1. We always interpret any value as signed and convert the values on
258 // demand.
259 // 2. We pass down the signedness of the calculation and use it to interpret
260 // this constant correctly.
261 v = isl_valFromAPInt(Ctx: Ctx.get(), Int: Value->getValue(), /* isSigned */ IsSigned: true);
262
263 isl_space *Space = isl_space_set_alloc(ctx: Ctx.get(), nparam: 0, dim: NumIterators);
264 isl_local_space *ls = isl_local_space_from_space(space: Space);
265 return getPWACtxFromPWA(
266 PWA: isl::manage(ptr: isl_pw_aff_from_aff(aff: isl_aff_val_on_domain(ls, val: v))));
267}
268
269PWACtx SCEVAffinator::visitVScale(const SCEVVScale *VScale) {
270 llvm_unreachable("SCEVVScale not yet supported");
271}
272
273PWACtx SCEVAffinator::visitPtrToIntExpr(const SCEVPtrToIntExpr *Expr) {
274 return visit(Expr: Expr->getOperand(i: 0));
275}
276
277PWACtx SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) {
278 // Truncate operations are basically modulo operations, thus we can
279 // model them that way. However, for large types we assume the operand
280 // to fit in the new type size instead of introducing a modulo with a very
281 // large constant.
282
283 auto *Op = Expr->getOperand();
284 auto OpPWAC = visit(Expr: Op);
285
286 unsigned Width = TD.getTypeSizeInBits(Ty: Expr->getType());
287
288 if (computeModuloForExpr(Expr))
289 return OpPWAC;
290
291 auto *Dom = OpPWAC.first.domain().release();
292 auto *ExpPWA = getWidthExpValOnDomain(Width: Width - 1, Dom);
293 auto *GreaterDom =
294 isl_pw_aff_ge_set(pwaff1: OpPWAC.first.copy(), pwaff2: isl_pw_aff_copy(pwaff: ExpPWA));
295 auto *SmallerDom =
296 isl_pw_aff_lt_set(pwaff1: OpPWAC.first.copy(), pwaff2: isl_pw_aff_neg(pwaff: ExpPWA));
297 auto *OutOfBoundsDom = isl_set_union(set1: SmallerDom, set2: GreaterDom);
298 OpPWAC.second = OpPWAC.second.unite(set2: isl::manage_copy(ptr: OutOfBoundsDom));
299
300 if (!BB) {
301 assert(isl_set_dim(OutOfBoundsDom, isl_dim_set) == 0 &&
302 "Expected a zero dimensional set for non-basic-block domains");
303 OutOfBoundsDom = isl_set_params(set: OutOfBoundsDom);
304 }
305
306 recordAssumption(RecordedAssumptions, Kind: UNSIGNED, Set: isl::manage(ptr: OutOfBoundsDom),
307 Loc: DebugLoc(), Sign: AS_RESTRICTION, BB);
308
309 return OpPWAC;
310}
311
312PWACtx SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) {
313 // A zero-extended value can be interpreted as a piecewise defined signed
314 // value. If the value was non-negative it stays the same, otherwise it
315 // is the sum of the original value and 2^n where n is the bit-width of
316 // the original (or operand) type. Examples:
317 // zext i8 127 to i32 -> { [127] }
318 // zext i8 -1 to i32 -> { [256 + (-1)] } = { [255] }
319 // zext i8 %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 }
320 //
321 // However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a
322 // truncate) to represent some forms of modulo computation. The left-hand side
323 // of the condition in the code below would result in the SCEV
324 // "zext i1 <false, +, true>for.body" which is just another description
325 // of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0".
326 //
327 // for (i = 0; i < N; i++)
328 // if (i & 1 != 0 /* == i % 2 */)
329 // /* do something */
330 //
331 // If we do not make the modulo explicit but only use the mechanism described
332 // above we will get the very restrictive assumption "N < 3", because for all
333 // values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap.
334 // Alternatively, we can make the modulo in the operand explicit in the
335 // resulting piecewise function and thereby avoid the assumption on N. For the
336 // example this would result in the following piecewise affine function:
337 // { [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0;
338 // [i0] -> [(0)] : 2*floor((i0)/2) = i0 }
339 // To this end we can first determine if the (immediate) operand of the
340 // zero-extend can wrap and, in case it might, we will use explicit modulo
341 // semantic to compute the result instead of emitting non-wrapping
342 // assumptions.
343 //
344 // Note that operands with large bit-widths are less likely to be negative
345 // because it would result in a very large access offset or loop bound after
346 // the zero-extend. To this end one can optimistically assume the operand to
347 // be positive and avoid the piecewise definition if the bit-width is bigger
348 // than some threshold (here MaxZextSmallBitWidth).
349 //
350 // We choose to go with a hybrid solution of all modeling techniques described
351 // above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the
352 // wrapping explicitly and use a piecewise defined function. However, if the
353 // bit-width is bigger than MaxZextSmallBitWidth we will employ overflow
354 // assumptions and assume the "former negative" piece will not exist.
355
356 auto *Op = Expr->getOperand();
357 auto OpPWAC = visit(Expr: Op);
358
359 // If the width is to big we assume the negative part does not occur.
360 if (!computeModuloForExpr(Expr: Op)) {
361 takeNonNegativeAssumption(PWAC&: OpPWAC, RecordedAssumptions);
362 return OpPWAC;
363 }
364
365 // If the width is small build the piece for the non-negative part and
366 // the one for the negative part and unify them.
367 unsigned Width = TD.getTypeSizeInBits(Ty: Op->getType());
368 interpretAsUnsigned(PWAC&: OpPWAC, Width);
369 return OpPWAC;
370}
371
372PWACtx SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) {
373 // As all values are represented as signed, a sign extension is a noop.
374 return visit(Expr: Expr->getOperand());
375}
376
377PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) {
378 PWACtx Sum = visit(Expr: Expr->getOperand(i: 0));
379
380 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
381 Sum = combine(PWAC0: Sum, PWAC1: visit(Expr: Expr->getOperand(i)), Fn: isl_pw_aff_add);
382 if (isTooComplex(PWAC: Sum))
383 return complexityBailout();
384 }
385
386 return Sum;
387}
388
389PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) {
390 PWACtx Prod = visit(Expr: Expr->getOperand(i: 0));
391
392 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
393 Prod = combine(PWAC0: Prod, PWAC1: visit(Expr: Expr->getOperand(i)), Fn: isl_pw_aff_mul);
394 if (isTooComplex(PWAC: Prod))
395 return complexityBailout();
396 }
397
398 return Prod;
399}
400
401PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) {
402 assert(Expr->isAffine() && "Only affine AddRecurrences allowed");
403
404 auto Flags = Expr->getNoWrapFlags();
405
406 // Directly generate isl_pw_aff for Expr if 'start' is zero.
407 if (Expr->getStart()->isZero()) {
408 assert(S->contains(Expr->getLoop()) &&
409 "Scop does not contain the loop referenced in this AddRec");
410
411 PWACtx Step = visit(Expr: Expr->getOperand(i: 1));
412 isl_space *Space = isl_space_set_alloc(ctx: Ctx.get(), nparam: 0, dim: NumIterators);
413 isl_local_space *LocalSpace = isl_local_space_from_space(space: Space);
414
415 unsigned loopDimension = S->getRelativeLoopDepth(L: Expr->getLoop());
416
417 isl_aff *LAff = isl_aff_set_coefficient_si(
418 aff: isl_aff_zero_on_domain(ls: LocalSpace), type: isl_dim_in, pos: loopDimension, v: 1);
419 isl_pw_aff *LPwAff = isl_pw_aff_from_aff(aff: LAff);
420
421 Step.first = Step.first.mul(pwaff2: isl::manage(ptr: LPwAff));
422 return Step;
423 }
424
425 // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}'
426 // if 'start' is not zero.
427 // TODO: Using the original SCEV no-wrap flags is not always safe, however
428 // as our code generation is reordering the expression anyway it doesn't
429 // really matter.
430 const SCEV *ZeroStartExpr =
431 SE.getAddRecExpr(Start: SE.getConstant(Ty: Expr->getStart()->getType(), V: 0),
432 Step: Expr->getStepRecurrence(SE), L: Expr->getLoop(), Flags);
433
434 PWACtx Result = visit(Expr: ZeroStartExpr);
435 PWACtx Start = visit(Expr: Expr->getStart());
436 Result = combine(PWAC0: Result, PWAC1: Start, Fn: isl_pw_aff_add);
437 return Result;
438}
439
440PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) {
441 PWACtx Max = visit(Expr: Expr->getOperand(i: 0));
442
443 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
444 Max = combine(PWAC0: Max, PWAC1: visit(Expr: Expr->getOperand(i)), Fn: isl_pw_aff_max);
445 if (isTooComplex(PWAC: Max))
446 return complexityBailout();
447 }
448
449 return Max;
450}
451
452PWACtx SCEVAffinator::visitSMinExpr(const SCEVSMinExpr *Expr) {
453 PWACtx Min = visit(Expr: Expr->getOperand(i: 0));
454
455 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
456 Min = combine(PWAC0: Min, PWAC1: visit(Expr: Expr->getOperand(i)), Fn: isl_pw_aff_min);
457 if (isTooComplex(PWAC: Min))
458 return complexityBailout();
459 }
460
461 return Min;
462}
463
464PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) {
465 llvm_unreachable("SCEVUMaxExpr not yet supported");
466}
467
468PWACtx SCEVAffinator::visitUMinExpr(const SCEVUMinExpr *Expr) {
469 llvm_unreachable("SCEVUMinExpr not yet supported");
470}
471
472PWACtx
473SCEVAffinator::visitSequentialUMinExpr(const SCEVSequentialUMinExpr *Expr) {
474 llvm_unreachable("SCEVSequentialUMinExpr not yet supported");
475}
476
477PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) {
478 // The handling of unsigned division is basically the same as for signed
479 // division, except the interpretation of the operands. As the divisor
480 // has to be constant in both cases we can simply interpret it as an
481 // unsigned value without additional complexity in the representation.
482 // For the dividend we could choose from the different representation
483 // schemes introduced for zero-extend operations but for now we will
484 // simply use an assumption.
485 auto *Dividend = Expr->getLHS();
486 auto *Divisor = Expr->getRHS();
487 assert(isa<SCEVConstant>(Divisor) &&
488 "UDiv is no parameter but has a non-constant RHS.");
489
490 auto DividendPWAC = visit(Expr: Dividend);
491 auto DivisorPWAC = visit(Expr: Divisor);
492
493 if (SE.isKnownNegative(S: Divisor)) {
494 // Interpret negative divisors unsigned. This is a special case of the
495 // piece-wise defined value described for zero-extends as we already know
496 // the actual value of the constant divisor.
497 unsigned Width = TD.getTypeSizeInBits(Ty: Expr->getType());
498 auto *DivisorDom = DivisorPWAC.first.domain().release();
499 auto *WidthExpPWA = getWidthExpValOnDomain(Width, Dom: DivisorDom);
500 DivisorPWAC.first = DivisorPWAC.first.add(pwaff2: isl::manage(ptr: WidthExpPWA));
501 }
502
503 // TODO: One can represent the dividend as piece-wise function to be more
504 // precise but therefor a heuristic is needed.
505
506 // Assume a non-negative dividend.
507 takeNonNegativeAssumption(PWAC&: DividendPWAC, RecordedAssumptions);
508
509 DividendPWAC = combine(PWAC0: DividendPWAC, PWAC1: DivisorPWAC, Fn: isl_pw_aff_div);
510 DividendPWAC.first = DividendPWAC.first.floor();
511
512 return DividendPWAC;
513}
514
515PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) {
516 assert(SDiv->getOpcode() == Instruction::SDiv && "Assumed SDiv instruction!");
517
518 auto *Scope = getScope();
519 auto *Divisor = SDiv->getOperand(i: 1);
520 auto *DivisorSCEV = SE.getSCEVAtScope(V: Divisor, L: Scope);
521 auto DivisorPWAC = visit(Expr: DivisorSCEV);
522 assert(isa<SCEVConstant>(DivisorSCEV) &&
523 "SDiv is no parameter but has a non-constant RHS.");
524
525 auto *Dividend = SDiv->getOperand(i: 0);
526 auto *DividendSCEV = SE.getSCEVAtScope(V: Dividend, L: Scope);
527 auto DividendPWAC = visit(Expr: DividendSCEV);
528 DividendPWAC = combine(PWAC0: DividendPWAC, PWAC1: DivisorPWAC, Fn: isl_pw_aff_tdiv_q);
529 return DividendPWAC;
530}
531
532PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) {
533 assert(SRem->getOpcode() == Instruction::SRem && "Assumed SRem instruction!");
534
535 auto *Scope = getScope();
536 auto *Divisor = SRem->getOperand(i: 1);
537 auto *DivisorSCEV = SE.getSCEVAtScope(V: Divisor, L: Scope);
538 auto DivisorPWAC = visit(Expr: DivisorSCEV);
539 assert(isa<ConstantInt>(Divisor) &&
540 "SRem is no parameter but has a non-constant RHS.");
541
542 auto *Dividend = SRem->getOperand(i: 0);
543 auto *DividendSCEV = SE.getSCEVAtScope(V: Dividend, L: Scope);
544 auto DividendPWAC = visit(Expr: DividendSCEV);
545 DividendPWAC = combine(PWAC0: DividendPWAC, PWAC1: DivisorPWAC, Fn: isl_pw_aff_tdiv_r);
546 return DividendPWAC;
547}
548
549PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) {
550 if (Instruction *I = dyn_cast<Instruction>(Val: Expr->getValue())) {
551 switch (I->getOpcode()) {
552 case Instruction::IntToPtr:
553 return visit(Expr: SE.getSCEVAtScope(V: I->getOperand(i: 0), L: getScope()));
554 case Instruction::SDiv:
555 return visitSDivInstruction(SDiv: I);
556 case Instruction::SRem:
557 return visitSRemInstruction(SRem: I);
558 default:
559 break; // Fall through.
560 }
561 }
562
563 if (isa<ConstantPointerNull>(Val: Expr->getValue())) {
564 isl::val v{Ctx, 0};
565 isl::space Space{Ctx, 0, NumIterators};
566 isl::local_space ls{Space};
567 return getPWACtxFromPWA(PWA: isl::aff(ls, v));
568 }
569
570 llvm_unreachable("Unknowns SCEV was neither a parameter, a constant nor a "
571 "valid instruction.");
572}
573
574PWACtx SCEVAffinator::complexityBailout() {
575 // We hit the complexity limit for affine expressions; invalidate the scop
576 // and return a constant zero.
577 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
578 S->invalidate(Kind: COMPLEXITY, Loc);
579 return visit(Expr: SE.getZero(Ty: Type::getInt32Ty(C&: S->getFunction().getContext())));
580}
581

source code of polly/lib/Support/SCEVAffinator.cpp