1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/mach-dove/irq.c
4 *
5 * Dove IRQ handling.
6 */
7#include <linux/init.h>
8#include <linux/irq.h>
9#include <linux/io.h>
10#include <asm/exception.h>
11
12#include <plat/irq.h>
13#include <plat/orion-gpio.h>
14
15#include "pm.h"
16#include "bridge-regs.h"
17#include "common.h"
18
19static int __initdata gpio0_irqs[4] = {
20 IRQ_DOVE_GPIO_0_7,
21 IRQ_DOVE_GPIO_8_15,
22 IRQ_DOVE_GPIO_16_23,
23 IRQ_DOVE_GPIO_24_31,
24};
25
26static int __initdata gpio1_irqs[4] = {
27 IRQ_DOVE_HIGH_GPIO,
28 0,
29 0,
30 0,
31};
32
33static int __initdata gpio2_irqs[4] = {
34 0,
35 0,
36 0,
37 0,
38};
39
40static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
41
42static asmlinkage void
43__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
44{
45 u32 stat;
46
47 stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
48 stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
49 if (stat) {
50 unsigned int hwirq = 1 + __fls(stat);
51 handle_IRQ(hwirq, regs);
52 return;
53 }
54 stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
55 stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
56 if (stat) {
57 unsigned int hwirq = 33 + __fls(stat);
58 handle_IRQ(hwirq, regs);
59 return;
60 }
61}
62
63void __init dove_init_irq(void)
64{
65 orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
66 orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
67
68 set_handle_irq(dove_legacy_handle_irq);
69
70 /*
71 * Initialize gpiolib for GPIOs 0-71.
72 */
73 orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
74 IRQ_DOVE_GPIO_START, gpio0_irqs);
75
76 orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
77 IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
78
79 orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
80 IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
81}
82

source code of linux/arch/arm/mach-dove/irq.c