1/*
2* Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DC_RESOURCE_DCN20_H__
27#define __DC_RESOURCE_DCN20_H__
28
29#include "core_types.h"
30#include "dml/dcn20/dcn20_fpu.h"
31
32#define TO_DCN20_RES_POOL(pool)\
33 container_of(pool, struct dcn20_resource_pool, base)
34
35struct dc;
36struct resource_pool;
37struct _vcs_dpi_display_pipe_params_st;
38
39extern struct _vcs_dpi_ip_params_st dcn2_0_ip;
40extern struct _vcs_dpi_ip_params_st dcn2_0_nv14_ip;
41extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc;
42extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc;
43extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc;
44
45struct dcn20_resource_pool {
46 struct resource_pool base;
47};
48struct resource_pool *dcn20_create_resource_pool(
49 const struct dc_init_data *init_data,
50 struct dc *dc);
51
52struct link_encoder *dcn20_link_encoder_create(
53 struct dc_context *ctx,
54 const struct encoder_init_data *enc_init_data);
55
56unsigned int dcn20_calc_max_scaled_time(
57 unsigned int time_per_pixel,
58 enum mmhubbub_wbif_mode mode,
59 unsigned int urgent_watermark);
60
61struct pipe_ctx *dcn20_acquire_free_pipe_for_layer(
62 const struct dc_state *cur_ctx,
63 struct dc_state *new_ctx,
64 const struct resource_pool *pool,
65 const struct pipe_ctx *opp_head_pipe);
66void dcn20_release_pipe(struct dc_state *context,
67 struct pipe_ctx *pipe,
68 const struct resource_pool *pool);
69struct stream_encoder *dcn20_stream_encoder_create(
70 enum engine_id eng_id,
71 struct dc_context *ctx);
72
73struct dce_hwseq *dcn20_hwseq_create(
74 struct dc_context *ctx);
75
76bool dcn20_get_dcc_compression_cap(const struct dc *dc,
77 const struct dc_dcc_surface_param *input,
78 struct dc_surface_dcc_cap *output);
79
80void dcn20_dpp_destroy(struct dpp **dpp);
81
82struct dpp *dcn20_dpp_create(
83 struct dc_context *ctx,
84 uint32_t inst);
85
86struct input_pixel_processor *dcn20_ipp_create(
87 struct dc_context *ctx, uint32_t inst);
88
89struct output_pixel_processor *dcn20_opp_create(
90 struct dc_context *ctx, uint32_t inst);
91
92struct dce_aux *dcn20_aux_engine_create(
93 struct dc_context *ctx, uint32_t inst);
94
95struct dce_i2c_hw *dcn20_i2c_hw_create(
96 struct dc_context *ctx,
97 uint32_t inst);
98
99void dcn20_clock_source_destroy(struct clock_source **clk_src);
100
101struct display_stream_compressor *dcn20_dsc_create(
102 struct dc_context *ctx, uint32_t inst);
103void dcn20_dsc_destroy(struct display_stream_compressor **dsc);
104
105struct hubp *dcn20_hubp_create(
106 struct dc_context *ctx,
107 uint32_t inst);
108struct timing_generator *dcn20_timing_generator_create(
109 struct dc_context *ctx,
110 uint32_t instance);
111struct mpc *dcn20_mpc_create(struct dc_context *ctx);
112struct hubbub *dcn20_hubbub_create(struct dc_context *ctx);
113
114bool dcn20_dwbc_create(struct dc_context *ctx, struct resource_pool *pool);
115bool dcn20_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool);
116
117void dcn20_set_mcif_arb_params(
118 struct dc *dc,
119 struct dc_state *context,
120 display_e2e_pipe_params_st *pipes,
121 int pipe_cnt);
122bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
123void dcn20_merge_pipes_for_validate(
124 struct dc *dc,
125 struct dc_state *context);
126int dcn20_validate_apply_pipe_split_flags(
127 struct dc *dc,
128 struct dc_state *context,
129 int vlevel,
130 int *split,
131 bool *merge);
132void dcn20_release_dsc(struct resource_context *res_ctx,
133 const struct resource_pool *pool,
134 struct display_stream_compressor **dsc);
135bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
136void dcn20_split_stream_for_mpc(
137 struct resource_context *res_ctx,
138 const struct resource_pool *pool,
139 struct pipe_ctx *primary_pipe,
140 struct pipe_ctx *secondary_pipe);
141bool dcn20_split_stream_for_odm(
142 const struct dc *dc,
143 struct resource_context *res_ctx,
144 struct pipe_ctx *prev_odm_pipe,
145 struct pipe_ctx *next_odm_pipe);
146void dcn20_acquire_dsc(const struct dc *dc,
147 struct resource_context *res_ctx,
148 struct display_stream_compressor **dsc,
149 int pipe_idx);
150struct pipe_ctx *dcn20_find_secondary_pipe(struct dc *dc,
151 struct resource_context *res_ctx,
152 const struct resource_pool *pool,
153 const struct pipe_ctx *primary_pipe);
154bool dcn20_fast_validate_bw(
155 struct dc *dc,
156 struct dc_state *context,
157 display_e2e_pipe_params_st *pipes,
158 int *pipe_cnt_out,
159 int *pipe_split_from,
160 int *vlevel_out,
161 bool fast_validate);
162
163enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
164enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
165enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream);
166enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
167enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
168void dcn20_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx);
169
170#endif /* __DC_RESOURCE_DCN20_H__ */
171
172

source code of linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h