1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2021 Intel Corporation
4 */
5
6#include "gem/i915_gem_lmem.h"
7#include "gem/i915_gem_region.h"
8#include "i915_drv.h"
9#include "intel_atomic_plane.h"
10#include "intel_crtc.h"
11#include "intel_display.h"
12#include "intel_display_types.h"
13#include "intel_fb.h"
14#include "intel_frontbuffer.h"
15#include "intel_plane_initial.h"
16
17void intel_plane_initial_vblank_wait(struct intel_crtc *crtc)
18{
19 intel_crtc_wait_for_next_vblank(crtc);
20}
21
22static bool
23intel_reuse_initial_plane_obj(struct intel_crtc *this,
24 const struct intel_initial_plane_config plane_configs[],
25 struct drm_framebuffer **fb,
26 struct i915_vma **vma)
27{
28 struct intel_display *display = to_intel_display(this);
29 struct intel_crtc *crtc;
30
31 for_each_intel_crtc(display->drm, crtc) {
32 struct intel_plane *plane =
33 to_intel_plane(crtc->base.primary);
34 const struct intel_plane_state *plane_state =
35 to_intel_plane_state(plane->base.state);
36 const struct intel_crtc_state *crtc_state =
37 to_intel_crtc_state(crtc->base.state);
38
39 if (!crtc_state->uapi.active)
40 continue;
41
42 if (!plane_state->ggtt_vma)
43 continue;
44
45 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) {
46 *fb = plane_state->hw.fb;
47 *vma = plane_state->ggtt_vma;
48 return true;
49 }
50 }
51
52 return false;
53}
54
55static enum intel_memory_type
56initial_plane_memory_type(struct intel_display *display)
57{
58 struct drm_i915_private *i915 = to_i915(dev: display->drm);
59
60 if (display->platform.dgfx)
61 return INTEL_MEMORY_LOCAL;
62 else if (HAS_LMEMBAR_SMEM_STOLEN(i915))
63 return INTEL_MEMORY_STOLEN_LOCAL;
64 else
65 return INTEL_MEMORY_STOLEN_SYSTEM;
66}
67
68static bool
69initial_plane_phys(struct intel_display *display,
70 struct intel_initial_plane_config *plane_config)
71{
72 struct drm_i915_private *i915 = to_i915(dev: display->drm);
73 struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
74 struct intel_memory_region *mem;
75 enum intel_memory_type mem_type;
76 bool is_present, is_local;
77 dma_addr_t dma_addr;
78 u32 base;
79
80 mem_type = initial_plane_memory_type(display);
81 mem = intel_memory_region_by_type(i915, mem_type);
82 if (!mem) {
83 drm_dbg_kms(display->drm,
84 "Initial plane memory region (type %s) not initialized\n",
85 intel_memory_type_str(mem_type));
86 return false;
87 }
88
89 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
90
91 dma_addr = intel_ggtt_read_entry(vm: &ggtt->vm, offset: base, is_present: &is_present, is_local: &is_local);
92
93 if (!is_present) {
94 drm_err(display->drm,
95 "Initial plane FB PTE not present\n");
96 return false;
97 }
98
99 if (intel_memory_type_is_local(mem_type: mem->type) != is_local) {
100 drm_err(display->drm,
101 "Initial plane FB PTE unsuitable for %s\n",
102 mem->region.name);
103 return false;
104 }
105
106 if (dma_addr < mem->region.start || dma_addr > mem->region.end) {
107 drm_err(display->drm,
108 "Initial plane programming using invalid range, dma_addr=%pa (%s [%pa-%pa])\n",
109 &dma_addr, mem->region.name, &mem->region.start, &mem->region.end);
110 return false;
111 }
112
113 drm_dbg(display->drm,
114 "Using dma_addr=%pa, based on initial plane programming\n",
115 &dma_addr);
116
117 plane_config->phys_base = dma_addr - mem->region.start;
118 plane_config->mem = mem;
119
120 return true;
121}
122
123static struct i915_vma *
124initial_plane_vma(struct intel_display *display,
125 struct intel_initial_plane_config *plane_config)
126{
127 struct drm_i915_private *i915 = to_i915(dev: display->drm);
128 struct intel_memory_region *mem;
129 struct drm_i915_gem_object *obj;
130 struct drm_mm_node orig_mm = {};
131 struct i915_vma *vma;
132 resource_size_t phys_base;
133 u32 base, size;
134 u64 pinctl;
135
136 if (plane_config->size == 0)
137 return NULL;
138
139 if (!initial_plane_phys(display, plane_config))
140 return NULL;
141
142 phys_base = plane_config->phys_base;
143 mem = plane_config->mem;
144
145 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
146 size = round_up(plane_config->base + plane_config->size,
147 mem->min_page_size);
148 size -= base;
149
150 /*
151 * If the FB is too big, just don't use it since fbdev is not very
152 * important and we should probably use that space with FBC or other
153 * features.
154 */
155 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
156 mem == i915->mm.stolen_region &&
157 size * 2 > i915->dsm.usable_size) {
158 drm_dbg_kms(display->drm, "Initial FB size exceeds half of stolen, discarding\n");
159 return NULL;
160 }
161
162 obj = i915_gem_object_create_region_at(mem, offset: phys_base, size,
163 I915_BO_ALLOC_USER |
164 I915_BO_PREALLOC);
165 if (IS_ERR(ptr: obj)) {
166 drm_dbg_kms(display->drm, "Failed to preallocate initial FB in %s\n",
167 mem->region.name);
168 return NULL;
169 }
170
171 /*
172 * Mark it WT ahead of time to avoid changing the
173 * cache_level during fbdev initialization. The
174 * unbind there would get stuck waiting for rcu.
175 */
176 i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
177 I915_CACHE_WT : I915_CACHE_NONE);
178
179 switch (plane_config->tiling) {
180 case I915_TILING_NONE:
181 break;
182 case I915_TILING_X:
183 case I915_TILING_Y:
184 obj->tiling_and_stride =
185 plane_config->fb->base.pitches[0] |
186 plane_config->tiling;
187 break;
188 default:
189 MISSING_CASE(plane_config->tiling);
190 goto err_obj;
191 }
192
193 /*
194 * MTL GOP likes to place the framebuffer high up in ggtt,
195 * which can cause problems for ggtt_reserve_guc_top().
196 * Try to pin it to a low ggtt address instead to avoid that.
197 */
198 base = 0;
199
200 if (base != plane_config->base) {
201 struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
202 int ret;
203
204 /*
205 * Make sure the original and new locations
206 * can't overlap. That would corrupt the original
207 * PTEs which are still being used for scanout.
208 */
209 ret = i915_gem_gtt_reserve(vm: &ggtt->vm, NULL, node: &orig_mm,
210 size, offset: plane_config->base,
211 I915_COLOR_UNEVICTABLE, PIN_NOEVICT);
212 if (ret)
213 goto err_obj;
214 }
215
216 vma = i915_vma_instance(obj, vm: &to_gt(i915)->ggtt->vm, NULL);
217 if (IS_ERR(ptr: vma))
218 goto err_obj;
219
220retry:
221 pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base;
222 if (!i915_gem_object_is_lmem(obj))
223 pinctl |= PIN_MAPPABLE;
224 if (i915_vma_pin(vma, size: 0, alignment: 0, flags: pinctl)) {
225 if (drm_mm_node_allocated(node: &orig_mm)) {
226 drm_mm_remove_node(node: &orig_mm);
227 /*
228 * Try again, but this time pin
229 * it to its original location.
230 */
231 base = plane_config->base;
232 goto retry;
233 }
234 goto err_obj;
235 }
236
237 if (i915_gem_object_is_tiled(obj) &&
238 !i915_vma_is_map_and_fenceable(vma))
239 goto err_obj;
240
241 if (drm_mm_node_allocated(node: &orig_mm))
242 drm_mm_remove_node(node: &orig_mm);
243
244 drm_dbg_kms(display->drm,
245 "Initial plane fb bound to 0x%x in the ggtt (original 0x%x)\n",
246 i915_ggtt_offset(vma), plane_config->base);
247
248 return vma;
249
250err_obj:
251 if (drm_mm_node_allocated(node: &orig_mm))
252 drm_mm_remove_node(node: &orig_mm);
253 i915_gem_object_put(obj);
254 return NULL;
255}
256
257static bool
258intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
259 struct intel_initial_plane_config *plane_config)
260{
261 struct intel_display *display = to_intel_display(crtc);
262 struct drm_mode_fb_cmd2 mode_cmd = {};
263 struct drm_framebuffer *fb = &plane_config->fb->base;
264 struct i915_vma *vma;
265
266 switch (fb->modifier) {
267 case DRM_FORMAT_MOD_LINEAR:
268 case I915_FORMAT_MOD_X_TILED:
269 case I915_FORMAT_MOD_Y_TILED:
270 case I915_FORMAT_MOD_4_TILED:
271 break;
272 default:
273 drm_dbg(display->drm,
274 "Unsupported modifier for initial FB: 0x%llx\n",
275 fb->modifier);
276 return false;
277 }
278
279 vma = initial_plane_vma(display, plane_config);
280 if (!vma)
281 return false;
282
283 mode_cmd.pixel_format = fb->format->format;
284 mode_cmd.width = fb->width;
285 mode_cmd.height = fb->height;
286 mode_cmd.pitches[0] = fb->pitches[0];
287 mode_cmd.modifier[0] = fb->modifier;
288 mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
289
290 if (intel_framebuffer_init(to_intel_framebuffer(fb),
291 intel_bo_to_drm_bo(vma->obj), mode_cmd: &mode_cmd)) {
292 drm_dbg_kms(display->drm, "intel fb init failed\n");
293 goto err_vma;
294 }
295
296 plane_config->vma = vma;
297 return true;
298
299err_vma:
300 i915_vma_put(vma);
301 return false;
302}
303
304static void
305intel_find_initial_plane_obj(struct intel_crtc *crtc,
306 struct intel_initial_plane_config plane_configs[])
307{
308 struct drm_i915_private *dev_priv = to_i915(dev: crtc->base.dev);
309 struct intel_initial_plane_config *plane_config =
310 &plane_configs[crtc->pipe];
311 struct intel_plane *plane =
312 to_intel_plane(crtc->base.primary);
313 struct intel_plane_state *plane_state =
314 to_intel_plane_state(plane->base.state);
315 struct drm_framebuffer *fb;
316 struct i915_vma *vma;
317
318 /*
319 * TODO:
320 * Disable planes if get_initial_plane_config() failed.
321 * Make sure things work if the surface base is not page aligned.
322 */
323 if (!plane_config->fb)
324 return;
325
326 if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
327 fb = &plane_config->fb->base;
328 vma = plane_config->vma;
329 goto valid_fb;
330 }
331
332 /*
333 * Failed to alloc the obj, check to see if we should share
334 * an fb with another CRTC instead
335 */
336 if (intel_reuse_initial_plane_obj(this: crtc, plane_configs, fb: &fb, vma: &vma))
337 goto valid_fb;
338
339 /*
340 * We've failed to reconstruct the BIOS FB. Current display state
341 * indicates that the primary plane is visible, but has a NULL FB,
342 * which will lead to problems later if we don't fix it up. The
343 * simplest solution is to just disable the primary plane now and
344 * pretend the BIOS never had it enabled.
345 */
346 intel_plane_disable_noatomic(crtc, plane);
347
348 return;
349
350valid_fb:
351 plane_state->uapi.rotation = plane_config->rotation;
352 intel_fb_fill_view(to_intel_framebuffer(fb),
353 rotation: plane_state->uapi.rotation, view: &plane_state->view);
354
355 __i915_vma_pin(vma);
356 plane_state->ggtt_vma = i915_vma_get(vma);
357 if (intel_plane_uses_fence(plane_state) &&
358 i915_vma_pin_fence(vma) == 0 && vma->fence)
359 plane_state->flags |= PLANE_HAS_FENCE;
360
361 plane_state->uapi.src_x = 0;
362 plane_state->uapi.src_y = 0;
363 plane_state->uapi.src_w = fb->width << 16;
364 plane_state->uapi.src_h = fb->height << 16;
365
366 plane_state->uapi.crtc_x = 0;
367 plane_state->uapi.crtc_y = 0;
368 plane_state->uapi.crtc_w = fb->width;
369 plane_state->uapi.crtc_h = fb->height;
370
371 if (plane_config->tiling)
372 dev_priv->preserve_bios_swizzle = true;
373
374 plane_state->uapi.fb = fb;
375 drm_framebuffer_get(fb);
376
377 plane_state->uapi.crtc = &crtc->base;
378 intel_plane_copy_uapi_to_hw_state(plane_state, from_plane_state: plane_state, crtc);
379
380 atomic_or(i: plane->frontbuffer_bit, v: &to_intel_frontbuffer(fb)->bits);
381}
382
383static void plane_config_fini(struct intel_initial_plane_config *plane_config)
384{
385 if (plane_config->fb) {
386 struct drm_framebuffer *fb = &plane_config->fb->base;
387
388 /* We may only have the stub and not a full framebuffer */
389 if (drm_framebuffer_read_refcount(fb))
390 drm_framebuffer_put(fb);
391 else
392 kfree(objp: fb);
393 }
394
395 if (plane_config->vma)
396 i915_vma_put(vma: plane_config->vma);
397}
398
399void intel_initial_plane_config(struct intel_display *display)
400{
401 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {};
402 struct intel_crtc *crtc;
403
404 for_each_intel_crtc(display->drm, crtc) {
405 struct intel_initial_plane_config *plane_config =
406 &plane_configs[crtc->pipe];
407
408 if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
409 continue;
410
411 /*
412 * Note that reserving the BIOS fb up front prevents us
413 * from stuffing other stolen allocations like the ring
414 * on top. This prevents some ugliness at boot time, and
415 * can even allow for smooth boot transitions if the BIOS
416 * fb is large enough for the active pipe configuration.
417 */
418 display->funcs.display->get_initial_plane_config(crtc, plane_config);
419
420 /*
421 * If the fb is shared between multiple heads, we'll
422 * just get the first one.
423 */
424 intel_find_initial_plane_obj(crtc, plane_configs);
425
426 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))
427 intel_plane_initial_vblank_wait(crtc);
428
429 plane_config_fini(plane_config);
430 }
431}
432

source code of linux/drivers/gpu/drm/i915/display/intel_plane_initial.c