1// SPDX-License-Identifier: GPL-2.0-only
2
3#include <linux/aperture.h>
4#include <linux/of_address.h>
5#include <linux/pci.h>
6#include <linux/platform_device.h>
7
8#include <drm/clients/drm_client_setup.h>
9#include <drm/drm_atomic.h>
10#include <drm/drm_atomic_state_helper.h>
11#include <drm/drm_color_mgmt.h>
12#include <drm/drm_connector.h>
13#include <drm/drm_damage_helper.h>
14#include <drm/drm_device.h>
15#include <drm/drm_drv.h>
16#include <drm/drm_edid.h>
17#include <drm/drm_fbdev_shmem.h>
18#include <drm/drm_framebuffer.h>
19#include <drm/drm_gem_atomic_helper.h>
20#include <drm/drm_gem_framebuffer_helper.h>
21#include <drm/drm_gem_shmem_helper.h>
22#include <drm/drm_managed.h>
23#include <drm/drm_modeset_helper_vtables.h>
24#include <drm/drm_print.h>
25#include <drm/drm_probe_helper.h>
26
27#include "drm_sysfb_helper.h"
28
29#define DRIVER_NAME "ofdrm"
30#define DRIVER_DESC "DRM driver for OF platform devices"
31#define DRIVER_MAJOR 1
32#define DRIVER_MINOR 0
33
34#define PCI_VENDOR_ID_ATI_R520 0x7100
35#define PCI_VENDOR_ID_ATI_R600 0x9400
36
37#define OFDRM_GAMMA_LUT_SIZE 256
38
39/* Definitions used by the Avivo palette */
40#define AVIVO_DC_LUT_RW_SELECT 0x6480
41#define AVIVO_DC_LUT_RW_MODE 0x6484
42#define AVIVO_DC_LUT_RW_INDEX 0x6488
43#define AVIVO_DC_LUT_SEQ_COLOR 0x648c
44#define AVIVO_DC_LUT_PWL_DATA 0x6490
45#define AVIVO_DC_LUT_30_COLOR 0x6494
46#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
47#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
48#define AVIVO_DC_LUT_AUTOFILL 0x64a0
49#define AVIVO_DC_LUTA_CONTROL 0x64c0
50#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
51#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
52#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
53#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
54#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
55#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
56#define AVIVO_DC_LUTB_CONTROL 0x6cc0
57#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
58#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
59#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
60#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
61#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
62#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
63
64enum ofdrm_model {
65 OFDRM_MODEL_UNKNOWN,
66 OFDRM_MODEL_MACH64, /* ATI Mach64 */
67 OFDRM_MODEL_RAGE128, /* ATI Rage128 */
68 OFDRM_MODEL_RAGE_M3A, /* ATI Rage Mobility M3 Head A */
69 OFDRM_MODEL_RAGE_M3B, /* ATI Rage Mobility M3 Head B */
70 OFDRM_MODEL_RADEON, /* ATI Radeon */
71 OFDRM_MODEL_GXT2000, /* IBM GXT2000 */
72 OFDRM_MODEL_AVIVO, /* ATI R5xx */
73 OFDRM_MODEL_QEMU, /* QEMU VGA */
74};
75
76/*
77 * Helpers for display nodes
78 */
79
80static int display_get_validated_int(struct drm_device *dev, const char *name, uint32_t value)
81{
82 return drm_sysfb_get_validated_int(dev, name, value, INT_MAX);
83}
84
85static int display_get_validated_int0(struct drm_device *dev, const char *name, uint32_t value)
86{
87 return drm_sysfb_get_validated_int0(dev, name, value, INT_MAX);
88}
89
90static const struct drm_format_info *display_get_validated_format(struct drm_device *dev,
91 u32 depth, bool big_endian)
92{
93 const struct drm_format_info *info;
94 u32 format;
95
96 switch (depth) {
97 case 8:
98 format = drm_mode_legacy_fb_format(bpp: 8, depth: 8);
99 break;
100 case 15:
101 case 16:
102 format = drm_mode_legacy_fb_format(bpp: 16, depth);
103 break;
104 case 32:
105 format = drm_mode_legacy_fb_format(bpp: 32, depth: 24);
106 break;
107 default:
108 drm_err(dev, "unsupported framebuffer depth %u\n", depth);
109 return ERR_PTR(error: -EINVAL);
110 }
111
112 /*
113 * DRM formats assume little-endian byte order. Update the format
114 * if the scanout buffer uses big-endian ordering.
115 */
116 if (big_endian) {
117 switch (format) {
118 case DRM_FORMAT_XRGB8888:
119 format = DRM_FORMAT_BGRX8888;
120 break;
121 case DRM_FORMAT_ARGB8888:
122 format = DRM_FORMAT_BGRA8888;
123 break;
124 case DRM_FORMAT_RGB565:
125 format = DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN;
126 break;
127 case DRM_FORMAT_XRGB1555:
128 format = DRM_FORMAT_XRGB1555 | DRM_FORMAT_BIG_ENDIAN;
129 break;
130 default:
131 break;
132 }
133 }
134
135 info = drm_format_info(format);
136 if (!info) {
137 drm_err(dev, "cannot find framebuffer format for depth %u\n", depth);
138 return ERR_PTR(error: -EINVAL);
139 }
140
141 return info;
142}
143
144static int display_read_u32_of(struct drm_device *dev, struct device_node *of_node,
145 const char *name, u32 *value)
146{
147 int ret = of_property_read_u32(np: of_node, propname: name, out_value: value);
148
149 if (ret)
150 drm_err(dev, "cannot parse framebuffer %s: error %d\n", name, ret);
151 return ret;
152}
153
154static bool display_get_big_endian_of(struct drm_device *dev, struct device_node *of_node)
155{
156 bool big_endian;
157
158#ifdef __BIG_ENDIAN
159 big_endian = !of_property_read_bool(of_node, "little-endian");
160#else
161 big_endian = of_property_read_bool(np: of_node, propname: "big-endian");
162#endif
163
164 return big_endian;
165}
166
167static int display_get_width_of(struct drm_device *dev, struct device_node *of_node)
168{
169 u32 width;
170 int ret = display_read_u32_of(dev, of_node, name: "width", value: &width);
171
172 if (ret)
173 return ret;
174 return display_get_validated_int0(dev, name: "width", value: width);
175}
176
177static int display_get_height_of(struct drm_device *dev, struct device_node *of_node)
178{
179 u32 height;
180 int ret = display_read_u32_of(dev, of_node, name: "height", value: &height);
181
182 if (ret)
183 return ret;
184 return display_get_validated_int0(dev, name: "height", value: height);
185}
186
187static int display_get_depth_of(struct drm_device *dev, struct device_node *of_node)
188{
189 u32 depth;
190 int ret = display_read_u32_of(dev, of_node, name: "depth", value: &depth);
191
192 if (ret)
193 return ret;
194 return display_get_validated_int0(dev, name: "depth", value: depth);
195}
196
197static int display_get_linebytes_of(struct drm_device *dev, struct device_node *of_node)
198{
199 u32 linebytes;
200 int ret = display_read_u32_of(dev, of_node, name: "linebytes", value: &linebytes);
201
202 if (ret)
203 return ret;
204 return display_get_validated_int(dev, name: "linebytes", value: linebytes);
205}
206
207static u64 display_get_address_of(struct drm_device *dev, struct device_node *of_node)
208{
209 u32 address;
210 int ret;
211
212 /*
213 * Not all devices provide an address property, it's not
214 * a bug if this fails. The driver will try to find the
215 * framebuffer base address from the device's memory regions.
216 */
217 ret = of_property_read_u32(np: of_node, propname: "address", out_value: &address);
218 if (ret)
219 return OF_BAD_ADDR;
220
221 return address;
222}
223
224static const u8 *display_get_edid_of(struct drm_device *dev, struct device_node *of_node,
225 u8 buf[EDID_LENGTH])
226{
227 int ret = of_property_read_u8_array(np: of_node, propname: "EDID", out_values: buf, EDID_LENGTH);
228
229 if (ret)
230 return NULL;
231 return buf;
232}
233
234static bool is_avivo(u32 vendor, u32 device)
235{
236 /* This will match most R5xx */
237 return (vendor == PCI_VENDOR_ID_ATI) &&
238 ((device >= PCI_VENDOR_ID_ATI_R520 && device < 0x7800) ||
239 (PCI_VENDOR_ID_ATI_R600 >= 0x9400));
240}
241
242static enum ofdrm_model display_get_model_of(struct drm_device *dev, struct device_node *of_node)
243{
244 enum ofdrm_model model = OFDRM_MODEL_UNKNOWN;
245
246 if (of_node_name_prefix(np: of_node, prefix: "ATY,Rage128")) {
247 model = OFDRM_MODEL_RAGE128;
248 } else if (of_node_name_prefix(np: of_node, prefix: "ATY,RageM3pA") ||
249 of_node_name_prefix(np: of_node, prefix: "ATY,RageM3p12A")) {
250 model = OFDRM_MODEL_RAGE_M3A;
251 } else if (of_node_name_prefix(np: of_node, prefix: "ATY,RageM3pB")) {
252 model = OFDRM_MODEL_RAGE_M3B;
253 } else if (of_node_name_prefix(np: of_node, prefix: "ATY,Rage6")) {
254 model = OFDRM_MODEL_RADEON;
255 } else if (of_node_name_prefix(np: of_node, prefix: "ATY,")) {
256 return OFDRM_MODEL_MACH64;
257 } else if (of_device_is_compatible(device: of_node, "pci1014,b7") ||
258 of_device_is_compatible(device: of_node, "pci1014,21c")) {
259 model = OFDRM_MODEL_GXT2000;
260 } else if (of_node_name_prefix(np: of_node, prefix: "vga,Display-")) {
261 struct device_node *of_parent;
262 const __be32 *vendor_p, *device_p;
263
264 /* Look for AVIVO initialized by SLOF */
265 of_parent = of_get_parent(node: of_node);
266 vendor_p = of_get_property(node: of_parent, name: "vendor-id", NULL);
267 device_p = of_get_property(node: of_parent, name: "device-id", NULL);
268 if (vendor_p && device_p) {
269 u32 vendor = be32_to_cpup(p: vendor_p);
270 u32 device = be32_to_cpup(p: device_p);
271
272 if (is_avivo(vendor, device))
273 model = OFDRM_MODEL_AVIVO;
274 }
275 of_node_put(node: of_parent);
276 } else if (of_device_is_compatible(device: of_node, "qemu,std-vga")) {
277 model = OFDRM_MODEL_QEMU;
278 }
279
280 return model;
281}
282
283/*
284 * Open Firmware display device
285 */
286
287struct ofdrm_device;
288
289struct ofdrm_device_funcs {
290 void __iomem *(*cmap_ioremap)(struct ofdrm_device *odev,
291 struct device_node *of_node,
292 u64 fb_bas);
293 void (*cmap_write)(struct ofdrm_device *odev, unsigned char index,
294 unsigned char r, unsigned char g, unsigned char b);
295};
296
297struct ofdrm_device {
298 struct drm_sysfb_device sysfb;
299
300 const struct ofdrm_device_funcs *funcs;
301
302 /* colormap */
303 void __iomem *cmap_base;
304
305 u8 edid[EDID_LENGTH];
306
307 /* modesetting */
308 u32 formats[DRM_SYSFB_PLANE_NFORMATS(1)];
309 struct drm_plane primary_plane;
310 struct drm_crtc crtc;
311 struct drm_encoder encoder;
312 struct drm_connector connector;
313};
314
315static struct ofdrm_device *ofdrm_device_of_dev(struct drm_device *dev)
316{
317 return container_of(to_drm_sysfb_device(dev), struct ofdrm_device, sysfb);
318}
319
320/*
321 * Hardware
322 */
323
324#if defined(CONFIG_PCI)
325static struct pci_dev *display_get_pci_dev_of(struct drm_device *dev, struct device_node *of_node)
326{
327 const __be32 *vendor_p, *device_p;
328 u32 vendor, device;
329 struct pci_dev *pcidev;
330
331 vendor_p = of_get_property(node: of_node, name: "vendor-id", NULL);
332 if (!vendor_p)
333 return ERR_PTR(error: -ENODEV);
334 vendor = be32_to_cpup(p: vendor_p);
335
336 device_p = of_get_property(node: of_node, name: "device-id", NULL);
337 if (!device_p)
338 return ERR_PTR(error: -ENODEV);
339 device = be32_to_cpup(p: device_p);
340
341 pcidev = pci_get_device(vendor, device, NULL);
342 if (!pcidev)
343 return ERR_PTR(error: -ENODEV);
344
345 return pcidev;
346}
347
348static void ofdrm_pci_release(void *data)
349{
350 struct pci_dev *pcidev = data;
351
352 pci_disable_device(dev: pcidev);
353}
354
355static int ofdrm_device_init_pci(struct ofdrm_device *odev)
356{
357 struct drm_device *dev = &odev->sysfb.dev;
358 struct platform_device *pdev = to_platform_device(dev->dev);
359 struct device_node *of_node = pdev->dev.of_node;
360 struct pci_dev *pcidev;
361 int ret;
362
363 /*
364 * Never use pcim_ or other managed helpers on the returned PCI
365 * device. Otherwise, probing the native driver will fail for
366 * resource conflicts. PCI-device management has to be tied to
367 * the lifetime of the platform device until the native driver
368 * takes over.
369 */
370 pcidev = display_get_pci_dev_of(dev, of_node);
371 if (IS_ERR(ptr: pcidev))
372 return 0; /* no PCI device found; ignore the error */
373
374 ret = pci_enable_device(dev: pcidev);
375 if (ret) {
376 drm_err(dev, "pci_enable_device(%s) failed: %d\n",
377 dev_name(&pcidev->dev), ret);
378 return ret;
379 }
380 ret = devm_add_action_or_reset(&pdev->dev, ofdrm_pci_release, pcidev);
381 if (ret)
382 return ret;
383
384 return 0;
385}
386#else
387static int ofdrm_device_init_pci(struct ofdrm_device *odev)
388{
389 return 0;
390}
391#endif
392
393/*
394 * OF display settings
395 */
396
397static struct resource *ofdrm_find_fb_resource(struct ofdrm_device *odev,
398 struct resource *fb_res)
399{
400 struct platform_device *pdev = to_platform_device(odev->sysfb.dev.dev);
401 struct resource *res, *max_res = NULL;
402 u32 i;
403
404 for (i = 0; pdev->num_resources; ++i) {
405 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
406 if (!res)
407 break; /* all resources processed */
408 if (resource_size(res) < resource_size(res: fb_res))
409 continue; /* resource too small */
410 if (fb_res->start && resource_contains(r1: res, r2: fb_res))
411 return res; /* resource contains framebuffer */
412 if (!max_res || resource_size(res) > resource_size(res: max_res))
413 max_res = res; /* store largest resource as fallback */
414 }
415
416 return max_res;
417}
418
419/*
420 * Colormap / Palette
421 */
422
423static void __iomem *get_cmap_address_of(struct ofdrm_device *odev, struct device_node *of_node,
424 int bar_no, unsigned long offset, unsigned long size)
425{
426 struct drm_device *dev = &odev->sysfb.dev;
427 const __be32 *addr_p;
428 u64 max_size, address;
429 unsigned int flags;
430 void __iomem *mem;
431
432 addr_p = of_get_pci_address(dev: of_node, bar_no, size: &max_size, flags: &flags);
433 if (!addr_p)
434 addr_p = of_get_address(dev: of_node, index: bar_no, size: &max_size, flags: &flags);
435 if (!addr_p)
436 return IOMEM_ERR_PTR(-ENODEV);
437
438 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
439 return IOMEM_ERR_PTR(-ENODEV);
440
441 if ((offset + size) >= max_size)
442 return IOMEM_ERR_PTR(-ENODEV);
443
444 address = of_translate_address(np: of_node, addr: addr_p);
445 if (address == OF_BAD_ADDR)
446 return IOMEM_ERR_PTR(-ENODEV);
447
448 mem = devm_ioremap(dev: dev->dev, offset: address + offset, size);
449 if (!mem)
450 return IOMEM_ERR_PTR(-ENOMEM);
451
452 return mem;
453}
454
455static void __iomem *ofdrm_mach64_cmap_ioremap(struct ofdrm_device *odev,
456 struct device_node *of_node,
457 u64 fb_base)
458{
459 struct drm_device *dev = &odev->sysfb.dev;
460 u64 address;
461 void __iomem *cmap_base;
462
463 address = fb_base & 0xff000000ul;
464 address += 0x7ff000;
465
466 cmap_base = devm_ioremap(dev: dev->dev, offset: address, size: 0x1000);
467 if (!cmap_base)
468 return IOMEM_ERR_PTR(-ENOMEM);
469
470 return cmap_base;
471}
472
473static void ofdrm_mach64_cmap_write(struct ofdrm_device *odev, unsigned char index,
474 unsigned char r, unsigned char g, unsigned char b)
475{
476 void __iomem *addr = odev->cmap_base + 0xcc0;
477 void __iomem *data = odev->cmap_base + 0xcc0 + 1;
478
479 writeb(val: index, addr);
480 writeb(val: r, addr: data);
481 writeb(val: g, addr: data);
482 writeb(val: b, addr: data);
483}
484
485static void __iomem *ofdrm_rage128_cmap_ioremap(struct ofdrm_device *odev,
486 struct device_node *of_node,
487 u64 fb_base)
488{
489 return get_cmap_address_of(odev, of_node, bar_no: 2, offset: 0, size: 0x1fff);
490}
491
492static void ofdrm_rage128_cmap_write(struct ofdrm_device *odev, unsigned char index,
493 unsigned char r, unsigned char g, unsigned char b)
494{
495 void __iomem *addr = odev->cmap_base + 0xb0;
496 void __iomem *data = odev->cmap_base + 0xb4;
497 u32 color = (r << 16) | (g << 8) | b;
498
499 writeb(val: index, addr);
500 writel(val: color, addr: data);
501}
502
503static void __iomem *ofdrm_rage_m3a_cmap_ioremap(struct ofdrm_device *odev,
504 struct device_node *of_node,
505 u64 fb_base)
506{
507 return get_cmap_address_of(odev, of_node, bar_no: 2, offset: 0, size: 0x1fff);
508}
509
510static void ofdrm_rage_m3a_cmap_write(struct ofdrm_device *odev, unsigned char index,
511 unsigned char r, unsigned char g, unsigned char b)
512{
513 void __iomem *dac_ctl = odev->cmap_base + 0x58;
514 void __iomem *addr = odev->cmap_base + 0xb0;
515 void __iomem *data = odev->cmap_base + 0xb4;
516 u32 color = (r << 16) | (g << 8) | b;
517 u32 val;
518
519 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
520 val = readl(addr: dac_ctl);
521 val &= ~0x20;
522 writel(val, addr: dac_ctl);
523
524 /* Set color at palette index */
525 writeb(val: index, addr);
526 writel(val: color, addr: data);
527}
528
529static void __iomem *ofdrm_rage_m3b_cmap_ioremap(struct ofdrm_device *odev,
530 struct device_node *of_node,
531 u64 fb_base)
532{
533 return get_cmap_address_of(odev, of_node, bar_no: 2, offset: 0, size: 0x1fff);
534}
535
536static void ofdrm_rage_m3b_cmap_write(struct ofdrm_device *odev, unsigned char index,
537 unsigned char r, unsigned char g, unsigned char b)
538{
539 void __iomem *dac_ctl = odev->cmap_base + 0x58;
540 void __iomem *addr = odev->cmap_base + 0xb0;
541 void __iomem *data = odev->cmap_base + 0xb4;
542 u32 color = (r << 16) | (g << 8) | b;
543 u32 val;
544
545 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
546 val = readl(addr: dac_ctl);
547 val |= 0x20;
548 writel(val, addr: dac_ctl);
549
550 /* Set color at palette index */
551 writeb(val: index, addr);
552 writel(val: color, addr: data);
553}
554
555static void __iomem *ofdrm_radeon_cmap_ioremap(struct ofdrm_device *odev,
556 struct device_node *of_node,
557 u64 fb_base)
558{
559 return get_cmap_address_of(odev, of_node, bar_no: 1, offset: 0, size: 0x1fff);
560}
561
562static void __iomem *ofdrm_gxt2000_cmap_ioremap(struct ofdrm_device *odev,
563 struct device_node *of_node,
564 u64 fb_base)
565{
566 return get_cmap_address_of(odev, of_node, bar_no: 0, offset: 0x6000, size: 0x1000);
567}
568
569static void ofdrm_gxt2000_cmap_write(struct ofdrm_device *odev, unsigned char index,
570 unsigned char r, unsigned char g, unsigned char b)
571{
572 void __iomem *data = ((unsigned int __iomem *)odev->cmap_base) + index;
573 u32 color = (r << 16) | (g << 8) | b;
574
575 writel(val: color, addr: data);
576}
577
578static void __iomem *ofdrm_avivo_cmap_ioremap(struct ofdrm_device *odev,
579 struct device_node *of_node,
580 u64 fb_base)
581{
582 struct device_node *of_parent;
583 void __iomem *cmap_base;
584
585 of_parent = of_get_parent(node: of_node);
586 cmap_base = get_cmap_address_of(odev, of_node: of_parent, bar_no: 0, offset: 0, size: 0x10000);
587 of_node_put(node: of_parent);
588
589 return cmap_base;
590}
591
592static void ofdrm_avivo_cmap_write(struct ofdrm_device *odev, unsigned char index,
593 unsigned char r, unsigned char g, unsigned char b)
594{
595 void __iomem *lutsel = odev->cmap_base + AVIVO_DC_LUT_RW_SELECT;
596 void __iomem *addr = odev->cmap_base + AVIVO_DC_LUT_RW_INDEX;
597 void __iomem *data = odev->cmap_base + AVIVO_DC_LUT_30_COLOR;
598 u32 color = (r << 22) | (g << 12) | (b << 2);
599
600 /* Write to both LUTs for now */
601
602 writel(val: 1, addr: lutsel);
603 writeb(val: index, addr);
604 writel(val: color, addr: data);
605
606 writel(val: 0, addr: lutsel);
607 writeb(val: index, addr);
608 writel(val: color, addr: data);
609}
610
611static void __iomem *ofdrm_qemu_cmap_ioremap(struct ofdrm_device *odev,
612 struct device_node *of_node,
613 u64 fb_base)
614{
615 static const __be32 io_of_addr[3] = {
616 cpu_to_be32(0x01000000),
617 cpu_to_be32(0x00),
618 cpu_to_be32(0x00),
619 };
620
621 struct drm_device *dev = &odev->sysfb.dev;
622 u64 address;
623 void __iomem *cmap_base;
624
625 address = of_translate_address(np: of_node, addr: io_of_addr);
626 if (address == OF_BAD_ADDR)
627 return IOMEM_ERR_PTR(-ENODEV);
628
629 cmap_base = devm_ioremap(dev: dev->dev, offset: address + 0x3c8, size: 2);
630 if (!cmap_base)
631 return IOMEM_ERR_PTR(-ENOMEM);
632
633 return cmap_base;
634}
635
636static void ofdrm_qemu_cmap_write(struct ofdrm_device *odev, unsigned char index,
637 unsigned char r, unsigned char g, unsigned char b)
638{
639 void __iomem *addr = odev->cmap_base;
640 void __iomem *data = odev->cmap_base + 1;
641
642 writeb(val: index, addr);
643 writeb(val: r, addr: data);
644 writeb(val: g, addr: data);
645 writeb(val: b, addr: data);
646}
647
648static void ofdrm_set_gamma_lut(struct drm_crtc *crtc, unsigned int index,
649 u16 red, u16 green, u16 blue)
650{
651 struct drm_device *dev = crtc->dev;
652 struct ofdrm_device *odev = ofdrm_device_of_dev(dev);
653 u8 i8 = index & 0xff;
654 u8 r8 = red >> 8;
655 u8 g8 = green >> 8;
656 u8 b8 = blue >> 8;
657
658 if (drm_WARN_ON_ONCE(dev, index != i8))
659 return; /* driver bug */
660
661 odev->funcs->cmap_write(odev, i8, r8, g8, b8);
662}
663
664static void ofdrm_device_fill_gamma(struct ofdrm_device *odev,
665 const struct drm_format_info *format)
666{
667 struct drm_device *dev = &odev->sysfb.dev;
668 struct drm_crtc *crtc = &odev->crtc;
669
670 switch (format->format) {
671 case DRM_FORMAT_RGB565:
672 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN:
673 drm_crtc_fill_gamma_565(crtc, set_gamma: ofdrm_set_gamma_lut);
674 break;
675 case DRM_FORMAT_XRGB8888:
676 case DRM_FORMAT_BGRX8888:
677 drm_crtc_fill_gamma_888(crtc, set_gamma: ofdrm_set_gamma_lut);
678 break;
679 default:
680 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n",
681 &format->format);
682 break;
683 }
684}
685
686static void ofdrm_device_load_gamma(struct ofdrm_device *odev,
687 const struct drm_format_info *format,
688 struct drm_color_lut *lut)
689{
690 struct drm_device *dev = &odev->sysfb.dev;
691 struct drm_crtc *crtc = &odev->crtc;
692
693 switch (format->format) {
694 case DRM_FORMAT_RGB565:
695 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN:
696 drm_crtc_load_gamma_565_from_888(crtc, lut, set_gamma: ofdrm_set_gamma_lut);
697 break;
698 case DRM_FORMAT_XRGB8888:
699 case DRM_FORMAT_BGRX8888:
700 drm_crtc_load_gamma_888(crtc, lut, set_gamma: ofdrm_set_gamma_lut);
701 break;
702 default:
703 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n",
704 &format->format);
705 break;
706 }
707}
708
709/*
710 * Modesetting
711 */
712
713static const u64 ofdrm_primary_plane_format_modifiers[] = {
714 DRM_SYSFB_PLANE_FORMAT_MODIFIERS,
715};
716
717static const struct drm_plane_helper_funcs ofdrm_primary_plane_helper_funcs = {
718 DRM_SYSFB_PLANE_HELPER_FUNCS,
719};
720
721static const struct drm_plane_funcs ofdrm_primary_plane_funcs = {
722 DRM_SYSFB_PLANE_FUNCS,
723 .destroy = drm_plane_cleanup,
724};
725
726static void ofdrm_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state)
727{
728 struct ofdrm_device *odev = ofdrm_device_of_dev(dev: crtc->dev);
729 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
730 struct drm_sysfb_crtc_state *sysfb_crtc_state = to_drm_sysfb_crtc_state(base: crtc_state);
731
732 if (crtc_state->enable && crtc_state->color_mgmt_changed) {
733 const struct drm_format_info *format = sysfb_crtc_state->format;
734
735 if (crtc_state->gamma_lut)
736 ofdrm_device_load_gamma(odev, format, lut: crtc_state->gamma_lut->data);
737 else
738 ofdrm_device_fill_gamma(odev, format);
739 }
740}
741
742static const struct drm_crtc_helper_funcs ofdrm_crtc_helper_funcs = {
743 DRM_SYSFB_CRTC_HELPER_FUNCS,
744 .atomic_flush = ofdrm_crtc_helper_atomic_flush,
745};
746
747static const struct drm_crtc_funcs ofdrm_crtc_funcs = {
748 DRM_SYSFB_CRTC_FUNCS,
749 .destroy = drm_crtc_cleanup,
750};
751
752static const struct drm_encoder_funcs ofdrm_encoder_funcs = {
753 .destroy = drm_encoder_cleanup,
754};
755
756static const struct drm_connector_helper_funcs ofdrm_connector_helper_funcs = {
757 DRM_SYSFB_CONNECTOR_HELPER_FUNCS,
758};
759
760static const struct drm_connector_funcs ofdrm_connector_funcs = {
761 DRM_SYSFB_CONNECTOR_FUNCS,
762 .destroy = drm_connector_cleanup,
763};
764
765static const struct drm_mode_config_funcs ofdrm_mode_config_funcs = {
766 DRM_SYSFB_MODE_CONFIG_FUNCS,
767};
768
769/*
770 * Init / Cleanup
771 */
772
773static const struct ofdrm_device_funcs ofdrm_unknown_device_funcs = {
774};
775
776static const struct ofdrm_device_funcs ofdrm_mach64_device_funcs = {
777 .cmap_ioremap = ofdrm_mach64_cmap_ioremap,
778 .cmap_write = ofdrm_mach64_cmap_write,
779};
780
781static const struct ofdrm_device_funcs ofdrm_rage128_device_funcs = {
782 .cmap_ioremap = ofdrm_rage128_cmap_ioremap,
783 .cmap_write = ofdrm_rage128_cmap_write,
784};
785
786static const struct ofdrm_device_funcs ofdrm_rage_m3a_device_funcs = {
787 .cmap_ioremap = ofdrm_rage_m3a_cmap_ioremap,
788 .cmap_write = ofdrm_rage_m3a_cmap_write,
789};
790
791static const struct ofdrm_device_funcs ofdrm_rage_m3b_device_funcs = {
792 .cmap_ioremap = ofdrm_rage_m3b_cmap_ioremap,
793 .cmap_write = ofdrm_rage_m3b_cmap_write,
794};
795
796static const struct ofdrm_device_funcs ofdrm_radeon_device_funcs = {
797 .cmap_ioremap = ofdrm_radeon_cmap_ioremap,
798 .cmap_write = ofdrm_rage128_cmap_write, /* same as Rage128 */
799};
800
801static const struct ofdrm_device_funcs ofdrm_gxt2000_device_funcs = {
802 .cmap_ioremap = ofdrm_gxt2000_cmap_ioremap,
803 .cmap_write = ofdrm_gxt2000_cmap_write,
804};
805
806static const struct ofdrm_device_funcs ofdrm_avivo_device_funcs = {
807 .cmap_ioremap = ofdrm_avivo_cmap_ioremap,
808 .cmap_write = ofdrm_avivo_cmap_write,
809};
810
811static const struct ofdrm_device_funcs ofdrm_qemu_device_funcs = {
812 .cmap_ioremap = ofdrm_qemu_cmap_ioremap,
813 .cmap_write = ofdrm_qemu_cmap_write,
814};
815
816static struct ofdrm_device *ofdrm_device_create(struct drm_driver *drv,
817 struct platform_device *pdev)
818{
819 struct device_node *of_node = pdev->dev.of_node;
820 struct ofdrm_device *odev;
821 struct drm_sysfb_device *sysfb;
822 struct drm_device *dev;
823 enum ofdrm_model model;
824 bool big_endian;
825 int width, height, depth, linebytes;
826 const struct drm_format_info *format;
827 u64 address;
828 const u8 *edid;
829 resource_size_t fb_size, fb_base, fb_pgbase, fb_pgsize;
830 struct resource *res, *mem;
831 void __iomem *screen_base;
832 struct drm_plane *primary_plane;
833 struct drm_crtc *crtc;
834 struct drm_encoder *encoder;
835 struct drm_connector *connector;
836 unsigned long max_width, max_height;
837 size_t nformats;
838 int ret;
839
840 odev = devm_drm_dev_alloc(&pdev->dev, drv, struct ofdrm_device, sysfb.dev);
841 if (IS_ERR(ptr: odev))
842 return ERR_CAST(ptr: odev);
843 sysfb = &odev->sysfb;
844 dev = &sysfb->dev;
845 platform_set_drvdata(pdev, data: dev);
846
847 ret = ofdrm_device_init_pci(odev);
848 if (ret)
849 return ERR_PTR(error: ret);
850
851 /*
852 * OF display-node settings
853 */
854
855 model = display_get_model_of(dev, of_node);
856 drm_dbg(dev, "detected model %d\n", model);
857
858 switch (model) {
859 case OFDRM_MODEL_UNKNOWN:
860 odev->funcs = &ofdrm_unknown_device_funcs;
861 break;
862 case OFDRM_MODEL_MACH64:
863 odev->funcs = &ofdrm_mach64_device_funcs;
864 break;
865 case OFDRM_MODEL_RAGE128:
866 odev->funcs = &ofdrm_rage128_device_funcs;
867 break;
868 case OFDRM_MODEL_RAGE_M3A:
869 odev->funcs = &ofdrm_rage_m3a_device_funcs;
870 break;
871 case OFDRM_MODEL_RAGE_M3B:
872 odev->funcs = &ofdrm_rage_m3b_device_funcs;
873 break;
874 case OFDRM_MODEL_RADEON:
875 odev->funcs = &ofdrm_radeon_device_funcs;
876 break;
877 case OFDRM_MODEL_GXT2000:
878 odev->funcs = &ofdrm_gxt2000_device_funcs;
879 break;
880 case OFDRM_MODEL_AVIVO:
881 odev->funcs = &ofdrm_avivo_device_funcs;
882 break;
883 case OFDRM_MODEL_QEMU:
884 odev->funcs = &ofdrm_qemu_device_funcs;
885 break;
886 }
887
888 big_endian = display_get_big_endian_of(dev, of_node);
889
890 width = display_get_width_of(dev, of_node);
891 if (width < 0)
892 return ERR_PTR(error: width);
893 height = display_get_height_of(dev, of_node);
894 if (height < 0)
895 return ERR_PTR(error: height);
896 depth = display_get_depth_of(dev, of_node);
897 if (depth < 0)
898 return ERR_PTR(error: depth);
899 linebytes = display_get_linebytes_of(dev, of_node);
900 if (linebytes < 0)
901 return ERR_PTR(error: linebytes);
902
903 format = display_get_validated_format(dev, depth, big_endian);
904 if (IS_ERR(ptr: format))
905 return ERR_CAST(ptr: format);
906 if (!linebytes) {
907 linebytes = drm_format_info_min_pitch(info: format, plane: 0, buffer_width: width);
908 if (drm_WARN_ON(dev, !linebytes))
909 return ERR_PTR(error: -EINVAL);
910 }
911
912 fb_size = linebytes * height;
913
914 /*
915 * Try to figure out the address of the framebuffer. Unfortunately, Open
916 * Firmware doesn't provide a standard way to do so. All we can do is a
917 * dodgy heuristic that happens to work in practice.
918 *
919 * On most machines, the "address" property contains what we need, though
920 * not on Matrox cards found in IBM machines. What appears to give good
921 * results is to go through the PCI ranges and pick one that encloses the
922 * "address" property. If none match, we pick the largest.
923 */
924 address = display_get_address_of(dev, of_node);
925 if (address != OF_BAD_ADDR) {
926 struct resource fb_res = DEFINE_RES_MEM(address, fb_size);
927
928 res = ofdrm_find_fb_resource(odev, fb_res: &fb_res);
929 if (!res)
930 return ERR_PTR(error: -EINVAL);
931 if (resource_contains(r1: res, r2: &fb_res))
932 fb_base = address;
933 else
934 fb_base = res->start;
935 } else {
936 struct resource fb_res = DEFINE_RES_MEM(0u, fb_size);
937
938 res = ofdrm_find_fb_resource(odev, fb_res: &fb_res);
939 if (!res)
940 return ERR_PTR(error: -EINVAL);
941 fb_base = res->start;
942 }
943
944 /*
945 * I/O resources
946 */
947
948 fb_pgbase = round_down(fb_base, PAGE_SIZE);
949 fb_pgsize = fb_base - fb_pgbase + round_up(fb_size, PAGE_SIZE);
950
951 ret = devm_aperture_acquire_for_platform_device(pdev, base: fb_pgbase, size: fb_pgsize);
952 if (ret) {
953 drm_err(dev, "could not acquire memory range %pr: error %d\n", &res, ret);
954 return ERR_PTR(error: ret);
955 }
956
957 mem = devm_request_mem_region(&pdev->dev, fb_pgbase, fb_pgsize, drv->name);
958 if (!mem) {
959 drm_warn(dev, "could not acquire memory region %pr\n", &res);
960 return ERR_PTR(error: -ENOMEM);
961 }
962
963 screen_base = devm_ioremap(dev: &pdev->dev, offset: mem->start, size: resource_size(res: mem));
964 if (!screen_base)
965 return ERR_PTR(error: -ENOMEM);
966
967 if (odev->funcs->cmap_ioremap) {
968 void __iomem *cmap_base = odev->funcs->cmap_ioremap(odev, of_node, fb_base);
969
970 if (IS_ERR(ptr: cmap_base)) {
971 /* Don't fail; continue without colormap */
972 drm_warn(dev, "could not find colormap: error %ld\n", PTR_ERR(cmap_base));
973 } else {
974 odev->cmap_base = cmap_base;
975 }
976 }
977
978 /* EDID is optional */
979 edid = display_get_edid_of(dev, of_node, buf: odev->edid);
980
981 /*
982 * Firmware framebuffer
983 */
984
985 iosys_map_set_vaddr_iomem(map: &sysfb->fb_addr, vaddr_iomem: screen_base);
986 sysfb->fb_mode = drm_sysfb_mode(width, height, width_mm: 0, height_mm: 0);
987 sysfb->fb_format = format;
988 sysfb->fb_pitch = linebytes;
989 if (odev->cmap_base)
990 sysfb->fb_gamma_lut_size = OFDRM_GAMMA_LUT_SIZE;
991 sysfb->edid = edid;
992
993 drm_dbg(dev, "display mode={" DRM_MODE_FMT "}\n", DRM_MODE_ARG(&sysfb->fb_mode));
994 drm_dbg(dev, "framebuffer format=%p4cc, size=%dx%d, linebytes=%d byte\n",
995 &format->format, width, height, linebytes);
996
997 /*
998 * Mode-setting pipeline
999 */
1000
1001 ret = drmm_mode_config_init(dev);
1002 if (ret)
1003 return ERR_PTR(error: ret);
1004
1005 max_width = max_t(unsigned long, width, DRM_SHADOW_PLANE_MAX_WIDTH);
1006 max_height = max_t(unsigned long, height, DRM_SHADOW_PLANE_MAX_HEIGHT);
1007
1008 dev->mode_config.min_width = width;
1009 dev->mode_config.max_width = max_width;
1010 dev->mode_config.min_height = height;
1011 dev->mode_config.max_height = max_height;
1012 dev->mode_config.funcs = &ofdrm_mode_config_funcs;
1013 dev->mode_config.preferred_depth = format->depth;
1014 dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
1015
1016 /* Primary plane */
1017
1018 nformats = drm_sysfb_build_fourcc_list(dev, native_fourccs: &format->format, native_nfourccs: 1,
1019 fourccs_out: odev->formats, ARRAY_SIZE(odev->formats));
1020
1021 primary_plane = &odev->primary_plane;
1022 ret = drm_universal_plane_init(dev, plane: primary_plane, possible_crtcs: 0, funcs: &ofdrm_primary_plane_funcs,
1023 formats: odev->formats, format_count: nformats,
1024 format_modifiers: ofdrm_primary_plane_format_modifiers,
1025 type: DRM_PLANE_TYPE_PRIMARY, NULL);
1026 if (ret)
1027 return ERR_PTR(error: ret);
1028 drm_plane_helper_add(plane: primary_plane, funcs: &ofdrm_primary_plane_helper_funcs);
1029 drm_plane_enable_fb_damage_clips(plane: primary_plane);
1030
1031 /* CRTC */
1032
1033 crtc = &odev->crtc;
1034 ret = drm_crtc_init_with_planes(dev, crtc, primary: primary_plane, NULL,
1035 funcs: &ofdrm_crtc_funcs, NULL);
1036 if (ret)
1037 return ERR_PTR(error: ret);
1038 drm_crtc_helper_add(crtc, funcs: &ofdrm_crtc_helper_funcs);
1039
1040 if (sysfb->fb_gamma_lut_size) {
1041 ret = drm_mode_crtc_set_gamma_size(crtc, gamma_size: sysfb->fb_gamma_lut_size);
1042 if (!ret)
1043 drm_crtc_enable_color_mgmt(crtc, degamma_lut_size: 0, has_ctm: false, gamma_lut_size: sysfb->fb_gamma_lut_size);
1044 }
1045
1046 /* Encoder */
1047
1048 encoder = &odev->encoder;
1049 ret = drm_encoder_init(dev, encoder, funcs: &ofdrm_encoder_funcs, DRM_MODE_ENCODER_NONE, NULL);
1050 if (ret)
1051 return ERR_PTR(error: ret);
1052 encoder->possible_crtcs = drm_crtc_mask(crtc);
1053
1054 /* Connector */
1055
1056 connector = &odev->connector;
1057 ret = drm_connector_init(dev, connector, funcs: &ofdrm_connector_funcs,
1058 DRM_MODE_CONNECTOR_Unknown);
1059 if (ret)
1060 return ERR_PTR(error: ret);
1061 drm_connector_helper_add(connector, funcs: &ofdrm_connector_helper_funcs);
1062 drm_connector_set_panel_orientation_with_quirk(connector,
1063 panel_orientation: DRM_MODE_PANEL_ORIENTATION_UNKNOWN,
1064 width, height);
1065 if (edid)
1066 drm_connector_attach_edid_property(connector);
1067
1068 ret = drm_connector_attach_encoder(connector, encoder);
1069 if (ret)
1070 return ERR_PTR(error: ret);
1071
1072 drm_mode_config_reset(dev);
1073
1074 return odev;
1075}
1076
1077/*
1078 * DRM driver
1079 */
1080
1081DEFINE_DRM_GEM_FOPS(ofdrm_fops);
1082
1083static struct drm_driver ofdrm_driver = {
1084 DRM_GEM_SHMEM_DRIVER_OPS,
1085 DRM_FBDEV_SHMEM_DRIVER_OPS,
1086 .name = DRIVER_NAME,
1087 .desc = DRIVER_DESC,
1088 .major = DRIVER_MAJOR,
1089 .minor = DRIVER_MINOR,
1090 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
1091 .fops = &ofdrm_fops,
1092};
1093
1094/*
1095 * Platform driver
1096 */
1097
1098static int ofdrm_probe(struct platform_device *pdev)
1099{
1100 struct ofdrm_device *odev;
1101 struct drm_sysfb_device *sysfb;
1102 struct drm_device *dev;
1103 int ret;
1104
1105 odev = ofdrm_device_create(drv: &ofdrm_driver, pdev);
1106 if (IS_ERR(ptr: odev))
1107 return PTR_ERR(ptr: odev);
1108 sysfb = &odev->sysfb;
1109 dev = &sysfb->dev;
1110
1111 ret = drm_dev_register(dev, flags: 0);
1112 if (ret)
1113 return ret;
1114
1115 drm_client_setup(dev, format: sysfb->fb_format);
1116
1117 return 0;
1118}
1119
1120static void ofdrm_remove(struct platform_device *pdev)
1121{
1122 struct drm_device *dev = platform_get_drvdata(pdev);
1123
1124 drm_dev_unplug(dev);
1125}
1126
1127static const struct of_device_id ofdrm_of_match_display[] = {
1128 { .compatible = "display", },
1129 { },
1130};
1131MODULE_DEVICE_TABLE(of, ofdrm_of_match_display);
1132
1133static struct platform_driver ofdrm_platform_driver = {
1134 .driver = {
1135 .name = "of-display",
1136 .of_match_table = ofdrm_of_match_display,
1137 },
1138 .probe = ofdrm_probe,
1139 .remove = ofdrm_remove,
1140};
1141
1142module_platform_driver(ofdrm_platform_driver);
1143
1144MODULE_DESCRIPTION(DRIVER_DESC);
1145MODULE_LICENSE("GPL");
1146

source code of linux/drivers/gpu/drm/sysfb/ofdrm.c