1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* phylink models the MAC to optional PHY connection, supporting
4	* technologies such as SFP cages where the PHY is hot-pluggable.
5	*
6	* Copyright (C) 2015 Russell King
7	*/
8	#include <linux/acpi.h>
9	#include <linux/ethtool.h>
10	#include <linux/export.h>
11	#include <linux/gpio/consumer.h>
12	#include <linux/netdevice.h>
13	#include <linux/of.h>
14	#include <linux/of_mdio.h>
15	#include <linux/phy.h>
16	#include <linux/phy_fixed.h>
17	#include <linux/phylink.h>
18	#include <linux/rtnetlink.h>
19	#include <linux/spinlock.h>
20	#include <linux/timer.h>
21	#include <linux/workqueue.h>
22
23	#include "phy-caps.h"
24	#include "sfp.h"
25	#include "swphy.h"
26
27	enum {
28	PHYLINK_DISABLE_STOPPED,
29	PHYLINK_DISABLE_LINK,
30	PHYLINK_DISABLE_MAC_WOL,
31
32	PCS_STATE_DOWN = 0,
33	PCS_STATE_STARTING,
34	PCS_STATE_STARTED,
35	};
36
37	/**
38	* struct phylink - internal data type for phylink
39	*/
40	struct phylink {
41	/* private: */
42	struct net_device *netdev;
43	const struct phylink_mac_ops *mac_ops;
44	struct phylink_config *config;
45	struct phylink_pcs *pcs;
46	struct device *dev;
47	unsigned int old_link_state:1;
48
49	unsigned long phylink_disable_state; /* bitmask of disables */
50	struct phy_device *phydev;
51	phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
52	u8 cfg_link_an_mode; /* MLO_AN_xxx */
53	u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */
54	u8 act_link_an_mode; /* Active MLO_AN_xxx mode */
55	u8 link_port; /* The current non-phy ethtool port */
56	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
57	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
58
59	/* The link configuration settings */
60	struct phylink_link_state link_config;
61
62	/* The current settings */
63	phy_interface_t cur_interface;
64
65	struct gpio_desc *link_gpio;
66	unsigned int link_irq;
67	struct timer_list link_poll;
68
69	struct mutex state_mutex;
70	/* Serialize updates to pl->phydev with phylink_resolve() */
71	struct mutex phydev_mutex;
72	struct phylink_link_state phy_state;
73	unsigned int phy_ib_mode;
74	struct work_struct resolve;
75	unsigned int pcs_neg_mode;
76	unsigned int pcs_state;
77
78	bool link_failed;
79	bool suspend_link_up;
80	bool major_config_failed;
81	bool mac_supports_eee_ops;
82	bool mac_supports_eee;
83	bool phy_enable_tx_lpi;
84	bool mac_enable_tx_lpi;
85	bool mac_tx_clk_stop;
86	u32 mac_tx_lpi_timer;
87	u8 mac_rx_clk_stop_blocked;
88
89	struct sfp_bus *sfp_bus;
90	bool sfp_may_have_phy;
91	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
92	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
93	u8 sfp_port;
94
95	struct eee_config eee_cfg;
96
97	u32 wolopts_mac;
98	u8 wol_sopass[SOPASS_MAX];
99	};
100
101	#define phylink_printk(level, pl, fmt, ...) \
102	do { \
103	if ((pl)->config->type == PHYLINK_NETDEV) \
104	netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
105	else if ((pl)->config->type == PHYLINK_DEV) \
106	dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
107	} while (0)
108
109	#define phylink_err(pl, fmt, ...) \
110	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
111	#define phylink_warn(pl, fmt, ...) \
112	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
113	#define phylink_info(pl, fmt, ...) \
114	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
115	#if defined(CONFIG_DYNAMIC_DEBUG)
116	#define phylink_dbg(pl, fmt, ...) \
117	do { \
118	if ((pl)->config->type == PHYLINK_NETDEV) \
119	netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
120	else if ((pl)->config->type == PHYLINK_DEV) \
121	dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
122	} while (0)
123	#elif defined(DEBUG)
124	#define phylink_dbg(pl, fmt, ...) \
125	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
126	#else
127	#define phylink_dbg(pl, fmt, ...) \
128	({ \
129	if (0) \
130	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
131	})
132	#endif
133
134	static const phy_interface_t phylink_sfp_interface_preference[] = {
135	PHY_INTERFACE_MODE_100GBASEP,
136	PHY_INTERFACE_MODE_50GBASER,
137	PHY_INTERFACE_MODE_LAUI,
138	PHY_INTERFACE_MODE_25GBASER,
139	PHY_INTERFACE_MODE_USXGMII,
140	PHY_INTERFACE_MODE_10GBASER,
141	PHY_INTERFACE_MODE_5GBASER,
142	PHY_INTERFACE_MODE_2500BASEX,
143	PHY_INTERFACE_MODE_SGMII,
144	PHY_INTERFACE_MODE_1000BASEX,
145	PHY_INTERFACE_MODE_100BASEX,
146	};
147
148	static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
149
150	/**
151	* phylink_set_port_modes() - set the port type modes in the ethtool mask
152	* @mask: ethtool link mode mask
153	*
154	* Sets all the port type modes in the ethtool mask. MAC drivers should
155	* use this in their 'validate' callback.
156	*/
157	void phylink_set_port_modes(unsigned long *mask)
158	{
159	phylink_set(mask, TP);
160	phylink_set(mask, AUI);
161	phylink_set(mask, MII);
162	phylink_set(mask, FIBRE);
163	phylink_set(mask, BNC);
164	phylink_set(mask, Backplane);
165	}
166	EXPORT_SYMBOL_GPL(phylink_set_port_modes);
167
168	static int phylink_is_empty_linkmode(const unsigned long *linkmode)
169	{
170	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
171
172	phylink_set_port_modes(tmp);
173	phylink_set(tmp, Autoneg);
174	phylink_set(tmp, Pause);
175	phylink_set(tmp, Asym_Pause);
176
177	return linkmode_subset(src1: linkmode, src2: tmp);
178	}
179
180	static const char *phylink_an_mode_str(unsigned int mode)
181	{
182	static const char *modestr[] = {
183	[MLO_AN_PHY] = "phy",
184	[MLO_AN_FIXED] = "fixed",
185	[MLO_AN_INBAND] = "inband",
186	};
187
188	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
189	}
190
191	static const char *phylink_pcs_mode_str(unsigned int mode)
192	{
193	if (!mode)
194	return "none";
195
196	if (mode & PHYLINK_PCS_NEG_OUTBAND)
197	return "outband";
198
199	if (mode & PHYLINK_PCS_NEG_INBAND) {
200	if (mode & PHYLINK_PCS_NEG_ENABLED)
201	return "inband,an-enabled";
202	else
203	return "inband,an-disabled";
204	}
205
206	return "unknown";
207	}
208
209	static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
210	{
211	switch (interface) {
212	case PHY_INTERFACE_MODE_SGMII:
213	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
214	return 1250;
215	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
216	return 3125;
217	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
218	return 5156;
219	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
220	return 10313;
221	default:
222	return 0;
223	}
224	}
225
226	/**
227	* phylink_interface_max_speed() - get the maximum speed of a phy interface
228	* @interface: phy interface mode defined by &typedef phy_interface_t
229	*
230	* Determine the maximum speed of a phy interface. This is intended to help
231	* determine the correct speed to pass to the MAC when the phy is performing
232	* rate matching.
233	*
234	* Return: The maximum speed of @interface
235	*/
236	static int phylink_interface_max_speed(phy_interface_t interface)
237	{
238	switch (interface) {
239	case PHY_INTERFACE_MODE_100BASEX:
240	case PHY_INTERFACE_MODE_REVRMII:
241	case PHY_INTERFACE_MODE_RMII:
242	case PHY_INTERFACE_MODE_SMII:
243	case PHY_INTERFACE_MODE_REVMII:
244	case PHY_INTERFACE_MODE_MII:
245	case PHY_INTERFACE_MODE_MIILITE:
246	return SPEED_100;
247
248	case PHY_INTERFACE_MODE_TBI:
249	case PHY_INTERFACE_MODE_MOCA:
250	case PHY_INTERFACE_MODE_RTBI:
251	case PHY_INTERFACE_MODE_1000BASEX:
252	case PHY_INTERFACE_MODE_1000BASEKX:
253	case PHY_INTERFACE_MODE_TRGMII:
254	case PHY_INTERFACE_MODE_RGMII_TXID:
255	case PHY_INTERFACE_MODE_RGMII_RXID:
256	case PHY_INTERFACE_MODE_RGMII_ID:
257	case PHY_INTERFACE_MODE_RGMII:
258	case PHY_INTERFACE_MODE_PSGMII:
259	case PHY_INTERFACE_MODE_QSGMII:
260	case PHY_INTERFACE_MODE_QUSGMII:
261	case PHY_INTERFACE_MODE_SGMII:
262	case PHY_INTERFACE_MODE_GMII:
263	return SPEED_1000;
264
265	case PHY_INTERFACE_MODE_2500BASEX:
266	case PHY_INTERFACE_MODE_10G_QXGMII:
267	return SPEED_2500;
268
269	case PHY_INTERFACE_MODE_5GBASER:
270	return SPEED_5000;
271
272	case PHY_INTERFACE_MODE_XGMII:
273	case PHY_INTERFACE_MODE_RXAUI:
274	case PHY_INTERFACE_MODE_XAUI:
275	case PHY_INTERFACE_MODE_10GBASER:
276	case PHY_INTERFACE_MODE_10GKR:
277	case PHY_INTERFACE_MODE_USXGMII:
278	return SPEED_10000;
279
280	case PHY_INTERFACE_MODE_25GBASER:
281	return SPEED_25000;
282
283	case PHY_INTERFACE_MODE_XLGMII:
284	return SPEED_40000;
285
286	case PHY_INTERFACE_MODE_50GBASER:
287	case PHY_INTERFACE_MODE_LAUI:
288	return SPEED_50000;
289
290	case PHY_INTERFACE_MODE_100GBASEP:
291	return SPEED_100000;
292
293	case PHY_INTERFACE_MODE_INTERNAL:
294	case PHY_INTERFACE_MODE_NA:
295	case PHY_INTERFACE_MODE_MAX:
296	/* No idea! Garbage in, unknown out */
297	return SPEED_UNKNOWN;
298	}
299
300	/* If we get here, someone forgot to add an interface mode above */
301	WARN_ON_ONCE(1);
302	return SPEED_UNKNOWN;
303	}
304
305	static struct {
306	unsigned long mask;
307	int speed;
308	unsigned int duplex;
309	unsigned int caps_bit;
310	} phylink_caps_params[] = {
311	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) },
312	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) },
313	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) },
314	{ MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) },
315	{ MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) },
316	{ MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) },
317	{ MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) },
318	{ MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) },
319	{ MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) },
320	{ MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) },
321	{ MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) },
322	{ MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) },
323	{ MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) },
324	{ MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) },
325	{ MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) },
326	{ MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) },
327	{ MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) },
328	};
329
330	/**
331	* phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps
332	* @caps: A set of MAC capabilities
333	*
334	* Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h
335	*/
336	static unsigned long phylink_caps_to_link_caps(unsigned long caps)
337	{
338	unsigned long link_caps = 0;
339	int i;
340
341	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
342	if (caps & phylink_caps_params[i].mask)
343	link_caps |= phylink_caps_params[i].caps_bit;
344
345	return link_caps;
346	}
347
348	static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps)
349	{
350	unsigned long caps = 0;
351	int i;
352
353	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
354	if (link_caps & phylink_caps_params[i].caps_bit)
355	caps |= phylink_caps_params[i].mask;
356
357	return caps;
358	}
359
360	/**
361	* phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
362	* @linkmodes: ethtool linkmode mask (must be already initialised)
363	* @caps: bitmask of MAC capabilities
364	*
365	* Set all possible pause, speed and duplex linkmodes in @linkmodes that are
366	* supported by the @caps. @linkmodes must have been initialised previously.
367	*/
368	static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
369	unsigned long caps)
370	{
371	unsigned long link_caps = phylink_caps_to_link_caps(caps);
372
373	if (caps & MAC_SYM_PAUSE)
374	__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
375
376	if (caps & MAC_ASYM_PAUSE)
377	__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
378
379	phy_caps_linkmodes(caps: link_caps, linkmodes);
380	}
381
382	/**
383	* phylink_limit_mac_speed - limit the phylink_config to a maximum speed
384	* @config: pointer to a &struct phylink_config
385	* @max_speed: maximum speed
386	*
387	* Mask off MAC capabilities for speeds higher than the @max_speed parameter.
388	* Any further motifications of config.mac_capabilities will override this.
389	*/
390	void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
391	{
392	int i;
393
394	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
395	phylink_caps_params[i].speed > max_speed; i++)
396	config->mac_capabilities &= ~phylink_caps_params[i].mask;
397	}
398	EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
399
400	/**
401	* phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
402	* @speed: the speed to search for
403	* @duplex: the duplex to search for
404	*
405	* Find the mac capability for a given speed and duplex.
406	*
407	* Return: A mask with the mac capability patching @speed and @duplex, or 0 if
408	* there were no matches.
409	*/
410	static unsigned long phylink_cap_from_speed_duplex(int speed,
411	unsigned int duplex)
412	{
413	int i;
414
415	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
416	if (speed == phylink_caps_params[i].speed &&
417	duplex == phylink_caps_params[i].duplex)
418	return phylink_caps_params[i].mask;
419	}
420
421	return 0;
422	}
423
424	/**
425	* phylink_get_capabilities() - get capabilities for a given MAC
426	* @interface: phy interface mode defined by &typedef phy_interface_t
427	* @mac_capabilities: bitmask of MAC capabilities
428	* @rate_matching: type of rate matching being performed
429	*
430	* Get the MAC capabilities that are supported by the @interface mode and
431	* @mac_capabilities.
432	*/
433	static unsigned long phylink_get_capabilities(phy_interface_t interface,
434	unsigned long mac_capabilities,
435	int rate_matching)
436	{
437	unsigned long link_caps = phy_caps_from_interface(interface);
438	int max_speed = phylink_interface_max_speed(interface);
439	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
440	unsigned long matched_caps = 0;
441
442	caps |= phylink_link_caps_to_mac_caps(link_caps);
443
444	switch (rate_matching) {
445	case RATE_MATCH_OPEN_LOOP:
446	/* TODO */
447	fallthrough;
448	case RATE_MATCH_NONE:
449	matched_caps = 0;
450	break;
451	case RATE_MATCH_PAUSE: {
452	/* The MAC must support asymmetric pause towards the local
453	* device for this. We could allow just symmetric pause, but
454	* then we might have to renegotiate if the link partner
455	* doesn't support pause. This is because there's no way to
456	* accept pause frames without transmitting them if we only
457	* support symmetric pause.
458	*/
459	if (!(mac_capabilities & MAC_SYM_PAUSE) ||
460	!(mac_capabilities & MAC_ASYM_PAUSE))
461	break;
462
463	/* We can't adapt if the MAC doesn't support the interface's
464	* max speed at full duplex.
465	*/
466	if (mac_capabilities &
467	phylink_cap_from_speed_duplex(speed: max_speed, DUPLEX_FULL))
468	matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
469	break;
470	}
471	case RATE_MATCH_CRS:
472	/* The MAC must support half duplex at the interface's max
473	* speed.
474	*/
475	if (mac_capabilities &
476	phylink_cap_from_speed_duplex(speed: max_speed, DUPLEX_HALF)) {
477	matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
478	matched_caps &= mac_capabilities;
479	}
480	break;
481	}
482
483	return (caps & mac_capabilities) | matched_caps;
484	}
485
486	/**
487	* phylink_validate_mask_caps() - Restrict link modes based on caps
488	* @supported: ethtool bitmask for supported link modes.
489	* @state: pointer to a &struct phylink_link_state.
490	* @mac_capabilities: bitmask of MAC capabilities
491	*
492	* Calculate the supported link modes based on @mac_capabilities, and restrict
493	* @supported and @state based on that. Use this function if your capabiliies
494	* aren't constant, such as if they vary depending on the interface.
495	*/
496	static void phylink_validate_mask_caps(unsigned long *supported,
497	struct phylink_link_state *state,
498	unsigned long mac_capabilities)
499	{
500	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
501	unsigned long caps;
502
503	phylink_set_port_modes(mask);
504	phylink_set(mask, Autoneg);
505	caps = phylink_get_capabilities(interface: state->interface, mac_capabilities,
506	rate_matching: state->rate_matching);
507	phylink_caps_to_linkmodes(linkmodes: mask, caps);
508
509	linkmode_and(dst: supported, a: supported, b: mask);
510	linkmode_and(dst: state->advertising, a: state->advertising, b: mask);
511	}
512
513	static int phylink_validate_mac_and_pcs(struct phylink *pl,
514	unsigned long *supported,
515	struct phylink_link_state *state)
516	{
517	struct phylink_pcs *pcs = NULL;
518	unsigned long capabilities;
519	int ret;
520
521	/* Get the PCS for this interface mode */
522	if (pl->mac_ops->mac_select_pcs) {
523	pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
524	if (IS_ERR(ptr: pcs))
525	return PTR_ERR(ptr: pcs);
526	}
527
528	if (pcs) {
529	/* The PCS, if present, must be setup before phylink_create()
530	* has been called. If the ops is not initialised, print an
531	* error and backtrace rather than oopsing the kernel.
532	*/
533	if (!pcs->ops) {
534	phylink_err(pl, "interface %s: uninitialised PCS\n",
535	phy_modes(state->interface));
536	dump_stack();
537	return -EINVAL;
538	}
539
540	/* Ensure that this PCS supports the interface which the MAC
541	* returned it for. It is an error for the MAC to return a PCS
542	* that does not support the interface mode.
543	*/
544	if (!phy_interface_empty(intf: pcs->supported_interfaces) &&
545	!test_bit(state->interface, pcs->supported_interfaces)) {
546	phylink_err(pl, "MAC returned PCS which does not support %s\n",
547	phy_modes(state->interface));
548	return -EINVAL;
549	}
550
551	/* Validate the link parameters with the PCS */
552	if (pcs->ops->pcs_validate) {
553	ret = pcs->ops->pcs_validate(pcs, supported, state);
554	if (ret < 0 || phylink_is_empty_linkmode(linkmode: supported))
555	return -EINVAL;
556
557	/* Ensure the advertising mask is a subset of the
558	* supported mask.
559	*/
560	linkmode_and(dst: state->advertising, a: state->advertising,
561	b: supported);
562	}
563	}
564
565	/* Then validate the link parameters with the MAC */
566	if (pl->mac_ops->mac_get_caps)
567	capabilities = pl->mac_ops->mac_get_caps(pl->config,
568	state->interface);
569	else
570	capabilities = pl->config->mac_capabilities;
571
572	phylink_validate_mask_caps(supported, state, mac_capabilities: capabilities);
573
574	return phylink_is_empty_linkmode(linkmode: supported) ? -EINVAL : 0;
575	}
576
577	static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
578	const unsigned long *supported,
579	const struct phylink_link_state *state,
580	phy_interface_t interface,
581	unsigned long *accum_supported,
582	unsigned long *accum_advertising)
583	{
584	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
585	struct phylink_link_state tmp_state;
586
587	linkmode_copy(dst: tmp_supported, src: supported);
588
589	tmp_state = *state;
590	tmp_state.interface = interface;
591
592	if (phy)
593	tmp_state.rate_matching = phy_get_rate_matching(phydev: phy, iface: interface);
594
595	if (!phylink_validate_mac_and_pcs(pl, supported: tmp_supported, state: &tmp_state)) {
596	phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
597	interface, phy_modes(interface),
598	phy_rate_matching_to_str(tmp_state.rate_matching),
599	__ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
600
601	linkmode_or(dst: accum_supported, a: accum_supported, b: tmp_supported);
602	linkmode_or(dst: accum_advertising, a: accum_advertising,
603	b: tmp_state.advertising);
604	}
605	}
606
607	static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
608	unsigned long *supported,
609	struct phylink_link_state *state,
610	const unsigned long *interfaces)
611	{
612	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
613	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
614	int interface;
615
616	for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
617	phylink_validate_one(pl, phy, supported, state, interface,
618	accum_supported: all_s, accum_advertising: all_adv);
619
620	linkmode_copy(dst: supported, src: all_s);
621	linkmode_copy(dst: state->advertising, src: all_adv);
622
623	return phylink_is_empty_linkmode(linkmode: supported) ? -EINVAL : 0;
624	}
625
626	static int phylink_validate(struct phylink *pl, unsigned long *supported,
627	struct phylink_link_state *state)
628	{
629	const unsigned long *interfaces = pl->config->supported_interfaces;
630
631	if (state->interface == PHY_INTERFACE_MODE_NA)
632	return phylink_validate_mask(pl, NULL, supported, state,
633	interfaces);
634
635	if (!test_bit(state->interface, interfaces))
636	return -EINVAL;
637
638	return phylink_validate_mac_and_pcs(pl, supported, state);
639	}
640
641	static void phylink_fill_fixedlink_supported(unsigned long *supported)
642	{
643	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported);
644	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported);
645	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported);
646	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported);
647	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported);
648	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported);
649	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported);
650	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported);
651	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported);
652	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
653	linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported);
654	linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported);
655	}
656
657	static int phylink_parse_fixedlink(struct phylink *pl,
658	const struct fwnode_handle *fwnode)
659	{
660	__ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, };
661	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
662	const struct link_capabilities *c;
663	struct fwnode_handle *fixed_node;
664	struct gpio_desc *desc;
665	u32 speed;
666	int ret;
667
668	fixed_node = fwnode_get_named_child_node(fwnode, childname: "fixed-link");
669	if (fixed_node) {
670	ret = fwnode_property_read_u32(fwnode: fixed_node, propname: "speed", val: &speed);
671
672	pl->link_config.speed = speed;
673	pl->link_config.duplex = DUPLEX_HALF;
674
675	if (fwnode_property_read_bool(fwnode: fixed_node, propname: "full-duplex"))
676	pl->link_config.duplex = DUPLEX_FULL;
677
678	/* We treat the "pause" and "asym-pause" terminology as
679	* defining the link partner's ability.
680	*/
681	if (fwnode_property_read_bool(fwnode: fixed_node, propname: "pause"))
682	__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
683	pl->link_config.lp_advertising);
684	if (fwnode_property_read_bool(fwnode: fixed_node, propname: "asym-pause"))
685	__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
686	pl->link_config.lp_advertising);
687
688	if (ret == 0) {
689	desc = fwnode_gpiod_get_index(fwnode: fixed_node, con_id: "link", index: 0,
690	flags: GPIOD_IN, label: "?");
691
692	if (!IS_ERR(ptr: desc))
693	pl->link_gpio = desc;
694	else if (desc == ERR_PTR(error: -EPROBE_DEFER))
695	ret = -EPROBE_DEFER;
696	}
697	fwnode_handle_put(fwnode: fixed_node);
698
699	if (ret)
700	return ret;
701	} else {
702	u32 prop[5];
703
704	ret = fwnode_property_read_u32_array(fwnode, propname: "fixed-link",
705	NULL, nval: 0);
706	if (ret != ARRAY_SIZE(prop)) {
707	phylink_err(pl, "broken fixed-link?\n");
708	return -EINVAL;
709	}
710
711	phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n",
712	fwnode);
713
714	ret = fwnode_property_read_u32_array(fwnode, propname: "fixed-link",
715	val: prop, ARRAY_SIZE(prop));
716	if (!ret) {
717	pl->link_config.duplex = prop[1] ?
718	DUPLEX_FULL : DUPLEX_HALF;
719	pl->link_config.speed = prop[2];
720	if (prop[3])
721	__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
722	pl->link_config.lp_advertising);
723	if (prop[4])
724	__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
725	pl->link_config.lp_advertising);
726	}
727	}
728
729	if (pl->link_config.speed > SPEED_1000 &&
730	pl->link_config.duplex != DUPLEX_FULL)
731	phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
732	pl->link_config.speed);
733
734	linkmode_zero(dst: pl->supported);
735	phylink_fill_fixedlink_supported(supported: pl->supported);
736
737	linkmode_copy(dst: pl->link_config.advertising, src: pl->supported);
738	phylink_validate(pl, supported: pl->supported, state: &pl->link_config);
739
740	c = phy_caps_lookup(speed: pl->link_config.speed, duplex: pl->link_config.duplex,
741	supported: pl->supported, exact: true);
742	if (c)
743	linkmode_and(dst: match, a: pl->supported, b: c->linkmodes);
744
745	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
746	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
747	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
748	linkmode_and(dst: pl->supported, a: pl->supported, b: mask);
749
750	phylink_set(pl->supported, MII);
751
752	if (c) {
753	linkmode_or(dst: pl->supported, a: pl->supported, b: match);
754	linkmode_or(dst: pl->link_config.lp_advertising,
755	a: pl->link_config.lp_advertising, b: match);
756	} else {
757	phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
758	pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
759	pl->link_config.speed);
760	}
761
762	linkmode_and(dst: pl->link_config.advertising, a: pl->link_config.advertising,
763	b: pl->supported);
764
765	pl->link_config.link = 1;
766	pl->link_config.an_complete = 1;
767
768	return 0;
769	}
770
771	static int phylink_parse_mode(struct phylink *pl,
772	const struct fwnode_handle *fwnode)
773	{
774	struct fwnode_handle *dn;
775	const char *managed;
776	unsigned long caps;
777
778	if (pl->config->default_an_inband)
779	pl->cfg_link_an_mode = MLO_AN_INBAND;
780
781	dn = fwnode_get_named_child_node(fwnode, childname: "fixed-link");
782	if (dn || fwnode_property_present(fwnode, propname: "fixed-link"))
783	pl->cfg_link_an_mode = MLO_AN_FIXED;
784	fwnode_handle_put(fwnode: dn);
785
786	if ((fwnode_property_read_string(fwnode, propname: "managed", val: &managed) == 0 &&
787	strcmp(managed, "in-band-status") == 0)) {
788	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
789	phylink_err(pl,
790	"can't use both fixed-link and in-band-status\n");
791	return -EINVAL;
792	}
793
794	pl->cfg_link_an_mode = MLO_AN_INBAND;
795	}
796
797	if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
798	linkmode_zero(dst: pl->supported);
799	phylink_set(pl->supported, MII);
800	phylink_set(pl->supported, Autoneg);
801	phylink_set(pl->supported, Asym_Pause);
802	phylink_set(pl->supported, Pause);
803
804	switch (pl->link_config.interface) {
805	case PHY_INTERFACE_MODE_SGMII:
806	case PHY_INTERFACE_MODE_PSGMII:
807	case PHY_INTERFACE_MODE_QSGMII:
808	case PHY_INTERFACE_MODE_QUSGMII:
809	case PHY_INTERFACE_MODE_RGMII:
810	case PHY_INTERFACE_MODE_RGMII_ID:
811	case PHY_INTERFACE_MODE_RGMII_RXID:
812	case PHY_INTERFACE_MODE_RGMII_TXID:
813	case PHY_INTERFACE_MODE_RTBI:
814	case PHY_INTERFACE_MODE_1000BASEX:
815	case PHY_INTERFACE_MODE_2500BASEX:
816	case PHY_INTERFACE_MODE_5GBASER:
817	case PHY_INTERFACE_MODE_25GBASER:
818	case PHY_INTERFACE_MODE_USXGMII:
819	case PHY_INTERFACE_MODE_10G_QXGMII:
820	case PHY_INTERFACE_MODE_10GKR:
821	case PHY_INTERFACE_MODE_10GBASER:
822	case PHY_INTERFACE_MODE_XLGMII:
823	case PHY_INTERFACE_MODE_50GBASER:
824	case PHY_INTERFACE_MODE_LAUI:
825	case PHY_INTERFACE_MODE_100GBASEP:
826	caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
827	caps = phylink_get_capabilities(interface: pl->link_config.interface, mac_capabilities: caps,
828	RATE_MATCH_NONE);
829	phylink_caps_to_linkmodes(linkmodes: pl->supported, caps);
830	break;
831
832	default:
833	phylink_err(pl,
834	"incorrect link mode %s for in-band status\n",
835	phy_modes(pl->link_config.interface));
836	return -EINVAL;
837	}
838
839	linkmode_copy(dst: pl->link_config.advertising, src: pl->supported);
840
841	if (phylink_validate(pl, supported: pl->supported, state: &pl->link_config)) {
842	phylink_err(pl,
843	"failed to validate link configuration for in-band status\n");
844	return -EINVAL;
845	}
846	}
847
848	return 0;
849	}
850
851	static void phylink_apply_manual_flow(struct phylink *pl,
852	struct phylink_link_state *state)
853	{
854	/* If autoneg is disabled, pause AN is also disabled */
855	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
856	state->advertising))
857	state->pause &= ~MLO_PAUSE_AN;
858
859	/* Manual configuration of pause modes */
860	if (!(pl->link_config.pause & MLO_PAUSE_AN))
861	state->pause = pl->link_config.pause;
862	}
863
864	static void phylink_resolve_an_pause(struct phylink_link_state *state)
865	{
866	bool tx_pause, rx_pause;
867
868	if (state->duplex == DUPLEX_FULL) {
869	linkmode_resolve_pause(local_adv: state->advertising,
870	partner_adv: state->lp_advertising,
871	tx_pause: &tx_pause, rx_pause: &rx_pause);
872	if (tx_pause)
873	state->pause |= MLO_PAUSE_TX;
874	if (rx_pause)
875	state->pause |= MLO_PAUSE_RX;
876	}
877	}
878
879	static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
880	phy_interface_t interface)
881	{
882	if (pcs && pcs->ops->pcs_inband_caps)
883	return pcs->ops->pcs_inband_caps(pcs, interface);
884
885	return 0;
886	}
887
888	static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
889	phy_interface_t interface)
890	{
891	if (pcs && pcs->ops->pcs_pre_config)
892	pcs->ops->pcs_pre_config(pcs, interface);
893	}
894
895	static int phylink_pcs_post_config(struct phylink_pcs *pcs,
896	phy_interface_t interface)
897	{
898	int err = 0;
899
900	if (pcs && pcs->ops->pcs_post_config)
901	err = pcs->ops->pcs_post_config(pcs, interface);
902
903	return err;
904	}
905
906	static void phylink_pcs_disable(struct phylink_pcs *pcs)
907	{
908	if (pcs && pcs->ops->pcs_disable)
909	pcs->ops->pcs_disable(pcs);
910	}
911
912	static int phylink_pcs_enable(struct phylink_pcs *pcs)
913	{
914	int err = 0;
915
916	if (pcs && pcs->ops->pcs_enable)
917	err = pcs->ops->pcs_enable(pcs);
918
919	return err;
920	}
921
922	static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
923	const struct phylink_link_state *state,
924	bool permit_pause_to_mac)
925	{
926	if (!pcs)
927	return 0;
928
929	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
930	state->advertising, permit_pause_to_mac);
931	}
932
933	static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
934	phy_interface_t interface, int speed,
935	int duplex)
936	{
937	if (pcs && pcs->ops->pcs_link_up)
938	pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
939	}
940
941	static void phylink_pcs_disable_eee(struct phylink_pcs *pcs)
942	{
943	if (pcs && pcs->ops->pcs_disable_eee)
944	pcs->ops->pcs_disable_eee(pcs);
945	}
946
947	static void phylink_pcs_enable_eee(struct phylink_pcs *pcs)
948	{
949	if (pcs && pcs->ops->pcs_enable_eee)
950	pcs->ops->pcs_enable_eee(pcs);
951	}
952
953	/* Query inband for a specific interface mode, asking the MAC for the
954	* PCS which will be used to handle the interface mode.
955	*/
956	static unsigned int phylink_inband_caps(struct phylink *pl,
957	phy_interface_t interface)
958	{
959	struct phylink_pcs *pcs;
960
961	if (!pl->mac_ops->mac_select_pcs)
962	return 0;
963
964	pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
965	if (!pcs)
966	return 0;
967
968	return phylink_pcs_inband_caps(pcs, interface);
969	}
970
971	static void phylink_pcs_poll_stop(struct phylink *pl)
972	{
973	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
974	timer_delete(timer: &pl->link_poll);
975	}
976
977	static void phylink_pcs_poll_start(struct phylink *pl)
978	{
979	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
980	mod_timer(timer: &pl->link_poll, expires: jiffies + HZ);
981	}
982
983	int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
984	{
985	int ret = 0;
986
987	/* Signal to PCS driver that MAC requires RX clock for init */
988	if (pl->config->mac_requires_rxc)
989	pcs->rxc_always_on = true;
990
991	if (pcs->ops->pcs_pre_init)
992	ret = pcs->ops->pcs_pre_init(pcs);
993
994	return ret;
995	}
996	EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
997
998	static void phylink_mac_config(struct phylink *pl,
999	const struct phylink_link_state *state)
1000	{
1001	struct phylink_link_state st = *state;
1002
1003	/* Stop drivers incorrectly using these */
1004	linkmode_zero(dst: st.lp_advertising);
1005	st.speed = SPEED_UNKNOWN;
1006	st.duplex = DUPLEX_UNKNOWN;
1007	st.an_complete = false;
1008	st.link = false;
1009
1010	phylink_dbg(pl,
1011	"%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1012	__func__, phylink_an_mode_str(pl->act_link_an_mode),
1013	phy_modes(st.interface),
1014	phy_rate_matching_to_str(st.rate_matching),
1015	__ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1016	st.pause);
1017
1018	pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1019	}
1020
1021	static void phylink_pcs_an_restart(struct phylink *pl)
1022	{
1023	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1024	pl->link_config.advertising) &&
1025	phy_interface_mode_is_8023z(mode: pl->link_config.interface) &&
1026	phylink_autoneg_inband(mode: pl->act_link_an_mode))
1027	pl->pcs->ops->pcs_an_restart(pl->pcs);
1028	}
1029
1030	enum inband_type {
1031	INBAND_NONE,
1032	INBAND_CISCO_SGMII,
1033	INBAND_BASEX,
1034	};
1035
1036	static enum inband_type phylink_get_inband_type(phy_interface_t interface)
1037	{
1038	switch (interface) {
1039	case PHY_INTERFACE_MODE_SGMII:
1040	case PHY_INTERFACE_MODE_QSGMII:
1041	case PHY_INTERFACE_MODE_QUSGMII:
1042	case PHY_INTERFACE_MODE_USXGMII:
1043	case PHY_INTERFACE_MODE_10G_QXGMII:
1044	/* These protocols are designed for use with a PHY which
1045	* communicates its negotiation result back to the MAC via
1046	* inband communication. Note: there exist PHYs that run
1047	* with SGMII but do not send the inband data.
1048	*/
1049	return INBAND_CISCO_SGMII;
1050
1051	case PHY_INTERFACE_MODE_1000BASEX:
1052	case PHY_INTERFACE_MODE_2500BASEX:
1053	/* 1000base-X is designed for use media-side for Fibre
1054	* connections, and thus the Autoneg bit needs to be
1055	* taken into account. We also do this for 2500base-X
1056	* as well, but drivers may not support this, so may
1057	* need to override this.
1058	*/
1059	return INBAND_BASEX;
1060
1061	default:
1062	return INBAND_NONE;
1063	}
1064	}
1065
1066	/**
1067	* phylink_pcs_neg_mode() - helper to determine PCS inband mode
1068	* @pl: a pointer to a &struct phylink returned from phylink_create()
1069	* @pcs: a pointer to &struct phylink_pcs
1070	* @interface: interface mode to be used
1071	* @advertising: adertisement ethtool link mode mask
1072	*
1073	* Determines the negotiation mode to be used by the PCS, and returns
1074	* one of:
1075	*
1076	* - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1077	* - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1078	* will be used.
1079	* - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1080	* disabled
1081	* - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1082	*
1083	* Note: this is for cases where the PCS itself is involved in negotiation
1084	* (e.g. Clause 37, SGMII and similar) not Clause 73.
1085	*/
1086	static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1087	phy_interface_t interface,
1088	const unsigned long *advertising)
1089	{
1090	unsigned int pcs_ib_caps = 0;
1091	unsigned int phy_ib_caps = 0;
1092	unsigned int neg_mode, mode;
1093	enum inband_type type;
1094
1095	type = phylink_get_inband_type(interface);
1096	if (type == INBAND_NONE) {
1097	pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1098	pl->act_link_an_mode = pl->req_link_an_mode;
1099	return;
1100	}
1101
1102	mode = pl->req_link_an_mode;
1103
1104	pl->phy_ib_mode = 0;
1105
1106	if (pcs)
1107	pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1108
1109	if (pl->phydev)
1110	phy_ib_caps = phy_inband_caps(phydev: pl->phydev, interface);
1111
1112	phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1113	phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1114
1115	if (!phylink_autoneg_inband(mode)) {
1116	bool pcs_ib_only = false;
1117	bool phy_ib_only = false;
1118
1119	if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1120	/* PCS supports reporting in-band capabilities, and
1121	* supports more than disable mode.
1122	*/
1123	if (pcs_ib_caps & LINK_INBAND_DISABLE)
1124	neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1125	else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1126	pcs_ib_only = true;
1127	}
1128
1129	if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1130	/* PHY supports in-band capabilities, and supports
1131	* more than disable mode.
1132	*/
1133	if (phy_ib_caps & LINK_INBAND_DISABLE)
1134	pl->phy_ib_mode = LINK_INBAND_DISABLE;
1135	else if (phy_ib_caps & LINK_INBAND_BYPASS)
1136	pl->phy_ib_mode = LINK_INBAND_BYPASS;
1137	else if (phy_ib_caps & LINK_INBAND_ENABLE)
1138	phy_ib_only = true;
1139	}
1140
1141	/* If either the PCS or PHY requires inband to be enabled,
1142	* this is an invalid configuration. Provide a diagnostic
1143	* message for this case, but don't try to force the issue.
1144	*/
1145	if (pcs_ib_only || phy_ib_only)
1146	phylink_warn(pl,
1147	"firmware wants %s mode, but %s%s%s requires inband\n",
1148	phylink_an_mode_str(mode),
1149	pcs_ib_only ? "PCS" : "",
1150	pcs_ib_only && phy_ib_only ? " and " : "",
1151	phy_ib_only ? "PHY" : "");
1152
1153	neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1154	} else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1155	/* For SGMII modes which are designed to be used with PHYs, or
1156	* Base-X with a PHY, we try to use in-band mode where-ever
1157	* possible. However, there are some PHYs e.g. BCM84881 which
1158	* do not support in-band.
1159	*/
1160	const unsigned int inband_ok = LINK_INBAND_ENABLE |
1161	LINK_INBAND_BYPASS;
1162	const unsigned int outband_ok = LINK_INBAND_DISABLE |
1163	LINK_INBAND_BYPASS;
1164	/* PCS PHY
1165	* D E D E
1166	* 0 0 0 0 no information inband enabled
1167	* 1 0 0 0 pcs doesn't support outband
1168	* 0 1 0 0 pcs required inband enabled
1169	* 1 1 0 0 pcs optional inband enabled
1170	* 0 0 1 0 phy doesn't support outband
1171	* 1 0 1 0 pcs+phy doesn't support outband
1172	* 0 1 1 0 pcs required, phy doesn't support, invalid
1173	* 1 1 1 0 pcs optional, phy doesn't support, outband
1174	* 0 0 0 1 phy required inband enabled
1175	* 1 0 0 1 pcs doesn't support, phy required, invalid
1176	* 0 1 0 1 pcs+phy required inband enabled
1177	* 1 1 0 1 pcs optional, phy required inband enabled
1178	* 0 0 1 1 phy optional inband enabled
1179	* 1 0 1 1 pcs doesn't support, phy optional, outband
1180	* 0 1 1 1 pcs required, phy optional inband enabled
1181	* 1 1 1 1 pcs+phy optional inband enabled
1182	*/
1183	if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1184	(!phy_ib_caps || phy_ib_caps & inband_ok)) {
1185	/* In-band supported or unknown at both ends. Enable
1186	* in-band mode with or without bypass at the PHY.
1187	*/
1188	if (phy_ib_caps & LINK_INBAND_ENABLE)
1189	pl->phy_ib_mode = LINK_INBAND_ENABLE;
1190	else if (phy_ib_caps & LINK_INBAND_BYPASS)
1191	pl->phy_ib_mode = LINK_INBAND_BYPASS;
1192
1193	neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1194	} else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1195	(!phy_ib_caps || phy_ib_caps & outband_ok)) {
1196	/* Either in-band not supported at at least one end.
1197	* In-band bypass at the other end is possible.
1198	*/
1199	if (phy_ib_caps & LINK_INBAND_DISABLE)
1200	pl->phy_ib_mode = LINK_INBAND_DISABLE;
1201	else if (phy_ib_caps & LINK_INBAND_BYPASS)
1202	pl->phy_ib_mode = LINK_INBAND_BYPASS;
1203
1204	neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1205	if (pl->phydev)
1206	mode = MLO_AN_PHY;
1207	} else {
1208	/* invalid */
1209	phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1210	phy_modes(interface));
1211	neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1212	}
1213	} else {
1214	/* For Base-X without a PHY */
1215	if (pcs_ib_caps == LINK_INBAND_DISABLE)
1216	/* If the PCS doesn't support inband, then inband must
1217	* be disabled.
1218	*/
1219	neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1220	else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1221	/* If the PCS requires inband, then inband must always
1222	* be enabled.
1223	*/
1224	neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1225	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1226	advertising))
1227	neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1228	else
1229	neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1230	}
1231
1232	pl->pcs_neg_mode = neg_mode;
1233	pl->act_link_an_mode = mode;
1234	}
1235
1236	static void phylink_major_config(struct phylink *pl, bool restart,
1237	const struct phylink_link_state *state)
1238	{
1239	struct phylink_pcs *pcs = NULL;
1240	bool pcs_changed = false;
1241	unsigned int rate_kbd;
1242	int err;
1243
1244	phylink_dbg(pl, "major config, requested %s/%s\n",
1245	phylink_an_mode_str(pl->req_link_an_mode),
1246	phy_modes(state->interface));
1247
1248	pl->major_config_failed = false;
1249
1250	if (pl->mac_ops->mac_select_pcs) {
1251	pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1252	if (IS_ERR(ptr: pcs)) {
1253	phylink_err(pl,
1254	"mac_select_pcs unexpectedly failed: %pe\n",
1255	pcs);
1256
1257	pl->major_config_failed = true;
1258	return;
1259	}
1260
1261	pcs_changed = pl->pcs != pcs;
1262	}
1263
1264	phylink_pcs_neg_mode(pl, pcs, interface: state->interface, advertising: state->advertising);
1265
1266	phylink_dbg(pl, "major config, active %s/%s/%s\n",
1267	phylink_an_mode_str(pl->act_link_an_mode),
1268	phylink_pcs_mode_str(pl->pcs_neg_mode),
1269	phy_modes(state->interface));
1270
1271	phylink_pcs_poll_stop(pl);
1272
1273	if (pl->mac_ops->mac_prepare) {
1274	err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1275	state->interface);
1276	if (err < 0) {
1277	phylink_err(pl, "mac_prepare failed: %pe\n",
1278	ERR_PTR(err));
1279	pl->major_config_failed = true;
1280	return;
1281	}
1282	}
1283
1284	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1285	* for the change.
1286	*/
1287	if (pcs_changed) {
1288	phylink_pcs_disable(pcs: pl->pcs);
1289
1290	if (pl->pcs)
1291	pl->pcs->phylink = NULL;
1292
1293	pcs->phylink = pl;
1294
1295	pl->pcs = pcs;
1296	}
1297
1298	if (pl->pcs)
1299	phylink_pcs_pre_config(pcs: pl->pcs, interface: state->interface);
1300
1301	phylink_mac_config(pl, state);
1302
1303	if (pl->pcs) {
1304	err = phylink_pcs_post_config(pcs: pl->pcs, interface: state->interface);
1305	if (err < 0) {
1306	phylink_err(pl, "pcs_post_config failed: %pe\n",
1307	ERR_PTR(err));
1308
1309	pl->major_config_failed = true;
1310	}
1311	}
1312
1313	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1314	phylink_pcs_enable(pcs: pl->pcs);
1315
1316	err = phylink_pcs_config(pcs: pl->pcs, neg_mode: pl->pcs_neg_mode, state,
1317	permit_pause_to_mac: !!(pl->link_config.pause & MLO_PAUSE_AN));
1318	if (err < 0) {
1319	phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err));
1320	pl->major_config_failed = true;
1321	} else if (err > 0) {
1322	restart = true;
1323	}
1324
1325	if (restart)
1326	phylink_pcs_an_restart(pl);
1327
1328	if (pl->mac_ops->mac_finish) {
1329	err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1330	state->interface);
1331	if (err < 0) {
1332	phylink_err(pl, "mac_finish failed: %pe\n",
1333	ERR_PTR(err));
1334
1335	pl->major_config_failed = true;
1336	}
1337	}
1338
1339	if (pl->phydev && pl->phy_ib_mode) {
1340	err = phy_config_inband(phydev: pl->phydev, modes: pl->phy_ib_mode);
1341	if (err < 0) {
1342	phylink_err(pl, "phy_config_inband: %pe\n",
1343	ERR_PTR(err));
1344
1345	pl->major_config_failed = true;
1346	}
1347	}
1348
1349	if (pl->sfp_bus) {
1350	rate_kbd = phylink_interface_signal_rate(interface: state->interface);
1351	if (rate_kbd)
1352	sfp_upstream_set_signal_rate(bus: pl->sfp_bus, rate_kbd);
1353	}
1354
1355	phylink_pcs_poll_start(pl);
1356	}
1357
1358	/*
1359	* Reconfigure for a change of inband advertisement.
1360	* If we have a separate PCS, we only need to call its pcs_config() method,
1361	* and then restart AN if it indicates something changed. Otherwise, we do
1362	* the full MAC reconfiguration.
1363	*/
1364	static int phylink_change_inband_advert(struct phylink *pl)
1365	{
1366	int ret;
1367
1368	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1369	return 0;
1370
1371	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1372	phylink_an_mode_str(pl->req_link_an_mode),
1373	phy_modes(pl->link_config.interface),
1374	__ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1375	pl->link_config.pause);
1376
1377	/* Recompute the PCS neg mode */
1378	phylink_pcs_neg_mode(pl, pcs: pl->pcs, interface: pl->link_config.interface,
1379	advertising: pl->link_config.advertising);
1380
1381	/* Modern PCS-based method; update the advert at the PCS, and
1382	* restart negotiation if the pcs_config() helper indicates that
1383	* the programmed advertisement has changed.
1384	*/
1385	ret = phylink_pcs_config(pcs: pl->pcs, neg_mode: pl->pcs_neg_mode, state: &pl->link_config,
1386	permit_pause_to_mac: !!(pl->link_config.pause & MLO_PAUSE_AN));
1387	if (ret < 0)
1388	return ret;
1389
1390	if (ret > 0)
1391	phylink_pcs_an_restart(pl);
1392
1393	return 0;
1394	}
1395
1396	static void phylink_mac_pcs_get_state(struct phylink *pl,
1397	struct phylink_link_state *state)
1398	{
1399	struct phylink_pcs *pcs;
1400	bool autoneg;
1401
1402	linkmode_copy(dst: state->advertising, src: pl->link_config.advertising);
1403	linkmode_zero(dst: state->lp_advertising);
1404	state->interface = pl->link_config.interface;
1405	state->rate_matching = pl->link_config.rate_matching;
1406	state->an_complete = 0;
1407	state->link = 1;
1408
1409	autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1410	if (autoneg) {
1411	state->speed = SPEED_UNKNOWN;
1412	state->duplex = DUPLEX_UNKNOWN;
1413	state->pause = MLO_PAUSE_NONE;
1414	} else {
1415	state->speed = pl->link_config.speed;
1416	state->duplex = pl->link_config.duplex;
1417	state->pause = pl->link_config.pause;
1418	}
1419
1420	pcs = pl->pcs;
1421	if (pcs)
1422	pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1423	else
1424	state->link = 0;
1425	}
1426
1427	/* The fixed state is... fixed except for the link state,
1428	* which may be determined by a GPIO or a callback.
1429	*/
1430	static void phylink_get_fixed_state(struct phylink *pl,
1431	struct phylink_link_state *state)
1432	{
1433	*state = pl->link_config;
1434	if (pl->config->get_fixed_state)
1435	pl->config->get_fixed_state(pl->config, state);
1436	else if (pl->link_gpio)
1437	state->link = !!gpiod_get_value_cansleep(desc: pl->link_gpio);
1438
1439	state->pause = MLO_PAUSE_NONE;
1440	phylink_resolve_an_pause(state);
1441	}
1442
1443	static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1444	{
1445	struct phylink_link_state link_state;
1446	struct phy_device *phy = pl->phydev;
1447
1448	switch (pl->req_link_an_mode) {
1449	case MLO_AN_PHY:
1450	link_state = pl->phy_state;
1451	break;
1452
1453	case MLO_AN_FIXED:
1454	phylink_get_fixed_state(pl, state: &link_state);
1455	break;
1456
1457	case MLO_AN_INBAND:
1458	link_state = pl->link_config;
1459	if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1460	link_state.pause = MLO_PAUSE_NONE;
1461	break;
1462
1463	default: /* can't happen */
1464	return;
1465	}
1466
1467	link_state.link = false;
1468
1469	phylink_apply_manual_flow(pl, state: &link_state);
1470	if (phy)
1471	mutex_lock(&phy->lock);
1472	phylink_major_config(pl, restart: force_restart, state: &link_state);
1473	if (phy)
1474	mutex_unlock(lock: &phy->lock);
1475	}
1476
1477	static const char *phylink_pause_to_str(int pause)
1478	{
1479	switch (pause & MLO_PAUSE_TXRX_MASK) {
1480	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1481	return "rx/tx";
1482	case MLO_PAUSE_TX:
1483	return "tx";
1484	case MLO_PAUSE_RX:
1485	return "rx";
1486	default:
1487	return "off";
1488	}
1489	}
1490
1491	static void phylink_deactivate_lpi(struct phylink *pl)
1492	{
1493	if (pl->mac_enable_tx_lpi) {
1494	pl->mac_enable_tx_lpi = false;
1495
1496	phylink_dbg(pl, "disabling LPI\n");
1497
1498	pl->mac_ops->mac_disable_tx_lpi(pl->config);
1499
1500	phylink_pcs_disable_eee(pcs: pl->pcs);
1501	}
1502	}
1503
1504	static void phylink_activate_lpi(struct phylink *pl)
1505	{
1506	int err;
1507
1508	if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1509	phylink_dbg(pl, "MAC does not support LPI with %s\n",
1510	phy_modes(pl->cur_interface));
1511	return;
1512	}
1513
1514	phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1515	pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1516
1517	phylink_pcs_enable_eee(pcs: pl->pcs);
1518
1519	err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1520	pl->mac_tx_clk_stop);
1521	if (err) {
1522	phylink_pcs_disable_eee(pcs: pl->pcs);
1523	phylink_err(pl, "%ps() failed: %pe\n",
1524	pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1525	return;
1526	}
1527
1528	pl->mac_enable_tx_lpi = true;
1529	}
1530
1531	static void phylink_link_up(struct phylink *pl,
1532	struct phylink_link_state link_state)
1533	{
1534	struct net_device *ndev = pl->netdev;
1535	int speed, duplex;
1536	bool rx_pause;
1537
1538	speed = link_state.speed;
1539	duplex = link_state.duplex;
1540	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1541
1542	switch (link_state.rate_matching) {
1543	case RATE_MATCH_PAUSE:
1544	/* The PHY is doing rate matchion from the media rate (in
1545	* the link_state) to the interface speed, and will send
1546	* pause frames to the MAC to limit its transmission speed.
1547	*/
1548	speed = phylink_interface_max_speed(interface: link_state.interface);
1549	duplex = DUPLEX_FULL;
1550	rx_pause = true;
1551	break;
1552
1553	case RATE_MATCH_CRS:
1554	/* The PHY is doing rate matchion from the media rate (in
1555	* the link_state) to the interface speed, and will cause
1556	* collisions to the MAC to limit its transmission speed.
1557	*/
1558	speed = phylink_interface_max_speed(interface: link_state.interface);
1559	duplex = DUPLEX_HALF;
1560	break;
1561	}
1562
1563	pl->cur_interface = link_state.interface;
1564
1565	phylink_pcs_link_up(pcs: pl->pcs, neg_mode: pl->pcs_neg_mode, interface: pl->cur_interface, speed,
1566	duplex);
1567
1568	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1569	pl->cur_interface, speed, duplex,
1570	!!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1571
1572	if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1573	phylink_activate_lpi(pl);
1574
1575	if (ndev)
1576	netif_carrier_on(dev: ndev);
1577
1578	phylink_info(pl,
1579	"Link is Up - %s/%s - flow control %s\n",
1580	phy_speed_to_str(link_state.speed),
1581	phy_duplex_to_str(link_state.duplex),
1582	phylink_pause_to_str(link_state.pause));
1583	}
1584
1585	static void phylink_link_down(struct phylink *pl)
1586	{
1587	struct net_device *ndev = pl->netdev;
1588
1589	if (ndev)
1590	netif_carrier_off(dev: ndev);
1591
1592	phylink_deactivate_lpi(pl);
1593
1594	pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1595	pl->cur_interface);
1596	phylink_info(pl, "Link is Down\n");
1597	}
1598
1599	static bool phylink_link_is_up(struct phylink *pl)
1600	{
1601	return pl->netdev ? netif_carrier_ok(dev: pl->netdev) : pl->old_link_state;
1602	}
1603
1604	static void phylink_resolve(struct work_struct *w)
1605	{
1606	struct phylink *pl = container_of(w, struct phylink, resolve);
1607	struct phylink_link_state link_state;
1608	bool mac_config = false;
1609	bool retrigger = false;
1610	struct phy_device *phy;
1611	bool cur_link_state;
1612
1613	mutex_lock(&pl->phydev_mutex);
1614	phy = pl->phydev;
1615	if (phy)
1616	mutex_lock(&phy->lock);
1617	mutex_lock(&pl->state_mutex);
1618	cur_link_state = phylink_link_is_up(pl);
1619
1620	if (pl->phylink_disable_state) {
1621	pl->link_failed = false;
1622	link_state.link = false;
1623	} else if (pl->link_failed) {
1624	link_state.link = false;
1625	retrigger = true;
1626	} else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1627	phylink_get_fixed_state(pl, state: &link_state);
1628	mac_config = link_state.link;
1629	} else if (pl->act_link_an_mode == MLO_AN_PHY) {
1630	link_state = pl->phy_state;
1631	mac_config = link_state.link;
1632	} else {
1633	phylink_mac_pcs_get_state(pl, state: &link_state);
1634
1635	/* The PCS may have a latching link-fail indicator. If the link
1636	* was up, bring the link down and re-trigger the resolve.
1637	* Otherwise, re-read the PCS state to get the current status
1638	* of the link.
1639	*/
1640	if (!link_state.link) {
1641	if (cur_link_state)
1642	retrigger = true;
1643	else
1644	phylink_mac_pcs_get_state(pl, state: &link_state);
1645	}
1646
1647	/* If we have a phy, the "up" state is the union of both the
1648	* PHY and the MAC
1649	*/
1650	if (phy)
1651	link_state.link &= pl->phy_state.link;
1652
1653	/* Only update if the PHY link is up */
1654	if (phy && pl->phy_state.link) {
1655	/* If the interface has changed, force a link down
1656	* event if the link isn't already down, and re-resolve.
1657	*/
1658	if (link_state.interface != pl->phy_state.interface) {
1659	retrigger = true;
1660	link_state.link = false;
1661	}
1662
1663	link_state.interface = pl->phy_state.interface;
1664
1665	/* If we are doing rate matching, then the link
1666	* speed/duplex comes from the PHY
1667	*/
1668	if (pl->phy_state.rate_matching) {
1669	link_state.rate_matching =
1670	pl->phy_state.rate_matching;
1671	link_state.speed = pl->phy_state.speed;
1672	link_state.duplex = pl->phy_state.duplex;
1673	}
1674
1675	/* If we have a PHY, we need to update with the PHY
1676	* flow control bits.
1677	*/
1678	link_state.pause = pl->phy_state.pause;
1679	mac_config = true;
1680	}
1681	}
1682
1683	if (pl->act_link_an_mode != MLO_AN_FIXED)
1684	phylink_apply_manual_flow(pl, state: &link_state);
1685
1686	if (mac_config) {
1687	if (link_state.interface != pl->link_config.interface) {
1688	/* The interface has changed, force the link down and
1689	* then reconfigure.
1690	*/
1691	if (cur_link_state) {
1692	phylink_link_down(pl);
1693	cur_link_state = false;
1694	}
1695	phylink_major_config(pl, restart: false, state: &link_state);
1696	pl->link_config.interface = link_state.interface;
1697	}
1698	}
1699
1700	/* If configuration of the interface failed, force the link down
1701	* until we get a successful configuration.
1702	*/
1703	if (pl->major_config_failed)
1704	link_state.link = false;
1705
1706	if (link_state.link != cur_link_state) {
1707	pl->old_link_state = link_state.link;
1708	if (!link_state.link)
1709	phylink_link_down(pl);
1710	else
1711	phylink_link_up(pl, link_state);
1712	}
1713	if (!link_state.link && retrigger) {
1714	pl->link_failed = false;
1715	queue_work(wq: system_power_efficient_wq, work: &pl->resolve);
1716	}
1717	mutex_unlock(lock: &pl->state_mutex);
1718	if (phy)
1719	mutex_unlock(lock: &phy->lock);
1720	mutex_unlock(lock: &pl->phydev_mutex);
1721	}
1722
1723	static void phylink_run_resolve(struct phylink *pl)
1724	{
1725	if (!pl->phylink_disable_state)
1726	queue_work(wq: system_power_efficient_wq, work: &pl->resolve);
1727	}
1728
1729	static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1730	{
1731	unsigned long state = pl->phylink_disable_state;
1732
1733	set_bit(nr: bit, addr: &pl->phylink_disable_state);
1734	if (state == 0) {
1735	queue_work(wq: system_power_efficient_wq, work: &pl->resolve);
1736	flush_work(work: &pl->resolve);
1737	}
1738	}
1739
1740	static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1741	{
1742	clear_bit(nr: bit, addr: &pl->phylink_disable_state);
1743	phylink_run_resolve(pl);
1744	}
1745
1746	static void phylink_fixed_poll(struct timer_list *t)
1747	{
1748	struct phylink *pl = container_of(t, struct phylink, link_poll);
1749
1750	mod_timer(timer: t, expires: jiffies + HZ);
1751
1752	phylink_run_resolve(pl);
1753	}
1754
1755	static const struct sfp_upstream_ops sfp_phylink_ops;
1756
1757	static int phylink_register_sfp(struct phylink *pl,
1758	const struct fwnode_handle *fwnode)
1759	{
1760	struct sfp_bus *bus;
1761	int ret;
1762
1763	if (!fwnode)
1764	return 0;
1765
1766	bus = sfp_bus_find_fwnode(fwnode);
1767	if (IS_ERR(ptr: bus)) {
1768	phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1769	return PTR_ERR(ptr: bus);
1770	}
1771
1772	pl->sfp_bus = bus;
1773
1774	ret = sfp_bus_add_upstream(bus, upstream: pl, ops: &sfp_phylink_ops);
1775	sfp_bus_put(bus);
1776
1777	return ret;
1778	}
1779
1780	/**
1781	* phylink_set_fixed_link() - set the fixed link
1782	* @pl: a pointer to a &struct phylink returned from phylink_create()
1783	* @state: a pointer to a struct phylink_link_state.
1784	*
1785	* This function is used when the link parameters are known and do not change,
1786	* making it suitable for certain types of network connections.
1787	*
1788	* Returns: zero on success or negative error code.
1789	*/
1790	int phylink_set_fixed_link(struct phylink *pl,
1791	const struct phylink_link_state *state)
1792	{
1793	const struct link_capabilities *c;
1794	unsigned long *adv;
1795
1796	if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1797	!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1798	return -EINVAL;
1799
1800	c = phy_caps_lookup(speed: state->speed, duplex: state->duplex,
1801	supported: pl->supported, exact: true);
1802	if (!c)
1803	return -EINVAL;
1804
1805	adv = pl->link_config.advertising;
1806	linkmode_and(dst: adv, a: pl->supported, b: c->linkmodes);
1807	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1808
1809	pl->link_config.speed = state->speed;
1810	pl->link_config.duplex = state->duplex;
1811	pl->link_config.link = 1;
1812	pl->link_config.an_complete = 1;
1813
1814	pl->cfg_link_an_mode = MLO_AN_FIXED;
1815	pl->req_link_an_mode = pl->cfg_link_an_mode;
1816
1817	return 0;
1818	}
1819	EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1820
1821	/**
1822	* phylink_create() - create a phylink instance
1823	* @config: a pointer to the target &struct phylink_config
1824	* @fwnode: a pointer to a &struct fwnode_handle describing the network
1825	* interface
1826	* @iface: the desired link mode defined by &typedef phy_interface_t
1827	* @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1828	*
1829	* Create a new phylink instance, and parse the link parameters found in @np.
1830	* This will parse in-band modes, fixed-link or SFP configuration.
1831	*
1832	* Note: the rtnl lock must not be held when calling this function.
1833	*
1834	* Returns a pointer to a &struct phylink, or an error-pointer value. Users
1835	* must use IS_ERR() to check for errors from this function.
1836	*/
1837	struct phylink *phylink_create(struct phylink_config *config,
1838	const struct fwnode_handle *fwnode,
1839	phy_interface_t iface,
1840	const struct phylink_mac_ops *mac_ops)
1841	{
1842	struct phylink *pl;
1843	int ret;
1844
1845	/* Validate the supplied configuration */
1846	if (phy_interface_empty(intf: config->supported_interfaces)) {
1847	dev_err(config->dev,
1848	"phylink: error: empty supported_interfaces\n");
1849	return ERR_PTR(error: -EINVAL);
1850	}
1851
1852	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1853	if (!pl)
1854	return ERR_PTR(error: -ENOMEM);
1855
1856	mutex_init(&pl->phydev_mutex);
1857	mutex_init(&pl->state_mutex);
1858	INIT_WORK(&pl->resolve, phylink_resolve);
1859
1860	pl->config = config;
1861	if (config->type == PHYLINK_NETDEV) {
1862	pl->netdev = to_net_dev(config->dev);
1863	netif_carrier_off(dev: pl->netdev);
1864	} else if (config->type == PHYLINK_DEV) {
1865	pl->dev = config->dev;
1866	} else {
1867	kfree(objp: pl);
1868	return ERR_PTR(error: -EINVAL);
1869	}
1870
1871	pl->mac_supports_eee_ops = phylink_mac_implements_lpi(ops: mac_ops);
1872	pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1873	pl->config->lpi_capabilities &&
1874	!phy_interface_empty(intf: pl->config->lpi_interfaces);
1875
1876	/* Set the default EEE configuration */
1877	pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1878	pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1879	pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1880
1881	pl->phy_state.interface = iface;
1882	pl->link_interface = iface;
1883	if (iface == PHY_INTERFACE_MODE_MOCA)
1884	pl->link_port = PORT_BNC;
1885	else
1886	pl->link_port = PORT_MII;
1887	pl->link_config.interface = iface;
1888	pl->link_config.pause = MLO_PAUSE_AN;
1889	pl->link_config.speed = SPEED_UNKNOWN;
1890	pl->link_config.duplex = DUPLEX_UNKNOWN;
1891	pl->pcs_state = PCS_STATE_DOWN;
1892	pl->mac_ops = mac_ops;
1893	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1894	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1895
1896	linkmode_fill(dst: pl->supported);
1897	linkmode_copy(dst: pl->link_config.advertising, src: pl->supported);
1898	phylink_validate(pl, supported: pl->supported, state: &pl->link_config);
1899
1900	ret = phylink_parse_mode(pl, fwnode);
1901	if (ret < 0) {
1902	kfree(objp: pl);
1903	return ERR_PTR(error: ret);
1904	}
1905
1906	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1907	ret = phylink_parse_fixedlink(pl, fwnode);
1908	if (ret < 0) {
1909	kfree(objp: pl);
1910	return ERR_PTR(error: ret);
1911	}
1912	}
1913
1914	pl->req_link_an_mode = pl->cfg_link_an_mode;
1915
1916	ret = phylink_register_sfp(pl, fwnode);
1917	if (ret < 0) {
1918	kfree(objp: pl);
1919	return ERR_PTR(error: ret);
1920	}
1921
1922	return pl;
1923	}
1924	EXPORT_SYMBOL_GPL(phylink_create);
1925
1926	/**
1927	* phylink_destroy() - cleanup and destroy the phylink instance
1928	* @pl: a pointer to a &struct phylink returned from phylink_create()
1929	*
1930	* Destroy a phylink instance. Any PHY that has been attached must have been
1931	* cleaned up via phylink_disconnect_phy() prior to calling this function.
1932	*
1933	* Note: the rtnl lock must not be held when calling this function.
1934	*/
1935	void phylink_destroy(struct phylink *pl)
1936	{
1937	sfp_bus_del_upstream(bus: pl->sfp_bus);
1938	if (pl->link_gpio)
1939	gpiod_put(desc: pl->link_gpio);
1940
1941	cancel_work_sync(work: &pl->resolve);
1942	kfree(objp: pl);
1943	}
1944	EXPORT_SYMBOL_GPL(phylink_destroy);
1945
1946	/**
1947	* phylink_expects_phy() - Determine if phylink expects a phy to be attached
1948	* @pl: a pointer to a &struct phylink returned from phylink_create()
1949	*
1950	* When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1951	* no PHY is needed.
1952	*
1953	* Returns true if phylink will be expecting a PHY.
1954	*/
1955	bool phylink_expects_phy(struct phylink *pl)
1956	{
1957	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1958	(pl->cfg_link_an_mode == MLO_AN_INBAND &&
1959	phy_interface_mode_is_8023z(mode: pl->link_interface)))
1960	return false;
1961	return true;
1962	}
1963	EXPORT_SYMBOL_GPL(phylink_expects_phy);
1964
1965	static void phylink_phy_change(struct phy_device *phydev, bool up)
1966	{
1967	struct phylink *pl = phydev->phylink;
1968	bool tx_pause, rx_pause;
1969
1970	phy_get_pause(phydev, tx_pause: &tx_pause, rx_pause: &rx_pause);
1971
1972	mutex_lock(&pl->state_mutex);
1973	pl->phy_state.speed = phydev->speed;
1974	pl->phy_state.duplex = phydev->duplex;
1975	pl->phy_state.rate_matching = phydev->rate_matching;
1976	pl->phy_state.pause = MLO_PAUSE_NONE;
1977	if (tx_pause)
1978	pl->phy_state.pause |= MLO_PAUSE_TX;
1979	if (rx_pause)
1980	pl->phy_state.pause |= MLO_PAUSE_RX;
1981	pl->phy_state.interface = phydev->interface;
1982	pl->phy_state.link = up;
1983	if (!up)
1984	pl->link_failed = true;
1985
1986	/* Get the LPI state from phylib */
1987	pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
1988	pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
1989	mutex_unlock(lock: &pl->state_mutex);
1990
1991	phylink_run_resolve(pl);
1992
1993	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
1994	up ? "up" : "down",
1995	phy_modes(phydev->interface),
1996	phy_speed_to_str(phydev->speed),
1997	phy_duplex_to_str(phydev->duplex),
1998	phy_rate_matching_to_str(phydev->rate_matching),
1999	phylink_pause_to_str(pl->phy_state.pause),
2000	phydev->enable_tx_lpi ? "" : "no");
2001	}
2002
2003	static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
2004	unsigned long *supported,
2005	struct phylink_link_state *state)
2006	{
2007	DECLARE_PHY_INTERFACE_MASK(interfaces);
2008
2009	/* If the PHY provides a bitmap of the interfaces it will be using
2010	* depending on the negotiated media speeds, use this to validate
2011	* which ethtool link modes can be used.
2012	*/
2013	if (!phy_interface_empty(intf: phy->possible_interfaces)) {
2014	/* We only care about the union of the PHY's interfaces and
2015	* those which the host supports.
2016	*/
2017	phy_interface_and(dst: interfaces, a: phy->possible_interfaces,
2018	b: pl->config->supported_interfaces);
2019
2020	if (phy_interface_empty(intf: interfaces)) {
2021	phylink_err(pl, "PHY has no common interfaces\n");
2022	return -EINVAL;
2023	}
2024
2025	if (phy_on_sfp(phydev: phy)) {
2026	/* If the PHY is on a SFP, limit the interfaces to
2027	* those that can be used with a SFP module.
2028	*/
2029	phy_interface_and(dst: interfaces, a: interfaces,
2030	b: phylink_sfp_interfaces);
2031
2032	if (phy_interface_empty(intf: interfaces)) {
2033	phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
2034	return -EINVAL;
2035	}
2036	}
2037
2038	phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
2039	phydev_name(phy),
2040	(int)PHY_INTERFACE_MODE_MAX,
2041	phy->possible_interfaces,
2042	(int)PHY_INTERFACE_MODE_MAX, interfaces);
2043
2044	return phylink_validate_mask(pl, phy, supported, state,
2045	interfaces);
2046	}
2047
2048	phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2049	phydev_name(phy));
2050
2051	/* Check whether we would use rate matching for the proposed interface
2052	* mode.
2053	*/
2054	state->rate_matching = phy_get_rate_matching(phydev: phy, iface: state->interface);
2055
2056	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2057	* 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2058	* For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2059	* their Serdes is either unnecessary or not reasonable.
2060	*
2061	* For these which switch interface modes, we really need to know which
2062	* interface modes the PHY supports to properly work out which ethtool
2063	* linkmodes can be supported. For now, as a work-around, we validate
2064	* against all interface modes, which may lead to more ethtool link
2065	* modes being advertised than are actually supported.
2066	*/
2067	if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2068	state->interface != PHY_INTERFACE_MODE_RXAUI &&
2069	state->interface != PHY_INTERFACE_MODE_XAUI &&
2070	state->interface != PHY_INTERFACE_MODE_USXGMII)
2071	state->interface = PHY_INTERFACE_MODE_NA;
2072
2073	return phylink_validate(pl, supported, state);
2074	}
2075
2076	static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2077	phy_interface_t interface)
2078	{
2079	struct phylink_link_state config;
2080	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2081	char *irq_str;
2082	int ret;
2083
2084	/*
2085	* This is the new way of dealing with flow control for PHYs,
2086	* as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2087	* phy drivers should not set SUPPORTED_[Asym_]Pause") except
2088	* using our validate call to the MAC, we rely upon the MAC
2089	* clearing the bits from both supported and advertising fields.
2090	*/
2091	phy_support_asym_pause(phydev: phy);
2092
2093	memset(&config, 0, sizeof(config));
2094	linkmode_copy(dst: supported, src: phy->supported);
2095	linkmode_copy(dst: config.advertising, src: phy->advertising);
2096	config.interface = interface;
2097
2098	ret = phylink_validate_phy(pl, phy, supported, state: &config);
2099	if (ret) {
2100	phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2101	phy_modes(config.interface),
2102	__ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2103	__ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2104	ERR_PTR(ret));
2105	return ret;
2106	}
2107
2108	phy->phylink = pl;
2109	phy->phy_link_change = phylink_phy_change;
2110
2111	irq_str = phy_attached_info_irq(phydev: phy);
2112	phylink_info(pl,
2113	"PHY [%s] driver [%s] (irq=%s)\n",
2114	dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2115	kfree(objp: irq_str);
2116
2117	mutex_lock(&pl->phydev_mutex);
2118	mutex_lock(&phy->lock);
2119	mutex_lock(&pl->state_mutex);
2120	pl->phydev = phy;
2121	pl->phy_state.interface = interface;
2122	pl->phy_state.pause = MLO_PAUSE_NONE;
2123	pl->phy_state.speed = SPEED_UNKNOWN;
2124	pl->phy_state.duplex = DUPLEX_UNKNOWN;
2125	pl->phy_state.rate_matching = RATE_MATCH_NONE;
2126	linkmode_copy(dst: pl->supported, src: supported);
2127	linkmode_copy(dst: pl->link_config.advertising, src: config.advertising);
2128
2129	/* Restrict the phy advertisement according to the MAC support. */
2130	linkmode_copy(dst: phy->advertising, src: config.advertising);
2131
2132	/* If the MAC supports phylink managed EEE, restrict the EEE
2133	* advertisement according to the MAC's LPI capabilities.
2134	*/
2135	if (pl->mac_supports_eee) {
2136	/* If EEE is enabled, then we need to call phy_support_eee()
2137	* to ensure that the advertising mask is appropriately set.
2138	* This also enables EEE at the PHY.
2139	*/
2140	if (pl->eee_cfg.eee_enabled)
2141	phy_support_eee(phydev: phy);
2142
2143	phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2144	phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2145
2146	/* Convert the MAC's LPI capabilities to linkmodes */
2147	linkmode_zero(dst: pl->supported_lpi);
2148	phylink_caps_to_linkmodes(linkmodes: pl->supported_lpi,
2149	caps: pl->config->lpi_capabilities);
2150
2151	/* Restrict the PHYs EEE support/advertisement to the modes
2152	* that the MAC supports.
2153	*/
2154	linkmode_and(dst: phy->advertising_eee, a: phy->advertising_eee,
2155	b: pl->supported_lpi);
2156	} else if (pl->mac_supports_eee_ops) {
2157	/* MAC supports phylink EEE, but wants EEE always disabled. */
2158	phy_disable_eee(phydev: phy);
2159	}
2160
2161	mutex_unlock(lock: &pl->state_mutex);
2162	mutex_unlock(lock: &phy->lock);
2163	mutex_unlock(lock: &pl->phydev_mutex);
2164
2165	phylink_dbg(pl,
2166	"phy: %s setting supported %*pb advertising %*pb\n",
2167	phy_modes(interface),
2168	__ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2169	__ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2170
2171	if (pl->config->mac_managed_pm)
2172	phy->mac_managed_pm = true;
2173
2174	/* Allow the MAC to stop its clock if the PHY has the capability */
2175	pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phydev: phy) > 0;
2176
2177	if (pl->mac_supports_eee_ops) {
2178	/* Explicitly configure whether the PHY is allowed to stop it's
2179	* receive clock.
2180	*/
2181	ret = phy_eee_rx_clock_stop(phydev: phy,
2182	clk_stop_enable: pl->config->eee_rx_clk_stop_enable);
2183	if (ret == -EOPNOTSUPP)
2184	ret = 0;
2185	}
2186
2187	if (ret == 0 && phy_interrupt_is_valid(phydev: phy))
2188	phy_request_interrupt(phydev: phy);
2189
2190	return ret;
2191	}
2192
2193	static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2194	phy_interface_t interface)
2195	{
2196	u32 flags = 0;
2197
2198	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2199	(pl->cfg_link_an_mode == MLO_AN_INBAND &&
2200	phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2201	return -EINVAL;
2202
2203	if (pl->phydev)
2204	return -EBUSY;
2205
2206	if (pl->config->mac_requires_rxc)
2207	flags |= PHY_F_RXC_ALWAYS_ON;
2208
2209	return phy_attach_direct(dev: pl->netdev, phydev: phy, flags, interface);
2210	}
2211
2212	/**
2213	* phylink_connect_phy() - connect a PHY to the phylink instance
2214	* @pl: a pointer to a &struct phylink returned from phylink_create()
2215	* @phy: a pointer to a &struct phy_device.
2216	*
2217	* Connect @phy to the phylink instance specified by @pl by calling
2218	* phy_attach_direct(). Configure the @phy according to the MAC driver's
2219	* capabilities, start the PHYLIB state machine and enable any interrupts
2220	* that the PHY supports.
2221	*
2222	* This updates the phylink's ethtool supported and advertising link mode
2223	* masks.
2224	*
2225	* Returns 0 on success or a negative errno.
2226	*/
2227	int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2228	{
2229	int ret;
2230
2231	/* Use PHY device/driver interface */
2232	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2233	pl->link_interface = phy->interface;
2234	pl->link_config.interface = pl->link_interface;
2235	}
2236
2237	ret = phylink_attach_phy(pl, phy, interface: pl->link_interface);
2238	if (ret < 0)
2239	return ret;
2240
2241	ret = phylink_bringup_phy(pl, phy, interface: pl->link_config.interface);
2242	if (ret)
2243	phy_detach(phydev: phy);
2244
2245	return ret;
2246	}
2247	EXPORT_SYMBOL_GPL(phylink_connect_phy);
2248
2249	/**
2250	* phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2251	* @pl: a pointer to a &struct phylink returned from phylink_create()
2252	* @dn: a pointer to a &struct device_node.
2253	* @flags: PHY-specific flags to communicate to the PHY device driver
2254	*
2255	* Connect the phy specified in the device node @dn to the phylink instance
2256	* specified by @pl. Actions specified in phylink_connect_phy() will be
2257	* performed.
2258	*
2259	* Returns 0 on success or a negative errno.
2260	*/
2261	int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2262	u32 flags)
2263	{
2264	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2265	}
2266	EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2267
2268	/**
2269	* phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2270	* @pl: a pointer to a &struct phylink returned from phylink_create()
2271	* @fwnode: a pointer to a &struct fwnode_handle.
2272	* @flags: PHY-specific flags to communicate to the PHY device driver
2273	*
2274	* Connect the phy specified @fwnode to the phylink instance specified
2275	* by @pl.
2276	*
2277	* Returns 0 on success or a negative errno.
2278	*/
2279	int phylink_fwnode_phy_connect(struct phylink *pl,
2280	const struct fwnode_handle *fwnode,
2281	u32 flags)
2282	{
2283	struct fwnode_handle *phy_fwnode;
2284	struct phy_device *phy_dev;
2285	int ret;
2286
2287	/* Fixed links and 802.3z are handled without needing a PHY */
2288	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2289	(pl->cfg_link_an_mode == MLO_AN_INBAND &&
2290	phy_interface_mode_is_8023z(mode: pl->link_interface)))
2291	return 0;
2292
2293	phy_fwnode = fwnode_get_phy_node(fwnode);
2294	if (IS_ERR(ptr: phy_fwnode)) {
2295	if (pl->cfg_link_an_mode == MLO_AN_PHY)
2296	return -ENODEV;
2297	return 0;
2298	}
2299
2300	phy_dev = fwnode_phy_find_device(phy_fwnode);
2301	/* We're done with the phy_node handle */
2302	fwnode_handle_put(fwnode: phy_fwnode);
2303	if (!phy_dev)
2304	return -ENODEV;
2305
2306	/* Use PHY device/driver interface */
2307	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2308	pl->link_interface = phy_dev->interface;
2309	pl->link_config.interface = pl->link_interface;
2310	}
2311
2312	if (pl->config->mac_requires_rxc)
2313	flags |= PHY_F_RXC_ALWAYS_ON;
2314
2315	ret = phy_attach_direct(dev: pl->netdev, phydev: phy_dev, flags,
2316	interface: pl->link_interface);
2317	phy_device_free(phydev: phy_dev);
2318	if (ret)
2319	return ret;
2320
2321	ret = phylink_bringup_phy(pl, phy: phy_dev, interface: pl->link_config.interface);
2322	if (ret)
2323	phy_detach(phydev: phy_dev);
2324
2325	return ret;
2326	}
2327	EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2328
2329	/**
2330	* phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2331	* instance.
2332	* @pl: a pointer to a &struct phylink returned from phylink_create()
2333	*
2334	* Disconnect any current PHY from the phylink instance described by @pl.
2335	*/
2336	void phylink_disconnect_phy(struct phylink *pl)
2337	{
2338	struct phy_device *phy;
2339
2340	ASSERT_RTNL();
2341
2342	mutex_lock(&pl->phydev_mutex);
2343	phy = pl->phydev;
2344	if (phy) {
2345	mutex_lock(&phy->lock);
2346	mutex_lock(&pl->state_mutex);
2347	pl->phydev = NULL;
2348	pl->phy_enable_tx_lpi = false;
2349	pl->mac_tx_clk_stop = false;
2350	mutex_unlock(lock: &pl->state_mutex);
2351	mutex_unlock(lock: &phy->lock);
2352	}
2353	mutex_unlock(lock: &pl->phydev_mutex);
2354
2355	if (phy) {
2356	flush_work(work: &pl->resolve);
2357	phy_disconnect(phydev: phy);
2358	}
2359	}
2360	EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2361
2362	static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2363	{
2364	if (!up)
2365	pl->link_failed = true;
2366	phylink_run_resolve(pl);
2367	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2368	}
2369
2370	/**
2371	* phylink_mac_change() - notify phylink of a change in MAC state
2372	* @pl: a pointer to a &struct phylink returned from phylink_create()
2373	* @up: indicates whether the link is currently up.
2374	*
2375	* The MAC driver should call this driver when the state of its link
2376	* changes (eg, link failure, new negotiation results, etc.)
2377	*/
2378	void phylink_mac_change(struct phylink *pl, bool up)
2379	{
2380	phylink_link_changed(pl, up, what: "mac");
2381	}
2382	EXPORT_SYMBOL_GPL(phylink_mac_change);
2383
2384	/**
2385	* phylink_pcs_change() - notify phylink of a change to PCS link state
2386	* @pcs: pointer to &struct phylink_pcs
2387	* @up: indicates whether the link is currently up.
2388	*
2389	* The PCS driver should call this when the state of its link changes
2390	* (e.g. link failure, new negotiation results, etc.) Note: it should
2391	* not determine "up" by reading the BMSR. If in doubt about the link
2392	* state at interrupt time, then pass true if pcs_get_state() returns
2393	* the latched link-down state, otherwise pass false.
2394	*/
2395	void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2396	{
2397	struct phylink *pl = pcs->phylink;
2398
2399	if (pl)
2400	phylink_link_changed(pl, up, what: "pcs");
2401	}
2402	EXPORT_SYMBOL_GPL(phylink_pcs_change);
2403
2404	static irqreturn_t phylink_link_handler(int irq, void *data)
2405	{
2406	struct phylink *pl = data;
2407
2408	phylink_run_resolve(pl);
2409
2410	return IRQ_HANDLED;
2411	}
2412
2413	/**
2414	* phylink_start() - start a phylink instance
2415	* @pl: a pointer to a &struct phylink returned from phylink_create()
2416	*
2417	* Start the phylink instance specified by @pl, configuring the MAC for the
2418	* desired link mode(s) and negotiation style. This should be called from the
2419	* network device driver's &struct net_device_ops ndo_open() method.
2420	*/
2421	void phylink_start(struct phylink *pl)
2422	{
2423	bool poll = false;
2424
2425	ASSERT_RTNL();
2426
2427	phylink_info(pl, "configuring for %s/%s link mode\n",
2428	phylink_an_mode_str(pl->req_link_an_mode),
2429	phy_modes(pl->link_config.interface));
2430
2431	/* Always set the carrier off */
2432	if (pl->netdev)
2433	netif_carrier_off(dev: pl->netdev);
2434
2435	pl->pcs_state = PCS_STATE_STARTING;
2436
2437	/* Apply the link configuration to the MAC when starting. This allows
2438	* a fixed-link to start with the correct parameters, and also
2439	* ensures that we set the appropriate advertisement for Serdes links.
2440	*
2441	* Restart autonegotiation if using 802.3z to ensure that the link
2442	* parameters are properly negotiated. This is necessary for DSA
2443	* switches using 802.3z negotiation to ensure they see our modes.
2444	*/
2445	phylink_mac_initial_config(pl, force_restart: true);
2446
2447	pl->pcs_state = PCS_STATE_STARTED;
2448
2449	phylink_enable_and_run_resolve(pl, bit: PHYLINK_DISABLE_STOPPED);
2450
2451	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2452	int irq = gpiod_to_irq(desc: pl->link_gpio);
2453
2454	if (irq > 0) {
2455	if (!request_irq(irq, handler: phylink_link_handler,
2456	IRQF_TRIGGER_RISING |
2457	IRQF_TRIGGER_FALLING,
2458	name: "netdev link", dev: pl))
2459	pl->link_irq = irq;
2460	else
2461	irq = 0;
2462	}
2463	if (irq <= 0)
2464	poll = true;
2465	}
2466
2467	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2468	poll |= pl->config->poll_fixed_state;
2469
2470	if (poll)
2471	mod_timer(timer: &pl->link_poll, expires: jiffies + HZ);
2472	if (pl->phydev)
2473	phy_start(phydev: pl->phydev);
2474	if (pl->sfp_bus)
2475	sfp_upstream_start(bus: pl->sfp_bus);
2476	}
2477	EXPORT_SYMBOL_GPL(phylink_start);
2478
2479	/**
2480	* phylink_stop() - stop a phylink instance
2481	* @pl: a pointer to a &struct phylink returned from phylink_create()
2482	*
2483	* Stop the phylink instance specified by @pl. This should be called from the
2484	* network device driver's &struct net_device_ops ndo_stop() method. The
2485	* network device's carrier state should not be changed prior to calling this
2486	* function.
2487	*
2488	* This will synchronously bring down the link if the link is not already
2489	* down (in other words, it will trigger a mac_link_down() method call.)
2490	*/
2491	void phylink_stop(struct phylink *pl)
2492	{
2493	ASSERT_RTNL();
2494
2495	if (pl->sfp_bus)
2496	sfp_upstream_stop(bus: pl->sfp_bus);
2497	if (pl->phydev)
2498	phy_stop(phydev: pl->phydev);
2499	timer_delete_sync(timer: &pl->link_poll);
2500	if (pl->link_irq) {
2501	free_irq(pl->link_irq, pl);
2502	pl->link_irq = 0;
2503	}
2504
2505	phylink_run_resolve_and_disable(pl, bit: PHYLINK_DISABLE_STOPPED);
2506
2507	pl->pcs_state = PCS_STATE_DOWN;
2508
2509	phylink_pcs_disable(pcs: pl->pcs);
2510	}
2511	EXPORT_SYMBOL_GPL(phylink_stop);
2512
2513	/**
2514	* phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI
2515	* @pl: a pointer to a &struct phylink returned from phylink_create()
2516	*
2517	* Disable the PHY's ability to stop the receive clock while the receive path
2518	* is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block()
2519	* are balanced by calls to phylink_rx_clk_stop_unblock().
2520	*/
2521	void phylink_rx_clk_stop_block(struct phylink *pl)
2522	{
2523	ASSERT_RTNL();
2524
2525	if (pl->mac_rx_clk_stop_blocked == U8_MAX) {
2526	phylink_warn(pl, "%s called too many times - ignoring\n",
2527	__func__);
2528	dump_stack();
2529	return;
2530	}
2531
2532	/* Disable PHY receive clock stop if this is the first time this
2533	* function has been called and clock-stop was previously enabled.
2534	*/
2535	if (pl->mac_rx_clk_stop_blocked++ == 0 &&
2536	pl->mac_supports_eee_ops && pl->phydev &&
2537	pl->config->eee_rx_clk_stop_enable)
2538	phy_eee_rx_clock_stop(phydev: pl->phydev, clk_stop_enable: false);
2539	}
2540	EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block);
2541
2542	/**
2543	* phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock
2544	* @pl: a pointer to a &struct phylink returned from phylink_create()
2545	*
2546	* All calls to phylink_rx_clk_stop_block() must be balanced with a
2547	* corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs
2548	* ability to stop the receive clock when the receive path is in EEE LPI mode.
2549	*/
2550	void phylink_rx_clk_stop_unblock(struct phylink *pl)
2551	{
2552	ASSERT_RTNL();
2553
2554	if (pl->mac_rx_clk_stop_blocked == 0) {
2555	phylink_warn(pl, "%s called too many times - ignoring\n",
2556	__func__);
2557	dump_stack();
2558	return;
2559	}
2560
2561	/* Re-enable PHY receive clock stop if the number of unblocks matches
2562	* the number of calls to the block function above.
2563	*/
2564	if (--pl->mac_rx_clk_stop_blocked == 0 &&
2565	pl->mac_supports_eee_ops && pl->phydev &&
2566	pl->config->eee_rx_clk_stop_enable)
2567	phy_eee_rx_clock_stop(phydev: pl->phydev, clk_stop_enable: true);
2568	}
2569	EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock);
2570
2571	static bool phylink_mac_supports_wol(struct phylink *pl)
2572	{
2573	return !!pl->mac_ops->mac_wol_set;
2574	}
2575
2576	static bool phylink_phy_supports_wol(struct phylink *pl,
2577	struct phy_device *phydev)
2578	{
2579	return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev));
2580	}
2581
2582	static bool phylink_phy_pm_speed_ctrl(struct phylink *pl)
2583	{
2584	return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac &&
2585	pl->phydev && phy_may_wakeup(phydev: pl->phydev);
2586	}
2587
2588	/**
2589	* phylink_suspend() - handle a network device suspend event
2590	* @pl: a pointer to a &struct phylink returned from phylink_create()
2591	* @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2592	*
2593	* Handle a network device suspend event. There are several cases:
2594	*
2595	* - If Wake-on-Lan is not active, we can bring down the link between
2596	* the MAC and PHY by calling phylink_stop().
2597	* - If Wake-on-Lan is active, and being handled only by the PHY, we
2598	* can also bring down the link between the MAC and PHY.
2599	* - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2600	* still needs to receive packets, so we can not bring the link down.
2601	*
2602	* Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored.
2603	* (struct phylink_mac_ops.mac_set_wol populated.)
2604	*/
2605	void phylink_suspend(struct phylink *pl, bool mac_wol)
2606	{
2607	ASSERT_RTNL();
2608
2609	if (phylink_mac_supports_wol(pl))
2610	mac_wol = !!pl->wolopts_mac;
2611
2612	if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2613	/* Wake-on-Lan enabled, MAC handling */
2614	mutex_lock(&pl->state_mutex);
2615
2616	/* Stop the resolver bringing the link up */
2617	__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2618
2619	pl->suspend_link_up = phylink_link_is_up(pl);
2620	if (pl->suspend_link_up) {
2621	/* Disable the carrier, to prevent transmit timeouts,
2622	* but one would hope all packets have been sent. This
2623	* also means phylink_resolve() will do nothing.
2624	*/
2625	if (pl->netdev)
2626	netif_carrier_off(dev: pl->netdev);
2627	pl->old_link_state = false;
2628	}
2629
2630	/* We do not call mac_link_down() here as we want the
2631	* link to remain up to receive the WoL packets.
2632	*/
2633	mutex_unlock(lock: &pl->state_mutex);
2634	} else {
2635	phylink_stop(pl);
2636	}
2637
2638	if (phylink_phy_pm_speed_ctrl(pl))
2639	phylink_speed_down(pl, sync: false);
2640	}
2641	EXPORT_SYMBOL_GPL(phylink_suspend);
2642
2643	/**
2644	* phylink_prepare_resume() - prepare to resume a network device
2645	* @pl: a pointer to a &struct phylink returned from phylink_create()
2646	*
2647	* Optional, but if called must be called prior to phylink_resume().
2648	*
2649	* Prepare to resume a network device, preparing the PHY as necessary.
2650	*/
2651	void phylink_prepare_resume(struct phylink *pl)
2652	{
2653	struct phy_device *phydev = pl->phydev;
2654
2655	ASSERT_RTNL();
2656
2657	/* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock
2658	* when PDOWN is set. However, some MACs require RXC to be running
2659	* in order to resume. If the MAC requires RXC, and we have a PHY,
2660	* then resume the PHY. Note that 802.3 allows PHYs 500ms before
2661	* the clock meets requirements. We do not implement this delay.
2662	*/
2663	if (pl->config->mac_requires_rxc && phydev && phydev->suspended)
2664	phy_resume(phydev);
2665	}
2666	EXPORT_SYMBOL_GPL(phylink_prepare_resume);
2667
2668	/**
2669	* phylink_resume() - handle a network device resume event
2670	* @pl: a pointer to a &struct phylink returned from phylink_create()
2671	*
2672	* Undo the effects of phylink_suspend(), returning the link to an
2673	* operational state.
2674	*/
2675	void phylink_resume(struct phylink *pl)
2676	{
2677	ASSERT_RTNL();
2678
2679	if (phylink_phy_pm_speed_ctrl(pl))
2680	phylink_speed_up(pl);
2681
2682	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2683	/* Wake-on-Lan enabled, MAC handling */
2684
2685	if (pl->suspend_link_up) {
2686	/* Call mac_link_down() so we keep the overall state
2687	* balanced. Do this under the state_mutex lock for
2688	* consistency. This will cause a "Link Down" message
2689	* to be printed during resume, which is harmless -
2690	* the true link state will be printed when we run a
2691	* resolve.
2692	*/
2693	mutex_lock(&pl->state_mutex);
2694	phylink_link_down(pl);
2695	mutex_unlock(lock: &pl->state_mutex);
2696	}
2697
2698	/* Re-apply the link parameters so that all the settings get
2699	* restored to the MAC.
2700	*/
2701	phylink_mac_initial_config(pl, force_restart: true);
2702
2703	/* Re-enable and re-resolve the link parameters */
2704	phylink_enable_and_run_resolve(pl, bit: PHYLINK_DISABLE_MAC_WOL);
2705	} else {
2706	phylink_start(pl);
2707	}
2708	}
2709	EXPORT_SYMBOL_GPL(phylink_resume);
2710
2711	/**
2712	* phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2713	* @pl: a pointer to a &struct phylink returned from phylink_create()
2714	* @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2715	*
2716	* Read the wake on lan parameters from the PHY attached to the phylink
2717	* instance specified by @pl. If no PHY is currently attached, report no
2718	* support for wake on lan.
2719	*/
2720	void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2721	{
2722	ASSERT_RTNL();
2723
2724	wol->supported = 0;
2725	wol->wolopts = 0;
2726
2727	if (phylink_mac_supports_wol(pl)) {
2728	if (phylink_phy_supports_wol(pl, phydev: pl->phydev))
2729	phy_ethtool_get_wol(phydev: pl->phydev, wol);
2730
2731	/* Where the MAC augments the WoL support, merge its support and
2732	* current configuration.
2733	*/
2734	if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE)
2735	memcpy(wol->sopass, pl->wol_sopass,
2736	sizeof(wol->sopass));
2737
2738	wol->supported |= pl->config->wol_mac_support;
2739	wol->wolopts |= pl->wolopts_mac;
2740	} else {
2741	/* Legacy */
2742	if (pl->phydev)
2743	phy_ethtool_get_wol(phydev: pl->phydev, wol);
2744	}
2745	}
2746	EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2747
2748	/**
2749	* phylink_ethtool_set_wol() - set wake on lan parameters
2750	* @pl: a pointer to a &struct phylink returned from phylink_create()
2751	* @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2752	*
2753	* Set the wake on lan parameters for the PHY attached to the phylink
2754	* instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2755	* error.
2756	*
2757	* Returns zero on success or negative errno code.
2758	*/
2759	int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2760	{
2761	struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL };
2762	int ret = -EOPNOTSUPP;
2763	bool changed;
2764	u32 wolopts;
2765
2766	ASSERT_RTNL();
2767
2768	if (phylink_mac_supports_wol(pl)) {
2769	wolopts = wol->wolopts;
2770
2771	if (phylink_phy_supports_wol(pl, phydev: pl->phydev)) {
2772	ret = phy_ethtool_set_wol(phydev: pl->phydev, wol);
2773	if (ret != 0 && ret != -EOPNOTSUPP)
2774	return ret;
2775
2776	phy_ethtool_get_wol(phydev: pl->phydev, wol: &w);
2777
2778	/* Any Wake-on-Lan modes which the PHY is handling
2779	* should not be passed on to the MAC.
2780	*/
2781	wolopts &= ~w.wolopts;
2782	}
2783
2784	wolopts &= pl->config->wol_mac_support;
2785	changed = pl->wolopts_mac != wolopts;
2786	if (wolopts & WAKE_MAGICSECURE)
2787	changed |= !!memcmp(p: wol->sopass, q: pl->wol_sopass,
2788	size: sizeof(wol->sopass));
2789	memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass));
2790
2791	if (changed) {
2792	ret = pl->mac_ops->mac_wol_set(pl->config, wolopts,
2793	wol->sopass);
2794	if (!ret)
2795	pl->wolopts_mac = wolopts;
2796	} else {
2797	ret = 0;
2798	}
2799	} else {
2800	if (pl->phydev)
2801	ret = phy_ethtool_set_wol(phydev: pl->phydev, wol);
2802	}
2803
2804	return ret;
2805	}
2806	EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2807
2808	static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2809	const unsigned long *link_modes)
2810	{
2811	phy_interface_t interface;
2812
2813	interface = sfp_select_interface(bus: pl->sfp_bus, link_modes);
2814	if (interface == PHY_INTERFACE_MODE_NA) {
2815	phylink_err(pl,
2816	"selection of interface failed, advertisement %*pb\n",
2817	__ETHTOOL_LINK_MODE_MASK_NBITS,
2818	link_modes);
2819	return interface;
2820	}
2821
2822	if (!test_bit(interface, pl->config->supported_interfaces)) {
2823	phylink_err(pl,
2824	"selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2825	phy_modes(interface), interface,
2826	(int)PHY_INTERFACE_MODE_MAX,
2827	pl->config->supported_interfaces);
2828	return PHY_INTERFACE_MODE_NA;
2829	}
2830
2831	return interface;
2832	}
2833
2834	static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl,
2835	u32 speed)
2836	{
2837	phy_interface_t best_interface = PHY_INTERFACE_MODE_NA;
2838	phy_interface_t interface;
2839	u32 max_speed;
2840	int i;
2841
2842	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) {
2843	interface = phylink_sfp_interface_preference[i];
2844	if (!test_bit(interface, pl->sfp_interfaces))
2845	continue;
2846
2847	max_speed = phylink_interface_max_speed(interface);
2848
2849	/* The logic here is: if speed == max_speed, then we've found
2850	* the best interface. Otherwise we find the interface that
2851	* can just support the requested speed.
2852	*/
2853	if (max_speed >= speed)
2854	best_interface = interface;
2855
2856	if (max_speed <= speed)
2857	break;
2858	}
2859
2860	if (best_interface == PHY_INTERFACE_MODE_NA)
2861	phylink_err(pl, "selection of interface failed, speed %u\n",
2862	speed);
2863
2864	return best_interface;
2865	}
2866
2867	static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2868	{
2869	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2870
2871	linkmode_zero(dst: mask);
2872	phylink_set_port_modes(mask);
2873
2874	linkmode_and(dst, a: dst, b: mask);
2875	linkmode_or(dst, a: dst, b);
2876	}
2877
2878	static void phylink_get_ksettings(const struct phylink_link_state *state,
2879	struct ethtool_link_ksettings *kset)
2880	{
2881	phylink_merge_link_mode(dst: kset->link_modes.advertising, b: state->advertising);
2882	linkmode_copy(dst: kset->link_modes.lp_advertising, src: state->lp_advertising);
2883	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2884	kset->base.speed = state->speed;
2885	kset->base.duplex = state->duplex;
2886	}
2887	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2888	state->advertising) ?
2889	AUTONEG_ENABLE : AUTONEG_DISABLE;
2890	}
2891
2892	/**
2893	* phylink_ethtool_ksettings_get() - get the current link settings
2894	* @pl: a pointer to a &struct phylink returned from phylink_create()
2895	* @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2896	*
2897	* Read the current link settings for the phylink instance specified by @pl.
2898	* This will be the link settings read from the MAC, PHY or fixed link
2899	* settings depending on the current negotiation mode.
2900	*/
2901	int phylink_ethtool_ksettings_get(struct phylink *pl,
2902	struct ethtool_link_ksettings *kset)
2903	{
2904	struct phylink_link_state link_state;
2905
2906	ASSERT_RTNL();
2907
2908	if (pl->phydev)
2909	phy_ethtool_ksettings_get(phydev: pl->phydev, cmd: kset);
2910	else
2911	kset->base.port = pl->link_port;
2912
2913	linkmode_copy(dst: kset->link_modes.supported, src: pl->supported);
2914
2915	switch (pl->act_link_an_mode) {
2916	case MLO_AN_FIXED:
2917	/* We are using fixed settings. Report these as the
2918	* current link settings - and note that these also
2919	* represent the supported speeds/duplex/pause modes.
2920	*/
2921	phylink_get_fixed_state(pl, state: &link_state);
2922	phylink_get_ksettings(state: &link_state, kset);
2923	break;
2924
2925	case MLO_AN_INBAND:
2926	/* If there is a phy attached, then use the reported
2927	* settings from the phy with no modification.
2928	*/
2929	if (pl->phydev)
2930	break;
2931
2932	phylink_mac_pcs_get_state(pl, state: &link_state);
2933
2934	/* The MAC is reporting the link results from its own PCS
2935	* layer via in-band status. Report these as the current
2936	* link settings.
2937	*/
2938	phylink_get_ksettings(state: &link_state, kset);
2939	break;
2940	}
2941
2942	return 0;
2943	}
2944	EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2945
2946	static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2947	phy_interface_t interface,
2948	unsigned long *adv)
2949	{
2950	unsigned int inband = phylink_inband_caps(pl, interface);
2951	unsigned int mask;
2952
2953	/* If the PCS doesn't implement inband support, be permissive. */
2954	if (!inband)
2955	return true;
2956
2957	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2958	mask = LINK_INBAND_ENABLE;
2959	else
2960	mask = LINK_INBAND_DISABLE;
2961
2962	/* Check whether the PCS implements the required mode */
2963	return !!(inband & mask);
2964	}
2965
2966	/**
2967	* phylink_ethtool_ksettings_set() - set the link settings
2968	* @pl: a pointer to a &struct phylink returned from phylink_create()
2969	* @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2970	*/
2971	int phylink_ethtool_ksettings_set(struct phylink *pl,
2972	const struct ethtool_link_ksettings *kset)
2973	{
2974	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2975	const struct link_capabilities *c;
2976	struct phylink_link_state config;
2977
2978	ASSERT_RTNL();
2979
2980	if (pl->phydev) {
2981	struct ethtool_link_ksettings phy_kset = *kset;
2982
2983	linkmode_and(dst: phy_kset.link_modes.advertising,
2984	a: phy_kset.link_modes.advertising,
2985	b: pl->supported);
2986
2987	/* We can rely on phylib for this update; we also do not need
2988	* to update the pl->link_config settings:
2989	* - the configuration returned via ksettings_get() will come
2990	* from phylib whenever a PHY is present.
2991	* - link_config.interface will be updated by the PHY calling
2992	* back via phylink_phy_change() and a subsequent resolve.
2993	* - initial link configuration for PHY mode comes from the
2994	* last phy state updated via phylink_phy_change().
2995	* - other configuration changes (e.g. pause modes) are
2996	* performed directly via phylib.
2997	* - if in in-band mode with a PHY, the link configuration
2998	* is passed on the link from the PHY, and all of
2999	* link_config.{speed,duplex,an_enabled,pause} are not used.
3000	* - the only possible use would be link_config.advertising
3001	* pause modes when in 1000base-X mode with a PHY, but in
3002	* the presence of a PHY, this should not be changed as that
3003	* should be determined from the media side advertisement.
3004	*/
3005	return phy_ethtool_ksettings_set(phydev: pl->phydev, cmd: &phy_kset);
3006	}
3007
3008	config = pl->link_config;
3009	/* Mask out unsupported advertisements */
3010	linkmode_and(dst: config.advertising, a: kset->link_modes.advertising,
3011	b: pl->supported);
3012
3013	/* FIXME: should we reject autoneg if phy/mac does not support it? */
3014	switch (kset->base.autoneg) {
3015	case AUTONEG_DISABLE:
3016	/* Autonegotiation disabled, select a suitable speed and
3017	* duplex.
3018	*/
3019	c = phy_caps_lookup(speed: kset->base.speed, duplex: kset->base.duplex,
3020	supported: pl->supported, exact: false);
3021	if (!c)
3022	return -EINVAL;
3023
3024	/* If we have a fixed link, refuse to change link parameters.
3025	* If the link parameters match, accept them but do nothing.
3026	*/
3027	if (pl->req_link_an_mode == MLO_AN_FIXED) {
3028	if (c->speed != pl->link_config.speed ||
3029	c->duplex != pl->link_config.duplex)
3030	return -EINVAL;
3031	return 0;
3032	}
3033
3034	config.speed = c->speed;
3035	config.duplex = c->duplex;
3036	break;
3037
3038	case AUTONEG_ENABLE:
3039	/* If we have a fixed link, allow autonegotiation (since that
3040	* is our default case) but do not allow the advertisement to
3041	* be changed. If the advertisement matches, simply return.
3042	*/
3043	if (pl->req_link_an_mode == MLO_AN_FIXED) {
3044	if (!linkmode_equal(src1: config.advertising,
3045	src2: pl->link_config.advertising))
3046	return -EINVAL;
3047	return 0;
3048	}
3049
3050	config.speed = SPEED_UNKNOWN;
3051	config.duplex = DUPLEX_UNKNOWN;
3052	break;
3053
3054	default:
3055	return -EINVAL;
3056	}
3057
3058	/* We have ruled out the case with a PHY attached, and the
3059	* fixed-link cases. All that is left are in-band links.
3060	*/
3061	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
3062	kset->base.autoneg == AUTONEG_ENABLE);
3063
3064	/* If this link is with an SFP, ensure that changes to advertised modes
3065	* also cause the associated interface to be selected such that the
3066	* link can be configured correctly.
3067	*/
3068	if (pl->sfp_bus) {
3069	if (kset->base.autoneg == AUTONEG_ENABLE)
3070	config.interface =
3071	phylink_sfp_select_interface(pl,
3072	link_modes: config.advertising);
3073	else
3074	config.interface =
3075	phylink_sfp_select_interface_speed(pl,
3076	speed: config.speed);
3077	if (config.interface == PHY_INTERFACE_MODE_NA)
3078	return -EINVAL;
3079
3080	/* Revalidate with the selected interface */
3081	linkmode_copy(dst: support, src: pl->supported);
3082	if (phylink_validate(pl, supported: support, state: &config)) {
3083	phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
3084	phylink_an_mode_str(pl->req_link_an_mode),
3085	phy_modes(config.interface),
3086	__ETHTOOL_LINK_MODE_MASK_NBITS, support);
3087	return -EINVAL;
3088	}
3089	} else {
3090	/* Validate without changing the current supported mask. */
3091	linkmode_copy(dst: support, src: pl->supported);
3092	if (phylink_validate(pl, supported: support, state: &config))
3093	return -EINVAL;
3094	}
3095
3096	/* If autonegotiation is enabled, we must have an advertisement */
3097	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3098	config.advertising) &&
3099	phylink_is_empty_linkmode(linkmode: config.advertising))
3100	return -EINVAL;
3101
3102	/* Validate the autonegotiation state. We don't have a PHY in this
3103	* situation, so the PCS is the media-facing entity.
3104	*/
3105	if (!phylink_validate_pcs_inband_autoneg(pl, interface: config.interface,
3106	adv: config.advertising))
3107	return -EINVAL;
3108
3109	mutex_lock(&pl->state_mutex);
3110	pl->link_config.speed = config.speed;
3111	pl->link_config.duplex = config.duplex;
3112
3113	if (pl->link_config.interface != config.interface) {
3114	/* The interface changed, e.g. 1000base-X <-> 2500base-X */
3115	/* We need to force the link down, then change the interface */
3116	if (pl->old_link_state) {
3117	phylink_link_down(pl);
3118	pl->old_link_state = false;
3119	}
3120	if (!test_bit(PHYLINK_DISABLE_STOPPED,
3121	&pl->phylink_disable_state))
3122	phylink_major_config(pl, restart: false, state: &config);
3123	pl->link_config.interface = config.interface;
3124	linkmode_copy(dst: pl->link_config.advertising, src: config.advertising);
3125	} else if (!linkmode_equal(src1: pl->link_config.advertising,
3126	src2: config.advertising)) {
3127	linkmode_copy(dst: pl->link_config.advertising, src: config.advertising);
3128	phylink_change_inband_advert(pl);
3129	}
3130	mutex_unlock(lock: &pl->state_mutex);
3131
3132	return 0;
3133	}
3134	EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
3135
3136	/**
3137	* phylink_ethtool_nway_reset() - restart negotiation
3138	* @pl: a pointer to a &struct phylink returned from phylink_create()
3139	*
3140	* Restart negotiation for the phylink instance specified by @pl. This will
3141	* cause any attached phy to restart negotiation with the link partner, and
3142	* if the MAC is in a BaseX mode, the MAC will also be requested to restart
3143	* negotiation.
3144	*
3145	* Returns zero on success, or negative error code.
3146	*/
3147	int phylink_ethtool_nway_reset(struct phylink *pl)
3148	{
3149	int ret = 0;
3150
3151	ASSERT_RTNL();
3152
3153	if (pl->phydev)
3154	ret = phy_restart_aneg(phydev: pl->phydev);
3155	phylink_pcs_an_restart(pl);
3156
3157	return ret;
3158	}
3159	EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
3160
3161	/**
3162	* phylink_ethtool_get_pauseparam() - get the current pause parameters
3163	* @pl: a pointer to a &struct phylink returned from phylink_create()
3164	* @pause: a pointer to a &struct ethtool_pauseparam
3165	*/
3166	void phylink_ethtool_get_pauseparam(struct phylink *pl,
3167	struct ethtool_pauseparam *pause)
3168	{
3169	ASSERT_RTNL();
3170
3171	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3172	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3173	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3174	}
3175	EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3176
3177	/**
3178	* phylink_ethtool_set_pauseparam() - set the current pause parameters
3179	* @pl: a pointer to a &struct phylink returned from phylink_create()
3180	* @pause: a pointer to a &struct ethtool_pauseparam
3181	*/
3182	int phylink_ethtool_set_pauseparam(struct phylink *pl,
3183	struct ethtool_pauseparam *pause)
3184	{
3185	struct phylink_link_state *config = &pl->link_config;
3186	bool manual_changed;
3187	int pause_state;
3188
3189	ASSERT_RTNL();
3190
3191	if (pl->req_link_an_mode == MLO_AN_FIXED)
3192	return -EOPNOTSUPP;
3193
3194	if (!phylink_test(pl->supported, Pause) &&
3195	!phylink_test(pl->supported, Asym_Pause))
3196	return -EOPNOTSUPP;
3197
3198	if (!phylink_test(pl->supported, Asym_Pause) &&
3199	pause->rx_pause != pause->tx_pause)
3200	return -EINVAL;
3201
3202	pause_state = 0;
3203	if (pause->autoneg)
3204	pause_state |= MLO_PAUSE_AN;
3205	if (pause->rx_pause)
3206	pause_state |= MLO_PAUSE_RX;
3207	if (pause->tx_pause)
3208	pause_state |= MLO_PAUSE_TX;
3209
3210	mutex_lock(&pl->state_mutex);
3211	/*
3212	* See the comments for linkmode_set_pause(), wrt the deficiencies
3213	* with the current implementation. A solution to this issue would
3214	* be:
3215	* ethtool Local device
3216	* rx tx Pause AsymDir
3217	* 0 0 0 0
3218	* 1 0 1 1
3219	* 0 1 0 1
3220	* 1 1 1 1
3221	* and then use the ethtool rx/tx enablement status to mask the
3222	* rx/tx pause resolution.
3223	*/
3224	linkmode_set_pause(advertisement: config->advertising, tx: pause->tx_pause,
3225	rx: pause->rx_pause);
3226
3227	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3228	(!(pause_state & MLO_PAUSE_AN) &&
3229	(config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3230
3231	config->pause = pause_state;
3232
3233	/* Update our in-band advertisement, triggering a renegotiation if
3234	* the advertisement changed.
3235	*/
3236	if (!pl->phydev)
3237	phylink_change_inband_advert(pl);
3238
3239	mutex_unlock(lock: &pl->state_mutex);
3240
3241	/* If we have a PHY, a change of the pause frame advertisement will
3242	* cause phylib to renegotiate (if AN is enabled) which will in turn
3243	* call our phylink_phy_change() and trigger a resolve. Note that
3244	* we can't hold our state mutex while calling phy_set_asym_pause().
3245	*/
3246	if (pl->phydev)
3247	phy_set_asym_pause(phydev: pl->phydev, rx: pause->rx_pause,
3248	tx: pause->tx_pause);
3249
3250	/* If the manual pause settings changed, make sure we trigger a
3251	* resolve to update their state; we can not guarantee that the
3252	* link will cycle.
3253	*/
3254	if (manual_changed) {
3255	pl->link_failed = true;
3256	phylink_run_resolve(pl);
3257	}
3258
3259	return 0;
3260	}
3261	EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3262
3263	/**
3264	* phylink_get_eee_err() - read the energy efficient ethernet error
3265	* counter
3266	* @pl: a pointer to a &struct phylink returned from phylink_create().
3267	*
3268	* Read the Energy Efficient Ethernet error counter from the PHY associated
3269	* with the phylink instance specified by @pl.
3270	*
3271	* Returns positive error counter value, or negative error code.
3272	*/
3273	int phylink_get_eee_err(struct phylink *pl)
3274	{
3275	int ret = 0;
3276
3277	ASSERT_RTNL();
3278
3279	if (pl->phydev)
3280	ret = phy_get_eee_err(phydev: pl->phydev);
3281
3282	return ret;
3283	}
3284	EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3285
3286	/**
3287	* phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3288	* @pl: a pointer to a &struct phylink returned from phylink_create()
3289	* @eee: a pointer to a &struct ethtool_keee for the read parameters
3290	*/
3291	int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3292	{
3293	int ret = -EOPNOTSUPP;
3294
3295	ASSERT_RTNL();
3296
3297	if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3298	return ret;
3299
3300	if (pl->phydev) {
3301	ret = phy_ethtool_get_eee(phydev: pl->phydev, data: eee);
3302	/* Restrict supported linkmode mask */
3303	if (ret == 0 && pl->mac_supports_eee_ops)
3304	linkmode_and(dst: eee->supported, a: eee->supported,
3305	b: pl->supported_lpi);
3306	}
3307
3308	return ret;
3309	}
3310	EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3311
3312	/**
3313	* phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3314	* @pl: a pointer to a &struct phylink returned from phylink_create()
3315	* @eee: a pointer to a &struct ethtool_keee for the desired parameters
3316	*/
3317	int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3318	{
3319	bool mac_eee = pl->mac_supports_eee;
3320	int ret = -EOPNOTSUPP;
3321
3322	ASSERT_RTNL();
3323
3324	phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3325	mac_eee ? "supports" : "does not support",
3326	eee->eee_enabled ? ", enabled" : "",
3327	__ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3328	eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3329
3330	if (pl->mac_supports_eee_ops && !mac_eee)
3331	return ret;
3332
3333	if (pl->phydev) {
3334	/* Restrict advertisement mask */
3335	if (pl->mac_supports_eee_ops)
3336	linkmode_and(dst: eee->advertised, a: eee->advertised,
3337	b: pl->supported_lpi);
3338	ret = phy_ethtool_set_eee(phydev: pl->phydev, data: eee);
3339	if (ret == 0)
3340	eee_to_eeecfg(eeecfg: &pl->eee_cfg, eee);
3341	}
3342
3343	return ret;
3344	}
3345	EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3346
3347	/* This emulates MII registers for a fixed-mode phy operating as per the
3348	* passed in state. "aneg" defines if we report negotiation is possible.
3349	*
3350	* FIXME: should deal with negotiation state too.
3351	*/
3352	static int phylink_mii_emul_read(unsigned int reg,
3353	struct phylink_link_state *state)
3354	{
3355	struct fixed_phy_status fs;
3356	unsigned long *lpa = state->lp_advertising;
3357	int val;
3358
3359	fs.link = state->link;
3360	fs.speed = state->speed;
3361	fs.duplex = state->duplex;
3362	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3363	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3364
3365	val = swphy_read_reg(reg, state: &fs);
3366	if (reg == MII_BMSR) {
3367	if (!state->an_complete)
3368	val &= ~BMSR_ANEGCOMPLETE;
3369	}
3370	return val;
3371	}
3372
3373	static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3374	unsigned int reg)
3375	{
3376	struct phy_device *phydev = pl->phydev;
3377	int prtad, devad;
3378
3379	if (mdio_phy_id_is_c45(phy_id)) {
3380	prtad = mdio_phy_id_prtad(phy_id);
3381	devad = mdio_phy_id_devad(phy_id);
3382	return mdiobus_c45_read(bus: pl->phydev->mdio.bus, addr: prtad, devad,
3383	regnum: reg);
3384	}
3385
3386	if (phydev->is_c45) {
3387	switch (reg) {
3388	case MII_BMCR:
3389	case MII_BMSR:
3390	case MII_PHYSID1:
3391	case MII_PHYSID2:
3392	devad = __ffs(phydev->c45_ids.mmds_present);
3393	break;
3394	case MII_ADVERTISE:
3395	case MII_LPA:
3396	if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3397	return -EINVAL;
3398	devad = MDIO_MMD_AN;
3399	if (reg == MII_ADVERTISE)
3400	reg = MDIO_AN_ADVERTISE;
3401	else
3402	reg = MDIO_AN_LPA;
3403	break;
3404	default:
3405	return -EINVAL;
3406	}
3407	prtad = phy_id;
3408	return mdiobus_c45_read(bus: pl->phydev->mdio.bus, addr: prtad, devad,
3409	regnum: reg);
3410	}
3411
3412	return mdiobus_read(bus: pl->phydev->mdio.bus, addr: phy_id, regnum: reg);
3413	}
3414
3415	static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3416	unsigned int reg, unsigned int val)
3417	{
3418	struct phy_device *phydev = pl->phydev;
3419	int prtad, devad;
3420
3421	if (mdio_phy_id_is_c45(phy_id)) {
3422	prtad = mdio_phy_id_prtad(phy_id);
3423	devad = mdio_phy_id_devad(phy_id);
3424	return mdiobus_c45_write(bus: pl->phydev->mdio.bus, addr: prtad, devad,
3425	regnum: reg, val);
3426	}
3427
3428	if (phydev->is_c45) {
3429	switch (reg) {
3430	case MII_BMCR:
3431	case MII_BMSR:
3432	case MII_PHYSID1:
3433	case MII_PHYSID2:
3434	devad = __ffs(phydev->c45_ids.mmds_present);
3435	break;
3436	case MII_ADVERTISE:
3437	case MII_LPA:
3438	if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3439	return -EINVAL;
3440	devad = MDIO_MMD_AN;
3441	if (reg == MII_ADVERTISE)
3442	reg = MDIO_AN_ADVERTISE;
3443	else
3444	reg = MDIO_AN_LPA;
3445	break;
3446	default:
3447	return -EINVAL;
3448	}
3449	return mdiobus_c45_write(bus: pl->phydev->mdio.bus, addr: phy_id, devad,
3450	regnum: reg, val);
3451	}
3452
3453	return mdiobus_write(bus: phydev->mdio.bus, addr: phy_id, regnum: reg, val);
3454	}
3455
3456	static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3457	unsigned int reg)
3458	{
3459	struct phylink_link_state state;
3460	int val = 0xffff;
3461
3462	switch (pl->act_link_an_mode) {
3463	case MLO_AN_FIXED:
3464	if (phy_id == 0) {
3465	phylink_get_fixed_state(pl, state: &state);
3466	val = phylink_mii_emul_read(reg, state: &state);
3467	}
3468	break;
3469
3470	case MLO_AN_PHY:
3471	return -EOPNOTSUPP;
3472
3473	case MLO_AN_INBAND:
3474	if (phy_id == 0) {
3475	phylink_mac_pcs_get_state(pl, state: &state);
3476	val = phylink_mii_emul_read(reg, state: &state);
3477	}
3478	break;
3479	}
3480
3481	return val & 0xffff;
3482	}
3483
3484	static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3485	unsigned int reg, unsigned int val)
3486	{
3487	switch (pl->act_link_an_mode) {
3488	case MLO_AN_FIXED:
3489	break;
3490
3491	case MLO_AN_PHY:
3492	return -EOPNOTSUPP;
3493
3494	case MLO_AN_INBAND:
3495	break;
3496	}
3497
3498	return 0;
3499	}
3500
3501	/**
3502	* phylink_mii_ioctl() - generic mii ioctl interface
3503	* @pl: a pointer to a &struct phylink returned from phylink_create()
3504	* @ifr: a pointer to a &struct ifreq for socket ioctls
3505	* @cmd: ioctl cmd to execute
3506	*
3507	* Perform the specified MII ioctl on the PHY attached to the phylink instance
3508	* specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3509	*
3510	* Returns: zero on success or negative error code.
3511	*
3512	* %SIOCGMIIPHY:
3513	* read register from the current PHY.
3514	* %SIOCGMIIREG:
3515	* read register from the specified PHY.
3516	* %SIOCSMIIREG:
3517	* set a register on the specified PHY.
3518	*/
3519	int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3520	{
3521	struct mii_ioctl_data *mii = if_mii(rq: ifr);
3522	int ret;
3523
3524	ASSERT_RTNL();
3525
3526	if (pl->phydev) {
3527	/* PHYs only exist for MLO_AN_PHY and SGMII */
3528	switch (cmd) {
3529	case SIOCGMIIPHY:
3530	mii->phy_id = pl->phydev->mdio.addr;
3531	fallthrough;
3532
3533	case SIOCGMIIREG:
3534	ret = phylink_phy_read(pl, phy_id: mii->phy_id, reg: mii->reg_num);
3535	if (ret >= 0) {
3536	mii->val_out = ret;
3537	ret = 0;
3538	}
3539	break;
3540
3541	case SIOCSMIIREG:
3542	ret = phylink_phy_write(pl, phy_id: mii->phy_id, reg: mii->reg_num,
3543	val: mii->val_in);
3544	break;
3545
3546	default:
3547	ret = phy_mii_ioctl(phydev: pl->phydev, ifr, cmd);
3548	break;
3549	}
3550	} else {
3551	switch (cmd) {
3552	case SIOCGMIIPHY:
3553	mii->phy_id = 0;
3554	fallthrough;
3555
3556	case SIOCGMIIREG:
3557	ret = phylink_mii_read(pl, phy_id: mii->phy_id, reg: mii->reg_num);
3558	if (ret >= 0) {
3559	mii->val_out = ret;
3560	ret = 0;
3561	}
3562	break;
3563
3564	case SIOCSMIIREG:
3565	ret = phylink_mii_write(pl, phy_id: mii->phy_id, reg: mii->reg_num,
3566	val: mii->val_in);
3567	break;
3568
3569	default:
3570	ret = -EOPNOTSUPP;
3571	break;
3572	}
3573	}
3574
3575	return ret;
3576	}
3577	EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3578
3579	/**
3580	* phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3581	* link partners
3582	* @pl: a pointer to a &struct phylink returned from phylink_create()
3583	* @sync: perform action synchronously
3584	*
3585	* If we have a PHY that is not part of a SFP module, then set the speed
3586	* as described in the phy_speed_down() function. Please see this function
3587	* for a description of the @sync parameter.
3588	*
3589	* Returns zero if there is no PHY, otherwise as per phy_speed_down().
3590	*/
3591	int phylink_speed_down(struct phylink *pl, bool sync)
3592	{
3593	int ret = 0;
3594
3595	ASSERT_RTNL();
3596
3597	if (!pl->sfp_bus && pl->phydev)
3598	ret = phy_speed_down(phydev: pl->phydev, sync);
3599
3600	return ret;
3601	}
3602	EXPORT_SYMBOL_GPL(phylink_speed_down);
3603
3604	/**
3605	* phylink_speed_up() - restore the advertised speeds prior to the call to
3606	* phylink_speed_down()
3607	* @pl: a pointer to a &struct phylink returned from phylink_create()
3608	*
3609	* If we have a PHY that is not part of a SFP module, then restore the
3610	* PHY speeds as per phy_speed_up().
3611	*
3612	* Returns zero if there is no PHY, otherwise as per phy_speed_up().
3613	*/
3614	int phylink_speed_up(struct phylink *pl)
3615	{
3616	int ret = 0;
3617
3618	ASSERT_RTNL();
3619
3620	if (!pl->sfp_bus && pl->phydev)
3621	ret = phy_speed_up(phydev: pl->phydev);
3622
3623	return ret;
3624	}
3625	EXPORT_SYMBOL_GPL(phylink_speed_up);
3626
3627	static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3628	{
3629	struct phylink *pl = upstream;
3630
3631	pl->netdev->sfp_bus = bus;
3632	}
3633
3634	static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3635	{
3636	struct phylink *pl = upstream;
3637
3638	pl->netdev->sfp_bus = NULL;
3639	}
3640
3641	static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3642	const unsigned long *intf)
3643	{
3644	phy_interface_t interface;
3645	size_t i;
3646
3647	interface = PHY_INTERFACE_MODE_NA;
3648	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3649	if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3650	interface = phylink_sfp_interface_preference[i];
3651	break;
3652	}
3653
3654	return interface;
3655	}
3656
3657	static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3658	struct phylink_link_state *state,
3659	bool changed)
3660	{
3661	u8 mode = MLO_AN_INBAND;
3662
3663	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3664	phylink_an_mode_str(mode), phy_modes(state->interface),
3665	__ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3666
3667	if (!linkmode_equal(src1: pl->supported, src2: supported)) {
3668	linkmode_copy(dst: pl->supported, src: supported);
3669	changed = true;
3670	}
3671
3672	if (!linkmode_equal(src1: pl->link_config.advertising, src2: state->advertising)) {
3673	linkmode_copy(dst: pl->link_config.advertising, src: state->advertising);
3674	changed = true;
3675	}
3676
3677	if (pl->req_link_an_mode != mode ||
3678	pl->link_config.interface != state->interface) {
3679	pl->req_link_an_mode = mode;
3680	pl->link_config.interface = state->interface;
3681
3682	changed = true;
3683
3684	phylink_info(pl, "switched to %s/%s link mode\n",
3685	phylink_an_mode_str(mode),
3686	phy_modes(state->interface));
3687	}
3688
3689	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3690	&pl->phylink_disable_state))
3691	phylink_mac_initial_config(pl, force_restart: false);
3692	}
3693
3694	static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3695	{
3696	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3697	struct phylink_link_state config;
3698	int ret;
3699
3700	/* We're not using pl->sfp_interfaces, so clear it. */
3701	phy_interface_zero(intf: pl->sfp_interfaces);
3702	linkmode_copy(dst: support, src: phy->supported);
3703
3704	memset(&config, 0, sizeof(config));
3705	linkmode_copy(dst: config.advertising, src: phy->advertising);
3706	config.interface = PHY_INTERFACE_MODE_NA;
3707	config.speed = SPEED_UNKNOWN;
3708	config.duplex = DUPLEX_UNKNOWN;
3709	config.pause = MLO_PAUSE_AN;
3710
3711	/* Ignore errors if we're expecting a PHY to attach later */
3712	ret = phylink_validate(pl, supported: support, state: &config);
3713	if (ret) {
3714	phylink_err(pl, "validation with support %*pb failed: %pe\n",
3715	__ETHTOOL_LINK_MODE_MASK_NBITS, support,
3716	ERR_PTR(ret));
3717	return ret;
3718	}
3719
3720	config.interface = phylink_sfp_select_interface(pl, link_modes: config.advertising);
3721	if (config.interface == PHY_INTERFACE_MODE_NA)
3722	return -EINVAL;
3723
3724	/* Attach the PHY so that the PHY is present when we do the major
3725	* configuration step.
3726	*/
3727	ret = phylink_attach_phy(pl, phy, interface: config.interface);
3728	if (ret < 0)
3729	return ret;
3730
3731	/* This will validate the configuration for us. */
3732	ret = phylink_bringup_phy(pl, phy, interface: config.interface);
3733	if (ret < 0) {
3734	phy_detach(phydev: phy);
3735	return ret;
3736	}
3737
3738	pl->link_port = pl->sfp_port;
3739
3740	phylink_sfp_set_config(pl, supported: support, state: &config, changed: true);
3741
3742	return 0;
3743	}
3744
3745	static int phylink_sfp_config_optical(struct phylink *pl)
3746	{
3747	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3748	struct phylink_link_state config;
3749	enum inband_type inband_type;
3750	phy_interface_t interface;
3751	int ret;
3752
3753	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3754	(int)PHY_INTERFACE_MODE_MAX,
3755	pl->config->supported_interfaces,
3756	(int)PHY_INTERFACE_MODE_MAX,
3757	pl->sfp_interfaces);
3758
3759	/* Find the union of the supported interfaces by the PCS/MAC and
3760	* the SFP module.
3761	*/
3762	phy_interface_and(dst: pl->sfp_interfaces, a: pl->config->supported_interfaces,
3763	b: pl->sfp_interfaces);
3764	if (phy_interface_empty(intf: pl->sfp_interfaces)) {
3765	phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3766	return -EINVAL;
3767	}
3768
3769	memset(&config, 0, sizeof(config));
3770	linkmode_copy(dst: support, src: pl->sfp_support);
3771	linkmode_copy(dst: config.advertising, src: pl->sfp_support);
3772	config.speed = SPEED_UNKNOWN;
3773	config.duplex = DUPLEX_UNKNOWN;
3774	config.pause = MLO_PAUSE_AN;
3775
3776	/* For all the interfaces that are supported, reduce the sfp_support
3777	* mask to only those link modes that can be supported.
3778	*/
3779	ret = phylink_validate_mask(pl, NULL, supported: pl->sfp_support, state: &config,
3780	interfaces: pl->sfp_interfaces);
3781	if (ret) {
3782	phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3783	__ETHTOOL_LINK_MODE_MASK_NBITS, support);
3784	return ret;
3785	}
3786
3787	interface = phylink_choose_sfp_interface(pl, intf: pl->sfp_interfaces);
3788	if (interface == PHY_INTERFACE_MODE_NA) {
3789	phylink_err(pl, "failed to select SFP interface\n");
3790	return -EINVAL;
3791	}
3792
3793	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3794	phy_modes(interface));
3795
3796	inband_type = phylink_get_inband_type(interface);
3797	if (inband_type == INBAND_NONE) {
3798	/* If this is the sole interface, and there is no inband
3799	* support, clear the advertising mask and Autoneg bit in
3800	* the support mask. Otherwise, just clear the Autoneg bit
3801	* in the advertising mask.
3802	*/
3803	if (phy_interface_weight(intf: pl->sfp_interfaces) == 1) {
3804	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3805	pl->sfp_support);
3806	linkmode_zero(dst: config.advertising);
3807	} else {
3808	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3809	config.advertising);
3810	}
3811	}
3812
3813	if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3814	adv: config.advertising)) {
3815	phylink_err(pl, "autoneg setting not compatible with PCS");
3816	return -EINVAL;
3817	}
3818
3819	config.interface = interface;
3820
3821	/* Ignore errors if we're expecting a PHY to attach later */
3822	ret = phylink_validate(pl, supported: support, state: &config);
3823	if (ret) {
3824	phylink_err(pl, "validation with support %*pb failed: %pe\n",
3825	__ETHTOOL_LINK_MODE_MASK_NBITS, support,
3826	ERR_PTR(ret));
3827	return ret;
3828	}
3829
3830	pl->link_port = pl->sfp_port;
3831
3832	phylink_sfp_set_config(pl, supported: pl->sfp_support, state: &config, changed: false);
3833
3834	return 0;
3835	}
3836
3837	static int phylink_sfp_module_insert(void *upstream,
3838	const struct sfp_eeprom_id *id)
3839	{
3840	const struct sfp_module_caps *caps;
3841	struct phylink *pl = upstream;
3842
3843	ASSERT_RTNL();
3844
3845	caps = sfp_get_module_caps(bus: pl->sfp_bus);
3846	phy_interface_copy(d: pl->sfp_interfaces, s: caps->interfaces);
3847	linkmode_copy(dst: pl->sfp_support, src: caps->link_modes);
3848	pl->sfp_may_have_phy = caps->may_have_phy;
3849	pl->sfp_port = caps->port;
3850
3851	/* If this module may have a PHY connecting later, defer until later */
3852	if (pl->sfp_may_have_phy)
3853	return 0;
3854
3855	return phylink_sfp_config_optical(pl);
3856	}
3857
3858	static void phylink_sfp_module_remove(void *upstream)
3859	{
3860	struct phylink *pl = upstream;
3861
3862	phy_interface_zero(intf: pl->sfp_interfaces);
3863	}
3864
3865	static int phylink_sfp_module_start(void *upstream)
3866	{
3867	struct phylink *pl = upstream;
3868
3869	/* If this SFP module has a PHY, start the PHY now. */
3870	if (pl->phydev) {
3871	phy_start(phydev: pl->phydev);
3872	return 0;
3873	}
3874
3875	/* If the module may have a PHY but we didn't detect one we
3876	* need to configure the MAC here.
3877	*/
3878	if (!pl->sfp_may_have_phy)
3879	return 0;
3880
3881	return phylink_sfp_config_optical(pl);
3882	}
3883
3884	static void phylink_sfp_module_stop(void *upstream)
3885	{
3886	struct phylink *pl = upstream;
3887
3888	/* If this SFP module has a PHY, stop it. */
3889	if (pl->phydev)
3890	phy_stop(phydev: pl->phydev);
3891	}
3892
3893	static void phylink_sfp_link_down(void *upstream)
3894	{
3895	struct phylink *pl = upstream;
3896
3897	ASSERT_RTNL();
3898
3899	phylink_run_resolve_and_disable(pl, bit: PHYLINK_DISABLE_LINK);
3900	}
3901
3902	static void phylink_sfp_link_up(void *upstream)
3903	{
3904	struct phylink *pl = upstream;
3905
3906	ASSERT_RTNL();
3907
3908	phylink_enable_and_run_resolve(pl, bit: PHYLINK_DISABLE_LINK);
3909	}
3910
3911	static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3912	{
3913	struct phylink *pl = upstream;
3914
3915	if (!phy->drv) {
3916	phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3917	phydev_name(phy), (unsigned long)phy->phy_id);
3918	phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3919	return -EINVAL;
3920	}
3921
3922	/*
3923	* This is the new way of dealing with flow control for PHYs,
3924	* as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3925	* phy drivers should not set SUPPORTED_[Asym_]Pause") except
3926	* using our validate call to the MAC, we rely upon the MAC
3927	* clearing the bits from both supported and advertising fields.
3928	*/
3929	phy_support_asym_pause(phydev: phy);
3930
3931	/* Set the PHY's host supported interfaces */
3932	phy_interface_and(dst: phy->host_interfaces, a: phylink_sfp_interfaces,
3933	b: pl->config->supported_interfaces);
3934
3935	/* Do the initial configuration */
3936	return phylink_sfp_config_phy(pl, phy);
3937	}
3938
3939	static void phylink_sfp_disconnect_phy(void *upstream,
3940	struct phy_device *phydev)
3941	{
3942	phylink_disconnect_phy(upstream);
3943	}
3944
3945	static const struct sfp_upstream_ops sfp_phylink_ops = {
3946	.attach = phylink_sfp_attach,
3947	.detach = phylink_sfp_detach,
3948	.module_insert = phylink_sfp_module_insert,
3949	.module_remove = phylink_sfp_module_remove,
3950	.module_start = phylink_sfp_module_start,
3951	.module_stop = phylink_sfp_module_stop,
3952	.link_up = phylink_sfp_link_up,
3953	.link_down = phylink_sfp_link_down,
3954	.connect_phy = phylink_sfp_connect_phy,
3955	.disconnect_phy = phylink_sfp_disconnect_phy,
3956	};
3957
3958	/* Helpers for MAC drivers */
3959
3960	static struct {
3961	int bit;
3962	int speed;
3963	} phylink_c73_priority_resolution[] = {
3964	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3965	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3966	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3967	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3968	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3969	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3970	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3971	/* 5GBASE-KR not supported */
3972	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3973	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3974	};
3975
3976	void phylink_resolve_c73(struct phylink_link_state *state)
3977	{
3978	int i;
3979
3980	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3981	int bit = phylink_c73_priority_resolution[i].bit;
3982	if (linkmode_test_bit(bit, state->advertising) &&
3983	linkmode_test_bit(bit, state->lp_advertising))
3984	break;
3985	}
3986
3987	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3988	state->speed = phylink_c73_priority_resolution[i].speed;
3989	state->duplex = DUPLEX_FULL;
3990	} else {
3991	/* negotiation failure */
3992	state->link = false;
3993	}
3994
3995	phylink_resolve_an_pause(state);
3996	}
3997	EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3998
3999	static void phylink_decode_c37_word(struct phylink_link_state *state,
4000	uint16_t config_reg, int speed)
4001	{
4002	int fd_bit;
4003
4004	if (speed == SPEED_2500)
4005	fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
4006	else
4007	fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
4008
4009	mii_lpa_mod_linkmode_x(linkmodes: state->lp_advertising, lpa: config_reg, fd_bit);
4010
4011	if (linkmode_test_bit(fd_bit, state->advertising) &&
4012	linkmode_test_bit(fd_bit, state->lp_advertising)) {
4013	state->speed = speed;
4014	state->duplex = DUPLEX_FULL;
4015	} else {
4016	/* negotiation failure */
4017	state->link = false;
4018	}
4019
4020	phylink_resolve_an_pause(state);
4021	}
4022
4023	static void phylink_decode_sgmii_word(struct phylink_link_state *state,
4024	uint16_t config_reg)
4025	{
4026	if (!(config_reg & LPA_SGMII_LINK)) {
4027	state->link = false;
4028	return;
4029	}
4030
4031	switch (config_reg & LPA_SGMII_SPD_MASK) {
4032	case LPA_SGMII_10:
4033	state->speed = SPEED_10;
4034	break;
4035	case LPA_SGMII_100:
4036	state->speed = SPEED_100;
4037	break;
4038	case LPA_SGMII_1000:
4039	state->speed = SPEED_1000;
4040	break;
4041	default:
4042	state->link = false;
4043	return;
4044	}
4045	if (config_reg & LPA_SGMII_FULL_DUPLEX)
4046	state->duplex = DUPLEX_FULL;
4047	else
4048	state->duplex = DUPLEX_HALF;
4049	}
4050
4051	/**
4052	* phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
4053	* @state: a pointer to a struct phylink_link_state.
4054	* @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
4055	*
4056	* Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
4057	* code word. Decode the USXGMII code word and populate the corresponding fields
4058	* (speed, duplex) into the phylink_link_state structure.
4059	*/
4060	void phylink_decode_usxgmii_word(struct phylink_link_state *state,
4061	uint16_t lpa)
4062	{
4063	switch (lpa & MDIO_USXGMII_SPD_MASK) {
4064	case MDIO_USXGMII_10:
4065	state->speed = SPEED_10;
4066	break;
4067	case MDIO_USXGMII_100:
4068	state->speed = SPEED_100;
4069	break;
4070	case MDIO_USXGMII_1000:
4071	state->speed = SPEED_1000;
4072	break;
4073	case MDIO_USXGMII_2500:
4074	state->speed = SPEED_2500;
4075	break;
4076	case MDIO_USXGMII_5000:
4077	state->speed = SPEED_5000;
4078	break;
4079	case MDIO_USXGMII_10G:
4080	state->speed = SPEED_10000;
4081	break;
4082	default:
4083	state->link = false;
4084	return;
4085	}
4086
4087	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
4088	state->duplex = DUPLEX_FULL;
4089	else
4090	state->duplex = DUPLEX_HALF;
4091	}
4092	EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
4093
4094	/**
4095	* phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
4096	* @state: a pointer to a struct phylink_link_state.
4097	* @lpa: a 16 bit value which stores the USGMII auto-negotiation word
4098	*
4099	* Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
4100	* code word. Decode the USGMII code word and populate the corresponding fields
4101	* (speed, duplex) into the phylink_link_state structure. The structure for this
4102	* word is the same as the USXGMII word, except it only supports speeds up to
4103	* 1Gbps.
4104	*/
4105	static void phylink_decode_usgmii_word(struct phylink_link_state *state,
4106	uint16_t lpa)
4107	{
4108	switch (lpa & MDIO_USXGMII_SPD_MASK) {
4109	case MDIO_USXGMII_10:
4110	state->speed = SPEED_10;
4111	break;
4112	case MDIO_USXGMII_100:
4113	state->speed = SPEED_100;
4114	break;
4115	case MDIO_USXGMII_1000:
4116	state->speed = SPEED_1000;
4117	break;
4118	default:
4119	state->link = false;
4120	return;
4121	}
4122
4123	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
4124	state->duplex = DUPLEX_FULL;
4125	else
4126	state->duplex = DUPLEX_HALF;
4127	}
4128
4129	/**
4130	* phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
4131	* @state: a pointer to a &struct phylink_link_state.
4132	* @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4133	* @bmsr: The value of the %MII_BMSR register
4134	* @lpa: The value of the %MII_LPA register
4135	*
4136	* Helper for MAC PCS supporting the 802.3 clause 22 register set for
4137	* clause 37 negotiation and/or SGMII control.
4138	*
4139	* Parse the Clause 37 or Cisco SGMII link partner negotiation word into
4140	* the phylink @state structure. This is suitable to be used for implementing
4141	* the pcs_get_state() member of the struct phylink_pcs_ops structure if
4142	* accessing @bmsr and @lpa cannot be done with MDIO directly.
4143	*/
4144	void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
4145	unsigned int neg_mode, u16 bmsr, u16 lpa)
4146	{
4147	state->link = !!(bmsr & BMSR_LSTATUS);
4148	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
4149
4150	/* If the link is down, the advertisement data is undefined. */
4151	if (!state->link)
4152	return;
4153
4154	switch (state->interface) {
4155	case PHY_INTERFACE_MODE_1000BASEX:
4156	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4157	phylink_decode_c37_word(state, config_reg: lpa, SPEED_1000);
4158	} else {
4159	state->speed = SPEED_1000;
4160	state->duplex = DUPLEX_FULL;
4161	state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4162	}
4163	break;
4164
4165	case PHY_INTERFACE_MODE_2500BASEX:
4166	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4167	phylink_decode_c37_word(state, config_reg: lpa, SPEED_2500);
4168	} else {
4169	state->speed = SPEED_2500;
4170	state->duplex = DUPLEX_FULL;
4171	state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4172	}
4173	break;
4174
4175	case PHY_INTERFACE_MODE_SGMII:
4176	case PHY_INTERFACE_MODE_QSGMII:
4177	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4178	phylink_decode_sgmii_word(state, config_reg: lpa);
4179	break;
4180
4181	case PHY_INTERFACE_MODE_QUSGMII:
4182	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4183	phylink_decode_usgmii_word(state, lpa);
4184	break;
4185
4186	default:
4187	state->link = false;
4188	break;
4189	}
4190	}
4191	EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
4192
4193	/**
4194	* phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4195	* @pcs: a pointer to a &struct mdio_device.
4196	* @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4197	* @state: a pointer to a &struct phylink_link_state.
4198	*
4199	* Helper for MAC PCS supporting the 802.3 clause 22 register set for
4200	* clause 37 negotiation and/or SGMII control.
4201	*
4202	* Read the MAC PCS state from the MII device configured in @config and
4203	* parse the Clause 37 or Cisco SGMII link partner negotiation word into
4204	* the phylink @state structure. This is suitable to be directly plugged
4205	* into the pcs_get_state() member of the struct phylink_pcs_ops
4206	* structure.
4207	*/
4208	void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4209	unsigned int neg_mode,
4210	struct phylink_link_state *state)
4211	{
4212	int bmsr, lpa;
4213
4214	bmsr = mdiodev_read(mdiodev: pcs, MII_BMSR);
4215	lpa = mdiodev_read(mdiodev: pcs, MII_LPA);
4216	if (bmsr < 0 || lpa < 0) {
4217	state->link = false;
4218	return;
4219	}
4220
4221	phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4222	}
4223	EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4224
4225	/**
4226	* phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4227	* advertisement
4228	* @interface: the PHY interface mode being configured
4229	* @advertising: the ethtool advertisement mask
4230	*
4231	* Helper for MAC PCS supporting the 802.3 clause 22 register set for
4232	* clause 37 negotiation and/or SGMII control.
4233	*
4234	* Encode the clause 37 PCS advertisement as specified by @interface and
4235	* @advertising.
4236	*
4237	* Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4238	*/
4239	int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4240	const unsigned long *advertising)
4241	{
4242	u16 adv;
4243
4244	switch (interface) {
4245	case PHY_INTERFACE_MODE_1000BASEX:
4246	case PHY_INTERFACE_MODE_2500BASEX:
4247	adv = ADVERTISE_1000XFULL;
4248	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4249	advertising))
4250	adv |= ADVERTISE_1000XPAUSE;
4251	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4252	advertising))
4253	adv |= ADVERTISE_1000XPSE_ASYM;
4254	return adv;
4255	case PHY_INTERFACE_MODE_SGMII:
4256	case PHY_INTERFACE_MODE_QSGMII:
4257	return 0x0001;
4258	default:
4259	/* Nothing to do for other modes */
4260	return -EINVAL;
4261	}
4262	}
4263	EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4264
4265	/**
4266	* phylink_mii_c22_pcs_config() - configure clause 22 PCS
4267	* @pcs: a pointer to a &struct mdio_device.
4268	* @interface: the PHY interface mode being configured
4269	* @advertising: the ethtool advertisement mask
4270	* @neg_mode: PCS negotiation mode
4271	*
4272	* Configure a Clause 22 PCS PHY with the appropriate negotiation
4273	* parameters for the @mode, @interface and @advertising parameters.
4274	* Returns negative error number on failure, zero if the advertisement
4275	* has not changed, or positive if there is a change.
4276	*/
4277	int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4278	phy_interface_t interface,
4279	const unsigned long *advertising,
4280	unsigned int neg_mode)
4281	{
4282	bool changed = 0;
4283	u16 bmcr;
4284	int ret, adv;
4285
4286	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4287	if (adv >= 0) {
4288	ret = mdiobus_modify_changed(bus: pcs->bus, addr: pcs->addr,
4289	MII_ADVERTISE, mask: 0xffff, set: adv);
4290	if (ret < 0)
4291	return ret;
4292	changed = ret;
4293	}
4294
4295	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4296	bmcr = BMCR_ANENABLE;
4297	else
4298	bmcr = 0;
4299
4300	/* Configure the inband state. Ensure ISOLATE bit is disabled */
4301	ret = mdiodev_modify(mdiodev: pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, set: bmcr);
4302	if (ret < 0)
4303	return ret;
4304
4305	return changed;
4306	}
4307	EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4308
4309	/**
4310	* phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4311	* @pcs: a pointer to a &struct mdio_device.
4312	*
4313	* Helper for MAC PCS supporting the 802.3 clause 22 register set for
4314	* clause 37 negotiation.
4315	*
4316	* Restart the clause 37 negotiation with the link partner. This is
4317	* suitable to be directly plugged into the pcs_get_state() member
4318	* of the struct phylink_pcs_ops structure.
4319	*/
4320	void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4321	{
4322	int val = mdiodev_read(mdiodev: pcs, MII_BMCR);
4323
4324	if (val >= 0) {
4325	val |= BMCR_ANRESTART;
4326
4327	mdiodev_write(mdiodev: pcs, MII_BMCR, val);
4328	}
4329	}
4330	EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4331
4332	void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4333	struct phylink_link_state *state)
4334	{
4335	struct mii_bus *bus = pcs->bus;
4336	int addr = pcs->addr;
4337	int stat;
4338
4339	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4340	if (stat < 0) {
4341	state->link = false;
4342	return;
4343	}
4344
4345	state->link = !!(stat & MDIO_STAT1_LSTATUS);
4346	if (!state->link)
4347	return;
4348
4349	switch (state->interface) {
4350	case PHY_INTERFACE_MODE_10GBASER:
4351	state->speed = SPEED_10000;
4352	state->duplex = DUPLEX_FULL;
4353	break;
4354
4355	default:
4356	break;
4357	}
4358	}
4359	EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4360
4361	static int __init phylink_init(void)
4362	{
4363	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4364	__set_bit(phylink_sfp_interface_preference[i],
4365	phylink_sfp_interfaces);
4366
4367	return 0;
4368	}
4369
4370	module_init(phylink_init);
4371
4372	MODULE_LICENSE("GPL v2");
4373	MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
4374