1 | //===- InputSection.cpp ---------------------------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #include "InputSection.h" |
10 | #include "Config.h" |
11 | #include "InputFiles.h" |
12 | #include "OutputSections.h" |
13 | #include "Relocations.h" |
14 | #include "SymbolTable.h" |
15 | #include "Symbols.h" |
16 | #include "SyntheticSections.h" |
17 | #include "Target.h" |
18 | #include "lld/Common/CommonLinkerContext.h" |
19 | #include "llvm/Support/Compiler.h" |
20 | #include "llvm/Support/Compression.h" |
21 | #include "llvm/Support/Endian.h" |
22 | #include "llvm/Support/xxhash.h" |
23 | #include <algorithm> |
24 | #include <mutex> |
25 | #include <optional> |
26 | #include <vector> |
27 | |
28 | using namespace llvm; |
29 | using namespace llvm::ELF; |
30 | using namespace llvm::object; |
31 | using namespace llvm::support; |
32 | using namespace llvm::support::endian; |
33 | using namespace llvm::sys; |
34 | using namespace lld; |
35 | using namespace lld::elf; |
36 | |
37 | DenseSet<std::pair<const Symbol *, uint64_t>> elf::ppc64noTocRelax; |
38 | |
39 | // Returns a string to construct an error message. |
40 | std::string lld::toString(const InputSectionBase *sec) { |
41 | return (toString(f: sec->file) + ":(" + sec->name + ")" ).str(); |
42 | } |
43 | |
44 | template <class ELFT> |
45 | static ArrayRef<uint8_t> getSectionContents(ObjFile<ELFT> &file, |
46 | const typename ELFT::Shdr &hdr) { |
47 | if (hdr.sh_type == SHT_NOBITS) |
48 | return ArrayRef<uint8_t>(nullptr, hdr.sh_size); |
49 | return check(file.getObj().getSectionContents(hdr)); |
50 | } |
51 | |
52 | InputSectionBase::InputSectionBase(InputFile *file, uint64_t flags, |
53 | uint32_t type, uint64_t entsize, |
54 | uint32_t link, uint32_t info, |
55 | uint32_t addralign, ArrayRef<uint8_t> data, |
56 | StringRef name, Kind sectionKind) |
57 | : SectionBase(sectionKind, name, flags, entsize, addralign, type, info, |
58 | link), |
59 | file(file), content_(data.data()), size(data.size()) { |
60 | // In order to reduce memory allocation, we assume that mergeable |
61 | // sections are smaller than 4 GiB, which is not an unreasonable |
62 | // assumption as of 2017. |
63 | if (sectionKind == SectionBase::Merge && content().size() > UINT32_MAX) |
64 | error(msg: toString(sec: this) + ": section too large" ); |
65 | |
66 | // The ELF spec states that a value of 0 means the section has |
67 | // no alignment constraints. |
68 | uint32_t v = std::max<uint32_t>(a: addralign, b: 1); |
69 | if (!isPowerOf2_64(Value: v)) |
70 | fatal(msg: toString(sec: this) + ": sh_addralign is not a power of 2" ); |
71 | this->addralign = v; |
72 | |
73 | // If SHF_COMPRESSED is set, parse the header. The legacy .zdebug format is no |
74 | // longer supported. |
75 | if (flags & SHF_COMPRESSED) |
76 | invokeELFT(parseCompressedHeader,); |
77 | } |
78 | |
79 | // Drop SHF_GROUP bit unless we are producing a re-linkable object file. |
80 | // SHF_GROUP is a marker that a section belongs to some comdat group. |
81 | // That flag doesn't make sense in an executable. |
82 | static uint64_t getFlags(uint64_t flags) { |
83 | flags &= ~(uint64_t)SHF_INFO_LINK; |
84 | if (!config->relocatable) |
85 | flags &= ~(uint64_t)SHF_GROUP; |
86 | return flags; |
87 | } |
88 | |
89 | template <class ELFT> |
90 | InputSectionBase::InputSectionBase(ObjFile<ELFT> &file, |
91 | const typename ELFT::Shdr &hdr, |
92 | StringRef name, Kind sectionKind) |
93 | : InputSectionBase(&file, getFlags(hdr.sh_flags), hdr.sh_type, |
94 | hdr.sh_entsize, hdr.sh_link, hdr.sh_info, |
95 | hdr.sh_addralign, getSectionContents(file, hdr), name, |
96 | sectionKind) { |
97 | // We reject object files having insanely large alignments even though |
98 | // they are allowed by the spec. I think 4GB is a reasonable limitation. |
99 | // We might want to relax this in the future. |
100 | if (hdr.sh_addralign > UINT32_MAX) |
101 | fatal(toString(&file) + ": section sh_addralign is too large" ); |
102 | } |
103 | |
104 | size_t InputSectionBase::getSize() const { |
105 | if (auto *s = dyn_cast<SyntheticSection>(Val: this)) |
106 | return s->getSize(); |
107 | return size - bytesDropped; |
108 | } |
109 | |
110 | template <class ELFT> |
111 | static void decompressAux(const InputSectionBase &sec, uint8_t *out, |
112 | size_t size) { |
113 | auto *hdr = reinterpret_cast<const typename ELFT::Chdr *>(sec.content_); |
114 | auto compressed = ArrayRef<uint8_t>(sec.content_, sec.compressedSize) |
115 | .slice(N: sizeof(typename ELFT::Chdr)); |
116 | if (Error e = hdr->ch_type == ELFCOMPRESS_ZLIB |
117 | ? compression::zlib::decompress(Input: compressed, Output: out, UncompressedSize&: size) |
118 | : compression::zstd::decompress(Input: compressed, Output: out, UncompressedSize&: size)) |
119 | fatal(msg: toString(sec: &sec) + |
120 | ": decompress failed: " + llvm::toString(E: std::move(e))); |
121 | } |
122 | |
123 | void InputSectionBase::decompress() const { |
124 | uint8_t *uncompressedBuf; |
125 | { |
126 | static std::mutex mu; |
127 | std::lock_guard<std::mutex> lock(mu); |
128 | uncompressedBuf = bAlloc().Allocate<uint8_t>(Num: size); |
129 | } |
130 | |
131 | invokeELFT(decompressAux, *this, uncompressedBuf, size); |
132 | content_ = uncompressedBuf; |
133 | compressed = false; |
134 | } |
135 | |
136 | template <class ELFT> RelsOrRelas<ELFT> InputSectionBase::relsOrRelas() const { |
137 | if (relSecIdx == 0) |
138 | return {}; |
139 | RelsOrRelas<ELFT> ret; |
140 | typename ELFT::Shdr shdr = |
141 | cast<ELFFileBase>(Val: file)->getELFShdrs<ELFT>()[relSecIdx]; |
142 | if (shdr.sh_type == SHT_REL) { |
143 | ret.rels = ArrayRef(reinterpret_cast<const typename ELFT::Rel *>( |
144 | file->mb.getBufferStart() + shdr.sh_offset), |
145 | shdr.sh_size / sizeof(typename ELFT::Rel)); |
146 | } else { |
147 | assert(shdr.sh_type == SHT_RELA); |
148 | ret.relas = ArrayRef(reinterpret_cast<const typename ELFT::Rela *>( |
149 | file->mb.getBufferStart() + shdr.sh_offset), |
150 | shdr.sh_size / sizeof(typename ELFT::Rela)); |
151 | } |
152 | return ret; |
153 | } |
154 | |
155 | uint64_t SectionBase::getOffset(uint64_t offset) const { |
156 | switch (kind()) { |
157 | case Output: { |
158 | auto *os = cast<OutputSection>(Val: this); |
159 | // For output sections we treat offset -1 as the end of the section. |
160 | return offset == uint64_t(-1) ? os->size : offset; |
161 | } |
162 | case Regular: |
163 | case Synthetic: |
164 | return cast<InputSection>(Val: this)->outSecOff + offset; |
165 | case EHFrame: { |
166 | // Two code paths may reach here. First, clang_rt.crtbegin.o and GCC |
167 | // crtbeginT.o may reference the start of an empty .eh_frame to identify the |
168 | // start of the output .eh_frame. Just return offset. |
169 | // |
170 | // Second, InputSection::copyRelocations on .eh_frame. Some pieces may be |
171 | // discarded due to GC/ICF. We should compute the output section offset. |
172 | const EhInputSection *es = cast<EhInputSection>(Val: this); |
173 | if (!es->content().empty()) |
174 | if (InputSection *isec = es->getParent()) |
175 | return isec->outSecOff + es->getParentOffset(offset); |
176 | return offset; |
177 | } |
178 | case Merge: |
179 | const MergeInputSection *ms = cast<MergeInputSection>(Val: this); |
180 | if (InputSection *isec = ms->getParent()) |
181 | return isec->outSecOff + ms->getParentOffset(offset); |
182 | return ms->getParentOffset(offset); |
183 | } |
184 | llvm_unreachable("invalid section kind" ); |
185 | } |
186 | |
187 | uint64_t SectionBase::getVA(uint64_t offset) const { |
188 | const OutputSection *out = getOutputSection(); |
189 | return (out ? out->addr : 0) + getOffset(offset); |
190 | } |
191 | |
192 | OutputSection *SectionBase::getOutputSection() { |
193 | InputSection *sec; |
194 | if (auto *isec = dyn_cast<InputSection>(Val: this)) |
195 | sec = isec; |
196 | else if (auto *ms = dyn_cast<MergeInputSection>(Val: this)) |
197 | sec = ms->getParent(); |
198 | else if (auto *eh = dyn_cast<EhInputSection>(Val: this)) |
199 | sec = eh->getParent(); |
200 | else |
201 | return cast<OutputSection>(Val: this); |
202 | return sec ? sec->getParent() : nullptr; |
203 | } |
204 | |
205 | // When a section is compressed, `rawData` consists with a header followed |
206 | // by zlib-compressed data. This function parses a header to initialize |
207 | // `uncompressedSize` member and remove the header from `rawData`. |
208 | template <typename ELFT> void InputSectionBase::() { |
209 | flags &= ~(uint64_t)SHF_COMPRESSED; |
210 | |
211 | // New-style header |
212 | if (content().size() < sizeof(typename ELFT::Chdr)) { |
213 | error(msg: toString(sec: this) + ": corrupted compressed section" ); |
214 | return; |
215 | } |
216 | |
217 | auto *hdr = reinterpret_cast<const typename ELFT::Chdr *>(content().data()); |
218 | if (hdr->ch_type == ELFCOMPRESS_ZLIB) { |
219 | if (!compression::zlib::isAvailable()) |
220 | error(msg: toString(sec: this) + " is compressed with ELFCOMPRESS_ZLIB, but lld is " |
221 | "not built with zlib support" ); |
222 | } else if (hdr->ch_type == ELFCOMPRESS_ZSTD) { |
223 | if (!compression::zstd::isAvailable()) |
224 | error(msg: toString(sec: this) + " is compressed with ELFCOMPRESS_ZSTD, but lld is " |
225 | "not built with zstd support" ); |
226 | } else { |
227 | error(msg: toString(sec: this) + ": unsupported compression type (" + |
228 | Twine(hdr->ch_type) + ")" ); |
229 | return; |
230 | } |
231 | |
232 | compressed = true; |
233 | compressedSize = size; |
234 | size = hdr->ch_size; |
235 | addralign = std::max<uint32_t>(hdr->ch_addralign, 1); |
236 | } |
237 | |
238 | InputSection *InputSectionBase::getLinkOrderDep() const { |
239 | assert(flags & SHF_LINK_ORDER); |
240 | if (!link) |
241 | return nullptr; |
242 | return cast<InputSection>(Val: file->getSections()[link]); |
243 | } |
244 | |
245 | // Find a symbol that encloses a given location. |
246 | Defined *InputSectionBase::getEnclosingSymbol(uint64_t offset, |
247 | uint8_t type) const { |
248 | if (file->isInternal()) |
249 | return nullptr; |
250 | for (Symbol *b : file->getSymbols()) |
251 | if (Defined *d = dyn_cast<Defined>(Val: b)) |
252 | if (d->section == this && d->value <= offset && |
253 | offset < d->value + d->size && (type == 0 || type == d->type)) |
254 | return d; |
255 | return nullptr; |
256 | } |
257 | |
258 | // Returns an object file location string. Used to construct an error message. |
259 | std::string InputSectionBase::getLocation(uint64_t offset) const { |
260 | std::string secAndOffset = |
261 | (name + "+0x" + Twine::utohexstr(Val: offset) + ")" ).str(); |
262 | |
263 | // We don't have file for synthetic sections. |
264 | if (file == nullptr) |
265 | return (config->outputFile + ":(" + secAndOffset).str(); |
266 | |
267 | std::string filename = toString(f: file); |
268 | if (Defined *d = getEnclosingFunction(offset)) |
269 | return filename + ":(function " + toString(*d) + ": " + secAndOffset; |
270 | |
271 | return filename + ":(" + secAndOffset; |
272 | } |
273 | |
274 | // This function is intended to be used for constructing an error message. |
275 | // The returned message looks like this: |
276 | // |
277 | // foo.c:42 (/home/alice/possibly/very/long/path/foo.c:42) |
278 | // |
279 | // Returns an empty string if there's no way to get line info. |
280 | std::string InputSectionBase::getSrcMsg(const Symbol &sym, |
281 | uint64_t offset) const { |
282 | return file->getSrcMsg(sym, sec: *this, offset); |
283 | } |
284 | |
285 | // Returns a filename string along with an optional section name. This |
286 | // function is intended to be used for constructing an error |
287 | // message. The returned message looks like this: |
288 | // |
289 | // path/to/foo.o:(function bar) |
290 | // |
291 | // or |
292 | // |
293 | // path/to/foo.o:(function bar) in archive path/to/bar.a |
294 | std::string InputSectionBase::getObjMsg(uint64_t off) const { |
295 | std::string filename = std::string(file->getName()); |
296 | |
297 | std::string archive; |
298 | if (!file->archiveName.empty()) |
299 | archive = (" in archive " + file->archiveName).str(); |
300 | |
301 | // Find a symbol that encloses a given location. getObjMsg may be called |
302 | // before ObjFile::initSectionsAndLocalSyms where local symbols are |
303 | // initialized. |
304 | if (Defined *d = getEnclosingSymbol(offset: off)) |
305 | return filename + ":(" + toString(*d) + ")" + archive; |
306 | |
307 | // If there's no symbol, print out the offset in the section. |
308 | return (filename + ":(" + name + "+0x" + utohexstr(X: off) + ")" + archive) |
309 | .str(); |
310 | } |
311 | |
312 | InputSection InputSection::discarded(nullptr, 0, 0, 0, ArrayRef<uint8_t>(), "" ); |
313 | |
314 | InputSection::InputSection(InputFile *f, uint64_t flags, uint32_t type, |
315 | uint32_t addralign, ArrayRef<uint8_t> data, |
316 | StringRef name, Kind k) |
317 | : InputSectionBase(f, flags, type, |
318 | /*Entsize*/ 0, /*Link*/ 0, /*Info*/ 0, addralign, data, |
319 | name, k) { |
320 | assert(f || this == &InputSection::discarded); |
321 | } |
322 | |
323 | template <class ELFT> |
324 | InputSection::InputSection(ObjFile<ELFT> &f, const typename ELFT::Shdr &, |
325 | StringRef name) |
326 | : InputSectionBase(f, header, name, InputSectionBase::Regular) {} |
327 | |
328 | // Copy SHT_GROUP section contents. Used only for the -r option. |
329 | template <class ELFT> void InputSection::copyShtGroup(uint8_t *buf) { |
330 | // ELFT::Word is the 32-bit integral type in the target endianness. |
331 | using u32 = typename ELFT::Word; |
332 | ArrayRef<u32> from = getDataAs<u32>(); |
333 | auto *to = reinterpret_cast<u32 *>(buf); |
334 | |
335 | // The first entry is not a section number but a flag. |
336 | *to++ = from[0]; |
337 | |
338 | // Adjust section numbers because section numbers in an input object files are |
339 | // different in the output. We also need to handle combined or discarded |
340 | // members. |
341 | ArrayRef<InputSectionBase *> sections = file->getSections(); |
342 | DenseSet<uint32_t> seen; |
343 | for (uint32_t idx : from.slice(1)) { |
344 | OutputSection *osec = sections[idx]->getOutputSection(); |
345 | if (osec && seen.insert(V: osec->sectionIndex).second) |
346 | *to++ = osec->sectionIndex; |
347 | } |
348 | } |
349 | |
350 | InputSectionBase *InputSection::getRelocatedSection() const { |
351 | if (file->isInternal() || !isStaticRelSecType(type)) |
352 | return nullptr; |
353 | ArrayRef<InputSectionBase *> sections = file->getSections(); |
354 | return sections[info]; |
355 | } |
356 | |
357 | template <class ELFT, class RelTy> |
358 | void InputSection::copyRelocations(uint8_t *buf) { |
359 | if (config->relax && !config->relocatable && |
360 | (config->emachine == EM_RISCV || config->emachine == EM_LOONGARCH)) { |
361 | // On LoongArch and RISC-V, relaxation might change relocations: copy |
362 | // from internal ones that are updated by relaxation. |
363 | InputSectionBase *sec = getRelocatedSection(); |
364 | copyRelocations<ELFT, RelTy>(buf, llvm::make_range(x: sec->relocations.begin(), |
365 | y: sec->relocations.end())); |
366 | } else { |
367 | // Convert the raw relocations in the input section into Relocation objects |
368 | // suitable to be used by copyRelocations below. |
369 | struct MapRel { |
370 | const ObjFile<ELFT> &file; |
371 | Relocation operator()(const RelTy &rel) const { |
372 | // RelExpr is not used so set to a dummy value. |
373 | return Relocation{R_NONE, rel.getType(config->isMips64EL), rel.r_offset, |
374 | getAddend<ELFT>(rel), &file.getRelocTargetSym(rel)}; |
375 | } |
376 | }; |
377 | |
378 | using RawRels = ArrayRef<RelTy>; |
379 | using MapRelIter = |
380 | llvm::mapped_iterator<typename RawRels::iterator, MapRel>; |
381 | auto mapRel = MapRel{*getFile<ELFT>()}; |
382 | RawRels rawRels = getDataAs<RelTy>(); |
383 | auto rels = llvm::make_range(MapRelIter(rawRels.begin(), mapRel), |
384 | MapRelIter(rawRels.end(), mapRel)); |
385 | copyRelocations<ELFT, RelTy>(buf, rels); |
386 | } |
387 | } |
388 | |
389 | // This is used for -r and --emit-relocs. We can't use memcpy to copy |
390 | // relocations because we need to update symbol table offset and section index |
391 | // for each relocation. So we copy relocations one by one. |
392 | template <class ELFT, class RelTy, class RelIt> |
393 | void InputSection::copyRelocations(uint8_t *buf, |
394 | llvm::iterator_range<RelIt> rels) { |
395 | const TargetInfo &target = *elf::target; |
396 | InputSectionBase *sec = getRelocatedSection(); |
397 | (void)sec->contentMaybeDecompress(); // uncompress if needed |
398 | |
399 | for (const Relocation &rel : rels) { |
400 | RelType type = rel.type; |
401 | const ObjFile<ELFT> *file = getFile<ELFT>(); |
402 | Symbol &sym = *rel.sym; |
403 | |
404 | auto *p = reinterpret_cast<typename ELFT::Rela *>(buf); |
405 | buf += sizeof(RelTy); |
406 | |
407 | if (RelTy::IsRela) |
408 | p->r_addend = rel.addend; |
409 | |
410 | // Output section VA is zero for -r, so r_offset is an offset within the |
411 | // section, but for --emit-relocs it is a virtual address. |
412 | p->r_offset = sec->getVA(offset: rel.offset); |
413 | p->setSymbolAndType(in.symTab->getSymbolIndex(sym), type, |
414 | config->isMips64EL); |
415 | |
416 | if (sym.type == STT_SECTION) { |
417 | // We combine multiple section symbols into only one per |
418 | // section. This means we have to update the addend. That is |
419 | // trivial for Elf_Rela, but for Elf_Rel we have to write to the |
420 | // section data. We do that by adding to the Relocation vector. |
421 | |
422 | // .eh_frame is horribly special and can reference discarded sections. To |
423 | // avoid having to parse and recreate .eh_frame, we just replace any |
424 | // relocation in it pointing to discarded sections with R_*_NONE, which |
425 | // hopefully creates a frame that is ignored at runtime. Also, don't warn |
426 | // on .gcc_except_table and debug sections. |
427 | // |
428 | // See the comment in maybeReportUndefined for PPC32 .got2 and PPC64 .toc |
429 | auto *d = dyn_cast<Defined>(Val: &sym); |
430 | if (!d) { |
431 | if (!isDebugSection(sec: *sec) && sec->name != ".eh_frame" && |
432 | sec->name != ".gcc_except_table" && sec->name != ".got2" && |
433 | sec->name != ".toc" ) { |
434 | uint32_t secIdx = cast<Undefined>(Val&: sym).discardedSecIdx; |
435 | Elf_Shdr_Impl<ELFT> sec = file->template getELFShdrs<ELFT>()[secIdx]; |
436 | warn("relocation refers to a discarded section: " + |
437 | CHECK(file->getObj().getSectionName(sec), file) + |
438 | "\n>>> referenced by " + getObjMsg(off: p->r_offset)); |
439 | } |
440 | p->setSymbolAndType(0, 0, false); |
441 | continue; |
442 | } |
443 | SectionBase *section = d->section; |
444 | assert(section->isLive()); |
445 | |
446 | int64_t addend = rel.addend; |
447 | const uint8_t *bufLoc = sec->content().begin() + rel.offset; |
448 | if (!RelTy::IsRela) |
449 | addend = target.getImplicitAddend(buf: bufLoc, type); |
450 | |
451 | if (config->emachine == EM_MIPS && |
452 | target.getRelExpr(type, s: sym, loc: bufLoc) == R_MIPS_GOTREL) { |
453 | // Some MIPS relocations depend on "gp" value. By default, |
454 | // this value has 0x7ff0 offset from a .got section. But |
455 | // relocatable files produced by a compiler or a linker |
456 | // might redefine this default value and we must use it |
457 | // for a calculation of the relocation result. When we |
458 | // generate EXE or DSO it's trivial. Generating a relocatable |
459 | // output is more difficult case because the linker does |
460 | // not calculate relocations in this mode and loses |
461 | // individual "gp" values used by each input object file. |
462 | // As a workaround we add the "gp" value to the relocation |
463 | // addend and save it back to the file. |
464 | addend += sec->getFile<ELFT>()->mipsGp0; |
465 | } |
466 | |
467 | if (config->emachine == EM_LOONGARCH && type == R_LARCH_ALIGN) |
468 | // LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index. |
469 | // If it use the section symbol, the addend should not be changed. |
470 | p->r_addend = addend; |
471 | else if (RelTy::IsRela) |
472 | p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr; |
473 | // For SHF_ALLOC sections relocated by REL, append a relocation to |
474 | // sec->relocations so that relocateAlloc transitively called by |
475 | // writeSections will update the implicit addend. Non-SHF_ALLOC sections |
476 | // utilize relocateNonAlloc to process raw relocations and do not need |
477 | // this sec->relocations change. |
478 | else if (config->relocatable && (sec->flags & SHF_ALLOC) && |
479 | type != target.noneRel) |
480 | sec->addReloc(r: {.expr: R_ABS, .type: type, .offset: rel.offset, .addend: addend, .sym: &sym}); |
481 | } else if (config->emachine == EM_PPC && type == R_PPC_PLTREL24 && |
482 | p->r_addend >= 0x8000 && sec->file->ppc32Got2) { |
483 | // Similar to R_MIPS_GPREL{16,32}. If the addend of R_PPC_PLTREL24 |
484 | // indicates that r30 is relative to the input section .got2 |
485 | // (r_addend>=0x8000), after linking, r30 should be relative to the output |
486 | // section .got2 . To compensate for the shift, adjust r_addend by |
487 | // ppc32Got->outSecOff. |
488 | p->r_addend += sec->file->ppc32Got2->outSecOff; |
489 | } |
490 | } |
491 | } |
492 | |
493 | // The ARM and AArch64 ABI handle pc-relative relocations to undefined weak |
494 | // references specially. The general rule is that the value of the symbol in |
495 | // this context is the address of the place P. A further special case is that |
496 | // branch relocations to an undefined weak reference resolve to the next |
497 | // instruction. |
498 | static uint32_t getARMUndefinedRelativeWeakVA(RelType type, uint32_t a, |
499 | uint32_t p) { |
500 | switch (type) { |
501 | // Unresolved branch relocations to weak references resolve to next |
502 | // instruction, this will be either 2 or 4 bytes on from P. |
503 | case R_ARM_THM_JUMP8: |
504 | case R_ARM_THM_JUMP11: |
505 | return p + 2 + a; |
506 | case R_ARM_CALL: |
507 | case R_ARM_JUMP24: |
508 | case R_ARM_PC24: |
509 | case R_ARM_PLT32: |
510 | case R_ARM_PREL31: |
511 | case R_ARM_THM_JUMP19: |
512 | case R_ARM_THM_JUMP24: |
513 | return p + 4 + a; |
514 | case R_ARM_THM_CALL: |
515 | // We don't want an interworking BLX to ARM |
516 | return p + 5 + a; |
517 | // Unresolved non branch pc-relative relocations |
518 | // R_ARM_TARGET2 which can be resolved relatively is not present as it never |
519 | // targets a weak-reference. |
520 | case R_ARM_MOVW_PREL_NC: |
521 | case R_ARM_MOVT_PREL: |
522 | case R_ARM_REL32: |
523 | case R_ARM_THM_ALU_PREL_11_0: |
524 | case R_ARM_THM_MOVW_PREL_NC: |
525 | case R_ARM_THM_MOVT_PREL: |
526 | case R_ARM_THM_PC12: |
527 | return p + a; |
528 | // p + a is unrepresentable as negative immediates can't be encoded. |
529 | case R_ARM_THM_PC8: |
530 | return p; |
531 | } |
532 | llvm_unreachable("ARM pc-relative relocation expected\n" ); |
533 | } |
534 | |
535 | // The comment above getARMUndefinedRelativeWeakVA applies to this function. |
536 | static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t type, uint64_t p) { |
537 | switch (type) { |
538 | // Unresolved branch relocations to weak references resolve to next |
539 | // instruction, this is 4 bytes on from P. |
540 | case R_AARCH64_CALL26: |
541 | case R_AARCH64_CONDBR19: |
542 | case R_AARCH64_JUMP26: |
543 | case R_AARCH64_TSTBR14: |
544 | return p + 4; |
545 | // Unresolved non branch pc-relative relocations |
546 | case R_AARCH64_PREL16: |
547 | case R_AARCH64_PREL32: |
548 | case R_AARCH64_PREL64: |
549 | case R_AARCH64_ADR_PREL_LO21: |
550 | case R_AARCH64_LD_PREL_LO19: |
551 | case R_AARCH64_PLT32: |
552 | return p; |
553 | } |
554 | llvm_unreachable("AArch64 pc-relative relocation expected\n" ); |
555 | } |
556 | |
557 | static uint64_t getRISCVUndefinedRelativeWeakVA(uint64_t type, uint64_t p) { |
558 | switch (type) { |
559 | case R_RISCV_BRANCH: |
560 | case R_RISCV_JAL: |
561 | case R_RISCV_CALL: |
562 | case R_RISCV_CALL_PLT: |
563 | case R_RISCV_RVC_BRANCH: |
564 | case R_RISCV_RVC_JUMP: |
565 | case R_RISCV_PLT32: |
566 | return p; |
567 | default: |
568 | return 0; |
569 | } |
570 | } |
571 | |
572 | // ARM SBREL relocations are of the form S + A - B where B is the static base |
573 | // The ARM ABI defines base to be "addressing origin of the output segment |
574 | // defining the symbol S". We defined the "addressing origin"/static base to be |
575 | // the base of the PT_LOAD segment containing the Sym. |
576 | // The procedure call standard only defines a Read Write Position Independent |
577 | // RWPI variant so in practice we should expect the static base to be the base |
578 | // of the RW segment. |
579 | static uint64_t getARMStaticBase(const Symbol &sym) { |
580 | OutputSection *os = sym.getOutputSection(); |
581 | if (!os || !os->ptLoad || !os->ptLoad->firstSec) |
582 | fatal(msg: "SBREL relocation to " + sym.getName() + " without static base" ); |
583 | return os->ptLoad->firstSec->addr; |
584 | } |
585 | |
586 | // For R_RISCV_PC_INDIRECT (R_RISCV_PCREL_LO12_{I,S}), the symbol actually |
587 | // points the corresponding R_RISCV_PCREL_HI20 relocation, and the target VA |
588 | // is calculated using PCREL_HI20's symbol. |
589 | // |
590 | // This function returns the R_RISCV_PCREL_HI20 relocation from |
591 | // R_RISCV_PCREL_LO12's symbol and addend. |
592 | static Relocation *getRISCVPCRelHi20(const Symbol *sym, uint64_t addend) { |
593 | const Defined *d = cast<Defined>(Val: sym); |
594 | if (!d->section) { |
595 | errorOrWarn(msg: "R_RISCV_PCREL_LO12 relocation points to an absolute symbol: " + |
596 | sym->getName()); |
597 | return nullptr; |
598 | } |
599 | InputSection *isec = cast<InputSection>(Val: d->section); |
600 | |
601 | if (addend != 0) |
602 | warn(msg: "non-zero addend in R_RISCV_PCREL_LO12 relocation to " + |
603 | isec->getObjMsg(off: d->value) + " is ignored" ); |
604 | |
605 | // Relocations are sorted by offset, so we can use std::equal_range to do |
606 | // binary search. |
607 | Relocation r; |
608 | r.offset = d->value; |
609 | auto range = |
610 | std::equal_range(first: isec->relocs().begin(), last: isec->relocs().end(), val: r, |
611 | comp: [](const Relocation &lhs, const Relocation &rhs) { |
612 | return lhs.offset < rhs.offset; |
613 | }); |
614 | |
615 | for (auto it = range.first; it != range.second; ++it) |
616 | if (it->type == R_RISCV_PCREL_HI20 || it->type == R_RISCV_GOT_HI20 || |
617 | it->type == R_RISCV_TLS_GD_HI20 || it->type == R_RISCV_TLS_GOT_HI20) |
618 | return &*it; |
619 | |
620 | errorOrWarn(msg: "R_RISCV_PCREL_LO12 relocation points to " + |
621 | isec->getObjMsg(off: d->value) + |
622 | " without an associated R_RISCV_PCREL_HI20 relocation" ); |
623 | return nullptr; |
624 | } |
625 | |
626 | // A TLS symbol's virtual address is relative to the TLS segment. Add a |
627 | // target-specific adjustment to produce a thread-pointer-relative offset. |
628 | static int64_t getTlsTpOffset(const Symbol &s) { |
629 | // On targets that support TLSDESC, _TLS_MODULE_BASE_@tpoff = 0. |
630 | if (&s == ElfSym::tlsModuleBase) |
631 | return 0; |
632 | |
633 | // There are 2 TLS layouts. Among targets we support, x86 uses TLS Variant 2 |
634 | // while most others use Variant 1. At run time TP will be aligned to p_align. |
635 | |
636 | // Variant 1. TP will be followed by an optional gap (which is the size of 2 |
637 | // pointers on ARM/AArch64, 0 on other targets), followed by alignment |
638 | // padding, then the static TLS blocks. The alignment padding is added so that |
639 | // (TP + gap + padding) is congruent to p_vaddr modulo p_align. |
640 | // |
641 | // Variant 2. Static TLS blocks, followed by alignment padding are placed |
642 | // before TP. The alignment padding is added so that (TP - padding - |
643 | // p_memsz) is congruent to p_vaddr modulo p_align. |
644 | PhdrEntry *tls = Out::tlsPhdr; |
645 | switch (config->emachine) { |
646 | // Variant 1. |
647 | case EM_ARM: |
648 | case EM_AARCH64: |
649 | return s.getVA(addend: 0) + config->wordsize * 2 + |
650 | ((tls->p_vaddr - config->wordsize * 2) & (tls->p_align - 1)); |
651 | case EM_MIPS: |
652 | case EM_PPC: |
653 | case EM_PPC64: |
654 | // Adjusted Variant 1. TP is placed with a displacement of 0x7000, which is |
655 | // to allow a signed 16-bit offset to reach 0x1000 of TCB/thread-library |
656 | // data and 0xf000 of the program's TLS segment. |
657 | return s.getVA(addend: 0) + (tls->p_vaddr & (tls->p_align - 1)) - 0x7000; |
658 | case EM_LOONGARCH: |
659 | case EM_RISCV: |
660 | return s.getVA(addend: 0) + (tls->p_vaddr & (tls->p_align - 1)); |
661 | |
662 | // Variant 2. |
663 | case EM_HEXAGON: |
664 | case EM_S390: |
665 | case EM_SPARCV9: |
666 | case EM_386: |
667 | case EM_X86_64: |
668 | return s.getVA(addend: 0) - tls->p_memsz - |
669 | ((-tls->p_vaddr - tls->p_memsz) & (tls->p_align - 1)); |
670 | default: |
671 | llvm_unreachable("unhandled Config->EMachine" ); |
672 | } |
673 | } |
674 | |
675 | uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type, |
676 | int64_t a, uint64_t p, |
677 | const Symbol &sym, RelExpr expr) { |
678 | switch (expr) { |
679 | case R_ABS: |
680 | case R_DTPREL: |
681 | case R_RELAX_TLS_LD_TO_LE_ABS: |
682 | case R_RELAX_GOT_PC_NOPIC: |
683 | case R_AARCH64_AUTH: |
684 | case R_RISCV_ADD: |
685 | case R_RISCV_LEB128: |
686 | return sym.getVA(addend: a); |
687 | case R_ADDEND: |
688 | return a; |
689 | case R_RELAX_HINT: |
690 | return 0; |
691 | case R_ARM_SBREL: |
692 | return sym.getVA(addend: a) - getARMStaticBase(sym); |
693 | case R_GOT: |
694 | case R_RELAX_TLS_GD_TO_IE_ABS: |
695 | return sym.getGotVA() + a; |
696 | case R_LOONGARCH_GOT: |
697 | // The LoongArch TLS GD relocs reuse the R_LARCH_GOT_PC_LO12 reloc type |
698 | // for their page offsets. The arithmetics are different in the TLS case |
699 | // so we have to duplicate some logic here. |
700 | if (sym.hasFlag(bit: NEEDS_TLSGD) && type != R_LARCH_TLS_IE_PC_LO12) |
701 | // Like R_LOONGARCH_TLSGD_PAGE_PC but taking the absolute value. |
702 | return in.got->getGlobalDynAddr(b: sym) + a; |
703 | return getRelocTargetVA(file, type, a, p, sym, expr: R_GOT); |
704 | case R_GOTONLY_PC: |
705 | return in.got->getVA() + a - p; |
706 | case R_GOTPLTONLY_PC: |
707 | return in.gotPlt->getVA() + a - p; |
708 | case R_GOTREL: |
709 | case R_PPC64_RELAX_TOC: |
710 | return sym.getVA(addend: a) - in.got->getVA(); |
711 | case R_GOTPLTREL: |
712 | return sym.getVA(addend: a) - in.gotPlt->getVA(); |
713 | case R_GOTPLT: |
714 | case R_RELAX_TLS_GD_TO_IE_GOTPLT: |
715 | return sym.getGotVA() + a - in.gotPlt->getVA(); |
716 | case R_TLSLD_GOT_OFF: |
717 | case R_GOT_OFF: |
718 | case R_RELAX_TLS_GD_TO_IE_GOT_OFF: |
719 | return sym.getGotOffset() + a; |
720 | case R_AARCH64_GOT_PAGE_PC: |
721 | case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC: |
722 | return getAArch64Page(expr: sym.getGotVA() + a) - getAArch64Page(expr: p); |
723 | case R_AARCH64_GOT_PAGE: |
724 | return sym.getGotVA() + a - getAArch64Page(expr: in.got->getVA()); |
725 | case R_GOT_PC: |
726 | case R_RELAX_TLS_GD_TO_IE: |
727 | return sym.getGotVA() + a - p; |
728 | case R_GOTPLT_GOTREL: |
729 | return sym.getGotPltVA() + a - in.got->getVA(); |
730 | case R_GOTPLT_PC: |
731 | return sym.getGotPltVA() + a - p; |
732 | case R_LOONGARCH_GOT_PAGE_PC: |
733 | if (sym.hasFlag(bit: NEEDS_TLSGD)) |
734 | return getLoongArchPageDelta(dest: in.got->getGlobalDynAddr(b: sym) + a, pc: p, type); |
735 | return getLoongArchPageDelta(dest: sym.getGotVA() + a, pc: p, type); |
736 | case R_MIPS_GOTREL: |
737 | return sym.getVA(addend: a) - in.mipsGot->getGp(f: file); |
738 | case R_MIPS_GOT_GP: |
739 | return in.mipsGot->getGp(f: file) + a; |
740 | case R_MIPS_GOT_GP_PC: { |
741 | // R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target |
742 | // is _gp_disp symbol. In that case we should use the following |
743 | // formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at |
744 | // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf |
745 | // microMIPS variants of these relocations use slightly different |
746 | // expressions: AHL + GP - P + 3 for %lo() and AHL + GP - P - 1 for %hi() |
747 | // to correctly handle less-significant bit of the microMIPS symbol. |
748 | uint64_t v = in.mipsGot->getGp(f: file) + a - p; |
749 | if (type == R_MIPS_LO16 || type == R_MICROMIPS_LO16) |
750 | v += 4; |
751 | if (type == R_MICROMIPS_LO16 || type == R_MICROMIPS_HI16) |
752 | v -= 1; |
753 | return v; |
754 | } |
755 | case R_MIPS_GOT_LOCAL_PAGE: |
756 | // If relocation against MIPS local symbol requires GOT entry, this entry |
757 | // should be initialized by 'page address'. This address is high 16-bits |
758 | // of sum the symbol's value and the addend. |
759 | return in.mipsGot->getVA() + in.mipsGot->getPageEntryOffset(f: file, s: sym, addend: a) - |
760 | in.mipsGot->getGp(f: file); |
761 | case R_MIPS_GOT_OFF: |
762 | case R_MIPS_GOT_OFF32: |
763 | // In case of MIPS if a GOT relocation has non-zero addend this addend |
764 | // should be applied to the GOT entry content not to the GOT entry offset. |
765 | // That is why we use separate expression type. |
766 | return in.mipsGot->getVA() + in.mipsGot->getSymEntryOffset(f: file, s: sym, addend: a) - |
767 | in.mipsGot->getGp(f: file); |
768 | case R_MIPS_TLSGD: |
769 | return in.mipsGot->getVA() + in.mipsGot->getGlobalDynOffset(f: file, s: sym) - |
770 | in.mipsGot->getGp(f: file); |
771 | case R_MIPS_TLSLD: |
772 | return in.mipsGot->getVA() + in.mipsGot->getTlsIndexOffset(f: file) - |
773 | in.mipsGot->getGp(f: file); |
774 | case R_AARCH64_PAGE_PC: { |
775 | uint64_t val = sym.isUndefWeak() ? p + a : sym.getVA(addend: a); |
776 | return getAArch64Page(expr: val) - getAArch64Page(expr: p); |
777 | } |
778 | case R_RISCV_PC_INDIRECT: { |
779 | if (const Relocation *hiRel = getRISCVPCRelHi20(sym: &sym, addend: a)) |
780 | return getRelocTargetVA(file, type: hiRel->type, a: hiRel->addend, p: sym.getVA(), |
781 | sym: *hiRel->sym, expr: hiRel->expr); |
782 | return 0; |
783 | } |
784 | case R_LOONGARCH_PAGE_PC: |
785 | return getLoongArchPageDelta(dest: sym.getVA(addend: a), pc: p, type); |
786 | case R_PC: |
787 | case R_ARM_PCA: { |
788 | uint64_t dest; |
789 | if (expr == R_ARM_PCA) |
790 | // Some PC relative ARM (Thumb) relocations align down the place. |
791 | p = p & 0xfffffffc; |
792 | if (sym.isUndefined()) { |
793 | // On ARM and AArch64 a branch to an undefined weak resolves to the next |
794 | // instruction, otherwise the place. On RISC-V, resolve an undefined weak |
795 | // to the same instruction to cause an infinite loop (making the user |
796 | // aware of the issue) while ensuring no overflow. |
797 | // Note: if the symbol is hidden, its binding has been converted to local, |
798 | // so we just check isUndefined() here. |
799 | if (config->emachine == EM_ARM) |
800 | dest = getARMUndefinedRelativeWeakVA(type, a, p); |
801 | else if (config->emachine == EM_AARCH64) |
802 | dest = getAArch64UndefinedRelativeWeakVA(type, p) + a; |
803 | else if (config->emachine == EM_PPC) |
804 | dest = p; |
805 | else if (config->emachine == EM_RISCV) |
806 | dest = getRISCVUndefinedRelativeWeakVA(type, p) + a; |
807 | else |
808 | dest = sym.getVA(addend: a); |
809 | } else { |
810 | dest = sym.getVA(addend: a); |
811 | } |
812 | return dest - p; |
813 | } |
814 | case R_PLT: |
815 | return sym.getPltVA() + a; |
816 | case R_PLT_PC: |
817 | case R_PPC64_CALL_PLT: |
818 | return sym.getPltVA() + a - p; |
819 | case R_LOONGARCH_PLT_PAGE_PC: |
820 | return getLoongArchPageDelta(dest: sym.getPltVA() + a, pc: p, type); |
821 | case R_PLT_GOTPLT: |
822 | return sym.getPltVA() + a - in.gotPlt->getVA(); |
823 | case R_PLT_GOTREL: |
824 | return sym.getPltVA() + a - in.got->getVA(); |
825 | case R_PPC32_PLTREL: |
826 | // R_PPC_PLTREL24 uses the addend (usually 0 or 0x8000) to indicate r30 |
827 | // stores _GLOBAL_OFFSET_TABLE_ or .got2+0x8000. The addend is ignored for |
828 | // target VA computation. |
829 | return sym.getPltVA() - p; |
830 | case R_PPC64_CALL: { |
831 | uint64_t symVA = sym.getVA(addend: a); |
832 | // If we have an undefined weak symbol, we might get here with a symbol |
833 | // address of zero. That could overflow, but the code must be unreachable, |
834 | // so don't bother doing anything at all. |
835 | if (!symVA) |
836 | return 0; |
837 | |
838 | // PPC64 V2 ABI describes two entry points to a function. The global entry |
839 | // point is used for calls where the caller and callee (may) have different |
840 | // TOC base pointers and r2 needs to be modified to hold the TOC base for |
841 | // the callee. For local calls the caller and callee share the same |
842 | // TOC base and so the TOC pointer initialization code should be skipped by |
843 | // branching to the local entry point. |
844 | return symVA - p + getPPC64GlobalEntryToLocalEntryOffset(stOther: sym.stOther); |
845 | } |
846 | case R_PPC64_TOCBASE: |
847 | return getPPC64TocBase() + a; |
848 | case R_RELAX_GOT_PC: |
849 | case R_PPC64_RELAX_GOT_PC: |
850 | return sym.getVA(addend: a) - p; |
851 | case R_RELAX_TLS_GD_TO_LE: |
852 | case R_RELAX_TLS_IE_TO_LE: |
853 | case R_RELAX_TLS_LD_TO_LE: |
854 | case R_TPREL: |
855 | // It is not very clear what to return if the symbol is undefined. With |
856 | // --noinhibit-exec, even a non-weak undefined reference may reach here. |
857 | // Just return A, which matches R_ABS, and the behavior of some dynamic |
858 | // loaders. |
859 | if (sym.isUndefined()) |
860 | return a; |
861 | return getTlsTpOffset(s: sym) + a; |
862 | case R_RELAX_TLS_GD_TO_LE_NEG: |
863 | case R_TPREL_NEG: |
864 | if (sym.isUndefined()) |
865 | return a; |
866 | return -getTlsTpOffset(s: sym) + a; |
867 | case R_SIZE: |
868 | return sym.getSize() + a; |
869 | case R_TLSDESC: |
870 | return in.got->getTlsDescAddr(sym) + a; |
871 | case R_TLSDESC_PC: |
872 | return in.got->getTlsDescAddr(sym) + a - p; |
873 | case R_TLSDESC_GOTPLT: |
874 | return in.got->getTlsDescAddr(sym) + a - in.gotPlt->getVA(); |
875 | case R_AARCH64_TLSDESC_PAGE: |
876 | return getAArch64Page(expr: in.got->getTlsDescAddr(sym) + a) - getAArch64Page(expr: p); |
877 | case R_TLSGD_GOT: |
878 | return in.got->getGlobalDynOffset(b: sym) + a; |
879 | case R_TLSGD_GOTPLT: |
880 | return in.got->getGlobalDynAddr(b: sym) + a - in.gotPlt->getVA(); |
881 | case R_TLSGD_PC: |
882 | return in.got->getGlobalDynAddr(b: sym) + a - p; |
883 | case R_LOONGARCH_TLSGD_PAGE_PC: |
884 | return getLoongArchPageDelta(dest: in.got->getGlobalDynAddr(b: sym) + a, pc: p, type); |
885 | case R_TLSLD_GOTPLT: |
886 | return in.got->getVA() + in.got->getTlsIndexOff() + a - in.gotPlt->getVA(); |
887 | case R_TLSLD_GOT: |
888 | return in.got->getTlsIndexOff() + a; |
889 | case R_TLSLD_PC: |
890 | return in.got->getTlsIndexVA() + a - p; |
891 | default: |
892 | llvm_unreachable("invalid expression" ); |
893 | } |
894 | } |
895 | |
896 | // This function applies relocations to sections without SHF_ALLOC bit. |
897 | // Such sections are never mapped to memory at runtime. Debug sections are |
898 | // an example. Relocations in non-alloc sections are much easier to |
899 | // handle than in allocated sections because it will never need complex |
900 | // treatment such as GOT or PLT (because at runtime no one refers them). |
901 | // So, we handle relocations for non-alloc sections directly in this |
902 | // function as a performance optimization. |
903 | template <class ELFT, class RelTy> |
904 | void InputSection::relocateNonAlloc(uint8_t *buf, ArrayRef<RelTy> rels) { |
905 | const unsigned bits = sizeof(typename ELFT::uint) * 8; |
906 | const TargetInfo &target = *elf::target; |
907 | const auto emachine = config->emachine; |
908 | const bool isDebug = isDebugSection(sec: *this); |
909 | const bool isDebugLine = isDebug && name == ".debug_line" ; |
910 | std::optional<uint64_t> tombstone; |
911 | if (isDebug) { |
912 | if (name == ".debug_loc" || name == ".debug_ranges" ) |
913 | tombstone = 1; |
914 | else if (name == ".debug_names" ) |
915 | tombstone = UINT64_MAX; // tombstone value |
916 | else |
917 | tombstone = 0; |
918 | } |
919 | for (const auto &patAndValue : llvm::reverse(C&: config->deadRelocInNonAlloc)) |
920 | if (patAndValue.first.match(S: this->name)) { |
921 | tombstone = patAndValue.second; |
922 | break; |
923 | } |
924 | |
925 | const InputFile *f = this->file; |
926 | for (auto it = rels.begin(), end = rels.end(); it != end; ++it) { |
927 | const RelTy &rel = *it; |
928 | const RelType type = rel.getType(config->isMips64EL); |
929 | const uint64_t offset = rel.r_offset; |
930 | uint8_t *bufLoc = buf + offset; |
931 | int64_t addend = getAddend<ELFT>(rel); |
932 | if (!RelTy::IsRela) |
933 | addend += target.getImplicitAddend(buf: bufLoc, type); |
934 | |
935 | Symbol &sym = f->getRelocTargetSym(rel); |
936 | RelExpr expr = target.getRelExpr(type, s: sym, loc: bufLoc); |
937 | if (expr == R_NONE) |
938 | continue; |
939 | auto *ds = dyn_cast<Defined>(Val: &sym); |
940 | |
941 | if (emachine == EM_RISCV && type == R_RISCV_SET_ULEB128) { |
942 | if (++it != end && |
943 | it->getType(/*isMips64EL=*/false) == R_RISCV_SUB_ULEB128 && |
944 | it->r_offset == offset) { |
945 | uint64_t val; |
946 | if (!ds && tombstone) { |
947 | val = *tombstone; |
948 | } else { |
949 | val = sym.getVA(addend) - |
950 | (f->getRelocTargetSym(*it).getVA(0) + getAddend<ELFT>(*it)); |
951 | } |
952 | if (overwriteULEB128(bufLoc, val) >= 0x80) |
953 | errorOrWarn(msg: getLocation(offset) + ": ULEB128 value " + Twine(val) + |
954 | " exceeds available space; references '" + |
955 | lld::toString(sym) + "'" ); |
956 | continue; |
957 | } |
958 | errorOrWarn(msg: getLocation(offset) + |
959 | ": R_RISCV_SET_ULEB128 not paired with R_RISCV_SUB_SET128" ); |
960 | return; |
961 | } |
962 | |
963 | if (tombstone && (expr == R_ABS || expr == R_DTPREL)) { |
964 | // Resolve relocations in .debug_* referencing (discarded symbols or ICF |
965 | // folded section symbols) to a tombstone value. Resolving to addend is |
966 | // unsatisfactory because the result address range may collide with a |
967 | // valid range of low address, or leave multiple CUs claiming ownership of |
968 | // the same range of code, which may confuse consumers. |
969 | // |
970 | // To address the problems, we use -1 as a tombstone value for most |
971 | // .debug_* sections. We have to ignore the addend because we don't want |
972 | // to resolve an address attribute (which may have a non-zero addend) to |
973 | // -1+addend (wrap around to a low address). |
974 | // |
975 | // R_DTPREL type relocations represent an offset into the dynamic thread |
976 | // vector. The computed value is st_value plus a non-negative offset. |
977 | // Negative values are invalid, so -1 can be used as the tombstone value. |
978 | // |
979 | // If the referenced symbol is relative to a discarded section (due to |
980 | // --gc-sections, COMDAT, etc), it has been converted to a Undefined. |
981 | // `ds->folded` catches the ICF folded case. However, resolving a |
982 | // relocation in .debug_line to -1 would stop debugger users from setting |
983 | // breakpoints on the folded-in function, so exclude .debug_line. |
984 | // |
985 | // For pre-DWARF-v5 .debug_loc and .debug_ranges, -1 is a reserved value |
986 | // (base address selection entry), use 1 (which is used by GNU ld for |
987 | // .debug_ranges). |
988 | // |
989 | // TODO To reduce disruption, we use 0 instead of -1 as the tombstone |
990 | // value. Enable -1 in a future release. |
991 | if (!ds || (ds->folded && !isDebugLine)) { |
992 | // If -z dead-reloc-in-nonalloc= is specified, respect it. |
993 | uint64_t value = SignExtend64<bits>(*tombstone); |
994 | // For a 32-bit local TU reference in .debug_names, X86_64::relocate |
995 | // requires that the unsigned value for R_X86_64_32 is truncated to |
996 | // 32-bit. Other 64-bit targets's don't discern signed/unsigned 32-bit |
997 | // absolute relocations and do not need this change. |
998 | if (emachine == EM_X86_64 && type == R_X86_64_32) |
999 | value = static_cast<uint32_t>(value); |
1000 | target.relocateNoSym(loc: bufLoc, type, val: value); |
1001 | continue; |
1002 | } |
1003 | } |
1004 | |
1005 | // For a relocatable link, content relocated by RELA remains unchanged and |
1006 | // we can stop here, while content relocated by REL referencing STT_SECTION |
1007 | // needs updating implicit addends. |
1008 | if (config->relocatable && (RelTy::IsRela || sym.type != STT_SECTION)) |
1009 | continue; |
1010 | |
1011 | // R_ABS/R_DTPREL and some other relocations can be used from non-SHF_ALLOC |
1012 | // sections. |
1013 | if (LLVM_LIKELY(expr == R_ABS) || expr == R_DTPREL || expr == R_GOTPLTREL || |
1014 | expr == R_RISCV_ADD) { |
1015 | target.relocateNoSym(loc: bufLoc, type, val: SignExtend64<bits>(sym.getVA(addend))); |
1016 | continue; |
1017 | } |
1018 | |
1019 | if (expr == R_SIZE) { |
1020 | target.relocateNoSym(loc: bufLoc, type, |
1021 | val: SignExtend64<bits>(sym.getSize() + addend)); |
1022 | continue; |
1023 | } |
1024 | |
1025 | std::string msg = getLocation(offset) + ": has non-ABS relocation " + |
1026 | toString(type) + " against symbol '" + toString(sym) + |
1027 | "'" ; |
1028 | if (expr != R_PC && !(emachine == EM_386 && type == R_386_GOTPC)) { |
1029 | errorOrWarn(msg); |
1030 | return; |
1031 | } |
1032 | |
1033 | // If the control reaches here, we found a PC-relative relocation in a |
1034 | // non-ALLOC section. Since non-ALLOC section is not loaded into memory |
1035 | // at runtime, the notion of PC-relative doesn't make sense here. So, |
1036 | // this is a usage error. However, GNU linkers historically accept such |
1037 | // relocations without any errors and relocate them as if they were at |
1038 | // address 0. For bug-compatibility, we accept them with warnings. We |
1039 | // know Steel Bank Common Lisp as of 2018 have this bug. |
1040 | // |
1041 | // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations |
1042 | // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed in |
1043 | // 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we need to |
1044 | // keep this bug-compatible code for a while. |
1045 | warn(msg); |
1046 | target.relocateNoSym( |
1047 | loc: bufLoc, type, |
1048 | val: SignExtend64<bits>(sym.getVA(addend: addend - offset - outSecOff))); |
1049 | } |
1050 | } |
1051 | |
1052 | template <class ELFT> |
1053 | void InputSectionBase::relocate(uint8_t *buf, uint8_t *bufEnd) { |
1054 | if ((flags & SHF_EXECINSTR) && LLVM_UNLIKELY(getFile<ELFT>()->splitStack)) |
1055 | adjustSplitStackFunctionPrologues<ELFT>(buf, bufEnd); |
1056 | |
1057 | if (flags & SHF_ALLOC) { |
1058 | target->relocateAlloc(sec&: *this, buf); |
1059 | return; |
1060 | } |
1061 | |
1062 | auto *sec = cast<InputSection>(Val: this); |
1063 | // For a relocatable link, also call relocateNonAlloc() to rewrite applicable |
1064 | // locations with tombstone values. |
1065 | const RelsOrRelas<ELFT> rels = sec->template relsOrRelas<ELFT>(); |
1066 | if (rels.areRelocsRel()) |
1067 | sec->relocateNonAlloc<ELFT>(buf, rels.rels); |
1068 | else |
1069 | sec->relocateNonAlloc<ELFT>(buf, rels.relas); |
1070 | } |
1071 | |
1072 | // For each function-defining prologue, find any calls to __morestack, |
1073 | // and replace them with calls to __morestack_non_split. |
1074 | static void switchMorestackCallsToMorestackNonSplit( |
1075 | DenseSet<Defined *> &prologues, |
1076 | SmallVector<Relocation *, 0> &morestackCalls) { |
1077 | |
1078 | // If the target adjusted a function's prologue, all calls to |
1079 | // __morestack inside that function should be switched to |
1080 | // __morestack_non_split. |
1081 | Symbol *moreStackNonSplit = symtab.find(name: "__morestack_non_split" ); |
1082 | if (!moreStackNonSplit) { |
1083 | error(msg: "mixing split-stack objects requires a definition of " |
1084 | "__morestack_non_split" ); |
1085 | return; |
1086 | } |
1087 | |
1088 | // Sort both collections to compare addresses efficiently. |
1089 | llvm::sort(C&: morestackCalls, Comp: [](const Relocation *l, const Relocation *r) { |
1090 | return l->offset < r->offset; |
1091 | }); |
1092 | std::vector<Defined *> functions(prologues.begin(), prologues.end()); |
1093 | llvm::sort(C&: functions, Comp: [](const Defined *l, const Defined *r) { |
1094 | return l->value < r->value; |
1095 | }); |
1096 | |
1097 | auto it = morestackCalls.begin(); |
1098 | for (Defined *f : functions) { |
1099 | // Find the first call to __morestack within the function. |
1100 | while (it != morestackCalls.end() && (*it)->offset < f->value) |
1101 | ++it; |
1102 | // Adjust all calls inside the function. |
1103 | while (it != morestackCalls.end() && (*it)->offset < f->value + f->size) { |
1104 | (*it)->sym = moreStackNonSplit; |
1105 | ++it; |
1106 | } |
1107 | } |
1108 | } |
1109 | |
1110 | static bool enclosingPrologueAttempted(uint64_t offset, |
1111 | const DenseSet<Defined *> &prologues) { |
1112 | for (Defined *f : prologues) |
1113 | if (f->value <= offset && offset < f->value + f->size) |
1114 | return true; |
1115 | return false; |
1116 | } |
1117 | |
1118 | // If a function compiled for split stack calls a function not |
1119 | // compiled for split stack, then the caller needs its prologue |
1120 | // adjusted to ensure that the called function will have enough stack |
1121 | // available. Find those functions, and adjust their prologues. |
1122 | template <class ELFT> |
1123 | void InputSectionBase::adjustSplitStackFunctionPrologues(uint8_t *buf, |
1124 | uint8_t *end) { |
1125 | DenseSet<Defined *> prologues; |
1126 | SmallVector<Relocation *, 0> morestackCalls; |
1127 | |
1128 | for (Relocation &rel : relocs()) { |
1129 | // Ignore calls into the split-stack api. |
1130 | if (rel.sym->getName().starts_with(Prefix: "__morestack" )) { |
1131 | if (rel.sym->getName().equals(RHS: "__morestack" )) |
1132 | morestackCalls.push_back(Elt: &rel); |
1133 | continue; |
1134 | } |
1135 | |
1136 | // A relocation to non-function isn't relevant. Sometimes |
1137 | // __morestack is not marked as a function, so this check comes |
1138 | // after the name check. |
1139 | if (rel.sym->type != STT_FUNC) |
1140 | continue; |
1141 | |
1142 | // If the callee's-file was compiled with split stack, nothing to do. In |
1143 | // this context, a "Defined" symbol is one "defined by the binary currently |
1144 | // being produced". So an "undefined" symbol might be provided by a shared |
1145 | // library. It is not possible to tell how such symbols were compiled, so be |
1146 | // conservative. |
1147 | if (Defined *d = dyn_cast<Defined>(Val: rel.sym)) |
1148 | if (InputSection *isec = cast_or_null<InputSection>(Val: d->section)) |
1149 | if (!isec || !isec->getFile<ELFT>() || isec->getFile<ELFT>()->splitStack) |
1150 | continue; |
1151 | |
1152 | if (enclosingPrologueAttempted(offset: rel.offset, prologues)) |
1153 | continue; |
1154 | |
1155 | if (Defined *f = getEnclosingFunction(offset: rel.offset)) { |
1156 | prologues.insert(V: f); |
1157 | if (target->adjustPrologueForCrossSplitStack(loc: buf + f->value, end, |
1158 | stOther: f->stOther)) |
1159 | continue; |
1160 | if (!getFile<ELFT>()->someNoSplitStack) |
1161 | error(msg: lld::toString(sec: this) + ": " + f->getName() + |
1162 | " (with -fsplit-stack) calls " + rel.sym->getName() + |
1163 | " (without -fsplit-stack), but couldn't adjust its prologue" ); |
1164 | } |
1165 | } |
1166 | |
1167 | if (target->needsMoreStackNonSplit) |
1168 | switchMorestackCallsToMorestackNonSplit(prologues, morestackCalls); |
1169 | } |
1170 | |
1171 | template <class ELFT> void InputSection::writeTo(uint8_t *buf) { |
1172 | if (LLVM_UNLIKELY(type == SHT_NOBITS)) |
1173 | return; |
1174 | // If -r or --emit-relocs is given, then an InputSection |
1175 | // may be a relocation section. |
1176 | if (LLVM_UNLIKELY(type == SHT_RELA)) { |
1177 | copyRelocations<ELFT, typename ELFT::Rela>(buf); |
1178 | return; |
1179 | } |
1180 | if (LLVM_UNLIKELY(type == SHT_REL)) { |
1181 | copyRelocations<ELFT, typename ELFT::Rel>(buf); |
1182 | return; |
1183 | } |
1184 | |
1185 | // If -r is given, we may have a SHT_GROUP section. |
1186 | if (LLVM_UNLIKELY(type == SHT_GROUP)) { |
1187 | copyShtGroup<ELFT>(buf); |
1188 | return; |
1189 | } |
1190 | |
1191 | // If this is a compressed section, uncompress section contents directly |
1192 | // to the buffer. |
1193 | if (compressed) { |
1194 | auto *hdr = reinterpret_cast<const typename ELFT::Chdr *>(content_); |
1195 | auto compressed = ArrayRef<uint8_t>(content_, compressedSize) |
1196 | .slice(N: sizeof(typename ELFT::Chdr)); |
1197 | size_t size = this->size; |
1198 | if (Error e = hdr->ch_type == ELFCOMPRESS_ZLIB |
1199 | ? compression::zlib::decompress(Input: compressed, Output: buf, UncompressedSize&: size) |
1200 | : compression::zstd::decompress(Input: compressed, Output: buf, UncompressedSize&: size)) |
1201 | fatal(msg: toString(sec: this) + |
1202 | ": decompress failed: " + llvm::toString(E: std::move(e))); |
1203 | uint8_t *bufEnd = buf + size; |
1204 | relocate<ELFT>(buf, bufEnd); |
1205 | return; |
1206 | } |
1207 | |
1208 | // Copy section contents from source object file to output file |
1209 | // and then apply relocations. |
1210 | memcpy(dest: buf, src: content().data(), n: content().size()); |
1211 | relocate<ELFT>(buf, buf + content().size()); |
1212 | } |
1213 | |
1214 | void InputSection::replace(InputSection *other) { |
1215 | addralign = std::max(a: addralign, b: other->addralign); |
1216 | |
1217 | // When a section is replaced with another section that was allocated to |
1218 | // another partition, the replacement section (and its associated sections) |
1219 | // need to be placed in the main partition so that both partitions will be |
1220 | // able to access it. |
1221 | if (partition != other->partition) { |
1222 | partition = 1; |
1223 | for (InputSection *isec : dependentSections) |
1224 | isec->partition = 1; |
1225 | } |
1226 | |
1227 | other->repl = repl; |
1228 | other->markDead(); |
1229 | } |
1230 | |
1231 | template <class ELFT> |
1232 | EhInputSection::EhInputSection(ObjFile<ELFT> &f, |
1233 | const typename ELFT::Shdr &, |
1234 | StringRef name) |
1235 | : InputSectionBase(f, header, name, InputSectionBase::EHFrame) {} |
1236 | |
1237 | SyntheticSection *EhInputSection::getParent() const { |
1238 | return cast_or_null<SyntheticSection>(Val: parent); |
1239 | } |
1240 | |
1241 | // .eh_frame is a sequence of CIE or FDE records. |
1242 | // This function splits an input section into records and returns them. |
1243 | template <class ELFT> void EhInputSection::split() { |
1244 | const RelsOrRelas<ELFT> rels = relsOrRelas<ELFT>(); |
1245 | // getReloc expects the relocations to be sorted by r_offset. See the comment |
1246 | // in scanRelocs. |
1247 | if (rels.areRelocsRel()) { |
1248 | SmallVector<typename ELFT::Rel, 0> storage; |
1249 | split<ELFT>(sortRels(rels.rels, storage)); |
1250 | } else { |
1251 | SmallVector<typename ELFT::Rela, 0> storage; |
1252 | split<ELFT>(sortRels(rels.relas, storage)); |
1253 | } |
1254 | } |
1255 | |
1256 | template <class ELFT, class RelTy> |
1257 | void EhInputSection::split(ArrayRef<RelTy> rels) { |
1258 | ArrayRef<uint8_t> d = content(); |
1259 | const char *msg = nullptr; |
1260 | unsigned relI = 0; |
1261 | while (!d.empty()) { |
1262 | if (d.size() < 4) { |
1263 | msg = "CIE/FDE too small" ; |
1264 | break; |
1265 | } |
1266 | uint64_t size = endian::read32<ELFT::Endianness>(d.data()); |
1267 | if (size == 0) // ZERO terminator |
1268 | break; |
1269 | uint32_t id = endian::read32<ELFT::Endianness>(d.data() + 4); |
1270 | size += 4; |
1271 | if (LLVM_UNLIKELY(size > d.size())) { |
1272 | // If it is 0xFFFFFFFF, the next 8 bytes contain the size instead, |
1273 | // but we do not support that format yet. |
1274 | msg = size == UINT32_MAX + uint64_t(4) |
1275 | ? "CIE/FDE too large" |
1276 | : "CIE/FDE ends past the end of the section" ; |
1277 | break; |
1278 | } |
1279 | |
1280 | // Find the first relocation that points to [off,off+size). Relocations |
1281 | // have been sorted by r_offset. |
1282 | const uint64_t off = d.data() - content().data(); |
1283 | while (relI != rels.size() && rels[relI].r_offset < off) |
1284 | ++relI; |
1285 | unsigned firstRel = -1; |
1286 | if (relI != rels.size() && rels[relI].r_offset < off + size) |
1287 | firstRel = relI; |
1288 | (id == 0 ? cies : fdes).emplace_back(Args: off, Args: this, Args&: size, Args&: firstRel); |
1289 | d = d.slice(N: size); |
1290 | } |
1291 | if (msg) |
1292 | errorOrWarn(msg: "corrupted .eh_frame: " + Twine(msg) + "\n>>> defined in " + |
1293 | getObjMsg(off: d.data() - content().data())); |
1294 | } |
1295 | |
1296 | // Return the offset in an output section for a given input offset. |
1297 | uint64_t EhInputSection::getParentOffset(uint64_t offset) const { |
1298 | auto it = partition_point( |
1299 | Range: fdes, P: [=](EhSectionPiece p) { return p.inputOff <= offset; }); |
1300 | if (it == fdes.begin() || it[-1].inputOff + it[-1].size <= offset) { |
1301 | it = partition_point( |
1302 | Range: cies, P: [=](EhSectionPiece p) { return p.inputOff <= offset; }); |
1303 | if (it == cies.begin()) // invalid piece |
1304 | return offset; |
1305 | } |
1306 | if (it[-1].outputOff == -1) // invalid piece |
1307 | return offset - it[-1].inputOff; |
1308 | return it[-1].outputOff + (offset - it[-1].inputOff); |
1309 | } |
1310 | |
1311 | static size_t findNull(StringRef s, size_t entSize) { |
1312 | for (unsigned i = 0, n = s.size(); i != n; i += entSize) { |
1313 | const char *b = s.begin() + i; |
1314 | if (std::all_of(first: b, last: b + entSize, pred: [](char c) { return c == 0; })) |
1315 | return i; |
1316 | } |
1317 | llvm_unreachable("" ); |
1318 | } |
1319 | |
1320 | // Split SHF_STRINGS section. Such section is a sequence of |
1321 | // null-terminated strings. |
1322 | void MergeInputSection::splitStrings(StringRef s, size_t entSize) { |
1323 | const bool live = !(flags & SHF_ALLOC) || !config->gcSections; |
1324 | const char *p = s.data(), *end = s.data() + s.size(); |
1325 | if (!std::all_of(first: end - entSize, last: end, pred: [](char c) { return c == 0; })) |
1326 | fatal(msg: toString(sec: this) + ": string is not null terminated" ); |
1327 | if (entSize == 1) { |
1328 | // Optimize the common case. |
1329 | do { |
1330 | size_t size = strlen(s: p); |
1331 | pieces.emplace_back(Args: p - s.begin(), Args: xxh3_64bits(data: StringRef(p, size)), Args: live); |
1332 | p += size + 1; |
1333 | } while (p != end); |
1334 | } else { |
1335 | do { |
1336 | size_t size = findNull(s: StringRef(p, end - p), entSize); |
1337 | pieces.emplace_back(Args: p - s.begin(), Args: xxh3_64bits(data: StringRef(p, size)), Args: live); |
1338 | p += size + entSize; |
1339 | } while (p != end); |
1340 | } |
1341 | } |
1342 | |
1343 | // Split non-SHF_STRINGS section. Such section is a sequence of |
1344 | // fixed size records. |
1345 | void MergeInputSection::splitNonStrings(ArrayRef<uint8_t> data, |
1346 | size_t entSize) { |
1347 | size_t size = data.size(); |
1348 | assert((size % entSize) == 0); |
1349 | const bool live = !(flags & SHF_ALLOC) || !config->gcSections; |
1350 | |
1351 | pieces.resize_for_overwrite(N: size / entSize); |
1352 | for (size_t i = 0, j = 0; i != size; i += entSize, j++) |
1353 | pieces[j] = {i, (uint32_t)xxh3_64bits(data: data.slice(N: i, M: entSize)), live}; |
1354 | } |
1355 | |
1356 | template <class ELFT> |
1357 | MergeInputSection::MergeInputSection(ObjFile<ELFT> &f, |
1358 | const typename ELFT::Shdr &, |
1359 | StringRef name) |
1360 | : InputSectionBase(f, header, name, InputSectionBase::Merge) {} |
1361 | |
1362 | MergeInputSection::MergeInputSection(uint64_t flags, uint32_t type, |
1363 | uint64_t entsize, ArrayRef<uint8_t> data, |
1364 | StringRef name) |
1365 | : InputSectionBase(nullptr, flags, type, entsize, /*Link*/ 0, /*Info*/ 0, |
1366 | /*Alignment*/ entsize, data, name, SectionBase::Merge) {} |
1367 | |
1368 | // This function is called after we obtain a complete list of input sections |
1369 | // that need to be linked. This is responsible to split section contents |
1370 | // into small chunks for further processing. |
1371 | // |
1372 | // Note that this function is called from parallelForEach. This must be |
1373 | // thread-safe (i.e. no memory allocation from the pools). |
1374 | void MergeInputSection::splitIntoPieces() { |
1375 | assert(pieces.empty()); |
1376 | |
1377 | if (flags & SHF_STRINGS) |
1378 | splitStrings(s: toStringRef(Input: contentMaybeDecompress()), entSize: entsize); |
1379 | else |
1380 | splitNonStrings(data: contentMaybeDecompress(), entSize: entsize); |
1381 | } |
1382 | |
1383 | SectionPiece &MergeInputSection::getSectionPiece(uint64_t offset) { |
1384 | if (content().size() <= offset) |
1385 | fatal(msg: toString(sec: this) + ": offset is outside the section" ); |
1386 | return partition_point( |
1387 | Range&: pieces, P: [=](SectionPiece p) { return p.inputOff <= offset; })[-1]; |
1388 | } |
1389 | |
1390 | // Return the offset in an output section for a given input offset. |
1391 | uint64_t MergeInputSection::getParentOffset(uint64_t offset) const { |
1392 | const SectionPiece &piece = getSectionPiece(offset); |
1393 | return piece.outputOff + (offset - piece.inputOff); |
1394 | } |
1395 | |
1396 | template InputSection::InputSection(ObjFile<ELF32LE> &, const ELF32LE::Shdr &, |
1397 | StringRef); |
1398 | template InputSection::InputSection(ObjFile<ELF32BE> &, const ELF32BE::Shdr &, |
1399 | StringRef); |
1400 | template InputSection::InputSection(ObjFile<ELF64LE> &, const ELF64LE::Shdr &, |
1401 | StringRef); |
1402 | template InputSection::InputSection(ObjFile<ELF64BE> &, const ELF64BE::Shdr &, |
1403 | StringRef); |
1404 | |
1405 | template void InputSection::writeTo<ELF32LE>(uint8_t *); |
1406 | template void InputSection::writeTo<ELF32BE>(uint8_t *); |
1407 | template void InputSection::writeTo<ELF64LE>(uint8_t *); |
1408 | template void InputSection::writeTo<ELF64BE>(uint8_t *); |
1409 | |
1410 | template RelsOrRelas<ELF32LE> InputSectionBase::relsOrRelas<ELF32LE>() const; |
1411 | template RelsOrRelas<ELF32BE> InputSectionBase::relsOrRelas<ELF32BE>() const; |
1412 | template RelsOrRelas<ELF64LE> InputSectionBase::relsOrRelas<ELF64LE>() const; |
1413 | template RelsOrRelas<ELF64BE> InputSectionBase::relsOrRelas<ELF64BE>() const; |
1414 | |
1415 | template MergeInputSection::MergeInputSection(ObjFile<ELF32LE> &, |
1416 | const ELF32LE::Shdr &, StringRef); |
1417 | template MergeInputSection::MergeInputSection(ObjFile<ELF32BE> &, |
1418 | const ELF32BE::Shdr &, StringRef); |
1419 | template MergeInputSection::MergeInputSection(ObjFile<ELF64LE> &, |
1420 | const ELF64LE::Shdr &, StringRef); |
1421 | template MergeInputSection::MergeInputSection(ObjFile<ELF64BE> &, |
1422 | const ELF64BE::Shdr &, StringRef); |
1423 | |
1424 | template EhInputSection::EhInputSection(ObjFile<ELF32LE> &, |
1425 | const ELF32LE::Shdr &, StringRef); |
1426 | template EhInputSection::EhInputSection(ObjFile<ELF32BE> &, |
1427 | const ELF32BE::Shdr &, StringRef); |
1428 | template EhInputSection::EhInputSection(ObjFile<ELF64LE> &, |
1429 | const ELF64LE::Shdr &, StringRef); |
1430 | template EhInputSection::EhInputSection(ObjFile<ELF64BE> &, |
1431 | const ELF64BE::Shdr &, StringRef); |
1432 | |
1433 | template void EhInputSection::split<ELF32LE>(); |
1434 | template void EhInputSection::split<ELF32BE>(); |
1435 | template void EhInputSection::split<ELF64LE>(); |
1436 | template void EhInputSection::split<ELF64BE>(); |
1437 | |