1//=- LoongArchInstrInfo.h - LoongArch Instruction Information ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the LoongArch implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHINSTRINFO_H
14#define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHINSTRINFO_H
15
16#include "LoongArchRegisterInfo.h"
17#include "llvm/CodeGen/TargetInstrInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "LoongArchGenInstrInfo.inc"
21
22namespace llvm {
23
24class LoongArchSubtarget;
25
26class LoongArchInstrInfo : public LoongArchGenInstrInfo {
27public:
28 explicit LoongArchInstrInfo(LoongArchSubtarget &STI);
29
30 MCInst getNop() const override;
31
32 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
33 const DebugLoc &DL, MCRegister DstReg, MCRegister SrcReg,
34 bool KillSrc) const override;
35
36 void storeRegToStackSlot(MachineBasicBlock &MBB,
37 MachineBasicBlock::iterator MBBI, Register SrcReg,
38 bool IsKill, int FrameIndex,
39 const TargetRegisterClass *RC,
40 const TargetRegisterInfo *TRI,
41 Register VReg) const override;
42 void loadRegFromStackSlot(MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator MBBI, Register DstReg,
44 int FrameIndex, const TargetRegisterClass *RC,
45 const TargetRegisterInfo *TRI,
46 Register VReg) const override;
47
48 // Materializes the given integer Val into DstReg.
49 void movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
50 const DebugLoc &DL, Register DstReg, uint64_t Val,
51 MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
52
53 unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
54
55 MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
56
57 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
58 MachineBasicBlock *&FBB,
59 SmallVectorImpl<MachineOperand> &Cond,
60 bool AllowModify) const override;
61
62 bool isBranchOffsetInRange(unsigned BranchOpc,
63 int64_t BrOffset) const override;
64
65 unsigned removeBranch(MachineBasicBlock &MBB,
66 int *BytesRemoved = nullptr) const override;
67
68 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
69 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
70 const DebugLoc &dl,
71 int *BytesAdded = nullptr) const override;
72
73 void insertIndirectBranch(MachineBasicBlock &MBB,
74 MachineBasicBlock &NewDestBB,
75 MachineBasicBlock &RestoreBB, const DebugLoc &DL,
76 int64_t BrOffset, RegScavenger *RS) const override;
77
78 bool
79 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
80
81 std::pair<unsigned, unsigned>
82 decomposeMachineOperandsTargetFlags(unsigned TF) const override;
83
84 ArrayRef<std::pair<unsigned, const char *>>
85 getSerializableDirectMachineOperandTargetFlags() const override;
86
87protected:
88 const LoongArchSubtarget &STI;
89};
90
91namespace LoongArch {
92
93// Mask assignments for floating-point.
94static constexpr unsigned FClassMaskSignalingNaN = 0x001;
95static constexpr unsigned FClassMaskQuietNaN = 0x002;
96static constexpr unsigned FClassMaskNegativeInfinity = 0x004;
97static constexpr unsigned FClassMaskNegativeNormal = 0x008;
98static constexpr unsigned FClassMaskNegativeSubnormal = 0x010;
99static constexpr unsigned FClassMaskNegativeZero = 0x020;
100static constexpr unsigned FClassMaskPositiveInfinity = 0x040;
101static constexpr unsigned FClassMaskPositiveNormal = 0x080;
102static constexpr unsigned FClassMaskPositiveSubnormal = 0x100;
103static constexpr unsigned FClassMaskPositiveZero = 0x200;
104} // namespace LoongArch
105
106} // end namespace llvm
107#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHINSTRINFO_H
108

source code of llvm/lib/Target/LoongArch/LoongArchInstrInfo.h