1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. |
5 | * |
6 | * Numascale NumaConnect-Specific APIC Code |
7 | * |
8 | * Copyright (C) 2011 Numascale AS. All rights reserved. |
9 | * |
10 | * Send feedback to <support@numascale.com> |
11 | * |
12 | */ |
13 | #include <linux/types.h> |
14 | #include <linux/init.h> |
15 | #include <linux/pgtable.h> |
16 | |
17 | #include <asm/numachip/numachip.h> |
18 | #include <asm/numachip/numachip_csr.h> |
19 | |
20 | |
21 | #include "local.h" |
22 | |
23 | u8 numachip_system __read_mostly; |
24 | static const struct apic apic_numachip1; |
25 | static const struct apic apic_numachip2; |
26 | static void (*numachip_apic_icr_write)(int apicid, unsigned int val) __read_mostly; |
27 | |
28 | static u32 numachip1_get_apic_id(u32 x) |
29 | { |
30 | unsigned long value; |
31 | unsigned int id = (x >> 24) & 0xff; |
32 | |
33 | if (static_cpu_has(X86_FEATURE_NODEID_MSR)) { |
34 | rdmsrl(MSR_FAM10H_NODE_ID, value); |
35 | id |= (value << 2) & 0xff00; |
36 | } |
37 | |
38 | return id; |
39 | } |
40 | |
41 | static u32 numachip2_get_apic_id(u32 x) |
42 | { |
43 | u64 mcfg; |
44 | |
45 | rdmsrl(MSR_FAM10H_MMIO_CONF_BASE, mcfg); |
46 | return ((mcfg >> (28 - 8)) & 0xfff00) | (x >> 24); |
47 | } |
48 | |
49 | static void numachip1_apic_icr_write(int apicid, unsigned int val) |
50 | { |
51 | write_lcsr(CSR_G3_EXT_IRQ_GEN, val: (apicid << 16) | val); |
52 | } |
53 | |
54 | static void numachip2_apic_icr_write(int apicid, unsigned int val) |
55 | { |
56 | numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, val: (apicid << 12) | val); |
57 | } |
58 | |
59 | static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip) |
60 | { |
61 | numachip_apic_icr_write(phys_apicid, APIC_DM_INIT); |
62 | numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP | |
63 | (start_rip >> 12)); |
64 | |
65 | return 0; |
66 | } |
67 | |
68 | static void numachip_send_IPI_one(int cpu, int vector) |
69 | { |
70 | int local_apicid, apicid = per_cpu(x86_cpu_to_apicid, cpu); |
71 | unsigned int dmode; |
72 | |
73 | preempt_disable(); |
74 | local_apicid = __this_cpu_read(x86_cpu_to_apicid); |
75 | |
76 | /* Send via local APIC where non-local part matches */ |
77 | if (!((apicid ^ local_apicid) >> NUMACHIP_LAPIC_BITS)) { |
78 | unsigned long flags; |
79 | |
80 | local_irq_save(flags); |
81 | __default_send_IPI_dest_field(mask: apicid, vector, |
82 | APIC_DEST_PHYSICAL); |
83 | local_irq_restore(flags); |
84 | preempt_enable(); |
85 | return; |
86 | } |
87 | preempt_enable(); |
88 | |
89 | dmode = (vector == NMI_VECTOR) ? APIC_DM_NMI : APIC_DM_FIXED; |
90 | numachip_apic_icr_write(apicid, dmode | vector); |
91 | } |
92 | |
93 | static void numachip_send_IPI_mask(const struct cpumask *mask, int vector) |
94 | { |
95 | unsigned int cpu; |
96 | |
97 | for_each_cpu(cpu, mask) |
98 | numachip_send_IPI_one(cpu, vector); |
99 | } |
100 | |
101 | static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask, |
102 | int vector) |
103 | { |
104 | unsigned int this_cpu = smp_processor_id(); |
105 | unsigned int cpu; |
106 | |
107 | for_each_cpu(cpu, mask) { |
108 | if (cpu != this_cpu) |
109 | numachip_send_IPI_one(cpu, vector); |
110 | } |
111 | } |
112 | |
113 | static void numachip_send_IPI_allbutself(int vector) |
114 | { |
115 | unsigned int this_cpu = smp_processor_id(); |
116 | unsigned int cpu; |
117 | |
118 | for_each_online_cpu(cpu) { |
119 | if (cpu != this_cpu) |
120 | numachip_send_IPI_one(cpu, vector); |
121 | } |
122 | } |
123 | |
124 | static void numachip_send_IPI_all(int vector) |
125 | { |
126 | numachip_send_IPI_mask(cpu_online_mask, vector); |
127 | } |
128 | |
129 | static void numachip_send_IPI_self(int vector) |
130 | { |
131 | apic_write(APIC_SELF_IPI, val: vector); |
132 | } |
133 | |
134 | static int __init numachip1_probe(void) |
135 | { |
136 | return apic == &apic_numachip1; |
137 | } |
138 | |
139 | static int __init numachip2_probe(void) |
140 | { |
141 | return apic == &apic_numachip2; |
142 | } |
143 | |
144 | static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) |
145 | { |
146 | u64 val; |
147 | u32 nodes = 1; |
148 | |
149 | c->topo.llc_id = node; |
150 | |
151 | /* Account for nodes per socket in multi-core-module processors */ |
152 | if (boot_cpu_has(X86_FEATURE_NODEID_MSR)) { |
153 | rdmsrl(MSR_FAM10H_NODE_ID, val); |
154 | nodes = ((val >> 3) & 7) + 1; |
155 | } |
156 | |
157 | c->topo.pkg_id = node / nodes; |
158 | } |
159 | |
160 | static int __init numachip_system_init(void) |
161 | { |
162 | /* Map the LCSR area and set up the apic_icr_write function */ |
163 | switch (numachip_system) { |
164 | case 1: |
165 | init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE); |
166 | numachip_apic_icr_write = numachip1_apic_icr_write; |
167 | break; |
168 | case 2: |
169 | init_extra_mapping_uc(NUMACHIP2_LCSR_BASE, NUMACHIP2_LCSR_SIZE); |
170 | numachip_apic_icr_write = numachip2_apic_icr_write; |
171 | break; |
172 | default: |
173 | return 0; |
174 | } |
175 | |
176 | x86_cpuinit.fixup_cpu_id = fixup_cpu_id; |
177 | x86_init.pci.arch_init = pci_numachip_init; |
178 | |
179 | return 0; |
180 | } |
181 | early_initcall(numachip_system_init); |
182 | |
183 | static int numachip1_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
184 | { |
185 | if ((strncmp(oem_id, "NUMASC" , 6) != 0) || |
186 | (strncmp(oem_table_id, "NCONNECT" , 8) != 0)) |
187 | return 0; |
188 | |
189 | numachip_system = 1; |
190 | |
191 | return 1; |
192 | } |
193 | |
194 | static int numachip2_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
195 | { |
196 | if ((strncmp(oem_id, "NUMASC" , 6) != 0) || |
197 | (strncmp(oem_table_id, "NCONECT2" , 8) != 0)) |
198 | return 0; |
199 | |
200 | numachip_system = 2; |
201 | |
202 | return 1; |
203 | } |
204 | |
205 | static const struct apic apic_numachip1 __refconst = { |
206 | .name = "NumaConnect system" , |
207 | .probe = numachip1_probe, |
208 | .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, |
209 | |
210 | .dest_mode_logical = false, |
211 | |
212 | .disable_esr = 0, |
213 | |
214 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
215 | |
216 | .max_apic_id = UINT_MAX, |
217 | .get_apic_id = numachip1_get_apic_id, |
218 | |
219 | .calc_dest_apicid = apic_default_calc_apicid, |
220 | |
221 | .send_IPI = numachip_send_IPI_one, |
222 | .send_IPI_mask = numachip_send_IPI_mask, |
223 | .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself, |
224 | .send_IPI_allbutself = numachip_send_IPI_allbutself, |
225 | .send_IPI_all = numachip_send_IPI_all, |
226 | .send_IPI_self = numachip_send_IPI_self, |
227 | |
228 | .wakeup_secondary_cpu = numachip_wakeup_secondary, |
229 | |
230 | .read = native_apic_mem_read, |
231 | .write = native_apic_mem_write, |
232 | .eoi = native_apic_mem_eoi, |
233 | .icr_read = native_apic_icr_read, |
234 | .icr_write = native_apic_icr_write, |
235 | }; |
236 | |
237 | apic_driver(apic_numachip1); |
238 | |
239 | static const struct apic apic_numachip2 __refconst = { |
240 | .name = "NumaConnect2 system" , |
241 | .probe = numachip2_probe, |
242 | .acpi_madt_oem_check = numachip2_acpi_madt_oem_check, |
243 | |
244 | .dest_mode_logical = false, |
245 | |
246 | .disable_esr = 0, |
247 | |
248 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
249 | |
250 | .max_apic_id = UINT_MAX, |
251 | .get_apic_id = numachip2_get_apic_id, |
252 | |
253 | .calc_dest_apicid = apic_default_calc_apicid, |
254 | |
255 | .send_IPI = numachip_send_IPI_one, |
256 | .send_IPI_mask = numachip_send_IPI_mask, |
257 | .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself, |
258 | .send_IPI_allbutself = numachip_send_IPI_allbutself, |
259 | .send_IPI_all = numachip_send_IPI_all, |
260 | .send_IPI_self = numachip_send_IPI_self, |
261 | |
262 | .wakeup_secondary_cpu = numachip_wakeup_secondary, |
263 | |
264 | .read = native_apic_mem_read, |
265 | .write = native_apic_mem_write, |
266 | .eoi = native_apic_mem_eoi, |
267 | .icr_read = native_apic_icr_read, |
268 | .icr_write = native_apic_icr_write, |
269 | }; |
270 | |
271 | apic_driver(apic_numachip2); |
272 | |