1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * HyperV Detection code. |
4 | * |
5 | * Copyright (C) 2010, Novell, Inc. |
6 | * Author : K. Y. Srinivasan <ksrinivasan@novell.com> |
7 | */ |
8 | |
9 | #include <linux/types.h> |
10 | #include <linux/time.h> |
11 | #include <linux/clocksource.h> |
12 | #include <linux/init.h> |
13 | #include <linux/export.h> |
14 | #include <linux/hardirq.h> |
15 | #include <linux/efi.h> |
16 | #include <linux/interrupt.h> |
17 | #include <linux/irq.h> |
18 | #include <linux/kexec.h> |
19 | #include <linux/i8253.h> |
20 | #include <linux/random.h> |
21 | #include <asm/processor.h> |
22 | #include <asm/hypervisor.h> |
23 | #include <asm/hyperv-tlfs.h> |
24 | #include <asm/mshyperv.h> |
25 | #include <asm/desc.h> |
26 | #include <asm/idtentry.h> |
27 | #include <asm/irq_regs.h> |
28 | #include <asm/i8259.h> |
29 | #include <asm/apic.h> |
30 | #include <asm/timer.h> |
31 | #include <asm/reboot.h> |
32 | #include <asm/nmi.h> |
33 | #include <clocksource/hyperv_timer.h> |
34 | #include <asm/numa.h> |
35 | #include <asm/svm.h> |
36 | |
37 | /* Is Linux running as the root partition? */ |
38 | bool hv_root_partition; |
39 | /* Is Linux running on nested Microsoft Hypervisor */ |
40 | bool hv_nested; |
41 | struct ms_hyperv_info ms_hyperv; |
42 | |
43 | /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */ |
44 | bool hyperv_paravisor_present __ro_after_init; |
45 | EXPORT_SYMBOL_GPL(hyperv_paravisor_present); |
46 | |
47 | #if IS_ENABLED(CONFIG_HYPERV) |
48 | static inline unsigned int hv_get_nested_msr(unsigned int reg) |
49 | { |
50 | if (hv_is_sint_msr(reg)) |
51 | return reg - HV_X64_MSR_SINT0 + HV_X64_MSR_NESTED_SINT0; |
52 | |
53 | switch (reg) { |
54 | case HV_X64_MSR_SIMP: |
55 | return HV_X64_MSR_NESTED_SIMP; |
56 | case HV_X64_MSR_SIEFP: |
57 | return HV_X64_MSR_NESTED_SIEFP; |
58 | case HV_X64_MSR_SVERSION: |
59 | return HV_X64_MSR_NESTED_SVERSION; |
60 | case HV_X64_MSR_SCONTROL: |
61 | return HV_X64_MSR_NESTED_SCONTROL; |
62 | case HV_X64_MSR_EOM: |
63 | return HV_X64_MSR_NESTED_EOM; |
64 | default: |
65 | return reg; |
66 | } |
67 | } |
68 | |
69 | u64 hv_get_non_nested_msr(unsigned int reg) |
70 | { |
71 | u64 value; |
72 | |
73 | if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) |
74 | hv_ivm_msr_read(msr: reg, value: &value); |
75 | else |
76 | rdmsrl(reg, value); |
77 | return value; |
78 | } |
79 | EXPORT_SYMBOL_GPL(hv_get_non_nested_msr); |
80 | |
81 | void hv_set_non_nested_msr(unsigned int reg, u64 value) |
82 | { |
83 | if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) { |
84 | hv_ivm_msr_write(msr: reg, value); |
85 | |
86 | /* Write proxy bit via wrmsl instruction */ |
87 | if (hv_is_sint_msr(reg)) |
88 | wrmsrl(msr: reg, val: value | 1 << 20); |
89 | } else { |
90 | wrmsrl(msr: reg, val: value); |
91 | } |
92 | } |
93 | EXPORT_SYMBOL_GPL(hv_set_non_nested_msr); |
94 | |
95 | u64 hv_get_msr(unsigned int reg) |
96 | { |
97 | if (hv_nested) |
98 | reg = hv_get_nested_msr(reg); |
99 | |
100 | return hv_get_non_nested_msr(reg); |
101 | } |
102 | EXPORT_SYMBOL_GPL(hv_get_msr); |
103 | |
104 | void hv_set_msr(unsigned int reg, u64 value) |
105 | { |
106 | if (hv_nested) |
107 | reg = hv_get_nested_msr(reg); |
108 | |
109 | hv_set_non_nested_msr(reg, value); |
110 | } |
111 | EXPORT_SYMBOL_GPL(hv_set_msr); |
112 | |
113 | static void (*vmbus_handler)(void); |
114 | static void (*hv_stimer0_handler)(void); |
115 | static void (*hv_kexec_handler)(void); |
116 | static void (*hv_crash_handler)(struct pt_regs *regs); |
117 | |
118 | DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback) |
119 | { |
120 | struct pt_regs *old_regs = set_irq_regs(regs); |
121 | |
122 | inc_irq_stat(irq_hv_callback_count); |
123 | if (vmbus_handler) |
124 | vmbus_handler(); |
125 | |
126 | if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) |
127 | apic_eoi(); |
128 | |
129 | set_irq_regs(old_regs); |
130 | } |
131 | |
132 | void hv_setup_vmbus_handler(void (*handler)(void)) |
133 | { |
134 | vmbus_handler = handler; |
135 | } |
136 | |
137 | void hv_remove_vmbus_handler(void) |
138 | { |
139 | /* We have no way to deallocate the interrupt gate */ |
140 | vmbus_handler = NULL; |
141 | } |
142 | |
143 | /* |
144 | * Routines to do per-architecture handling of stimer0 |
145 | * interrupts when in Direct Mode |
146 | */ |
147 | DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0) |
148 | { |
149 | struct pt_regs *old_regs = set_irq_regs(regs); |
150 | |
151 | inc_irq_stat(hyperv_stimer0_count); |
152 | if (hv_stimer0_handler) |
153 | hv_stimer0_handler(); |
154 | add_interrupt_randomness(HYPERV_STIMER0_VECTOR); |
155 | apic_eoi(); |
156 | |
157 | set_irq_regs(old_regs); |
158 | } |
159 | |
160 | /* For x86/x64, override weak placeholders in hyperv_timer.c */ |
161 | void hv_setup_stimer0_handler(void (*handler)(void)) |
162 | { |
163 | hv_stimer0_handler = handler; |
164 | } |
165 | |
166 | void hv_remove_stimer0_handler(void) |
167 | { |
168 | /* We have no way to deallocate the interrupt gate */ |
169 | hv_stimer0_handler = NULL; |
170 | } |
171 | |
172 | void hv_setup_kexec_handler(void (*handler)(void)) |
173 | { |
174 | hv_kexec_handler = handler; |
175 | } |
176 | |
177 | void hv_remove_kexec_handler(void) |
178 | { |
179 | hv_kexec_handler = NULL; |
180 | } |
181 | |
182 | void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) |
183 | { |
184 | hv_crash_handler = handler; |
185 | } |
186 | |
187 | void hv_remove_crash_handler(void) |
188 | { |
189 | hv_crash_handler = NULL; |
190 | } |
191 | |
192 | #ifdef CONFIG_KEXEC_CORE |
193 | static void hv_machine_shutdown(void) |
194 | { |
195 | if (kexec_in_progress && hv_kexec_handler) |
196 | hv_kexec_handler(); |
197 | |
198 | /* |
199 | * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor |
200 | * corrupts the old VP Assist Pages and can crash the kexec kernel. |
201 | */ |
202 | if (kexec_in_progress && hyperv_init_cpuhp > 0) |
203 | cpuhp_remove_state(state: hyperv_init_cpuhp); |
204 | |
205 | /* The function calls stop_other_cpus(). */ |
206 | native_machine_shutdown(); |
207 | |
208 | /* Disable the hypercall page when there is only 1 active CPU. */ |
209 | if (kexec_in_progress) |
210 | hyperv_cleanup(); |
211 | } |
212 | #endif /* CONFIG_KEXEC_CORE */ |
213 | |
214 | #ifdef CONFIG_CRASH_DUMP |
215 | static void hv_machine_crash_shutdown(struct pt_regs *regs) |
216 | { |
217 | if (hv_crash_handler) |
218 | hv_crash_handler(regs); |
219 | |
220 | /* The function calls crash_smp_send_stop(). */ |
221 | native_machine_crash_shutdown(regs); |
222 | |
223 | /* Disable the hypercall page when there is only 1 active CPU. */ |
224 | hyperv_cleanup(); |
225 | } |
226 | #endif /* CONFIG_CRASH_DUMP */ |
227 | #endif /* CONFIG_HYPERV */ |
228 | |
229 | static uint32_t __init ms_hyperv_platform(void) |
230 | { |
231 | u32 eax; |
232 | u32 hyp_signature[3]; |
233 | |
234 | if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) |
235 | return 0; |
236 | |
237 | cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, |
238 | eax: &eax, ebx: &hyp_signature[0], ecx: &hyp_signature[1], edx: &hyp_signature[2]); |
239 | |
240 | if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX || |
241 | memcmp(p: "Microsoft Hv" , q: hyp_signature, size: 12)) |
242 | return 0; |
243 | |
244 | /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */ |
245 | eax = cpuid_eax(HYPERV_CPUID_FEATURES); |
246 | if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) { |
247 | pr_warn("x86/hyperv: HYPERCALL MSR not available.\n" ); |
248 | return 0; |
249 | } |
250 | if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) { |
251 | pr_warn("x86/hyperv: VP_INDEX MSR not available.\n" ); |
252 | return 0; |
253 | } |
254 | |
255 | return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS; |
256 | } |
257 | |
258 | #ifdef CONFIG_X86_LOCAL_APIC |
259 | /* |
260 | * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes |
261 | * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle |
262 | * unknown NMI on the first CPU which gets it. |
263 | */ |
264 | static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) |
265 | { |
266 | static atomic_t nmi_cpu = ATOMIC_INIT(-1); |
267 | unsigned int old_cpu, this_cpu; |
268 | |
269 | if (!unknown_nmi_panic) |
270 | return NMI_DONE; |
271 | |
272 | old_cpu = -1; |
273 | this_cpu = raw_smp_processor_id(); |
274 | if (!atomic_try_cmpxchg(v: &nmi_cpu, old: &old_cpu, new: this_cpu)) |
275 | return NMI_HANDLED; |
276 | |
277 | return NMI_DONE; |
278 | } |
279 | #endif |
280 | |
281 | static unsigned long hv_get_tsc_khz(void) |
282 | { |
283 | unsigned long freq; |
284 | |
285 | rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); |
286 | |
287 | return freq / 1000; |
288 | } |
289 | |
290 | #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV) |
291 | static void __init hv_smp_prepare_boot_cpu(void) |
292 | { |
293 | native_smp_prepare_boot_cpu(); |
294 | #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS) |
295 | hv_init_spinlocks(); |
296 | #endif |
297 | } |
298 | |
299 | static void __init hv_smp_prepare_cpus(unsigned int max_cpus) |
300 | { |
301 | #ifdef CONFIG_X86_64 |
302 | int i; |
303 | int ret; |
304 | #endif |
305 | |
306 | native_smp_prepare_cpus(max_cpus); |
307 | |
308 | /* |
309 | * Override wakeup_secondary_cpu_64 callback for SEV-SNP |
310 | * enlightened guest. |
311 | */ |
312 | if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) { |
313 | apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap; |
314 | return; |
315 | } |
316 | |
317 | #ifdef CONFIG_X86_64 |
318 | for_each_present_cpu(i) { |
319 | if (i == 0) |
320 | continue; |
321 | ret = hv_call_add_logical_proc(node: numa_cpu_node(cpu: i), lp_index: i, cpu_physical_id(i)); |
322 | BUG_ON(ret); |
323 | } |
324 | |
325 | for_each_present_cpu(i) { |
326 | if (i == 0) |
327 | continue; |
328 | ret = hv_call_create_vp(node: numa_cpu_node(cpu: i), partition_id: hv_current_partition_id, vp_index: i, flags: i); |
329 | BUG_ON(ret); |
330 | } |
331 | #endif |
332 | } |
333 | #endif |
334 | |
335 | /* |
336 | * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the |
337 | * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0 |
338 | * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns |
339 | * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a |
340 | * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and |
341 | * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs |
342 | * from the array and hence doesn't create the necessary irq description info. |
343 | * |
344 | * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here, |
345 | * except don't change 'legacy_pic', which keeps its default value |
346 | * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero |
347 | * nr_legacy_irqs() and eventually serial console interrupts works properly. |
348 | */ |
349 | static void __init reduced_hw_init(void) |
350 | { |
351 | x86_init.timers.timer_init = x86_init_noop; |
352 | x86_init.irqs.pre_vector_init = x86_init_noop; |
353 | } |
354 | |
355 | int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) |
356 | { |
357 | unsigned int hv_max_functions; |
358 | |
359 | hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS); |
360 | if (hv_max_functions < HYPERV_CPUID_VERSION) { |
361 | pr_err("%s: Could not detect Hyper-V version\n" , __func__); |
362 | return -ENODEV; |
363 | } |
364 | |
365 | cpuid(HYPERV_CPUID_VERSION, eax: &info->eax, ebx: &info->ebx, ecx: &info->ecx, edx: &info->edx); |
366 | |
367 | return 0; |
368 | } |
369 | |
370 | static void __init ms_hyperv_init_platform(void) |
371 | { |
372 | int hv_max_functions_eax; |
373 | |
374 | #ifdef CONFIG_PARAVIRT |
375 | pv_info.name = "Hyper-V" ; |
376 | #endif |
377 | |
378 | /* |
379 | * Extract the features and hints |
380 | */ |
381 | ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES); |
382 | ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES); |
383 | ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES); |
384 | ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO); |
385 | |
386 | hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS); |
387 | |
388 | pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n" , |
389 | ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints, |
390 | ms_hyperv.misc_features); |
391 | |
392 | ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS); |
393 | ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS); |
394 | |
395 | pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n" , |
396 | ms_hyperv.max_vp_index, ms_hyperv.max_lp_index); |
397 | |
398 | /* |
399 | * Check CPU management privilege. |
400 | * |
401 | * To mirror what Windows does we should extract CPU management |
402 | * features and use the ReservedIdentityBit to detect if Linux is the |
403 | * root partition. But that requires negotiating CPU management |
404 | * interface (a process to be finalized). For now, use the privilege |
405 | * flag as the indicator for running as root. |
406 | * |
407 | * Hyper-V should never specify running as root and as a Confidential |
408 | * VM. But to protect against a compromised/malicious Hyper-V trying |
409 | * to exploit root behavior to expose Confidential VM memory, ignore |
410 | * the root partition setting if also a Confidential VM. |
411 | */ |
412 | if ((ms_hyperv.priv_high & HV_CPU_MANAGEMENT) && |
413 | !(ms_hyperv.priv_high & HV_ISOLATION)) { |
414 | hv_root_partition = true; |
415 | pr_info("Hyper-V: running as root partition\n" ); |
416 | } |
417 | |
418 | if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) { |
419 | hv_nested = true; |
420 | pr_info("Hyper-V: running on a nested hypervisor\n" ); |
421 | } |
422 | |
423 | if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && |
424 | ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { |
425 | x86_platform.calibrate_tsc = hv_get_tsc_khz; |
426 | x86_platform.calibrate_cpu = hv_get_tsc_khz; |
427 | } |
428 | |
429 | if (ms_hyperv.priv_high & HV_ISOLATION) { |
430 | ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG); |
431 | ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG); |
432 | |
433 | if (ms_hyperv.shared_gpa_boundary_active) |
434 | ms_hyperv.shared_gpa_boundary = |
435 | BIT_ULL(ms_hyperv.shared_gpa_boundary_bits); |
436 | |
437 | hyperv_paravisor_present = !!ms_hyperv.paravisor_present; |
438 | |
439 | pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n" , |
440 | ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b); |
441 | |
442 | |
443 | if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) { |
444 | static_branch_enable(&isolation_type_snp); |
445 | } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) { |
446 | static_branch_enable(&isolation_type_tdx); |
447 | |
448 | /* A TDX VM must use x2APIC and doesn't use lazy EOI. */ |
449 | ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED; |
450 | |
451 | if (!ms_hyperv.paravisor_present) { |
452 | /* To be supported: more work is required. */ |
453 | ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE; |
454 | |
455 | /* HV_MSR_CRASH_CTL is unsupported. */ |
456 | ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE; |
457 | |
458 | /* Don't trust Hyper-V's TLB-flushing hypercalls. */ |
459 | ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED; |
460 | |
461 | x86_init.acpi.reduced_hw_early_init = reduced_hw_init; |
462 | } |
463 | } |
464 | } |
465 | |
466 | if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) { |
467 | ms_hyperv.nested_features = |
468 | cpuid_eax(HYPERV_CPUID_NESTED_FEATURES); |
469 | pr_info("Hyper-V: Nested features: 0x%x\n" , |
470 | ms_hyperv.nested_features); |
471 | } |
472 | |
473 | #ifdef CONFIG_X86_LOCAL_APIC |
474 | if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && |
475 | ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { |
476 | /* |
477 | * Get the APIC frequency. |
478 | */ |
479 | u64 hv_lapic_frequency; |
480 | |
481 | rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); |
482 | hv_lapic_frequency = div_u64(dividend: hv_lapic_frequency, HZ); |
483 | lapic_timer_period = hv_lapic_frequency; |
484 | pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n" , |
485 | lapic_timer_period); |
486 | } |
487 | |
488 | register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, |
489 | "hv_nmi_unknown" ); |
490 | #endif |
491 | |
492 | #ifdef CONFIG_X86_IO_APIC |
493 | no_timer_check = 1; |
494 | #endif |
495 | |
496 | #if IS_ENABLED(CONFIG_HYPERV) |
497 | #if defined(CONFIG_KEXEC_CORE) |
498 | machine_ops.shutdown = hv_machine_shutdown; |
499 | #endif |
500 | #if defined(CONFIG_CRASH_DUMP) |
501 | machine_ops.crash_shutdown = hv_machine_crash_shutdown; |
502 | #endif |
503 | #endif |
504 | if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) { |
505 | /* |
506 | * Writing to synthetic MSR 0x40000118 updates/changes the |
507 | * guest visible CPUIDs. Setting bit 0 of this MSR enables |
508 | * guests to report invariant TSC feature through CPUID |
509 | * instruction, CPUID 0x800000007/EDX, bit 8. See code in |
510 | * early_init_intel() where this bit is examined. The |
511 | * setting of this MSR bit should happen before init_intel() |
512 | * is called. |
513 | */ |
514 | wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC); |
515 | setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); |
516 | } |
517 | |
518 | /* |
519 | * Generation 2 instances don't support reading the NMI status from |
520 | * 0x61 port. |
521 | */ |
522 | if (efi_enabled(EFI_BOOT)) |
523 | x86_platform.get_nmi_reason = hv_get_nmi_reason; |
524 | |
525 | /* |
526 | * Hyper-V VMs have a PIT emulation quirk such that zeroing the |
527 | * counter register during PIT shutdown restarts the PIT. So it |
528 | * continues to interrupt @18.2 HZ. Setting i8253_clear_counter |
529 | * to false tells pit_shutdown() not to zero the counter so that |
530 | * the PIT really is shutdown. Generation 2 VMs don't have a PIT, |
531 | * and setting this value has no effect. |
532 | */ |
533 | i8253_clear_counter_on_shutdown = false; |
534 | |
535 | #if IS_ENABLED(CONFIG_HYPERV) |
536 | if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) || |
537 | ms_hyperv.paravisor_present) |
538 | hv_vtom_init(); |
539 | /* |
540 | * Setup the hook to get control post apic initialization. |
541 | */ |
542 | x86_platform.apic_post_init = hyperv_init; |
543 | hyperv_setup_mmu_ops(); |
544 | |
545 | /* Install system interrupt handler for hypervisor callback */ |
546 | sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback); |
547 | |
548 | /* Install system interrupt handler for reenlightenment notifications */ |
549 | if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) { |
550 | sysvec_install(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment); |
551 | } |
552 | |
553 | /* Install system interrupt handler for stimer0 */ |
554 | if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) { |
555 | sysvec_install(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0); |
556 | } |
557 | |
558 | # ifdef CONFIG_SMP |
559 | smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; |
560 | if (hv_root_partition || |
561 | (!ms_hyperv.paravisor_present && hv_isolation_type_snp())) |
562 | smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus; |
563 | # endif |
564 | |
565 | /* |
566 | * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, |
567 | * set x2apic destination mode to physical mode when x2apic is available |
568 | * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs |
569 | * have 8-bit APIC id. |
570 | */ |
571 | # ifdef CONFIG_X86_X2APIC |
572 | if (x2apic_supported()) |
573 | x2apic_phys = 1; |
574 | # endif |
575 | |
576 | /* Register Hyper-V specific clocksource */ |
577 | hv_init_clocksource(); |
578 | hv_vtl_init_platform(); |
579 | #endif |
580 | /* |
581 | * TSC should be marked as unstable only after Hyper-V |
582 | * clocksource has been initialized. This ensures that the |
583 | * stability of the sched_clock is not altered. |
584 | */ |
585 | if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) |
586 | mark_tsc_unstable(reason: "running on Hyper-V" ); |
587 | |
588 | hardlockup_detector_disable(); |
589 | } |
590 | |
591 | static bool __init ms_hyperv_x2apic_available(void) |
592 | { |
593 | return x2apic_supported(); |
594 | } |
595 | |
596 | /* |
597 | * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping() |
598 | * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the |
599 | * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg(). |
600 | * |
601 | * Note: for a VM on Hyper-V, the I/O-APIC is the only device which |
602 | * (logically) generates MSIs directly to the system APIC irq domain. |
603 | * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the |
604 | * pci-hyperv host bridge. |
605 | * |
606 | * Note: for a Hyper-V root partition, this will always return false. |
607 | * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by |
608 | * default, they are implemented as intercepts by the Windows Hyper-V stack. |
609 | * Even a nested root partition (L2 root) will not get them because the |
610 | * nested (L1) hypervisor filters them out. |
611 | */ |
612 | static bool __init ms_hyperv_msi_ext_dest_id(void) |
613 | { |
614 | u32 eax; |
615 | |
616 | eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE); |
617 | if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE) |
618 | return false; |
619 | |
620 | eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES); |
621 | return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE; |
622 | } |
623 | |
624 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
625 | static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs) |
626 | { |
627 | /* RAX and CPL are already in the GHCB */ |
628 | ghcb_set_rcx(ghcb, value: regs->cx); |
629 | ghcb_set_rdx(ghcb, value: regs->dx); |
630 | ghcb_set_r8(ghcb, value: regs->r8); |
631 | } |
632 | |
633 | static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs) |
634 | { |
635 | /* No checking of the return state needed */ |
636 | return true; |
637 | } |
638 | #endif |
639 | |
640 | const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { |
641 | .name = "Microsoft Hyper-V" , |
642 | .detect = ms_hyperv_platform, |
643 | .type = X86_HYPER_MS_HYPERV, |
644 | .init.x2apic_available = ms_hyperv_x2apic_available, |
645 | .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id, |
646 | .init.init_platform = ms_hyperv_init_platform, |
647 | .init.guest_late_init = ms_hyperv_late_init, |
648 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
649 | .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare, |
650 | .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish, |
651 | #endif |
652 | }; |
653 | |