1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Bluetooth Software UART Qualcomm protocol
4	*
5	* HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6	* protocol extension to H4.
7	*
8	* Copyright (C) 2007 Texas Instruments, Inc.
9	* Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10	*
11	* Acknowledgements:
12	* This file is based on hci_ll.c, which was...
13	* Written by Ohad Ben-Cohen <ohad@bencohen.org>
14	* which was in turn based on hci_h4.c, which was written
15	* by Maxim Krasnyansky and Marcel Holtmann.
16	*/
17
18	#include <linux/kernel.h>
19	#include <linux/clk.h>
20	#include <linux/completion.h>
21	#include <linux/debugfs.h>
22	#include <linux/delay.h>
23	#include <linux/devcoredump.h>
24	#include <linux/device.h>
25	#include <linux/gpio/consumer.h>
26	#include <linux/mod_devicetable.h>
27	#include <linux/module.h>
28	#include <linux/of.h>
29	#include <linux/acpi.h>
30	#include <linux/platform_device.h>
31	#include <linux/regulator/consumer.h>
32	#include <linux/serdev.h>
33	#include <linux/mutex.h>
34	#include <asm/unaligned.h>
35
36	#include <net/bluetooth/bluetooth.h>
37	#include <net/bluetooth/hci_core.h>
38
39	#include "hci_uart.h"
40	#include "btqca.h"
41
42	/* HCI_IBS protocol messages */
43	#define HCI_IBS_SLEEP_IND 0xFE
44	#define HCI_IBS_WAKE_IND 0xFD
45	#define HCI_IBS_WAKE_ACK 0xFC
46	#define HCI_MAX_IBS_SIZE 10
47
48	#define IBS_WAKE_RETRANS_TIMEOUT_MS 100
49	#define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
50	#define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
51	#define CMD_TRANS_TIMEOUT_MS 100
52	#define MEMDUMP_TIMEOUT_MS 8000
53	#define IBS_DISABLE_SSR_TIMEOUT_MS \
54	(MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55	#define FW_DOWNLOAD_TIMEOUT_MS 3000
56
57	/* susclk rate */
58	#define SUSCLK_RATE_32KHZ 32768
59
60	/* Controller debug log header */
61	#define QCA_DEBUG_HANDLE 0x2EDC
62
63	/* max retry count when init fails */
64	#define MAX_INIT_RETRIES 3
65
66	/* Controller dump header */
67	#define QCA_SSR_DUMP_HANDLE 0x0108
68	#define QCA_DUMP_PACKET_SIZE 255
69	#define QCA_LAST_SEQUENCE_NUM 0xFFFF
70	#define QCA_CRASHBYTE_PACKET_LEN 1096
71	#define QCA_MEMDUMP_BYTE 0xFB
72
73	enum qca_flags {
74	QCA_IBS_DISABLED,
75	QCA_DROP_VENDOR_EVENT,
76	QCA_SUSPENDING,
77	QCA_MEMDUMP_COLLECTION,
78	QCA_HW_ERROR_EVENT,
79	QCA_SSR_TRIGGERED,
80	QCA_BT_OFF,
81	QCA_ROM_FW,
82	QCA_DEBUGFS_CREATED,
83	};
84
85	enum qca_capabilities {
86	QCA_CAP_WIDEBAND_SPEECH = BIT(0),
87	QCA_CAP_VALID_LE_STATES = BIT(1),
88	};
89
90	/* HCI_IBS transmit side sleep protocol states */
91	enum tx_ibs_states {
92	HCI_IBS_TX_ASLEEP,
93	HCI_IBS_TX_WAKING,
94	HCI_IBS_TX_AWAKE,
95	};
96
97	/* HCI_IBS receive side sleep protocol states */
98	enum rx_states {
99	HCI_IBS_RX_ASLEEP,
100	HCI_IBS_RX_AWAKE,
101	};
102
103	/* HCI_IBS transmit and receive side clock state vote */
104	enum hci_ibs_clock_state_vote {
105	HCI_IBS_VOTE_STATS_UPDATE,
106	HCI_IBS_TX_VOTE_CLOCK_ON,
107	HCI_IBS_TX_VOTE_CLOCK_OFF,
108	HCI_IBS_RX_VOTE_CLOCK_ON,
109	HCI_IBS_RX_VOTE_CLOCK_OFF,
110	};
111
112	/* Controller memory dump states */
113	enum qca_memdump_states {
114	QCA_MEMDUMP_IDLE,
115	QCA_MEMDUMP_COLLECTING,
116	QCA_MEMDUMP_COLLECTED,
117	QCA_MEMDUMP_TIMEOUT,
118	};
119
120	struct qca_memdump_info {
121	u32 current_seq_no;
122	u32 received_dump;
123	u32 ram_dump_size;
124	};
125
126	struct qca_memdump_event_hdr {
127	__u8 evt;
128	__u8 plen;
129	__u16 opcode;
130	__le16 seq_no;
131	__u8 reserved;
132	} __packed;
133
134
135	struct qca_dump_size {
136	__le32 dump_size;
137	} __packed;
138
139	struct qca_data {
140	struct hci_uart *hu;
141	struct sk_buff *rx_skb;
142	struct sk_buff_head txq;
143	struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
144	struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
145	spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
146	u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
147	u8 rx_ibs_state; /* HCI_IBS receive side power state */
148	bool tx_vote; /* Clock must be on for TX */
149	bool rx_vote; /* Clock must be on for RX */
150	struct timer_list tx_idle_timer;
151	u32 tx_idle_delay;
152	struct timer_list wake_retrans_timer;
153	u32 wake_retrans;
154	struct workqueue_struct *workqueue;
155	struct work_struct ws_awake_rx;
156	struct work_struct ws_awake_device;
157	struct work_struct ws_rx_vote_off;
158	struct work_struct ws_tx_vote_off;
159	struct work_struct ctrl_memdump_evt;
160	struct delayed_work ctrl_memdump_timeout;
161	struct qca_memdump_info *qca_memdump;
162	unsigned long flags;
163	struct completion drop_ev_comp;
164	wait_queue_head_t suspend_wait_q;
165	enum qca_memdump_states memdump_state;
166	struct mutex hci_memdump_lock;
167
168	u16 fw_version;
169	u16 controller_id;
170	/* For debugging purpose */
171	u64 ibs_sent_wacks;
172	u64 ibs_sent_slps;
173	u64 ibs_sent_wakes;
174	u64 ibs_recv_wacks;
175	u64 ibs_recv_slps;
176	u64 ibs_recv_wakes;
177	u64 vote_last_jif;
178	u32 vote_on_ms;
179	u32 vote_off_ms;
180	u64 tx_votes_on;
181	u64 rx_votes_on;
182	u64 tx_votes_off;
183	u64 rx_votes_off;
184	u64 votes_on;
185	u64 votes_off;
186	};
187
188	enum qca_speed_type {
189	QCA_INIT_SPEED = 1,
190	QCA_OPER_SPEED
191	};
192
193	/*
194	* Voltage regulator information required for configuring the
195	* QCA Bluetooth chipset
196	*/
197	struct qca_vreg {
198	const char *name;
199	unsigned int load_uA;
200	};
201
202	struct qca_device_data {
203	enum qca_btsoc_type soc_type;
204	struct qca_vreg *vregs;
205	size_t num_vregs;
206	uint32_t capabilities;
207	};
208
209	/*
210	* Platform data for the QCA Bluetooth power driver.
211	*/
212	struct qca_power {
213	struct device *dev;
214	struct regulator_bulk_data *vreg_bulk;
215	int num_vregs;
216	bool vregs_on;
217	};
218
219	struct qca_serdev {
220	struct hci_uart serdev_hu;
221	struct gpio_desc *bt_en;
222	struct gpio_desc *sw_ctrl;
223	struct clk *susclk;
224	enum qca_btsoc_type btsoc_type;
225	struct qca_power *bt_power;
226	u32 init_speed;
227	u32 oper_speed;
228	bool bdaddr_property_broken;
229	const char *firmware_name;
230	};
231
232	static int qca_regulator_enable(struct qca_serdev *qcadev);
233	static void qca_regulator_disable(struct qca_serdev *qcadev);
234	static void qca_power_shutdown(struct hci_uart *hu);
235	static int qca_power_off(struct hci_dev *hdev);
236	static void qca_controller_memdump(struct work_struct *work);
237	static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
238
239	static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
240	{
241	enum qca_btsoc_type soc_type;
242
243	if (hu->serdev) {
244	struct qca_serdev *qsd = serdev_device_get_drvdata(serdev: hu->serdev);
245
246	soc_type = qsd->btsoc_type;
247	} else {
248	soc_type = QCA_ROME;
249	}
250
251	return soc_type;
252	}
253
254	static const char *qca_get_firmware_name(struct hci_uart *hu)
255	{
256	if (hu->serdev) {
257	struct qca_serdev *qsd = serdev_device_get_drvdata(serdev: hu->serdev);
258
259	return qsd->firmware_name;
260	} else {
261	return NULL;
262	}
263	}
264
265	static void __serial_clock_on(struct tty_struct *tty)
266	{
267	/* TODO: Some chipset requires to enable UART clock on client
268	* side to save power consumption or manual work is required.
269	* Please put your code to control UART clock here if needed
270	*/
271	}
272
273	static void __serial_clock_off(struct tty_struct *tty)
274	{
275	/* TODO: Some chipset requires to disable UART clock on client
276	* side to save power consumption or manual work is required.
277	* Please put your code to control UART clock off here if needed
278	*/
279	}
280
281	/* serial_clock_vote needs to be called with the ibs lock held */
282	static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
283	{
284	struct qca_data *qca = hu->priv;
285	unsigned int diff;
286
287	bool old_vote = (qca->tx_vote | qca->rx_vote);
288	bool new_vote;
289
290	switch (vote) {
291	case HCI_IBS_VOTE_STATS_UPDATE:
292	diff = jiffies_to_msecs(j: jiffies - qca->vote_last_jif);
293
294	if (old_vote)
295	qca->vote_off_ms += diff;
296	else
297	qca->vote_on_ms += diff;
298	return;
299
300	case HCI_IBS_TX_VOTE_CLOCK_ON:
301	qca->tx_vote = true;
302	qca->tx_votes_on++;
303	break;
304
305	case HCI_IBS_RX_VOTE_CLOCK_ON:
306	qca->rx_vote = true;
307	qca->rx_votes_on++;
308	break;
309
310	case HCI_IBS_TX_VOTE_CLOCK_OFF:
311	qca->tx_vote = false;
312	qca->tx_votes_off++;
313	break;
314
315	case HCI_IBS_RX_VOTE_CLOCK_OFF:
316	qca->rx_vote = false;
317	qca->rx_votes_off++;
318	break;
319
320	default:
321	BT_ERR("Voting irregularity");
322	return;
323	}
324
325	new_vote = qca->rx_vote | qca->tx_vote;
326
327	if (new_vote != old_vote) {
328	if (new_vote)
329	__serial_clock_on(tty: hu->tty);
330	else
331	__serial_clock_off(tty: hu->tty);
332
333	BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
334	vote ? "true" : "false");
335
336	diff = jiffies_to_msecs(j: jiffies - qca->vote_last_jif);
337
338	if (new_vote) {
339	qca->votes_on++;
340	qca->vote_off_ms += diff;
341	} else {
342	qca->votes_off++;
343	qca->vote_on_ms += diff;
344	}
345	qca->vote_last_jif = jiffies;
346	}
347	}
348
349	/* Builds and sends an HCI_IBS command packet.
350	* These are very simple packets with only 1 cmd byte.
351	*/
352	static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
353	{
354	int err = 0;
355	struct sk_buff *skb = NULL;
356	struct qca_data *qca = hu->priv;
357
358	BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
359
360	skb = bt_skb_alloc(len: 1, GFP_ATOMIC);
361	if (!skb) {
362	BT_ERR("Failed to allocate memory for HCI_IBS packet");
363	return -ENOMEM;
364	}
365
366	/* Assign HCI_IBS type */
367	skb_put_u8(skb, val: cmd);
368
369	skb_queue_tail(list: &qca->txq, newsk: skb);
370
371	return err;
372	}
373
374	static void qca_wq_awake_device(struct work_struct *work)
375	{
376	struct qca_data *qca = container_of(work, struct qca_data,
377	ws_awake_device);
378	struct hci_uart *hu = qca->hu;
379	unsigned long retrans_delay;
380	unsigned long flags;
381
382	BT_DBG("hu %p wq awake device", hu);
383
384	/* Vote for serial clock */
385	serial_clock_vote(vote: HCI_IBS_TX_VOTE_CLOCK_ON, hu);
386
387	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
388
389	/* Send wake indication to device */
390	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
391	BT_ERR("Failed to send WAKE to device");
392
393	qca->ibs_sent_wakes++;
394
395	/* Start retransmit timer */
396	retrans_delay = msecs_to_jiffies(m: qca->wake_retrans);
397	mod_timer(timer: &qca->wake_retrans_timer, expires: jiffies + retrans_delay);
398
399	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
400
401	/* Actually send the packets */
402	hci_uart_tx_wakeup(hu);
403	}
404
405	static void qca_wq_awake_rx(struct work_struct *work)
406	{
407	struct qca_data *qca = container_of(work, struct qca_data,
408	ws_awake_rx);
409	struct hci_uart *hu = qca->hu;
410	unsigned long flags;
411
412	BT_DBG("hu %p wq awake rx", hu);
413
414	serial_clock_vote(vote: HCI_IBS_RX_VOTE_CLOCK_ON, hu);
415
416	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
417	qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
418
419	/* Always acknowledge device wake up,
420	* sending IBS message doesn't count as TX ON.
421	*/
422	if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
423	BT_ERR("Failed to acknowledge device wake up");
424
425	qca->ibs_sent_wacks++;
426
427	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
428
429	/* Actually send the packets */
430	hci_uart_tx_wakeup(hu);
431	}
432
433	static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
434	{
435	struct qca_data *qca = container_of(work, struct qca_data,
436	ws_rx_vote_off);
437	struct hci_uart *hu = qca->hu;
438
439	BT_DBG("hu %p rx clock vote off", hu);
440
441	serial_clock_vote(vote: HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
442	}
443
444	static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
445	{
446	struct qca_data *qca = container_of(work, struct qca_data,
447	ws_tx_vote_off);
448	struct hci_uart *hu = qca->hu;
449
450	BT_DBG("hu %p tx clock vote off", hu);
451
452	/* Run HCI tx handling unlocked */
453	hci_uart_tx_wakeup(hu);
454
455	/* Now that message queued to tty driver, vote for tty clocks off.
456	* It is up to the tty driver to pend the clocks off until tx done.
457	*/
458	serial_clock_vote(vote: HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
459	}
460
461	static void hci_ibs_tx_idle_timeout(struct timer_list *t)
462	{
463	struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
464	struct hci_uart *hu = qca->hu;
465	unsigned long flags;
466
467	BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
468
469	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
470	flags, SINGLE_DEPTH_NESTING);
471
472	switch (qca->tx_ibs_state) {
473	case HCI_IBS_TX_AWAKE:
474	/* TX_IDLE, go to SLEEP */
475	if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
476	BT_ERR("Failed to send SLEEP to device");
477	break;
478	}
479	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
480	qca->ibs_sent_slps++;
481	queue_work(wq: qca->workqueue, work: &qca->ws_tx_vote_off);
482	break;
483
484	case HCI_IBS_TX_ASLEEP:
485	case HCI_IBS_TX_WAKING:
486	default:
487	BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
488	break;
489	}
490
491	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
492	}
493
494	static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
495	{
496	struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
497	struct hci_uart *hu = qca->hu;
498	unsigned long flags, retrans_delay;
499	bool retransmit = false;
500
501	BT_DBG("hu %p wake retransmit timeout in %d state",
502	hu, qca->tx_ibs_state);
503
504	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
505	flags, SINGLE_DEPTH_NESTING);
506
507	/* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
508	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
509	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
510	return;
511	}
512
513	switch (qca->tx_ibs_state) {
514	case HCI_IBS_TX_WAKING:
515	/* No WAKE_ACK, retransmit WAKE */
516	retransmit = true;
517	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
518	BT_ERR("Failed to acknowledge device wake up");
519	break;
520	}
521	qca->ibs_sent_wakes++;
522	retrans_delay = msecs_to_jiffies(m: qca->wake_retrans);
523	mod_timer(timer: &qca->wake_retrans_timer, expires: jiffies + retrans_delay);
524	break;
525
526	case HCI_IBS_TX_ASLEEP:
527	case HCI_IBS_TX_AWAKE:
528	default:
529	BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
530	break;
531	}
532
533	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
534
535	if (retransmit)
536	hci_uart_tx_wakeup(hu);
537	}
538
539
540	static void qca_controller_memdump_timeout(struct work_struct *work)
541	{
542	struct qca_data *qca = container_of(work, struct qca_data,
543	ctrl_memdump_timeout.work);
544	struct hci_uart *hu = qca->hu;
545
546	mutex_lock(&qca->hci_memdump_lock);
547	if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
548	qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
549	if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
550	/* Inject hw error event to reset the device
551	* and driver.
552	*/
553	hci_reset_dev(hdev: hu->hdev);
554	}
555	}
556
557	mutex_unlock(lock: &qca->hci_memdump_lock);
558	}
559
560
561	/* Initialize protocol */
562	static int qca_open(struct hci_uart *hu)
563	{
564	struct qca_serdev *qcadev;
565	struct qca_data *qca;
566
567	BT_DBG("hu %p qca_open", hu);
568
569	if (!hci_uart_has_flow_control(hu))
570	return -EOPNOTSUPP;
571
572	qca = kzalloc(size: sizeof(struct qca_data), GFP_KERNEL);
573	if (!qca)
574	return -ENOMEM;
575
576	skb_queue_head_init(list: &qca->txq);
577	skb_queue_head_init(list: &qca->tx_wait_q);
578	skb_queue_head_init(list: &qca->rx_memdump_q);
579	spin_lock_init(&qca->hci_ibs_lock);
580	mutex_init(&qca->hci_memdump_lock);
581	qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
582	if (!qca->workqueue) {
583	BT_ERR("QCA Workqueue not initialized properly");
584	kfree(objp: qca);
585	return -ENOMEM;
586	}
587
588	INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
589	INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
590	INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
591	INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
592	INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
593	INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
594	qca_controller_memdump_timeout);
595	init_waitqueue_head(&qca->suspend_wait_q);
596
597	qca->hu = hu;
598	init_completion(x: &qca->drop_ev_comp);
599
600	/* Assume we start with both sides asleep -- extra wakes OK */
601	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
602	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
603
604	qca->vote_last_jif = jiffies;
605
606	hu->priv = qca;
607
608	if (hu->serdev) {
609	qcadev = serdev_device_get_drvdata(serdev: hu->serdev);
610
611	switch (qcadev->btsoc_type) {
612	case QCA_WCN3988:
613	case QCA_WCN3990:
614	case QCA_WCN3991:
615	case QCA_WCN3998:
616	case QCA_WCN6750:
617	hu->init_speed = qcadev->init_speed;
618	break;
619
620	default:
621	break;
622	}
623
624	if (qcadev->oper_speed)
625	hu->oper_speed = qcadev->oper_speed;
626	}
627
628	timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
629	qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
630
631	timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
632	qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
633
634	BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
635	qca->tx_idle_delay, qca->wake_retrans);
636
637	return 0;
638	}
639
640	static void qca_debugfs_init(struct hci_dev *hdev)
641	{
642	struct hci_uart *hu = hci_get_drvdata(hdev);
643	struct qca_data *qca = hu->priv;
644	struct dentry *ibs_dir;
645	umode_t mode;
646
647	if (!hdev->debugfs)
648	return;
649
650	if (test_and_set_bit(nr: QCA_DEBUGFS_CREATED, addr: &qca->flags))
651	return;
652
653	ibs_dir = debugfs_create_dir(name: "ibs", parent: hdev->debugfs);
654
655	/* read only */
656	mode = 0444;
657	debugfs_create_u8(name: "tx_ibs_state", mode, parent: ibs_dir, value: &qca->tx_ibs_state);
658	debugfs_create_u8(name: "rx_ibs_state", mode, parent: ibs_dir, value: &qca->rx_ibs_state);
659	debugfs_create_u64(name: "ibs_sent_sleeps", mode, parent: ibs_dir,
660	value: &qca->ibs_sent_slps);
661	debugfs_create_u64(name: "ibs_sent_wakes", mode, parent: ibs_dir,
662	value: &qca->ibs_sent_wakes);
663	debugfs_create_u64(name: "ibs_sent_wake_acks", mode, parent: ibs_dir,
664	value: &qca->ibs_sent_wacks);
665	debugfs_create_u64(name: "ibs_recv_sleeps", mode, parent: ibs_dir,
666	value: &qca->ibs_recv_slps);
667	debugfs_create_u64(name: "ibs_recv_wakes", mode, parent: ibs_dir,
668	value: &qca->ibs_recv_wakes);
669	debugfs_create_u64(name: "ibs_recv_wake_acks", mode, parent: ibs_dir,
670	value: &qca->ibs_recv_wacks);
671	debugfs_create_bool(name: "tx_vote", mode, parent: ibs_dir, value: &qca->tx_vote);
672	debugfs_create_u64(name: "tx_votes_on", mode, parent: ibs_dir, value: &qca->tx_votes_on);
673	debugfs_create_u64(name: "tx_votes_off", mode, parent: ibs_dir, value: &qca->tx_votes_off);
674	debugfs_create_bool(name: "rx_vote", mode, parent: ibs_dir, value: &qca->rx_vote);
675	debugfs_create_u64(name: "rx_votes_on", mode, parent: ibs_dir, value: &qca->rx_votes_on);
676	debugfs_create_u64(name: "rx_votes_off", mode, parent: ibs_dir, value: &qca->rx_votes_off);
677	debugfs_create_u64(name: "votes_on", mode, parent: ibs_dir, value: &qca->votes_on);
678	debugfs_create_u64(name: "votes_off", mode, parent: ibs_dir, value: &qca->votes_off);
679	debugfs_create_u32(name: "vote_on_ms", mode, parent: ibs_dir, value: &qca->vote_on_ms);
680	debugfs_create_u32(name: "vote_off_ms", mode, parent: ibs_dir, value: &qca->vote_off_ms);
681
682	/* read/write */
683	mode = 0644;
684	debugfs_create_u32(name: "wake_retrans", mode, parent: ibs_dir, value: &qca->wake_retrans);
685	debugfs_create_u32(name: "tx_idle_delay", mode, parent: ibs_dir,
686	value: &qca->tx_idle_delay);
687	}
688
689	/* Flush protocol data */
690	static int qca_flush(struct hci_uart *hu)
691	{
692	struct qca_data *qca = hu->priv;
693
694	BT_DBG("hu %p qca flush", hu);
695
696	skb_queue_purge(list: &qca->tx_wait_q);
697	skb_queue_purge(list: &qca->txq);
698
699	return 0;
700	}
701
702	/* Close protocol */
703	static int qca_close(struct hci_uart *hu)
704	{
705	struct qca_data *qca = hu->priv;
706
707	BT_DBG("hu %p qca close", hu);
708
709	serial_clock_vote(vote: HCI_IBS_VOTE_STATS_UPDATE, hu);
710
711	skb_queue_purge(list: &qca->tx_wait_q);
712	skb_queue_purge(list: &qca->txq);
713	skb_queue_purge(list: &qca->rx_memdump_q);
714	/*
715	* Shut the timers down so they can't be rearmed when
716	* destroy_workqueue() drains pending work which in turn might try
717	* to arm a timer. After shutdown rearm attempts are silently
718	* ignored by the timer core code.
719	*/
720	timer_shutdown_sync(timer: &qca->tx_idle_timer);
721	timer_shutdown_sync(timer: &qca->wake_retrans_timer);
722	destroy_workqueue(wq: qca->workqueue);
723	qca->hu = NULL;
724
725	kfree_skb(skb: qca->rx_skb);
726
727	hu->priv = NULL;
728
729	kfree(objp: qca);
730
731	return 0;
732	}
733
734	/* Called upon a wake-up-indication from the device.
735	*/
736	static void device_want_to_wakeup(struct hci_uart *hu)
737	{
738	unsigned long flags;
739	struct qca_data *qca = hu->priv;
740
741	BT_DBG("hu %p want to wake up", hu);
742
743	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
744
745	qca->ibs_recv_wakes++;
746
747	/* Don't wake the rx up when suspending. */
748	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
749	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
750	return;
751	}
752
753	switch (qca->rx_ibs_state) {
754	case HCI_IBS_RX_ASLEEP:
755	/* Make sure clock is on - we may have turned clock off since
756	* receiving the wake up indicator awake rx clock.
757	*/
758	queue_work(wq: qca->workqueue, work: &qca->ws_awake_rx);
759	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
760	return;
761
762	case HCI_IBS_RX_AWAKE:
763	/* Always acknowledge device wake up,
764	* sending IBS message doesn't count as TX ON.
765	*/
766	if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
767	BT_ERR("Failed to acknowledge device wake up");
768	break;
769	}
770	qca->ibs_sent_wacks++;
771	break;
772
773	default:
774	/* Any other state is illegal */
775	BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
776	qca->rx_ibs_state);
777	break;
778	}
779
780	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
781
782	/* Actually send the packets */
783	hci_uart_tx_wakeup(hu);
784	}
785
786	/* Called upon a sleep-indication from the device.
787	*/
788	static void device_want_to_sleep(struct hci_uart *hu)
789	{
790	unsigned long flags;
791	struct qca_data *qca = hu->priv;
792
793	BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
794
795	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
796
797	qca->ibs_recv_slps++;
798
799	switch (qca->rx_ibs_state) {
800	case HCI_IBS_RX_AWAKE:
801	/* Update state */
802	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
803	/* Vote off rx clock under workqueue */
804	queue_work(wq: qca->workqueue, work: &qca->ws_rx_vote_off);
805	break;
806
807	case HCI_IBS_RX_ASLEEP:
808	break;
809
810	default:
811	/* Any other state is illegal */
812	BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
813	qca->rx_ibs_state);
814	break;
815	}
816
817	wake_up_interruptible(&qca->suspend_wait_q);
818
819	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
820	}
821
822	/* Called upon wake-up-acknowledgement from the device
823	*/
824	static void device_woke_up(struct hci_uart *hu)
825	{
826	unsigned long flags, idle_delay;
827	struct qca_data *qca = hu->priv;
828	struct sk_buff *skb = NULL;
829
830	BT_DBG("hu %p woke up", hu);
831
832	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
833
834	qca->ibs_recv_wacks++;
835
836	/* Don't react to the wake-up-acknowledgment when suspending. */
837	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
838	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
839	return;
840	}
841
842	switch (qca->tx_ibs_state) {
843	case HCI_IBS_TX_AWAKE:
844	/* Expect one if we send 2 WAKEs */
845	BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
846	qca->tx_ibs_state);
847	break;
848
849	case HCI_IBS_TX_WAKING:
850	/* Send pending packets */
851	while ((skb = skb_dequeue(list: &qca->tx_wait_q)))
852	skb_queue_tail(list: &qca->txq, newsk: skb);
853
854	/* Switch timers and change state to HCI_IBS_TX_AWAKE */
855	del_timer(timer: &qca->wake_retrans_timer);
856	idle_delay = msecs_to_jiffies(m: qca->tx_idle_delay);
857	mod_timer(timer: &qca->tx_idle_timer, expires: jiffies + idle_delay);
858	qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
859	break;
860
861	case HCI_IBS_TX_ASLEEP:
862	default:
863	BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
864	qca->tx_ibs_state);
865	break;
866	}
867
868	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
869
870	/* Actually send the packets */
871	hci_uart_tx_wakeup(hu);
872	}
873
874	/* Enqueue frame for transmittion (padding, crc, etc) may be called from
875	* two simultaneous tasklets.
876	*/
877	static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
878	{
879	unsigned long flags = 0, idle_delay;
880	struct qca_data *qca = hu->priv;
881
882	BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
883	qca->tx_ibs_state);
884
885	if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
886	/* As SSR is in progress, ignore the packets */
887	bt_dev_dbg(hu->hdev, "SSR is in progress");
888	kfree_skb(skb);
889	return 0;
890	}
891
892	/* Prepend skb with frame type */
893	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
894
895	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
896
897	/* Don't go to sleep in middle of patch download or
898	* Out-Of-Band(GPIOs control) sleep is selected.
899	* Don't wake the device up when suspending.
900	*/
901	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
902	test_bit(QCA_SUSPENDING, &qca->flags)) {
903	skb_queue_tail(list: &qca->txq, newsk: skb);
904	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
905	return 0;
906	}
907
908	/* Act according to current state */
909	switch (qca->tx_ibs_state) {
910	case HCI_IBS_TX_AWAKE:
911	BT_DBG("Device awake, sending normally");
912	skb_queue_tail(list: &qca->txq, newsk: skb);
913	idle_delay = msecs_to_jiffies(m: qca->tx_idle_delay);
914	mod_timer(timer: &qca->tx_idle_timer, expires: jiffies + idle_delay);
915	break;
916
917	case HCI_IBS_TX_ASLEEP:
918	BT_DBG("Device asleep, waking up and queueing packet");
919	/* Save packet for later */
920	skb_queue_tail(list: &qca->tx_wait_q, newsk: skb);
921
922	qca->tx_ibs_state = HCI_IBS_TX_WAKING;
923	/* Schedule a work queue to wake up device */
924	queue_work(wq: qca->workqueue, work: &qca->ws_awake_device);
925	break;
926
927	case HCI_IBS_TX_WAKING:
928	BT_DBG("Device waking up, queueing packet");
929	/* Transient state; just keep packet for later */
930	skb_queue_tail(list: &qca->tx_wait_q, newsk: skb);
931	break;
932
933	default:
934	BT_ERR("Illegal tx state: %d (losing packet)",
935	qca->tx_ibs_state);
936	dev_kfree_skb_irq(skb);
937	break;
938	}
939
940	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
941
942	return 0;
943	}
944
945	static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
946	{
947	struct hci_uart *hu = hci_get_drvdata(hdev);
948
949	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
950
951	device_want_to_sleep(hu);
952
953	kfree_skb(skb);
954	return 0;
955	}
956
957	static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
958	{
959	struct hci_uart *hu = hci_get_drvdata(hdev);
960
961	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
962
963	device_want_to_wakeup(hu);
964
965	kfree_skb(skb);
966	return 0;
967	}
968
969	static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
970	{
971	struct hci_uart *hu = hci_get_drvdata(hdev);
972
973	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
974
975	device_woke_up(hu);
976
977	kfree_skb(skb);
978	return 0;
979	}
980
981	static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
982	{
983	/* We receive debug logs from chip as an ACL packets.
984	* Instead of sending the data to ACL to decode the
985	* received data, we are pushing them to the above layers
986	* as a diagnostic packet.
987	*/
988	if (get_unaligned_le16(p: skb->data) == QCA_DEBUG_HANDLE)
989	return hci_recv_diag(hdev, skb);
990
991	return hci_recv_frame(hdev, skb);
992	}
993
994	static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
995	{
996	struct hci_uart *hu = hci_get_drvdata(hdev);
997	struct qca_data *qca = hu->priv;
998	char buf[80];
999
1000	snprintf(buf, size: sizeof(buf), fmt: "Controller Name: 0x%x\n",
1001	qca->controller_id);
1002	skb_put_data(skb, data: buf, strlen(buf));
1003
1004	snprintf(buf, size: sizeof(buf), fmt: "Firmware Version: 0x%x\n",
1005	qca->fw_version);
1006	skb_put_data(skb, data: buf, strlen(buf));
1007
1008	snprintf(buf, size: sizeof(buf), fmt: "Vendor:Qualcomm\n");
1009	skb_put_data(skb, data: buf, strlen(buf));
1010
1011	snprintf(buf, size: sizeof(buf), fmt: "Driver: %s\n",
1012	hu->serdev->dev.driver->name);
1013	skb_put_data(skb, data: buf, strlen(buf));
1014	}
1015
1016	static void qca_controller_memdump(struct work_struct *work)
1017	{
1018	struct qca_data *qca = container_of(work, struct qca_data,
1019	ctrl_memdump_evt);
1020	struct hci_uart *hu = qca->hu;
1021	struct sk_buff *skb;
1022	struct qca_memdump_event_hdr *cmd_hdr;
1023	struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1024	struct qca_dump_size *dump;
1025	u16 seq_no;
1026	u32 rx_size;
1027	int ret = 0;
1028	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1029
1030	while ((skb = skb_dequeue(list: &qca->rx_memdump_q))) {
1031
1032	mutex_lock(&qca->hci_memdump_lock);
1033	/* Skip processing the received packets if timeout detected
1034	* or memdump collection completed.
1035	*/
1036	if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1037	qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1038	mutex_unlock(lock: &qca->hci_memdump_lock);
1039	return;
1040	}
1041
1042	if (!qca_memdump) {
1043	qca_memdump = kzalloc(size: sizeof(struct qca_memdump_info),
1044	GFP_ATOMIC);
1045	if (!qca_memdump) {
1046	mutex_unlock(lock: &qca->hci_memdump_lock);
1047	return;
1048	}
1049
1050	qca->qca_memdump = qca_memdump;
1051	}
1052
1053	qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1054	cmd_hdr = (void *) skb->data;
1055	seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1056	skb_pull(skb, len: sizeof(struct qca_memdump_event_hdr));
1057
1058	if (!seq_no) {
1059
1060	/* This is the first frame of memdump packet from
1061	* the controller, Disable IBS to recevie dump
1062	* with out any interruption, ideally time required for
1063	* the controller to send the dump is 8 seconds. let us
1064	* start timer to handle this asynchronous activity.
1065	*/
1066	set_bit(nr: QCA_IBS_DISABLED, addr: &qca->flags);
1067	set_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1068	dump = (void *) skb->data;
1069	qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1070	if (!(qca_memdump->ram_dump_size)) {
1071	bt_dev_err(hu->hdev, "Rx invalid memdump size");
1072	kfree(objp: qca_memdump);
1073	kfree_skb(skb);
1074	mutex_unlock(lock: &qca->hci_memdump_lock);
1075	return;
1076	}
1077
1078	queue_delayed_work(wq: qca->workqueue,
1079	dwork: &qca->ctrl_memdump_timeout,
1080	delay: msecs_to_jiffies(MEMDUMP_TIMEOUT_MS));
1081	skb_pull(skb, len: sizeof(qca_memdump->ram_dump_size));
1082	qca_memdump->current_seq_no = 0;
1083	qca_memdump->received_dump = 0;
1084	ret = hci_devcd_init(hdev: hu->hdev, dump_size: qca_memdump->ram_dump_size);
1085	bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1086	ret);
1087	if (ret < 0) {
1088	kfree(objp: qca->qca_memdump);
1089	qca->qca_memdump = NULL;
1090	qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1091	cancel_delayed_work(dwork: &qca->ctrl_memdump_timeout);
1092	clear_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1093	mutex_unlock(lock: &qca->hci_memdump_lock);
1094	return;
1095	}
1096
1097	bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1098	qca_memdump->ram_dump_size);
1099
1100	}
1101
1102	/* If sequence no 0 is missed then there is no point in
1103	* accepting the other sequences.
1104	*/
1105	if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1106	bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1107	kfree(objp: qca_memdump);
1108	kfree_skb(skb);
1109	mutex_unlock(lock: &qca->hci_memdump_lock);
1110	return;
1111	}
1112	/* There could be chance of missing some packets from
1113	* the controller. In such cases let us store the dummy
1114	* packets in the buffer.
1115	*/
1116	/* For QCA6390, controller does not lost packets but
1117	* sequence number field of packet sometimes has error
1118	* bits, so skip this checking for missing packet.
1119	*/
1120	while ((seq_no > qca_memdump->current_seq_no + 1) &&
1121	(soc_type != QCA_QCA6390) &&
1122	seq_no != QCA_LAST_SEQUENCE_NUM) {
1123	bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1124	qca_memdump->current_seq_no);
1125	rx_size = qca_memdump->received_dump;
1126	rx_size += QCA_DUMP_PACKET_SIZE;
1127	if (rx_size > qca_memdump->ram_dump_size) {
1128	bt_dev_err(hu->hdev,
1129	"QCA memdump received %d, no space for missed packet",
1130	qca_memdump->received_dump);
1131	break;
1132	}
1133	hci_devcd_append_pattern(hdev: hu->hdev, pattern: 0x00,
1134	QCA_DUMP_PACKET_SIZE);
1135	qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1136	qca_memdump->current_seq_no++;
1137	}
1138
1139	rx_size = qca_memdump->received_dump + skb->len;
1140	if (rx_size <= qca_memdump->ram_dump_size) {
1141	if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1142	(seq_no != qca_memdump->current_seq_no)) {
1143	bt_dev_err(hu->hdev,
1144	"QCA memdump unexpected packet %d",
1145	seq_no);
1146	}
1147	bt_dev_dbg(hu->hdev,
1148	"QCA memdump packet %d with length %d",
1149	seq_no, skb->len);
1150	hci_devcd_append(hdev: hu->hdev, skb);
1151	qca_memdump->current_seq_no += 1;
1152	qca_memdump->received_dump = rx_size;
1153	} else {
1154	bt_dev_err(hu->hdev,
1155	"QCA memdump received no space for packet %d",
1156	qca_memdump->current_seq_no);
1157	}
1158
1159	if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1160	bt_dev_info(hu->hdev,
1161	"QCA memdump Done, received %d, total %d",
1162	qca_memdump->received_dump,
1163	qca_memdump->ram_dump_size);
1164	hci_devcd_complete(hdev: hu->hdev);
1165	cancel_delayed_work(dwork: &qca->ctrl_memdump_timeout);
1166	kfree(objp: qca->qca_memdump);
1167	qca->qca_memdump = NULL;
1168	qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1169	clear_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1170	}
1171
1172	mutex_unlock(lock: &qca->hci_memdump_lock);
1173	}
1174
1175	}
1176
1177	static int qca_controller_memdump_event(struct hci_dev *hdev,
1178	struct sk_buff *skb)
1179	{
1180	struct hci_uart *hu = hci_get_drvdata(hdev);
1181	struct qca_data *qca = hu->priv;
1182
1183	set_bit(nr: QCA_SSR_TRIGGERED, addr: &qca->flags);
1184	skb_queue_tail(list: &qca->rx_memdump_q, newsk: skb);
1185	queue_work(wq: qca->workqueue, work: &qca->ctrl_memdump_evt);
1186
1187	return 0;
1188	}
1189
1190	static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1191	{
1192	struct hci_uart *hu = hci_get_drvdata(hdev);
1193	struct qca_data *qca = hu->priv;
1194
1195	if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1196	struct hci_event_hdr *hdr = (void *)skb->data;
1197
1198	/* For the WCN3990 the vendor command for a baudrate change
1199	* isn't sent as synchronous HCI command, because the
1200	* controller sends the corresponding vendor event with the
1201	* new baudrate. The event is received and properly decoded
1202	* after changing the baudrate of the host port. It needs to
1203	* be dropped, otherwise it can be misinterpreted as
1204	* response to a later firmware download command (also a
1205	* vendor command).
1206	*/
1207
1208	if (hdr->evt == HCI_EV_VENDOR)
1209	complete(&qca->drop_ev_comp);
1210
1211	kfree_skb(skb);
1212
1213	return 0;
1214	}
1215	/* We receive chip memory dump as an event packet, With a dedicated
1216	* handler followed by a hardware error event. When this event is
1217	* received we store dump into a file before closing hci. This
1218	* dump will help in triaging the issues.
1219	*/
1220	if ((skb->data[0] == HCI_VENDOR_PKT) &&
1221	(get_unaligned_be16(p: skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1222	return qca_controller_memdump_event(hdev, skb);
1223
1224	return hci_recv_frame(hdev, skb);
1225	}
1226
1227	#define QCA_IBS_SLEEP_IND_EVENT \
1228	.type = HCI_IBS_SLEEP_IND, \
1229	.hlen = 0, \
1230	.loff = 0, \
1231	.lsize = 0, \
1232	.maxlen = HCI_MAX_IBS_SIZE
1233
1234	#define QCA_IBS_WAKE_IND_EVENT \
1235	.type = HCI_IBS_WAKE_IND, \
1236	.hlen = 0, \
1237	.loff = 0, \
1238	.lsize = 0, \
1239	.maxlen = HCI_MAX_IBS_SIZE
1240
1241	#define QCA_IBS_WAKE_ACK_EVENT \
1242	.type = HCI_IBS_WAKE_ACK, \
1243	.hlen = 0, \
1244	.loff = 0, \
1245	.lsize = 0, \
1246	.maxlen = HCI_MAX_IBS_SIZE
1247
1248	static const struct h4_recv_pkt qca_recv_pkts[] = {
1249	{ H4_RECV_ACL, .recv = qca_recv_acl_data },
1250	{ H4_RECV_SCO, .recv = hci_recv_frame },
1251	{ H4_RECV_EVENT, .recv = qca_recv_event },
1252	{ QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1253	{ QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1254	{ QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1255	};
1256
1257	static int qca_recv(struct hci_uart *hu, const void *data, int count)
1258	{
1259	struct qca_data *qca = hu->priv;
1260
1261	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1262	return -EUNATCH;
1263
1264	qca->rx_skb = h4_recv_buf(hdev: hu->hdev, skb: qca->rx_skb, buffer: data, count,
1265	pkts: qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1266	if (IS_ERR(ptr: qca->rx_skb)) {
1267	int err = PTR_ERR(ptr: qca->rx_skb);
1268	bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1269	qca->rx_skb = NULL;
1270	return err;
1271	}
1272
1273	return count;
1274	}
1275
1276	static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1277	{
1278	struct qca_data *qca = hu->priv;
1279
1280	return skb_dequeue(list: &qca->txq);
1281	}
1282
1283	static uint8_t qca_get_baudrate_value(int speed)
1284	{
1285	switch (speed) {
1286	case 9600:
1287	return QCA_BAUDRATE_9600;
1288	case 19200:
1289	return QCA_BAUDRATE_19200;
1290	case 38400:
1291	return QCA_BAUDRATE_38400;
1292	case 57600:
1293	return QCA_BAUDRATE_57600;
1294	case 115200:
1295	return QCA_BAUDRATE_115200;
1296	case 230400:
1297	return QCA_BAUDRATE_230400;
1298	case 460800:
1299	return QCA_BAUDRATE_460800;
1300	case 500000:
1301	return QCA_BAUDRATE_500000;
1302	case 921600:
1303	return QCA_BAUDRATE_921600;
1304	case 1000000:
1305	return QCA_BAUDRATE_1000000;
1306	case 2000000:
1307	return QCA_BAUDRATE_2000000;
1308	case 3000000:
1309	return QCA_BAUDRATE_3000000;
1310	case 3200000:
1311	return QCA_BAUDRATE_3200000;
1312	case 3500000:
1313	return QCA_BAUDRATE_3500000;
1314	default:
1315	return QCA_BAUDRATE_115200;
1316	}
1317	}
1318
1319	static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1320	{
1321	struct hci_uart *hu = hci_get_drvdata(hdev);
1322	struct qca_data *qca = hu->priv;
1323	struct sk_buff *skb;
1324	u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1325
1326	if (baudrate > QCA_BAUDRATE_3200000)
1327	return -EINVAL;
1328
1329	cmd[4] = baudrate;
1330
1331	skb = bt_skb_alloc(len: sizeof(cmd), GFP_KERNEL);
1332	if (!skb) {
1333	bt_dev_err(hdev, "Failed to allocate baudrate packet");
1334	return -ENOMEM;
1335	}
1336
1337	/* Assign commands to change baudrate and packet type. */
1338	skb_put_data(skb, data: cmd, len: sizeof(cmd));
1339	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1340
1341	skb_queue_tail(list: &qca->txq, newsk: skb);
1342	hci_uart_tx_wakeup(hu);
1343
1344	/* Wait for the baudrate change request to be sent */
1345
1346	while (!skb_queue_empty(list: &qca->txq))
1347	usleep_range(min: 100, max: 200);
1348
1349	if (hu->serdev)
1350	serdev_device_wait_until_sent(hu->serdev,
1351	msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1352
1353	/* Give the controller time to process the request */
1354	switch (qca_soc_type(hu)) {
1355	case QCA_WCN3988:
1356	case QCA_WCN3990:
1357	case QCA_WCN3991:
1358	case QCA_WCN3998:
1359	case QCA_WCN6750:
1360	case QCA_WCN6855:
1361	case QCA_WCN7850:
1362	usleep_range(min: 1000, max: 10000);
1363	break;
1364
1365	default:
1366	msleep(msecs: 300);
1367	}
1368
1369	return 0;
1370	}
1371
1372	static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1373	{
1374	if (hu->serdev)
1375	serdev_device_set_baudrate(hu->serdev, speed);
1376	else
1377	hci_uart_set_baudrate(hu, speed);
1378	}
1379
1380	static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1381	{
1382	int ret;
1383	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1384	u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1385
1386	/* These power pulses are single byte command which are sent
1387	* at required baudrate to wcn3990. On wcn3990, we have an external
1388	* circuit at Tx pin which decodes the pulse sent at specific baudrate.
1389	* For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1390	* and also we use the same power inputs to turn on and off for
1391	* Wi-Fi/BT. Powering up the power sources will not enable BT, until
1392	* we send a power on pulse at 115200 bps. This algorithm will help to
1393	* save power. Disabling hardware flow control is mandatory while
1394	* sending power pulses to SoC.
1395	*/
1396	bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1397
1398	serdev_device_write_flush(hu->serdev);
1399	hci_uart_set_flow_control(hu, enable: true);
1400	ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1401	if (ret < 0) {
1402	bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1403	return ret;
1404	}
1405
1406	serdev_device_wait_until_sent(hu->serdev, timeout);
1407	hci_uart_set_flow_control(hu, enable: false);
1408
1409	/* Give to controller time to boot/shutdown */
1410	if (on)
1411	msleep(msecs: 100);
1412	else
1413	usleep_range(min: 1000, max: 10000);
1414
1415	return 0;
1416	}
1417
1418	static unsigned int qca_get_speed(struct hci_uart *hu,
1419	enum qca_speed_type speed_type)
1420	{
1421	unsigned int speed = 0;
1422
1423	if (speed_type == QCA_INIT_SPEED) {
1424	if (hu->init_speed)
1425	speed = hu->init_speed;
1426	else if (hu->proto->init_speed)
1427	speed = hu->proto->init_speed;
1428	} else {
1429	if (hu->oper_speed)
1430	speed = hu->oper_speed;
1431	else if (hu->proto->oper_speed)
1432	speed = hu->proto->oper_speed;
1433	}
1434
1435	return speed;
1436	}
1437
1438	static int qca_check_speeds(struct hci_uart *hu)
1439	{
1440	switch (qca_soc_type(hu)) {
1441	case QCA_WCN3988:
1442	case QCA_WCN3990:
1443	case QCA_WCN3991:
1444	case QCA_WCN3998:
1445	case QCA_WCN6750:
1446	case QCA_WCN6855:
1447	case QCA_WCN7850:
1448	if (!qca_get_speed(hu, speed_type: QCA_INIT_SPEED) &&
1449	!qca_get_speed(hu, speed_type: QCA_OPER_SPEED))
1450	return -EINVAL;
1451	break;
1452
1453	default:
1454	if (!qca_get_speed(hu, speed_type: QCA_INIT_SPEED) ||
1455	!qca_get_speed(hu, speed_type: QCA_OPER_SPEED))
1456	return -EINVAL;
1457	}
1458
1459	return 0;
1460	}
1461
1462	static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1463	{
1464	unsigned int speed, qca_baudrate;
1465	struct qca_data *qca = hu->priv;
1466	int ret = 0;
1467
1468	if (speed_type == QCA_INIT_SPEED) {
1469	speed = qca_get_speed(hu, speed_type: QCA_INIT_SPEED);
1470	if (speed)
1471	host_set_baudrate(hu, speed);
1472	} else {
1473	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1474
1475	speed = qca_get_speed(hu, speed_type: QCA_OPER_SPEED);
1476	if (!speed)
1477	return 0;
1478
1479	/* Disable flow control for wcn3990 to deassert RTS while
1480	* changing the baudrate of chip and host.
1481	*/
1482	switch (soc_type) {
1483	case QCA_WCN3988:
1484	case QCA_WCN3990:
1485	case QCA_WCN3991:
1486	case QCA_WCN3998:
1487	case QCA_WCN6750:
1488	case QCA_WCN6855:
1489	case QCA_WCN7850:
1490	hci_uart_set_flow_control(hu, enable: true);
1491	break;
1492
1493	default:
1494	break;
1495	}
1496
1497	switch (soc_type) {
1498	case QCA_WCN3990:
1499	reinit_completion(x: &qca->drop_ev_comp);
1500	set_bit(nr: QCA_DROP_VENDOR_EVENT, addr: &qca->flags);
1501	break;
1502
1503	default:
1504	break;
1505	}
1506
1507	qca_baudrate = qca_get_baudrate_value(speed);
1508	bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1509	ret = qca_set_baudrate(hdev: hu->hdev, baudrate: qca_baudrate);
1510	if (ret)
1511	goto error;
1512
1513	host_set_baudrate(hu, speed);
1514
1515	error:
1516	switch (soc_type) {
1517	case QCA_WCN3988:
1518	case QCA_WCN3990:
1519	case QCA_WCN3991:
1520	case QCA_WCN3998:
1521	case QCA_WCN6750:
1522	case QCA_WCN6855:
1523	case QCA_WCN7850:
1524	hci_uart_set_flow_control(hu, enable: false);
1525	break;
1526
1527	default:
1528	break;
1529	}
1530
1531	switch (soc_type) {
1532	case QCA_WCN3990:
1533	/* Wait for the controller to send the vendor event
1534	* for the baudrate change command.
1535	*/
1536	if (!wait_for_completion_timeout(x: &qca->drop_ev_comp,
1537	timeout: msecs_to_jiffies(m: 100))) {
1538	bt_dev_err(hu->hdev,
1539	"Failed to change controller baudrate\n");
1540	ret = -ETIMEDOUT;
1541	}
1542
1543	clear_bit(nr: QCA_DROP_VENDOR_EVENT, addr: &qca->flags);
1544	break;
1545
1546	default:
1547	break;
1548	}
1549	}
1550
1551	return ret;
1552	}
1553
1554	static int qca_send_crashbuffer(struct hci_uart *hu)
1555	{
1556	struct qca_data *qca = hu->priv;
1557	struct sk_buff *skb;
1558
1559	skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1560	if (!skb) {
1561	bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1562	return -ENOMEM;
1563	}
1564
1565	/* We forcefully crash the controller, by sending 0xfb byte for
1566	* 1024 times. We also might have chance of losing data, To be
1567	* on safer side we send 1096 bytes to the SoC.
1568	*/
1569	memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1570	QCA_CRASHBYTE_PACKET_LEN);
1571	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1572	bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1573	skb_queue_tail(list: &qca->txq, newsk: skb);
1574	hci_uart_tx_wakeup(hu);
1575
1576	return 0;
1577	}
1578
1579	static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1580	{
1581	struct hci_uart *hu = hci_get_drvdata(hdev);
1582	struct qca_data *qca = hu->priv;
1583
1584	wait_on_bit_timeout(word: &qca->flags, bit: QCA_MEMDUMP_COLLECTION,
1585	TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1586
1587	clear_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1588	}
1589
1590	static void qca_hw_error(struct hci_dev *hdev, u8 code)
1591	{
1592	struct hci_uart *hu = hci_get_drvdata(hdev);
1593	struct qca_data *qca = hu->priv;
1594
1595	set_bit(nr: QCA_SSR_TRIGGERED, addr: &qca->flags);
1596	set_bit(nr: QCA_HW_ERROR_EVENT, addr: &qca->flags);
1597	bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1598
1599	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1600	/* If hardware error event received for other than QCA
1601	* soc memory dump event, then we need to crash the SOC
1602	* and wait here for 8 seconds to get the dump packets.
1603	* This will block main thread to be on hold until we
1604	* collect dump.
1605	*/
1606	set_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1607	qca_send_crashbuffer(hu);
1608	qca_wait_for_dump_collection(hdev);
1609	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1610	/* Let us wait here until memory dump collected or
1611	* memory dump timer expired.
1612	*/
1613	bt_dev_info(hdev, "waiting for dump to complete");
1614	qca_wait_for_dump_collection(hdev);
1615	}
1616
1617	mutex_lock(&qca->hci_memdump_lock);
1618	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1619	bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1620	hci_devcd_abort(hdev: hu->hdev);
1621	if (qca->qca_memdump) {
1622	kfree(objp: qca->qca_memdump);
1623	qca->qca_memdump = NULL;
1624	}
1625	qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1626	cancel_delayed_work(dwork: &qca->ctrl_memdump_timeout);
1627	}
1628	mutex_unlock(lock: &qca->hci_memdump_lock);
1629
1630	if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1631	qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1632	cancel_work_sync(work: &qca->ctrl_memdump_evt);
1633	skb_queue_purge(list: &qca->rx_memdump_q);
1634	}
1635
1636	clear_bit(nr: QCA_HW_ERROR_EVENT, addr: &qca->flags);
1637	}
1638
1639	static void qca_cmd_timeout(struct hci_dev *hdev)
1640	{
1641	struct hci_uart *hu = hci_get_drvdata(hdev);
1642	struct qca_data *qca = hu->priv;
1643
1644	set_bit(nr: QCA_SSR_TRIGGERED, addr: &qca->flags);
1645	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1646	set_bit(nr: QCA_MEMDUMP_COLLECTION, addr: &qca->flags);
1647	qca_send_crashbuffer(hu);
1648	qca_wait_for_dump_collection(hdev);
1649	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1650	/* Let us wait here until memory dump collected or
1651	* memory dump timer expired.
1652	*/
1653	bt_dev_info(hdev, "waiting for dump to complete");
1654	qca_wait_for_dump_collection(hdev);
1655	}
1656
1657	mutex_lock(&qca->hci_memdump_lock);
1658	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1659	qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1660	if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1661	/* Inject hw error event to reset the device
1662	* and driver.
1663	*/
1664	hci_reset_dev(hdev: hu->hdev);
1665	}
1666	}
1667	mutex_unlock(lock: &qca->hci_memdump_lock);
1668	}
1669
1670	static bool qca_wakeup(struct hci_dev *hdev)
1671	{
1672	struct hci_uart *hu = hci_get_drvdata(hdev);
1673	bool wakeup;
1674
1675	/* BT SoC attached through the serial bus is handled by the serdev driver.
1676	* So we need to use the device handle of the serdev driver to get the
1677	* status of device may wakeup.
1678	*/
1679	wakeup = device_may_wakeup(dev: &hu->serdev->ctrl->dev);
1680	bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1681
1682	return wakeup;
1683	}
1684
1685	static int qca_regulator_init(struct hci_uart *hu)
1686	{
1687	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1688	struct qca_serdev *qcadev;
1689	int ret;
1690	bool sw_ctrl_state;
1691
1692	/* Check for vregs status, may be hci down has turned
1693	* off the voltage regulator.
1694	*/
1695	qcadev = serdev_device_get_drvdata(serdev: hu->serdev);
1696	if (!qcadev->bt_power->vregs_on) {
1697	serdev_device_close(hu->serdev);
1698	ret = qca_regulator_enable(qcadev);
1699	if (ret)
1700	return ret;
1701
1702	ret = serdev_device_open(hu->serdev);
1703	if (ret) {
1704	bt_dev_err(hu->hdev, "failed to open port");
1705	return ret;
1706	}
1707	}
1708
1709	switch (soc_type) {
1710	case QCA_WCN3988:
1711	case QCA_WCN3990:
1712	case QCA_WCN3991:
1713	case QCA_WCN3998:
1714	/* Forcefully enable wcn399x to enter in to boot mode. */
1715	host_set_baudrate(hu, speed: 2400);
1716	ret = qca_send_power_pulse(hu, on: false);
1717	if (ret)
1718	return ret;
1719	break;
1720
1721	default:
1722	break;
1723	}
1724
1725	/* For wcn6750 need to enable gpio bt_en */
1726	if (qcadev->bt_en) {
1727	gpiod_set_value_cansleep(desc: qcadev->bt_en, value: 0);
1728	msleep(msecs: 50);
1729	gpiod_set_value_cansleep(desc: qcadev->bt_en, value: 1);
1730	msleep(msecs: 50);
1731	if (qcadev->sw_ctrl) {
1732	sw_ctrl_state = gpiod_get_value_cansleep(desc: qcadev->sw_ctrl);
1733	bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1734	}
1735	}
1736
1737	qca_set_speed(hu, speed_type: QCA_INIT_SPEED);
1738
1739	switch (soc_type) {
1740	case QCA_WCN3988:
1741	case QCA_WCN3990:
1742	case QCA_WCN3991:
1743	case QCA_WCN3998:
1744	ret = qca_send_power_pulse(hu, on: true);
1745	if (ret)
1746	return ret;
1747	break;
1748
1749	default:
1750	break;
1751	}
1752
1753	/* Now the device is in ready state to communicate with host.
1754	* To sync host with device we need to reopen port.
1755	* Without this, we will have RTS and CTS synchronization
1756	* issues.
1757	*/
1758	serdev_device_close(hu->serdev);
1759	ret = serdev_device_open(hu->serdev);
1760	if (ret) {
1761	bt_dev_err(hu->hdev, "failed to open port");
1762	return ret;
1763	}
1764
1765	hci_uart_set_flow_control(hu, enable: false);
1766
1767	return 0;
1768	}
1769
1770	static int qca_power_on(struct hci_dev *hdev)
1771	{
1772	struct hci_uart *hu = hci_get_drvdata(hdev);
1773	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1774	struct qca_serdev *qcadev;
1775	struct qca_data *qca = hu->priv;
1776	int ret = 0;
1777
1778	/* Non-serdev device usually is powered by external power
1779	* and don't need additional action in driver for power on
1780	*/
1781	if (!hu->serdev)
1782	return 0;
1783
1784	switch (soc_type) {
1785	case QCA_WCN3988:
1786	case QCA_WCN3990:
1787	case QCA_WCN3991:
1788	case QCA_WCN3998:
1789	case QCA_WCN6750:
1790	case QCA_WCN6855:
1791	case QCA_WCN7850:
1792	ret = qca_regulator_init(hu);
1793	break;
1794
1795	default:
1796	qcadev = serdev_device_get_drvdata(serdev: hu->serdev);
1797	if (qcadev->bt_en) {
1798	gpiod_set_value_cansleep(desc: qcadev->bt_en, value: 1);
1799	/* Controller needs time to bootup. */
1800	msleep(msecs: 150);
1801	}
1802	}
1803
1804	clear_bit(nr: QCA_BT_OFF, addr: &qca->flags);
1805	return ret;
1806	}
1807
1808	static void hci_coredump_qca(struct hci_dev *hdev)
1809	{
1810	int err;
1811	static const u8 param[] = { 0x26 };
1812
1813	err = __hci_cmd_send(hdev, opcode: 0xfc0c, plen: 1, param);
1814	if (err < 0)
1815	bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err);
1816	}
1817
1818	static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id)
1819	{
1820	/* QCA uses 1 as non-HCI data path id for HFP */
1821	*data_path_id = 1;
1822	return 0;
1823	}
1824
1825	static int qca_configure_hfp_offload(struct hci_dev *hdev)
1826	{
1827	bt_dev_info(hdev, "HFP non-HCI data transport is supported");
1828	hdev->get_data_path_id = qca_get_data_path_id;
1829	/* Do not need to send HCI_Configure_Data_Path to configure non-HCI
1830	* data transport path for QCA controllers, so set below field as NULL.
1831	*/
1832	hdev->get_codec_config_data = NULL;
1833	return 0;
1834	}
1835
1836	static int qca_setup(struct hci_uart *hu)
1837	{
1838	struct hci_dev *hdev = hu->hdev;
1839	struct qca_data *qca = hu->priv;
1840	unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1841	unsigned int retries = 0;
1842	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1843	const char *firmware_name = qca_get_firmware_name(hu);
1844	int ret;
1845	struct qca_btsoc_version ver;
1846	struct qca_serdev *qcadev;
1847	const char *soc_name;
1848
1849	ret = qca_check_speeds(hu);
1850	if (ret)
1851	return ret;
1852
1853	clear_bit(nr: QCA_ROM_FW, addr: &qca->flags);
1854	/* Patch downloading has to be done without IBS mode */
1855	set_bit(nr: QCA_IBS_DISABLED, addr: &qca->flags);
1856
1857	/* Enable controller to do both LE scan and BR/EDR inquiry
1858	* simultaneously.
1859	*/
1860	set_bit(nr: HCI_QUIRK_SIMULTANEOUS_DISCOVERY, addr: &hdev->quirks);
1861
1862	switch (soc_type) {
1863	case QCA_QCA2066:
1864	soc_name = "qca2066";
1865	break;
1866
1867	case QCA_WCN3988:
1868	case QCA_WCN3990:
1869	case QCA_WCN3991:
1870	case QCA_WCN3998:
1871	soc_name = "wcn399x";
1872	break;
1873
1874	case QCA_WCN6750:
1875	soc_name = "wcn6750";
1876	break;
1877
1878	case QCA_WCN6855:
1879	soc_name = "wcn6855";
1880	break;
1881
1882	case QCA_WCN7850:
1883	soc_name = "wcn7850";
1884	break;
1885
1886	default:
1887	soc_name = "ROME/QCA6390";
1888	}
1889	bt_dev_info(hdev, "setting up %s", soc_name);
1890
1891	qca->memdump_state = QCA_MEMDUMP_IDLE;
1892
1893	retry:
1894	ret = qca_power_on(hdev);
1895	if (ret)
1896	goto out;
1897
1898	clear_bit(nr: QCA_SSR_TRIGGERED, addr: &qca->flags);
1899
1900	switch (soc_type) {
1901	case QCA_WCN3988:
1902	case QCA_WCN3990:
1903	case QCA_WCN3991:
1904	case QCA_WCN3998:
1905	case QCA_WCN6750:
1906	case QCA_WCN6855:
1907	case QCA_WCN7850:
1908	set_bit(nr: HCI_QUIRK_USE_BDADDR_PROPERTY, addr: &hdev->quirks);
1909
1910	qcadev = serdev_device_get_drvdata(serdev: hu->serdev);
1911	if (qcadev->bdaddr_property_broken)
1912	set_bit(nr: HCI_QUIRK_BDADDR_PROPERTY_BROKEN, addr: &hdev->quirks);
1913
1914	hci_set_aosp_capable(hdev);
1915
1916	ret = qca_read_soc_version(hdev, ver: &ver, soc_type);
1917	if (ret)
1918	goto out;
1919	break;
1920
1921	default:
1922	qca_set_speed(hu, speed_type: QCA_INIT_SPEED);
1923	}
1924
1925	/* Setup user speed if needed */
1926	speed = qca_get_speed(hu, speed_type: QCA_OPER_SPEED);
1927	if (speed) {
1928	ret = qca_set_speed(hu, speed_type: QCA_OPER_SPEED);
1929	if (ret)
1930	goto out;
1931
1932	qca_baudrate = qca_get_baudrate_value(speed);
1933	}
1934
1935	switch (soc_type) {
1936	case QCA_WCN3988:
1937	case QCA_WCN3990:
1938	case QCA_WCN3991:
1939	case QCA_WCN3998:
1940	case QCA_WCN6750:
1941	case QCA_WCN6855:
1942	case QCA_WCN7850:
1943	break;
1944
1945	default:
1946	/* Get QCA version information */
1947	ret = qca_read_soc_version(hdev, ver: &ver, soc_type);
1948	if (ret)
1949	goto out;
1950	}
1951
1952	/* Setup patch / NVM configurations */
1953	ret = qca_uart_setup(hdev, baudrate: qca_baudrate, soc_type, ver,
1954	firmware_name);
1955	if (!ret) {
1956	clear_bit(nr: QCA_IBS_DISABLED, addr: &qca->flags);
1957	qca_debugfs_init(hdev);
1958	hu->hdev->hw_error = qca_hw_error;
1959	hu->hdev->cmd_timeout = qca_cmd_timeout;
1960	if (device_can_wakeup(dev: hu->serdev->ctrl->dev.parent))
1961	hu->hdev->wakeup = qca_wakeup;
1962	} else if (ret == -ENOENT) {
1963	/* No patch/nvm-config found, run with original fw/config */
1964	set_bit(nr: QCA_ROM_FW, addr: &qca->flags);
1965	ret = 0;
1966	} else if (ret == -EAGAIN) {
1967	/*
1968	* Userspace firmware loader will return -EAGAIN in case no
1969	* patch/nvm-config is found, so run with original fw/config.
1970	*/
1971	set_bit(nr: QCA_ROM_FW, addr: &qca->flags);
1972	ret = 0;
1973	}
1974
1975	out:
1976	if (ret && retries < MAX_INIT_RETRIES) {
1977	bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1978	qca_power_shutdown(hu);
1979	if (hu->serdev) {
1980	serdev_device_close(hu->serdev);
1981	ret = serdev_device_open(hu->serdev);
1982	if (ret) {
1983	bt_dev_err(hdev, "failed to open port");
1984	return ret;
1985	}
1986	}
1987	retries++;
1988	goto retry;
1989	}
1990
1991	/* Setup bdaddr */
1992	if (soc_type == QCA_ROME)
1993	hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1994	else
1995	hu->hdev->set_bdaddr = qca_set_bdaddr;
1996
1997	if (soc_type == QCA_QCA2066)
1998	qca_configure_hfp_offload(hdev);
1999
2000	qca->fw_version = le16_to_cpu(ver.patch_ver);
2001	qca->controller_id = le16_to_cpu(ver.rom_ver);
2002	hci_devcd_register(hdev, coredump: hci_coredump_qca, dmp_hdr: qca_dmp_hdr, NULL);
2003
2004	return ret;
2005	}
2006
2007	static const struct hci_uart_proto qca_proto = {
2008	.id = HCI_UART_QCA,
2009	.name = "QCA",
2010	.manufacturer = 29,
2011	.init_speed = 115200,
2012	.oper_speed = 3000000,
2013	.open = qca_open,
2014	.close = qca_close,
2015	.flush = qca_flush,
2016	.setup = qca_setup,
2017	.recv = qca_recv,
2018	.enqueue = qca_enqueue,
2019	.dequeue = qca_dequeue,
2020	};
2021
2022	static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
2023	.soc_type = QCA_WCN3988,
2024	.vregs = (struct qca_vreg []) {
2025	{ "vddio", 15000 },
2026	{ "vddxo", 80000 },
2027	{ "vddrf", 300000 },
2028	{ "vddch0", 450000 },
2029	},
2030	.num_vregs = 4,
2031	};
2032
2033	static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
2034	.soc_type = QCA_WCN3990,
2035	.vregs = (struct qca_vreg []) {
2036	{ "vddio", 15000 },
2037	{ "vddxo", 80000 },
2038	{ "vddrf", 300000 },
2039	{ "vddch0", 450000 },
2040	},
2041	.num_vregs = 4,
2042	};
2043
2044	static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
2045	.soc_type = QCA_WCN3991,
2046	.vregs = (struct qca_vreg []) {
2047	{ "vddio", 15000 },
2048	{ "vddxo", 80000 },
2049	{ "vddrf", 300000 },
2050	{ "vddch0", 450000 },
2051	},
2052	.num_vregs = 4,
2053	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2054	};
2055
2056	static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
2057	.soc_type = QCA_WCN3998,
2058	.vregs = (struct qca_vreg []) {
2059	{ "vddio", 10000 },
2060	{ "vddxo", 80000 },
2061	{ "vddrf", 300000 },
2062	{ "vddch0", 450000 },
2063	},
2064	.num_vregs = 4,
2065	};
2066
2067	static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
2068	.soc_type = QCA_QCA2066,
2069	.num_vregs = 0,
2070	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2071	};
2072
2073	static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
2074	.soc_type = QCA_QCA6390,
2075	.num_vregs = 0,
2076	};
2077
2078	static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
2079	.soc_type = QCA_WCN6750,
2080	.vregs = (struct qca_vreg []) {
2081	{ "vddio", 5000 },
2082	{ "vddaon", 26000 },
2083	{ "vddbtcxmx", 126000 },
2084	{ "vddrfacmn", 12500 },
2085	{ "vddrfa0p8", 102000 },
2086	{ "vddrfa1p7", 302000 },
2087	{ "vddrfa1p2", 257000 },
2088	{ "vddrfa2p2", 1700000 },
2089	{ "vddasd", 200 },
2090	},
2091	.num_vregs = 9,
2092	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2093	};
2094
2095	static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
2096	.soc_type = QCA_WCN6855,
2097	.vregs = (struct qca_vreg []) {
2098	{ "vddio", 5000 },
2099	{ "vddbtcxmx", 126000 },
2100	{ "vddrfacmn", 12500 },
2101	{ "vddrfa0p8", 102000 },
2102	{ "vddrfa1p7", 302000 },
2103	{ "vddrfa1p2", 257000 },
2104	},
2105	.num_vregs = 6,
2106	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2107	};
2108
2109	static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
2110	.soc_type = QCA_WCN7850,
2111	.vregs = (struct qca_vreg []) {
2112	{ "vddio", 5000 },
2113	{ "vddaon", 26000 },
2114	{ "vdddig", 126000 },
2115	{ "vddrfa0p8", 102000 },
2116	{ "vddrfa1p2", 257000 },
2117	{ "vddrfa1p9", 302000 },
2118	},
2119	.num_vregs = 6,
2120	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2121	};
2122
2123	static void qca_power_shutdown(struct hci_uart *hu)
2124	{
2125	struct qca_serdev *qcadev;
2126	struct qca_data *qca = hu->priv;
2127	unsigned long flags;
2128	enum qca_btsoc_type soc_type = qca_soc_type(hu);
2129	bool sw_ctrl_state;
2130
2131	/* From this point we go into power off state. But serial port is
2132	* still open, stop queueing the IBS data and flush all the buffered
2133	* data in skb's.
2134	*/
2135	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
2136	set_bit(nr: QCA_IBS_DISABLED, addr: &qca->flags);
2137	qca_flush(hu);
2138	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
2139
2140	/* Non-serdev device usually is powered by external power
2141	* and don't need additional action in driver for power down
2142	*/
2143	if (!hu->serdev)
2144	return;
2145
2146	qcadev = serdev_device_get_drvdata(serdev: hu->serdev);
2147
2148	switch (soc_type) {
2149	case QCA_WCN3988:
2150	case QCA_WCN3990:
2151	case QCA_WCN3991:
2152	case QCA_WCN3998:
2153	host_set_baudrate(hu, speed: 2400);
2154	qca_send_power_pulse(hu, on: false);
2155	qca_regulator_disable(qcadev);
2156	break;
2157
2158	case QCA_WCN6750:
2159	case QCA_WCN6855:
2160	gpiod_set_value_cansleep(desc: qcadev->bt_en, value: 0);
2161	msleep(msecs: 100);
2162	qca_regulator_disable(qcadev);
2163	if (qcadev->sw_ctrl) {
2164	sw_ctrl_state = gpiod_get_value_cansleep(desc: qcadev->sw_ctrl);
2165	bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
2166	}
2167	break;
2168
2169	default:
2170	gpiod_set_value_cansleep(desc: qcadev->bt_en, value: 0);
2171	}
2172
2173	set_bit(nr: QCA_BT_OFF, addr: &qca->flags);
2174	}
2175
2176	static int qca_power_off(struct hci_dev *hdev)
2177	{
2178	struct hci_uart *hu = hci_get_drvdata(hdev);
2179	struct qca_data *qca = hu->priv;
2180	enum qca_btsoc_type soc_type = qca_soc_type(hu);
2181
2182	hu->hdev->hw_error = NULL;
2183	hu->hdev->cmd_timeout = NULL;
2184
2185	del_timer_sync(timer: &qca->wake_retrans_timer);
2186	del_timer_sync(timer: &qca->tx_idle_timer);
2187
2188	/* Stop sending shutdown command if soc crashes. */
2189	if (soc_type != QCA_ROME
2190	&& qca->memdump_state == QCA_MEMDUMP_IDLE) {
2191	qca_send_pre_shutdown_cmd(hdev);
2192	usleep_range(min: 8000, max: 10000);
2193	}
2194
2195	qca_power_shutdown(hu);
2196	return 0;
2197	}
2198
2199	static int qca_regulator_enable(struct qca_serdev *qcadev)
2200	{
2201	struct qca_power *power = qcadev->bt_power;
2202	int ret;
2203
2204	/* Already enabled */
2205	if (power->vregs_on)
2206	return 0;
2207
2208	BT_DBG("enabling %d regulators)", power->num_vregs);
2209
2210	ret = regulator_bulk_enable(num_consumers: power->num_vregs, consumers: power->vreg_bulk);
2211	if (ret)
2212	return ret;
2213
2214	power->vregs_on = true;
2215
2216	ret = clk_prepare_enable(clk: qcadev->susclk);
2217	if (ret)
2218	qca_regulator_disable(qcadev);
2219
2220	return ret;
2221	}
2222
2223	static void qca_regulator_disable(struct qca_serdev *qcadev)
2224	{
2225	struct qca_power *power;
2226
2227	if (!qcadev)
2228	return;
2229
2230	power = qcadev->bt_power;
2231
2232	/* Already disabled? */
2233	if (!power->vregs_on)
2234	return;
2235
2236	regulator_bulk_disable(num_consumers: power->num_vregs, consumers: power->vreg_bulk);
2237	power->vregs_on = false;
2238
2239	clk_disable_unprepare(clk: qcadev->susclk);
2240	}
2241
2242	static int qca_init_regulators(struct qca_power *qca,
2243	const struct qca_vreg *vregs, size_t num_vregs)
2244	{
2245	struct regulator_bulk_data *bulk;
2246	int ret;
2247	int i;
2248
2249	bulk = devm_kcalloc(dev: qca->dev, n: num_vregs, size: sizeof(*bulk), GFP_KERNEL);
2250	if (!bulk)
2251	return -ENOMEM;
2252
2253	for (i = 0; i < num_vregs; i++)
2254	bulk[i].supply = vregs[i].name;
2255
2256	ret = devm_regulator_bulk_get(dev: qca->dev, num_consumers: num_vregs, consumers: bulk);
2257	if (ret < 0)
2258	return ret;
2259
2260	for (i = 0; i < num_vregs; i++) {
2261	ret = regulator_set_load(regulator: bulk[i].consumer, load_uA: vregs[i].load_uA);
2262	if (ret)
2263	return ret;
2264	}
2265
2266	qca->vreg_bulk = bulk;
2267	qca->num_vregs = num_vregs;
2268
2269	return 0;
2270	}
2271
2272	static int qca_serdev_probe(struct serdev_device *serdev)
2273	{
2274	struct qca_serdev *qcadev;
2275	struct hci_dev *hdev;
2276	const struct qca_device_data *data;
2277	int err;
2278	bool power_ctrl_enabled = true;
2279
2280	qcadev = devm_kzalloc(dev: &serdev->dev, size: sizeof(*qcadev), GFP_KERNEL);
2281	if (!qcadev)
2282	return -ENOMEM;
2283
2284	qcadev->serdev_hu.serdev = serdev;
2285	data = device_get_match_data(dev: &serdev->dev);
2286	serdev_device_set_drvdata(serdev, data: qcadev);
2287	device_property_read_string(dev: &serdev->dev, propname: "firmware-name",
2288	val: &qcadev->firmware_name);
2289	device_property_read_u32(dev: &serdev->dev, propname: "max-speed",
2290	val: &qcadev->oper_speed);
2291	if (!qcadev->oper_speed)
2292	BT_DBG("UART will pick default operating speed");
2293
2294	qcadev->bdaddr_property_broken = device_property_read_bool(dev: &serdev->dev,
2295	propname: "qcom,local-bd-address-broken");
2296
2297	if (data)
2298	qcadev->btsoc_type = data->soc_type;
2299	else
2300	qcadev->btsoc_type = QCA_ROME;
2301
2302	switch (qcadev->btsoc_type) {
2303	case QCA_WCN3988:
2304	case QCA_WCN3990:
2305	case QCA_WCN3991:
2306	case QCA_WCN3998:
2307	case QCA_WCN6750:
2308	case QCA_WCN6855:
2309	case QCA_WCN7850:
2310	qcadev->bt_power = devm_kzalloc(dev: &serdev->dev,
2311	size: sizeof(struct qca_power),
2312	GFP_KERNEL);
2313	if (!qcadev->bt_power)
2314	return -ENOMEM;
2315
2316	qcadev->bt_power->dev = &serdev->dev;
2317	err = qca_init_regulators(qca: qcadev->bt_power, vregs: data->vregs,
2318	num_vregs: data->num_vregs);
2319	if (err) {
2320	BT_ERR("Failed to init regulators:%d", err);
2321	return err;
2322	}
2323
2324	qcadev->bt_power->vregs_on = false;
2325
2326	qcadev->bt_en = devm_gpiod_get_optional(dev: &serdev->dev, con_id: "enable",
2327	flags: GPIOD_OUT_LOW);
2328	if (IS_ERR(ptr: qcadev->bt_en) &&
2329	(data->soc_type == QCA_WCN6750 ||
2330	data->soc_type == QCA_WCN6855)) {
2331	dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2332	power_ctrl_enabled = false;
2333	}
2334
2335	qcadev->sw_ctrl = devm_gpiod_get_optional(dev: &serdev->dev, con_id: "swctrl",
2336	flags: GPIOD_IN);
2337	if (IS_ERR(ptr: qcadev->sw_ctrl) &&
2338	(data->soc_type == QCA_WCN6750 ||
2339	data->soc_type == QCA_WCN6855 ||
2340	data->soc_type == QCA_WCN7850))
2341	dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2342
2343	qcadev->susclk = devm_clk_get_optional(dev: &serdev->dev, NULL);
2344	if (IS_ERR(ptr: qcadev->susclk)) {
2345	dev_err(&serdev->dev, "failed to acquire clk\n");
2346	return PTR_ERR(ptr: qcadev->susclk);
2347	}
2348
2349	err = hci_uart_register_device(hu: &qcadev->serdev_hu, p: &qca_proto);
2350	if (err) {
2351	BT_ERR("wcn3990 serdev registration failed");
2352	return err;
2353	}
2354	break;
2355
2356	default:
2357	qcadev->bt_en = devm_gpiod_get_optional(dev: &serdev->dev, con_id: "enable",
2358	flags: GPIOD_OUT_LOW);
2359	if (IS_ERR(ptr: qcadev->bt_en)) {
2360	dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2361	power_ctrl_enabled = false;
2362	}
2363
2364	qcadev->susclk = devm_clk_get_optional(dev: &serdev->dev, NULL);
2365	if (IS_ERR(ptr: qcadev->susclk)) {
2366	dev_warn(&serdev->dev, "failed to acquire clk\n");
2367	return PTR_ERR(ptr: qcadev->susclk);
2368	}
2369	err = clk_set_rate(clk: qcadev->susclk, SUSCLK_RATE_32KHZ);
2370	if (err)
2371	return err;
2372
2373	err = clk_prepare_enable(clk: qcadev->susclk);
2374	if (err)
2375	return err;
2376
2377	err = hci_uart_register_device(hu: &qcadev->serdev_hu, p: &qca_proto);
2378	if (err) {
2379	BT_ERR("Rome serdev registration failed");
2380	clk_disable_unprepare(clk: qcadev->susclk);
2381	return err;
2382	}
2383	}
2384
2385	hdev = qcadev->serdev_hu.hdev;
2386
2387	if (power_ctrl_enabled) {
2388	set_bit(nr: HCI_QUIRK_NON_PERSISTENT_SETUP, addr: &hdev->quirks);
2389	hdev->shutdown = qca_power_off;
2390	}
2391
2392	if (data) {
2393	/* Wideband speech support must be set per driver since it can't
2394	* be queried via hci. Same with the valid le states quirk.
2395	*/
2396	if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2397	set_bit(nr: HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2398	addr: &hdev->quirks);
2399
2400	if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2401	set_bit(nr: HCI_QUIRK_VALID_LE_STATES, addr: &hdev->quirks);
2402	}
2403
2404	return 0;
2405	}
2406
2407	static void qca_serdev_remove(struct serdev_device *serdev)
2408	{
2409	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2410	struct qca_power *power = qcadev->bt_power;
2411
2412	switch (qcadev->btsoc_type) {
2413	case QCA_WCN3988:
2414	case QCA_WCN3990:
2415	case QCA_WCN3991:
2416	case QCA_WCN3998:
2417	case QCA_WCN6750:
2418	case QCA_WCN6855:
2419	case QCA_WCN7850:
2420	if (power->vregs_on) {
2421	qca_power_shutdown(hu: &qcadev->serdev_hu);
2422	break;
2423	}
2424	fallthrough;
2425
2426	default:
2427	if (qcadev->susclk)
2428	clk_disable_unprepare(clk: qcadev->susclk);
2429	}
2430
2431	hci_uart_unregister_device(hu: &qcadev->serdev_hu);
2432	}
2433
2434	static void qca_serdev_shutdown(struct device *dev)
2435	{
2436	int ret;
2437	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2438	struct serdev_device *serdev = to_serdev_device(d: dev);
2439	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2440	struct hci_uart *hu = &qcadev->serdev_hu;
2441	struct hci_dev *hdev = hu->hdev;
2442	struct qca_data *qca = hu->priv;
2443	const u8 ibs_wake_cmd[] = { 0xFD };
2444	const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2445
2446	if (qcadev->btsoc_type == QCA_QCA6390) {
2447	if (test_bit(QCA_BT_OFF, &qca->flags) ||
2448	!test_bit(HCI_RUNNING, &hdev->flags))
2449	return;
2450
2451	serdev_device_write_flush(serdev);
2452	ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2453	sizeof(ibs_wake_cmd));
2454	if (ret < 0) {
2455	BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2456	return;
2457	}
2458	serdev_device_wait_until_sent(serdev, timeout);
2459	usleep_range(min: 8000, max: 10000);
2460
2461	serdev_device_write_flush(serdev);
2462	ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2463	sizeof(edl_reset_soc_cmd));
2464	if (ret < 0) {
2465	BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2466	return;
2467	}
2468	serdev_device_wait_until_sent(serdev, timeout);
2469	usleep_range(min: 8000, max: 10000);
2470	}
2471	}
2472
2473	static int __maybe_unused qca_suspend(struct device *dev)
2474	{
2475	struct serdev_device *serdev = to_serdev_device(d: dev);
2476	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2477	struct hci_uart *hu = &qcadev->serdev_hu;
2478	struct qca_data *qca = hu->priv;
2479	unsigned long flags;
2480	bool tx_pending = false;
2481	int ret = 0;
2482	u8 cmd;
2483	u32 wait_timeout = 0;
2484
2485	set_bit(nr: QCA_SUSPENDING, addr: &qca->flags);
2486
2487	/* if BT SoC is running with default firmware then it does not
2488	* support in-band sleep
2489	*/
2490	if (test_bit(QCA_ROM_FW, &qca->flags))
2491	return 0;
2492
2493	/* During SSR after memory dump collection, controller will be
2494	* powered off and then powered on.If controller is powered off
2495	* during SSR then we should wait until SSR is completed.
2496	*/
2497	if (test_bit(QCA_BT_OFF, &qca->flags) &&
2498	!test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2499	return 0;
2500
2501	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2502	test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2503	wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2504	IBS_DISABLE_SSR_TIMEOUT_MS :
2505	FW_DOWNLOAD_TIMEOUT_MS;
2506
2507	/* QCA_IBS_DISABLED flag is set to true, During FW download
2508	* and during memory dump collection. It is reset to false,
2509	* After FW download complete.
2510	*/
2511	wait_on_bit_timeout(word: &qca->flags, bit: QCA_IBS_DISABLED,
2512	TASK_UNINTERRUPTIBLE, timeout: msecs_to_jiffies(m: wait_timeout));
2513
2514	if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2515	bt_dev_err(hu->hdev, "SSR or FW download time out");
2516	ret = -ETIMEDOUT;
2517	goto error;
2518	}
2519	}
2520
2521	cancel_work_sync(work: &qca->ws_awake_device);
2522	cancel_work_sync(work: &qca->ws_awake_rx);
2523
2524	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2525	flags, SINGLE_DEPTH_NESTING);
2526
2527	switch (qca->tx_ibs_state) {
2528	case HCI_IBS_TX_WAKING:
2529	del_timer(timer: &qca->wake_retrans_timer);
2530	fallthrough;
2531	case HCI_IBS_TX_AWAKE:
2532	del_timer(timer: &qca->tx_idle_timer);
2533
2534	serdev_device_write_flush(hu->serdev);
2535	cmd = HCI_IBS_SLEEP_IND;
2536	ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2537
2538	if (ret < 0) {
2539	BT_ERR("Failed to send SLEEP to device");
2540	break;
2541	}
2542
2543	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2544	qca->ibs_sent_slps++;
2545	tx_pending = true;
2546	break;
2547
2548	case HCI_IBS_TX_ASLEEP:
2549	break;
2550
2551	default:
2552	BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2553	ret = -EINVAL;
2554	break;
2555	}
2556
2557	spin_unlock_irqrestore(lock: &qca->hci_ibs_lock, flags);
2558
2559	if (ret < 0)
2560	goto error;
2561
2562	if (tx_pending) {
2563	serdev_device_wait_until_sent(hu->serdev,
2564	msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2565	serial_clock_vote(vote: HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2566	}
2567
2568	/* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2569	* to sleep, so that the packet does not wake the system later.
2570	*/
2571	ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2572	qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2573	msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2574	if (ret == 0) {
2575	ret = -ETIMEDOUT;
2576	goto error;
2577	}
2578
2579	return 0;
2580
2581	error:
2582	clear_bit(nr: QCA_SUSPENDING, addr: &qca->flags);
2583
2584	return ret;
2585	}
2586
2587	static int __maybe_unused qca_resume(struct device *dev)
2588	{
2589	struct serdev_device *serdev = to_serdev_device(d: dev);
2590	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2591	struct hci_uart *hu = &qcadev->serdev_hu;
2592	struct qca_data *qca = hu->priv;
2593
2594	clear_bit(nr: QCA_SUSPENDING, addr: &qca->flags);
2595
2596	return 0;
2597	}
2598
2599	static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2600
2601	#ifdef CONFIG_OF
2602	static const struct of_device_id qca_bluetooth_of_match[] = {
2603	{ .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066},
2604	{ .compatible = "qcom,qca6174-bt" },
2605	{ .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2606	{ .compatible = "qcom,qca9377-bt" },
2607	{ .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2608	{ .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2609	{ .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2610	{ .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2611	{ .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2612	{ .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2613	{ .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850},
2614	{ /* sentinel */ }
2615	};
2616	MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2617	#endif
2618
2619	#ifdef CONFIG_ACPI
2620	static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2621	{ "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 },
2622	{ "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2623	{ "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2624	{ "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2625	{ "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2626	{ },
2627	};
2628	MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2629	#endif
2630
2631	#ifdef CONFIG_DEV_COREDUMP
2632	static void hciqca_coredump(struct device *dev)
2633	{
2634	struct serdev_device *serdev = to_serdev_device(d: dev);
2635	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2636	struct hci_uart *hu = &qcadev->serdev_hu;
2637	struct hci_dev *hdev = hu->hdev;
2638
2639	if (hdev->dump.coredump)
2640	hdev->dump.coredump(hdev);
2641	}
2642	#endif
2643
2644	static struct serdev_device_driver qca_serdev_driver = {
2645	.probe = qca_serdev_probe,
2646	.remove = qca_serdev_remove,
2647	.driver = {
2648	.name = "hci_uart_qca",
2649	.of_match_table = of_match_ptr(qca_bluetooth_of_match),
2650	.acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2651	.shutdown = qca_serdev_shutdown,
2652	.pm = &qca_pm_ops,
2653	#ifdef CONFIG_DEV_COREDUMP
2654	.coredump = hciqca_coredump,
2655	#endif
2656	},
2657	};
2658
2659	int __init qca_init(void)
2660	{
2661	serdev_device_driver_register(&qca_serdev_driver);
2662
2663	return hci_uart_register_proto(p: &qca_proto);
2664	}
2665
2666	int __exit qca_deinit(void)
2667	{
2668	serdev_device_driver_unregister(sdrv: &qca_serdev_driver);
2669
2670	return hci_uart_unregister_proto(p: &qca_proto);
2671	}
2672