1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2/* Copyright (c) 2015 - 2021 Intel Corporation */
3#ifndef IRDMA_MAIN_H
4#define IRDMA_MAIN_H
5
6#include <linux/ip.h>
7#include <linux/tcp.h>
8#include <linux/if_vlan.h>
9#include <net/addrconf.h>
10#include <net/netevent.h>
11#include <net/tcp.h>
12#include <net/ip6_route.h>
13#include <net/flow.h>
14#include <net/secure_seq.h>
15#include <linux/netdevice.h>
16#include <linux/etherdevice.h>
17#include <linux/inetdevice.h>
18#include <linux/spinlock.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/pci.h>
22#include <linux/dma-mapping.h>
23#include <linux/workqueue.h>
24#include <linux/slab.h>
25#include <linux/io.h>
26#include <linux/crc32c.h>
27#include <linux/kthread.h>
28#ifndef CONFIG_64BIT
29#include <linux/io-64-nonatomic-lo-hi.h>
30#endif
31#include <linux/auxiliary_bus.h>
32#include <linux/net/intel/iidc_rdma.h>
33#include <rdma/ib_smi.h>
34#include <rdma/ib_verbs.h>
35#include <rdma/ib_pack.h>
36#include <rdma/rdma_cm.h>
37#include <rdma/iw_cm.h>
38#include <rdma/ib_user_verbs.h>
39#include <rdma/ib_umem.h>
40#include <rdma/ib_cache.h>
41#include <rdma/uverbs_ioctl.h>
42#include "osdep.h"
43#include "defs.h"
44#include "hmc.h"
45#include "type.h"
46#include "ws.h"
47#include "protos.h"
48#include "pble.h"
49#include "cm.h"
50#include <rdma/irdma-abi.h>
51#include "verbs.h"
52#include "user.h"
53#include "puda.h"
54
55extern struct auxiliary_driver i40iw_auxiliary_drv;
56extern struct iidc_rdma_core_auxiliary_drv icrdma_core_auxiliary_drv;
57extern struct iidc_rdma_core_auxiliary_drv ig3rdma_core_auxiliary_drv;
58
59#define IRDMA_FW_VER_DEFAULT 2
60#define IRDMA_HW_VER 2
61
62#define IRDMA_ARP_ADD 1
63#define IRDMA_ARP_DELETE 2
64#define IRDMA_ARP_RESOLVE 3
65
66#define IRDMA_MACIP_ADD 1
67#define IRDMA_MACIP_DELETE 2
68
69#define IW_GEN_3_CCQ_SIZE (2 * IRDMA_CQP_SW_SQSIZE_2048 + 2)
70#define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 2)
71#define IW_CEQ_SIZE 2048
72#define IW_AEQ_SIZE 2048
73
74#define RX_BUF_SIZE (1536 + 8)
75#define IW_REG0_SIZE (4 * 1024)
76#define IW_TX_TIMEOUT (6 * HZ)
77#define IW_FIRST_QPN 1
78
79#define IW_SW_CONTEXT_ALIGN 1024
80
81#define MAX_DPC_ITERATIONS 128
82
83#define IRDMA_EVENT_TIMEOUT_MS 5000
84#define IRDMA_VCHNL_EVENT_TIMEOUT 100000
85#define IRDMA_RST_TIMEOUT_HZ 4
86
87#define IRDMA_NO_QSET 0xffff
88
89#define IW_CFG_FPM_QP_COUNT 32768
90#define IRDMA_MAX_PAGES_PER_FMR 262144
91#define IRDMA_MIN_PAGES_PER_FMR 1
92#define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2
93#define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3
94
95#define IRDMA_Q_TYPE_PE_AEQ 0x80
96#define IRDMA_Q_INVALID_IDX 0xffff
97#define IRDMA_REM_ENDPOINT_TRK_QPID 3
98
99#define IRDMA_DRV_OPT_ENA_MPA_VER_0 0x00000001
100#define IRDMA_DRV_OPT_DISABLE_MPA_CRC 0x00000002
101#define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
102#define IRDMA_DRV_OPT_DISABLE_INTF 0x00000008
103#define IRDMA_DRV_OPT_ENA_MSI 0x00000010
104#define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
105#define IRDMA_DRV_OPT_NO_INLINE_DATA 0x00000080
106#define IRDMA_DRV_OPT_DISABLE_INT_MOD 0x00000100
107#define IRDMA_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
108#define IRDMA_DRV_OPT_ENA_PAU 0x00000400
109#define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
110
111#define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
112#define IRDMA_ROCE_CWND_DEFAULT 0x400
113#define IRDMA_ROCE_ACKCREDS_DEFAULT 0x1E
114
115#define IRDMA_FLUSH_SQ BIT(0)
116#define IRDMA_FLUSH_RQ BIT(1)
117#define IRDMA_REFLUSH BIT(2)
118#define IRDMA_FLUSH_WAIT BIT(3)
119
120#define IRDMA_IRQ_NAME_STR_LEN (64)
121
122#define IRDMA_NUM_AEQ_MSIX 1
123#define IRDMA_MIN_MSIX 2
124
125enum init_completion_state {
126 INVALID_STATE = 0,
127 INITIAL_STATE,
128 CQP_CREATED,
129 HMC_OBJS_CREATED,
130 HW_RSRC_INITIALIZED,
131 CCQ_CREATED,
132 CEQ0_CREATED,
133 CEQS_CREATED,
134 PBLE_CHUNK_MEM,
135 AEQ_CREATED,
136 ILQ_CREATED,
137 IEQ_CREATED, /* Last state of probe */
138 IP_ADDR_REGISTERED, /* Last state of open */
139};
140
141struct irdma_rsrc_limits {
142 u32 qplimit;
143 u32 mrlimit;
144 u32 cqlimit;
145};
146
147struct irdma_cqp_err_info {
148 u16 maj;
149 u16 min;
150 const char *desc;
151};
152
153struct irdma_cqp_compl_info {
154 u32 op_ret_val;
155 u16 maj_err_code;
156 u16 min_err_code;
157 bool error;
158 u8 op_code;
159};
160
161struct irdma_cqp_request {
162 struct cqp_cmds_info info;
163 wait_queue_head_t waitq;
164 struct list_head list;
165 refcount_t refcnt;
166 void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
167 void *param;
168 struct irdma_cqp_compl_info compl_info;
169 bool request_done; /* READ/WRITE_ONCE macros operate on it */
170 bool waiting:1;
171 bool dynamic:1;
172 bool pending:1;
173};
174
175struct irdma_cqp {
176 struct irdma_sc_cqp sc_cqp;
177 spinlock_t req_lock; /* protect CQP request list */
178 spinlock_t compl_lock; /* protect CQP completion processing */
179 wait_queue_head_t waitq;
180 wait_queue_head_t remove_wq;
181 struct irdma_dma_mem sq;
182 struct irdma_dma_mem host_ctx;
183 u64 *scratch_array;
184 struct irdma_cqp_request *cqp_requests;
185 struct irdma_ooo_cqp_op *oop_op_array;
186 struct list_head cqp_avail_reqs;
187 struct list_head cqp_pending_reqs;
188};
189
190struct irdma_ccq {
191 struct irdma_sc_cq sc_cq;
192 struct irdma_dma_mem mem_cq;
193 struct irdma_dma_mem shadow_area;
194};
195
196struct irdma_ceq {
197 struct irdma_sc_ceq sc_ceq;
198 struct irdma_dma_mem mem;
199 u32 irq;
200 u32 msix_idx;
201 struct irdma_pci_f *rf;
202 struct tasklet_struct dpc_tasklet;
203 spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
204};
205
206struct irdma_aeq {
207 struct irdma_sc_aeq sc_aeq;
208 struct irdma_dma_mem mem;
209 struct irdma_pble_alloc palloc;
210 bool virtual_map;
211};
212
213struct irdma_arp_entry {
214 u32 ip_addr[4];
215 u8 mac_addr[ETH_ALEN];
216};
217
218struct irdma_msix_vector {
219 u32 idx;
220 u32 irq;
221 u32 cpu_affinity;
222 u32 ceq_id;
223 cpumask_t mask;
224 char name[IRDMA_IRQ_NAME_STR_LEN];
225};
226
227struct irdma_mc_table_info {
228 u32 mgn;
229 u32 dest_ip[4];
230 bool lan_fwd:1;
231 bool ipv4_valid:1;
232};
233
234struct mc_table_list {
235 struct list_head list;
236 struct irdma_mc_table_info mc_info;
237 struct irdma_mcast_grp_info mc_grp_ctx;
238};
239
240struct irdma_qv_info {
241 u32 v_idx; /* msix_vector */
242 u16 ceq_idx;
243 u16 aeq_idx;
244 u8 itr_idx;
245};
246
247struct irdma_qvlist_info {
248 u32 num_vectors;
249 struct irdma_qv_info qv_info[] __counted_by(num_vectors);
250};
251
252struct irdma_gen_ops {
253 void (*request_reset)(struct irdma_pci_f *rf);
254 int (*register_qset)(struct irdma_sc_vsi *vsi,
255 struct irdma_ws_node *tc_node);
256 void (*unregister_qset)(struct irdma_sc_vsi *vsi,
257 struct irdma_ws_node *tc_node);
258};
259
260struct irdma_pci_f {
261 bool reset:1;
262 bool rsrc_created:1;
263 bool msix_shared:1;
264 bool hwqp1_rsvd:1;
265 u8 rsrc_profile;
266 u8 *hmc_info_mem;
267 u8 *mem_rsrc;
268 u8 rdma_ver;
269 u8 rst_to;
270 u8 pf_id;
271 enum irdma_protocol_used protocol_used;
272 u32 sd_type;
273 u32 msix_count;
274 u32 max_mr;
275 u32 max_qp;
276 u32 max_cq;
277 u32 max_srq;
278 u32 next_srq;
279 u32 max_ah;
280 u32 next_ah;
281 u32 max_mcg;
282 u32 next_mcg;
283 u32 max_pd;
284 u32 next_qp;
285 u32 next_cq;
286 u32 next_pd;
287 u32 max_mr_size;
288 u32 max_cqe;
289 u32 mr_stagmask;
290 u32 used_pds;
291 u32 used_cqs;
292 u32 used_srqs;
293 u32 used_mrs;
294 u32 used_qps;
295 u32 arp_table_size;
296 u32 next_arp_index;
297 u32 ceqs_count;
298 u32 next_ws_node_id;
299 u32 max_ws_node_id;
300 u32 limits_sel;
301 unsigned long *allocated_ws_nodes;
302 unsigned long *allocated_qps;
303 unsigned long *allocated_cqs;
304 unsigned long *allocated_srqs;
305 unsigned long *allocated_mrs;
306 unsigned long *allocated_pds;
307 unsigned long *allocated_mcgs;
308 unsigned long *allocated_ahs;
309 unsigned long *allocated_arps;
310 enum init_completion_state init_state;
311 struct irdma_sc_dev sc_dev;
312 struct pci_dev *pcidev;
313 void *cdev;
314 struct irdma_hw hw;
315 struct irdma_cqp cqp;
316 struct irdma_ccq ccq;
317 struct irdma_aeq aeq;
318 struct irdma_ceq *ceqlist;
319 struct irdma_hmc_pble_rsrc *pble_rsrc;
320 struct irdma_arp_entry *arp_table;
321 spinlock_t arp_lock; /*protect ARP table access*/
322 spinlock_t rsrc_lock; /* protect HW resource array access */
323 spinlock_t qptable_lock; /*protect QP table access*/
324 spinlock_t cqtable_lock; /*protect CQ table access*/
325 struct irdma_qp **qp_table;
326 struct irdma_cq **cq_table;
327 spinlock_t qh_list_lock; /* protect mc_qht_list */
328 struct mc_table_list mc_qht_list;
329 struct irdma_msix_vector *iw_msixtbl;
330 struct irdma_qvlist_info *iw_qvlist;
331 struct tasklet_struct dpc_tasklet;
332 struct msix_entry *msix_entries;
333 struct irdma_dma_mem obj_mem;
334 struct irdma_dma_mem obj_next;
335 atomic_t vchnl_msgs;
336 wait_queue_head_t vchnl_waitq;
337 struct workqueue_struct *cqp_cmpl_wq;
338 struct work_struct cqp_cmpl_work;
339 struct workqueue_struct *vchnl_wq;
340 struct irdma_sc_vsi default_vsi;
341 void *back_fcn;
342 struct irdma_gen_ops gen_ops;
343 struct irdma_device *iwdev;
344 DECLARE_HASHTABLE(ah_hash_tbl, 8);
345 struct mutex ah_tbl_lock; /* protect AH hash table access */
346};
347
348struct irdma_device {
349 struct ib_device ibdev;
350 struct irdma_pci_f *rf;
351 struct net_device *netdev;
352 struct workqueue_struct *cleanup_wq;
353 struct irdma_sc_vsi vsi;
354 struct irdma_cm_core cm_core;
355 u32 roce_cwnd;
356 u32 roce_ackcreds;
357 u32 vendor_id;
358 u32 vendor_part_id;
359 u32 push_mode;
360 u32 rcv_wnd;
361 u16 mac_ip_table_idx;
362 u16 vsi_num;
363 u16 vport_id;
364 u8 rcv_wscale;
365 u8 iw_status;
366 bool roce_mode:1;
367 bool roce_dcqcn_en:1;
368 bool dcb_vlan_mode:1;
369 bool iw_ooo:1;
370 bool is_vport:1;
371 enum init_completion_state init_state;
372
373 wait_queue_head_t suspend_wq;
374};
375
376static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
377{
378 return container_of(ibdev, struct irdma_device, ibdev);
379}
380
381static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
382{
383 return container_of(ibucontext, struct irdma_ucontext, ibucontext);
384}
385
386static inline struct irdma_user_mmap_entry *
387to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
388{
389 return container_of(rdma_entry, struct irdma_user_mmap_entry,
390 rdma_entry);
391}
392
393static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
394{
395 return container_of(ibpd, struct irdma_pd, ibpd);
396}
397
398static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
399{
400 return container_of(ibah, struct irdma_ah, ibah);
401}
402
403static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
404{
405 return container_of(ibmr, struct irdma_mr, ibmr);
406}
407
408static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
409{
410 return container_of(ibmw, struct irdma_mr, ibmw);
411}
412
413static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
414{
415 return container_of(ibcq, struct irdma_cq, ibcq);
416}
417
418static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
419{
420 return container_of(ibqp, struct irdma_qp, ibqp);
421}
422
423static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
424{
425 return container_of(dev, struct irdma_pci_f, sc_dev);
426}
427
428static inline struct irdma_srq *to_iwsrq(struct ib_srq *ibsrq)
429{
430 return container_of(ibsrq, struct irdma_srq, ibsrq);
431}
432
433/**
434 * irdma_alloc_resource - allocate a resource
435 * @iwdev: device pointer
436 * @resource_array: resource bit array:
437 * @max_resources: maximum resource number
438 * @req_resources_num: Allocated resource number
439 * @next: next free id
440 **/
441static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
442 unsigned long *rsrc_array, u32 max_rsrc,
443 u32 *req_rsrc_num, u32 *next)
444{
445 u32 rsrc_num;
446 unsigned long flags;
447
448 spin_lock_irqsave(&rf->rsrc_lock, flags);
449 rsrc_num = find_next_zero_bit(addr: rsrc_array, size: max_rsrc, offset: *next);
450 if (rsrc_num >= max_rsrc) {
451 rsrc_num = find_first_zero_bit(addr: rsrc_array, size: max_rsrc);
452 if (rsrc_num >= max_rsrc) {
453 spin_unlock_irqrestore(lock: &rf->rsrc_lock, flags);
454 ibdev_dbg(&rf->iwdev->ibdev,
455 "ERR: resource [%d] allocation failed\n",
456 rsrc_num);
457 return -EOVERFLOW;
458 }
459 }
460 __set_bit(rsrc_num, rsrc_array);
461 *next = rsrc_num + 1;
462 if (*next == max_rsrc)
463 *next = 0;
464 *req_rsrc_num = rsrc_num;
465 spin_unlock_irqrestore(lock: &rf->rsrc_lock, flags);
466
467 return 0;
468}
469
470/**
471 * irdma_free_resource - free a resource
472 * @iwdev: device pointer
473 * @resource_array: resource array for the resource_num
474 * @resource_num: resource number to free
475 **/
476static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
477 unsigned long *rsrc_array, u32 rsrc_num)
478{
479 unsigned long flags;
480
481 spin_lock_irqsave(&rf->rsrc_lock, flags);
482 __clear_bit(rsrc_num, rsrc_array);
483 spin_unlock_irqrestore(lock: &rf->rsrc_lock, flags);
484}
485
486int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
487void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
488int irdma_rt_init_hw(struct irdma_device *iwdev,
489 struct irdma_l2params *l2params);
490void irdma_rt_deinit_hw(struct irdma_device *iwdev);
491void irdma_qp_add_ref(struct ib_qp *ibqp);
492void irdma_qp_rem_ref(struct ib_qp *ibqp);
493void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
494struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
495void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
496void irdma_manage_arp_cache(struct irdma_pci_f *rf,
497 const unsigned char *mac_addr,
498 u32 *ip_addr, bool ipv4, u32 action);
499struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
500void irdma_del_apbvt(struct irdma_device *iwdev,
501 struct irdma_apbvt_entry *entry);
502struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
503 bool wait);
504void irdma_free_cqp_request(struct irdma_cqp *cqp,
505 struct irdma_cqp_request *cqp_request);
506void irdma_put_cqp_request(struct irdma_cqp *cqp,
507 struct irdma_cqp_request *cqp_request);
508int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
509int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
510void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
511
512u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
513void irdma_port_ibevent(struct irdma_device *iwdev);
514void irdma_cm_disconn(struct irdma_qp *qp);
515
516bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
517 u16 maj_err_code, u16 min_err_code);
518int irdma_handle_cqp_op(struct irdma_pci_f *rf,
519 struct irdma_cqp_request *cqp_request);
520
521int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
522 struct ib_udata *udata);
523int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
524 int attr_mask, struct ib_udata *udata);
525void irdma_cq_add_ref(struct ib_cq *ibcq);
526void irdma_cq_rem_ref(struct ib_cq *ibcq);
527void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
528void irdma_srq_event(struct irdma_sc_srq *srq);
529void irdma_srq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_srq *srq);
530void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
531int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
532 struct irdma_modify_qp_info *info, bool wait);
533int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
534int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
535 enum irdma_quad_entry_type etype,
536 enum irdma_quad_hash_manage_type mtype, void *cmnode,
537 bool wait);
538void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
539void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
540void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
541int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
542void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
543void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
544 u8 term_len);
545int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
546int irdma_send_reset(struct irdma_cm_node *cm_node);
547struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
548 u16 rem_port, u32 *rem_addr, u16 loc_port,
549 u32 *loc_addr, u16 vlan_id);
550int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
551 struct irdma_qp_flush_info *info, bool wait);
552void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
553 struct irdma_gen_ae_info *info, bool wait);
554void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
555void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
556u16 irdma_get_vlan_ipv4(u32 *addr);
557void irdma_get_vlan_mac_ipv6(u32 *addr, u16 *vlan_id, u8 *mac);
558struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
559 int acc, u64 *iova_start, bool dma_mr);
560int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
561void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
562int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
563 bool wait,
564 void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
565 void *cb_param);
566void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
567int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event,
568 void *ptr);
569int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event,
570 void *ptr);
571int irdma_net_event(struct notifier_block *notifier, unsigned long event,
572 void *ptr);
573int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
574 void *ptr);
575void irdma_add_ip(struct irdma_device *iwdev);
576void cqp_compl_worker(struct work_struct *work);
577void irdma_log_invalid_mtu(u16 mtu, struct irdma_sc_dev *dev);
578#endif /* IRDMA_MAIN_H */
579

source code of linux/drivers/infiniband/hw/irdma/main.h