1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* Copyright (C) 2022 MediaTek Inc. |
3 | * |
4 | * Author: Lorenzo Bianconi <lorenzo@kernel.org> |
5 | * Sujuan Chen <sujuan.chen@mediatek.com> |
6 | */ |
7 | |
8 | #include <linux/firmware.h> |
9 | #include <linux/of_address.h> |
10 | #include <linux/of_reserved_mem.h> |
11 | #include <linux/mfd/syscon.h> |
12 | #include <linux/soc/mediatek/mtk_wed.h> |
13 | #include <asm/unaligned.h> |
14 | |
15 | #include "mtk_wed_regs.h" |
16 | #include "mtk_wed_wo.h" |
17 | #include "mtk_wed.h" |
18 | |
19 | static struct mtk_wed_wo_memory_region mem_region[] = { |
20 | [MTK_WED_WO_REGION_EMI] = { |
21 | .name = "wo-emi" , |
22 | }, |
23 | [MTK_WED_WO_REGION_ILM] = { |
24 | .name = "wo-ilm" , |
25 | }, |
26 | [MTK_WED_WO_REGION_DATA] = { |
27 | .name = "wo-data" , |
28 | .shared = true, |
29 | }, |
30 | [MTK_WED_WO_REGION_BOOT] = { |
31 | .name = "wo-boot" , |
32 | }, |
33 | }; |
34 | |
35 | static u32 wo_r32(u32 reg) |
36 | { |
37 | return readl(addr: mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); |
38 | } |
39 | |
40 | static void wo_w32(u32 reg, u32 val) |
41 | { |
42 | writel(val, addr: mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); |
43 | } |
44 | |
45 | static struct sk_buff * |
46 | mtk_wed_mcu_msg_alloc(const void *data, int data_len) |
47 | { |
48 | int length = sizeof(struct mtk_wed_mcu_hdr) + data_len; |
49 | struct sk_buff *skb; |
50 | |
51 | skb = alloc_skb(size: length, GFP_KERNEL); |
52 | if (!skb) |
53 | return NULL; |
54 | |
55 | memset(skb->head, 0, length); |
56 | skb_reserve(skb, len: sizeof(struct mtk_wed_mcu_hdr)); |
57 | if (data && data_len) |
58 | skb_put_data(skb, data, len: data_len); |
59 | |
60 | return skb; |
61 | } |
62 | |
63 | static struct sk_buff * |
64 | mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires) |
65 | { |
66 | if (!time_is_after_jiffies(expires)) |
67 | return NULL; |
68 | |
69 | wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q), |
70 | expires - jiffies); |
71 | return skb_dequeue(list: &wo->mcu.res_q); |
72 | } |
73 | |
74 | void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb) |
75 | { |
76 | skb_queue_tail(list: &wo->mcu.res_q, newsk: skb); |
77 | wake_up(&wo->mcu.wait); |
78 | } |
79 | |
80 | static void |
81 | mtk_wed_update_rx_stats(struct mtk_wed_device *wed, struct sk_buff *skb) |
82 | { |
83 | u32 count = get_unaligned_le32(p: skb->data); |
84 | struct mtk_wed_wo_rx_stats *stats; |
85 | int i; |
86 | |
87 | if (!wed->wlan.update_wo_rx_stats) |
88 | return; |
89 | |
90 | if (count * sizeof(*stats) > skb->len - sizeof(u32)) |
91 | return; |
92 | |
93 | stats = (struct mtk_wed_wo_rx_stats *)(skb->data + sizeof(u32)); |
94 | for (i = 0 ; i < count ; i++) |
95 | wed->wlan.update_wo_rx_stats(wed, &stats[i]); |
96 | } |
97 | |
98 | void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo, |
99 | struct sk_buff *skb) |
100 | { |
101 | struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data; |
102 | |
103 | skb_pull(skb, len: sizeof(*hdr)); |
104 | |
105 | switch (hdr->cmd) { |
106 | case MTK_WED_WO_EVT_LOG_DUMP: |
107 | dev_notice(wo->hw->dev, "%s\n" , skb->data); |
108 | break; |
109 | case MTK_WED_WO_EVT_PROFILING: { |
110 | struct mtk_wed_wo_log_info *info = (void *)skb->data; |
111 | u32 count = skb->len / sizeof(*info); |
112 | int i; |
113 | |
114 | for (i = 0 ; i < count ; i++) |
115 | dev_notice(wo->hw->dev, |
116 | "SN:%u latency: total=%u, rro:%u, mod:%u\n" , |
117 | le32_to_cpu(info[i].sn), |
118 | le32_to_cpu(info[i].total), |
119 | le32_to_cpu(info[i].rro), |
120 | le32_to_cpu(info[i].mod)); |
121 | break; |
122 | } |
123 | case MTK_WED_WO_EVT_RXCNT_INFO: |
124 | mtk_wed_update_rx_stats(wed: wo->hw->wed_dev, skb); |
125 | break; |
126 | default: |
127 | break; |
128 | } |
129 | |
130 | dev_kfree_skb(skb); |
131 | } |
132 | |
133 | static int |
134 | mtk_wed_mcu_skb_send_msg(struct mtk_wed_wo *wo, struct sk_buff *skb, |
135 | int id, int cmd, u16 *wait_seq, bool wait_resp) |
136 | { |
137 | struct mtk_wed_mcu_hdr *hdr; |
138 | |
139 | /* TODO: make it dynamic based on cmd */ |
140 | wo->mcu.timeout = 20 * HZ; |
141 | |
142 | hdr = (struct mtk_wed_mcu_hdr *)skb_push(skb, len: sizeof(*hdr)); |
143 | hdr->cmd = cmd; |
144 | hdr->length = cpu_to_le16(skb->len); |
145 | |
146 | if (wait_resp && wait_seq) { |
147 | u16 seq = ++wo->mcu.seq; |
148 | |
149 | if (!seq) |
150 | seq = ++wo->mcu.seq; |
151 | *wait_seq = seq; |
152 | |
153 | hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_NEED_RSP); |
154 | hdr->seq = cpu_to_le16(seq); |
155 | } |
156 | if (id == MTK_WED_MODULE_ID_WO) |
157 | hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO); |
158 | |
159 | return mtk_wed_wo_queue_tx_skb(dev: wo, q: &wo->q_tx, skb); |
160 | } |
161 | |
162 | static int |
163 | mtk_wed_mcu_parse_response(struct mtk_wed_wo *wo, struct sk_buff *skb, |
164 | int cmd, int seq) |
165 | { |
166 | struct mtk_wed_mcu_hdr *hdr; |
167 | |
168 | if (!skb) { |
169 | dev_err(wo->hw->dev, "Message %08x (seq %d) timeout\n" , |
170 | cmd, seq); |
171 | return -ETIMEDOUT; |
172 | } |
173 | |
174 | hdr = (struct mtk_wed_mcu_hdr *)skb->data; |
175 | if (le16_to_cpu(hdr->seq) != seq) |
176 | return -EAGAIN; |
177 | |
178 | skb_pull(skb, len: sizeof(*hdr)); |
179 | switch (cmd) { |
180 | case MTK_WED_WO_CMD_RXCNT_INFO: |
181 | mtk_wed_update_rx_stats(wed: wo->hw->wed_dev, skb); |
182 | break; |
183 | default: |
184 | break; |
185 | } |
186 | |
187 | return 0; |
188 | } |
189 | |
190 | int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd, |
191 | const void *data, int len, bool wait_resp) |
192 | { |
193 | unsigned long expires; |
194 | struct sk_buff *skb; |
195 | u16 seq; |
196 | int ret; |
197 | |
198 | skb = mtk_wed_mcu_msg_alloc(data, data_len: len); |
199 | if (!skb) |
200 | return -ENOMEM; |
201 | |
202 | mutex_lock(&wo->mcu.mutex); |
203 | |
204 | ret = mtk_wed_mcu_skb_send_msg(wo, skb, id, cmd, wait_seq: &seq, wait_resp); |
205 | if (ret || !wait_resp) |
206 | goto unlock; |
207 | |
208 | expires = jiffies + wo->mcu.timeout; |
209 | do { |
210 | skb = mtk_wed_mcu_get_response(wo, expires); |
211 | ret = mtk_wed_mcu_parse_response(wo, skb, cmd, seq); |
212 | dev_kfree_skb(skb); |
213 | } while (ret == -EAGAIN); |
214 | |
215 | unlock: |
216 | mutex_unlock(lock: &wo->mcu.mutex); |
217 | |
218 | return ret; |
219 | } |
220 | |
221 | int mtk_wed_mcu_msg_update(struct mtk_wed_device *dev, int id, void *data, |
222 | int len) |
223 | { |
224 | struct mtk_wed_wo *wo = dev->hw->wed_wo; |
225 | |
226 | if (!mtk_wed_get_rx_capa(dev)) |
227 | return 0; |
228 | |
229 | if (WARN_ON(!wo)) |
230 | return -ENODEV; |
231 | |
232 | return mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, cmd: id, data, len, |
233 | wait_resp: true); |
234 | } |
235 | |
236 | static int |
237 | mtk_wed_get_memory_region(struct mtk_wed_hw *hw, int index, |
238 | struct mtk_wed_wo_memory_region *region) |
239 | { |
240 | struct reserved_mem *rmem; |
241 | struct device_node *np; |
242 | |
243 | np = of_parse_phandle(np: hw->node, phandle_name: "memory-region" , index); |
244 | if (!np) |
245 | return -ENODEV; |
246 | |
247 | rmem = of_reserved_mem_lookup(np); |
248 | of_node_put(node: np); |
249 | |
250 | if (!rmem) |
251 | return -ENODEV; |
252 | |
253 | region->phy_addr = rmem->base; |
254 | region->size = rmem->size; |
255 | region->addr = devm_ioremap(dev: hw->dev, offset: region->phy_addr, size: region->size); |
256 | |
257 | return !region->addr ? -EINVAL : 0; |
258 | } |
259 | |
260 | static int |
261 | mtk_wed_mcu_run_firmware(struct mtk_wed_wo *wo, const struct firmware *fw) |
262 | { |
263 | const u8 *first_region_ptr, *region_ptr, *trailer_ptr, *ptr = fw->data; |
264 | const struct mtk_wed_fw_trailer *trailer; |
265 | const struct mtk_wed_fw_region *fw_region; |
266 | |
267 | trailer_ptr = fw->data + fw->size - sizeof(*trailer); |
268 | trailer = (const struct mtk_wed_fw_trailer *)trailer_ptr; |
269 | region_ptr = trailer_ptr - trailer->num_region * sizeof(*fw_region); |
270 | first_region_ptr = region_ptr; |
271 | |
272 | while (region_ptr < trailer_ptr) { |
273 | u32 length; |
274 | int i; |
275 | |
276 | fw_region = (const struct mtk_wed_fw_region *)region_ptr; |
277 | length = le32_to_cpu(fw_region->len); |
278 | if (first_region_ptr < ptr + length) |
279 | goto next; |
280 | |
281 | for (i = 0; i < ARRAY_SIZE(mem_region); i++) { |
282 | struct mtk_wed_wo_memory_region *region; |
283 | |
284 | region = &mem_region[i]; |
285 | if (region->phy_addr != le32_to_cpu(fw_region->addr)) |
286 | continue; |
287 | |
288 | if (region->size < length) |
289 | continue; |
290 | |
291 | if (region->shared && region->consumed) |
292 | break; |
293 | |
294 | if (!region->shared || !region->consumed) { |
295 | memcpy_toio(region->addr, ptr, length); |
296 | region->consumed = true; |
297 | break; |
298 | } |
299 | } |
300 | |
301 | if (i == ARRAY_SIZE(mem_region)) |
302 | return -EINVAL; |
303 | next: |
304 | region_ptr += sizeof(*fw_region); |
305 | ptr += length; |
306 | } |
307 | |
308 | return 0; |
309 | } |
310 | |
311 | static int |
312 | mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo) |
313 | { |
314 | const struct mtk_wed_fw_trailer *trailer; |
315 | const struct firmware *fw; |
316 | const char *fw_name; |
317 | u32 val, boot_cr; |
318 | int ret, i; |
319 | |
320 | /* load firmware region metadata */ |
321 | for (i = 0; i < ARRAY_SIZE(mem_region); i++) { |
322 | int index = of_property_match_string(np: wo->hw->node, |
323 | propname: "memory-region-names" , |
324 | string: mem_region[i].name); |
325 | if (index < 0) |
326 | continue; |
327 | |
328 | ret = mtk_wed_get_memory_region(hw: wo->hw, index, region: &mem_region[i]); |
329 | if (ret) |
330 | return ret; |
331 | } |
332 | |
333 | /* set dummy cr */ |
334 | wed_w32(dev: wo->hw->wed_dev, MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL, |
335 | val: wo->hw->index + 1); |
336 | |
337 | /* load firmware */ |
338 | switch (wo->hw->version) { |
339 | case 2: |
340 | if (of_device_is_compatible(device: wo->hw->node, |
341 | "mediatek,mt7981-wed" )) |
342 | fw_name = MT7981_FIRMWARE_WO; |
343 | else |
344 | fw_name = wo->hw->index ? MT7986_FIRMWARE_WO1 |
345 | : MT7986_FIRMWARE_WO0; |
346 | break; |
347 | case 3: |
348 | fw_name = wo->hw->index ? MT7988_FIRMWARE_WO1 |
349 | : MT7988_FIRMWARE_WO0; |
350 | break; |
351 | default: |
352 | return -EINVAL; |
353 | } |
354 | |
355 | ret = request_firmware(fw: &fw, name: fw_name, device: wo->hw->dev); |
356 | if (ret) |
357 | return ret; |
358 | |
359 | trailer = (void *)(fw->data + fw->size - |
360 | sizeof(struct mtk_wed_fw_trailer)); |
361 | dev_info(wo->hw->dev, |
362 | "MTK WED WO Firmware Version: %.10s, Build Time: %.15s\n" , |
363 | trailer->fw_ver, trailer->build_date); |
364 | dev_info(wo->hw->dev, "MTK WED WO Chip ID %02x Region %d\n" , |
365 | trailer->chip_id, trailer->num_region); |
366 | |
367 | ret = mtk_wed_mcu_run_firmware(wo, fw); |
368 | if (ret) |
369 | goto out; |
370 | |
371 | /* set the start address */ |
372 | if (!mtk_wed_is_v3_or_greater(hw: wo->hw) && wo->hw->index) |
373 | boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR; |
374 | else |
375 | boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR; |
376 | wo_w32(reg: boot_cr, val: mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16); |
377 | /* wo firmware reset */ |
378 | wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, val: 0xc00); |
379 | |
380 | val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) | |
381 | MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK; |
382 | wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val); |
383 | out: |
384 | release_firmware(fw); |
385 | |
386 | return ret; |
387 | } |
388 | |
389 | static u32 |
390 | mtk_wed_mcu_read_fw_dl(struct mtk_wed_wo *wo) |
391 | { |
392 | return wed_r32(dev: wo->hw->wed_dev, |
393 | MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL); |
394 | } |
395 | |
396 | int mtk_wed_mcu_init(struct mtk_wed_wo *wo) |
397 | { |
398 | u32 val; |
399 | int ret; |
400 | |
401 | skb_queue_head_init(list: &wo->mcu.res_q); |
402 | init_waitqueue_head(&wo->mcu.wait); |
403 | mutex_init(&wo->mcu.mutex); |
404 | |
405 | ret = mtk_wed_mcu_load_firmware(wo); |
406 | if (ret) |
407 | return ret; |
408 | |
409 | return readx_poll_timeout(mtk_wed_mcu_read_fw_dl, wo, val, !val, |
410 | 100, MTK_FW_DL_TIMEOUT); |
411 | } |
412 | |
413 | MODULE_FIRMWARE(MT7981_FIRMWARE_WO); |
414 | MODULE_FIRMWARE(MT7986_FIRMWARE_WO0); |
415 | MODULE_FIRMWARE(MT7986_FIRMWARE_WO1); |
416 | MODULE_FIRMWARE(MT7988_FIRMWARE_WO0); |
417 | MODULE_FIRMWARE(MT7988_FIRMWARE_WO1); |
418 | |