1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 */
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/ctype.h>
16#include <linux/errno.h>
17#include <linux/unistd.h>
18#include <linux/hwmon.h>
19#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/ethtool_netlink.h>
31#include <linux/phy.h>
32#include <linux/marvell_phy.h>
33#include <linux/bitfield.h>
34#include <linux/of.h>
35#include <linux/sfp.h>
36
37#include <linux/io.h>
38#include <asm/irq.h>
39#include <linux/uaccess.h>
40
41#define MII_MARVELL_PHY_PAGE 22
42#define MII_MARVELL_COPPER_PAGE 0x00
43#define MII_MARVELL_FIBER_PAGE 0x01
44#define MII_MARVELL_MSCR_PAGE 0x02
45#define MII_MARVELL_LED_PAGE 0x03
46#define MII_MARVELL_VCT5_PAGE 0x05
47#define MII_MARVELL_MISC_TEST_PAGE 0x06
48#define MII_MARVELL_VCT7_PAGE 0x07
49#define MII_MARVELL_WOL_PAGE 0x11
50#define MII_MARVELL_MODE_PAGE 0x12
51
52#define MII_M1011_IEVENT 0x13
53#define MII_M1011_IEVENT_CLEAR 0x0000
54
55#define MII_M1011_IMASK 0x12
56#define MII_M1011_IMASK_INIT 0x6400
57#define MII_M1011_IMASK_CLEAR 0x0000
58
59#define MII_M1011_PHY_SCR 0x10
60#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
61#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
62#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
63#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
64#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
65#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66
67#define MII_M1011_PHY_SSR 0x11
68#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
69
70#define MII_M1111_PHY_LED_CONTROL 0x18
71#define MII_M1111_PHY_LED_DIRECT 0x4100
72#define MII_M1111_PHY_LED_COMBINE 0x411c
73#define MII_M1111_PHY_EXT_CR 0x14
74#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
75#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
76#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
77#define MII_M1111_RGMII_RX_DELAY BIT(7)
78#define MII_M1111_RGMII_TX_DELAY BIT(1)
79#define MII_M1111_PHY_EXT_SR 0x1b
80
81#define MII_M1111_HWCFG_MODE_MASK 0xf
82#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
83#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
84#define MII_M1111_HWCFG_MODE_RTBI 0x7
85#define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
86#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
87#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
88#define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
89#define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
90#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
91#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
92
93#define MII_88E1121_PHY_MSCR_REG 21
94#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
95#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
96#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
97
98#define MII_88E1121_MISC_TEST 0x1a
99#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
100#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
101#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
102#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
103#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
104#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
105
106#define MII_88E1510_TEMP_SENSOR 0x1b
107#define MII_88E1510_TEMP_SENSOR_MASK 0xff
108
109#define MII_88E1540_COPPER_CTRL3 0x1a
110#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
111#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
112#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
113#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
114#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
115#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
116
117#define MII_88E6390_MISC_TEST 0x1b
118#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
119#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
120#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
121#define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
122#define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
123#define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
124#define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
125#define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
126#define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
127#define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
128#define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
129#define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
130#define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
131#define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
132
133#define MII_88E6390_TEMP_SENSOR 0x1c
134#define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
135#define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
136#define MII_88E6390_TEMP_SENSOR_MASK 0xff
137#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
138
139#define MII_88E1318S_PHY_MSCR1_REG 16
140#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
141
142/* Copper Specific Interrupt Enable Register */
143#define MII_88E1318S_PHY_CSIER 0x12
144/* WOL Event Interrupt Enable */
145#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
146
147#define MII_88E1318S_PHY_LED_FUNC 0x10
148#define MII_88E1318S_PHY_LED_FUNC_OFF (0x8)
149#define MII_88E1318S_PHY_LED_FUNC_ON (0x9)
150#define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa)
151#define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb)
152#define MII_88E1318S_PHY_LED_TCR 0x12
153#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
154#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
155#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
156
157/* Magic Packet MAC address registers */
158#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
159#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
160#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
161
162#define MII_88E1318S_PHY_WOL_CTRL 0x10
163#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
164#define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
165#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
166
167#define MII_PHY_LED_CTRL 16
168#define MII_88E1121_PHY_LED_DEF 0x0030
169#define MII_88E1510_PHY_LED_DEF 0x1177
170#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
171
172#define MII_M1011_PHY_STATUS 0x11
173#define MII_M1011_PHY_STATUS_1000 0x8000
174#define MII_M1011_PHY_STATUS_100 0x4000
175#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
176#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
177#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
178#define MII_M1011_PHY_STATUS_LINK 0x0400
179#define MII_M1011_PHY_STATUS_MDIX BIT(6)
180
181#define MII_88E3016_PHY_SPEC_CTRL 0x10
182#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
183#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
184
185#define MII_88E1510_GEN_CTRL_REG_1 0x14
186#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
187#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
188#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
189/* RGMII to 1000BASE-X */
190#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
191/* RGMII to 100BASE-FX */
192#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
193/* RGMII to SGMII */
194#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
195#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
196
197#define MII_88E1510_MSCR_2 0x15
198
199#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
200#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
201#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
202#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
203#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
204#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
205#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
206
207#define MII_VCT5_CTRL 0x17
208#define MII_VCT5_CTRL_ENABLE BIT(15)
209#define MII_VCT5_CTRL_COMPLETE BIT(14)
210#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
211#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
212#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
213#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
214#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
215#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
216#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
217#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
218#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
219#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
220#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
221#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
222#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
223#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
224#define MII_VCT5_CTRL_SAMPLES_SHIFT 8
225#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
226#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
227#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
228#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
229#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
230
231#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
232#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
233#define MII_VCT5_TX_PULSE_CTRL 0x1c
234#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
235#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
236#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
237#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
238#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
239#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
240#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
241#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
242#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
243#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
244#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
245#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
246#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
247
248/* For TDR measurements less than 11 meters, a short pulse should be
249 * used.
250 */
251#define TDR_SHORT_CABLE_LENGTH 11
252
253#define MII_VCT7_PAIR_0_DISTANCE 0x10
254#define MII_VCT7_PAIR_1_DISTANCE 0x11
255#define MII_VCT7_PAIR_2_DISTANCE 0x12
256#define MII_VCT7_PAIR_3_DISTANCE 0x13
257
258#define MII_VCT7_RESULTS 0x14
259#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
260#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
261#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
262#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
263#define MII_VCT7_RESULTS_PAIR3_SHIFT 12
264#define MII_VCT7_RESULTS_PAIR2_SHIFT 8
265#define MII_VCT7_RESULTS_PAIR1_SHIFT 4
266#define MII_VCT7_RESULTS_PAIR0_SHIFT 0
267#define MII_VCT7_RESULTS_INVALID 0
268#define MII_VCT7_RESULTS_OK 1
269#define MII_VCT7_RESULTS_OPEN 2
270#define MII_VCT7_RESULTS_SAME_SHORT 3
271#define MII_VCT7_RESULTS_CROSS_SHORT 4
272#define MII_VCT7_RESULTS_BUSY 9
273
274#define MII_VCT7_CTRL 0x15
275#define MII_VCT7_CTRL_RUN_NOW BIT(15)
276#define MII_VCT7_CTRL_RUN_ANEG BIT(14)
277#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
278#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
279#define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
280#define MII_VCT7_CTRL_METERS BIT(10)
281#define MII_VCT7_CTRL_CENTIMETERS 0
282
283#define MII_VCT_TXPINS 0x1A
284#define MII_VCT_RXPINS 0x1B
285#define MII_VCT_SR 0x1C
286#define MII_VCT_TXPINS_ENVCT BIT(15)
287#define MII_VCT_TXRXPINS_VCTTST GENMASK(14, 13)
288#define MII_VCT_TXRXPINS_VCTTST_SHIFT 13
289#define MII_VCT_TXRXPINS_VCTTST_OK 0
290#define MII_VCT_TXRXPINS_VCTTST_SHORT 1
291#define MII_VCT_TXRXPINS_VCTTST_OPEN 2
292#define MII_VCT_TXRXPINS_VCTTST_FAIL 3
293#define MII_VCT_TXRXPINS_AMPRFLN GENMASK(12, 8)
294#define MII_VCT_TXRXPINS_AMPRFLN_SHIFT 8
295#define MII_VCT_TXRXPINS_DISTRFLN GENMASK(7, 0)
296#define MII_VCT_TXRXPINS_DISTRFLN_MAX 0xff
297
298#define M88E3082_PAIR_A BIT(0)
299#define M88E3082_PAIR_B BIT(1)
300
301#define LPA_PAUSE_FIBER 0x180
302#define LPA_PAUSE_ASYM_FIBER 0x100
303
304#define NB_FIBER_STATS 1
305#define NB_STAT_MAX 3
306
307MODULE_DESCRIPTION("Marvell PHY driver");
308MODULE_AUTHOR("Andy Fleming");
309MODULE_LICENSE("GPL");
310
311struct marvell_hw_stat {
312 const char *string;
313 u8 page;
314 u8 reg;
315 u8 bits;
316};
317
318static const struct marvell_hw_stat marvell_hw_stats[] = {
319 { "phy_receive_errors_copper", 0, 21, 16},
320 { "phy_idle_errors", 0, 10, 8 },
321 { "phy_receive_errors_fiber", 1, 21, 16},
322};
323
324static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX);
325
326/* "simple" stat list + corresponding marvell_get_*_simple functions are used
327 * on PHYs without a page register
328 */
329struct marvell_hw_stat_simple {
330 const char *string;
331 u8 reg;
332 u8 bits;
333};
334
335static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = {
336 { "phy_receive_errors", 21, 16},
337};
338
339static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX);
340
341enum {
342 M88E3082_VCT_OFF,
343 M88E3082_VCT_PHASE1,
344 M88E3082_VCT_PHASE2,
345};
346
347struct marvell_priv {
348 u64 stats[NB_STAT_MAX];
349 char *hwmon_name;
350 struct device *hwmon_dev;
351 bool cable_test_tdr;
352 u32 first;
353 u32 last;
354 u32 step;
355 s8 pair;
356 u8 vct_phase;
357};
358
359static int marvell_read_page(struct phy_device *phydev)
360{
361 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
362}
363
364static int marvell_write_page(struct phy_device *phydev, int page)
365{
366 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, val: page);
367}
368
369static int marvell_set_page(struct phy_device *phydev, int page)
370{
371 return phy_write(phydev, MII_MARVELL_PHY_PAGE, val: page);
372}
373
374static int marvell_ack_interrupt(struct phy_device *phydev)
375{
376 int err;
377
378 /* Clear the interrupts by reading the reg */
379 err = phy_read(phydev, MII_M1011_IEVENT);
380
381 if (err < 0)
382 return err;
383
384 return 0;
385}
386
387static int marvell_config_intr(struct phy_device *phydev)
388{
389 int err;
390
391 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
392 err = marvell_ack_interrupt(phydev);
393 if (err)
394 return err;
395
396 err = phy_write(phydev, MII_M1011_IMASK,
397 MII_M1011_IMASK_INIT);
398 } else {
399 err = phy_write(phydev, MII_M1011_IMASK,
400 MII_M1011_IMASK_CLEAR);
401 if (err)
402 return err;
403
404 err = marvell_ack_interrupt(phydev);
405 }
406
407 return err;
408}
409
410static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
411{
412 int irq_status;
413
414 irq_status = phy_read(phydev, MII_M1011_IEVENT);
415 if (irq_status < 0) {
416 phy_error(phydev);
417 return IRQ_NONE;
418 }
419
420 if (!(irq_status & MII_M1011_IMASK_INIT))
421 return IRQ_NONE;
422
423 phy_trigger_machine(phydev);
424
425 return IRQ_HANDLED;
426}
427
428static int marvell_set_polarity(struct phy_device *phydev, int polarity)
429{
430 u16 val;
431
432 switch (polarity) {
433 case ETH_TP_MDI:
434 val = MII_M1011_PHY_SCR_MDI;
435 break;
436 case ETH_TP_MDI_X:
437 val = MII_M1011_PHY_SCR_MDI_X;
438 break;
439 case ETH_TP_MDI_AUTO:
440 case ETH_TP_MDI_INVALID:
441 default:
442 val = MII_M1011_PHY_SCR_AUTO_CROSS;
443 break;
444 }
445
446 return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
447 MII_M1011_PHY_SCR_AUTO_CROSS, set: val);
448}
449
450static int marvell_config_aneg(struct phy_device *phydev)
451{
452 int changed = 0;
453 int err;
454
455 err = marvell_set_polarity(phydev, polarity: phydev->mdix_ctrl);
456 if (err < 0)
457 return err;
458
459 changed = err;
460
461 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
462 MII_M1111_PHY_LED_DIRECT);
463 if (err < 0)
464 return err;
465
466 err = genphy_config_aneg(phydev);
467 if (err < 0)
468 return err;
469
470 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
471 /* A write to speed/duplex bits (that is performed by
472 * genphy_config_aneg() call above) must be followed by
473 * a software reset. Otherwise, the write has no effect.
474 */
475 err = genphy_soft_reset(phydev);
476 if (err < 0)
477 return err;
478 }
479
480 return 0;
481}
482
483static int m88e1101_config_aneg(struct phy_device *phydev)
484{
485 int err;
486
487 /* This Marvell PHY has an errata which requires
488 * that certain registers get written in order
489 * to restart autonegotiation
490 */
491 err = genphy_soft_reset(phydev);
492 if (err < 0)
493 return err;
494
495 err = phy_write(phydev, regnum: 0x1d, val: 0x1f);
496 if (err < 0)
497 return err;
498
499 err = phy_write(phydev, regnum: 0x1e, val: 0x200c);
500 if (err < 0)
501 return err;
502
503 err = phy_write(phydev, regnum: 0x1d, val: 0x5);
504 if (err < 0)
505 return err;
506
507 err = phy_write(phydev, regnum: 0x1e, val: 0);
508 if (err < 0)
509 return err;
510
511 err = phy_write(phydev, regnum: 0x1e, val: 0x100);
512 if (err < 0)
513 return err;
514
515 return marvell_config_aneg(phydev);
516}
517
518#if IS_ENABLED(CONFIG_OF_MDIO)
519/* Set and/or override some configuration registers based on the
520 * marvell,reg-init property stored in the of_node for the phydev.
521 *
522 * marvell,reg-init = <reg-page reg mask value>,...;
523 *
524 * There may be one or more sets of <reg-page reg mask value>:
525 *
526 * reg-page: which register bank to use.
527 * reg: the register.
528 * mask: if non-zero, ANDed with existing register value.
529 * value: ORed with the masked value and written to the regiser.
530 *
531 */
532static int marvell_of_reg_init(struct phy_device *phydev)
533{
534 const __be32 *paddr;
535 int len, i, saved_page, current_page, ret = 0;
536
537 if (!phydev->mdio.dev.of_node)
538 return 0;
539
540 paddr = of_get_property(node: phydev->mdio.dev.of_node,
541 name: "marvell,reg-init", lenp: &len);
542 if (!paddr || len < (4 * sizeof(*paddr)))
543 return 0;
544
545 saved_page = phy_save_page(phydev);
546 if (saved_page < 0)
547 goto err;
548 current_page = saved_page;
549
550 len /= sizeof(*paddr);
551 for (i = 0; i < len - 3; i += 4) {
552 u16 page = be32_to_cpup(p: paddr + i);
553 u16 reg = be32_to_cpup(p: paddr + i + 1);
554 u16 mask = be32_to_cpup(p: paddr + i + 2);
555 u16 val_bits = be32_to_cpup(p: paddr + i + 3);
556 int val;
557
558 if (page != current_page) {
559 current_page = page;
560 ret = marvell_write_page(phydev, page);
561 if (ret < 0)
562 goto err;
563 }
564
565 val = 0;
566 if (mask) {
567 val = __phy_read(phydev, regnum: reg);
568 if (val < 0) {
569 ret = val;
570 goto err;
571 }
572 val &= mask;
573 }
574 val |= val_bits;
575
576 ret = __phy_write(phydev, regnum: reg, val);
577 if (ret < 0)
578 goto err;
579 }
580err:
581 return phy_restore_page(phydev, oldpage: saved_page, ret);
582}
583#else
584static int marvell_of_reg_init(struct phy_device *phydev)
585{
586 return 0;
587}
588#endif /* CONFIG_OF_MDIO */
589
590static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
591{
592 int mscr;
593
594 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
595 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
596 MII_88E1121_PHY_MSCR_TX_DELAY;
597 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
598 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
599 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
600 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
601 else
602 mscr = 0;
603
604 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
605 MII_88E1121_PHY_MSCR_REG,
606 MII_88E1121_PHY_MSCR_DELAY_MASK, set: mscr);
607}
608
609static int m88e1121_config_aneg(struct phy_device *phydev)
610{
611 int changed = 0;
612 int err = 0;
613
614 if (phy_interface_is_rgmii(phydev)) {
615 err = m88e1121_config_aneg_rgmii_delays(phydev);
616 if (err < 0)
617 return err;
618 }
619
620 changed = err;
621
622 err = marvell_set_polarity(phydev, polarity: phydev->mdix_ctrl);
623 if (err < 0)
624 return err;
625
626 changed |= err;
627
628 err = genphy_config_aneg(phydev);
629 if (err < 0)
630 return err;
631
632 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
633 /* A software reset is used to ensure a "commit" of the
634 * changes is done.
635 */
636 err = genphy_soft_reset(phydev);
637 if (err < 0)
638 return err;
639 }
640
641 return 0;
642}
643
644static int m88e1318_config_aneg(struct phy_device *phydev)
645{
646 int err;
647
648 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
649 MII_88E1318S_PHY_MSCR1_REG,
650 mask: 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
651 if (err < 0)
652 return err;
653
654 return m88e1121_config_aneg(phydev);
655}
656
657/**
658 * linkmode_adv_to_fiber_adv_t
659 * @advertise: the linkmode advertisement settings
660 *
661 * A small helper function that translates linkmode advertisement
662 * settings to phy autonegotiation advertisements for the MII_ADV
663 * register for fiber link.
664 */
665static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
666{
667 u32 result = 0;
668
669 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
670 result |= ADVERTISE_1000XHALF;
671 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
672 result |= ADVERTISE_1000XFULL;
673
674 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
675 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
676 result |= ADVERTISE_1000XPSE_ASYM;
677 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
678 result |= ADVERTISE_1000XPAUSE;
679
680 return result;
681}
682
683/**
684 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
685 * @phydev: target phy_device struct
686 *
687 * Description: If auto-negotiation is enabled, we configure the
688 * advertising, and then restart auto-negotiation. If it is not
689 * enabled, then we write the BMCR. Adapted for fiber link in
690 * some Marvell's devices.
691 */
692static int marvell_config_aneg_fiber(struct phy_device *phydev)
693{
694 int changed = 0;
695 int err;
696 u16 adv;
697
698 if (phydev->autoneg != AUTONEG_ENABLE)
699 return genphy_setup_forced(phydev);
700
701 /* Only allow advertising what this PHY supports */
702 linkmode_and(dst: phydev->advertising, a: phydev->advertising,
703 b: phydev->supported);
704
705 adv = linkmode_adv_to_fiber_adv_t(advertise: phydev->advertising);
706
707 /* Setup fiber advertisement */
708 err = phy_modify_changed(phydev, MII_ADVERTISE,
709 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
710 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
711 set: adv);
712 if (err < 0)
713 return err;
714 if (err > 0)
715 changed = 1;
716
717 return genphy_check_and_restart_aneg(phydev, restart: changed);
718}
719
720static unsigned int m88e1111_inband_caps(struct phy_device *phydev,
721 phy_interface_t interface)
722{
723 /* In 1000base-X and SGMII modes, the inband mode can be changed
724 * through the Fibre page BMCR ANENABLE bit.
725 */
726 if (interface == PHY_INTERFACE_MODE_1000BASEX ||
727 interface == PHY_INTERFACE_MODE_SGMII)
728 return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
729 LINK_INBAND_BYPASS;
730
731 return 0;
732}
733
734static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)
735{
736 u16 extsr, bmcr;
737 int err;
738
739 if (phydev->interface != PHY_INTERFACE_MODE_1000BASEX &&
740 phydev->interface != PHY_INTERFACE_MODE_SGMII)
741 return -EINVAL;
742
743 if (modes == LINK_INBAND_BYPASS)
744 extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;
745 else
746 extsr = 0;
747
748 if (modes == LINK_INBAND_DISABLE)
749 bmcr = 0;
750 else
751 bmcr = BMCR_ANENABLE;
752
753 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
754 MII_M1111_HWCFG_SERIAL_AN_BYPASS, set: extsr);
755 if (err < 0)
756 return extsr;
757
758 return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,
759 BMCR_ANENABLE, set: bmcr);
760}
761
762static int m88e1111_config_aneg(struct phy_device *phydev)
763{
764 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
765 int err;
766
767 if (extsr < 0)
768 return extsr;
769
770 /* If not using SGMII or copper 1000BaseX modes, use normal process.
771 * Steps below are only required for these modes.
772 */
773 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
774 (extsr & MII_M1111_HWCFG_MODE_MASK) !=
775 MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
776 return marvell_config_aneg(phydev);
777
778 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
779 if (err < 0)
780 goto error;
781
782 /* Configure the copper link first */
783 err = marvell_config_aneg(phydev);
784 if (err < 0)
785 goto error;
786
787 /* Then the fiber link */
788 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
789 if (err < 0)
790 goto error;
791
792 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
793 /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
794 * Just ensure that SGMII-side autonegotiation is enabled.
795 * If we switched from some other mode to SGMII it may not be.
796 */
797 err = genphy_check_and_restart_aneg(phydev, restart: false);
798 else
799 err = marvell_config_aneg_fiber(phydev);
800 if (err < 0)
801 goto error;
802
803 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
804
805error:
806 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
807 return err;
808}
809
810static int m88e1510_config_aneg(struct phy_device *phydev)
811{
812 int err;
813
814 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
815 if (err < 0)
816 goto error;
817
818 /* Configure the copper link first */
819 err = m88e1318_config_aneg(phydev);
820 if (err < 0)
821 goto error;
822
823 /* Do not touch the fiber page if we're in copper->sgmii mode */
824 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
825 return 0;
826
827 /* Then the fiber link */
828 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
829 if (err < 0)
830 goto error;
831
832 err = marvell_config_aneg_fiber(phydev);
833 if (err < 0)
834 goto error;
835
836 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
837
838error:
839 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
840 return err;
841}
842
843static void marvell_config_led(struct phy_device *phydev)
844{
845 u16 def_config;
846 int err;
847
848 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
849 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
850 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
851 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
852 def_config = MII_88E1121_PHY_LED_DEF;
853 break;
854 /* Default PHY LED config:
855 * LED[0] .. 1000Mbps Link
856 * LED[1] .. 100Mbps Link
857 * LED[2] .. Blink, Activity
858 */
859 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
860 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
861 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
862 else
863 def_config = MII_88E1510_PHY_LED_DEF;
864 break;
865 default:
866 return;
867 }
868
869 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
870 val: def_config);
871 if (err < 0)
872 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
873}
874
875static int marvell_config_init(struct phy_device *phydev)
876{
877 /* Set default LED */
878 marvell_config_led(phydev);
879
880 /* Set registers from marvell,reg-init DT property */
881 return marvell_of_reg_init(phydev);
882}
883
884static int m88e3016_config_init(struct phy_device *phydev)
885{
886 int ret;
887
888 /* Enable Scrambler and Auto-Crossover */
889 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
890 MII_88E3016_DISABLE_SCRAMBLER,
891 MII_88E3016_AUTO_MDIX_CROSSOVER);
892 if (ret < 0)
893 return ret;
894
895 return marvell_config_init(phydev);
896}
897
898static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
899 u16 mode,
900 int fibre_copper_auto)
901{
902 if (fibre_copper_auto)
903 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
904
905 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
906 MII_M1111_HWCFG_MODE_MASK |
907 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
908 MII_M1111_HWCFG_FIBER_COPPER_RES,
909 set: mode);
910}
911
912static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
913{
914 int delay;
915
916 switch (phydev->interface) {
917 case PHY_INTERFACE_MODE_RGMII_ID:
918 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
919 break;
920 case PHY_INTERFACE_MODE_RGMII_RXID:
921 delay = MII_M1111_RGMII_RX_DELAY;
922 break;
923 case PHY_INTERFACE_MODE_RGMII_TXID:
924 delay = MII_M1111_RGMII_TX_DELAY;
925 break;
926 default:
927 delay = 0;
928 break;
929 }
930
931 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
932 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
933 set: delay);
934}
935
936static int m88e1111_config_init_rgmii(struct phy_device *phydev)
937{
938 int temp;
939 int err;
940
941 err = m88e1111_config_init_rgmii_delays(phydev);
942 if (err < 0)
943 return err;
944
945 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
946 if (temp < 0)
947 return temp;
948
949 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
950
951 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
952 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
953 else
954 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
955
956 return phy_write(phydev, MII_M1111_PHY_EXT_SR, val: temp);
957}
958
959static int m88e1111_config_init_sgmii(struct phy_device *phydev)
960{
961 int err;
962
963 err = m88e1111_config_init_hwcfg_mode(
964 phydev,
965 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
966 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
967 if (err < 0)
968 return err;
969
970 /* make sure copper is selected */
971 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
972}
973
974static int m88e1111_config_init_rtbi(struct phy_device *phydev)
975{
976 int err;
977
978 err = m88e1111_config_init_rgmii_delays(phydev);
979 if (err < 0)
980 return err;
981
982 err = m88e1111_config_init_hwcfg_mode(
983 phydev,
984 MII_M1111_HWCFG_MODE_RTBI,
985 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
986 if (err < 0)
987 return err;
988
989 /* soft reset */
990 err = genphy_soft_reset(phydev);
991 if (err < 0)
992 return err;
993
994 return m88e1111_config_init_hwcfg_mode(
995 phydev,
996 MII_M1111_HWCFG_MODE_RTBI,
997 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
998}
999
1000static int m88e1111_config_init_1000basex(struct phy_device *phydev)
1001{
1002 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
1003 int err, mode;
1004
1005 if (extsr < 0)
1006 return extsr;
1007
1008 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled.
1009 * FIXME: this does not actually enable 1000BaseX auto-negotiation if
1010 * it was previously disabled in the Fiber BMCR!
1011 */
1012 mode = extsr & MII_M1111_HWCFG_MODE_MASK;
1013 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
1014 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
1015 MII_M1111_HWCFG_MODE_MASK |
1016 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
1017 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
1018 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
1019 if (err < 0)
1020 return err;
1021 }
1022 return 0;
1023}
1024
1025static int m88e1111_config_init(struct phy_device *phydev)
1026{
1027 int err;
1028
1029 if (phy_interface_is_rgmii(phydev)) {
1030 err = m88e1111_config_init_rgmii(phydev);
1031 if (err < 0)
1032 return err;
1033 }
1034
1035 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1036 err = m88e1111_config_init_sgmii(phydev);
1037 if (err < 0)
1038 return err;
1039 }
1040
1041 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
1042 err = m88e1111_config_init_rtbi(phydev);
1043 if (err < 0)
1044 return err;
1045 }
1046
1047 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
1048 err = m88e1111_config_init_1000basex(phydev);
1049 if (err < 0)
1050 return err;
1051 }
1052
1053 err = marvell_of_reg_init(phydev);
1054 if (err < 0)
1055 return err;
1056
1057 err = genphy_soft_reset(phydev);
1058 if (err < 0)
1059 return err;
1060
1061 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1062 /* If the HWCFG_MODE was changed from another mode (such as
1063 * 1000BaseX) to SGMII, the state of the support bits may have
1064 * also changed now that the PHY has been reset.
1065 * Update the PHY abilities accordingly.
1066 */
1067 err = genphy_read_abilities(phydev);
1068 linkmode_or(dst: phydev->advertising, a: phydev->advertising,
1069 b: phydev->supported);
1070 }
1071 return err;
1072}
1073
1074static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
1075{
1076 int val, cnt, enable;
1077
1078 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
1079 if (val < 0)
1080 return val;
1081
1082 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
1083 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
1084
1085 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1086
1087 return 0;
1088}
1089
1090static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
1091{
1092 int val, err;
1093
1094 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1095 return -E2BIG;
1096
1097 if (!cnt) {
1098 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1099 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1100 } else {
1101 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1102 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1103
1104 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1105 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1106 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1107 set: val);
1108 }
1109
1110 if (err < 0)
1111 return err;
1112
1113 return genphy_soft_reset(phydev);
1114}
1115
1116static int m88e1111_get_tunable(struct phy_device *phydev,
1117 struct ethtool_tunable *tuna, void *data)
1118{
1119 switch (tuna->id) {
1120 case ETHTOOL_PHY_DOWNSHIFT:
1121 return m88e1111_get_downshift(phydev, data);
1122 default:
1123 return -EOPNOTSUPP;
1124 }
1125}
1126
1127static int m88e1111_set_tunable(struct phy_device *phydev,
1128 struct ethtool_tunable *tuna, const void *data)
1129{
1130 switch (tuna->id) {
1131 case ETHTOOL_PHY_DOWNSHIFT:
1132 return m88e1111_set_downshift(phydev, cnt: *(const u8 *)data);
1133 default:
1134 return -EOPNOTSUPP;
1135 }
1136}
1137
1138static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1139{
1140 int val, cnt, enable;
1141
1142 val = phy_read(phydev, MII_M1011_PHY_SCR);
1143 if (val < 0)
1144 return val;
1145
1146 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1147 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1148
1149 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1150
1151 return 0;
1152}
1153
1154static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1155{
1156 int val, err;
1157
1158 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1159 return -E2BIG;
1160
1161 if (!cnt) {
1162 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1163 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1164 } else {
1165 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1166 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1167
1168 err = phy_modify(phydev, MII_M1011_PHY_SCR,
1169 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1170 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1171 set: val);
1172 }
1173
1174 if (err < 0)
1175 return err;
1176
1177 return genphy_soft_reset(phydev);
1178}
1179
1180static int m88e1011_get_tunable(struct phy_device *phydev,
1181 struct ethtool_tunable *tuna, void *data)
1182{
1183 switch (tuna->id) {
1184 case ETHTOOL_PHY_DOWNSHIFT:
1185 return m88e1011_get_downshift(phydev, data);
1186 default:
1187 return -EOPNOTSUPP;
1188 }
1189}
1190
1191static int m88e1011_set_tunable(struct phy_device *phydev,
1192 struct ethtool_tunable *tuna, const void *data)
1193{
1194 switch (tuna->id) {
1195 case ETHTOOL_PHY_DOWNSHIFT:
1196 return m88e1011_set_downshift(phydev, cnt: *(const u8 *)data);
1197 default:
1198 return -EOPNOTSUPP;
1199 }
1200}
1201
1202static int m88e1112_config_init(struct phy_device *phydev)
1203{
1204 int err;
1205
1206 err = m88e1011_set_downshift(phydev, cnt: 3);
1207 if (err < 0)
1208 return err;
1209
1210 return m88e1111_config_init(phydev);
1211}
1212
1213static int m88e1111gbe_config_init(struct phy_device *phydev)
1214{
1215 int err;
1216
1217 err = m88e1111_set_downshift(phydev, cnt: 3);
1218 if (err < 0)
1219 return err;
1220
1221 return m88e1111_config_init(phydev);
1222}
1223
1224static int marvell_1011gbe_config_init(struct phy_device *phydev)
1225{
1226 int err;
1227
1228 err = m88e1011_set_downshift(phydev, cnt: 3);
1229 if (err < 0)
1230 return err;
1231
1232 return marvell_config_init(phydev);
1233}
1234static int m88e1116r_config_init(struct phy_device *phydev)
1235{
1236 int err;
1237
1238 err = genphy_soft_reset(phydev);
1239 if (err < 0)
1240 return err;
1241
1242 msleep(msecs: 500);
1243
1244 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1245 if (err < 0)
1246 return err;
1247
1248 err = marvell_set_polarity(phydev, polarity: phydev->mdix_ctrl);
1249 if (err < 0)
1250 return err;
1251
1252 err = m88e1011_set_downshift(phydev, cnt: 8);
1253 if (err < 0)
1254 return err;
1255
1256 if (phy_interface_is_rgmii(phydev)) {
1257 err = m88e1121_config_aneg_rgmii_delays(phydev);
1258 if (err < 0)
1259 return err;
1260 }
1261
1262 err = genphy_soft_reset(phydev);
1263 if (err < 0)
1264 return err;
1265
1266 return marvell_config_init(phydev);
1267}
1268
1269static int m88e1318_config_init(struct phy_device *phydev)
1270{
1271 if (phy_interrupt_is_valid(phydev)) {
1272 int err = phy_modify_paged(
1273 phydev, MII_MARVELL_LED_PAGE,
1274 MII_88E1318S_PHY_LED_TCR,
1275 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1276 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1277 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1278 if (err < 0)
1279 return err;
1280 }
1281
1282 return marvell_config_init(phydev);
1283}
1284
1285static int m88e1510_config_init(struct phy_device *phydev)
1286{
1287 static const struct {
1288 u16 reg17, reg16;
1289 } errata_vals[] = {
1290 { 0x214b, 0x2144 },
1291 { 0x0c28, 0x2146 },
1292 { 0xb233, 0x214d },
1293 { 0xcc0c, 0x2159 },
1294 };
1295 int err;
1296 int i;
1297
1298 /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
1299 * 88E1514 Rev A0, Errata Section 5.1:
1300 * If EEE is intended to be used, the following register writes
1301 * must be done once after every hardware reset.
1302 */
1303 err = marvell_set_page(phydev, page: 0x00FF);
1304 if (err < 0)
1305 return err;
1306
1307 for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
1308 err = phy_write(phydev, regnum: 17, val: errata_vals[i].reg17);
1309 if (err)
1310 return err;
1311 err = phy_write(phydev, regnum: 16, val: errata_vals[i].reg16);
1312 if (err)
1313 return err;
1314 }
1315
1316 err = marvell_set_page(phydev, page: 0x00FB);
1317 if (err < 0)
1318 return err;
1319 err = phy_write(phydev, regnum: 07, val: 0xC00D);
1320 if (err < 0)
1321 return err;
1322 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1323 if (err < 0)
1324 return err;
1325
1326 /* SGMII-to-Copper mode initialization */
1327 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1328 /* Select page 18 */
1329 err = marvell_set_page(phydev, page: 18);
1330 if (err < 0)
1331 return err;
1332
1333 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1334 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1335 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1336 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1337 if (err < 0)
1338 return err;
1339
1340 /* PHY reset is necessary after changing MODE[2:0] */
1341 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1342 MII_88E1510_GEN_CTRL_REG_1_RESET);
1343 if (err < 0)
1344 return err;
1345
1346 /* Reset page selection */
1347 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1348 if (err < 0)
1349 return err;
1350 }
1351 err = m88e1011_set_downshift(phydev, cnt: 3);
1352 if (err < 0)
1353 return err;
1354
1355 return m88e1318_config_init(phydev);
1356}
1357
1358static int m88e1118_config_aneg(struct phy_device *phydev)
1359{
1360 int err;
1361
1362 err = marvell_set_polarity(phydev, polarity: phydev->mdix_ctrl);
1363 if (err < 0)
1364 return err;
1365
1366 err = genphy_config_aneg(phydev);
1367 if (err < 0)
1368 return err;
1369
1370 return genphy_soft_reset(phydev);
1371}
1372
1373static int m88e1118_config_init(struct phy_device *phydev)
1374{
1375 u16 leds;
1376 int err;
1377
1378 /* Enable 1000 Mbit */
1379 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1380 MII_88E1121_PHY_MSCR_REG, val: 0x1070);
1381 if (err < 0)
1382 return err;
1383
1384 if (phy_interface_is_rgmii(phydev)) {
1385 err = m88e1121_config_aneg_rgmii_delays(phydev);
1386 if (err < 0)
1387 return err;
1388 }
1389
1390 /* Adjust LED Control */
1391 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1392 leds = 0x1100;
1393 else
1394 leds = 0x021e;
1395
1396 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, regnum: 0x10, val: leds);
1397 if (err < 0)
1398 return err;
1399
1400 err = marvell_of_reg_init(phydev);
1401 if (err < 0)
1402 return err;
1403
1404 /* Reset page register */
1405 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1406 if (err < 0)
1407 return err;
1408
1409 return genphy_soft_reset(phydev);
1410}
1411
1412static int m88e1149_config_init(struct phy_device *phydev)
1413{
1414 int err;
1415
1416 /* Change address */
1417 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1418 if (err < 0)
1419 return err;
1420
1421 /* Enable 1000 Mbit */
1422 err = phy_write(phydev, regnum: 0x15, val: 0x1048);
1423 if (err < 0)
1424 return err;
1425
1426 err = marvell_of_reg_init(phydev);
1427 if (err < 0)
1428 return err;
1429
1430 /* Reset address */
1431 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1432 if (err < 0)
1433 return err;
1434
1435 return genphy_soft_reset(phydev);
1436}
1437
1438static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1439{
1440 int err;
1441
1442 err = m88e1111_config_init_rgmii_delays(phydev);
1443 if (err < 0)
1444 return err;
1445
1446 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1447 err = phy_write(phydev, regnum: 0x1d, val: 0x0012);
1448 if (err < 0)
1449 return err;
1450
1451 err = phy_modify(phydev, regnum: 0x1e, mask: 0x0fc0,
1452 set: 2 << 9 | /* 36 ohm */
1453 2 << 6); /* 39 ohm */
1454 if (err < 0)
1455 return err;
1456
1457 err = phy_write(phydev, regnum: 0x1d, val: 0x3);
1458 if (err < 0)
1459 return err;
1460
1461 err = phy_write(phydev, regnum: 0x1e, val: 0x8000);
1462 }
1463 return err;
1464}
1465
1466static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1467{
1468 return m88e1111_config_init_hwcfg_mode(
1469 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1470 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1471}
1472
1473static int m88e1145_config_init(struct phy_device *phydev)
1474{
1475 int err;
1476
1477 /* Take care of errata E0 & E1 */
1478 err = phy_write(phydev, regnum: 0x1d, val: 0x001b);
1479 if (err < 0)
1480 return err;
1481
1482 err = phy_write(phydev, regnum: 0x1e, val: 0x418f);
1483 if (err < 0)
1484 return err;
1485
1486 err = phy_write(phydev, regnum: 0x1d, val: 0x0016);
1487 if (err < 0)
1488 return err;
1489
1490 err = phy_write(phydev, regnum: 0x1e, val: 0xa2da);
1491 if (err < 0)
1492 return err;
1493
1494 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1495 err = m88e1145_config_init_rgmii(phydev);
1496 if (err < 0)
1497 return err;
1498 }
1499
1500 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1501 err = m88e1145_config_init_sgmii(phydev);
1502 if (err < 0)
1503 return err;
1504 }
1505 err = m88e1111_set_downshift(phydev, cnt: 3);
1506 if (err < 0)
1507 return err;
1508
1509 err = marvell_of_reg_init(phydev);
1510 if (err < 0)
1511 return err;
1512
1513 return 0;
1514}
1515
1516static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1517{
1518 int val;
1519
1520 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1521 if (val < 0)
1522 return val;
1523
1524 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1525 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1526 return 0;
1527 }
1528
1529 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1530
1531 switch (val) {
1532 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1533 *msecs = 0;
1534 break;
1535 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1536 *msecs = 10;
1537 break;
1538 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1539 *msecs = 20;
1540 break;
1541 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1542 *msecs = 40;
1543 break;
1544 default:
1545 return -EINVAL;
1546 }
1547
1548 return 0;
1549}
1550
1551static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1552{
1553 int val, ret;
1554
1555 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1556 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1557 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1558
1559 /* According to the Marvell data sheet EEE must be disabled for
1560 * Fast Link Down detection to work properly
1561 */
1562 if (phydev->eee_cfg.eee_enabled) {
1563 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1564 return -EBUSY;
1565 }
1566
1567 if (*msecs <= 5)
1568 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1569 else if (*msecs <= 15)
1570 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1571 else if (*msecs <= 30)
1572 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1573 else
1574 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1575
1576 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1577
1578 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1579 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, set: val);
1580 if (ret)
1581 return ret;
1582
1583 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1584 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1585}
1586
1587static int m88e1540_get_tunable(struct phy_device *phydev,
1588 struct ethtool_tunable *tuna, void *data)
1589{
1590 switch (tuna->id) {
1591 case ETHTOOL_PHY_FAST_LINK_DOWN:
1592 return m88e1540_get_fld(phydev, msecs: data);
1593 case ETHTOOL_PHY_DOWNSHIFT:
1594 return m88e1011_get_downshift(phydev, data);
1595 default:
1596 return -EOPNOTSUPP;
1597 }
1598}
1599
1600static int m88e1540_set_tunable(struct phy_device *phydev,
1601 struct ethtool_tunable *tuna, const void *data)
1602{
1603 switch (tuna->id) {
1604 case ETHTOOL_PHY_FAST_LINK_DOWN:
1605 return m88e1540_set_fld(phydev, msecs: data);
1606 case ETHTOOL_PHY_DOWNSHIFT:
1607 return m88e1011_set_downshift(phydev, cnt: *(const u8 *)data);
1608 default:
1609 return -EOPNOTSUPP;
1610 }
1611}
1612
1613/* The VOD can be out of specification on link up. Poke an
1614 * undocumented register, in an undocumented page, with a magic value
1615 * to fix this.
1616 */
1617static int m88e6390_errata(struct phy_device *phydev)
1618{
1619 int err;
1620
1621 err = phy_write(phydev, MII_BMCR,
1622 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1623 if (err)
1624 return err;
1625
1626 usleep_range(min: 300, max: 400);
1627
1628 err = phy_write_paged(phydev, page: 0xf8, regnum: 0x08, val: 0x36);
1629 if (err)
1630 return err;
1631
1632 return genphy_soft_reset(phydev);
1633}
1634
1635static int m88e6390_config_aneg(struct phy_device *phydev)
1636{
1637 int err;
1638
1639 err = m88e6390_errata(phydev);
1640 if (err)
1641 return err;
1642
1643 return m88e1510_config_aneg(phydev);
1644}
1645
1646/**
1647 * fiber_lpa_mod_linkmode_lpa_t
1648 * @advertising: the linkmode advertisement settings
1649 * @lpa: value of the MII_LPA register for fiber link
1650 *
1651 * A small helper function that translates MII_LPA bits to linkmode LP
1652 * advertisement settings. Other bits in advertising are left
1653 * unchanged.
1654 */
1655static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1656{
1657 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1658 advertising, lpa & LPA_1000XHALF);
1659
1660 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1661 advertising, lpa & LPA_1000XFULL);
1662}
1663
1664static int marvell_read_status_page_an(struct phy_device *phydev,
1665 int fiber, int status)
1666{
1667 int lpa;
1668 int err;
1669
1670 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1671 phydev->link = 0;
1672 return 0;
1673 }
1674
1675 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1676 phydev->duplex = DUPLEX_FULL;
1677 else
1678 phydev->duplex = DUPLEX_HALF;
1679
1680 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1681 case MII_M1011_PHY_STATUS_1000:
1682 phydev->speed = SPEED_1000;
1683 break;
1684
1685 case MII_M1011_PHY_STATUS_100:
1686 phydev->speed = SPEED_100;
1687 break;
1688
1689 default:
1690 phydev->speed = SPEED_10;
1691 break;
1692 }
1693
1694 if (!fiber) {
1695 err = genphy_read_lpa(phydev);
1696 if (err < 0)
1697 return err;
1698
1699 phy_resolve_aneg_pause(phydev);
1700 } else {
1701 lpa = phy_read(phydev, MII_LPA);
1702 if (lpa < 0)
1703 return lpa;
1704
1705 /* The fiber link is only 1000M capable */
1706 fiber_lpa_mod_linkmode_lpa_t(advertising: phydev->lp_advertising, lpa);
1707
1708 if (phydev->duplex == DUPLEX_FULL) {
1709 if (!(lpa & LPA_PAUSE_FIBER)) {
1710 phydev->pause = 0;
1711 phydev->asym_pause = 0;
1712 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1713 phydev->pause = 1;
1714 phydev->asym_pause = 1;
1715 } else {
1716 phydev->pause = 1;
1717 phydev->asym_pause = 0;
1718 }
1719 }
1720 }
1721
1722 return 0;
1723}
1724
1725/* marvell_read_status_page
1726 *
1727 * Description:
1728 * Check the link, then figure out the current state
1729 * by comparing what we advertise with what the link partner
1730 * advertises. Start by checking the gigabit possibilities,
1731 * then move on to 10/100.
1732 */
1733static int marvell_read_status_page(struct phy_device *phydev, int page)
1734{
1735 int status;
1736 int fiber;
1737 int err;
1738
1739 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1740 if (status < 0)
1741 return status;
1742
1743 /* Use the generic register for copper link status,
1744 * and the PHY status register for fiber link status.
1745 */
1746 if (page == MII_MARVELL_FIBER_PAGE) {
1747 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1748 } else {
1749 err = genphy_update_link(phydev);
1750 if (err)
1751 return err;
1752 }
1753
1754 if (page == MII_MARVELL_FIBER_PAGE)
1755 fiber = 1;
1756 else
1757 fiber = 0;
1758
1759 linkmode_zero(dst: phydev->lp_advertising);
1760 phydev->pause = 0;
1761 phydev->asym_pause = 0;
1762 phydev->speed = SPEED_UNKNOWN;
1763 phydev->duplex = DUPLEX_UNKNOWN;
1764 phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1765
1766 if (fiber) {
1767 phydev->mdix = ETH_TP_MDI_INVALID;
1768 } else {
1769 /* The MDI-X state is set regardless of Autoneg being enabled
1770 * and reflects forced MDI-X state as well as auto resolution
1771 */
1772 if (status & MII_M1011_PHY_STATUS_RESOLVED)
1773 phydev->mdix = status & MII_M1011_PHY_STATUS_MDIX ?
1774 ETH_TP_MDI_X : ETH_TP_MDI;
1775 else
1776 phydev->mdix = ETH_TP_MDI_INVALID;
1777 }
1778
1779 if (phydev->autoneg == AUTONEG_ENABLE)
1780 err = marvell_read_status_page_an(phydev, fiber, status);
1781 else
1782 err = genphy_read_status_fixed(phydev);
1783
1784 return err;
1785}
1786
1787/* marvell_read_status
1788 *
1789 * Some Marvell's phys have two modes: fiber and copper.
1790 * Both need status checked.
1791 * Description:
1792 * First, check the fiber link and status.
1793 * If the fiber link is down, check the copper link and status which
1794 * will be the default value if both link are down.
1795 */
1796static int marvell_read_status(struct phy_device *phydev)
1797{
1798 int err;
1799
1800 /* Check the fiber mode first */
1801 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1802 phydev->supported) &&
1803 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1804 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1805 if (err < 0)
1806 goto error;
1807
1808 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1809 if (err < 0)
1810 goto error;
1811
1812 /* If the fiber link is up, it is the selected and
1813 * used link. In this case, we need to stay in the
1814 * fiber page. Please to be careful about that, avoid
1815 * to restore Copper page in other functions which
1816 * could break the behaviour for some fiber phy like
1817 * 88E1512.
1818 */
1819 if (phydev->link)
1820 return 0;
1821
1822 /* If fiber link is down, check and save copper mode state */
1823 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1824 if (err < 0)
1825 goto error;
1826 }
1827
1828 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1829
1830error:
1831 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1832 return err;
1833}
1834
1835/* marvell_suspend
1836 *
1837 * Some Marvell's phys have two modes: fiber and copper.
1838 * Both need to be suspended
1839 */
1840static int marvell_suspend(struct phy_device *phydev)
1841{
1842 int err;
1843
1844 /* Suspend the fiber mode first */
1845 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1846 phydev->supported)) {
1847 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1848 if (err < 0)
1849 goto error;
1850
1851 /* With the page set, use the generic suspend */
1852 err = genphy_suspend(phydev);
1853 if (err < 0)
1854 goto error;
1855
1856 /* Then, the copper link */
1857 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1858 if (err < 0)
1859 goto error;
1860 }
1861
1862 /* With the page set, use the generic suspend */
1863 return genphy_suspend(phydev);
1864
1865error:
1866 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1867 return err;
1868}
1869
1870/* marvell_resume
1871 *
1872 * Some Marvell's phys have two modes: fiber and copper.
1873 * Both need to be resumed
1874 */
1875static int marvell_resume(struct phy_device *phydev)
1876{
1877 int err;
1878
1879 /* Resume the fiber mode first */
1880 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1881 phydev->supported)) {
1882 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1883 if (err < 0)
1884 goto error;
1885
1886 /* With the page set, use the generic resume */
1887 err = genphy_resume(phydev);
1888 if (err < 0)
1889 goto error;
1890
1891 /* Then, the copper link */
1892 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1893 if (err < 0)
1894 goto error;
1895 }
1896
1897 /* With the page set, use the generic resume */
1898 return genphy_resume(phydev);
1899
1900error:
1901 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1902 return err;
1903}
1904
1905static int marvell_aneg_done(struct phy_device *phydev)
1906{
1907 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1908
1909 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1910}
1911
1912static void m88e1318_get_wol(struct phy_device *phydev,
1913 struct ethtool_wolinfo *wol)
1914{
1915 int ret;
1916
1917 wol->supported = WAKE_MAGIC | WAKE_PHY;
1918 wol->wolopts = 0;
1919
1920 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1921 MII_88E1318S_PHY_WOL_CTRL);
1922 if (ret < 0)
1923 return;
1924
1925 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1926 wol->wolopts |= WAKE_MAGIC;
1927
1928 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1929 wol->wolopts |= WAKE_PHY;
1930}
1931
1932static int m88e1318_set_wol(struct phy_device *phydev,
1933 struct ethtool_wolinfo *wol)
1934{
1935 int err = 0, oldpage;
1936
1937 oldpage = phy_save_page(phydev);
1938 if (oldpage < 0)
1939 goto error;
1940
1941 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1942 /* Explicitly switch to page 0x00, just to be sure */
1943 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1944 if (err < 0)
1945 goto error;
1946
1947 /* If WOL event happened once, the LED[2] interrupt pin
1948 * will not be cleared unless we reading the interrupt status
1949 * register. If interrupts are in use, the normal interrupt
1950 * handling will clear the WOL event. Clear the WOL event
1951 * before enabling it if !phy_interrupt_is_valid()
1952 */
1953 if (!phy_interrupt_is_valid(phydev))
1954 __phy_read(phydev, MII_M1011_IEVENT);
1955
1956 /* Enable the WOL interrupt */
1957 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1958 MII_88E1318S_PHY_CSIER_WOL_EIE);
1959 if (err < 0)
1960 goto error;
1961
1962 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1963 if (err < 0)
1964 goto error;
1965
1966 /* Setup LED[2] as interrupt pin (active low) */
1967 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1968 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1969 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1970 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1971 if (err < 0)
1972 goto error;
1973 }
1974
1975 if (wol->wolopts & WAKE_MAGIC) {
1976 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1977 if (err < 0)
1978 goto error;
1979
1980 /* Store the device address for the magic packet */
1981 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1982 val: ((phydev->attached_dev->dev_addr[5] << 8) |
1983 phydev->attached_dev->dev_addr[4]));
1984 if (err < 0)
1985 goto error;
1986 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1987 val: ((phydev->attached_dev->dev_addr[3] << 8) |
1988 phydev->attached_dev->dev_addr[2]));
1989 if (err < 0)
1990 goto error;
1991 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1992 val: ((phydev->attached_dev->dev_addr[1] << 8) |
1993 phydev->attached_dev->dev_addr[0]));
1994 if (err < 0)
1995 goto error;
1996
1997 /* Clear WOL status and enable magic packet matching */
1998 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1999 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
2000 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
2001 if (err < 0)
2002 goto error;
2003 } else {
2004 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2005 if (err < 0)
2006 goto error;
2007
2008 /* Clear WOL status and disable magic packet matching */
2009 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
2010 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
2011 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
2012 if (err < 0)
2013 goto error;
2014 }
2015
2016 if (wol->wolopts & WAKE_PHY) {
2017 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2018 if (err < 0)
2019 goto error;
2020
2021 /* Clear WOL status and enable link up event */
2022 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, mask: 0,
2023 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
2024 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
2025 if (err < 0)
2026 goto error;
2027 } else {
2028 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2029 if (err < 0)
2030 goto error;
2031
2032 /* Clear WOL status and disable link up event */
2033 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
2034 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
2035 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
2036 if (err < 0)
2037 goto error;
2038 }
2039
2040error:
2041 return phy_restore_page(phydev, oldpage, ret: err);
2042}
2043
2044static int marvell_get_sset_count(struct phy_device *phydev)
2045{
2046 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2047 phydev->supported))
2048 return ARRAY_SIZE(marvell_hw_stats);
2049 else
2050 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
2051}
2052
2053static int marvell_get_sset_count_simple(struct phy_device *phydev)
2054{
2055 return ARRAY_SIZE(marvell_hw_stats_simple);
2056}
2057
2058static void marvell_get_strings(struct phy_device *phydev, u8 *data)
2059{
2060 int count = marvell_get_sset_count(phydev);
2061 int i;
2062
2063 for (i = 0; i < count; i++)
2064 ethtool_puts(data: &data, str: marvell_hw_stats[i].string);
2065}
2066
2067static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data)
2068{
2069 int count = marvell_get_sset_count_simple(phydev);
2070 int i;
2071
2072 for (i = 0; i < count; i++)
2073 ethtool_puts(data: &data, str: marvell_hw_stats_simple[i].string);
2074}
2075
2076static u64 marvell_get_stat(struct phy_device *phydev, int i)
2077{
2078 struct marvell_hw_stat stat = marvell_hw_stats[i];
2079 struct marvell_priv *priv = phydev->priv;
2080 int val;
2081 u64 ret;
2082
2083 val = phy_read_paged(phydev, page: stat.page, regnum: stat.reg);
2084 if (val < 0) {
2085 ret = U64_MAX;
2086 } else {
2087 val = val & ((1 << stat.bits) - 1);
2088 priv->stats[i] += val;
2089 ret = priv->stats[i];
2090 }
2091
2092 return ret;
2093}
2094
2095static u64 marvell_get_stat_simple(struct phy_device *phydev, int i)
2096{
2097 struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i];
2098 struct marvell_priv *priv = phydev->priv;
2099 int val;
2100 u64 ret;
2101
2102 val = phy_read(phydev, regnum: stat.reg);
2103 if (val < 0) {
2104 ret = U64_MAX;
2105 } else {
2106 val = val & ((1 << stat.bits) - 1);
2107 priv->stats[i] += val;
2108 ret = priv->stats[i];
2109 }
2110
2111 return ret;
2112}
2113
2114static void marvell_get_stats(struct phy_device *phydev,
2115 struct ethtool_stats *stats, u64 *data)
2116{
2117 int count = marvell_get_sset_count(phydev);
2118 int i;
2119
2120 for (i = 0; i < count; i++)
2121 data[i] = marvell_get_stat(phydev, i);
2122}
2123
2124static void marvell_get_stats_simple(struct phy_device *phydev,
2125 struct ethtool_stats *stats, u64 *data)
2126{
2127 int count = marvell_get_sset_count_simple(phydev);
2128 int i;
2129
2130 for (i = 0; i < count; i++)
2131 data[i] = marvell_get_stat_simple(phydev, i);
2132}
2133
2134static int m88e1510_loopback(struct phy_device *phydev, bool enable, int speed)
2135{
2136 u16 bmcr_ctl, mscr2_ctl = 0;
2137 int err;
2138
2139 if (!enable)
2140 return genphy_loopback(phydev, enable, speed: 0);
2141
2142 if (speed == SPEED_10 || speed == SPEED_100 || speed == SPEED_1000)
2143 phydev->speed = speed;
2144 else if (speed)
2145 return -EINVAL;
2146
2147 bmcr_ctl = mii_bmcr_encode_fixed(speed: phydev->speed, duplex: phydev->duplex);
2148
2149 err = phy_write(phydev, MII_BMCR, val: bmcr_ctl);
2150 if (err < 0)
2151 return err;
2152
2153 if (phydev->speed == SPEED_1000)
2154 mscr2_ctl = BMCR_SPEED1000;
2155 else if (phydev->speed == SPEED_100)
2156 mscr2_ctl = BMCR_SPEED100;
2157
2158 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2159 MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2160 BMCR_SPEED100, set: mscr2_ctl);
2161 if (err < 0)
2162 return err;
2163
2164 /* Need soft reset to have speed configuration takes effect */
2165 err = genphy_soft_reset(phydev);
2166 if (err < 0)
2167 return err;
2168
2169 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2170 BMCR_LOOPBACK);
2171
2172 if (!err) {
2173 /*
2174 * It takes some time for PHY device to switch into loopback
2175 * mode.
2176 */
2177 msleep(msecs: 1000);
2178 }
2179 return err;
2180}
2181
2182static int marvell_vct5_wait_complete(struct phy_device *phydev)
2183{
2184 int i;
2185 int val;
2186
2187 for (i = 0; i < 32; i++) {
2188 val = __phy_read(phydev, MII_VCT5_CTRL);
2189 if (val < 0)
2190 return val;
2191
2192 if (val & MII_VCT5_CTRL_COMPLETE)
2193 return 0;
2194 }
2195
2196 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2197 return -ETIMEDOUT;
2198}
2199
2200static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2201{
2202 int amplitude;
2203 int val;
2204 int reg;
2205
2206 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2207 val = __phy_read(phydev, regnum: reg);
2208
2209 if (val < 0)
2210 return 0;
2211
2212 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2213 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2214
2215 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2216 amplitude = -amplitude;
2217
2218 return 1000 * amplitude / 128;
2219}
2220
2221static u32 marvell_vct5_distance2cm(int distance)
2222{
2223 return distance * 805 / 10;
2224}
2225
2226static u32 marvell_vct5_cm2distance(int cm)
2227{
2228 return cm * 10 / 805;
2229}
2230
2231static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2232 int distance, int pair)
2233{
2234 u16 reg;
2235 int err;
2236 int mV;
2237 int i;
2238
2239 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2240 val: distance);
2241 if (err)
2242 return err;
2243
2244 reg = MII_VCT5_CTRL_ENABLE |
2245 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2246 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2247 MII_VCT5_CTRL_SAMPLE_POINT |
2248 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2249 err = __phy_write(phydev, MII_VCT5_CTRL, val: reg);
2250 if (err)
2251 return err;
2252
2253 err = marvell_vct5_wait_complete(phydev);
2254 if (err)
2255 return err;
2256
2257 for (i = 0; i < 4; i++) {
2258 if (pair != PHY_PAIR_ALL && i != pair)
2259 continue;
2260
2261 mV = marvell_vct5_amplitude(phydev, pair: i);
2262 ethnl_cable_test_amplitude(phydev, pair: i, mV);
2263 }
2264
2265 return 0;
2266}
2267
2268static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2269{
2270 struct marvell_priv *priv = phydev->priv;
2271 int distance;
2272 u16 width;
2273 int page;
2274 int err;
2275 u16 reg;
2276
2277 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2278 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2279 else
2280 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2281
2282 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2283 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2284 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2285
2286 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2287 MII_VCT5_TX_PULSE_CTRL, val: reg);
2288 if (err)
2289 return err;
2290
2291 /* Reading the TDR data is very MDIO heavy. We need to optimize
2292 * access to keep the time to a minimum. So lock the bus once,
2293 * and don't release it until complete. We can then avoid having
2294 * to change the page for every access, greatly speeding things
2295 * up.
2296 */
2297 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2298 if (page < 0)
2299 goto restore_page;
2300
2301 for (distance = priv->first;
2302 distance <= priv->last;
2303 distance += priv->step) {
2304 err = marvell_vct5_amplitude_distance(phydev, distance,
2305 pair: priv->pair);
2306 if (err)
2307 goto restore_page;
2308
2309 if (distance > TDR_SHORT_CABLE_LENGTH &&
2310 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2311 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2312 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2313 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2314 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2315 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, val: reg);
2316 if (err)
2317 goto restore_page;
2318 }
2319 }
2320
2321restore_page:
2322 return phy_restore_page(phydev, oldpage: page, ret: err);
2323}
2324
2325static int marvell_cable_test_start_common(struct phy_device *phydev)
2326{
2327 int bmcr, bmsr, ret;
2328
2329 /* If auto-negotiation is enabled, but not complete, the cable
2330 * test never completes. So disable auto-neg.
2331 */
2332 bmcr = phy_read(phydev, MII_BMCR);
2333 if (bmcr < 0)
2334 return bmcr;
2335
2336 bmsr = phy_read(phydev, MII_BMSR);
2337
2338 if (bmsr < 0)
2339 return bmsr;
2340
2341 if (bmcr & BMCR_ANENABLE) {
2342 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2343 if (ret < 0)
2344 return ret;
2345 ret = genphy_soft_reset(phydev);
2346 if (ret < 0)
2347 return ret;
2348 }
2349
2350 /* If the link is up, allow it some time to go down */
2351 if (bmsr & BMSR_LSTATUS)
2352 msleep(msecs: 1500);
2353
2354 return 0;
2355}
2356
2357static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2358{
2359 struct marvell_priv *priv = phydev->priv;
2360 int ret;
2361
2362 ret = marvell_cable_test_start_common(phydev);
2363 if (ret)
2364 return ret;
2365
2366 priv->cable_test_tdr = false;
2367
2368 /* Reset the VCT5 API control to defaults, otherwise
2369 * VCT7 does not work correctly.
2370 */
2371 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2372 MII_VCT5_CTRL,
2373 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2374 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2375 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2376 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2377 if (ret)
2378 return ret;
2379
2380 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2381 MII_VCT5_SAMPLE_POINT_DISTANCE, val: 0);
2382 if (ret)
2383 return ret;
2384
2385 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2386 MII_VCT7_CTRL,
2387 MII_VCT7_CTRL_RUN_NOW |
2388 MII_VCT7_CTRL_CENTIMETERS);
2389}
2390
2391static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2392 const struct phy_tdr_config *cfg)
2393{
2394 struct marvell_priv *priv = phydev->priv;
2395 int ret;
2396
2397 priv->cable_test_tdr = true;
2398 priv->first = marvell_vct5_cm2distance(cm: cfg->first);
2399 priv->last = marvell_vct5_cm2distance(cm: cfg->last);
2400 priv->step = marvell_vct5_cm2distance(cm: cfg->step);
2401 priv->pair = cfg->pair;
2402
2403 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2404 return -EINVAL;
2405
2406 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2407 return -EINVAL;
2408
2409 /* Disable VCT7 */
2410 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2411 MII_VCT7_CTRL, val: 0);
2412 if (ret)
2413 return ret;
2414
2415 ret = marvell_cable_test_start_common(phydev);
2416 if (ret)
2417 return ret;
2418
2419 ret = ethnl_cable_test_pulse(phydev, mV: 1000);
2420 if (ret)
2421 return ret;
2422
2423 return ethnl_cable_test_step(phydev,
2424 first: marvell_vct5_distance2cm(distance: priv->first),
2425 last: marvell_vct5_distance2cm(distance: priv->last),
2426 step: marvell_vct5_distance2cm(distance: priv->step));
2427}
2428
2429static int marvell_vct7_distance_to_length(int distance, bool meter)
2430{
2431 if (meter)
2432 distance *= 100;
2433
2434 return distance;
2435}
2436
2437static bool marvell_vct7_distance_valid(int result)
2438{
2439 switch (result) {
2440 case MII_VCT7_RESULTS_OPEN:
2441 case MII_VCT7_RESULTS_SAME_SHORT:
2442 case MII_VCT7_RESULTS_CROSS_SHORT:
2443 return true;
2444 }
2445 return false;
2446}
2447
2448static int marvell_vct7_report_length(struct phy_device *phydev,
2449 int pair, bool meter)
2450{
2451 int length;
2452 int ret;
2453
2454 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2455 MII_VCT7_PAIR_0_DISTANCE + pair);
2456 if (ret < 0)
2457 return ret;
2458
2459 length = marvell_vct7_distance_to_length(distance: ret, meter);
2460
2461 ethnl_cable_test_fault_length(phydev, pair, cm: length);
2462
2463 return 0;
2464}
2465
2466static int marvell_vct7_cable_test_report_trans(int result)
2467{
2468 switch (result) {
2469 case MII_VCT7_RESULTS_OK:
2470 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2471 case MII_VCT7_RESULTS_OPEN:
2472 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2473 case MII_VCT7_RESULTS_SAME_SHORT:
2474 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2475 case MII_VCT7_RESULTS_CROSS_SHORT:
2476 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2477 default:
2478 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2479 }
2480}
2481
2482static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2483{
2484 int pair0, pair1, pair2, pair3;
2485 bool meter;
2486 int ret;
2487
2488 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2489 MII_VCT7_RESULTS);
2490 if (ret < 0)
2491 return ret;
2492
2493 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2494 MII_VCT7_RESULTS_PAIR3_SHIFT;
2495 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2496 MII_VCT7_RESULTS_PAIR2_SHIFT;
2497 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2498 MII_VCT7_RESULTS_PAIR1_SHIFT;
2499 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2500 MII_VCT7_RESULTS_PAIR0_SHIFT;
2501
2502 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_A,
2503 result: marvell_vct7_cable_test_report_trans(result: pair0));
2504 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_B,
2505 result: marvell_vct7_cable_test_report_trans(result: pair1));
2506 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_C,
2507 result: marvell_vct7_cable_test_report_trans(result: pair2));
2508 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_D,
2509 result: marvell_vct7_cable_test_report_trans(result: pair3));
2510
2511 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2512 if (ret < 0)
2513 return ret;
2514
2515 meter = ret & MII_VCT7_CTRL_METERS;
2516
2517 if (marvell_vct7_distance_valid(result: pair0))
2518 marvell_vct7_report_length(phydev, pair: 0, meter);
2519 if (marvell_vct7_distance_valid(result: pair1))
2520 marvell_vct7_report_length(phydev, pair: 1, meter);
2521 if (marvell_vct7_distance_valid(result: pair2))
2522 marvell_vct7_report_length(phydev, pair: 2, meter);
2523 if (marvell_vct7_distance_valid(result: pair3))
2524 marvell_vct7_report_length(phydev, pair: 3, meter);
2525
2526 return 0;
2527}
2528
2529static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2530 bool *finished)
2531{
2532 struct marvell_priv *priv = phydev->priv;
2533 int ret;
2534
2535 if (priv->cable_test_tdr) {
2536 ret = marvell_vct5_amplitude_graph(phydev);
2537 *finished = true;
2538 return ret;
2539 }
2540
2541 *finished = false;
2542
2543 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2544 MII_VCT7_CTRL);
2545
2546 if (ret < 0)
2547 return ret;
2548
2549 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2550 *finished = true;
2551
2552 return marvell_vct7_cable_test_report(phydev);
2553 }
2554
2555 return 0;
2556}
2557
2558static int m88e3082_vct_cable_test_start(struct phy_device *phydev)
2559{
2560 struct marvell_priv *priv = phydev->priv;
2561 int ret;
2562
2563 /* It needs some magic workarounds described in VCT manual for this PHY.
2564 */
2565 ret = phy_write(phydev, regnum: 29, val: 0x0003);
2566 if (ret < 0)
2567 return ret;
2568
2569 ret = phy_write(phydev, regnum: 30, val: 0x6440);
2570 if (ret < 0)
2571 return ret;
2572
2573 if (priv->vct_phase == M88E3082_VCT_PHASE1) {
2574 ret = phy_write(phydev, regnum: 29, val: 0x000a);
2575 if (ret < 0)
2576 return ret;
2577
2578 ret = phy_write(phydev, regnum: 30, val: 0x0002);
2579 if (ret < 0)
2580 return ret;
2581 }
2582
2583 ret = phy_write(phydev, MII_BMCR,
2584 BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX);
2585 if (ret < 0)
2586 return ret;
2587
2588 ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT);
2589 if (ret < 0)
2590 return ret;
2591
2592 ret = phy_write(phydev, regnum: 29, val: 0x0003);
2593 if (ret < 0)
2594 return ret;
2595
2596 ret = phy_write(phydev, regnum: 30, val: 0x0);
2597 if (ret < 0)
2598 return ret;
2599
2600 if (priv->vct_phase == M88E3082_VCT_OFF) {
2601 priv->vct_phase = M88E3082_VCT_PHASE1;
2602 priv->pair = 0;
2603
2604 return 0;
2605 }
2606
2607 ret = phy_write(phydev, regnum: 29, val: 0x000a);
2608 if (ret < 0)
2609 return ret;
2610
2611 ret = phy_write(phydev, regnum: 30, val: 0x0);
2612 if (ret < 0)
2613 return ret;
2614
2615 priv->vct_phase = M88E3082_VCT_PHASE2;
2616
2617 return 0;
2618}
2619
2620static int m88e3082_vct_cable_test_report_trans(int result, u8 distance)
2621{
2622 switch (result) {
2623 case MII_VCT_TXRXPINS_VCTTST_OK:
2624 if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX)
2625 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2626 return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH;
2627 case MII_VCT_TXRXPINS_VCTTST_SHORT:
2628 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2629 case MII_VCT_TXRXPINS_VCTTST_OPEN:
2630 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2631 default:
2632 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2633 }
2634}
2635
2636static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln)
2637{
2638 if (distrfln < 24)
2639 return 0;
2640
2641 /* Original function for meters: y = 0.7861x - 18.862 */
2642 return (7861 * distrfln - 188620) / 100;
2643}
2644
2645static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev,
2646 bool *finished)
2647{
2648 u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln;
2649 struct marvell_priv *priv = phydev->priv;
2650 int ret, tx_result, rx_result;
2651 bool done_phase = true;
2652
2653 *finished = false;
2654
2655 ret = phy_read(phydev, MII_VCT_TXPINS);
2656 if (ret < 0)
2657 return ret;
2658 else if (ret & MII_VCT_TXPINS_ENVCT)
2659 return 0;
2660
2661 tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2662 tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2663 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2664
2665 ret = phy_read(phydev, MII_VCT_RXPINS);
2666 if (ret < 0)
2667 return ret;
2668
2669 rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2670 rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2671 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2672
2673 *finished = true;
2674
2675 switch (priv->vct_phase) {
2676 case M88E3082_VCT_PHASE1:
2677 tx_result = m88e3082_vct_cable_test_report_trans(result: tx_vcttst_res,
2678 distance: tx_distrfln);
2679 rx_result = m88e3082_vct_cable_test_report_trans(result: rx_vcttst_res,
2680 distance: rx_distrfln);
2681
2682 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_A,
2683 result: tx_result);
2684 ethnl_cable_test_result(phydev, pair: ETHTOOL_A_CABLE_PAIR_B,
2685 result: rx_result);
2686
2687 if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2688 done_phase = false;
2689 priv->pair |= M88E3082_PAIR_A;
2690 } else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2691 u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2692 u32 cm = m88e3082_vct_distrfln_2_cm(distrfln: tx_distrfln);
2693
2694 ethnl_cable_test_fault_length(phydev, pair, cm);
2695 }
2696
2697 if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2698 done_phase = false;
2699 priv->pair |= M88E3082_PAIR_B;
2700 } else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2701 u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2702 u32 cm = m88e3082_vct_distrfln_2_cm(distrfln: rx_distrfln);
2703
2704 ethnl_cable_test_fault_length(phydev, pair, cm);
2705 }
2706
2707 break;
2708 case M88E3082_VCT_PHASE2:
2709 if (priv->pair & M88E3082_PAIR_A &&
2710 tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2711 tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2712 u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2713 u32 cm = m88e3082_vct_distrfln_2_cm(distrfln: tx_distrfln);
2714
2715 ethnl_cable_test_fault_length(phydev, pair, cm);
2716 }
2717 if (priv->pair & M88E3082_PAIR_B &&
2718 rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2719 rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2720 u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2721 u32 cm = m88e3082_vct_distrfln_2_cm(distrfln: rx_distrfln);
2722
2723 ethnl_cable_test_fault_length(phydev, pair, cm);
2724 }
2725
2726 break;
2727 default:
2728 return -EINVAL;
2729 }
2730
2731 if (!done_phase) {
2732 *finished = false;
2733 return m88e3082_vct_cable_test_start(phydev);
2734 }
2735 if (*finished)
2736 priv->vct_phase = M88E3082_VCT_OFF;
2737 return 0;
2738}
2739
2740static int m88e1111_vct_cable_test_start(struct phy_device *phydev)
2741{
2742 int ret;
2743
2744 ret = marvell_cable_test_start_common(phydev);
2745 if (ret)
2746 return ret;
2747
2748 /* It needs some magic workarounds described in VCT manual for this PHY.
2749 */
2750 ret = phy_write(phydev, regnum: 29, val: 0x0018);
2751 if (ret < 0)
2752 return ret;
2753
2754 ret = phy_write(phydev, regnum: 30, val: 0x00c2);
2755 if (ret < 0)
2756 return ret;
2757
2758 ret = phy_write(phydev, regnum: 30, val: 0x00ca);
2759 if (ret < 0)
2760 return ret;
2761
2762 ret = phy_write(phydev, regnum: 30, val: 0x00c2);
2763 if (ret < 0)
2764 return ret;
2765
2766 ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR,
2767 MII_VCT_TXPINS_ENVCT);
2768 if (ret < 0)
2769 return ret;
2770
2771 ret = phy_write(phydev, regnum: 29, val: 0x0018);
2772 if (ret < 0)
2773 return ret;
2774
2775 ret = phy_write(phydev, regnum: 30, val: 0x0042);
2776 if (ret < 0)
2777 return ret;
2778
2779 return 0;
2780}
2781
2782static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln)
2783{
2784 if (distrfln < 36)
2785 return 0;
2786
2787 /* Original function for meters: y = 0.8018x - 28.751 */
2788 return (8018 * distrfln - 287510) / 100;
2789}
2790
2791static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev,
2792 bool *finished)
2793{
2794 u8 vcttst_res, distrfln;
2795 int ret, result;
2796
2797 *finished = false;
2798
2799 /* Each pair use one page: A-0, B-1, C-2, D-3 */
2800 for (u8 i = 0; i < 4; i++) {
2801 ret = phy_read_paged(phydev, page: i, MII_VCT_SR);
2802 if (ret < 0)
2803 return ret;
2804 else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT)
2805 return 0;
2806
2807 distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2808 vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2809 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2810
2811 result = m88e3082_vct_cable_test_report_trans(result: vcttst_res,
2812 distance: distrfln);
2813 ethnl_cable_test_result(phydev, pair: i, result);
2814
2815 if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2816 u32 cm = m88e1111_vct_distrfln_2_cm(distrfln);
2817
2818 ethnl_cable_test_fault_length(phydev, pair: i, cm);
2819 }
2820 }
2821
2822 *finished = true;
2823 return 0;
2824}
2825
2826#ifdef CONFIG_HWMON
2827struct marvell_hwmon_ops {
2828 int (*config)(struct phy_device *phydev);
2829 int (*get_temp)(struct phy_device *phydev, long *temp);
2830 int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2831 int (*set_temp_critical)(struct phy_device *phydev, long temp);
2832 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2833};
2834
2835static const struct marvell_hwmon_ops *
2836to_marvell_hwmon_ops(const struct phy_device *phydev)
2837{
2838 return phydev->drv->driver_data;
2839}
2840
2841static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2842{
2843 int oldpage;
2844 int ret = 0;
2845 int val;
2846
2847 *temp = 0;
2848
2849 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2850 if (oldpage < 0)
2851 goto error;
2852
2853 /* Enable temperature sensor */
2854 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2855 if (ret < 0)
2856 goto error;
2857
2858 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2859 val: ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2860 if (ret < 0)
2861 goto error;
2862
2863 /* Wait for temperature to stabilize */
2864 usleep_range(min: 10000, max: 12000);
2865
2866 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2867 if (val < 0) {
2868 ret = val;
2869 goto error;
2870 }
2871
2872 /* Disable temperature sensor */
2873 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2874 val: ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2875 if (ret < 0)
2876 goto error;
2877
2878 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2879
2880error:
2881 return phy_restore_page(phydev, oldpage, ret);
2882}
2883
2884static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2885{
2886 int ret;
2887
2888 *temp = 0;
2889
2890 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2891 MII_88E1510_TEMP_SENSOR);
2892 if (ret < 0)
2893 return ret;
2894
2895 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2896
2897 return 0;
2898}
2899
2900static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2901{
2902 int ret;
2903
2904 *temp = 0;
2905
2906 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2907 MII_88E1121_MISC_TEST);
2908 if (ret < 0)
2909 return ret;
2910
2911 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2912 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2913 /* convert to mC */
2914 *temp *= 1000;
2915
2916 return 0;
2917}
2918
2919static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2920{
2921 temp = temp / 1000;
2922 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2923
2924 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2925 MII_88E1121_MISC_TEST,
2926 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2927 set: temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2928}
2929
2930static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2931{
2932 int ret;
2933
2934 *alarm = false;
2935
2936 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2937 MII_88E1121_MISC_TEST);
2938 if (ret < 0)
2939 return ret;
2940
2941 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2942
2943 return 0;
2944}
2945
2946static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2947{
2948 int sum = 0;
2949 int oldpage;
2950 int ret = 0;
2951 int i;
2952
2953 *temp = 0;
2954
2955 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2956 if (oldpage < 0)
2957 goto error;
2958
2959 /* Enable temperature sensor */
2960 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2961 if (ret < 0)
2962 goto error;
2963
2964 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2965 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2966
2967 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, val: ret);
2968 if (ret < 0)
2969 goto error;
2970
2971 /* Wait for temperature to stabilize */
2972 usleep_range(min: 10000, max: 12000);
2973
2974 /* Reading the temperature sense has an errata. You need to read
2975 * a number of times and take an average.
2976 */
2977 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2978 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2979 if (ret < 0)
2980 goto error;
2981 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2982 }
2983
2984 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2985 *temp = (sum - 75) * 1000;
2986
2987 /* Disable temperature sensor */
2988 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2989 if (ret < 0)
2990 goto error;
2991
2992 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2993 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2994
2995 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, val: ret);
2996
2997error:
2998 phy_restore_page(phydev, oldpage, ret);
2999
3000 return ret;
3001}
3002
3003static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
3004{
3005 int err;
3006
3007 err = m88e1510_get_temp(phydev, temp);
3008
3009 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
3010 * T + 75, so we have to subtract another 50
3011 */
3012 *temp -= 50000;
3013
3014 return err;
3015}
3016
3017static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
3018{
3019 int ret;
3020
3021 *temp = 0;
3022
3023 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3024 MII_88E6390_TEMP_SENSOR);
3025 if (ret < 0)
3026 return ret;
3027
3028 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
3029 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
3030
3031 return 0;
3032}
3033
3034static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
3035{
3036 temp = (temp / 1000) + 75;
3037
3038 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3039 MII_88E6390_TEMP_SENSOR,
3040 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
3041 set: temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
3042}
3043
3044static int m88e6393_hwmon_config(struct phy_device *phydev)
3045{
3046 int err;
3047
3048 err = m88e6393_set_temp_critical(phydev, temp: 100000);
3049 if (err)
3050 return err;
3051
3052 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3053 MII_88E6390_MISC_TEST,
3054 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
3055 MII_88E6393_MISC_TEST_SAMPLES_MASK |
3056 MII_88E6393_MISC_TEST_RATE_MASK,
3057 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
3058 MII_88E6393_MISC_TEST_SAMPLES_2048 |
3059 MII_88E6393_MISC_TEST_RATE_2_3MS);
3060}
3061
3062static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
3063 u32 attr, int channel, long *temp)
3064{
3065 struct phy_device *phydev = dev_get_drvdata(dev);
3066 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3067 int err = -EOPNOTSUPP;
3068
3069 switch (attr) {
3070 case hwmon_temp_input:
3071 if (ops->get_temp)
3072 err = ops->get_temp(phydev, temp);
3073 break;
3074 case hwmon_temp_crit:
3075 if (ops->get_temp_critical)
3076 err = ops->get_temp_critical(phydev, temp);
3077 break;
3078 case hwmon_temp_max_alarm:
3079 if (ops->get_temp_alarm)
3080 err = ops->get_temp_alarm(phydev, temp);
3081 break;
3082 }
3083
3084 return err;
3085}
3086
3087static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
3088 u32 attr, int channel, long temp)
3089{
3090 struct phy_device *phydev = dev_get_drvdata(dev);
3091 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3092 int err = -EOPNOTSUPP;
3093
3094 switch (attr) {
3095 case hwmon_temp_crit:
3096 if (ops->set_temp_critical)
3097 err = ops->set_temp_critical(phydev, temp);
3098 break;
3099 }
3100
3101 return err;
3102}
3103
3104static umode_t marvell_hwmon_is_visible(const void *data,
3105 enum hwmon_sensor_types type,
3106 u32 attr, int channel)
3107{
3108 const struct phy_device *phydev = data;
3109 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3110
3111 if (type != hwmon_temp)
3112 return 0;
3113
3114 switch (attr) {
3115 case hwmon_temp_input:
3116 return ops->get_temp ? 0444 : 0;
3117 case hwmon_temp_max_alarm:
3118 return ops->get_temp_alarm ? 0444 : 0;
3119 case hwmon_temp_crit:
3120 return (ops->get_temp_critical ? 0444 : 0) |
3121 (ops->set_temp_critical ? 0200 : 0);
3122 default:
3123 return 0;
3124 }
3125}
3126
3127/* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
3128 * defined for all PHYs, because the hwmon code checks whether the attributes
3129 * exists via the .is_visible method
3130 */
3131static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
3132 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
3133 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM),
3134 NULL
3135};
3136
3137static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
3138 .is_visible = marvell_hwmon_is_visible,
3139 .read = marvell_hwmon_read,
3140 .write = marvell_hwmon_write,
3141};
3142
3143static const struct hwmon_chip_info marvell_hwmon_chip_info = {
3144 .ops = &marvell_hwmon_hwmon_ops,
3145 .info = marvell_hwmon_info,
3146};
3147
3148static int marvell_hwmon_name(struct phy_device *phydev)
3149{
3150 struct marvell_priv *priv = phydev->priv;
3151 struct device *dev = &phydev->mdio.dev;
3152 const char *devname = dev_name(dev);
3153 size_t len = strlen(devname);
3154 int i, j;
3155
3156 priv->hwmon_name = devm_kzalloc(dev, size: len, GFP_KERNEL);
3157 if (!priv->hwmon_name)
3158 return -ENOMEM;
3159
3160 for (i = j = 0; i < len && devname[i]; i++) {
3161 if (isalnum(devname[i]))
3162 priv->hwmon_name[j++] = devname[i];
3163 }
3164
3165 return 0;
3166}
3167
3168static int marvell_hwmon_probe(struct phy_device *phydev)
3169{
3170 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3171 struct marvell_priv *priv = phydev->priv;
3172 struct device *dev = &phydev->mdio.dev;
3173 int err;
3174
3175 if (!ops)
3176 return 0;
3177
3178 err = marvell_hwmon_name(phydev);
3179 if (err)
3180 return err;
3181
3182 priv->hwmon_dev = devm_hwmon_device_register_with_info(
3183 dev, name: priv->hwmon_name, drvdata: phydev, info: &marvell_hwmon_chip_info, NULL);
3184 if (IS_ERR(ptr: priv->hwmon_dev))
3185 return PTR_ERR(ptr: priv->hwmon_dev);
3186
3187 if (ops->config)
3188 err = ops->config(phydev);
3189
3190 return err;
3191}
3192
3193static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
3194 .get_temp = m88e1121_get_temp,
3195};
3196
3197static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
3198 .get_temp = m88e1510_get_temp,
3199 .get_temp_critical = m88e1510_get_temp_critical,
3200 .set_temp_critical = m88e1510_set_temp_critical,
3201 .get_temp_alarm = m88e1510_get_temp_alarm,
3202};
3203
3204static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
3205 .get_temp = m88e6390_get_temp,
3206};
3207
3208static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
3209 .config = m88e6393_hwmon_config,
3210 .get_temp = m88e6393_get_temp,
3211 .get_temp_critical = m88e6393_get_temp_critical,
3212 .set_temp_critical = m88e6393_set_temp_critical,
3213 .get_temp_alarm = m88e1510_get_temp_alarm,
3214};
3215
3216#define DEF_MARVELL_HWMON_OPS(s) (&(s))
3217
3218#else
3219
3220#define DEF_MARVELL_HWMON_OPS(s) NULL
3221
3222static int marvell_hwmon_probe(struct phy_device *phydev)
3223{
3224 return 0;
3225}
3226#endif
3227
3228static int m88e1318_led_brightness_set(struct phy_device *phydev,
3229 u8 index, enum led_brightness value)
3230{
3231 int reg;
3232
3233 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3234 MII_88E1318S_PHY_LED_FUNC);
3235 if (reg < 0)
3236 return reg;
3237
3238 switch (index) {
3239 case 0:
3240 case 1:
3241 case 2:
3242 reg &= ~(0xf << (4 * index));
3243 if (value == LED_OFF)
3244 reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
3245 else
3246 reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
3247 break;
3248 default:
3249 return -EINVAL;
3250 }
3251
3252 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3253 MII_88E1318S_PHY_LED_FUNC, val: reg);
3254}
3255
3256static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
3257 unsigned long *delay_on,
3258 unsigned long *delay_off)
3259{
3260 int reg;
3261
3262 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3263 MII_88E1318S_PHY_LED_FUNC);
3264 if (reg < 0)
3265 return reg;
3266
3267 switch (index) {
3268 case 0:
3269 case 1:
3270 case 2:
3271 reg &= ~(0xf << (4 * index));
3272 reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
3273 /* Reset default is 84ms */
3274 *delay_on = 84 / 2;
3275 *delay_off = 84 / 2;
3276 break;
3277 default:
3278 return -EINVAL;
3279 }
3280
3281 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3282 MII_88E1318S_PHY_LED_FUNC, val: reg);
3283}
3284
3285struct marvell_led_rules {
3286 int mode;
3287 unsigned long rules;
3288};
3289
3290static const struct marvell_led_rules marvell_led0[] = {
3291 {
3292 .mode = 0,
3293 .rules = BIT(TRIGGER_NETDEV_LINK),
3294 },
3295 {
3296 .mode = 1,
3297 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3298 BIT(TRIGGER_NETDEV_RX) |
3299 BIT(TRIGGER_NETDEV_TX)),
3300 },
3301 {
3302 .mode = 3,
3303 .rules = (BIT(TRIGGER_NETDEV_RX) |
3304 BIT(TRIGGER_NETDEV_TX)),
3305 },
3306 {
3307 .mode = 4,
3308 .rules = (BIT(TRIGGER_NETDEV_RX) |
3309 BIT(TRIGGER_NETDEV_TX)),
3310 },
3311 {
3312 .mode = 5,
3313 .rules = BIT(TRIGGER_NETDEV_TX),
3314 },
3315 {
3316 .mode = 6,
3317 .rules = BIT(TRIGGER_NETDEV_LINK),
3318 },
3319 {
3320 .mode = 7,
3321 .rules = BIT(TRIGGER_NETDEV_LINK_1000),
3322 },
3323 {
3324 .mode = 8,
3325 .rules = 0,
3326 },
3327};
3328
3329static const struct marvell_led_rules marvell_led1[] = {
3330 {
3331 .mode = 1,
3332 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3333 BIT(TRIGGER_NETDEV_RX) |
3334 BIT(TRIGGER_NETDEV_TX)),
3335 },
3336 {
3337 .mode = 2,
3338 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3339 BIT(TRIGGER_NETDEV_RX)),
3340 },
3341 {
3342 .mode = 3,
3343 .rules = (BIT(TRIGGER_NETDEV_RX) |
3344 BIT(TRIGGER_NETDEV_TX)),
3345 },
3346 {
3347 .mode = 4,
3348 .rules = (BIT(TRIGGER_NETDEV_RX) |
3349 BIT(TRIGGER_NETDEV_TX)),
3350 },
3351 {
3352 .mode = 6,
3353 .rules = (BIT(TRIGGER_NETDEV_LINK_100) |
3354 BIT(TRIGGER_NETDEV_LINK_1000)),
3355 },
3356 {
3357 .mode = 7,
3358 .rules = BIT(TRIGGER_NETDEV_LINK_100),
3359 },
3360 {
3361 .mode = 8,
3362 .rules = 0,
3363 },
3364};
3365
3366static const struct marvell_led_rules marvell_led2[] = {
3367 {
3368 .mode = 0,
3369 .rules = BIT(TRIGGER_NETDEV_LINK),
3370 },
3371 {
3372 .mode = 1,
3373 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3374 BIT(TRIGGER_NETDEV_RX) |
3375 BIT(TRIGGER_NETDEV_TX)),
3376 },
3377 {
3378 .mode = 3,
3379 .rules = (BIT(TRIGGER_NETDEV_RX) |
3380 BIT(TRIGGER_NETDEV_TX)),
3381 },
3382 {
3383 .mode = 4,
3384 .rules = (BIT(TRIGGER_NETDEV_RX) |
3385 BIT(TRIGGER_NETDEV_TX)),
3386 },
3387 {
3388 .mode = 5,
3389 .rules = BIT(TRIGGER_NETDEV_TX),
3390 },
3391 {
3392 .mode = 6,
3393 .rules = (BIT(TRIGGER_NETDEV_LINK_10) |
3394 BIT(TRIGGER_NETDEV_LINK_1000)),
3395 },
3396 {
3397 .mode = 7,
3398 .rules = BIT(TRIGGER_NETDEV_LINK_10),
3399 },
3400 {
3401 .mode = 8,
3402 .rules = 0,
3403 },
3404};
3405
3406static int marvell_find_led_mode(unsigned long rules,
3407 const struct marvell_led_rules *marvell_rules,
3408 int count,
3409 int *mode)
3410{
3411 int i;
3412
3413 for (i = 0; i < count; i++) {
3414 if (marvell_rules[i].rules == rules) {
3415 *mode = marvell_rules[i].mode;
3416 return 0;
3417 }
3418 }
3419 return -EOPNOTSUPP;
3420}
3421
3422static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
3423{
3424 int ret;
3425
3426 switch (index) {
3427 case 0:
3428 ret = marvell_find_led_mode(rules, marvell_rules: marvell_led0,
3429 ARRAY_SIZE(marvell_led0), mode);
3430 break;
3431 case 1:
3432 ret = marvell_find_led_mode(rules, marvell_rules: marvell_led1,
3433 ARRAY_SIZE(marvell_led1), mode);
3434 break;
3435 case 2:
3436 ret = marvell_find_led_mode(rules, marvell_rules: marvell_led2,
3437 ARRAY_SIZE(marvell_led2), mode);
3438 break;
3439 default:
3440 ret = -EINVAL;
3441 }
3442
3443 return ret;
3444}
3445
3446static int marvell_find_led_rules(unsigned long *rules,
3447 const struct marvell_led_rules *marvell_rules,
3448 int count,
3449 int mode)
3450{
3451 int i;
3452
3453 for (i = 0; i < count; i++) {
3454 if (marvell_rules[i].mode == mode) {
3455 *rules = marvell_rules[i].rules;
3456 return 0;
3457 }
3458 }
3459 return -EOPNOTSUPP;
3460}
3461
3462static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
3463{
3464 int ret;
3465
3466 switch (index) {
3467 case 0:
3468 ret = marvell_find_led_rules(rules, marvell_rules: marvell_led0,
3469 ARRAY_SIZE(marvell_led0), mode);
3470 break;
3471 case 1:
3472 ret = marvell_find_led_rules(rules, marvell_rules: marvell_led1,
3473 ARRAY_SIZE(marvell_led1), mode);
3474 break;
3475 case 2:
3476 ret = marvell_find_led_rules(rules, marvell_rules: marvell_led2,
3477 ARRAY_SIZE(marvell_led2), mode);
3478 break;
3479 default:
3480 ret = -EOPNOTSUPP;
3481 }
3482
3483 return ret;
3484}
3485
3486static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
3487 unsigned long rules)
3488{
3489 int mode, ret;
3490
3491 switch (index) {
3492 case 0:
3493 case 1:
3494 case 2:
3495 ret = marvell_get_led_mode(index, rules, mode: &mode);
3496 break;
3497 default:
3498 ret = -EINVAL;
3499 }
3500
3501 return ret;
3502}
3503
3504static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
3505 unsigned long rules)
3506{
3507 int mode, ret, reg;
3508
3509 switch (index) {
3510 case 0:
3511 case 1:
3512 case 2:
3513 ret = marvell_get_led_mode(index, rules, mode: &mode);
3514 break;
3515 default:
3516 ret = -EINVAL;
3517 }
3518
3519 if (ret < 0)
3520 return ret;
3521
3522 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3523 MII_88E1318S_PHY_LED_FUNC);
3524 if (reg < 0)
3525 return reg;
3526
3527 reg &= ~(0xf << (4 * index));
3528 reg |= mode << (4 * index);
3529 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3530 MII_88E1318S_PHY_LED_FUNC, val: reg);
3531}
3532
3533static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
3534 unsigned long *rules)
3535{
3536 int mode, reg;
3537
3538 if (index > 2)
3539 return -EINVAL;
3540
3541 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3542 MII_88E1318S_PHY_LED_FUNC);
3543 if (reg < 0)
3544 return reg;
3545
3546 mode = (reg >> (4 * index)) & 0xf;
3547
3548 return marvell_get_led_rules(index, rules, mode);
3549}
3550
3551static int marvell_probe(struct phy_device *phydev)
3552{
3553 struct marvell_priv *priv;
3554
3555 priv = devm_kzalloc(dev: &phydev->mdio.dev, size: sizeof(*priv), GFP_KERNEL);
3556 if (!priv)
3557 return -ENOMEM;
3558
3559 phydev->priv = priv;
3560
3561 return marvell_hwmon_probe(phydev);
3562}
3563
3564static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
3565{
3566 DECLARE_PHY_INTERFACE_MASK(interfaces);
3567 struct phy_device *phydev = upstream;
3568 phy_interface_t interface;
3569 struct device *dev;
3570 int oldpage;
3571 int ret = 0;
3572 u16 mode;
3573
3574 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
3575
3576 dev = &phydev->mdio.dev;
3577
3578 sfp_parse_support(bus: phydev->sfp_bus, id, support: supported, interfaces);
3579 interface = sfp_select_interface(bus: phydev->sfp_bus, link_modes: supported);
3580
3581 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
3582
3583 switch (interface) {
3584 case PHY_INTERFACE_MODE_1000BASEX:
3585 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
3586
3587 break;
3588 case PHY_INTERFACE_MODE_100BASEX:
3589 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
3590
3591 break;
3592 case PHY_INTERFACE_MODE_SGMII:
3593 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
3594
3595 break;
3596 default:
3597 dev_err(dev, "Incompatible SFP module inserted\n");
3598
3599 return -EINVAL;
3600 }
3601
3602 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3603 if (oldpage < 0)
3604 goto error;
3605
3606 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3607 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, set: mode);
3608 if (ret < 0)
3609 goto error;
3610
3611 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3612 MII_88E1510_GEN_CTRL_REG_1_RESET);
3613
3614error:
3615 return phy_restore_page(phydev, oldpage, ret);
3616}
3617
3618static void m88e1510_sfp_remove(void *upstream)
3619{
3620 struct phy_device *phydev = upstream;
3621 int oldpage;
3622 int ret = 0;
3623
3624 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3625 if (oldpage < 0)
3626 goto error;
3627
3628 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3629 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
3630 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
3631 if (ret < 0)
3632 goto error;
3633
3634 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3635 MII_88E1510_GEN_CTRL_REG_1_RESET);
3636
3637error:
3638 phy_restore_page(phydev, oldpage, ret);
3639}
3640
3641static const struct sfp_upstream_ops m88e1510_sfp_ops = {
3642 .module_insert = m88e1510_sfp_insert,
3643 .module_remove = m88e1510_sfp_remove,
3644 .attach = phy_sfp_attach,
3645 .detach = phy_sfp_detach,
3646 .connect_phy = phy_sfp_connect_phy,
3647 .disconnect_phy = phy_sfp_disconnect_phy,
3648};
3649
3650static int m88e1510_probe(struct phy_device *phydev)
3651{
3652 int err;
3653
3654 err = marvell_probe(phydev);
3655 if (err)
3656 return err;
3657
3658 return phy_sfp_probe(phydev, ops: &m88e1510_sfp_ops);
3659}
3660
3661static struct phy_driver marvell_drivers[] = {
3662 {
3663 .phy_id = MARVELL_PHY_ID_88E1101,
3664 .phy_id_mask = MARVELL_PHY_ID_MASK,
3665 .name = "Marvell 88E1101",
3666 /* PHY_GBIT_FEATURES */
3667 .probe = marvell_probe,
3668 .config_init = marvell_config_init,
3669 .config_aneg = m88e1101_config_aneg,
3670 .config_intr = marvell_config_intr,
3671 .handle_interrupt = marvell_handle_interrupt,
3672 .resume = genphy_resume,
3673 .suspend = genphy_suspend,
3674 .read_page = marvell_read_page,
3675 .write_page = marvell_write_page,
3676 .get_sset_count = marvell_get_sset_count,
3677 .get_strings = marvell_get_strings,
3678 .get_stats = marvell_get_stats,
3679 },
3680 {
3681 .phy_id = MARVELL_PHY_ID_88E3082,
3682 .phy_id_mask = MARVELL_PHY_ID_MASK,
3683 .name = "Marvell 88E308X/88E609X Family",
3684 /* PHY_BASIC_FEATURES */
3685 .probe = marvell_probe,
3686 .config_init = marvell_config_init,
3687 .aneg_done = marvell_aneg_done,
3688 .read_status = marvell_read_status,
3689 .resume = genphy_resume,
3690 .suspend = genphy_suspend,
3691 .cable_test_start = m88e3082_vct_cable_test_start,
3692 .cable_test_get_status = m88e3082_vct_cable_test_get_status,
3693 },
3694 {
3695 .phy_id = MARVELL_PHY_ID_88E1112,
3696 .phy_id_mask = MARVELL_PHY_ID_MASK,
3697 .name = "Marvell 88E1112",
3698 /* PHY_GBIT_FEATURES */
3699 .probe = marvell_probe,
3700 .inband_caps = m88e1111_inband_caps,
3701 .config_inband = m88e1111_config_inband,
3702 .config_init = m88e1112_config_init,
3703 .config_aneg = marvell_config_aneg,
3704 .config_intr = marvell_config_intr,
3705 .handle_interrupt = marvell_handle_interrupt,
3706 .resume = genphy_resume,
3707 .suspend = genphy_suspend,
3708 .read_page = marvell_read_page,
3709 .write_page = marvell_write_page,
3710 .get_sset_count = marvell_get_sset_count,
3711 .get_strings = marvell_get_strings,
3712 .get_stats = marvell_get_stats,
3713 .get_tunable = m88e1011_get_tunable,
3714 .set_tunable = m88e1011_set_tunable,
3715 },
3716 {
3717 .phy_id = MARVELL_PHY_ID_88E1111,
3718 .phy_id_mask = MARVELL_PHY_ID_MASK,
3719 .name = "Marvell 88E1111",
3720 /* PHY_GBIT_FEATURES */
3721 .flags = PHY_POLL_CABLE_TEST,
3722 .probe = marvell_probe,
3723 .inband_caps = m88e1111_inband_caps,
3724 .config_inband = m88e1111_config_inband,
3725 .config_init = m88e1111gbe_config_init,
3726 .config_aneg = m88e1111_config_aneg,
3727 .read_status = marvell_read_status,
3728 .config_intr = marvell_config_intr,
3729 .handle_interrupt = marvell_handle_interrupt,
3730 .resume = genphy_resume,
3731 .suspend = genphy_suspend,
3732 .read_page = marvell_read_page,
3733 .write_page = marvell_write_page,
3734 .get_sset_count = marvell_get_sset_count,
3735 .get_strings = marvell_get_strings,
3736 .get_stats = marvell_get_stats,
3737 .get_tunable = m88e1111_get_tunable,
3738 .set_tunable = m88e1111_set_tunable,
3739 .cable_test_start = m88e1111_vct_cable_test_start,
3740 .cable_test_get_status = m88e1111_vct_cable_test_get_status,
3741 },
3742 {
3743 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
3744 .phy_id_mask = MARVELL_PHY_ID_MASK,
3745 .name = "Marvell 88E1111 (Finisar)",
3746 /* PHY_GBIT_FEATURES */
3747 .probe = marvell_probe,
3748 .inband_caps = m88e1111_inband_caps,
3749 .config_inband = m88e1111_config_inband,
3750 .config_init = m88e1111gbe_config_init,
3751 .config_aneg = m88e1111_config_aneg,
3752 .read_status = marvell_read_status,
3753 .config_intr = marvell_config_intr,
3754 .handle_interrupt = marvell_handle_interrupt,
3755 .resume = genphy_resume,
3756 .suspend = genphy_suspend,
3757 .read_page = marvell_read_page,
3758 .write_page = marvell_write_page,
3759 .get_sset_count = marvell_get_sset_count,
3760 .get_strings = marvell_get_strings,
3761 .get_stats = marvell_get_stats,
3762 .get_tunable = m88e1111_get_tunable,
3763 .set_tunable = m88e1111_set_tunable,
3764 },
3765 {
3766 .phy_id = MARVELL_PHY_ID_88E1118,
3767 .phy_id_mask = MARVELL_PHY_ID_MASK,
3768 .name = "Marvell 88E1118",
3769 /* PHY_GBIT_FEATURES */
3770 .probe = marvell_probe,
3771 .config_init = m88e1118_config_init,
3772 .config_aneg = m88e1118_config_aneg,
3773 .config_intr = marvell_config_intr,
3774 .handle_interrupt = marvell_handle_interrupt,
3775 .resume = genphy_resume,
3776 .suspend = genphy_suspend,
3777 .read_page = marvell_read_page,
3778 .write_page = marvell_write_page,
3779 .get_sset_count = marvell_get_sset_count,
3780 .get_strings = marvell_get_strings,
3781 .get_stats = marvell_get_stats,
3782 },
3783 {
3784 .phy_id = MARVELL_PHY_ID_88E1121R,
3785 .phy_id_mask = MARVELL_PHY_ID_MASK,
3786 .name = "Marvell 88E1121R",
3787 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3788 /* PHY_GBIT_FEATURES */
3789 .probe = marvell_probe,
3790 .config_init = marvell_1011gbe_config_init,
3791 .config_aneg = m88e1121_config_aneg,
3792 .read_status = marvell_read_status,
3793 .config_intr = marvell_config_intr,
3794 .handle_interrupt = marvell_handle_interrupt,
3795 .resume = genphy_resume,
3796 .suspend = genphy_suspend,
3797 .read_page = marvell_read_page,
3798 .write_page = marvell_write_page,
3799 .get_sset_count = marvell_get_sset_count,
3800 .get_strings = marvell_get_strings,
3801 .get_stats = marvell_get_stats,
3802 .get_tunable = m88e1011_get_tunable,
3803 .set_tunable = m88e1011_set_tunable,
3804 },
3805 {
3806 .phy_id = MARVELL_PHY_ID_88E1318S,
3807 .phy_id_mask = MARVELL_PHY_ID_MASK,
3808 .name = "Marvell 88E1318S",
3809 /* PHY_GBIT_FEATURES */
3810 .probe = marvell_probe,
3811 .config_init = m88e1318_config_init,
3812 .config_aneg = m88e1318_config_aneg,
3813 .read_status = marvell_read_status,
3814 .config_intr = marvell_config_intr,
3815 .handle_interrupt = marvell_handle_interrupt,
3816 .get_wol = m88e1318_get_wol,
3817 .set_wol = m88e1318_set_wol,
3818 .resume = genphy_resume,
3819 .suspend = genphy_suspend,
3820 .read_page = marvell_read_page,
3821 .write_page = marvell_write_page,
3822 .get_sset_count = marvell_get_sset_count,
3823 .get_strings = marvell_get_strings,
3824 .get_stats = marvell_get_stats,
3825 .led_brightness_set = m88e1318_led_brightness_set,
3826 .led_blink_set = m88e1318_led_blink_set,
3827 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3828 .led_hw_control_set = m88e1318_led_hw_control_set,
3829 .led_hw_control_get = m88e1318_led_hw_control_get,
3830 },
3831 {
3832 .phy_id = MARVELL_PHY_ID_88E1145,
3833 .phy_id_mask = MARVELL_PHY_ID_MASK,
3834 .name = "Marvell 88E1145",
3835 /* PHY_GBIT_FEATURES */
3836 .flags = PHY_POLL_CABLE_TEST,
3837 .probe = marvell_probe,
3838 .config_init = m88e1145_config_init,
3839 .config_aneg = m88e1101_config_aneg,
3840 .config_intr = marvell_config_intr,
3841 .handle_interrupt = marvell_handle_interrupt,
3842 .resume = genphy_resume,
3843 .suspend = genphy_suspend,
3844 .read_page = marvell_read_page,
3845 .write_page = marvell_write_page,
3846 .get_sset_count = marvell_get_sset_count,
3847 .get_strings = marvell_get_strings,
3848 .get_stats = marvell_get_stats,
3849 .get_tunable = m88e1111_get_tunable,
3850 .set_tunable = m88e1111_set_tunable,
3851 .cable_test_start = m88e1111_vct_cable_test_start,
3852 .cable_test_get_status = m88e1111_vct_cable_test_get_status,
3853 },
3854 {
3855 .phy_id = MARVELL_PHY_ID_88E1149R,
3856 .phy_id_mask = MARVELL_PHY_ID_MASK,
3857 .name = "Marvell 88E1149R",
3858 /* PHY_GBIT_FEATURES */
3859 .probe = marvell_probe,
3860 .config_init = m88e1149_config_init,
3861 .config_aneg = m88e1118_config_aneg,
3862 .config_intr = marvell_config_intr,
3863 .handle_interrupt = marvell_handle_interrupt,
3864 .resume = genphy_resume,
3865 .suspend = genphy_suspend,
3866 .read_page = marvell_read_page,
3867 .write_page = marvell_write_page,
3868 .get_sset_count = marvell_get_sset_count,
3869 .get_strings = marvell_get_strings,
3870 .get_stats = marvell_get_stats,
3871 },
3872 {
3873 .phy_id = MARVELL_PHY_ID_88E1240,
3874 .phy_id_mask = MARVELL_PHY_ID_MASK,
3875 .name = "Marvell 88E1240",
3876 /* PHY_GBIT_FEATURES */
3877 .probe = marvell_probe,
3878 .config_init = m88e1112_config_init,
3879 .config_aneg = marvell_config_aneg,
3880 .config_intr = marvell_config_intr,
3881 .handle_interrupt = marvell_handle_interrupt,
3882 .resume = genphy_resume,
3883 .suspend = genphy_suspend,
3884 .read_page = marvell_read_page,
3885 .write_page = marvell_write_page,
3886 .get_sset_count = marvell_get_sset_count,
3887 .get_strings = marvell_get_strings,
3888 .get_stats = marvell_get_stats,
3889 .get_tunable = m88e1011_get_tunable,
3890 .set_tunable = m88e1011_set_tunable,
3891 },
3892 {
3893 .phy_id = MARVELL_PHY_ID_88E1116R,
3894 .phy_id_mask = MARVELL_PHY_ID_MASK,
3895 .name = "Marvell 88E1116R",
3896 /* PHY_GBIT_FEATURES */
3897 .probe = marvell_probe,
3898 .config_init = m88e1116r_config_init,
3899 .config_intr = marvell_config_intr,
3900 .handle_interrupt = marvell_handle_interrupt,
3901 .resume = genphy_resume,
3902 .suspend = genphy_suspend,
3903 .read_page = marvell_read_page,
3904 .write_page = marvell_write_page,
3905 .get_sset_count = marvell_get_sset_count,
3906 .get_strings = marvell_get_strings,
3907 .get_stats = marvell_get_stats,
3908 .get_tunable = m88e1011_get_tunable,
3909 .set_tunable = m88e1011_set_tunable,
3910 },
3911 {
3912 .phy_id = MARVELL_PHY_ID_88E1510,
3913 .phy_id_mask = MARVELL_PHY_ID_MASK,
3914 .name = "Marvell 88E1510",
3915 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3916 .features = PHY_GBIT_FIBRE_FEATURES,
3917 .flags = PHY_POLL_CABLE_TEST,
3918 .probe = m88e1510_probe,
3919 .config_init = m88e1510_config_init,
3920 .config_aneg = m88e1510_config_aneg,
3921 .read_status = marvell_read_status,
3922 .config_intr = marvell_config_intr,
3923 .handle_interrupt = marvell_handle_interrupt,
3924 .get_wol = m88e1318_get_wol,
3925 .set_wol = m88e1318_set_wol,
3926 .resume = marvell_resume,
3927 .suspend = marvell_suspend,
3928 .read_page = marvell_read_page,
3929 .write_page = marvell_write_page,
3930 .get_sset_count = marvell_get_sset_count,
3931 .get_strings = marvell_get_strings,
3932 .get_stats = marvell_get_stats,
3933 .set_loopback = m88e1510_loopback,
3934 .get_tunable = m88e1011_get_tunable,
3935 .set_tunable = m88e1011_set_tunable,
3936 .cable_test_start = marvell_vct7_cable_test_start,
3937 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3938 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3939 .led_brightness_set = m88e1318_led_brightness_set,
3940 .led_blink_set = m88e1318_led_blink_set,
3941 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3942 .led_hw_control_set = m88e1318_led_hw_control_set,
3943 .led_hw_control_get = m88e1318_led_hw_control_get,
3944 },
3945 {
3946 .phy_id = MARVELL_PHY_ID_88E1540,
3947 .phy_id_mask = MARVELL_PHY_ID_MASK,
3948 .name = "Marvell 88E1540",
3949 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3950 /* PHY_GBIT_FEATURES */
3951 .flags = PHY_POLL_CABLE_TEST,
3952 .probe = marvell_probe,
3953 .config_init = marvell_1011gbe_config_init,
3954 .config_aneg = m88e1510_config_aneg,
3955 .read_status = marvell_read_status,
3956 .config_intr = marvell_config_intr,
3957 .handle_interrupt = marvell_handle_interrupt,
3958 .resume = genphy_resume,
3959 .suspend = genphy_suspend,
3960 .read_page = marvell_read_page,
3961 .write_page = marvell_write_page,
3962 .get_sset_count = marvell_get_sset_count,
3963 .get_strings = marvell_get_strings,
3964 .get_stats = marvell_get_stats,
3965 .get_tunable = m88e1540_get_tunable,
3966 .set_tunable = m88e1540_set_tunable,
3967 .cable_test_start = marvell_vct7_cable_test_start,
3968 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3969 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3970 .led_brightness_set = m88e1318_led_brightness_set,
3971 .led_blink_set = m88e1318_led_blink_set,
3972 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3973 .led_hw_control_set = m88e1318_led_hw_control_set,
3974 .led_hw_control_get = m88e1318_led_hw_control_get,
3975 },
3976 {
3977 .phy_id = MARVELL_PHY_ID_88E1545,
3978 .phy_id_mask = MARVELL_PHY_ID_MASK,
3979 .name = "Marvell 88E1545",
3980 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3981 .probe = marvell_probe,
3982 /* PHY_GBIT_FEATURES */
3983 .flags = PHY_POLL_CABLE_TEST,
3984 .config_init = marvell_1011gbe_config_init,
3985 .config_aneg = m88e1510_config_aneg,
3986 .read_status = marvell_read_status,
3987 .config_intr = marvell_config_intr,
3988 .handle_interrupt = marvell_handle_interrupt,
3989 .resume = genphy_resume,
3990 .suspend = genphy_suspend,
3991 .read_page = marvell_read_page,
3992 .write_page = marvell_write_page,
3993 .get_sset_count = marvell_get_sset_count,
3994 .get_strings = marvell_get_strings,
3995 .get_stats = marvell_get_stats,
3996 .get_tunable = m88e1540_get_tunable,
3997 .set_tunable = m88e1540_set_tunable,
3998 .cable_test_start = marvell_vct7_cable_test_start,
3999 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4000 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4001 .led_brightness_set = m88e1318_led_brightness_set,
4002 .led_blink_set = m88e1318_led_blink_set,
4003 .led_hw_is_supported = m88e1318_led_hw_is_supported,
4004 .led_hw_control_set = m88e1318_led_hw_control_set,
4005 .led_hw_control_get = m88e1318_led_hw_control_get,
4006 },
4007 {
4008 .phy_id = MARVELL_PHY_ID_88E3016,
4009 .phy_id_mask = MARVELL_PHY_ID_MASK,
4010 .name = "Marvell 88E3016",
4011 /* PHY_BASIC_FEATURES */
4012 .probe = marvell_probe,
4013 .config_init = m88e3016_config_init,
4014 .aneg_done = marvell_aneg_done,
4015 .read_status = marvell_read_status,
4016 .config_intr = marvell_config_intr,
4017 .handle_interrupt = marvell_handle_interrupt,
4018 .resume = genphy_resume,
4019 .suspend = genphy_suspend,
4020 .read_page = marvell_read_page,
4021 .write_page = marvell_write_page,
4022 .get_sset_count = marvell_get_sset_count,
4023 .get_strings = marvell_get_strings,
4024 .get_stats = marvell_get_stats,
4025 },
4026 {
4027 .phy_id = MARVELL_PHY_ID_88E6250_FAMILY,
4028 .phy_id_mask = MARVELL_PHY_ID_MASK,
4029 .name = "Marvell 88E6250 Family",
4030 /* PHY_BASIC_FEATURES */
4031 .probe = marvell_probe,
4032 .aneg_done = marvell_aneg_done,
4033 .config_intr = marvell_config_intr,
4034 .handle_interrupt = marvell_handle_interrupt,
4035 .resume = genphy_resume,
4036 .suspend = genphy_suspend,
4037 .get_sset_count = marvell_get_sset_count_simple,
4038 .get_strings = marvell_get_strings_simple,
4039 .get_stats = marvell_get_stats_simple,
4040 },
4041 {
4042 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
4043 .phy_id_mask = MARVELL_PHY_ID_MASK,
4044 .name = "Marvell 88E6341 Family",
4045 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4046 /* PHY_GBIT_FEATURES */
4047 .flags = PHY_POLL_CABLE_TEST,
4048 .probe = marvell_probe,
4049 .config_init = marvell_1011gbe_config_init,
4050 .config_aneg = m88e6390_config_aneg,
4051 .read_status = marvell_read_status,
4052 .config_intr = marvell_config_intr,
4053 .handle_interrupt = marvell_handle_interrupt,
4054 .resume = genphy_resume,
4055 .suspend = genphy_suspend,
4056 .read_page = marvell_read_page,
4057 .write_page = marvell_write_page,
4058 .get_sset_count = marvell_get_sset_count,
4059 .get_strings = marvell_get_strings,
4060 .get_stats = marvell_get_stats,
4061 .get_tunable = m88e1540_get_tunable,
4062 .set_tunable = m88e1540_set_tunable,
4063 .cable_test_start = marvell_vct7_cable_test_start,
4064 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4065 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4066 },
4067 {
4068 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
4069 .phy_id_mask = MARVELL_PHY_ID_MASK,
4070 .name = "Marvell 88E6390 Family",
4071 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
4072 /* PHY_GBIT_FEATURES */
4073 .flags = PHY_POLL_CABLE_TEST,
4074 .probe = marvell_probe,
4075 .config_init = marvell_1011gbe_config_init,
4076 .config_aneg = m88e6390_config_aneg,
4077 .read_status = marvell_read_status,
4078 .config_intr = marvell_config_intr,
4079 .handle_interrupt = marvell_handle_interrupt,
4080 .resume = genphy_resume,
4081 .suspend = genphy_suspend,
4082 .read_page = marvell_read_page,
4083 .write_page = marvell_write_page,
4084 .get_sset_count = marvell_get_sset_count,
4085 .get_strings = marvell_get_strings,
4086 .get_stats = marvell_get_stats,
4087 .get_tunable = m88e1540_get_tunable,
4088 .set_tunable = m88e1540_set_tunable,
4089 .cable_test_start = marvell_vct7_cable_test_start,
4090 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4091 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4092 },
4093 {
4094 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
4095 .phy_id_mask = MARVELL_PHY_ID_MASK,
4096 .name = "Marvell 88E6393 Family",
4097 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
4098 /* PHY_GBIT_FEATURES */
4099 .flags = PHY_POLL_CABLE_TEST,
4100 .probe = marvell_probe,
4101 .config_init = marvell_1011gbe_config_init,
4102 .config_aneg = m88e1510_config_aneg,
4103 .read_status = marvell_read_status,
4104 .config_intr = marvell_config_intr,
4105 .handle_interrupt = marvell_handle_interrupt,
4106 .resume = genphy_resume,
4107 .suspend = genphy_suspend,
4108 .read_page = marvell_read_page,
4109 .write_page = marvell_write_page,
4110 .get_sset_count = marvell_get_sset_count,
4111 .get_strings = marvell_get_strings,
4112 .get_stats = marvell_get_stats,
4113 .get_tunable = m88e1540_get_tunable,
4114 .set_tunable = m88e1540_set_tunable,
4115 .cable_test_start = marvell_vct7_cable_test_start,
4116 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4117 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4118 },
4119 {
4120 .phy_id = MARVELL_PHY_ID_88E1340S,
4121 .phy_id_mask = MARVELL_PHY_ID_MASK,
4122 .name = "Marvell 88E1340S",
4123 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4124 .probe = marvell_probe,
4125 /* PHY_GBIT_FEATURES */
4126 .config_init = marvell_1011gbe_config_init,
4127 .config_aneg = m88e1510_config_aneg,
4128 .read_status = marvell_read_status,
4129 .config_intr = marvell_config_intr,
4130 .handle_interrupt = marvell_handle_interrupt,
4131 .resume = genphy_resume,
4132 .suspend = genphy_suspend,
4133 .read_page = marvell_read_page,
4134 .write_page = marvell_write_page,
4135 .get_sset_count = marvell_get_sset_count,
4136 .get_strings = marvell_get_strings,
4137 .get_stats = marvell_get_stats,
4138 .get_tunable = m88e1540_get_tunable,
4139 .set_tunable = m88e1540_set_tunable,
4140 },
4141 {
4142 .phy_id = MARVELL_PHY_ID_88E1548P,
4143 .phy_id_mask = MARVELL_PHY_ID_MASK,
4144 .name = "Marvell 88E1548P",
4145 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4146 .probe = marvell_probe,
4147 .features = PHY_GBIT_FIBRE_FEATURES,
4148 .config_init = marvell_1011gbe_config_init,
4149 .config_aneg = m88e1510_config_aneg,
4150 .read_status = marvell_read_status,
4151 .config_intr = marvell_config_intr,
4152 .handle_interrupt = marvell_handle_interrupt,
4153 .resume = genphy_resume,
4154 .suspend = genphy_suspend,
4155 .read_page = marvell_read_page,
4156 .write_page = marvell_write_page,
4157 .get_sset_count = marvell_get_sset_count,
4158 .get_strings = marvell_get_strings,
4159 .get_stats = marvell_get_stats,
4160 .get_tunable = m88e1540_get_tunable,
4161 .set_tunable = m88e1540_set_tunable,
4162 .led_brightness_set = m88e1318_led_brightness_set,
4163 .led_blink_set = m88e1318_led_blink_set,
4164 .led_hw_is_supported = m88e1318_led_hw_is_supported,
4165 .led_hw_control_set = m88e1318_led_hw_control_set,
4166 .led_hw_control_get = m88e1318_led_hw_control_get,
4167 },
4168};
4169
4170module_phy_driver(marvell_drivers);
4171
4172static const struct mdio_device_id __maybe_unused marvell_tbl[] = {
4173 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
4174 { MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },
4175 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
4176 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
4177 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
4178 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
4179 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
4180 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
4181 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
4182 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
4183 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
4184 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
4185 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
4186 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
4187 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
4188 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
4189 { MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK },
4190 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
4191 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
4192 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
4193 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
4194 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
4195 { }
4196};
4197
4198MODULE_DEVICE_TABLE(mdio, marvell_tbl);
4199

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source code of linux/drivers/net/phy/marvell.c