1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* QLogic Fibre Channel HBA Driver
4	* Copyright (c) 2003-2014 QLogic Corporation
5	*/
6	#include "qla_def.h"
7	#include "qla_gbl.h"
8
9	#include <linux/delay.h>
10	#include <linux/slab.h>
11	#include <linux/vmalloc.h>
12
13	#include "qla_devtbl.h"
14
15	#ifdef CONFIG_SPARC
16	#include <asm/prom.h>
17	#endif
18
19	#include "qla_target.h"
20
21	/*
22	* QLogic ISP2x00 Hardware Support Function Prototypes.
23	*/
24	static int qla2x00_isp_firmware(scsi_qla_host_t *);
25	static int qla2x00_setup_chip(scsi_qla_host_t *);
26	static int qla2x00_fw_ready(scsi_qla_host_t *);
27	static int qla2x00_configure_hba(scsi_qla_host_t *);
28	static int qla2x00_configure_loop(scsi_qla_host_t *);
29	static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30	static int qla2x00_configure_fabric(scsi_qla_host_t *);
31	static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32	static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34	static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35	static int qla84xx_init_chip(scsi_qla_host_t *);
36	static int qla25xx_init_queues(struct qla_hw_data *);
37	static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38	struct event_arg *ea);
39	static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40	struct event_arg *);
41	static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42
43	/* SRB Extensions ---------------------------------------------------------- */
44
45	void
46	qla2x00_sp_timeout(struct timer_list *t)
47	{
48	srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
49	struct srb_iocb *iocb;
50	scsi_qla_host_t *vha = sp->vha;
51
52	WARN_ON(irqs_disabled());
53	iocb = &sp->u.iocb_cmd;
54	iocb->timeout(sp);
55
56	/* ref: TMR */
57	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
58
59	if (vha && qla2x00_isp_reg_stat(ha: vha->hw)) {
60	ql_log(ql_log_info, vha, 0x9008,
61	fmt: "PCI/Register disconnect.\n");
62	qla_pci_set_eeh_busy(vha);
63	}
64	}
65
66	void qla2x00_sp_free(srb_t *sp)
67	{
68	struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70	del_timer(timer: &iocb->timer);
71	qla2x00_rel_sp(sp);
72	}
73
74	void qla2xxx_rel_done_warning(srb_t *sp, int res)
75	{
76	WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
77	}
78
79	void qla2xxx_rel_free_warning(srb_t *sp)
80	{
81	WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
82	}
83
84	/* Asynchronous Login/Logout Routines -------------------------------------- */
85
86	unsigned long
87	qla2x00_get_async_timeout(struct scsi_qla_host *vha)
88	{
89	unsigned long tmo;
90	struct qla_hw_data *ha = vha->hw;
91
92	/* Firmware should use switch negotiated r_a_tov for timeout. */
93	tmo = ha->r_a_tov / 10 * 2;
94	if (IS_QLAFX00(ha)) {
95	tmo = FX00_DEF_RATOV * 2;
96	} else if (!IS_FWI2_CAPABLE(ha)) {
97	/*
98	* Except for earlier ISPs where the timeout is seeded from the
99	* initialization control block.
100	*/
101	tmo = ha->login_timeout;
102	}
103	return tmo;
104	}
105
106	static void qla24xx_abort_iocb_timeout(void *data)
107	{
108	srb_t *sp = data;
109	struct srb_iocb *abt = &sp->u.iocb_cmd;
110	struct qla_qpair *qpair = sp->qpair;
111	u32 handle;
112	unsigned long flags;
113	int sp_found = 0, cmdsp_found = 0;
114
115	if (sp->cmd_sp)
116	ql_dbg(ql_dbg_async, vha: sp->vha, 0x507c,
117	fmt: "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
118	sp->cmd_sp->handle, sp->cmd_sp->type,
119	sp->handle, sp->type);
120	else
121	ql_dbg(ql_dbg_async, vha: sp->vha, 0x507c,
122	fmt: "Abort timeout 2 - hdl=%x, type=%x\n",
123	sp->handle, sp->type);
124
125	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
126	for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
127	if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
128	sp->cmd_sp)) {
129	qpair->req->outstanding_cmds[handle] = NULL;
130	cmdsp_found = 1;
131	qla_put_fw_resources(qp: qpair, iores: &sp->cmd_sp->iores);
132	}
133
134	/* removing the abort */
135	if (qpair->req->outstanding_cmds[handle] == sp) {
136	qpair->req->outstanding_cmds[handle] = NULL;
137	sp_found = 1;
138	qla_put_fw_resources(qp: qpair, iores: &sp->iores);
139	break;
140	}
141	}
142	spin_unlock_irqrestore(lock: qpair->qp_lock_ptr, flags);
143
144	if (cmdsp_found && sp->cmd_sp) {
145	/*
146	* This done function should take care of
147	* original command ref: INIT
148	*/
149	sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
150	}
151
152	if (sp_found) {
153	abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
154	sp->done(sp, QLA_OS_TIMER_EXPIRED);
155	}
156	}
157
158	static void qla24xx_abort_sp_done(srb_t *sp, int res)
159	{
160	struct srb_iocb *abt = &sp->u.iocb_cmd;
161	srb_t *orig_sp = sp->cmd_sp;
162
163	if (orig_sp)
164	qla_wait_nvme_release_cmd_kref(sp: orig_sp);
165
166	if (sp->flags & SRB_WAKEUP_ON_COMP)
167	complete(&abt->u.abt.comp);
168	else
169	/* ref: INIT */
170	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
171	}
172
173	int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
174	{
175	scsi_qla_host_t *vha = cmd_sp->vha;
176	struct srb_iocb *abt_iocb;
177	srb_t *sp;
178	int rval = QLA_FUNCTION_FAILED;
179
180	/* ref: INIT for ABTS command */
181	sp = qla2xxx_get_qpair_sp(vha: cmd_sp->vha, qpair: cmd_sp->qpair, fcport: cmd_sp->fcport,
182	GFP_ATOMIC);
183	if (!sp)
184	return QLA_MEMORY_ALLOC_FAILED;
185
186	qla_vha_mark_busy(vha);
187	abt_iocb = &sp->u.iocb_cmd;
188	sp->type = SRB_ABT_CMD;
189	sp->name = "abort";
190	sp->qpair = cmd_sp->qpair;
191	sp->cmd_sp = cmd_sp;
192	if (wait)
193	sp->flags = SRB_WAKEUP_ON_COMP;
194
195	init_completion(x: &abt_iocb->u.abt.comp);
196	/* FW can send 2 x ABTS's timeout/20s */
197	qla2x00_init_async_sp(sp, tmo: 42, done: qla24xx_abort_sp_done);
198	sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
199
200	abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
201	abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
202
203	ql_dbg(ql_dbg_async, vha, 0x507c,
204	fmt: "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
205	cmd_sp->type);
206
207	rval = qla2x00_start_sp(sp);
208	if (rval != QLA_SUCCESS) {
209	/* ref: INIT */
210	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
211	return rval;
212	}
213
214	if (wait) {
215	wait_for_completion(&abt_iocb->u.abt.comp);
216	rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
217	QLA_SUCCESS : QLA_ERR_FROM_FW;
218	/* ref: INIT */
219	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
220	}
221
222	return rval;
223	}
224
225	void
226	qla2x00_async_iocb_timeout(void *data)
227	{
228	srb_t *sp = data;
229	fc_port_t *fcport = sp->fcport;
230	struct srb_iocb *lio = &sp->u.iocb_cmd;
231	int rc, h;
232	unsigned long flags;
233
234	if (fcport) {
235	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x2071,
236	fmt: "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
237	sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
238
239	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
240	} else {
241	pr_info("Async-%s timeout - hdl=%x.\n",
242	sp->name, sp->handle);
243	}
244
245	switch (sp->type) {
246	case SRB_LOGIN_CMD:
247	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
248	if (rc) {
249	/* Retry as needed. */
250	lio->u.logio.data[0] = MBS_COMMAND_ERROR;
251	lio->u.logio.data[1] =
252	lio->u.logio.flags & SRB_LOGIN_RETRIED ?
253	QLA_LOGIO_LOGIN_RETRIED : 0;
254	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
255	for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
256	h++) {
257	if (sp->qpair->req->outstanding_cmds[h] ==
258	sp) {
259	sp->qpair->req->outstanding_cmds[h] =
260	NULL;
261	break;
262	}
263	}
264	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
265	sp->done(sp, QLA_FUNCTION_TIMEOUT);
266	}
267	break;
268	case SRB_LOGOUT_CMD:
269	case SRB_CT_PTHRU_CMD:
270	case SRB_MB_IOCB:
271	case SRB_NACK_PLOGI:
272	case SRB_NACK_PRLI:
273	case SRB_NACK_LOGO:
274	case SRB_CTRL_VP:
275	default:
276	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
277	if (rc) {
278	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
279	for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
280	h++) {
281	if (sp->qpair->req->outstanding_cmds[h] ==
282	sp) {
283	sp->qpair->req->outstanding_cmds[h] =
284	NULL;
285	break;
286	}
287	}
288	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
289	sp->done(sp, QLA_FUNCTION_TIMEOUT);
290	}
291	break;
292	}
293	}
294
295	static void qla2x00_async_login_sp_done(srb_t *sp, int res)
296	{
297	struct scsi_qla_host *vha = sp->vha;
298	struct srb_iocb *lio = &sp->u.iocb_cmd;
299	struct event_arg ea;
300
301	ql_dbg(ql_dbg_disc, vha, 0x20dd,
302	fmt: "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
303
304	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
305
306	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
307	memset(&ea, 0, sizeof(ea));
308	ea.fcport = sp->fcport;
309	ea.data[0] = lio->u.logio.data[0];
310	ea.data[1] = lio->u.logio.data[1];
311	ea.iop[0] = lio->u.logio.iop[0];
312	ea.iop[1] = lio->u.logio.iop[1];
313	ea.sp = sp;
314	if (res)
315	ea.data[0] = MBS_COMMAND_ERROR;
316	qla24xx_handle_plogi_done_event(vha, ea: &ea);
317	}
318
319	/* ref: INIT */
320	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
321	}
322
323	int
324	qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
325	uint16_t *data)
326	{
327	srb_t *sp;
328	struct srb_iocb *lio;
329	int rval = QLA_FUNCTION_FAILED;
330
331	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
332	fcport->loop_id == FC_NO_LOOP_ID) {
333	ql_log(ql_log_warn, vha, 0xffff,
334	fmt: "%s: %8phC - not sending command.\n",
335	__func__, fcport->port_name);
336	return rval;
337	}
338
339	/* ref: INIT */
340	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
341	if (!sp)
342	goto done;
343
344	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_PEND);
345	fcport->flags |= FCF_ASYNC_SENT;
346	fcport->logout_completed = 0;
347
348	sp->type = SRB_LOGIN_CMD;
349	sp->name = "login";
350	sp->gen1 = fcport->rscn_gen;
351	sp->gen2 = fcport->login_gen;
352	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
353	done: qla2x00_async_login_sp_done);
354
355	lio = &sp->u.iocb_cmd;
356	if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
357	lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
358	} else {
359	if (vha->hw->flags.edif_enabled &&
360	DBELL_ACTIVE(vha)) {
361	lio->u.logio.flags |=
362	(SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
363	} else {
364	lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
365	}
366	}
367
368	if (NVME_TARGET(vha->hw, fcport))
369	lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
370
371	rval = qla2x00_start_sp(sp);
372
373	ql_dbg(ql_dbg_disc, vha, 0x2072,
374	fmt: "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
375	fcport->port_name, sp->handle, fcport->loop_id,
376	fcport->d_id.b24, fcport->login_retry,
377	lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : "");
378
379	if (rval != QLA_SUCCESS) {
380	fcport->flags |= FCF_LOGIN_NEEDED;
381	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
382	goto done_free_sp;
383	}
384
385	return rval;
386
387	done_free_sp:
388	/* ref: INIT */
389	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
390	fcport->flags &= ~FCF_ASYNC_SENT;
391	done:
392	fcport->flags &= ~FCF_ASYNC_ACTIVE;
393
394	/*
395	* async login failed. Could be due to iocb/exchange resource
396	* being low. Set state DELETED for re-login process to start again.
397	*/
398	qla2x00_set_fcport_disc_state(fcport, state: DSC_DELETED);
399	return rval;
400	}
401
402	static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
403	{
404	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
405	sp->fcport->login_gen++;
406	qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
407	/* ref: INIT */
408	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
409	}
410
411	int
412	qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
413	{
414	srb_t *sp;
415	int rval = QLA_FUNCTION_FAILED;
416
417	fcport->flags |= FCF_ASYNC_SENT;
418	/* ref: INIT */
419	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
420	if (!sp)
421	goto done;
422
423	sp->type = SRB_LOGOUT_CMD;
424	sp->name = "logout";
425	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
426	done: qla2x00_async_logout_sp_done),
427
428	ql_dbg(ql_dbg_disc, vha, 0x2070,
429	fmt: "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
430	sp->handle, fcport->loop_id, fcport->d_id.b.domain,
431	fcport->d_id.b.area, fcport->d_id.b.al_pa,
432	fcport->port_name, fcport->explicit_logout);
433
434	rval = qla2x00_start_sp(sp);
435	if (rval != QLA_SUCCESS)
436	goto done_free_sp;
437	return rval;
438
439	done_free_sp:
440	/* ref: INIT */
441	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
442	done:
443	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
444	return rval;
445	}
446
447	void
448	qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
449	uint16_t *data)
450	{
451	fcport->flags &= ~FCF_ASYNC_ACTIVE;
452	/* Don't re-login in target mode */
453	if (!fcport->tgt_session)
454	qla2x00_mark_device_lost(vha, fcport, 1);
455	qlt_logo_completion_handler(fcport, data[0]);
456	}
457
458	static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
459	{
460	struct srb_iocb *lio = &sp->u.iocb_cmd;
461	struct scsi_qla_host *vha = sp->vha;
462
463	sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
464	if (!test_bit(UNLOADING, &vha->dpc_flags))
465	qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
466	lio->u.logio.data);
467	/* ref: INIT */
468	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
469	}
470
471	int
472	qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
473	{
474	srb_t *sp;
475	int rval;
476
477	rval = QLA_FUNCTION_FAILED;
478	/* ref: INIT */
479	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
480	if (!sp)
481	goto done;
482
483	sp->type = SRB_PRLO_CMD;
484	sp->name = "prlo";
485	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
486	done: qla2x00_async_prlo_sp_done);
487
488	ql_dbg(ql_dbg_disc, vha, 0x2070,
489	fmt: "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
490	sp->handle, fcport->loop_id, fcport->d_id.b.domain,
491	fcport->d_id.b.area, fcport->d_id.b.al_pa);
492
493	rval = qla2x00_start_sp(sp);
494	if (rval != QLA_SUCCESS)
495	goto done_free_sp;
496
497	return rval;
498
499	done_free_sp:
500	/* ref: INIT */
501	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
502	done:
503	fcport->flags &= ~FCF_ASYNC_ACTIVE;
504	return rval;
505	}
506
507	static
508	void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
509	{
510	struct fc_port *fcport = ea->fcport;
511	unsigned long flags;
512
513	ql_dbg(ql_dbg_disc, vha, 0x20d2,
514	fmt: "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
515	__func__, fcport->port_name, fcport->disc_state,
516	fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
517	fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
518
519	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
520	ea->data[0]);
521
522	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
523	ql_dbg(ql_dbg_disc, vha, 0x2066,
524	fmt: "%s %8phC: adisc fail: post delete\n",
525	__func__, ea->fcport->port_name);
526
527	spin_lock_irqsave(&vha->work_lock, flags);
528	/* deleted = 0 & logout_on_delete = force fw cleanup */
529	if (fcport->deleted == QLA_SESS_DELETED)
530	fcport->deleted = 0;
531
532	fcport->logout_on_delete = 1;
533	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
534
535	qlt_schedule_sess_for_deletion(ea->fcport);
536	return;
537	}
538
539	if (ea->fcport->disc_state == DSC_DELETE_PEND)
540	return;
541
542	if (ea->sp->gen2 != ea->fcport->login_gen) {
543	/* target side must have changed it. */
544	ql_dbg(ql_dbg_disc, vha, 0x20d3,
545	fmt: "%s %8phC generation changed\n",
546	__func__, ea->fcport->port_name);
547	return;
548	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
549	qla_rscn_replay(fcport);
550	qlt_schedule_sess_for_deletion(fcport);
551	return;
552	}
553
554	__qla24xx_handle_gpdb_event(vha, ea);
555	}
556
557	static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
558	{
559	struct qla_work_evt *e;
560
561	e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
562	if (!e)
563	return QLA_FUNCTION_FAILED;
564
565	e->u.fcport.fcport = fcport;
566	fcport->flags |= FCF_ASYNC_ACTIVE;
567	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_PEND);
568	return qla2x00_post_work(vha, e);
569	}
570
571	static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
572	{
573	struct scsi_qla_host *vha = sp->vha;
574	struct event_arg ea;
575	struct srb_iocb *lio = &sp->u.iocb_cmd;
576
577	ql_dbg(ql_dbg_disc, vha, 0x2066,
578	fmt: "Async done-%s res %x %8phC\n",
579	sp->name, res, sp->fcport->port_name);
580
581	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
582
583	memset(&ea, 0, sizeof(ea));
584	ea.rc = res;
585	ea.data[0] = lio->u.logio.data[0];
586	ea.data[1] = lio->u.logio.data[1];
587	ea.iop[0] = lio->u.logio.iop[0];
588	ea.iop[1] = lio->u.logio.iop[1];
589	ea.fcport = sp->fcport;
590	ea.sp = sp;
591	if (res)
592	ea.data[0] = MBS_COMMAND_ERROR;
593
594	qla24xx_handle_adisc_event(vha, ea: &ea);
595	/* ref: INIT */
596	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
597	}
598
599	int
600	qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
601	uint16_t *data)
602	{
603	srb_t *sp;
604	struct srb_iocb *lio;
605	int rval = QLA_FUNCTION_FAILED;
606
607	if (IS_SESSION_DELETED(fcport)) {
608	ql_log(ql_log_warn, vha, 0xffff,
609	fmt: "%s: %8phC is being delete - not sending command.\n",
610	__func__, fcport->port_name);
611	fcport->flags &= ~FCF_ASYNC_ACTIVE;
612	return rval;
613	}
614
615	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
616	return rval;
617
618	fcport->flags |= FCF_ASYNC_SENT;
619	/* ref: INIT */
620	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
621	if (!sp)
622	goto done;
623
624	sp->type = SRB_ADISC_CMD;
625	sp->name = "adisc";
626	sp->gen1 = fcport->rscn_gen;
627	sp->gen2 = fcport->login_gen;
628	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
629	done: qla2x00_async_adisc_sp_done);
630
631	if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
632	lio = &sp->u.iocb_cmd;
633	lio->u.logio.flags |= SRB_LOGIN_RETRIED;
634	}
635
636	ql_dbg(ql_dbg_disc, vha, 0x206f,
637	fmt: "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
638	sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
639
640	rval = qla2x00_start_sp(sp);
641	if (rval != QLA_SUCCESS)
642	goto done_free_sp;
643
644	return rval;
645
646	done_free_sp:
647	/* ref: INIT */
648	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
649	done:
650	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
651	qla2x00_post_async_adisc_work(vha, fcport, data);
652	return rval;
653	}
654
655	static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
656	{
657	struct qla_hw_data *ha = vha->hw;
658
659	if (IS_FWI2_CAPABLE(ha))
660	return loop_id > NPH_LAST_HANDLE;
661
662	return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
663	loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
664	}
665
666	/**
667	* qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
668	* @vha: adapter state pointer.
669	* @dev: port structure pointer.
670	*
671	* Returns:
672	* qla2x00 local function return status code.
673	*
674	* Context:
675	* Kernel context.
676	*/
677	static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
678	{
679	int rval;
680	struct qla_hw_data *ha = vha->hw;
681	unsigned long flags = 0;
682
683	rval = QLA_SUCCESS;
684
685	spin_lock_irqsave(&ha->vport_slock, flags);
686
687	dev->loop_id = find_first_zero_bit(addr: ha->loop_id_map, LOOPID_MAP_SIZE);
688	if (dev->loop_id >= LOOPID_MAP_SIZE ||
689	qla2x00_is_reserved_id(vha, loop_id: dev->loop_id)) {
690	dev->loop_id = FC_NO_LOOP_ID;
691	rval = QLA_FUNCTION_FAILED;
692	} else {
693	set_bit(nr: dev->loop_id, addr: ha->loop_id_map);
694	}
695	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
696
697	if (rval == QLA_SUCCESS)
698	ql_dbg(ql_dbg_disc, vha: dev->vha, 0x2086,
699	fmt: "Assigning new loopid=%x, portid=%x.\n",
700	dev->loop_id, dev->d_id.b24);
701	else
702	ql_log(ql_log_warn, vha: dev->vha, 0x2087,
703	fmt: "No loop_id's available, portid=%x.\n",
704	dev->d_id.b24);
705
706	return rval;
707	}
708
709	void qla2x00_clear_loop_id(fc_port_t *fcport)
710	{
711	struct qla_hw_data *ha = fcport->vha->hw;
712
713	if (fcport->loop_id == FC_NO_LOOP_ID ||
714	qla2x00_is_reserved_id(vha: fcport->vha, loop_id: fcport->loop_id))
715	return;
716
717	clear_bit(nr: fcport->loop_id, addr: ha->loop_id_map);
718	fcport->loop_id = FC_NO_LOOP_ID;
719	}
720
721	static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
722	struct event_arg *ea)
723	{
724	fc_port_t *fcport, *conflict_fcport;
725	struct get_name_list_extended *e;
726	u16 i, n, found = 0, loop_id;
727	port_id_t id;
728	u64 wwn;
729	u16 data[2];
730	u8 current_login_state, nvme_cls;
731
732	fcport = ea->fcport;
733	ql_dbg(ql_dbg_disc, vha, 0xffff,
734	fmt: "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
735	__func__, fcport->port_name, fcport->disc_state,
736	fcport->fw_login_state, ea->rc,
737	fcport->login_gen, fcport->last_login_gen,
738	fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
739
740	if (fcport->disc_state == DSC_DELETE_PEND)
741	return;
742
743	if (ea->rc) { /* rval */
744	if (fcport->login_retry == 0) {
745	ql_dbg(ql_dbg_disc, vha, 0x20de,
746	fmt: "GNL failed Port login retry %8phN, retry cnt=%d.\n",
747	fcport->port_name, fcport->login_retry);
748	}
749	return;
750	}
751
752	if (fcport->last_rscn_gen != fcport->rscn_gen) {
753	qla_rscn_replay(fcport);
754	qlt_schedule_sess_for_deletion(fcport);
755	return;
756	} else if (fcport->last_login_gen != fcport->login_gen) {
757	ql_dbg(ql_dbg_disc, vha, 0x20e0,
758	fmt: "%s %8phC login gen changed\n",
759	__func__, fcport->port_name);
760	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
761	return;
762	}
763
764	n = ea->data[0] / sizeof(struct get_name_list_extended);
765
766	ql_dbg(ql_dbg_disc, vha, 0x20e1,
767	fmt: "%s %d %8phC n %d %02x%02x%02x lid %d \n",
768	__func__, __LINE__, fcport->port_name, n,
769	fcport->d_id.b.domain, fcport->d_id.b.area,
770	fcport->d_id.b.al_pa, fcport->loop_id);
771
772	for (i = 0; i < n; i++) {
773	e = &vha->gnl.l[i];
774	wwn = wwn_to_u64(wwn: e->port_name);
775	id.b.domain = e->port_id[2];
776	id.b.area = e->port_id[1];
777	id.b.al_pa = e->port_id[0];
778	id.b.rsvd_1 = 0;
779
780	if (memcmp(p: (u8 *)&wwn, q: fcport->port_name, WWN_SIZE))
781	continue;
782
783	if (IS_SW_RESV_ADDR(id))
784	continue;
785
786	found = 1;
787
788	loop_id = le16_to_cpu(e->nport_handle);
789	loop_id = (loop_id & 0x7fff);
790	nvme_cls = e->current_login_state >> 4;
791	current_login_state = e->current_login_state & 0xf;
792
793	if (PRLI_PHASE(nvme_cls)) {
794	current_login_state = nvme_cls;
795	fcport->fc4_type &= ~FS_FC4TYPE_FCP;
796	fcport->fc4_type |= FS_FC4TYPE_NVME;
797	} else if (PRLI_PHASE(current_login_state)) {
798	fcport->fc4_type |= FS_FC4TYPE_FCP;
799	fcport->fc4_type &= ~FS_FC4TYPE_NVME;
800	}
801
802	ql_dbg(ql_dbg_disc, vha, 0x20e2,
803	fmt: "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
804	__func__, fcport->port_name,
805	e->current_login_state, fcport->fw_login_state,
806	fcport->fc4_type, id.b24, fcport->d_id.b24,
807	loop_id, fcport->loop_id);
808
809	switch (fcport->disc_state) {
810	case DSC_DELETE_PEND:
811	case DSC_DELETED:
812	break;
813	default:
814	if ((id.b24 != fcport->d_id.b24 &&
815	fcport->d_id.b24 &&
816	fcport->loop_id != FC_NO_LOOP_ID) ||
817	(fcport->loop_id != FC_NO_LOOP_ID &&
818	fcport->loop_id != loop_id)) {
819	ql_dbg(ql_dbg_disc, vha, 0x20e3,
820	fmt: "%s %d %8phC post del sess\n",
821	__func__, __LINE__, fcport->port_name);
822	if (fcport->n2n_flag)
823	fcport->d_id.b24 = 0;
824	qlt_schedule_sess_for_deletion(fcport);
825	return;
826	}
827	break;
828	}
829
830	fcport->loop_id = loop_id;
831	if (fcport->n2n_flag)
832	fcport->d_id.b24 = id.b24;
833
834	wwn = wwn_to_u64(wwn: fcport->port_name);
835	qlt_find_sess_invalidate_other(vha, wwn,
836	port_id: id, loop_id, &conflict_fcport);
837
838	if (conflict_fcport) {
839	/*
840	* Another share fcport share the same loop_id &
841	* nport id. Conflict fcport needs to finish
842	* cleanup before this fcport can proceed to login.
843	*/
844	conflict_fcport->conflict = fcport;
845	fcport->login_pause = 1;
846	}
847
848	switch (vha->hw->current_topology) {
849	default:
850	switch (current_login_state) {
851	case DSC_LS_PRLI_COMP:
852	ql_dbg(ql_dbg_disc,
853	vha, 0x20e4, fmt: "%s %d %8phC post gpdb\n",
854	__func__, __LINE__, fcport->port_name);
855
856	if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
857	fcport->port_type = FCT_INITIATOR;
858	else
859	fcport->port_type = FCT_TARGET;
860	data[0] = data[1] = 0;
861	qla2x00_post_async_adisc_work(vha, fcport,
862	data);
863	break;
864	case DSC_LS_PLOGI_COMP:
865	if (vha->hw->flags.edif_enabled) {
866	/* check to see if App support Secure */
867	qla24xx_post_gpdb_work(vha, fcport, 0);
868	break;
869	}
870	fallthrough;
871	case DSC_LS_PORT_UNAVAIL:
872	default:
873	if (fcport->loop_id == FC_NO_LOOP_ID) {
874	qla2x00_find_new_loop_id(vha, dev: fcport);
875	fcport->fw_login_state =
876	DSC_LS_PORT_UNAVAIL;
877	}
878	ql_dbg(ql_dbg_disc, vha, 0x20e5,
879	fmt: "%s %d %8phC\n", __func__, __LINE__,
880	fcport->port_name);
881	qla24xx_fcport_handle_login(vha, fcport);
882	break;
883	}
884	break;
885	case ISP_CFG_N:
886	fcport->fw_login_state = current_login_state;
887	fcport->d_id = id;
888	switch (current_login_state) {
889	case DSC_LS_PRLI_PEND:
890	/*
891	* In the middle of PRLI. Let it finish.
892	* Allow relogin code to recheck state again
893	* with GNL. Push disc_state back to DELETED
894	* so GNL can go out again
895	*/
896	qla2x00_set_fcport_disc_state(fcport,
897	state: DSC_DELETED);
898	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
899	break;
900	case DSC_LS_PRLI_COMP:
901	if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
902	fcport->port_type = FCT_INITIATOR;
903	else
904	fcport->port_type = FCT_TARGET;
905
906	data[0] = data[1] = 0;
907	qla2x00_post_async_adisc_work(vha, fcport,
908	data);
909	break;
910	case DSC_LS_PLOGI_COMP:
911	if (vha->hw->flags.edif_enabled &&
912	DBELL_ACTIVE(vha)) {
913	/* check to see if App support secure or not */
914	qla24xx_post_gpdb_work(vha, fcport, 0);
915	break;
916	}
917	if (fcport_is_bigger(fcport)) {
918	/* local adapter is smaller */
919	if (fcport->loop_id != FC_NO_LOOP_ID)
920	qla2x00_clear_loop_id(fcport);
921
922	fcport->loop_id = loop_id;
923	qla24xx_fcport_handle_login(vha,
924	fcport);
925	break;
926	}
927	fallthrough;
928	default:
929	if (fcport_is_smaller(fcport)) {
930	/* local adapter is bigger */
931	if (fcport->loop_id != FC_NO_LOOP_ID)
932	qla2x00_clear_loop_id(fcport);
933
934	fcport->loop_id = loop_id;
935	qla24xx_fcport_handle_login(vha,
936	fcport);
937	}
938	break;
939	}
940	break;
941	} /* switch (ha->current_topology) */
942	}
943
944	if (!found) {
945	switch (vha->hw->current_topology) {
946	case ISP_CFG_F:
947	case ISP_CFG_FL:
948	for (i = 0; i < n; i++) {
949	e = &vha->gnl.l[i];
950	id.b.domain = e->port_id[0];
951	id.b.area = e->port_id[1];
952	id.b.al_pa = e->port_id[2];
953	id.b.rsvd_1 = 0;
954	loop_id = le16_to_cpu(e->nport_handle);
955
956	if (fcport->d_id.b24 == id.b24) {
957	conflict_fcport =
958	qla2x00_find_fcport_by_wwpn(vha,
959	e->port_name, 0);
960	if (conflict_fcport) {
961	ql_dbg(ql_dbg_disc + ql_dbg_verbose,
962	vha, 0x20e5,
963	fmt: "%s %d %8phC post del sess\n",
964	__func__, __LINE__,
965	conflict_fcport->port_name);
966	qlt_schedule_sess_for_deletion
967	(conflict_fcport);
968	}
969	}
970	/*
971	* FW already picked this loop id for
972	* another fcport
973	*/
974	if (fcport->loop_id == loop_id)
975	fcport->loop_id = FC_NO_LOOP_ID;
976	}
977	qla24xx_fcport_handle_login(vha, fcport);
978	break;
979	case ISP_CFG_N:
980	qla2x00_set_fcport_disc_state(fcport, state: DSC_DELETED);
981	if (time_after_eq(jiffies, fcport->dm_login_expire)) {
982	if (fcport->n2n_link_reset_cnt < 2) {
983	fcport->n2n_link_reset_cnt++;
984	/*
985	* remote port is not sending PLOGI.
986	* Reset link to kick start his state
987	* machine
988	*/
989	set_bit(N2N_LINK_RESET,
990	addr: &vha->dpc_flags);
991	} else {
992	if (fcport->n2n_chip_reset < 1) {
993	ql_log(ql_log_info, vha, 0x705d,
994	fmt: "Chip reset to bring laser down");
995	set_bit(ISP_ABORT_NEEDED,
996	addr: &vha->dpc_flags);
997	fcport->n2n_chip_reset++;
998	} else {
999	ql_log(ql_log_info, vha, 0x705d,
1000	fmt: "Remote port %8ph is not coming back\n",
1001	fcport->port_name);
1002	fcport->scan_state = 0;
1003	}
1004	}
1005	qla2xxx_wake_dpc(vha);
1006	} else {
1007	/*
1008	* report port suppose to do PLOGI. Give him
1009	* more time. FW will catch it.
1010	*/
1011	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1012	}
1013	break;
1014	case ISP_CFG_NL:
1015	qla24xx_fcport_handle_login(vha, fcport);
1016	break;
1017	default:
1018	break;
1019	}
1020	}
1021	} /* gnl_event */
1022
1023	static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
1024	{
1025	struct scsi_qla_host *vha = sp->vha;
1026	unsigned long flags;
1027	struct fc_port *fcport = NULL, *tf;
1028	u16 i, n = 0, loop_id;
1029	struct event_arg ea;
1030	struct get_name_list_extended *e;
1031	u64 wwn;
1032	struct list_head h;
1033	bool found = false;
1034
1035	ql_dbg(ql_dbg_disc, vha, 0x20e7,
1036	fmt: "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
1037	sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
1038	sp->u.iocb_cmd.u.mbx.in_mb[2]);
1039
1040
1041	sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
1042	memset(&ea, 0, sizeof(ea));
1043	ea.sp = sp;
1044	ea.rc = res;
1045
1046	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
1047	sizeof(struct get_name_list_extended)) {
1048	n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1049	sizeof(struct get_name_list_extended);
1050	ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1051	}
1052
1053	for (i = 0; i < n; i++) {
1054	e = &vha->gnl.l[i];
1055	loop_id = le16_to_cpu(e->nport_handle);
1056	/* mask out reserve bit */
1057	loop_id = (loop_id & 0x7fff);
1058	set_bit(nr: loop_id, addr: vha->hw->loop_id_map);
1059	wwn = wwn_to_u64(wwn: e->port_name);
1060
1061	ql_dbg(ql_dbg_disc, vha, 0x20e8,
1062	fmt: "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1063	__func__, &wwn, e->port_id[2], e->port_id[1],
1064	e->port_id[0], e->current_login_state, e->last_login_state,
1065	(loop_id & 0x7fff));
1066	}
1067
1068	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1069
1070	INIT_LIST_HEAD(list: &h);
1071	fcport = tf = NULL;
1072	if (!list_empty(head: &vha->gnl.fcports))
1073	list_splice_init(list: &vha->gnl.fcports, head: &h);
1074	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1075
1076	list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1077	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1078	list_del_init(entry: &fcport->gnl_entry);
1079	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1080	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1081	ea.fcport = fcport;
1082
1083	qla24xx_handle_gnl_done_event(vha, ea: &ea);
1084	}
1085
1086	/* create new fcport if fw has knowledge of new sessions */
1087	for (i = 0; i < n; i++) {
1088	port_id_t id;
1089	u64 wwnn;
1090
1091	e = &vha->gnl.l[i];
1092	wwn = wwn_to_u64(wwn: e->port_name);
1093
1094	found = false;
1095	list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1096	if (!memcmp(p: (u8 *)&wwn, q: fcport->port_name,
1097	WWN_SIZE)) {
1098	found = true;
1099	break;
1100	}
1101	}
1102
1103	id.b.domain = e->port_id[2];
1104	id.b.area = e->port_id[1];
1105	id.b.al_pa = e->port_id[0];
1106	id.b.rsvd_1 = 0;
1107
1108	if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1109	ql_dbg(ql_dbg_disc, vha, 0x2065,
1110	fmt: "%s %d %8phC %06x post new sess\n",
1111	__func__, __LINE__, (u8 *)&wwn, id.b24);
1112	wwnn = wwn_to_u64(wwn: e->node_name);
1113	qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1114	(u8 *)&wwnn, NULL, 0);
1115	}
1116	}
1117
1118	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1119	vha->gnl.sent = 0;
1120	if (!list_empty(head: &vha->gnl.fcports)) {
1121	/* retrigger gnl */
1122	list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1123	gnl_entry) {
1124	list_del_init(entry: &fcport->gnl_entry);
1125	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1126	if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1127	break;
1128	}
1129	}
1130	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1131
1132	/* ref: INIT */
1133	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1134	}
1135
1136	int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1137	{
1138	srb_t *sp;
1139	int rval = QLA_FUNCTION_FAILED;
1140	unsigned long flags;
1141	u16 *mb;
1142
1143	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1144	goto done;
1145
1146	ql_dbg(ql_dbg_disc, vha, 0x20d9,
1147	fmt: "Async-gnlist WWPN %8phC \n", fcport->port_name);
1148
1149	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1150	fcport->flags |= FCF_ASYNC_SENT;
1151	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
1152	fcport->last_rscn_gen = fcport->rscn_gen;
1153	fcport->last_login_gen = fcport->login_gen;
1154
1155	list_add_tail(new: &fcport->gnl_entry, head: &vha->gnl.fcports);
1156	if (vha->gnl.sent) {
1157	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1158	return QLA_SUCCESS;
1159	}
1160	vha->gnl.sent = 1;
1161	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1162
1163	/* ref: INIT */
1164	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1165	if (!sp)
1166	goto done;
1167
1168	sp->type = SRB_MB_IOCB;
1169	sp->name = "gnlist";
1170	sp->gen1 = fcport->rscn_gen;
1171	sp->gen2 = fcport->login_gen;
1172	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1173	done: qla24xx_async_gnl_sp_done);
1174
1175	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1176	mb[0] = MBC_PORT_NODE_NAME_LIST;
1177	mb[1] = BIT_2 | BIT_3;
1178	mb[2] = MSW(vha->gnl.ldma);
1179	mb[3] = LSW(vha->gnl.ldma);
1180	mb[6] = MSW(MSD(vha->gnl.ldma));
1181	mb[7] = LSW(MSD(vha->gnl.ldma));
1182	mb[8] = vha->gnl.size;
1183	mb[9] = vha->vp_idx;
1184
1185	ql_dbg(ql_dbg_disc, vha, 0x20da,
1186	fmt: "Async-%s - OUT WWPN %8phC hndl %x\n",
1187	sp->name, fcport->port_name, sp->handle);
1188
1189	rval = qla2x00_start_sp(sp);
1190	if (rval != QLA_SUCCESS)
1191	goto done_free_sp;
1192
1193	return rval;
1194
1195	done_free_sp:
1196	/*
1197	* use qla24xx_async_gnl_sp_done to purge all pending gnl request.
1198	* kref_put is call behind the scene.
1199	*/
1200	sp->u.iocb_cmd.u.mbx.in_mb[0] = MBS_COMMAND_ERROR;
1201	qla24xx_async_gnl_sp_done(sp, QLA_COMMAND_ERROR);
1202	fcport->flags &= ~(FCF_ASYNC_SENT);
1203	done:
1204	fcport->flags &= ~(FCF_ASYNC_ACTIVE);
1205	return rval;
1206	}
1207
1208	int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1209	{
1210	struct qla_work_evt *e;
1211
1212	e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1213	if (!e)
1214	return QLA_FUNCTION_FAILED;
1215
1216	e->u.fcport.fcport = fcport;
1217	fcport->flags |= FCF_ASYNC_ACTIVE;
1218	return qla2x00_post_work(vha, e);
1219	}
1220
1221	static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1222	{
1223	struct scsi_qla_host *vha = sp->vha;
1224	struct qla_hw_data *ha = vha->hw;
1225	fc_port_t *fcport = sp->fcport;
1226	u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1227	struct event_arg ea;
1228
1229	ql_dbg(ql_dbg_disc, vha, 0x20db,
1230	fmt: "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1231	sp->name, res, fcport->port_name, mb[1], mb[2]);
1232
1233	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1234
1235	if (res == QLA_FUNCTION_TIMEOUT)
1236	goto done;
1237
1238	memset(&ea, 0, sizeof(ea));
1239	ea.fcport = fcport;
1240	ea.sp = sp;
1241
1242	qla24xx_handle_gpdb_event(vha, ea: &ea);
1243
1244	done:
1245	dma_pool_free(pool: ha->s_dma_pool, vaddr: sp->u.iocb_cmd.u.mbx.in,
1246	addr: sp->u.iocb_cmd.u.mbx.in_dma);
1247
1248	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1249	}
1250
1251	int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1252	{
1253	struct qla_work_evt *e;
1254
1255	if (vha->host->active_mode == MODE_TARGET)
1256	return QLA_FUNCTION_FAILED;
1257
1258	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1259	if (!e)
1260	return QLA_FUNCTION_FAILED;
1261
1262	e->u.fcport.fcport = fcport;
1263
1264	return qla2x00_post_work(vha, e);
1265	}
1266
1267	static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1268	{
1269	struct scsi_qla_host *vha = sp->vha;
1270	struct srb_iocb *lio = &sp->u.iocb_cmd;
1271	struct event_arg ea;
1272
1273	ql_dbg(ql_dbg_disc, vha, 0x2129,
1274	fmt: "%s %8phC res %x\n", __func__,
1275	sp->fcport->port_name, res);
1276
1277	sp->fcport->flags &= ~FCF_ASYNC_SENT;
1278
1279	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1280	memset(&ea, 0, sizeof(ea));
1281	ea.fcport = sp->fcport;
1282	ea.data[0] = lio->u.logio.data[0];
1283	ea.data[1] = lio->u.logio.data[1];
1284	ea.iop[0] = lio->u.logio.iop[0];
1285	ea.iop[1] = lio->u.logio.iop[1];
1286	ea.sp = sp;
1287	if (res == QLA_OS_TIMER_EXPIRED)
1288	ea.data[0] = QLA_OS_TIMER_EXPIRED;
1289	else if (res)
1290	ea.data[0] = MBS_COMMAND_ERROR;
1291
1292	qla24xx_handle_prli_done_event(vha, &ea);
1293	}
1294
1295	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1296	}
1297
1298	int
1299	qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1300	{
1301	srb_t *sp;
1302	struct srb_iocb *lio;
1303	int rval = QLA_FUNCTION_FAILED;
1304
1305	if (!vha->flags.online) {
1306	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s %d %8phC exit\n",
1307	__func__, __LINE__, fcport->port_name);
1308	return rval;
1309	}
1310
1311	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1312	fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1313	qla_dual_mode_enabled(ha: vha)) {
1314	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s %d %8phC exit\n",
1315	__func__, __LINE__, fcport->port_name);
1316	return rval;
1317	}
1318
1319	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1320	if (!sp)
1321	return rval;
1322
1323	fcport->flags |= FCF_ASYNC_SENT;
1324	fcport->logout_completed = 0;
1325
1326	sp->type = SRB_PRLI_CMD;
1327	sp->name = "prli";
1328	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1329	done: qla2x00_async_prli_sp_done);
1330
1331	lio = &sp->u.iocb_cmd;
1332	lio->u.logio.flags = 0;
1333
1334	if (NVME_TARGET(vha->hw, fcport))
1335	lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1336
1337	ql_dbg(ql_dbg_disc, vha, 0x211b,
1338	fmt: "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1339	fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1340	fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1341	NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1342
1343	rval = qla2x00_start_sp(sp);
1344	if (rval != QLA_SUCCESS) {
1345	fcport->flags |= FCF_LOGIN_NEEDED;
1346	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1347	goto done_free_sp;
1348	}
1349
1350	return rval;
1351
1352	done_free_sp:
1353	/* ref: INIT */
1354	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1355	fcport->flags &= ~FCF_ASYNC_SENT;
1356	return rval;
1357	}
1358
1359	int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1360	{
1361	struct qla_work_evt *e;
1362
1363	e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1364	if (!e)
1365	return QLA_FUNCTION_FAILED;
1366
1367	e->u.fcport.fcport = fcport;
1368	e->u.fcport.opt = opt;
1369	fcport->flags |= FCF_ASYNC_ACTIVE;
1370	return qla2x00_post_work(vha, e);
1371	}
1372
1373	int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1374	{
1375	srb_t *sp;
1376	struct srb_iocb *mbx;
1377	int rval = QLA_FUNCTION_FAILED;
1378	u16 *mb;
1379	dma_addr_t pd_dma;
1380	struct port_database_24xx *pd;
1381	struct qla_hw_data *ha = vha->hw;
1382
1383	if (IS_SESSION_DELETED(fcport)) {
1384	ql_log(ql_log_warn, vha, 0xffff,
1385	fmt: "%s: %8phC is being delete - not sending command.\n",
1386	__func__, fcport->port_name);
1387	fcport->flags &= ~FCF_ASYNC_ACTIVE;
1388	return rval;
1389	}
1390
1391	if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1392	ql_log(ql_log_warn, vha, 0xffff,
1393	fmt: "%s: %8phC online %d flags %x - not sending command.\n",
1394	__func__, fcport->port_name, vha->flags.online, fcport->flags);
1395	goto done;
1396	}
1397
1398	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1399	if (!sp)
1400	goto done;
1401
1402	qla2x00_set_fcport_disc_state(fcport, state: DSC_GPDB);
1403
1404	fcport->flags |= FCF_ASYNC_SENT;
1405	sp->type = SRB_MB_IOCB;
1406	sp->name = "gpdb";
1407	sp->gen1 = fcport->rscn_gen;
1408	sp->gen2 = fcport->login_gen;
1409	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1410	done: qla24xx_async_gpdb_sp_done);
1411
1412	pd = dma_pool_zalloc(pool: ha->s_dma_pool, GFP_KERNEL, handle: &pd_dma);
1413	if (pd == NULL) {
1414	ql_log(ql_log_warn, vha, 0xd043,
1415	fmt: "Failed to allocate port database structure.\n");
1416	goto done_free_sp;
1417	}
1418
1419	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1420	mb[0] = MBC_GET_PORT_DATABASE;
1421	mb[1] = fcport->loop_id;
1422	mb[2] = MSW(pd_dma);
1423	mb[3] = LSW(pd_dma);
1424	mb[6] = MSW(MSD(pd_dma));
1425	mb[7] = LSW(MSD(pd_dma));
1426	mb[9] = vha->vp_idx;
1427	mb[10] = opt;
1428
1429	mbx = &sp->u.iocb_cmd;
1430	mbx->u.mbx.in = (void *)pd;
1431	mbx->u.mbx.in_dma = pd_dma;
1432
1433	ql_dbg(ql_dbg_disc, vha, 0x20dc,
1434	fmt: "Async-%s %8phC hndl %x opt %x\n",
1435	sp->name, fcport->port_name, sp->handle, opt);
1436
1437	rval = qla2x00_start_sp(sp);
1438	if (rval != QLA_SUCCESS)
1439	goto done_free_sp;
1440	return rval;
1441
1442	done_free_sp:
1443	if (pd)
1444	dma_pool_free(pool: ha->s_dma_pool, vaddr: pd, addr: pd_dma);
1445
1446	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1447	fcport->flags &= ~FCF_ASYNC_SENT;
1448	done:
1449	fcport->flags &= ~FCF_ASYNC_ACTIVE;
1450	qla24xx_post_gpdb_work(vha, fcport, opt);
1451	return rval;
1452	}
1453
1454	static
1455	void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1456	{
1457	unsigned long flags;
1458
1459	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1460	ea->fcport->login_gen++;
1461	ea->fcport->logout_on_delete = 1;
1462
1463	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1464	vha->fcport_count++;
1465	ea->fcport->login_succ = 1;
1466
1467	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1468	qla24xx_sched_upd_fcport(ea->fcport);
1469	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1470	} else if (ea->fcport->login_succ) {
1471	/*
1472	* We have an existing session. A late RSCN delivery
1473	* must have triggered the session to be re-validate.
1474	* Session is still valid.
1475	*/
1476	ql_dbg(ql_dbg_disc, vha, 0x20d6,
1477	fmt: "%s %d %8phC session revalidate success\n",
1478	__func__, __LINE__, ea->fcport->port_name);
1479	qla2x00_set_fcport_disc_state(fcport: ea->fcport, state: DSC_LOGIN_COMPLETE);
1480	}
1481	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1482	}
1483
1484	static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1485	struct port_database_24xx *pd)
1486	{
1487	int rc = 0;
1488
1489	if (pd->secure_login) {
1490	ql_dbg(ql_dbg_disc, vha, 0x104d,
1491	fmt: "Secure Login established on %8phC\n",
1492	fcport->port_name);
1493	fcport->flags |= FCF_FCSP_DEVICE;
1494	} else {
1495	ql_dbg(ql_dbg_disc, vha, 0x104d,
1496	fmt: "non-Secure Login %8phC",
1497	fcport->port_name);
1498	fcport->flags &= ~FCF_FCSP_DEVICE;
1499	}
1500	if (vha->hw->flags.edif_enabled) {
1501	if (fcport->flags & FCF_FCSP_DEVICE) {
1502	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_AUTH_PEND);
1503	/* Start edif prli timer & ring doorbell for app */
1504	fcport->edif.rx_sa_set = 0;
1505	fcport->edif.tx_sa_set = 0;
1506	fcport->edif.rx_sa_pending = 0;
1507	fcport->edif.tx_sa_pending = 0;
1508
1509	qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1510	fcport->d_id.b24);
1511
1512	if (DBELL_ACTIVE(vha)) {
1513	ql_dbg(ql_dbg_disc, vha, 0x20ef,
1514	fmt: "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1515	__func__, __LINE__, fcport->port_name);
1516	fcport->edif.app_sess_online = 1;
1517
1518	qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1519	data: fcport->d_id.b24, data2: 0, fcport);
1520	}
1521
1522	rc = 1;
1523	} else if (qla_ini_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha)) {
1524	ql_dbg(ql_dbg_disc, vha, 0x2117,
1525	fmt: "%s %d %8phC post prli\n",
1526	__func__, __LINE__, fcport->port_name);
1527	qla24xx_post_prli_work(vha, fcport);
1528	rc = 1;
1529	}
1530	}
1531	return rc;
1532	}
1533
1534	static
1535	void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1536	{
1537	fc_port_t *fcport = ea->fcport;
1538	struct port_database_24xx *pd;
1539	struct srb *sp = ea->sp;
1540	uint8_t ls;
1541
1542	pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1543
1544	fcport->flags &= ~FCF_ASYNC_SENT;
1545
1546	ql_dbg(ql_dbg_disc, vha, 0x20d2,
1547	fmt: "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1548	fcport->port_name, fcport->disc_state, pd->current_login_state,
1549	fcport->fc4_type, ea->rc);
1550
1551	if (fcport->disc_state == DSC_DELETE_PEND) {
1552	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC\n",
1553	__func__, __LINE__, fcport->port_name);
1554	return;
1555	}
1556
1557	if (NVME_TARGET(vha->hw, fcport))
1558	ls = pd->current_login_state >> 4;
1559	else
1560	ls = pd->current_login_state & 0xf;
1561
1562	if (ea->sp->gen2 != fcport->login_gen) {
1563	/* target side must have changed it. */
1564
1565	ql_dbg(ql_dbg_disc, vha, 0x20d3,
1566	fmt: "%s %8phC generation changed\n",
1567	__func__, fcport->port_name);
1568	return;
1569	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1570	qla_rscn_replay(fcport);
1571	qlt_schedule_sess_for_deletion(fcport);
1572	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1573	__func__, __LINE__, fcport->port_name, ls);
1574	return;
1575	}
1576
1577	switch (ls) {
1578	case PDS_PRLI_COMPLETE:
1579	__qla24xx_parse_gpdb(vha, fcport, pd);
1580	break;
1581	case PDS_PLOGI_COMPLETE:
1582	if (qla_chk_secure_login(vha, fcport, pd)) {
1583	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1584	__func__, __LINE__, fcport->port_name, ls);
1585	return;
1586	}
1587	fallthrough;
1588	case PDS_PLOGI_PENDING:
1589	case PDS_PRLI_PENDING:
1590	case PDS_PRLI2_PENDING:
1591	/* Set discovery state back to GNL to Relogin attempt */
1592	if (qla_dual_mode_enabled(ha: vha) ||
1593	qla_ini_mode_enabled(ha: vha)) {
1594	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
1595	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1596	}
1597	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1598	__func__, __LINE__, fcport->port_name, ls);
1599	return;
1600	case PDS_LOGO_PENDING:
1601	case PDS_PORT_UNAVAILABLE:
1602	default:
1603	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC post del sess\n",
1604	__func__, __LINE__, fcport->port_name);
1605	qlt_schedule_sess_for_deletion(fcport);
1606	return;
1607	}
1608	__qla24xx_handle_gpdb_event(vha, ea);
1609	} /* gpdb event */
1610
1611	static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1612	{
1613	u8 login = 0;
1614	int rc;
1615
1616	ql_dbg(ql_dbg_disc, vha, 0x307b,
1617	fmt: "%s %8phC DS %d LS %d lid %d retries=%d\n",
1618	__func__, fcport->port_name, fcport->disc_state,
1619	fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1620
1621	if (qla_tgt_mode_enabled(ha: vha))
1622	return;
1623
1624	if (qla_dual_mode_enabled(ha: vha)) {
1625	if (N2N_TOPO(vha->hw)) {
1626	u64 mywwn, wwn;
1627
1628	mywwn = wwn_to_u64(wwn: vha->port_name);
1629	wwn = wwn_to_u64(wwn: fcport->port_name);
1630	if (mywwn > wwn)
1631	login = 1;
1632	else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1633	&& time_after_eq(jiffies,
1634	fcport->plogi_nack_done_deadline))
1635	login = 1;
1636	} else {
1637	login = 1;
1638	}
1639	} else {
1640	/* initiator mode */
1641	login = 1;
1642	}
1643
1644	if (login && fcport->login_retry) {
1645	fcport->login_retry--;
1646	if (fcport->loop_id == FC_NO_LOOP_ID) {
1647	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1648	rc = qla2x00_find_new_loop_id(vha, dev: fcport);
1649	if (rc) {
1650	ql_dbg(ql_dbg_disc, vha, 0x20e6,
1651	fmt: "%s %d %8phC post del sess - out of loopid\n",
1652	__func__, __LINE__, fcport->port_name);
1653	fcport->scan_state = 0;
1654	qlt_schedule_sess_for_deletion(fcport);
1655	return;
1656	}
1657	}
1658	ql_dbg(ql_dbg_disc, vha, 0x20bf,
1659	fmt: "%s %d %8phC post login\n",
1660	__func__, __LINE__, fcport->port_name);
1661	qla2x00_post_async_login_work(vha, fcport, NULL);
1662	}
1663	}
1664
1665	int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1666	{
1667	u16 data[2];
1668	u16 sec;
1669
1670	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1671	fmt: "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1672	__func__, fcport->port_name, fcport->disc_state,
1673	fcport->fw_login_state, fcport->login_pause, fcport->flags,
1674	fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1675	fcport->login_gen, fcport->loop_id, fcport->scan_state,
1676	fcport->fc4_type);
1677
1678	if (fcport->scan_state != QLA_FCPORT_FOUND ||
1679	fcport->disc_state == DSC_DELETE_PEND)
1680	return 0;
1681
1682	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1683	qla_dual_mode_enabled(ha: vha) &&
1684	((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1685	(fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1686	return 0;
1687
1688	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1689	!N2N_TOPO(vha->hw)) {
1690	if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1691	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1692	return 0;
1693	}
1694	}
1695
1696	/* Target won't initiate port login if fabric is present */
1697	if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1698	return 0;
1699
1700	if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1701	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1702	return 0;
1703	}
1704
1705	switch (fcport->disc_state) {
1706	case DSC_DELETED:
1707	switch (vha->hw->current_topology) {
1708	case ISP_CFG_N:
1709	if (fcport_is_smaller(fcport)) {
1710	/* this adapter is bigger */
1711	if (fcport->login_retry) {
1712	if (fcport->loop_id == FC_NO_LOOP_ID) {
1713	qla2x00_find_new_loop_id(vha,
1714	dev: fcport);
1715	fcport->fw_login_state =
1716	DSC_LS_PORT_UNAVAIL;
1717	}
1718	fcport->login_retry--;
1719	qla_post_els_plogi_work(vha, fcport);
1720	} else {
1721	ql_log(ql_log_info, vha, 0x705d,
1722	fmt: "Unable to reach remote port %8phC",
1723	fcport->port_name);
1724	}
1725	} else {
1726	qla24xx_post_gnl_work(vha, fcport);
1727	}
1728	break;
1729	default:
1730	if (fcport->loop_id == FC_NO_LOOP_ID) {
1731	ql_dbg(ql_dbg_disc, vha, 0x20bd,
1732	fmt: "%s %d %8phC post gnl\n",
1733	__func__, __LINE__, fcport->port_name);
1734	qla24xx_post_gnl_work(vha, fcport);
1735	} else {
1736	qla_chk_n2n_b4_login(vha, fcport);
1737	}
1738	break;
1739	}
1740	break;
1741
1742	case DSC_GNL:
1743	switch (vha->hw->current_topology) {
1744	case ISP_CFG_N:
1745	if ((fcport->current_login_state & 0xf) == 0x6) {
1746	ql_dbg(ql_dbg_disc, vha, 0x2118,
1747	fmt: "%s %d %8phC post GPDB work\n",
1748	__func__, __LINE__, fcport->port_name);
1749	fcport->chip_reset =
1750	vha->hw->base_qpair->chip_reset;
1751	qla24xx_post_gpdb_work(vha, fcport, opt: 0);
1752	} else {
1753	ql_dbg(ql_dbg_disc, vha, 0x2118,
1754	fmt: "%s %d %8phC post %s PRLI\n",
1755	__func__, __LINE__, fcport->port_name,
1756	NVME_TARGET(vha->hw, fcport) ? "NVME" :
1757	"FC");
1758	qla24xx_post_prli_work(vha, fcport);
1759	}
1760	break;
1761	default:
1762	if (fcport->login_pause) {
1763	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1764	fmt: "%s %d %8phC exit\n",
1765	__func__, __LINE__,
1766	fcport->port_name);
1767	fcport->last_rscn_gen = fcport->rscn_gen;
1768	fcport->last_login_gen = fcport->login_gen;
1769	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1770	break;
1771	}
1772	qla_chk_n2n_b4_login(vha, fcport);
1773	break;
1774	}
1775	break;
1776
1777	case DSC_LOGIN_FAILED:
1778	if (N2N_TOPO(vha->hw))
1779	qla_chk_n2n_b4_login(vha, fcport);
1780	else
1781	qlt_schedule_sess_for_deletion(fcport);
1782	break;
1783
1784	case DSC_LOGIN_COMPLETE:
1785	/* recheck login state */
1786	data[0] = data[1] = 0;
1787	qla2x00_post_async_adisc_work(vha, fcport, data);
1788	break;
1789
1790	case DSC_LOGIN_PEND:
1791	if (vha->hw->flags.edif_enabled)
1792	break;
1793
1794	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1795	ql_dbg(ql_dbg_disc, vha, 0x2118,
1796	fmt: "%s %d %8phC post %s PRLI\n",
1797	__func__, __LINE__, fcport->port_name,
1798	NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
1799	qla24xx_post_prli_work(vha, fcport);
1800	}
1801	break;
1802
1803	case DSC_UPD_FCPORT:
1804	sec = jiffies_to_msecs(j: jiffies -
1805	fcport->jiffies_at_registration)/1000;
1806	if (fcport->sec_since_registration < sec && sec &&
1807	!(sec % 60)) {
1808	fcport->sec_since_registration = sec;
1809	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0xffff,
1810	fmt: "%s %8phC - Slow Rport registration(%d Sec)\n",
1811	__func__, fcport->port_name, sec);
1812	}
1813
1814	if (fcport->next_disc_state != DSC_DELETE_PEND)
1815	fcport->next_disc_state = DSC_ADISC;
1816	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1817	break;
1818
1819	default:
1820	break;
1821	}
1822
1823	return 0;
1824	}
1825
1826	int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1827	u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1828	{
1829	struct qla_work_evt *e;
1830
1831	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1832	if (!e)
1833	return QLA_FUNCTION_FAILED;
1834
1835	e->u.new_sess.id = *id;
1836	e->u.new_sess.pla = pla;
1837	e->u.new_sess.fc4_type = fc4_type;
1838	memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1839	if (node_name)
1840	memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1841
1842	return qla2x00_post_work(vha, e);
1843	}
1844
1845	void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1846	{
1847	fc_port_t *fcport;
1848	unsigned long flags;
1849
1850	switch (ea->id.b.rsvd_1) {
1851	case RSCN_PORT_ADDR:
1852	fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1853	if (fcport) {
1854	if (ql2xfc2target &&
1855	fcport->flags & FCF_FCP2_DEVICE &&
1856	atomic_read(v: &fcport->state) == FCS_ONLINE) {
1857	ql_dbg(ql_dbg_disc, vha, 0x2115,
1858	fmt: "Delaying session delete for FCP2 portid=%06x %8phC ",
1859	fcport->d_id.b24, fcport->port_name);
1860	return;
1861	}
1862
1863	if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
1864	/*
1865	* On ipsec start by remote port, Target port
1866	* may use RSCN to trigger initiator to
1867	* relogin. If driver is already in the
1868	* process of a relogin, then ignore the RSCN
1869	* and allow the current relogin to continue.
1870	* This reduces thrashing of the connection.
1871	*/
1872	if (atomic_read(v: &fcport->state) == FCS_ONLINE) {
1873	/*
1874	* If state = online, then set scan_needed=1 to do relogin.
1875	* Otherwise we're already in the middle of a relogin
1876	*/
1877	fcport->scan_needed = 1;
1878	fcport->rscn_gen++;
1879	}
1880	} else {
1881	fcport->scan_needed = 1;
1882	fcport->rscn_gen++;
1883	}
1884	}
1885	break;
1886	case RSCN_AREA_ADDR:
1887	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1888	if (fcport->flags & FCF_FCP2_DEVICE &&
1889	atomic_read(v: &fcport->state) == FCS_ONLINE)
1890	continue;
1891
1892	if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1893	fcport->scan_needed = 1;
1894	fcport->rscn_gen++;
1895	}
1896	}
1897	break;
1898	case RSCN_DOM_ADDR:
1899	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1900	if (fcport->flags & FCF_FCP2_DEVICE &&
1901	atomic_read(v: &fcport->state) == FCS_ONLINE)
1902	continue;
1903
1904	if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1905	fcport->scan_needed = 1;
1906	fcport->rscn_gen++;
1907	}
1908	}
1909	break;
1910	case RSCN_FAB_ADDR:
1911	default:
1912	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1913	if (fcport->flags & FCF_FCP2_DEVICE &&
1914	atomic_read(v: &fcport->state) == FCS_ONLINE)
1915	continue;
1916
1917	fcport->scan_needed = 1;
1918	fcport->rscn_gen++;
1919	}
1920	break;
1921	}
1922
1923	spin_lock_irqsave(&vha->work_lock, flags);
1924	if (vha->scan.scan_flags == 0) {
1925	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s: schedule\n", __func__);
1926	vha->scan.scan_flags |= SF_QUEUED;
1927	schedule_delayed_work(dwork: &vha->scan.scan_work, delay: 5);
1928	}
1929	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
1930	}
1931
1932	void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1933	struct event_arg *ea)
1934	{
1935	fc_port_t *fcport = ea->fcport;
1936
1937	if (test_bit(UNLOADING, &vha->dpc_flags))
1938	return;
1939
1940	ql_dbg(ql_dbg_disc, vha, 0x2102,
1941	fmt: "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1942	__func__, fcport->port_name, fcport->disc_state,
1943	fcport->fw_login_state, fcport->login_pause,
1944	fcport->deleted, fcport->conflict,
1945	fcport->last_rscn_gen, fcport->rscn_gen,
1946	fcport->last_login_gen, fcport->login_gen,
1947	fcport->flags);
1948
1949	if (fcport->last_rscn_gen != fcport->rscn_gen) {
1950	ql_dbg(ql_dbg_disc, vha, 0x20e9, fmt: "%s %d %8phC post gnl\n",
1951	__func__, __LINE__, fcport->port_name);
1952	qla24xx_post_gnl_work(vha, fcport);
1953	return;
1954	}
1955
1956	qla24xx_fcport_handle_login(vha, fcport);
1957	}
1958
1959	void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1960	struct event_arg *ea)
1961	{
1962	if (N2N_TOPO(vha->hw) && fcport_is_smaller(fcport: ea->fcport) &&
1963	vha->hw->flags.edif_enabled) {
1964	/* check to see if App support Secure */
1965	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
1966	return;
1967	}
1968
1969	/* for pure Target Mode, PRLI will not be initiated */
1970	if (vha->host->active_mode == MODE_TARGET)
1971	return;
1972
1973	ql_dbg(ql_dbg_disc, vha, 0x2118,
1974	fmt: "%s %d %8phC post PRLI\n",
1975	__func__, __LINE__, ea->fcport->port_name);
1976	qla24xx_post_prli_work(vha, fcport: ea->fcport);
1977	}
1978
1979	/*
1980	* RSCN(s) came in for this fcport, but the RSCN(s) was not able
1981	* to be consumed by the fcport
1982	*/
1983	void qla_rscn_replay(fc_port_t *fcport)
1984	{
1985	struct event_arg ea;
1986
1987	switch (fcport->disc_state) {
1988	case DSC_DELETE_PEND:
1989	return;
1990	default:
1991	break;
1992	}
1993
1994	if (fcport->scan_needed) {
1995	memset(&ea, 0, sizeof(ea));
1996	ea.id = fcport->d_id;
1997	ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1998	qla2x00_handle_rscn(vha: fcport->vha, ea: &ea);
1999	}
2000	}
2001
2002	static void
2003	qla2x00_tmf_iocb_timeout(void *data)
2004	{
2005	srb_t *sp = data;
2006	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2007	int rc, h;
2008	unsigned long flags;
2009
2010	if (sp->type == SRB_MARKER)
2011	rc = QLA_FUNCTION_FAILED;
2012	else
2013	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
2014
2015	if (rc) {
2016	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
2017	for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
2018	if (sp->qpair->req->outstanding_cmds[h] == sp) {
2019	sp->qpair->req->outstanding_cmds[h] = NULL;
2020	qla_put_fw_resources(qp: sp->qpair, iores: &sp->iores);
2021	break;
2022	}
2023	}
2024	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
2025	tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
2026	tmf->u.tmf.data = QLA_FUNCTION_FAILED;
2027	complete(&tmf->u.tmf.comp);
2028	}
2029	}
2030
2031	static void qla_marker_sp_done(srb_t *sp, int res)
2032	{
2033	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2034
2035	if (res != QLA_SUCCESS)
2036	ql_dbg(ql_dbg_taskm, vha: sp->vha, 0x8004,
2037	fmt: "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n",
2038	sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags,
2039	sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id);
2040
2041	sp->u.iocb_cmd.u.tmf.data = res;
2042	complete(&tmf->u.tmf.comp);
2043	}
2044
2045	#define START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \
2046	{\
2047	int cnt = 5; \
2048	do { \
2049	if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\
2050	_rval = EINVAL; \
2051	break; \
2052	} \
2053	_rval = qla2x00_start_sp(_sp); \
2054	if (_rval == EAGAIN) \
2055	msleep(1); \
2056	else \
2057	break; \
2058	cnt--; \
2059	} while (cnt); \
2060	}
2061
2062	/**
2063	* qla26xx_marker: send marker IOCB and wait for the completion of it.
2064	* @arg: pointer to argument list.
2065	* It is assume caller will provide an fcport pointer and modifier
2066	*/
2067	static int
2068	qla26xx_marker(struct tmf_arg *arg)
2069	{
2070	struct scsi_qla_host *vha = arg->vha;
2071	struct srb_iocb *tm_iocb;
2072	srb_t *sp;
2073	int rval = QLA_FUNCTION_FAILED;
2074	fc_port_t *fcport = arg->fcport;
2075	u32 chip_gen, login_gen;
2076
2077	if (TMF_NOT_READY(arg->fcport)) {
2078	ql_dbg(ql_dbg_taskm, vha, 0x8039,
2079	fmt: "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2080	fcport->loop_id, fcport->d_id.b24,
2081	arg->modifier, arg->lun, arg->qpair->id);
2082	return QLA_SUSPENDED;
2083	}
2084
2085	chip_gen = vha->hw->chip_reset;
2086	login_gen = fcport->login_gen;
2087
2088	/* ref: INIT */
2089	sp = qla2xxx_get_qpair_sp(vha, qpair: arg->qpair, fcport, GFP_KERNEL);
2090	if (!sp)
2091	goto done;
2092
2093	sp->type = SRB_MARKER;
2094	sp->name = "marker";
2095	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha), done: qla_marker_sp_done);
2096	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2097
2098	tm_iocb = &sp->u.iocb_cmd;
2099	init_completion(x: &tm_iocb->u.tmf.comp);
2100	tm_iocb->u.tmf.modifier = arg->modifier;
2101	tm_iocb->u.tmf.lun = arg->lun;
2102	tm_iocb->u.tmf.loop_id = fcport->loop_id;
2103	tm_iocb->u.tmf.vp_index = vha->vp_idx;
2104
2105	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2106
2107	ql_dbg(ql_dbg_taskm, vha, 0x8006,
2108	fmt: "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2109	sp->handle, fcport->loop_id, fcport->d_id.b24,
2110	arg->modifier, arg->lun, sp->qpair->id, rval);
2111
2112	if (rval != QLA_SUCCESS) {
2113	ql_log(ql_log_warn, vha, 0x8031,
2114	fmt: "Marker IOCB send failure (%x).\n", rval);
2115	goto done_free_sp;
2116	}
2117
2118	wait_for_completion(&tm_iocb->u.tmf.comp);
2119	rval = tm_iocb->u.tmf.data;
2120
2121	if (rval != QLA_SUCCESS) {
2122	ql_log(ql_log_warn, vha, 0x8019,
2123	fmt: "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2124	sp->handle, fcport->loop_id, fcport->d_id.b24,
2125	arg->modifier, arg->lun, sp->qpair->id, rval);
2126	}
2127
2128	done_free_sp:
2129	/* ref: INIT */
2130	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
2131	done:
2132	return rval;
2133	}
2134
2135	static void qla2x00_tmf_sp_done(srb_t *sp, int res)
2136	{
2137	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2138
2139	if (res)
2140	tmf->u.tmf.data = res;
2141	complete(&tmf->u.tmf.comp);
2142	}
2143
2144	static int qla_tmf_wait(struct tmf_arg *arg)
2145	{
2146	/* there are only 2 types of error handling that reaches here, lun or target reset */
2147	if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET))
2148	return qla2x00_eh_wait_for_pending_commands(arg->vha,
2149	arg->fcport->d_id.b24, arg->lun, WAIT_LUN);
2150	else
2151	return qla2x00_eh_wait_for_pending_commands(arg->vha,
2152	arg->fcport->d_id.b24, arg->lun, WAIT_TARGET);
2153	}
2154
2155	static int
2156	__qla2x00_async_tm_cmd(struct tmf_arg *arg)
2157	{
2158	struct scsi_qla_host *vha = arg->vha;
2159	struct srb_iocb *tm_iocb;
2160	srb_t *sp;
2161	int rval = QLA_FUNCTION_FAILED;
2162	fc_port_t *fcport = arg->fcport;
2163	u32 chip_gen, login_gen;
2164	u64 jif;
2165
2166	if (TMF_NOT_READY(arg->fcport)) {
2167	ql_dbg(ql_dbg_taskm, vha, 0x8032,
2168	fmt: "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2169	fcport->loop_id, fcport->d_id.b24,
2170	arg->modifier, arg->lun, arg->qpair->id);
2171	return QLA_SUSPENDED;
2172	}
2173
2174	chip_gen = vha->hw->chip_reset;
2175	login_gen = fcport->login_gen;
2176
2177	/* ref: INIT */
2178	sp = qla2xxx_get_qpair_sp(vha, qpair: arg->qpair, fcport, GFP_KERNEL);
2179	if (!sp)
2180	goto done;
2181
2182	qla_vha_mark_busy(vha);
2183	sp->type = SRB_TM_CMD;
2184	sp->name = "tmf";
2185	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha),
2186	done: qla2x00_tmf_sp_done);
2187	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2188
2189	tm_iocb = &sp->u.iocb_cmd;
2190	init_completion(x: &tm_iocb->u.tmf.comp);
2191	tm_iocb->u.tmf.flags = arg->flags;
2192	tm_iocb->u.tmf.lun = arg->lun;
2193
2194	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2195
2196	ql_dbg(ql_dbg_taskm, vha, 0x802f,
2197	fmt: "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n",
2198	sp->handle, fcport->loop_id, fcport->d_id.b24,
2199	arg->flags, arg->lun, sp->qpair->id, rval);
2200
2201	if (rval != QLA_SUCCESS)
2202	goto done_free_sp;
2203	wait_for_completion(&tm_iocb->u.tmf.comp);
2204
2205	rval = tm_iocb->u.tmf.data;
2206
2207	if (rval != QLA_SUCCESS) {
2208	ql_log(ql_log_warn, vha, 0x8030,
2209	fmt: "TM IOCB failed (%x).\n", rval);
2210	}
2211
2212	if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
2213	jif = jiffies;
2214	if (qla_tmf_wait(arg)) {
2215	ql_log(ql_log_info, vha, 0x803e,
2216	fmt: "Waited %u ms Nexus=%ld:%06x:%llu.\n",
2217	jiffies_to_msecs(j: jiffies - jif), vha->host_no,
2218	fcport->d_id.b24, arg->lun);
2219	}
2220
2221	if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) {
2222	rval = qla26xx_marker(arg);
2223	} else {
2224	ql_log(ql_log_info, vha, 0x803e,
2225	fmt: "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n",
2226	vha->host_no, fcport->d_id.b24, arg->lun);
2227	rval = QLA_FUNCTION_FAILED;
2228	}
2229	}
2230	if (tm_iocb->u.tmf.data)
2231	rval = tm_iocb->u.tmf.data;
2232
2233	done_free_sp:
2234	/* ref: INIT */
2235	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
2236	done:
2237	return rval;
2238	}
2239
2240	static void qla_put_tmf(struct tmf_arg *arg)
2241	{
2242	struct scsi_qla_host *vha = arg->vha;
2243	struct qla_hw_data *ha = vha->hw;
2244	unsigned long flags;
2245
2246	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2247	ha->active_tmf--;
2248	list_del(entry: &arg->tmf_elem);
2249	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2250	}
2251
2252	static
2253	int qla_get_tmf(struct tmf_arg *arg)
2254	{
2255	struct scsi_qla_host *vha = arg->vha;
2256	struct qla_hw_data *ha = vha->hw;
2257	unsigned long flags;
2258	fc_port_t *fcport = arg->fcport;
2259	int rc = 0;
2260	struct tmf_arg *t;
2261
2262	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2263	list_for_each_entry(t, &ha->tmf_active, tmf_elem) {
2264	if (t->fcport == arg->fcport && t->lun == arg->lun) {
2265	/* reject duplicate TMF */
2266	ql_log(ql_log_warn, vha, 0x802c,
2267	fmt: "found duplicate TMF. Nexus=%ld:%06x:%llu.\n",
2268	vha->host_no, fcport->d_id.b24, arg->lun);
2269	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2270	return -EINVAL;
2271	}
2272	}
2273
2274	list_add_tail(new: &arg->tmf_elem, head: &ha->tmf_pending);
2275	while (ha->active_tmf >= MAX_ACTIVE_TMF) {
2276	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2277
2278	msleep(msecs: 1);
2279
2280	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2281	if (TMF_NOT_READY(fcport)) {
2282	ql_log(ql_log_warn, vha, 0x802c,
2283	fmt: "Unable to acquire TM resource due to disruption.\n");
2284	rc = EIO;
2285	break;
2286	}
2287	if (ha->active_tmf < MAX_ACTIVE_TMF &&
2288	list_is_first(list: &arg->tmf_elem, head: &ha->tmf_pending))
2289	break;
2290	}
2291
2292	list_del(entry: &arg->tmf_elem);
2293
2294	if (!rc) {
2295	ha->active_tmf++;
2296	list_add_tail(new: &arg->tmf_elem, head: &ha->tmf_active);
2297	}
2298
2299	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2300
2301	return rc;
2302	}
2303
2304	int
2305	qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun,
2306	uint32_t tag)
2307	{
2308	struct scsi_qla_host *vha = fcport->vha;
2309	struct tmf_arg a;
2310	int rval = QLA_SUCCESS;
2311
2312	if (TMF_NOT_READY(fcport))
2313	return QLA_SUSPENDED;
2314
2315	a.vha = fcport->vha;
2316	a.fcport = fcport;
2317	a.lun = lun;
2318	a.flags = flags;
2319	INIT_LIST_HEAD(list: &a.tmf_elem);
2320
2321	if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
2322	a.modifier = MK_SYNC_ID_LUN;
2323	} else {
2324	a.modifier = MK_SYNC_ID;
2325	}
2326
2327	if (qla_get_tmf(arg: &a))
2328	return QLA_FUNCTION_FAILED;
2329
2330	a.qpair = vha->hw->base_qpair;
2331	rval = __qla2x00_async_tm_cmd(arg: &a);
2332
2333	qla_put_tmf(arg: &a);
2334	return rval;
2335	}
2336
2337	int
2338	qla24xx_async_abort_command(srb_t *sp)
2339	{
2340	unsigned long flags = 0;
2341
2342	uint32_t handle;
2343	fc_port_t *fcport = sp->fcport;
2344	struct qla_qpair *qpair = sp->qpair;
2345	struct scsi_qla_host *vha = fcport->vha;
2346	struct req_que *req = qpair->req;
2347
2348	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
2349	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2350	if (req->outstanding_cmds[handle] == sp)
2351	break;
2352	}
2353	spin_unlock_irqrestore(lock: qpair->qp_lock_ptr, flags);
2354
2355	if (handle == req->num_outstanding_cmds) {
2356	/* Command not found. */
2357	return QLA_ERR_NOT_FOUND;
2358	}
2359	if (sp->type == SRB_FXIOCB_DCMD)
2360	return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2361	FXDISC_ABORT_IOCTL);
2362
2363	return qla24xx_async_abort_cmd(cmd_sp: sp, wait: true);
2364	}
2365
2366	static void
2367	qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2368	{
2369	struct srb *sp;
2370	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2371	ea->data[0]);
2372
2373	switch (ea->data[0]) {
2374	case MBS_COMMAND_COMPLETE:
2375	ql_dbg(ql_dbg_disc, vha, 0x2118,
2376	fmt: "%s %d %8phC post gpdb\n",
2377	__func__, __LINE__, ea->fcport->port_name);
2378
2379	ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2380	ea->fcport->logout_on_delete = 1;
2381	ea->fcport->nvme_prli_service_param = ea->iop[0];
2382	if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2383	ea->fcport->nvme_first_burst_size =
2384	(ea->iop[1] & 0xffff) * 512;
2385	else
2386	ea->fcport->nvme_first_burst_size = 0;
2387	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
2388	break;
2389	default:
2390	sp = ea->sp;
2391	ql_dbg(ql_dbg_disc, vha, 0x2118,
2392	fmt: "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2393	__func__, __LINE__, ea->fcport->port_name,
2394	vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2395	"FCP" : "NVMe", ea->fcport->fc4_type,
2396	(sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2397	"NVME" : "FCP");
2398
2399	if (NVME_FCP_TARGET(ea->fcport)) {
2400	if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2401	ea->fcport->do_prli_nvme = 0;
2402	else
2403	ea->fcport->do_prli_nvme = 1;
2404	} else {
2405	ea->fcport->do_prli_nvme = 0;
2406	}
2407
2408	if (N2N_TOPO(vha->hw)) {
2409	if (ea->fcport->n2n_link_reset_cnt ==
2410	vha->hw->login_retry_count &&
2411	ea->fcport->flags & FCF_FCSP_DEVICE) {
2412	/* remote authentication app just started */
2413	ea->fcport->n2n_link_reset_cnt = 0;
2414	}
2415
2416	if (ea->fcport->n2n_link_reset_cnt <
2417	vha->hw->login_retry_count) {
2418	ea->fcport->n2n_link_reset_cnt++;
2419	vha->relogin_jif = jiffies + 2 * HZ;
2420	/*
2421	* PRLI failed. Reset link to kick start
2422	* state machine
2423	*/
2424	set_bit(N2N_LINK_RESET, addr: &vha->dpc_flags);
2425	qla2xxx_wake_dpc(vha);
2426	} else {
2427	ql_log(ql_log_warn, vha, 0x2119,
2428	fmt: "%s %d %8phC Unable to reconnect\n",
2429	__func__, __LINE__,
2430	ea->fcport->port_name);
2431	}
2432	} else {
2433	/*
2434	* switch connect. login failed. Take connection down
2435	* and allow relogin to retrigger
2436	*/
2437	ea->fcport->flags &= ~FCF_ASYNC_SENT;
2438	ea->fcport->keep_nport_handle = 0;
2439	ea->fcport->logout_on_delete = 1;
2440	qlt_schedule_sess_for_deletion(ea->fcport);
2441	}
2442	break;
2443	}
2444	}
2445
2446	void
2447	qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2448	{
2449	port_id_t cid; /* conflict Nport id */
2450	u16 lid;
2451	struct fc_port *conflict_fcport;
2452	unsigned long flags;
2453	struct fc_port *fcport = ea->fcport;
2454
2455	ql_dbg(ql_dbg_disc, vha, 0xffff,
2456	fmt: "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2457	__func__, fcport->port_name, fcport->disc_state,
2458	fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2459	ea->sp->gen1, fcport->rscn_gen,
2460	ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2461
2462	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2463	(fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2464	ql_dbg(ql_dbg_disc, vha, 0x20ea,
2465	fmt: "%s %d %8phC Remote is trying to login\n",
2466	__func__, __LINE__, fcport->port_name);
2467	return;
2468	}
2469
2470	if ((fcport->disc_state == DSC_DELETE_PEND) ||
2471	(fcport->disc_state == DSC_DELETED)) {
2472	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
2473	return;
2474	}
2475
2476	if (ea->sp->gen2 != fcport->login_gen) {
2477	/* target side must have changed it. */
2478	ql_dbg(ql_dbg_disc, vha, 0x20d3,
2479	fmt: "%s %8phC generation changed\n",
2480	__func__, fcport->port_name);
2481	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
2482	return;
2483	} else if (ea->sp->gen1 != fcport->rscn_gen) {
2484	ql_dbg(ql_dbg_disc, vha, 0x20d3,
2485	fmt: "%s %8phC RSCN generation changed\n",
2486	__func__, fcport->port_name);
2487	qla_rscn_replay(fcport);
2488	qlt_schedule_sess_for_deletion(fcport);
2489	return;
2490	}
2491
2492	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2493	ea->data[0]);
2494
2495	switch (ea->data[0]) {
2496	case MBS_COMMAND_COMPLETE:
2497	/*
2498	* Driver must validate login state - If PRLI not complete,
2499	* force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2500	* requests.
2501	*/
2502	if (vha->hw->flags.edif_enabled) {
2503	set_bit(nr: ea->fcport->loop_id, addr: vha->hw->loop_id_map);
2504	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2505	ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2506	ea->fcport->logout_on_delete = 1;
2507	ea->fcport->send_els_logo = 0;
2508	ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2509	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
2510
2511	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
2512	} else {
2513	if (NVME_TARGET(vha->hw, fcport)) {
2514	ql_dbg(ql_dbg_disc, vha, 0x2117,
2515	fmt: "%s %d %8phC post prli\n",
2516	__func__, __LINE__, fcport->port_name);
2517	qla24xx_post_prli_work(vha, fcport);
2518	} else {
2519	ql_dbg(ql_dbg_disc, vha, 0x20ea,
2520	fmt: "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2521	__func__, __LINE__, fcport->port_name,
2522	fcport->loop_id, fcport->d_id.b24);
2523
2524	set_bit(nr: fcport->loop_id, addr: vha->hw->loop_id_map);
2525	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2526	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2527	fcport->logout_on_delete = 1;
2528	fcport->send_els_logo = 0;
2529	fcport->fw_login_state = DSC_LS_PRLI_COMP;
2530	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
2531
2532	qla24xx_post_gpdb_work(vha, fcport, opt: 0);
2533	}
2534	}
2535	break;
2536	case MBS_COMMAND_ERROR:
2537	ql_dbg(ql_dbg_disc, vha, 0x20eb, fmt: "%s %d %8phC cmd error %x\n",
2538	__func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2539
2540	qlt_schedule_sess_for_deletion(ea->fcport);
2541	break;
2542	case MBS_LOOP_ID_USED:
2543	/* data[1] = IO PARAM 1 = nport ID */
2544	cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2545	cid.b.area = (ea->iop[1] >> 8) & 0xff;
2546	cid.b.al_pa = ea->iop[1] & 0xff;
2547	cid.b.rsvd_1 = 0;
2548
2549	ql_dbg(ql_dbg_disc, vha, 0x20ec,
2550	fmt: "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2551	__func__, __LINE__, ea->fcport->port_name,
2552	ea->fcport->loop_id, cid.b24);
2553
2554	set_bit(nr: ea->fcport->loop_id, addr: vha->hw->loop_id_map);
2555	ea->fcport->loop_id = FC_NO_LOOP_ID;
2556	qla24xx_post_gnl_work(vha, fcport: ea->fcport);
2557	break;
2558	case MBS_PORT_ID_USED:
2559	lid = ea->iop[1] & 0xffff;
2560	qlt_find_sess_invalidate_other(vha,
2561	wwn: wwn_to_u64(wwn: ea->fcport->port_name),
2562	port_id: ea->fcport->d_id, loop_id: lid, &conflict_fcport);
2563
2564	if (conflict_fcport) {
2565	/*
2566	* Another fcport share the same loop_id/nport id.
2567	* Conflict fcport needs to finish cleanup before this
2568	* fcport can proceed to login.
2569	*/
2570	conflict_fcport->conflict = ea->fcport;
2571	ea->fcport->login_pause = 1;
2572
2573	ql_dbg(ql_dbg_disc, vha, 0x20ed,
2574	fmt: "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n",
2575	__func__, __LINE__, ea->fcport->port_name,
2576	ea->fcport->d_id.b24, lid);
2577	} else {
2578	ql_dbg(ql_dbg_disc, vha, 0x20ed,
2579	fmt: "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2580	__func__, __LINE__, ea->fcport->port_name,
2581	ea->fcport->d_id.b24, lid);
2582
2583	qla2x00_clear_loop_id(fcport: ea->fcport);
2584	set_bit(nr: lid, addr: vha->hw->loop_id_map);
2585	ea->fcport->loop_id = lid;
2586	ea->fcport->keep_nport_handle = 0;
2587	ea->fcport->logout_on_delete = 1;
2588	qlt_schedule_sess_for_deletion(ea->fcport);
2589	}
2590	break;
2591	}
2592	return;
2593	}
2594
2595	/****************************************************************************/
2596	/* QLogic ISP2x00 Hardware Support Functions. */
2597	/****************************************************************************/
2598
2599	static int
2600	qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2601	{
2602	int rval = QLA_SUCCESS;
2603	struct qla_hw_data *ha = vha->hw;
2604	uint32_t idc_major_ver, idc_minor_ver;
2605	uint16_t config[4];
2606
2607	qla83xx_idc_lock(vha, 0);
2608
2609	/* SV: TODO: Assign initialization timeout from
2610	* flash-info / other param
2611	*/
2612	ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2613	ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2614
2615	/* Set our fcoe function presence */
2616	if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2617	ql_dbg(ql_dbg_p3p, vha, 0xb077,
2618	fmt: "Error while setting DRV-Presence.\n");
2619	rval = QLA_FUNCTION_FAILED;
2620	goto exit;
2621	}
2622
2623	/* Decide the reset ownership */
2624	qla83xx_reset_ownership(vha);
2625
2626	/*
2627	* On first protocol driver load:
2628	* Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2629	* register.
2630	* Others: Check compatibility with current IDC Major version.
2631	*/
2632	qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2633	if (ha->flags.nic_core_reset_owner) {
2634	/* Set IDC Major version */
2635	idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2636	qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2637
2638	/* Clearing IDC-Lock-Recovery register */
2639	qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2640	} else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2641	/*
2642	* Clear further IDC participation if we are not compatible with
2643	* the current IDC Major Version.
2644	*/
2645	ql_log(ql_log_warn, vha, 0xb07d,
2646	fmt: "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2647	idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2648	__qla83xx_clear_drv_presence(vha);
2649	rval = QLA_FUNCTION_FAILED;
2650	goto exit;
2651	}
2652	/* Each function sets its supported Minor version. */
2653	qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2654	idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2655	qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2656
2657	if (ha->flags.nic_core_reset_owner) {
2658	memset(config, 0, sizeof(config));
2659	if (!qla81xx_get_port_config(vha, config))
2660	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2661	QLA8XXX_DEV_READY);
2662	}
2663
2664	rval = qla83xx_idc_state_handler(vha);
2665
2666	exit:
2667	qla83xx_idc_unlock(vha, 0);
2668
2669	return rval;
2670	}
2671
2672	static void qla_enable_fce_trace(scsi_qla_host_t *vha)
2673	{
2674	int rval;
2675	struct qla_hw_data *ha = vha->hw;
2676
2677	if (ha->fce) {
2678	ha->flags.fce_enabled = 1;
2679	memset(ha->fce, 0, fce_calc_size(ha->fce_bufs));
2680	rval = qla2x00_enable_fce_trace(vha,
2681	ha->fce_dma, ha->fce_bufs, ha->fce_mb, &ha->fce_bufs);
2682
2683	if (rval) {
2684	ql_log(ql_log_warn, vha, 0x8033,
2685	fmt: "Unable to reinitialize FCE (%d).\n", rval);
2686	ha->flags.fce_enabled = 0;
2687	}
2688	}
2689	}
2690
2691	static void qla_enable_eft_trace(scsi_qla_host_t *vha)
2692	{
2693	int rval;
2694	struct qla_hw_data *ha = vha->hw;
2695
2696	if (ha->eft) {
2697	memset(ha->eft, 0, EFT_SIZE);
2698	rval = qla2x00_enable_eft_trace(vha, ha->eft_dma, EFT_NUM_BUFFERS);
2699
2700	if (rval) {
2701	ql_log(ql_log_warn, vha, 0x8034,
2702	fmt: "Unable to reinitialize EFT (%d).\n", rval);
2703	}
2704	}
2705	}
2706	/*
2707	* qla2x00_initialize_adapter
2708	* Initialize board.
2709	*
2710	* Input:
2711	* ha = adapter block pointer.
2712	*
2713	* Returns:
2714	* 0 = success
2715	*/
2716	int
2717	qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2718	{
2719	int rval;
2720	struct qla_hw_data *ha = vha->hw;
2721	struct req_que *req = ha->req_q_map[0];
2722	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2723
2724	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2725	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2726
2727	/* Clear adapter flags. */
2728	vha->flags.online = 0;
2729	ha->flags.chip_reset_done = 0;
2730	vha->flags.reset_active = 0;
2731	ha->flags.pci_channel_io_perm_failure = 0;
2732	ha->flags.eeh_busy = 0;
2733	vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2734	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
2735	atomic_set(v: &vha->loop_state, LOOP_DOWN);
2736	vha->device_flags = DFLG_NO_CABLE;
2737	vha->dpc_flags = 0;
2738	vha->flags.management_server_logged_in = 0;
2739	vha->marker_needed = 0;
2740	ha->isp_abort_cnt = 0;
2741	ha->beacon_blink_led = 0;
2742
2743	set_bit(nr: 0, addr: ha->req_qid_map);
2744	set_bit(nr: 0, addr: ha->rsp_qid_map);
2745
2746	ql_dbg(ql_dbg_init, vha, 0x0040,
2747	fmt: "Configuring PCI space...\n");
2748	rval = ha->isp_ops->pci_config(vha);
2749	if (rval) {
2750	ql_log(ql_log_warn, vha, 0x0044,
2751	fmt: "Unable to configure PCI space.\n");
2752	return (rval);
2753	}
2754
2755	ha->isp_ops->reset_chip(vha);
2756
2757	/* Check for secure flash support */
2758	if (IS_QLA28XX(ha)) {
2759	if (rd_reg_word(addr: &reg->mailbox12) & BIT_0)
2760	ha->flags.secure_adapter = 1;
2761	ql_log(ql_log_info, vha, 0xffff, fmt: "Secure Adapter: %s\n",
2762	(ha->flags.secure_adapter) ? "Yes" : "No");
2763	}
2764
2765
2766	rval = qla2xxx_get_flash_info(vha);
2767	if (rval) {
2768	ql_log(ql_log_fatal, vha, 0x004f,
2769	fmt: "Unable to validate FLASH data.\n");
2770	return rval;
2771	}
2772
2773	if (IS_QLA8044(ha)) {
2774	qla8044_read_reset_template(ha: vha);
2775
2776	/* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2777	* If DONRESET_BIT0 is set, drivers should not set dev_state
2778	* to NEED_RESET. But if NEED_RESET is set, drivers should
2779	* should honor the reset. */
2780	if (ql2xdontresethba == 1)
2781	qla8044_set_idc_dontreset(ha: vha);
2782	}
2783
2784	ha->isp_ops->get_flash_version(vha, req->ring);
2785	ql_dbg(ql_dbg_init, vha, 0x0061,
2786	fmt: "Configure NVRAM parameters...\n");
2787
2788	/* Let priority default to FCP, can be overridden by nvram_config */
2789	ha->fc4_type_priority = FC4_PRIORITY_FCP;
2790
2791	ha->isp_ops->nvram_config(vha);
2792
2793	if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2794	ha->fc4_type_priority != FC4_PRIORITY_NVME)
2795	ha->fc4_type_priority = FC4_PRIORITY_FCP;
2796
2797	ql_log(ql_log_info, vha, 0xffff, fmt: "FC4 priority set to %s\n",
2798	ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2799
2800	if (ha->flags.disable_serdes) {
2801	/* Mask HBA via NVRAM settings? */
2802	ql_log(ql_log_info, vha, 0x0077,
2803	fmt: "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2804	return QLA_FUNCTION_FAILED;
2805	}
2806
2807	ql_dbg(ql_dbg_init, vha, 0x0078,
2808	fmt: "Verifying loaded RISC code...\n");
2809
2810	/* If smartsan enabled then require fdmi and rdp enabled */
2811	if (ql2xsmartsan) {
2812	ql2xfdmienable = 1;
2813	ql2xrdpenable = 1;
2814	}
2815
2816	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2817	rval = ha->isp_ops->chip_diag(vha);
2818	if (rval)
2819	return (rval);
2820	rval = qla2x00_setup_chip(vha);
2821	if (rval)
2822	return (rval);
2823	}
2824
2825	if (IS_QLA84XX(ha)) {
2826	ha->cs84xx = qla84xx_get_chip(vha);
2827	if (!ha->cs84xx) {
2828	ql_log(ql_log_warn, vha, 0x00d0,
2829	fmt: "Unable to configure ISP84XX.\n");
2830	return QLA_FUNCTION_FAILED;
2831	}
2832	}
2833
2834	if (qla_ini_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha))
2835	rval = qla2x00_init_rings(vha);
2836
2837	/* No point in continuing if firmware initialization failed. */
2838	if (rval != QLA_SUCCESS)
2839	return rval;
2840
2841	ha->flags.chip_reset_done = 1;
2842
2843	if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2844	/* Issue verify 84xx FW IOCB to complete 84xx initialization */
2845	rval = qla84xx_init_chip(vha);
2846	if (rval != QLA_SUCCESS) {
2847	ql_log(ql_log_warn, vha, 0x00d4,
2848	fmt: "Unable to initialize ISP84XX.\n");
2849	qla84xx_put_chip(vha);
2850	}
2851	}
2852
2853	/* Load the NIC Core f/w if we are the first protocol driver. */
2854	if (IS_QLA8031(ha)) {
2855	rval = qla83xx_nic_core_fw_load(vha);
2856	if (rval)
2857	ql_log(ql_log_warn, vha, 0x0124,
2858	fmt: "Error in initializing NIC Core f/w.\n");
2859	}
2860
2861	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2862	qla24xx_read_fcp_prio_cfg(vha);
2863
2864	if (IS_P3P_TYPE(ha))
2865	qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2866	else
2867	qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2868
2869	return (rval);
2870	}
2871
2872	/**
2873	* qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2874	* @vha: HA context
2875	*
2876	* Returns 0 on success.
2877	*/
2878	int
2879	qla2100_pci_config(scsi_qla_host_t *vha)
2880	{
2881	uint16_t w;
2882	unsigned long flags;
2883	struct qla_hw_data *ha = vha->hw;
2884	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2885
2886	pci_set_master(dev: ha->pdev);
2887	pci_try_set_mwi(dev: ha->pdev);
2888
2889	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
2890	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2891	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
2892
2893	pci_disable_rom(pdev: ha->pdev);
2894
2895	/* Get PCI bus information. */
2896	spin_lock_irqsave(&ha->hardware_lock, flags);
2897	ha->pci_attr = rd_reg_word(addr: &reg->ctrl_status);
2898	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2899
2900	return QLA_SUCCESS;
2901	}
2902
2903	/**
2904	* qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2905	* @vha: HA context
2906	*
2907	* Returns 0 on success.
2908	*/
2909	int
2910	qla2300_pci_config(scsi_qla_host_t *vha)
2911	{
2912	uint16_t w;
2913	unsigned long flags = 0;
2914	uint32_t cnt;
2915	struct qla_hw_data *ha = vha->hw;
2916	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2917
2918	pci_set_master(dev: ha->pdev);
2919	pci_try_set_mwi(dev: ha->pdev);
2920
2921	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
2922	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2923
2924	if (IS_QLA2322(ha) || IS_QLA6322(ha))
2925	w &= ~PCI_COMMAND_INTX_DISABLE;
2926	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
2927
2928	/*
2929	* If this is a 2300 card and not 2312, reset the
2930	* COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2931	* the 2310 also reports itself as a 2300 so we need to get the
2932	* fb revision level -- a 6 indicates it really is a 2300 and
2933	* not a 2310.
2934	*/
2935	if (IS_QLA2300(ha)) {
2936	spin_lock_irqsave(&ha->hardware_lock, flags);
2937
2938	/* Pause RISC. */
2939	wrt_reg_word(addr: &reg->hccr, HCCR_PAUSE_RISC);
2940	for (cnt = 0; cnt < 30000; cnt++) {
2941	if ((rd_reg_word(addr: &reg->hccr) & HCCR_RISC_PAUSE) != 0)
2942	break;
2943
2944	udelay(10);
2945	}
2946
2947	/* Select FPM registers. */
2948	wrt_reg_word(addr: &reg->ctrl_status, data: 0x20);
2949	rd_reg_word(addr: &reg->ctrl_status);
2950
2951	/* Get the fb rev level */
2952	ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2953
2954	if (ha->fb_rev == FPM_2300)
2955	pci_clear_mwi(dev: ha->pdev);
2956
2957	/* Deselect FPM registers. */
2958	wrt_reg_word(addr: &reg->ctrl_status, data: 0x0);
2959	rd_reg_word(addr: &reg->ctrl_status);
2960
2961	/* Release RISC module. */
2962	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
2963	for (cnt = 0; cnt < 30000; cnt++) {
2964	if ((rd_reg_word(addr: &reg->hccr) & HCCR_RISC_PAUSE) == 0)
2965	break;
2966
2967	udelay(10);
2968	}
2969
2970	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2971	}
2972
2973	pci_write_config_byte(dev: ha->pdev, PCI_LATENCY_TIMER, val: 0x80);
2974
2975	pci_disable_rom(pdev: ha->pdev);
2976
2977	/* Get PCI bus information. */
2978	spin_lock_irqsave(&ha->hardware_lock, flags);
2979	ha->pci_attr = rd_reg_word(addr: &reg->ctrl_status);
2980	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2981
2982	return QLA_SUCCESS;
2983	}
2984
2985	/**
2986	* qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2987	* @vha: HA context
2988	*
2989	* Returns 0 on success.
2990	*/
2991	int
2992	qla24xx_pci_config(scsi_qla_host_t *vha)
2993	{
2994	uint16_t w;
2995	unsigned long flags = 0;
2996	struct qla_hw_data *ha = vha->hw;
2997	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2998
2999	pci_set_master(dev: ha->pdev);
3000	pci_try_set_mwi(dev: ha->pdev);
3001
3002	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
3003	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3004	w &= ~PCI_COMMAND_INTX_DISABLE;
3005	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
3006
3007	pci_write_config_byte(dev: ha->pdev, PCI_LATENCY_TIMER, val: 0x80);
3008
3009	/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
3010	if (pci_find_capability(dev: ha->pdev, PCI_CAP_ID_PCIX))
3011	pcix_set_mmrbc(dev: ha->pdev, mmrbc: 2048);
3012
3013	/* PCIe -- adjust Maximum Read Request Size (2048). */
3014	if (pci_is_pcie(dev: ha->pdev))
3015	pcie_set_readrq(dev: ha->pdev, rq: 4096);
3016
3017	pci_disable_rom(pdev: ha->pdev);
3018
3019	ha->chip_revision = ha->pdev->revision;
3020
3021	/* Get PCI bus information. */
3022	spin_lock_irqsave(&ha->hardware_lock, flags);
3023	ha->pci_attr = rd_reg_dword(addr: &reg->ctrl_status);
3024	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3025
3026	return QLA_SUCCESS;
3027	}
3028
3029	/**
3030	* qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
3031	* @vha: HA context
3032	*
3033	* Returns 0 on success.
3034	*/
3035	int
3036	qla25xx_pci_config(scsi_qla_host_t *vha)
3037	{
3038	uint16_t w;
3039	struct qla_hw_data *ha = vha->hw;
3040
3041	pci_set_master(dev: ha->pdev);
3042	pci_try_set_mwi(dev: ha->pdev);
3043
3044	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
3045	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3046	w &= ~PCI_COMMAND_INTX_DISABLE;
3047	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
3048
3049	/* PCIe -- adjust Maximum Read Request Size (2048). */
3050	if (pci_is_pcie(dev: ha->pdev))
3051	pcie_set_readrq(dev: ha->pdev, rq: 4096);
3052
3053	pci_disable_rom(pdev: ha->pdev);
3054
3055	ha->chip_revision = ha->pdev->revision;
3056
3057	return QLA_SUCCESS;
3058	}
3059
3060	/**
3061	* qla2x00_isp_firmware() - Choose firmware image.
3062	* @vha: HA context
3063	*
3064	* Returns 0 on success.
3065	*/
3066	static int
3067	qla2x00_isp_firmware(scsi_qla_host_t *vha)
3068	{
3069	int rval;
3070	uint16_t loop_id, topo, sw_cap;
3071	uint8_t domain, area, al_pa;
3072	struct qla_hw_data *ha = vha->hw;
3073
3074	/* Assume loading risc code */
3075	rval = QLA_FUNCTION_FAILED;
3076
3077	if (ha->flags.disable_risc_code_load) {
3078	ql_log(ql_log_info, vha, 0x0079, fmt: "RISC CODE NOT loaded.\n");
3079
3080	/* Verify checksum of loaded RISC code. */
3081	rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
3082	if (rval == QLA_SUCCESS) {
3083	/* And, verify we are not in ROM code. */
3084	rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
3085	&area, &domain, &topo, &sw_cap);
3086	}
3087	}
3088
3089	if (rval)
3090	ql_dbg(ql_dbg_init, vha, 0x007a,
3091	fmt: "**** Load RISC code ****.\n");
3092
3093	return (rval);
3094	}
3095
3096	/**
3097	* qla2x00_reset_chip() - Reset ISP chip.
3098	* @vha: HA context
3099	*
3100	* Returns 0 on success.
3101	*/
3102	int
3103	qla2x00_reset_chip(scsi_qla_host_t *vha)
3104	{
3105	unsigned long flags = 0;
3106	struct qla_hw_data *ha = vha->hw;
3107	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3108	uint32_t cnt;
3109	uint16_t cmd;
3110	int rval = QLA_FUNCTION_FAILED;
3111
3112	if (unlikely(pci_channel_offline(ha->pdev)))
3113	return rval;
3114
3115	ha->isp_ops->disable_intrs(ha);
3116
3117	spin_lock_irqsave(&ha->hardware_lock, flags);
3118
3119	/* Turn off master enable */
3120	cmd = 0;
3121	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &cmd);
3122	cmd &= ~PCI_COMMAND_MASTER;
3123	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: cmd);
3124
3125	if (!IS_QLA2100(ha)) {
3126	/* Pause RISC. */
3127	wrt_reg_word(addr: &reg->hccr, HCCR_PAUSE_RISC);
3128	if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
3129	for (cnt = 0; cnt < 30000; cnt++) {
3130	if ((rd_reg_word(addr: &reg->hccr) &
3131	HCCR_RISC_PAUSE) != 0)
3132	break;
3133	udelay(100);
3134	}
3135	} else {
3136	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3137	udelay(10);
3138	}
3139
3140	/* Select FPM registers. */
3141	wrt_reg_word(addr: &reg->ctrl_status, data: 0x20);
3142	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3143
3144	/* FPM Soft Reset. */
3145	wrt_reg_word(addr: &reg->fpm_diag_config, data: 0x100);
3146	rd_reg_word(addr: &reg->fpm_diag_config); /* PCI Posting. */
3147
3148	/* Toggle Fpm Reset. */
3149	if (!IS_QLA2200(ha)) {
3150	wrt_reg_word(addr: &reg->fpm_diag_config, data: 0x0);
3151	rd_reg_word(addr: &reg->fpm_diag_config); /* PCI Posting. */
3152	}
3153
3154	/* Select frame buffer registers. */
3155	wrt_reg_word(addr: &reg->ctrl_status, data: 0x10);
3156	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3157
3158	/* Reset frame buffer FIFOs. */
3159	if (IS_QLA2200(ha)) {
3160	WRT_FB_CMD_REG(ha, reg, 0xa000);
3161	RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
3162	} else {
3163	WRT_FB_CMD_REG(ha, reg, 0x00fc);
3164
3165	/* Read back fb_cmd until zero or 3 seconds max */
3166	for (cnt = 0; cnt < 3000; cnt++) {
3167	if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
3168	break;
3169	udelay(100);
3170	}
3171	}
3172
3173	/* Select RISC module registers. */
3174	wrt_reg_word(addr: &reg->ctrl_status, data: 0);
3175	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3176
3177	/* Reset RISC processor. */
3178	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3179	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3180
3181	/* Release RISC processor. */
3182	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3183	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3184	}
3185
3186	wrt_reg_word(addr: &reg->hccr, HCCR_CLR_RISC_INT);
3187	wrt_reg_word(addr: &reg->hccr, HCCR_CLR_HOST_INT);
3188
3189	/* Reset ISP chip. */
3190	wrt_reg_word(addr: &reg->ctrl_status, CSR_ISP_SOFT_RESET);
3191
3192	/* Wait for RISC to recover from reset. */
3193	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3194	/*
3195	* It is necessary to for a delay here since the card doesn't
3196	* respond to PCI reads during a reset. On some architectures
3197	* this will result in an MCA.
3198	*/
3199	udelay(20);
3200	for (cnt = 30000; cnt; cnt--) {
3201	if ((rd_reg_word(addr: &reg->ctrl_status) &
3202	CSR_ISP_SOFT_RESET) == 0)
3203	break;
3204	udelay(100);
3205	}
3206	} else
3207	udelay(10);
3208
3209	/* Reset RISC processor. */
3210	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3211
3212	wrt_reg_word(addr: &reg->semaphore, data: 0);
3213
3214	/* Release RISC processor. */
3215	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3216	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3217
3218	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3219	for (cnt = 0; cnt < 30000; cnt++) {
3220	if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
3221	break;
3222
3223	udelay(100);
3224	}
3225	} else
3226	udelay(100);
3227
3228	/* Turn on master enable */
3229	cmd |= PCI_COMMAND_MASTER;
3230	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: cmd);
3231
3232	/* Disable RISC pause on FPM parity error. */
3233	if (!IS_QLA2100(ha)) {
3234	wrt_reg_word(addr: &reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
3235	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3236	}
3237
3238	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3239
3240	return QLA_SUCCESS;
3241	}
3242
3243	/**
3244	* qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
3245	* @vha: HA context
3246	*
3247	* Returns 0 on success.
3248	*/
3249	static int
3250	qla81xx_reset_mpi(scsi_qla_host_t *vha)
3251	{
3252	uint16_t mb[4] = {0x1010, 0, 1, 0};
3253
3254	if (!IS_QLA81XX(vha->hw))
3255	return QLA_SUCCESS;
3256
3257	return qla81xx_write_mpi_register(vha, mb);
3258	}
3259
3260	static int
3261	qla_chk_risc_recovery(scsi_qla_host_t *vha)
3262	{
3263	struct qla_hw_data *ha = vha->hw;
3264	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3265	__le16 __iomem *mbptr = &reg->mailbox0;
3266	int i;
3267	u16 mb[32];
3268	int rc = QLA_SUCCESS;
3269
3270	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3271	return rc;
3272
3273	/* this check is only valid after RISC reset */
3274	mb[0] = rd_reg_word(addr: mbptr);
3275	mbptr++;
3276	if (mb[0] == 0xf) {
3277	rc = QLA_FUNCTION_FAILED;
3278
3279	for (i = 1; i < 32; i++) {
3280	mb[i] = rd_reg_word(addr: mbptr);
3281	mbptr++;
3282	}
3283
3284	ql_log(ql_log_warn, vha, 0x1015,
3285	fmt: "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3286	mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
3287	ql_log(ql_log_warn, vha, 0x1015,
3288	fmt: "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3289	mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
3290	mb[15]);
3291	ql_log(ql_log_warn, vha, 0x1015,
3292	fmt: "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3293	mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
3294	mb[23]);
3295	ql_log(ql_log_warn, vha, 0x1015,
3296	fmt: "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3297	mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
3298	mb[31]);
3299	}
3300	return rc;
3301	}
3302
3303	/**
3304	* qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
3305	* @vha: HA context
3306	*
3307	* Returns 0 on success.
3308	*/
3309	static inline int
3310	qla24xx_reset_risc(scsi_qla_host_t *vha)
3311	{
3312	unsigned long flags = 0;
3313	struct qla_hw_data *ha = vha->hw;
3314	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3315	uint32_t cnt;
3316	uint16_t wd;
3317	static int abts_cnt; /* ISP abort retry counts */
3318	int rval = QLA_SUCCESS;
3319	int print = 1;
3320
3321	spin_lock_irqsave(&ha->hardware_lock, flags);
3322
3323	/* Reset RISC. */
3324	wrt_reg_dword(addr: &reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3325	for (cnt = 0; cnt < 30000; cnt++) {
3326	if ((rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
3327	break;
3328
3329	udelay(10);
3330	}
3331
3332	if (!(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE))
3333	set_bit(DMA_SHUTDOWN_CMPL, addr: &ha->fw_dump_cap_flags);
3334
3335	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
3336	fmt: "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
3337	rd_reg_dword(addr: &reg->hccr),
3338	rd_reg_dword(addr: &reg->ctrl_status),
3339	(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE));
3340
3341	wrt_reg_dword(addr: &reg->ctrl_status,
3342	CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3343	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &wd);
3344
3345	udelay(100);
3346
3347	/* Wait for firmware to complete NVRAM accesses. */
3348	rd_reg_word(addr: &reg->mailbox0);
3349	for (cnt = 10000; rd_reg_word(addr: &reg->mailbox0) != 0 &&
3350	rval == QLA_SUCCESS; cnt--) {
3351	barrier();
3352	if (cnt)
3353	udelay(5);
3354	else
3355	rval = QLA_FUNCTION_TIMEOUT;
3356	}
3357
3358	if (rval == QLA_SUCCESS)
3359	set_bit(ISP_MBX_RDY, addr: &ha->fw_dump_cap_flags);
3360
3361	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
3362	fmt: "HCCR: 0x%x, MailBox0 Status 0x%x\n",
3363	rd_reg_dword(addr: &reg->hccr),
3364	rd_reg_word(addr: &reg->mailbox0));
3365
3366	/* Wait for soft-reset to complete. */
3367	rd_reg_dword(addr: &reg->ctrl_status);
3368	for (cnt = 0; cnt < 60; cnt++) {
3369	barrier();
3370	if ((rd_reg_dword(addr: &reg->ctrl_status) &
3371	CSRX_ISP_SOFT_RESET) == 0)
3372	break;
3373
3374	udelay(5);
3375	}
3376	if (!(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
3377	set_bit(ISP_SOFT_RESET_CMPL, addr: &ha->fw_dump_cap_flags);
3378
3379	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
3380	fmt: "HCCR: 0x%x, Soft Reset status: 0x%x\n",
3381	rd_reg_dword(addr: &reg->hccr),
3382	rd_reg_dword(addr: &reg->ctrl_status));
3383
3384	/* If required, do an MPI FW reset now */
3385	if (test_and_clear_bit(MPI_RESET_NEEDED, addr: &vha->dpc_flags)) {
3386	if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
3387	if (++abts_cnt < 5) {
3388	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
3389	set_bit(MPI_RESET_NEEDED, addr: &vha->dpc_flags);
3390	} else {
3391	/*
3392	* We exhausted the ISP abort retries. We have to
3393	* set the board offline.
3394	*/
3395	abts_cnt = 0;
3396	vha->flags.online = 0;
3397	}
3398	}
3399	}
3400
3401	wrt_reg_dword(addr: &reg->hccr, HCCRX_SET_RISC_RESET);
3402	rd_reg_dword(addr: &reg->hccr);
3403
3404	wrt_reg_dword(addr: &reg->hccr, HCCRX_REL_RISC_PAUSE);
3405	rd_reg_dword(addr: &reg->hccr);
3406
3407	wrt_reg_dword(addr: &reg->hccr, HCCRX_CLR_RISC_RESET);
3408	mdelay(10);
3409	rd_reg_dword(addr: &reg->hccr);
3410
3411	wd = rd_reg_word(addr: &reg->mailbox0);
3412	for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3413	barrier();
3414	if (cnt) {
3415	mdelay(1);
3416	if (print && qla_chk_risc_recovery(vha))
3417	print = 0;
3418
3419	wd = rd_reg_word(addr: &reg->mailbox0);
3420	} else {
3421	rval = QLA_FUNCTION_TIMEOUT;
3422
3423	ql_log(ql_log_warn, vha, 0x015e,
3424	fmt: "RISC reset timeout\n");
3425	}
3426	}
3427
3428	if (rval == QLA_SUCCESS)
3429	set_bit(RISC_RDY_AFT_RESET, addr: &ha->fw_dump_cap_flags);
3430
3431	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3432	fmt: "Host Risc 0x%x, mailbox0 0x%x\n",
3433	rd_reg_dword(addr: &reg->hccr),
3434	rd_reg_word(addr: &reg->mailbox0));
3435
3436	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3437
3438	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3439	fmt: "Driver in %s mode\n",
3440	IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3441
3442	if (IS_NOPOLLING_TYPE(ha))
3443	ha->isp_ops->enable_intrs(ha);
3444
3445	return rval;
3446	}
3447
3448	static void
3449	qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3450	{
3451	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3452
3453	wrt_reg_dword(addr: &reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3454	*data = rd_reg_dword(addr: &reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3455	}
3456
3457	static void
3458	qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3459	{
3460	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3461
3462	wrt_reg_dword(addr: &reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3463	wrt_reg_dword(addr: &reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3464	}
3465
3466	static void
3467	qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3468	{
3469	uint32_t wd32 = 0;
3470	uint delta_msec = 100;
3471	uint elapsed_msec = 0;
3472	uint timeout_msec;
3473	ulong n;
3474
3475	if (vha->hw->pdev->subsystem_device != 0x0175 &&
3476	vha->hw->pdev->subsystem_device != 0x0240)
3477	return;
3478
3479	wrt_reg_dword(addr: &vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3480	udelay(100);
3481
3482	attempt:
3483	timeout_msec = TIMEOUT_SEMAPHORE;
3484	n = timeout_msec / delta_msec;
3485	while (n--) {
3486	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3487	qla25xx_read_risc_sema_reg(vha, data: &wd32);
3488	if (wd32 & RISC_SEMAPHORE)
3489	break;
3490	msleep(msecs: delta_msec);
3491	elapsed_msec += delta_msec;
3492	if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3493	goto force;
3494	}
3495
3496	if (!(wd32 & RISC_SEMAPHORE))
3497	goto force;
3498
3499	if (!(wd32 & RISC_SEMAPHORE_FORCE))
3500	goto acquired;
3501
3502	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3503	timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3504	n = timeout_msec / delta_msec;
3505	while (n--) {
3506	qla25xx_read_risc_sema_reg(vha, data: &wd32);
3507	if (!(wd32 & RISC_SEMAPHORE_FORCE))
3508	break;
3509	msleep(msecs: delta_msec);
3510	elapsed_msec += delta_msec;
3511	if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3512	goto force;
3513	}
3514
3515	if (wd32 & RISC_SEMAPHORE_FORCE)
3516	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3517
3518	goto attempt;
3519
3520	force:
3521	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3522
3523	acquired:
3524	return;
3525	}
3526
3527	/**
3528	* qla24xx_reset_chip() - Reset ISP24xx chip.
3529	* @vha: HA context
3530	*
3531	* Returns 0 on success.
3532	*/
3533	int
3534	qla24xx_reset_chip(scsi_qla_host_t *vha)
3535	{
3536	struct qla_hw_data *ha = vha->hw;
3537	int rval = QLA_FUNCTION_FAILED;
3538
3539	if (pci_channel_offline(pdev: ha->pdev) &&
3540	ha->flags.pci_channel_io_perm_failure) {
3541	return rval;
3542	}
3543
3544	ha->isp_ops->disable_intrs(ha);
3545
3546	qla25xx_manipulate_risc_semaphore(vha);
3547
3548	/* Perform RISC reset. */
3549	rval = qla24xx_reset_risc(vha);
3550
3551	return rval;
3552	}
3553
3554	/**
3555	* qla2x00_chip_diag() - Test chip for proper operation.
3556	* @vha: HA context
3557	*
3558	* Returns 0 on success.
3559	*/
3560	int
3561	qla2x00_chip_diag(scsi_qla_host_t *vha)
3562	{
3563	int rval;
3564	struct qla_hw_data *ha = vha->hw;
3565	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3566	unsigned long flags = 0;
3567	uint16_t data;
3568	uint32_t cnt;
3569	uint16_t mb[5];
3570	struct req_que *req = ha->req_q_map[0];
3571
3572	/* Assume a failed state */
3573	rval = QLA_FUNCTION_FAILED;
3574
3575	ql_dbg(ql_dbg_init, vha, 0x007b, fmt: "Testing device at %p.\n",
3576	&reg->flash_address);
3577
3578	spin_lock_irqsave(&ha->hardware_lock, flags);
3579
3580	/* Reset ISP chip. */
3581	wrt_reg_word(addr: &reg->ctrl_status, CSR_ISP_SOFT_RESET);
3582
3583	/*
3584	* We need to have a delay here since the card will not respond while
3585	* in reset causing an MCA on some architectures.
3586	*/
3587	udelay(20);
3588	data = qla2x00_debounce_register(addr: &reg->ctrl_status);
3589	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3590	udelay(5);
3591	data = rd_reg_word(addr: &reg->ctrl_status);
3592	barrier();
3593	}
3594
3595	if (!cnt)
3596	goto chip_diag_failed;
3597
3598	ql_dbg(ql_dbg_init, vha, 0x007c,
3599	fmt: "Reset register cleared by chip reset.\n");
3600
3601	/* Reset RISC processor. */
3602	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3603	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3604
3605	/* Workaround for QLA2312 PCI parity error */
3606	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3607	data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3608	for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3609	udelay(5);
3610	data = RD_MAILBOX_REG(ha, reg, 0);
3611	barrier();
3612	}
3613	} else
3614	udelay(10);
3615
3616	if (!cnt)
3617	goto chip_diag_failed;
3618
3619	/* Check product ID of chip */
3620	ql_dbg(ql_dbg_init, vha, 0x007d, fmt: "Checking product ID of chip.\n");
3621
3622	mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3623	mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3624	mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3625	mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3626	if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3627	mb[3] != PROD_ID_3) {
3628	ql_log(ql_log_warn, vha, 0x0062,
3629	fmt: "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3630	mb[1], mb[2], mb[3]);
3631
3632	goto chip_diag_failed;
3633	}
3634	ha->product_id[0] = mb[1];
3635	ha->product_id[1] = mb[2];
3636	ha->product_id[2] = mb[3];
3637	ha->product_id[3] = mb[4];
3638
3639	/* Adjust fw RISC transfer size */
3640	if (req->length > 1024)
3641	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3642	else
3643	ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3644	req->length;
3645
3646	if (IS_QLA2200(ha) &&
3647	RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3648	/* Limit firmware transfer size with a 2200A */
3649	ql_dbg(ql_dbg_init, vha, 0x007e, fmt: "Found QLA2200A Chip.\n");
3650
3651	ha->device_type |= DT_ISP2200A;
3652	ha->fw_transfer_size = 128;
3653	}
3654
3655	/* Wrap Incoming Mailboxes Test. */
3656	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3657
3658	ql_dbg(ql_dbg_init, vha, 0x007f, fmt: "Checking mailboxes.\n");
3659	rval = qla2x00_mbx_reg_test(vha);
3660	if (rval)
3661	ql_log(ql_log_warn, vha, 0x0080,
3662	fmt: "Failed mailbox send register test.\n");
3663	else
3664	/* Flag a successful rval */
3665	rval = QLA_SUCCESS;
3666	spin_lock_irqsave(&ha->hardware_lock, flags);
3667
3668	chip_diag_failed:
3669	if (rval)
3670	ql_log(ql_log_info, vha, 0x0081,
3671	fmt: "Chip diagnostics **** FAILED ****.\n");
3672
3673	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3674
3675	return (rval);
3676	}
3677
3678	/**
3679	* qla24xx_chip_diag() - Test ISP24xx for proper operation.
3680	* @vha: HA context
3681	*
3682	* Returns 0 on success.
3683	*/
3684	int
3685	qla24xx_chip_diag(scsi_qla_host_t *vha)
3686	{
3687	int rval;
3688	struct qla_hw_data *ha = vha->hw;
3689	struct req_que *req = ha->req_q_map[0];
3690
3691	if (IS_P3P_TYPE(ha))
3692	return QLA_SUCCESS;
3693
3694	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3695
3696	rval = qla2x00_mbx_reg_test(vha);
3697	if (rval) {
3698	ql_log(ql_log_warn, vha, 0x0082,
3699	fmt: "Failed mailbox send register test.\n");
3700	} else {
3701	/* Flag a successful rval */
3702	rval = QLA_SUCCESS;
3703	}
3704
3705	return rval;
3706	}
3707
3708	static void
3709	qla2x00_alloc_fce_trace(scsi_qla_host_t *vha)
3710	{
3711	dma_addr_t tc_dma;
3712	void *tc;
3713	struct qla_hw_data *ha = vha->hw;
3714
3715	if (!IS_FWI2_CAPABLE(ha))
3716	return;
3717
3718	if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3719	!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3720	return;
3721
3722	if (ha->fce) {
3723	ql_dbg(ql_dbg_init, vha, 0x00bd,
3724	fmt: "%s: FCE Mem is already allocated.\n",
3725	__func__);
3726	return;
3727	}
3728
3729	/* Allocate memory for Fibre Channel Event Buffer. */
3730	tc = dma_alloc_coherent(dev: &ha->pdev->dev, FCE_SIZE, dma_handle: &tc_dma,
3731	GFP_KERNEL);
3732	if (!tc) {
3733	ql_log(ql_log_warn, vha, 0x00be,
3734	fmt: "Unable to allocate (%d KB) for FCE.\n",
3735	FCE_SIZE / 1024);
3736	return;
3737	}
3738
3739	ql_dbg(ql_dbg_init, vha, 0x00c0,
3740	fmt: "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3741
3742	ha->fce_dma = tc_dma;
3743	ha->fce = tc;
3744	ha->fce_bufs = FCE_NUM_BUFFERS;
3745	}
3746
3747	static void
3748	qla2x00_alloc_eft_trace(scsi_qla_host_t *vha)
3749	{
3750	dma_addr_t tc_dma;
3751	void *tc;
3752	struct qla_hw_data *ha = vha->hw;
3753
3754	if (!IS_FWI2_CAPABLE(ha))
3755	return;
3756
3757	if (ha->eft) {
3758	ql_dbg(ql_dbg_init, vha, 0x00bd,
3759	fmt: "%s: EFT Mem is already allocated.\n",
3760	__func__);
3761	return;
3762	}
3763
3764	/* Allocate memory for Extended Trace Buffer. */
3765	tc = dma_alloc_coherent(dev: &ha->pdev->dev, EFT_SIZE, dma_handle: &tc_dma,
3766	GFP_KERNEL);
3767	if (!tc) {
3768	ql_log(ql_log_warn, vha, 0x00c1,
3769	fmt: "Unable to allocate (%d KB) for EFT.\n",
3770	EFT_SIZE / 1024);
3771	return;
3772	}
3773
3774	ql_dbg(ql_dbg_init, vha, 0x00c3,
3775	fmt: "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3776
3777	ha->eft_dma = tc_dma;
3778	ha->eft = tc;
3779	}
3780
3781	void
3782	qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3783	{
3784	uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3785	eft_size, fce_size, mq_size;
3786	struct qla_hw_data *ha = vha->hw;
3787	struct req_que *req = ha->req_q_map[0];
3788	struct rsp_que *rsp = ha->rsp_q_map[0];
3789	struct qla2xxx_fw_dump *fw_dump;
3790
3791	if (ha->fw_dump) {
3792	ql_dbg(ql_dbg_init, vha, 0x00bd,
3793	fmt: "Firmware dump already allocated.\n");
3794	return;
3795	}
3796
3797	ha->fw_dumped = 0;
3798	ha->fw_dump_cap_flags = 0;
3799	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3800	req_q_size = rsp_q_size = 0;
3801
3802	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3803	fixed_size = sizeof(struct qla2100_fw_dump);
3804	} else if (IS_QLA23XX(ha)) {
3805	fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3806	mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3807	sizeof(uint16_t);
3808	} else if (IS_FWI2_CAPABLE(ha)) {
3809	if (IS_QLA83XX(ha))
3810	fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3811	else if (IS_QLA81XX(ha))
3812	fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3813	else if (IS_QLA25XX(ha))
3814	fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3815	else
3816	fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3817
3818	mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3819	sizeof(uint32_t);
3820	if (ha->mqenable) {
3821	if (!IS_QLA83XX(ha))
3822	mq_size = sizeof(struct qla2xxx_mq_chain);
3823	/*
3824	* Allocate maximum buffer size for all queues - Q0.
3825	* Resizing must be done at end-of-dump processing.
3826	*/
3827	mq_size += (ha->max_req_queues - 1) *
3828	(req->length * sizeof(request_t));
3829	mq_size += (ha->max_rsp_queues - 1) *
3830	(rsp->length * sizeof(response_t));
3831	}
3832	if (ha->tgt.atio_ring)
3833	mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3834
3835	qla2x00_alloc_fce_trace(vha);
3836	if (ha->fce)
3837	fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3838	qla2x00_alloc_eft_trace(vha);
3839	if (ha->eft)
3840	eft_size = EFT_SIZE;
3841	}
3842
3843	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3844	struct fwdt *fwdt = ha->fwdt;
3845	uint j;
3846
3847	for (j = 0; j < 2; j++, fwdt++) {
3848	if (!fwdt->template) {
3849	ql_dbg(ql_dbg_init, vha, 0x00ba,
3850	fmt: "-> fwdt%u no template\n", j);
3851	continue;
3852	}
3853	ql_dbg(ql_dbg_init, vha, 0x00fa,
3854	fmt: "-> fwdt%u calculating fwdump size...\n", j);
3855	fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3856	vha, fwdt->template);
3857	ql_dbg(ql_dbg_init, vha, 0x00fa,
3858	fmt: "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3859	j, fwdt->dump_size);
3860	dump_size += fwdt->dump_size;
3861	}
3862	/* Add space for spare MPI fw dump. */
3863	dump_size += ha->fwdt[1].dump_size;
3864	} else {
3865	req_q_size = req->length * sizeof(request_t);
3866	rsp_q_size = rsp->length * sizeof(response_t);
3867	dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3868	dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3869	+ eft_size;
3870	ha->chain_offset = dump_size;
3871	dump_size += mq_size + fce_size;
3872	if (ha->exchoffld_buf)
3873	dump_size += sizeof(struct qla2xxx_offld_chain) +
3874	ha->exchoffld_size;
3875	if (ha->exlogin_buf)
3876	dump_size += sizeof(struct qla2xxx_offld_chain) +
3877	ha->exlogin_size;
3878	}
3879
3880	if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3881
3882	ql_dbg(ql_dbg_init, vha, 0x00c5,
3883	fmt: "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3884	__func__, dump_size, ha->fw_dump_len,
3885	ha->fw_dump_alloc_len);
3886
3887	fw_dump = vmalloc(size: dump_size);
3888	if (!fw_dump) {
3889	ql_log(ql_log_warn, vha, 0x00c4,
3890	fmt: "Unable to allocate (%d KB) for firmware dump.\n",
3891	dump_size / 1024);
3892	} else {
3893	mutex_lock(&ha->optrom_mutex);
3894	if (ha->fw_dumped) {
3895	memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3896	vfree(addr: ha->fw_dump);
3897	ha->fw_dump = fw_dump;
3898	ha->fw_dump_alloc_len = dump_size;
3899	ql_dbg(ql_dbg_init, vha, 0x00c5,
3900	fmt: "Re-Allocated (%d KB) and save firmware dump.\n",
3901	dump_size / 1024);
3902	} else {
3903	vfree(addr: ha->fw_dump);
3904	ha->fw_dump = fw_dump;
3905
3906	ha->fw_dump_len = ha->fw_dump_alloc_len =
3907	dump_size;
3908	ql_dbg(ql_dbg_init, vha, 0x00c5,
3909	fmt: "Allocated (%d KB) for firmware dump.\n",
3910	dump_size / 1024);
3911
3912	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3913	ha->mpi_fw_dump = (char *)fw_dump +
3914	ha->fwdt[1].dump_size;
3915	mutex_unlock(lock: &ha->optrom_mutex);
3916	return;
3917	}
3918
3919	ha->fw_dump->signature[0] = 'Q';
3920	ha->fw_dump->signature[1] = 'L';
3921	ha->fw_dump->signature[2] = 'G';
3922	ha->fw_dump->signature[3] = 'C';
3923	ha->fw_dump->version = htonl(1);
3924
3925	ha->fw_dump->fixed_size = htonl(fixed_size);
3926	ha->fw_dump->mem_size = htonl(mem_size);
3927	ha->fw_dump->req_q_size = htonl(req_q_size);
3928	ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3929
3930	ha->fw_dump->eft_size = htonl(eft_size);
3931	ha->fw_dump->eft_addr_l =
3932	htonl(LSD(ha->eft_dma));
3933	ha->fw_dump->eft_addr_h =
3934	htonl(MSD(ha->eft_dma));
3935
3936	ha->fw_dump->header_size =
3937	htonl(offsetof
3938	(struct qla2xxx_fw_dump, isp));
3939	}
3940	mutex_unlock(lock: &ha->optrom_mutex);
3941	}
3942	}
3943	}
3944
3945	static int
3946	qla81xx_mpi_sync(scsi_qla_host_t *vha)
3947	{
3948	#define MPS_MASK 0xe0
3949	int rval;
3950	uint16_t dc;
3951	uint32_t dw;
3952
3953	if (!IS_QLA81XX(vha->hw))
3954	return QLA_SUCCESS;
3955
3956	rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3957	if (rval != QLA_SUCCESS) {
3958	ql_log(ql_log_warn, vha, 0x0105,
3959	fmt: "Unable to acquire semaphore.\n");
3960	goto done;
3961	}
3962
3963	pci_read_config_word(dev: vha->hw->pdev, where: 0x54, val: &dc);
3964	rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3965	if (rval != QLA_SUCCESS) {
3966	ql_log(ql_log_warn, vha, 0x0067, fmt: "Unable to read sync.\n");
3967	goto done_release;
3968	}
3969
3970	dc &= MPS_MASK;
3971	if (dc == (dw & MPS_MASK))
3972	goto done_release;
3973
3974	dw &= ~MPS_MASK;
3975	dw |= dc;
3976	rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3977	if (rval != QLA_SUCCESS) {
3978	ql_log(ql_log_warn, vha, 0x0114, fmt: "Unable to gain sync.\n");
3979	}
3980
3981	done_release:
3982	rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3983	if (rval != QLA_SUCCESS) {
3984	ql_log(ql_log_warn, vha, 0x006d,
3985	fmt: "Unable to release semaphore.\n");
3986	}
3987
3988	done:
3989	return rval;
3990	}
3991
3992	int
3993	qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3994	{
3995	/* Don't try to reallocate the array */
3996	if (req->outstanding_cmds)
3997	return QLA_SUCCESS;
3998
3999	if (!IS_FWI2_CAPABLE(ha))
4000	req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
4001	else {
4002	if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
4003	req->num_outstanding_cmds = ha->cur_fw_xcb_count;
4004	else
4005	req->num_outstanding_cmds = ha->cur_fw_iocb_count;
4006	}
4007
4008	req->outstanding_cmds = kcalloc(n: req->num_outstanding_cmds,
4009	size: sizeof(srb_t *),
4010	GFP_KERNEL);
4011
4012	if (!req->outstanding_cmds) {
4013	/*
4014	* Try to allocate a minimal size just so we can get through
4015	* initialization.
4016	*/
4017	req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
4018	req->outstanding_cmds = kcalloc(n: req->num_outstanding_cmds,
4019	size: sizeof(srb_t *),
4020	GFP_KERNEL);
4021
4022	if (!req->outstanding_cmds) {
4023	ql_log(ql_log_fatal, NULL, 0x0126,
4024	fmt: "Failed to allocate memory for "
4025	"outstanding_cmds for req_que %p.\n", req);
4026	req->num_outstanding_cmds = 0;
4027	return QLA_FUNCTION_FAILED;
4028	}
4029	}
4030
4031	return QLA_SUCCESS;
4032	}
4033
4034	#define PRINT_FIELD(_field, _flag, _str) { \
4035	if (a0->_field & _flag) {\
4036	if (p) {\
4037	strcat(ptr, "|");\
4038	ptr++;\
4039	leftover--;\
4040	} \
4041	len = snprintf(ptr, leftover, "%s", _str); \
4042	p = 1;\
4043	leftover -= len;\
4044	ptr += len; \
4045	} \
4046	}
4047
4048	static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
4049	{
4050	#define STR_LEN 64
4051	struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
4052	u8 str[STR_LEN], *ptr, p;
4053	int leftover, len;
4054
4055	memset(str, 0, STR_LEN);
4056	snprintf(buf: str, SFF_VEN_NAME_LEN+1, fmt: a0->vendor_name);
4057	ql_dbg(ql_dbg_init, vha, 0x015a,
4058	fmt: "SFP MFG Name: %s\n", str);
4059
4060	memset(str, 0, STR_LEN);
4061	snprintf(buf: str, SFF_PART_NAME_LEN+1, fmt: a0->vendor_pn);
4062	ql_dbg(ql_dbg_init, vha, 0x015c,
4063	fmt: "SFP Part Name: %s\n", str);
4064
4065	/* media */
4066	memset(str, 0, STR_LEN);
4067	ptr = str;
4068	leftover = STR_LEN;
4069	p = len = 0;
4070	PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
4071	PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
4072	PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
4073	PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
4074	PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
4075	PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
4076	PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
4077	ql_dbg(ql_dbg_init, vha, 0x0160,
4078	fmt: "SFP Media: %s\n", str);
4079
4080	/* link length */
4081	memset(str, 0, STR_LEN);
4082	ptr = str;
4083	leftover = STR_LEN;
4084	p = len = 0;
4085	PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
4086	PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
4087	PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
4088	PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
4089	PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
4090	ql_dbg(ql_dbg_init, vha, 0x0196,
4091	fmt: "SFP Link Length: %s\n", str);
4092
4093	memset(str, 0, STR_LEN);
4094	ptr = str;
4095	leftover = STR_LEN;
4096	p = len = 0;
4097	PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
4098	PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
4099	PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
4100	PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
4101	PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
4102	ql_dbg(ql_dbg_init, vha, 0x016e,
4103	fmt: "SFP FC Link Tech: %s\n", str);
4104
4105	if (a0->length_km)
4106	ql_dbg(ql_dbg_init, vha, 0x016f,
4107	fmt: "SFP Distant: %d km\n", a0->length_km);
4108	if (a0->length_100m)
4109	ql_dbg(ql_dbg_init, vha, 0x0170,
4110	fmt: "SFP Distant: %d m\n", a0->length_100m*100);
4111	if (a0->length_50um_10m)
4112	ql_dbg(ql_dbg_init, vha, 0x0189,
4113	fmt: "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
4114	if (a0->length_62um_10m)
4115	ql_dbg(ql_dbg_init, vha, 0x018a,
4116	fmt: "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
4117	if (a0->length_om4_10m)
4118	ql_dbg(ql_dbg_init, vha, 0x0194,
4119	fmt: "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
4120	if (a0->length_om3_10m)
4121	ql_dbg(ql_dbg_init, vha, 0x0195,
4122	fmt: "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
4123	}
4124
4125
4126	/**
4127	* qla24xx_detect_sfp()
4128	*
4129	* @vha: adapter state pointer.
4130	*
4131	* @return
4132	* 0 -- Configure firmware to use short-range settings -- normal
4133	* buffer-to-buffer credits.
4134	*
4135	* 1 -- Configure firmware to use long-range settings -- extra
4136	* buffer-to-buffer credits should be allocated with
4137	* ha->lr_distance containing distance settings from NVRAM or SFP
4138	* (if supported).
4139	*/
4140	int
4141	qla24xx_detect_sfp(scsi_qla_host_t *vha)
4142	{
4143	int rc, used_nvram;
4144	struct sff_8247_a0 *a;
4145	struct qla_hw_data *ha = vha->hw;
4146	struct nvram_81xx *nv = ha->nvram;
4147	#define LR_DISTANCE_UNKNOWN 2
4148	static const char * const types[] = { "Short", "Long" };
4149	static const char * const lengths[] = { "(10km)", "(5km)", "" };
4150	u8 ll = 0;
4151
4152	/* Seed with NVRAM settings. */
4153	used_nvram = 0;
4154	ha->flags.lr_detected = 0;
4155	if (IS_BPM_RANGE_CAPABLE(ha) &&
4156	(nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
4157	used_nvram = 1;
4158	ha->flags.lr_detected = 1;
4159	ha->lr_distance =
4160	(nv->enhanced_features >> LR_DIST_NV_POS)
4161	& LR_DIST_NV_MASK;
4162	}
4163
4164	if (!IS_BPM_ENABLED(vha))
4165	goto out;
4166	/* Determine SR/LR capabilities of SFP/Transceiver. */
4167	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
4168	if (rc)
4169	goto out;
4170
4171	used_nvram = 0;
4172	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
4173	qla2xxx_print_sfp_info(vha);
4174
4175	ha->flags.lr_detected = 0;
4176	ll = a->fc_ll_cc7;
4177	if (ll & FC_LL_VL || ll & FC_LL_L) {
4178	/* Long range, track length. */
4179	ha->flags.lr_detected = 1;
4180
4181	if (a->length_km > 5 || a->length_100m > 50)
4182	ha->lr_distance = LR_DISTANCE_10K;
4183	else
4184	ha->lr_distance = LR_DISTANCE_5K;
4185	}
4186
4187	out:
4188	ql_dbg(ql_dbg_async, vha, 0x507b,
4189	fmt: "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
4190	types[ha->flags.lr_detected],
4191	ha->flags.lr_detected ? lengths[ha->lr_distance] :
4192	lengths[LR_DISTANCE_UNKNOWN],
4193	used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
4194	return ha->flags.lr_detected;
4195	}
4196
4197	static void __qla_adjust_iocb_limit(struct qla_qpair *qpair)
4198	{
4199	u8 num_qps;
4200	u16 limit;
4201	struct qla_hw_data *ha = qpair->vha->hw;
4202
4203	num_qps = ha->num_qpairs + 1;
4204	limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4205
4206	qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
4207	qpair->fwres.iocbs_limit = limit;
4208	qpair->fwres.iocbs_qp_limit = limit / num_qps;
4209
4210	qpair->fwres.exch_total = ha->orig_fw_xcb_count;
4211	qpair->fwres.exch_limit = (ha->orig_fw_xcb_count *
4212	QLA_IOCB_PCT_LIMIT) / 100;
4213	}
4214
4215	void qla_init_iocb_limit(scsi_qla_host_t *vha)
4216	{
4217	u8 i;
4218	struct qla_hw_data *ha = vha->hw;
4219
4220	__qla_adjust_iocb_limit(qpair: ha->base_qpair);
4221	ha->base_qpair->fwres.iocbs_used = 0;
4222	ha->base_qpair->fwres.exch_used = 0;
4223
4224	for (i = 0; i < ha->max_qpairs; i++) {
4225	if (ha->queue_pair_map[i]) {
4226	__qla_adjust_iocb_limit(qpair: ha->queue_pair_map[i]);
4227	ha->queue_pair_map[i]->fwres.iocbs_used = 0;
4228	ha->queue_pair_map[i]->fwres.exch_used = 0;
4229	}
4230	}
4231
4232	ha->fwres.iocb_total = ha->orig_fw_iocb_count;
4233	ha->fwres.iocb_limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4234	ha->fwres.exch_total = ha->orig_fw_xcb_count;
4235	ha->fwres.exch_limit = (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100;
4236
4237	atomic_set(v: &ha->fwres.iocb_used, i: 0);
4238	atomic_set(v: &ha->fwres.exch_used, i: 0);
4239	}
4240
4241	void qla_adjust_iocb_limit(scsi_qla_host_t *vha)
4242	{
4243	u8 i;
4244	struct qla_hw_data *ha = vha->hw;
4245
4246	__qla_adjust_iocb_limit(qpair: ha->base_qpair);
4247
4248	for (i = 0; i < ha->max_qpairs; i++) {
4249	if (ha->queue_pair_map[i])
4250	__qla_adjust_iocb_limit(qpair: ha->queue_pair_map[i]);
4251	}
4252	}
4253
4254	/**
4255	* qla2x00_setup_chip() - Load and start RISC firmware.
4256	* @vha: HA context
4257	*
4258	* Returns 0 on success.
4259	*/
4260	static int
4261	qla2x00_setup_chip(scsi_qla_host_t *vha)
4262	{
4263	int rval;
4264	uint32_t srisc_address = 0;
4265	struct qla_hw_data *ha = vha->hw;
4266	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4267	unsigned long flags;
4268	int done_once = 0;
4269
4270	if (IS_P3P_TYPE(ha)) {
4271	rval = ha->isp_ops->load_risc(vha, &srisc_address);
4272	if (rval == QLA_SUCCESS) {
4273	qla2x00_stop_firmware(vha);
4274	goto enable_82xx_npiv;
4275	} else
4276	goto failed;
4277	}
4278
4279	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4280	/* Disable SRAM, Instruction RAM and GP RAM parity. */
4281	spin_lock_irqsave(&ha->hardware_lock, flags);
4282	wrt_reg_word(addr: &reg->hccr, data: (HCCR_ENABLE_PARITY + 0x0));
4283	rd_reg_word(addr: &reg->hccr);
4284	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4285	}
4286
4287	qla81xx_mpi_sync(vha);
4288
4289	execute_fw_with_lr:
4290	/* Load firmware sequences */
4291	rval = ha->isp_ops->load_risc(vha, &srisc_address);
4292	if (rval == QLA_SUCCESS) {
4293	ql_dbg(ql_dbg_init, vha, 0x00c9,
4294	fmt: "Verifying Checksum of loaded RISC code.\n");
4295
4296	rval = qla2x00_verify_checksum(vha, srisc_address);
4297	if (rval == QLA_SUCCESS) {
4298	/* Start firmware execution. */
4299	ql_dbg(ql_dbg_init, vha, 0x00ca,
4300	fmt: "Starting firmware.\n");
4301
4302	if (ql2xexlogins)
4303	ha->flags.exlogins_enabled = 1;
4304
4305	if (qla_is_exch_offld_enabled(vha))
4306	ha->flags.exchoffld_enabled = 1;
4307
4308	rval = qla2x00_execute_fw(vha, srisc_address);
4309	/* Retrieve firmware information. */
4310	if (rval == QLA_SUCCESS) {
4311	/* Enable BPM support? */
4312	if (!done_once++ && qla24xx_detect_sfp(vha)) {
4313	ql_dbg(ql_dbg_init, vha, 0x00ca,
4314	fmt: "Re-starting firmware -- BPM.\n");
4315	/* Best-effort - re-init. */
4316	ha->isp_ops->reset_chip(vha);
4317	ha->isp_ops->chip_diag(vha);
4318	goto execute_fw_with_lr;
4319	}
4320
4321	if (IS_ZIO_THRESHOLD_CAPABLE(ha))
4322	qla27xx_set_zio_threshold(vha,
4323	ha->last_zio_threshold);
4324
4325	rval = qla2x00_set_exlogins_buffer(vha);
4326	if (rval != QLA_SUCCESS)
4327	goto failed;
4328
4329	rval = qla2x00_set_exchoffld_buffer(vha);
4330	if (rval != QLA_SUCCESS)
4331	goto failed;
4332
4333	enable_82xx_npiv:
4334	if (IS_P3P_TYPE(ha))
4335	qla82xx_check_md_needed(vha);
4336	else
4337	rval = qla2x00_get_fw_version(vha);
4338	if (rval != QLA_SUCCESS)
4339	goto failed;
4340	ha->flags.npiv_supported = 0;
4341	if (IS_QLA2XXX_MIDTYPE(ha) &&
4342	(ha->fw_attributes & BIT_2)) {
4343	ha->flags.npiv_supported = 1;
4344	if ((!ha->max_npiv_vports) ||
4345	((ha->max_npiv_vports + 1) %
4346	MIN_MULTI_ID_FABRIC))
4347	ha->max_npiv_vports =
4348	MIN_MULTI_ID_FABRIC - 1;
4349	}
4350	qla2x00_get_resource_cnts(vha);
4351	qla_init_iocb_limit(vha);
4352
4353	/*
4354	* Allocate the array of outstanding commands
4355	* now that we know the firmware resources.
4356	*/
4357	rval = qla2x00_alloc_outstanding_cmds(ha,
4358	req: vha->req);
4359	if (rval != QLA_SUCCESS)
4360	goto failed;
4361
4362	if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
4363	qla2x00_alloc_fw_dump(vha);
4364
4365	qla_enable_fce_trace(vha);
4366	qla_enable_eft_trace(vha);
4367	} else {
4368	goto failed;
4369	}
4370	} else {
4371	ql_log(ql_log_fatal, vha, 0x00cd,
4372	fmt: "ISP Firmware failed checksum.\n");
4373	goto failed;
4374	}
4375
4376	/* Enable PUREX PASSTHRU */
4377	if (ql2xrdpenable || ha->flags.scm_supported_f ||
4378	ha->flags.edif_enabled)
4379	qla25xx_set_els_cmds_supported(vha);
4380	} else
4381	goto failed;
4382
4383	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4384	/* Enable proper parity. */
4385	spin_lock_irqsave(&ha->hardware_lock, flags);
4386	if (IS_QLA2300(ha))
4387	/* SRAM parity */
4388	wrt_reg_word(addr: &reg->hccr, HCCR_ENABLE_PARITY + 0x1);
4389	else
4390	/* SRAM, Instruction RAM and GP RAM parity */
4391	wrt_reg_word(addr: &reg->hccr, HCCR_ENABLE_PARITY + 0x7);
4392	rd_reg_word(addr: &reg->hccr);
4393	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4394	}
4395
4396	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4397	ha->flags.fac_supported = 1;
4398	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
4399	uint32_t size;
4400
4401	rval = qla81xx_fac_get_sector_size(vha, &size);
4402	if (rval == QLA_SUCCESS) {
4403	ha->flags.fac_supported = 1;
4404	ha->fdt_block_size = size << 2;
4405	} else {
4406	ql_log(ql_log_warn, vha, 0x00ce,
4407	fmt: "Unsupported FAC firmware (%d.%02d.%02d).\n",
4408	ha->fw_major_version, ha->fw_minor_version,
4409	ha->fw_subminor_version);
4410
4411	if (IS_QLA83XX(ha)) {
4412	ha->flags.fac_supported = 0;
4413	rval = QLA_SUCCESS;
4414	}
4415	}
4416	}
4417	failed:
4418	if (rval) {
4419	ql_log(ql_log_fatal, vha, 0x00cf,
4420	fmt: "Setup chip ****FAILED****.\n");
4421	}
4422
4423	return (rval);
4424	}
4425
4426	/**
4427	* qla2x00_init_response_q_entries() - Initializes response queue entries.
4428	* @rsp: response queue
4429	*
4430	* Beginning of request ring has initialization control block already built
4431	* by nvram config routine.
4432	*
4433	* Returns 0 on success.
4434	*/
4435	void
4436	qla2x00_init_response_q_entries(struct rsp_que *rsp)
4437	{
4438	uint16_t cnt;
4439	response_t *pkt;
4440
4441	rsp->ring_ptr = rsp->ring;
4442	rsp->ring_index = 0;
4443	rsp->status_srb = NULL;
4444	pkt = rsp->ring_ptr;
4445	for (cnt = 0; cnt < rsp->length; cnt++) {
4446	pkt->signature = RESPONSE_PROCESSED;
4447	pkt++;
4448	}
4449	}
4450
4451	/**
4452	* qla2x00_update_fw_options() - Read and process firmware options.
4453	* @vha: HA context
4454	*
4455	* Returns 0 on success.
4456	*/
4457	void
4458	qla2x00_update_fw_options(scsi_qla_host_t *vha)
4459	{
4460	uint16_t swing, emphasis, tx_sens, rx_sens;
4461	struct qla_hw_data *ha = vha->hw;
4462
4463	memset(ha->fw_options, 0, sizeof(ha->fw_options));
4464	qla2x00_get_fw_options(vha, ha->fw_options);
4465
4466	if (IS_QLA2100(ha) || IS_QLA2200(ha))
4467	return;
4468
4469	/* Serial Link options. */
4470	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4471	fmt: "Serial link options.\n");
4472	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4473	ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4474
4475	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4476	if (ha->fw_seriallink_options[3] & BIT_2) {
4477	ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4478
4479	/* 1G settings */
4480	swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4481	emphasis = (ha->fw_seriallink_options[2] &
4482	(BIT_4 | BIT_3)) >> 3;
4483	tx_sens = ha->fw_seriallink_options[0] &
4484	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4485	rx_sens = (ha->fw_seriallink_options[0] &
4486	(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4487	ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4488	if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4489	if (rx_sens == 0x0)
4490	rx_sens = 0x3;
4491	ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4492	} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4493	ha->fw_options[10] |= BIT_5 |
4494	((rx_sens & (BIT_1 | BIT_0)) << 2) |
4495	(tx_sens & (BIT_1 | BIT_0));
4496
4497	/* 2G settings */
4498	swing = (ha->fw_seriallink_options[2] &
4499	(BIT_7 | BIT_6 | BIT_5)) >> 5;
4500	emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4501	tx_sens = ha->fw_seriallink_options[1] &
4502	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4503	rx_sens = (ha->fw_seriallink_options[1] &
4504	(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4505	ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4506	if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4507	if (rx_sens == 0x0)
4508	rx_sens = 0x3;
4509	ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4510	} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4511	ha->fw_options[11] |= BIT_5 |
4512	((rx_sens & (BIT_1 | BIT_0)) << 2) |
4513	(tx_sens & (BIT_1 | BIT_0));
4514	}
4515
4516	/* FCP2 options. */
4517	/* Return command IOCBs without waiting for an ABTS to complete. */
4518	ha->fw_options[3] |= BIT_13;
4519
4520	/* LED scheme. */
4521	if (ha->flags.enable_led_scheme)
4522	ha->fw_options[2] |= BIT_12;
4523
4524	/* Detect ISP6312. */
4525	if (IS_QLA6312(ha))
4526	ha->fw_options[2] |= BIT_13;
4527
4528	/* Set Retry FLOGI in case of P2P connection */
4529	if (ha->operating_mode == P2P) {
4530	ha->fw_options[2] |= BIT_3;
4531	ql_dbg(ql_dbg_disc, vha, 0x2100,
4532	fmt: "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4533	__func__, ha->fw_options[2]);
4534	}
4535
4536	/* Update firmware options. */
4537	qla2x00_set_fw_options(vha, ha->fw_options);
4538	}
4539
4540	void
4541	qla24xx_update_fw_options(scsi_qla_host_t *vha)
4542	{
4543	int rval;
4544	struct qla_hw_data *ha = vha->hw;
4545
4546	if (IS_P3P_TYPE(ha))
4547	return;
4548
4549	/* Hold status IOCBs until ABTS response received. */
4550	if (ql2xfwholdabts)
4551	ha->fw_options[3] |= BIT_12;
4552
4553	/* Set Retry FLOGI in case of P2P connection */
4554	if (ha->operating_mode == P2P) {
4555	ha->fw_options[2] |= BIT_3;
4556	ql_dbg(ql_dbg_disc, vha, 0x2101,
4557	fmt: "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4558	__func__, ha->fw_options[2]);
4559	}
4560
4561	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
4562	if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4563	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4564	if (qla_tgt_mode_enabled(ha: vha) ||
4565	qla_dual_mode_enabled(ha: vha))
4566	ha->fw_options[2] |= BIT_11;
4567	else
4568	ha->fw_options[2] &= ~BIT_11;
4569	}
4570
4571	if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4572	IS_QLA28XX(ha)) {
4573	/*
4574	* Tell FW to track each exchange to prevent
4575	* driver from using stale exchange.
4576	*/
4577	if (qla_tgt_mode_enabled(ha: vha) ||
4578	qla_dual_mode_enabled(ha: vha))
4579	ha->fw_options[2] |= BIT_4;
4580	else
4581	ha->fw_options[2] &= ~(BIT_4);
4582
4583	/* Reserve 1/2 of emergency exchanges for ELS.*/
4584	if (qla2xuseresexchforels)
4585	ha->fw_options[2] |= BIT_8;
4586	else
4587	ha->fw_options[2] &= ~BIT_8;
4588
4589	/*
4590	* N2N: set Secure=1 for PLOGI ACC and
4591	* fw shal not send PRLI after PLOGI Acc
4592	*/
4593	if (ha->flags.edif_enabled &&
4594	DBELL_ACTIVE(vha)) {
4595	ha->fw_options[3] |= BIT_15;
4596	ha->flags.n2n_fw_acc_sec = 1;
4597	} else {
4598	ha->fw_options[3] &= ~BIT_15;
4599	ha->flags.n2n_fw_acc_sec = 0;
4600	}
4601	}
4602
4603	if (ql2xrdpenable || ha->flags.scm_supported_f ||
4604	ha->flags.edif_enabled)
4605	ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4606
4607	/* Enable Async 8130/8131 events -- transceiver insertion/removal */
4608	if (IS_BPM_RANGE_CAPABLE(ha))
4609	ha->fw_options[3] |= BIT_10;
4610
4611	ql_dbg(ql_dbg_init, vha, 0x00e8,
4612	fmt: "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4613	__func__, ha->fw_options[1], ha->fw_options[2],
4614	ha->fw_options[3], vha->host->active_mode);
4615
4616	if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4617	qla2x00_set_fw_options(vha, ha->fw_options);
4618
4619	/* Update Serial Link options. */
4620	if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4621	return;
4622
4623	rval = qla2x00_set_serdes_params(vha,
4624	le16_to_cpu(ha->fw_seriallink_options24[1]),
4625	le16_to_cpu(ha->fw_seriallink_options24[2]),
4626	le16_to_cpu(ha->fw_seriallink_options24[3]));
4627	if (rval != QLA_SUCCESS) {
4628	ql_log(ql_log_warn, vha, 0x0104,
4629	fmt: "Unable to update Serial Link options (%x).\n", rval);
4630	}
4631	}
4632
4633	void
4634	qla2x00_config_rings(struct scsi_qla_host *vha)
4635	{
4636	struct qla_hw_data *ha = vha->hw;
4637	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4638	struct req_que *req = ha->req_q_map[0];
4639	struct rsp_que *rsp = ha->rsp_q_map[0];
4640
4641	/* Setup ring parameters in initialization control block. */
4642	ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4643	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4644	ha->init_cb->request_q_length = cpu_to_le16(req->length);
4645	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4646	put_unaligned_le64(val: req->dma, p: &ha->init_cb->request_q_address);
4647	put_unaligned_le64(val: rsp->dma, p: &ha->init_cb->response_q_address);
4648
4649	wrt_reg_word(ISP_REQ_Q_IN(ha, reg), data: 0);
4650	wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), data: 0);
4651	wrt_reg_word(ISP_RSP_Q_IN(ha, reg), data: 0);
4652	wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), data: 0);
4653	rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4654	}
4655
4656	void
4657	qla24xx_config_rings(struct scsi_qla_host *vha)
4658	{
4659	struct qla_hw_data *ha = vha->hw;
4660	device_reg_t *reg = ISP_QUE_REG(ha, 0);
4661	struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4662	struct qla_msix_entry *msix;
4663	struct init_cb_24xx *icb;
4664	uint16_t rid = 0;
4665	struct req_que *req = ha->req_q_map[0];
4666	struct rsp_que *rsp = ha->rsp_q_map[0];
4667
4668	/* Setup ring parameters in initialization control block. */
4669	icb = (struct init_cb_24xx *)ha->init_cb;
4670	icb->request_q_outpointer = cpu_to_le16(0);
4671	icb->response_q_inpointer = cpu_to_le16(0);
4672	icb->request_q_length = cpu_to_le16(req->length);
4673	icb->response_q_length = cpu_to_le16(rsp->length);
4674	put_unaligned_le64(val: req->dma, p: &icb->request_q_address);
4675	put_unaligned_le64(val: rsp->dma, p: &icb->response_q_address);
4676
4677	/* Setup ATIO queue dma pointers for target mode */
4678	icb->atio_q_inpointer = cpu_to_le16(0);
4679	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4680	put_unaligned_le64(val: ha->tgt.atio_dma, p: &icb->atio_q_address);
4681
4682	if (IS_SHADOW_REG_CAPABLE(ha))
4683	icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4684
4685	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4686	IS_QLA28XX(ha)) {
4687	icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4688	icb->rid = cpu_to_le16(rid);
4689	if (ha->flags.msix_enabled) {
4690	msix = &ha->msix_entries[1];
4691	ql_dbg(ql_dbg_init, vha, 0x0019,
4692	fmt: "Registering vector 0x%x for base que.\n",
4693	msix->entry);
4694	icb->msix = cpu_to_le16(msix->entry);
4695	}
4696	/* Use alternate PCI bus number */
4697	if (MSB(rid))
4698	icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4699	/* Use alternate PCI devfn */
4700	if (LSB(rid))
4701	icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4702
4703	/* Use Disable MSIX Handshake mode for capable adapters */
4704	if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4705	(ha->flags.msix_enabled)) {
4706	icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4707	ha->flags.disable_msix_handshake = 1;
4708	ql_dbg(ql_dbg_init, vha, 0x00fe,
4709	fmt: "MSIX Handshake Disable Mode turned on.\n");
4710	} else {
4711	icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4712	}
4713	icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4714
4715	wrt_reg_dword(addr: &reg->isp25mq.req_q_in, data: 0);
4716	wrt_reg_dword(addr: &reg->isp25mq.req_q_out, data: 0);
4717	wrt_reg_dword(addr: &reg->isp25mq.rsp_q_in, data: 0);
4718	wrt_reg_dword(addr: &reg->isp25mq.rsp_q_out, data: 0);
4719	} else {
4720	wrt_reg_dword(addr: &reg->isp24.req_q_in, data: 0);
4721	wrt_reg_dword(addr: &reg->isp24.req_q_out, data: 0);
4722	wrt_reg_dword(addr: &reg->isp24.rsp_q_in, data: 0);
4723	wrt_reg_dword(addr: &reg->isp24.rsp_q_out, data: 0);
4724	}
4725
4726	qlt_24xx_config_rings(vha);
4727
4728	/* If the user has configured the speed, set it here */
4729	if (ha->set_data_rate) {
4730	ql_dbg(ql_dbg_init, vha, 0x00fd,
4731	fmt: "Speed set by user : %s Gbps \n",
4732	qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4733	icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4734	}
4735
4736	/* PCI posting */
4737	rd_reg_word(addr: &ioreg->hccr);
4738	}
4739
4740	/**
4741	* qla2x00_init_rings() - Initializes firmware.
4742	* @vha: HA context
4743	*
4744	* Beginning of request ring has initialization control block already built
4745	* by nvram config routine.
4746	*
4747	* Returns 0 on success.
4748	*/
4749	int
4750	qla2x00_init_rings(scsi_qla_host_t *vha)
4751	{
4752	int rval;
4753	unsigned long flags = 0;
4754	int cnt, que;
4755	struct qla_hw_data *ha = vha->hw;
4756	struct req_que *req;
4757	struct rsp_que *rsp;
4758	struct mid_init_cb_24xx *mid_init_cb =
4759	(struct mid_init_cb_24xx *) ha->init_cb;
4760
4761	spin_lock_irqsave(&ha->hardware_lock, flags);
4762
4763	/* Clear outstanding commands array. */
4764	for (que = 0; que < ha->max_req_queues; que++) {
4765	req = ha->req_q_map[que];
4766	if (!req || !test_bit(que, ha->req_qid_map))
4767	continue;
4768	req->out_ptr = (uint16_t *)(req->ring + req->length);
4769	*req->out_ptr = 0;
4770	for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4771	req->outstanding_cmds[cnt] = NULL;
4772
4773	req->current_outstanding_cmd = 1;
4774
4775	/* Initialize firmware. */
4776	req->ring_ptr = req->ring;
4777	req->ring_index = 0;
4778	req->cnt = req->length;
4779	}
4780
4781	for (que = 0; que < ha->max_rsp_queues; que++) {
4782	rsp = ha->rsp_q_map[que];
4783	if (!rsp || !test_bit(que, ha->rsp_qid_map))
4784	continue;
4785	rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4786	*rsp->in_ptr = 0;
4787	/* Initialize response queue entries */
4788	if (IS_QLAFX00(ha))
4789	qlafx00_init_response_q_entries(rsp);
4790	else
4791	qla2x00_init_response_q_entries(rsp);
4792	}
4793
4794	ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4795	ha->tgt.atio_ring_index = 0;
4796	/* Initialize ATIO queue entries */
4797	qlt_init_atio_q_entries(vha);
4798
4799	ha->isp_ops->config_rings(vha);
4800
4801	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4802
4803	if (IS_QLAFX00(ha)) {
4804	rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4805	goto next_check;
4806	}
4807
4808	/* Update any ISP specific firmware options before initialization. */
4809	ha->isp_ops->update_fw_options(vha);
4810
4811	ql_dbg(ql_dbg_init, vha, 0x00d1,
4812	fmt: "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4813	le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4814	le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4815	le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4816
4817	if (ha->flags.npiv_supported) {
4818	if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4819	ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4820	mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4821	}
4822
4823	if (IS_FWI2_CAPABLE(ha)) {
4824	mid_init_cb->options = cpu_to_le16(BIT_1);
4825	mid_init_cb->init_cb.execution_throttle =
4826	cpu_to_le16(ha->cur_fw_xcb_count);
4827	ha->flags.dport_enabled =
4828	(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4829	BIT_7) != 0;
4830	ql_dbg(ql_dbg_init, vha, 0x0191, fmt: "DPORT Support: %s.\n",
4831	(ha->flags.dport_enabled) ? "enabled" : "disabled");
4832	/* FA-WWPN Status */
4833	ha->flags.fawwpn_enabled =
4834	(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4835	BIT_6) != 0;
4836	ql_dbg(ql_dbg_init, vha, 0x00bc, fmt: "FA-WWPN Support: %s.\n",
4837	(ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4838	/* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4839	memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4840	}
4841
4842	/* ELS pass through payload is limit by frame size. */
4843	if (ha->flags.edif_enabled)
4844	mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
4845
4846	QLA_FW_STARTED(ha);
4847	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4848	next_check:
4849	if (rval) {
4850	QLA_FW_STOPPED(ha);
4851	ql_log(ql_log_fatal, vha, 0x00d2,
4852	fmt: "Init Firmware **** FAILED ****.\n");
4853	} else {
4854	ql_dbg(ql_dbg_init, vha, 0x00d3,
4855	fmt: "Init Firmware -- success.\n");
4856	vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4857	}
4858
4859	return (rval);
4860	}
4861
4862	/**
4863	* qla2x00_fw_ready() - Waits for firmware ready.
4864	* @vha: HA context
4865	*
4866	* Returns 0 on success.
4867	*/
4868	static int
4869	qla2x00_fw_ready(scsi_qla_host_t *vha)
4870	{
4871	int rval;
4872	unsigned long wtime, mtime, cs84xx_time;
4873	uint16_t min_wait; /* Minimum wait time if loop is down */
4874	uint16_t wait_time; /* Wait time if loop is coming ready */
4875	uint16_t state[6];
4876	struct qla_hw_data *ha = vha->hw;
4877
4878	if (IS_QLAFX00(vha->hw))
4879	return qlafx00_fw_ready(vha);
4880
4881	/* Time to wait for loop down */
4882	if (IS_P3P_TYPE(ha))
4883	min_wait = 30;
4884	else
4885	min_wait = 20;
4886
4887	/*
4888	* Firmware should take at most one RATOV to login, plus 5 seconds for
4889	* our own processing.
4890	*/
4891	if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4892	wait_time = min_wait;
4893	}
4894
4895	/* Min wait time if loop down */
4896	mtime = jiffies + (min_wait * HZ);
4897
4898	/* wait time before firmware ready */
4899	wtime = jiffies + (wait_time * HZ);
4900
4901	/* Wait for ISP to finish LIP */
4902	if (!vha->flags.init_done)
4903	ql_log(ql_log_info, vha, 0x801e,
4904	fmt: "Waiting for LIP to complete.\n");
4905
4906	do {
4907	memset(state, -1, sizeof(state));
4908	rval = qla2x00_get_firmware_state(vha, state);
4909	if (rval == QLA_SUCCESS) {
4910	if (state[0] < FSTATE_LOSS_OF_SYNC) {
4911	vha->device_flags &= ~DFLG_NO_CABLE;
4912	}
4913	if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4914	ql_dbg(ql_dbg_taskm, vha, 0x801f,
4915	fmt: "fw_state=%x 84xx=%x.\n", state[0],
4916	state[2]);
4917	if ((state[2] & FSTATE_LOGGED_IN) &&
4918	(state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4919	ql_dbg(ql_dbg_taskm, vha, 0x8028,
4920	fmt: "Sending verify iocb.\n");
4921
4922	cs84xx_time = jiffies;
4923	rval = qla84xx_init_chip(vha);
4924	if (rval != QLA_SUCCESS) {
4925	ql_log(ql_log_warn,
4926	vha, 0x8007,
4927	fmt: "Init chip failed.\n");
4928	break;
4929	}
4930
4931	/* Add time taken to initialize. */
4932	cs84xx_time = jiffies - cs84xx_time;
4933	wtime += cs84xx_time;
4934	mtime += cs84xx_time;
4935	ql_dbg(ql_dbg_taskm, vha, 0x8008,
4936	fmt: "Increasing wait time by %ld. "
4937	"New time %ld.\n", cs84xx_time,
4938	wtime);
4939	}
4940	} else if (state[0] == FSTATE_READY) {
4941	ql_dbg(ql_dbg_taskm, vha, 0x8037,
4942	fmt: "F/W Ready - OK.\n");
4943
4944	qla2x00_get_retry_cnt(vha, &ha->retry_count,
4945	&ha->login_timeout, &ha->r_a_tov);
4946
4947	rval = QLA_SUCCESS;
4948	break;
4949	}
4950
4951	rval = QLA_FUNCTION_FAILED;
4952
4953	if (atomic_read(v: &vha->loop_down_timer) &&
4954	state[0] != FSTATE_READY) {
4955	/* Loop down. Timeout on min_wait for states
4956	* other than Wait for Login.
4957	*/
4958	if (time_after_eq(jiffies, mtime)) {
4959	ql_log(ql_log_info, vha, 0x8038,
4960	fmt: "Cable is unplugged...\n");
4961
4962	vha->device_flags |= DFLG_NO_CABLE;
4963	break;
4964	}
4965	}
4966	} else {
4967	/* Mailbox cmd failed. Timeout on min_wait. */
4968	if (time_after_eq(jiffies, mtime) ||
4969	ha->flags.isp82xx_fw_hung)
4970	break;
4971	}
4972
4973	if (time_after_eq(jiffies, wtime))
4974	break;
4975
4976	/* Delay for a while */
4977	msleep(msecs: 500);
4978	} while (1);
4979
4980	ql_dbg(ql_dbg_taskm, vha, 0x803a,
4981	fmt: "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4982	state[1], state[2], state[3], state[4], state[5], jiffies);
4983
4984	if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4985	ql_log(ql_log_warn, vha, 0x803b,
4986	fmt: "Firmware ready **** FAILED ****.\n");
4987	}
4988
4989	return (rval);
4990	}
4991
4992	/*
4993	* qla2x00_configure_hba
4994	* Setup adapter context.
4995	*
4996	* Input:
4997	* ha = adapter state pointer.
4998	*
4999	* Returns:
5000	* 0 = success
5001	*
5002	* Context:
5003	* Kernel context.
5004	*/
5005	static int
5006	qla2x00_configure_hba(scsi_qla_host_t *vha)
5007	{
5008	int rval;
5009	uint16_t loop_id;
5010	uint16_t topo;
5011	uint16_t sw_cap;
5012	uint8_t al_pa;
5013	uint8_t area;
5014	uint8_t domain;
5015	char connect_type[22];
5016	struct qla_hw_data *ha = vha->hw;
5017	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev: ha->pdev);
5018	port_id_t id;
5019	unsigned long flags;
5020
5021	/* Get host addresses. */
5022	rval = qla2x00_get_adapter_id(vha,
5023	&loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
5024	if (rval != QLA_SUCCESS) {
5025	if (LOOP_TRANSITION(vha) || atomic_read(v: &ha->loop_down_timer) ||
5026	IS_CNA_CAPABLE(ha) ||
5027	(rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
5028	ql_dbg(ql_dbg_disc, vha, 0x2008,
5029	fmt: "Loop is in a transition state.\n");
5030	} else {
5031	ql_log(ql_log_warn, vha, 0x2009,
5032	fmt: "Unable to get host loop ID.\n");
5033	if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
5034	(rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
5035	ql_log(ql_log_warn, vha, 0x1151,
5036	fmt: "Doing link init.\n");
5037	if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
5038	return rval;
5039	}
5040	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
5041	}
5042	return (rval);
5043	}
5044
5045	if (topo == 4) {
5046	ql_log(ql_log_info, vha, 0x200a,
5047	fmt: "Cannot get topology - retrying.\n");
5048	return (QLA_FUNCTION_FAILED);
5049	}
5050
5051	vha->loop_id = loop_id;
5052
5053	/* initialize */
5054	ha->min_external_loopid = SNS_FIRST_LOOP_ID;
5055	ha->operating_mode = LOOP;
5056
5057	switch (topo) {
5058	case 0:
5059	ql_dbg(ql_dbg_disc, vha, 0x200b, fmt: "HBA in NL topology.\n");
5060	ha->switch_cap = 0;
5061	ha->current_topology = ISP_CFG_NL;
5062	strcpy(p: connect_type, q: "(Loop)");
5063	break;
5064
5065	case 1:
5066	ql_dbg(ql_dbg_disc, vha, 0x200c, fmt: "HBA in FL topology.\n");
5067	ha->switch_cap = sw_cap;
5068	ha->current_topology = ISP_CFG_FL;
5069	strcpy(p: connect_type, q: "(FL_Port)");
5070	break;
5071
5072	case 2:
5073	ql_dbg(ql_dbg_disc, vha, 0x200d, fmt: "HBA in N P2P topology.\n");
5074	ha->switch_cap = 0;
5075	ha->operating_mode = P2P;
5076	ha->current_topology = ISP_CFG_N;
5077	strcpy(p: connect_type, q: "(N_Port-to-N_Port)");
5078	break;
5079
5080	case 3:
5081	ql_dbg(ql_dbg_disc, vha, 0x200e, fmt: "HBA in F P2P topology.\n");
5082	ha->switch_cap = sw_cap;
5083	ha->operating_mode = P2P;
5084	ha->current_topology = ISP_CFG_F;
5085	strcpy(p: connect_type, q: "(F_Port)");
5086	break;
5087
5088	default:
5089	ql_dbg(ql_dbg_disc, vha, 0x200f,
5090	fmt: "HBA in unknown topology %x, using NL.\n", topo);
5091	ha->switch_cap = 0;
5092	ha->current_topology = ISP_CFG_NL;
5093	strcpy(p: connect_type, q: "(Loop)");
5094	break;
5095	}
5096
5097	/* Save Host port and loop ID. */
5098	/* byte order - Big Endian */
5099	id.b.domain = domain;
5100	id.b.area = area;
5101	id.b.al_pa = al_pa;
5102	id.b.rsvd_1 = 0;
5103	spin_lock_irqsave(&ha->hardware_lock, flags);
5104	if (vha->hw->flags.edif_enabled) {
5105	if (topo != 2)
5106	qla_update_host_map(vha, id);
5107	} else if (!(topo == 2 && ha->flags.n2n_bigger))
5108	qla_update_host_map(vha, id);
5109	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
5110
5111	if (!vha->flags.init_done)
5112	ql_log(ql_log_info, vha, 0x2010,
5113	fmt: "Topology - %s, Host Loop address 0x%x.\n",
5114	connect_type, vha->loop_id);
5115
5116	return(rval);
5117	}
5118
5119	inline void
5120	qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
5121	const char *def)
5122	{
5123	char *st, *en;
5124	uint16_t index;
5125	uint64_t zero[2] = { 0 };
5126	struct qla_hw_data *ha = vha->hw;
5127	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
5128	!IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
5129
5130	if (len > sizeof(zero))
5131	len = sizeof(zero);
5132	if (memcmp(p: model, q: &zero, size: len) != 0) {
5133	memcpy(ha->model_number, model, len);
5134	st = en = ha->model_number;
5135	en += len - 1;
5136	while (en > st) {
5137	if (*en != 0x20 && *en != 0x00)
5138	break;
5139	*en-- = '\0';
5140	}
5141
5142	index = (ha->pdev->subsystem_device & 0xff);
5143	if (use_tbl &&
5144	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5145	index < QLA_MODEL_NAMES)
5146	strscpy(ha->model_desc,
5147	qla2x00_model_name[index * 2 + 1],
5148	sizeof(ha->model_desc));
5149	} else {
5150	index = (ha->pdev->subsystem_device & 0xff);
5151	if (use_tbl &&
5152	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5153	index < QLA_MODEL_NAMES) {
5154	strscpy(ha->model_number,
5155	qla2x00_model_name[index * 2],
5156	sizeof(ha->model_number));
5157	strscpy(ha->model_desc,
5158	qla2x00_model_name[index * 2 + 1],
5159	sizeof(ha->model_desc));
5160	} else {
5161	strscpy(ha->model_number, def,
5162	sizeof(ha->model_number));
5163	}
5164	}
5165	if (IS_FWI2_CAPABLE(ha))
5166	qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
5167	sizeof(ha->model_desc));
5168	}
5169
5170	/* On sparc systems, obtain port and node WWN from firmware
5171	* properties.
5172	*/
5173	static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
5174	{
5175	#ifdef CONFIG_SPARC
5176	struct qla_hw_data *ha = vha->hw;
5177	struct pci_dev *pdev = ha->pdev;
5178	struct device_node *dp = pci_device_to_OF_node(pdev);
5179	const u8 *val;
5180	int len;
5181
5182	val = of_get_property(dp, "port-wwn", &len);
5183	if (val && len >= WWN_SIZE)
5184	memcpy(nv->port_name, val, WWN_SIZE);
5185
5186	val = of_get_property(dp, "node-wwn", &len);
5187	if (val && len >= WWN_SIZE)
5188	memcpy(nv->node_name, val, WWN_SIZE);
5189	#endif
5190	}
5191
5192	/*
5193	* NVRAM configuration for ISP 2xxx
5194	*
5195	* Input:
5196	* ha = adapter block pointer.
5197	*
5198	* Output:
5199	* initialization control block in response_ring
5200	* host adapters parameters in host adapter block
5201	*
5202	* Returns:
5203	* 0 = success.
5204	*/
5205	int
5206	qla2x00_nvram_config(scsi_qla_host_t *vha)
5207	{
5208	int rval;
5209	uint8_t chksum = 0;
5210	uint16_t cnt;
5211	uint8_t *dptr1, *dptr2;
5212	struct qla_hw_data *ha = vha->hw;
5213	init_cb_t *icb = ha->init_cb;
5214	nvram_t *nv = ha->nvram;
5215	uint8_t *ptr = ha->nvram;
5216	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5217
5218	rval = QLA_SUCCESS;
5219
5220	/* Determine NVRAM starting address. */
5221	ha->nvram_size = sizeof(*nv);
5222	ha->nvram_base = 0;
5223	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
5224	if ((rd_reg_word(addr: &reg->ctrl_status) >> 14) == 1)
5225	ha->nvram_base = 0x80;
5226
5227	/* Get NVRAM data and calculate checksum. */
5228	ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
5229	for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
5230	chksum += *ptr++;
5231
5232	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
5233	fmt: "Contents of NVRAM.\n");
5234	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
5235	nv, ha->nvram_size);
5236
5237	/* Bad NVRAM data, set defaults parameters. */
5238	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
5239	nv->nvram_version < 1) {
5240	/* Reset NVRAM data. */
5241	ql_log(ql_log_warn, vha, 0x0064,
5242	fmt: "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
5243	chksum, nv->id, nv->nvram_version);
5244	ql_log(ql_log_warn, vha, 0x0065,
5245	fmt: "Falling back to "
5246	"functioning (yet invalid -- WWPN) defaults.\n");
5247
5248	/*
5249	* Set default initialization control block.
5250	*/
5251	memset(nv, 0, ha->nvram_size);
5252	nv->parameter_block_version = ICB_VERSION;
5253
5254	if (IS_QLA23XX(ha)) {
5255	nv->firmware_options[0] = BIT_2 | BIT_1;
5256	nv->firmware_options[1] = BIT_7 | BIT_5;
5257	nv->add_firmware_options[0] = BIT_5;
5258	nv->add_firmware_options[1] = BIT_5 | BIT_4;
5259	nv->frame_payload_size = cpu_to_le16(2048);
5260	nv->special_options[1] = BIT_7;
5261	} else if (IS_QLA2200(ha)) {
5262	nv->firmware_options[0] = BIT_2 | BIT_1;
5263	nv->firmware_options[1] = BIT_7 | BIT_5;
5264	nv->add_firmware_options[0] = BIT_5;
5265	nv->add_firmware_options[1] = BIT_5 | BIT_4;
5266	nv->frame_payload_size = cpu_to_le16(1024);
5267	} else if (IS_QLA2100(ha)) {
5268	nv->firmware_options[0] = BIT_3 | BIT_1;
5269	nv->firmware_options[1] = BIT_5;
5270	nv->frame_payload_size = cpu_to_le16(1024);
5271	}
5272
5273	nv->max_iocb_allocation = cpu_to_le16(256);
5274	nv->execution_throttle = cpu_to_le16(16);
5275	nv->retry_count = 8;
5276	nv->retry_delay = 1;
5277
5278	nv->port_name[0] = 33;
5279	nv->port_name[3] = 224;
5280	nv->port_name[4] = 139;
5281
5282	qla2xxx_nvram_wwn_from_ofw(vha, nv);
5283
5284	nv->login_timeout = 4;
5285
5286	/*
5287	* Set default host adapter parameters
5288	*/
5289	nv->host_p[1] = BIT_2;
5290	nv->reset_delay = 5;
5291	nv->port_down_retry_count = 8;
5292	nv->max_luns_per_target = cpu_to_le16(8);
5293	nv->link_down_timeout = 60;
5294
5295	rval = 1;
5296	}
5297
5298	/* Reset Initialization control block */
5299	memset(icb, 0, ha->init_cb_size);
5300
5301	/*
5302	* Setup driver NVRAM options.
5303	*/
5304	nv->firmware_options[0] |= (BIT_6 | BIT_1);
5305	nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
5306	nv->firmware_options[1] |= (BIT_5 | BIT_0);
5307	nv->firmware_options[1] &= ~BIT_4;
5308
5309	if (IS_QLA23XX(ha)) {
5310	nv->firmware_options[0] |= BIT_2;
5311	nv->firmware_options[0] &= ~BIT_3;
5312	nv->special_options[0] &= ~BIT_6;
5313	nv->add_firmware_options[1] |= BIT_5 | BIT_4;
5314
5315	if (IS_QLA2300(ha)) {
5316	if (ha->fb_rev == FPM_2310) {
5317	strcpy(p: ha->model_number, q: "QLA2310");
5318	} else {
5319	strcpy(p: ha->model_number, q: "QLA2300");
5320	}
5321	} else {
5322	qla2x00_set_model_info(vha, model: nv->model_number,
5323	len: sizeof(nv->model_number), def: "QLA23xx");
5324	}
5325	} else if (IS_QLA2200(ha)) {
5326	nv->firmware_options[0] |= BIT_2;
5327	/*
5328	* 'Point-to-point preferred, else loop' is not a safe
5329	* connection mode setting.
5330	*/
5331	if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
5332	(BIT_5 | BIT_4)) {
5333	/* Force 'loop preferred, else point-to-point'. */
5334	nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
5335	nv->add_firmware_options[0] |= BIT_5;
5336	}
5337	strcpy(p: ha->model_number, q: "QLA22xx");
5338	} else /*if (IS_QLA2100(ha))*/ {
5339	strcpy(p: ha->model_number, q: "QLA2100");
5340	}
5341
5342	/*
5343	* Copy over NVRAM RISC parameter block to initialization control block.
5344	*/
5345	dptr1 = (uint8_t *)icb;
5346	dptr2 = (uint8_t *)&nv->parameter_block_version;
5347	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
5348	while (cnt--)
5349	*dptr1++ = *dptr2++;
5350
5351	/* Copy 2nd half. */
5352	dptr1 = (uint8_t *)icb->add_firmware_options;
5353	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
5354	while (cnt--)
5355	*dptr1++ = *dptr2++;
5356	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5357	/* Use alternate WWN? */
5358	if (nv->host_p[1] & BIT_7) {
5359	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5360	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5361	}
5362
5363	/* Prepare nodename */
5364	if ((icb->firmware_options[1] & BIT_6) == 0) {
5365	/*
5366	* Firmware will apply the following mask if the nodename was
5367	* not provided.
5368	*/
5369	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5370	icb->node_name[0] &= 0xF0;
5371	}
5372
5373	/*
5374	* Set host adapter parameters.
5375	*/
5376
5377	/*
5378	* BIT_7 in the host-parameters section allows for modification to
5379	* internal driver logging.
5380	*/
5381	if (nv->host_p[0] & BIT_7)
5382	ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
5383	ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
5384	/* Always load RISC code on non ISP2[12]00 chips. */
5385	if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
5386	ha->flags.disable_risc_code_load = 0;
5387	ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
5388	ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
5389	ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
5390	ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
5391	ha->flags.disable_serdes = 0;
5392
5393	ha->operating_mode =
5394	(icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
5395
5396	memcpy(ha->fw_seriallink_options, nv->seriallink_options,
5397	sizeof(ha->fw_seriallink_options));
5398
5399	/* save HBA serial number */
5400	ha->serial0 = icb->port_name[5];
5401	ha->serial1 = icb->port_name[6];
5402	ha->serial2 = icb->port_name[7];
5403	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5404	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5405
5406	icb->execution_throttle = cpu_to_le16(0xFFFF);
5407
5408	ha->retry_count = nv->retry_count;
5409
5410	/* Set minimum login_timeout to 4 seconds. */
5411	if (nv->login_timeout != ql2xlogintimeout)
5412	nv->login_timeout = ql2xlogintimeout;
5413	if (nv->login_timeout < 4)
5414	nv->login_timeout = 4;
5415	ha->login_timeout = nv->login_timeout;
5416
5417	/* Set minimum RATOV to 100 tenths of a second. */
5418	ha->r_a_tov = 100;
5419
5420	ha->loop_reset_delay = nv->reset_delay;
5421
5422	/* Link Down Timeout = 0:
5423	*
5424	* When Port Down timer expires we will start returning
5425	* I/O's to OS with "DID_NO_CONNECT".
5426	*
5427	* Link Down Timeout != 0:
5428	*
5429	* The driver waits for the link to come up after link down
5430	* before returning I/Os to OS with "DID_NO_CONNECT".
5431	*/
5432	if (nv->link_down_timeout == 0) {
5433	ha->loop_down_abort_time =
5434	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5435	} else {
5436	ha->link_down_timeout = nv->link_down_timeout;
5437	ha->loop_down_abort_time =
5438	(LOOP_DOWN_TIME - ha->link_down_timeout);
5439	}
5440
5441	/*
5442	* Need enough time to try and get the port back.
5443	*/
5444	ha->port_down_retry_count = nv->port_down_retry_count;
5445	if (qlport_down_retry)
5446	ha->port_down_retry_count = qlport_down_retry;
5447	/* Set login_retry_count */
5448	ha->login_retry_count = nv->retry_count;
5449	if (ha->port_down_retry_count == nv->port_down_retry_count &&
5450	ha->port_down_retry_count > 3)
5451	ha->login_retry_count = ha->port_down_retry_count;
5452	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5453	ha->login_retry_count = ha->port_down_retry_count;
5454	if (ql2xloginretrycount)
5455	ha->login_retry_count = ql2xloginretrycount;
5456
5457	icb->lun_enables = cpu_to_le16(0);
5458	icb->command_resource_count = 0;
5459	icb->immediate_notify_resource_count = 0;
5460	icb->timeout = cpu_to_le16(0);
5461
5462	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5463	/* Enable RIO */
5464	icb->firmware_options[0] &= ~BIT_3;
5465	icb->add_firmware_options[0] &=
5466	~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5467	icb->add_firmware_options[0] |= BIT_2;
5468	icb->response_accumulation_timer = 3;
5469	icb->interrupt_delay_timer = 5;
5470
5471	vha->flags.process_response_queue = 1;
5472	} else {
5473	/* Enable ZIO. */
5474	if (!vha->flags.init_done) {
5475	ha->zio_mode = icb->add_firmware_options[0] &
5476	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5477	ha->zio_timer = icb->interrupt_delay_timer ?
5478	icb->interrupt_delay_timer : 2;
5479	}
5480	icb->add_firmware_options[0] &=
5481	~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5482	vha->flags.process_response_queue = 0;
5483	if (ha->zio_mode != QLA_ZIO_DISABLED) {
5484	ha->zio_mode = QLA_ZIO_MODE_6;
5485
5486	ql_log(ql_log_info, vha, 0x0068,
5487	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
5488	ha->zio_mode, ha->zio_timer * 100);
5489
5490	icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5491	icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5492	vha->flags.process_response_queue = 1;
5493	}
5494	}
5495
5496	if (rval) {
5497	ql_log(ql_log_warn, vha, 0x0069,
5498	fmt: "NVRAM configuration failed.\n");
5499	}
5500	return (rval);
5501	}
5502
5503	void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5504	{
5505	int old_state;
5506
5507	old_state = atomic_read(v: &fcport->state);
5508	atomic_set(v: &fcport->state, i: state);
5509
5510	/* Don't print state transitions during initial allocation of fcport */
5511	if (old_state && old_state != state) {
5512	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x207d,
5513	fmt: "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5514	fcport->port_name, port_state_str[old_state],
5515	port_state_str[state], fcport->d_id.b.domain,
5516	fcport->d_id.b.area, fcport->d_id.b.al_pa);
5517	}
5518	}
5519
5520	/**
5521	* qla2x00_alloc_fcport() - Allocate a generic fcport.
5522	* @vha: HA context
5523	* @flags: allocation flags
5524	*
5525	* Returns a pointer to the allocated fcport, or NULL, if none available.
5526	*/
5527	fc_port_t *
5528	qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5529	{
5530	fc_port_t *fcport;
5531
5532	fcport = kzalloc(size: sizeof(fc_port_t), flags);
5533	if (!fcport)
5534	return NULL;
5535
5536	fcport->ct_desc.ct_sns = dma_alloc_coherent(dev: &vha->hw->pdev->dev,
5537	size: sizeof(struct ct_sns_pkt), dma_handle: &fcport->ct_desc.ct_sns_dma,
5538	gfp: flags);
5539	if (!fcport->ct_desc.ct_sns) {
5540	ql_log(ql_log_warn, vha, 0xd049,
5541	fmt: "Failed to allocate ct_sns request.\n");
5542	kfree(objp: fcport);
5543	return NULL;
5544	}
5545
5546	/* Setup fcport template structure. */
5547	fcport->vha = vha;
5548	fcport->port_type = FCT_UNKNOWN;
5549	fcport->loop_id = FC_NO_LOOP_ID;
5550	qla2x00_set_fcport_state(fcport, state: FCS_UNCONFIGURED);
5551	fcport->supported_classes = FC_COS_UNSPECIFIED;
5552	fcport->fp_speed = PORT_SPEED_UNKNOWN;
5553
5554	fcport->disc_state = DSC_DELETED;
5555	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5556	fcport->deleted = QLA_SESS_DELETED;
5557	fcport->login_retry = vha->hw->login_retry_count;
5558	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5559	fcport->logout_on_delete = 1;
5560	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5561	fcport->tgt_short_link_down_cnt = 0;
5562	fcport->dev_loss_tmo = 0;
5563
5564	if (!fcport->ct_desc.ct_sns) {
5565	ql_log(ql_log_warn, vha, 0xd049,
5566	fmt: "Failed to allocate ct_sns request.\n");
5567	kfree(objp: fcport);
5568	return NULL;
5569	}
5570
5571	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5572	INIT_WORK(&fcport->free_work, qlt_free_session_done);
5573	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5574	INIT_LIST_HEAD(list: &fcport->gnl_entry);
5575	INIT_LIST_HEAD(list: &fcport->list);
5576	INIT_LIST_HEAD(list: &fcport->unsol_ctx_head);
5577
5578	INIT_LIST_HEAD(list: &fcport->sess_cmd_list);
5579	spin_lock_init(&fcport->sess_cmd_lock);
5580
5581	spin_lock_init(&fcport->edif.sa_list_lock);
5582	INIT_LIST_HEAD(list: &fcport->edif.tx_sa_list);
5583	INIT_LIST_HEAD(list: &fcport->edif.rx_sa_list);
5584
5585	spin_lock_init(&fcport->edif.indx_list_lock);
5586	INIT_LIST_HEAD(list: &fcport->edif.edif_indx_list);
5587
5588	return fcport;
5589	}
5590
5591	void
5592	qla2x00_free_fcport(fc_port_t *fcport)
5593	{
5594	if (fcport->ct_desc.ct_sns) {
5595	dma_free_coherent(dev: &fcport->vha->hw->pdev->dev,
5596	size: sizeof(struct ct_sns_pkt), cpu_addr: fcport->ct_desc.ct_sns,
5597	dma_handle: fcport->ct_desc.ct_sns_dma);
5598
5599	fcport->ct_desc.ct_sns = NULL;
5600	}
5601
5602	qla_edif_flush_sa_ctl_lists(fcport);
5603	list_del(entry: &fcport->list);
5604	qla2x00_clear_loop_id(fcport);
5605
5606	qla_edif_list_del(fcport);
5607
5608	kfree(objp: fcport);
5609	}
5610
5611	static void qla_get_login_template(scsi_qla_host_t *vha)
5612	{
5613	struct qla_hw_data *ha = vha->hw;
5614	int rval;
5615	u32 *bp, sz;
5616	__be32 *q;
5617
5618	memset(ha->init_cb, 0, ha->init_cb_size);
5619	sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5620	rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5621	ha->init_cb, sz);
5622	if (rval != QLA_SUCCESS) {
5623	ql_dbg(ql_dbg_init, vha, 0x00d1,
5624	fmt: "PLOGI ELS param read fail.\n");
5625	return;
5626	}
5627	q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5628
5629	bp = (uint32_t *)ha->init_cb;
5630	cpu_to_be32_array(dst: q, src: bp, len: sz / 4);
5631	ha->flags.plogi_template_valid = 1;
5632	}
5633
5634	/*
5635	* qla2x00_configure_loop
5636	* Updates Fibre Channel Device Database with what is actually on loop.
5637	*
5638	* Input:
5639	* ha = adapter block pointer.
5640	*
5641	* Returns:
5642	* 0 = success.
5643	* 1 = error.
5644	* 2 = database was full and device was not configured.
5645	*/
5646	static int
5647	qla2x00_configure_loop(scsi_qla_host_t *vha)
5648	{
5649	int rval;
5650	unsigned long flags, save_flags;
5651	struct qla_hw_data *ha = vha->hw;
5652
5653	rval = QLA_SUCCESS;
5654
5655	/* Get Initiator ID */
5656	if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5657	rval = qla2x00_configure_hba(vha);
5658	if (rval != QLA_SUCCESS) {
5659	ql_dbg(ql_dbg_disc, vha, 0x2013,
5660	fmt: "Unable to configure HBA.\n");
5661	return (rval);
5662	}
5663	}
5664
5665	save_flags = flags = vha->dpc_flags;
5666	ql_dbg(ql_dbg_disc, vha, 0x2014,
5667	fmt: "Configure loop -- dpc flags = 0x%lx.\n", flags);
5668
5669	/*
5670	* If we have both an RSCN and PORT UPDATE pending then handle them
5671	* both at the same time.
5672	*/
5673	clear_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5674	clear_bit(RSCN_UPDATE, addr: &vha->dpc_flags);
5675
5676	qla2x00_get_data_rate(vha);
5677	qla_get_login_template(vha);
5678
5679	/* Determine what we need to do */
5680	if ((ha->current_topology == ISP_CFG_FL ||
5681	ha->current_topology == ISP_CFG_F) &&
5682	(test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5683
5684	set_bit(RSCN_UPDATE, addr: &flags);
5685	clear_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5686
5687	} else if (ha->current_topology == ISP_CFG_NL ||
5688	ha->current_topology == ISP_CFG_N) {
5689	clear_bit(RSCN_UPDATE, addr: &flags);
5690	set_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5691	} else if (!vha->flags.online ||
5692	(test_bit(ABORT_ISP_ACTIVE, &flags))) {
5693	set_bit(RSCN_UPDATE, addr: &flags);
5694	set_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5695	}
5696
5697	if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5698	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5699	ql_dbg(ql_dbg_disc, vha, 0x2015,
5700	fmt: "Loop resync needed, failing.\n");
5701	rval = QLA_FUNCTION_FAILED;
5702	} else
5703	rval = qla2x00_configure_local_loop(vha);
5704	}
5705
5706	if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5707	if (LOOP_TRANSITION(vha)) {
5708	ql_dbg(ql_dbg_disc, vha, 0x2099,
5709	fmt: "Needs RSCN update and loop transition.\n");
5710	rval = QLA_FUNCTION_FAILED;
5711	}
5712	else
5713	rval = qla2x00_configure_fabric(vha);
5714	}
5715
5716	if (rval == QLA_SUCCESS) {
5717	if (atomic_read(v: &vha->loop_down_timer) ||
5718	test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5719	rval = QLA_FUNCTION_FAILED;
5720	} else {
5721	atomic_set(v: &vha->loop_state, LOOP_READY);
5722	ql_dbg(ql_dbg_disc, vha, 0x2069,
5723	fmt: "LOOP READY.\n");
5724	ha->flags.fw_init_done = 1;
5725
5726	/*
5727	* use link up to wake up app to get ready for
5728	* authentication.
5729	*/
5730	if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
5731	qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
5732	ha->link_data_rate);
5733
5734	/*
5735	* Process any ATIO queue entries that came in
5736	* while we weren't online.
5737	*/
5738	if (qla_tgt_mode_enabled(ha: vha) ||
5739	qla_dual_mode_enabled(ha: vha)) {
5740	spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5741	qlt_24xx_process_atio_queue(vha, 0);
5742	spin_unlock_irqrestore(lock: &ha->tgt.atio_lock,
5743	flags);
5744	}
5745	}
5746	}
5747
5748	if (rval) {
5749	ql_dbg(ql_dbg_disc, vha, 0x206a,
5750	fmt: "%s *** FAILED ***.\n", __func__);
5751	} else {
5752	ql_dbg(ql_dbg_disc, vha, 0x206b,
5753	fmt: "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5754	__func__, vha->port_name, vha->d_id.b24);
5755	}
5756
5757	/* Restore state if a resync event occurred during processing */
5758	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5759	if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5760	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5761	if (test_bit(RSCN_UPDATE, &save_flags)) {
5762	set_bit(RSCN_UPDATE, addr: &vha->dpc_flags);
5763	}
5764	}
5765
5766	return (rval);
5767	}
5768
5769	static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5770	{
5771	unsigned long flags;
5772	fc_port_t *fcport;
5773
5774	ql_dbg(ql_dbg_disc, vha, 0x206a, fmt: "%s %d.\n", __func__, __LINE__);
5775
5776	if (test_and_clear_bit(N2N_LOGIN_NEEDED, addr: &vha->dpc_flags))
5777	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
5778
5779	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5780	if (fcport->n2n_flag) {
5781	qla24xx_fcport_handle_login(vha, fcport);
5782	return QLA_SUCCESS;
5783	}
5784	}
5785
5786	spin_lock_irqsave(&vha->work_lock, flags);
5787	vha->scan.scan_retry++;
5788	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
5789
5790	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5791	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5792	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5793	}
5794	return QLA_FUNCTION_FAILED;
5795	}
5796
5797	static void
5798	qla_reinitialize_link(scsi_qla_host_t *vha)
5799	{
5800	int rval;
5801
5802	atomic_set(v: &vha->loop_state, LOOP_DOWN);
5803	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
5804	rval = qla2x00_full_login_lip(ha: vha);
5805	if (rval == QLA_SUCCESS) {
5806	ql_dbg(ql_dbg_disc, vha, 0xd050, fmt: "Link reinitialized\n");
5807	} else {
5808	ql_dbg(ql_dbg_disc, vha, 0xd051,
5809	fmt: "Link reinitialization failed (%d)\n", rval);
5810	}
5811	}
5812
5813	/*
5814	* qla2x00_configure_local_loop
5815	* Updates Fibre Channel Device Database with local loop devices.
5816	*
5817	* Input:
5818	* ha = adapter block pointer.
5819	*
5820	* Returns:
5821	* 0 = success.
5822	*/
5823	static int
5824	qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5825	{
5826	int rval, rval2;
5827	int found;
5828	fc_port_t *fcport, *new_fcport;
5829	uint16_t index;
5830	uint16_t entries;
5831	struct gid_list_info *gid;
5832	uint16_t loop_id;
5833	uint8_t domain, area, al_pa;
5834	struct qla_hw_data *ha = vha->hw;
5835	unsigned long flags;
5836
5837	/* Inititae N2N login. */
5838	if (N2N_TOPO(ha))
5839	return qla2x00_configure_n2n_loop(vha);
5840
5841	new_fcport = NULL;
5842	entries = MAX_FIBRE_DEVICES_LOOP;
5843
5844	/* Get list of logged in devices. */
5845	memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5846	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5847	&entries);
5848	if (rval != QLA_SUCCESS)
5849	goto err;
5850
5851	ql_dbg(ql_dbg_disc, vha, 0x2011,
5852	fmt: "Entries in ID list (%d).\n", entries);
5853	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5854	ha->gid_list, entries * sizeof(*ha->gid_list));
5855
5856	if (entries == 0) {
5857	spin_lock_irqsave(&vha->work_lock, flags);
5858	vha->scan.scan_retry++;
5859	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
5860
5861	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5862	u8 loop_map_entries = 0;
5863	int rc;
5864
5865	rc = qla2x00_get_fcal_position_map(ha: vha, NULL,
5866	num_entries: &loop_map_entries);
5867	if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5868	/*
5869	* There are devices that are still not logged
5870	* in. Reinitialize to give them a chance.
5871	*/
5872	qla_reinitialize_link(vha);
5873	return QLA_FUNCTION_FAILED;
5874	}
5875	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5876	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5877	}
5878	} else {
5879	vha->scan.scan_retry = 0;
5880	}
5881
5882	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5883	fcport->scan_state = QLA_FCPORT_SCAN;
5884	}
5885
5886	/* Allocate temporary fcport for any new fcports discovered. */
5887	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5888	if (new_fcport == NULL) {
5889	ql_log(ql_log_warn, vha, 0x2012,
5890	fmt: "Memory allocation failed for fcport.\n");
5891	rval = QLA_MEMORY_ALLOC_FAILED;
5892	goto err;
5893	}
5894	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5895
5896	/* Add devices to port list. */
5897	gid = ha->gid_list;
5898	for (index = 0; index < entries; index++) {
5899	domain = gid->domain;
5900	area = gid->area;
5901	al_pa = gid->al_pa;
5902	if (IS_QLA2100(ha) || IS_QLA2200(ha))
5903	loop_id = gid->loop_id_2100;
5904	else
5905	loop_id = le16_to_cpu(gid->loop_id);
5906	gid = (void *)gid + ha->gid_list_info_size;
5907
5908	/* Bypass reserved domain fields. */
5909	if ((domain & 0xf0) == 0xf0)
5910	continue;
5911
5912	/* Bypass if not same domain and area of adapter. */
5913	if (area && domain && ((area != vha->d_id.b.area) ||
5914	(domain != vha->d_id.b.domain)) &&
5915	(ha->current_topology == ISP_CFG_NL))
5916	continue;
5917
5918
5919	/* Bypass invalid local loop ID. */
5920	if (loop_id > LAST_LOCAL_LOOP_ID)
5921	continue;
5922
5923	memset(new_fcport->port_name, 0, WWN_SIZE);
5924
5925	/* Fill in member data. */
5926	new_fcport->d_id.b.domain = domain;
5927	new_fcport->d_id.b.area = area;
5928	new_fcport->d_id.b.al_pa = al_pa;
5929	new_fcport->loop_id = loop_id;
5930	new_fcport->scan_state = QLA_FCPORT_FOUND;
5931
5932	rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5933	if (rval2 != QLA_SUCCESS) {
5934	ql_dbg(ql_dbg_disc, vha, 0x2097,
5935	fmt: "Failed to retrieve fcport information "
5936	"-- get_port_database=%x, loop_id=0x%04x.\n",
5937	rval2, new_fcport->loop_id);
5938	/* Skip retry if N2N */
5939	if (ha->current_topology != ISP_CFG_N) {
5940	ql_dbg(ql_dbg_disc, vha, 0x2105,
5941	fmt: "Scheduling resync.\n");
5942	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5943	continue;
5944	}
5945	}
5946
5947	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5948	/* Check for matching device in port list. */
5949	found = 0;
5950	fcport = NULL;
5951	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5952	if (memcmp(p: new_fcport->port_name, q: fcport->port_name,
5953	WWN_SIZE))
5954	continue;
5955
5956	fcport->flags &= ~FCF_FABRIC_DEVICE;
5957	fcport->loop_id = new_fcport->loop_id;
5958	fcport->port_type = new_fcport->port_type;
5959	fcport->d_id.b24 = new_fcport->d_id.b24;
5960	memcpy(fcport->node_name, new_fcport->node_name,
5961	WWN_SIZE);
5962	fcport->scan_state = QLA_FCPORT_FOUND;
5963	if (fcport->login_retry == 0) {
5964	fcport->login_retry = vha->hw->login_retry_count;
5965	ql_dbg(ql_dbg_disc, vha, 0x2135,
5966	fmt: "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5967	fcport->port_name, fcport->loop_id,
5968	fcport->login_retry);
5969	}
5970	found++;
5971	break;
5972	}
5973
5974	if (!found) {
5975	/* New device, add to fcports list. */
5976	list_add_tail(new: &new_fcport->list, head: &vha->vp_fcports);
5977
5978	/* Allocate a new replacement fcport. */
5979	fcport = new_fcport;
5980
5981	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
5982
5983	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5984
5985	if (new_fcport == NULL) {
5986	ql_log(ql_log_warn, vha, 0xd031,
5987	fmt: "Failed to allocate memory for fcport.\n");
5988	rval = QLA_MEMORY_ALLOC_FAILED;
5989	goto err;
5990	}
5991	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5992	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5993	}
5994
5995	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
5996
5997	/* Base iIDMA settings on HBA port speed. */
5998	fcport->fp_speed = ha->link_data_rate;
5999	}
6000
6001	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6002	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6003	break;
6004
6005	if (fcport->scan_state == QLA_FCPORT_SCAN) {
6006	if ((qla_dual_mode_enabled(ha: vha) ||
6007	qla_ini_mode_enabled(ha: vha)) &&
6008	atomic_read(v: &fcport->state) == FCS_ONLINE) {
6009	qla2x00_mark_device_lost(vha, fcport,
6010	ql2xplogiabsentdevice);
6011	if (fcport->loop_id != FC_NO_LOOP_ID &&
6012	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6013	fcport->port_type != FCT_INITIATOR &&
6014	fcport->port_type != FCT_BROADCAST) {
6015	ql_dbg(ql_dbg_disc, vha, 0x20f0,
6016	fmt: "%s %d %8phC post del sess\n",
6017	__func__, __LINE__,
6018	fcport->port_name);
6019
6020	qlt_schedule_sess_for_deletion(fcport);
6021	continue;
6022	}
6023	}
6024	}
6025
6026	if (fcport->scan_state == QLA_FCPORT_FOUND)
6027	qla24xx_fcport_handle_login(vha, fcport);
6028	}
6029
6030	qla2x00_free_fcport(fcport: new_fcport);
6031
6032	return rval;
6033
6034	err:
6035	ql_dbg(ql_dbg_disc, vha, 0x2098,
6036	fmt: "Configure local loop error exit: rval=%x.\n", rval);
6037	return rval;
6038	}
6039
6040	static void
6041	qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6042	{
6043	int rval;
6044	uint16_t mb[MAILBOX_REGISTER_COUNT];
6045	struct qla_hw_data *ha = vha->hw;
6046
6047	if (!IS_IIDMA_CAPABLE(ha))
6048	return;
6049
6050	if (atomic_read(v: &fcport->state) != FCS_ONLINE)
6051	return;
6052
6053	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
6054	fcport->fp_speed > ha->link_data_rate ||
6055	!ha->flags.gpsc_supported)
6056	return;
6057
6058	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
6059	mb);
6060	if (rval != QLA_SUCCESS) {
6061	ql_dbg(ql_dbg_disc, vha, 0x2004,
6062	fmt: "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
6063	fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
6064	} else {
6065	ql_dbg(ql_dbg_disc, vha, 0x2005,
6066	fmt: "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
6067	qla2x00_get_link_speed_str(ha, fcport->fp_speed),
6068	fcport->fp_speed, fcport->port_name);
6069	}
6070	}
6071
6072	void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6073	{
6074	qla2x00_iidma_fcport(vha, fcport);
6075	qla24xx_update_fcport_fcp_prio(vha, fcport);
6076	}
6077
6078	int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6079	{
6080	struct qla_work_evt *e;
6081
6082	e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
6083	if (!e)
6084	return QLA_FUNCTION_FAILED;
6085
6086	e->u.fcport.fcport = fcport;
6087	return qla2x00_post_work(vha, e);
6088	}
6089
6090	/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
6091	static void
6092	qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
6093	{
6094	struct fc_rport_identifiers rport_ids;
6095	struct fc_rport *rport;
6096	unsigned long flags;
6097
6098	if (atomic_read(v: &fcport->state) == FCS_ONLINE)
6099	return;
6100
6101	rport_ids.node_name = wwn_to_u64(wwn: fcport->node_name);
6102	rport_ids.port_name = wwn_to_u64(wwn: fcport->port_name);
6103	rport_ids.port_id = fcport->d_id.b.domain << 16 |
6104	fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
6105	rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
6106	fcport->rport = rport = fc_remote_port_add(shost: vha->host, channel: 0, ids: &rport_ids);
6107	if (!rport) {
6108	ql_log(ql_log_warn, vha, 0x2006,
6109	fmt: "Unable to allocate fc remote port.\n");
6110	return;
6111	}
6112
6113	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
6114	*((fc_port_t **)rport->dd_data) = fcport;
6115	spin_unlock_irqrestore(lock: fcport->vha->host->host_lock, flags);
6116	fcport->dev_loss_tmo = rport->dev_loss_tmo;
6117
6118	rport->supported_classes = fcport->supported_classes;
6119
6120	rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
6121	if (fcport->port_type == FCT_INITIATOR)
6122	rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
6123	if (fcport->port_type == FCT_TARGET)
6124	rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
6125	if (fcport->port_type & FCT_NVME_INITIATOR)
6126	rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
6127	if (fcport->port_type & FCT_NVME_TARGET)
6128	rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
6129	if (fcport->port_type & FCT_NVME_DISCOVERY)
6130	rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
6131
6132	fc_remote_port_rolechg(rport, roles: rport_ids.roles);
6133
6134	ql_dbg(ql_dbg_disc, vha, 0x20ee,
6135	fmt: "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
6136	__func__, fcport->port_name, vha->host_no,
6137	rport->scsi_target_id, rport,
6138	(fcport->port_type == FCT_TARGET) ? "tgt" :
6139	((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
6140	}
6141
6142	/*
6143	* qla2x00_update_fcport
6144	* Updates device on list.
6145	*
6146	* Input:
6147	* ha = adapter block pointer.
6148	* fcport = port structure pointer.
6149	*
6150	* Return:
6151	* 0 - Success
6152	* BIT_0 - error
6153	*
6154	* Context:
6155	* Kernel context.
6156	*/
6157	void
6158	qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6159	{
6160	unsigned long flags;
6161
6162	if (IS_SW_RESV_ADDR(fcport->d_id))
6163	return;
6164
6165	ql_dbg(ql_dbg_disc, vha, 0x20ef, fmt: "%s %8phC\n",
6166	__func__, fcport->port_name);
6167
6168	qla2x00_set_fcport_disc_state(fcport, state: DSC_UPD_FCPORT);
6169	fcport->login_retry = vha->hw->login_retry_count;
6170	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6171
6172	spin_lock_irqsave(&vha->work_lock, flags);
6173	fcport->deleted = 0;
6174	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
6175
6176	if (vha->hw->current_topology == ISP_CFG_NL)
6177	fcport->logout_on_delete = 0;
6178	else
6179	fcport->logout_on_delete = 1;
6180	fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
6181
6182	if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
6183	fcport->tgt_short_link_down_cnt++;
6184	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
6185	}
6186
6187	switch (vha->hw->current_topology) {
6188	case ISP_CFG_N:
6189	case ISP_CFG_NL:
6190	fcport->keep_nport_handle = 1;
6191	break;
6192	default:
6193	break;
6194	}
6195
6196	qla2x00_iidma_fcport(vha, fcport);
6197
6198	qla2x00_dfs_create_rport(vha, fp: fcport);
6199
6200	qla24xx_update_fcport_fcp_prio(vha, fcport);
6201
6202	switch (vha->host->active_mode) {
6203	case MODE_INITIATOR:
6204	qla2x00_reg_remote_port(vha, fcport);
6205	break;
6206	case MODE_TARGET:
6207	if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6208	!vha->vha_tgt.qla_tgt->tgt_stopped)
6209	qlt_fc_port_added(vha, fcport);
6210	break;
6211	case MODE_DUAL:
6212	qla2x00_reg_remote_port(vha, fcport);
6213	if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6214	!vha->vha_tgt.qla_tgt->tgt_stopped)
6215	qlt_fc_port_added(vha, fcport);
6216	break;
6217	default:
6218	break;
6219	}
6220
6221	if (NVME_TARGET(vha->hw, fcport))
6222	qla_nvme_register_remote(vha, fcport);
6223
6224	qla2x00_set_fcport_state(fcport, state: FCS_ONLINE);
6225
6226	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
6227	if (fcport->id_changed) {
6228	fcport->id_changed = 0;
6229	ql_dbg(ql_dbg_disc, vha, 0x20d7,
6230	fmt: "%s %d %8phC post gfpnid fcp_cnt %d\n",
6231	__func__, __LINE__, fcport->port_name,
6232	vha->fcport_count);
6233	qla24xx_post_gfpnid_work(vha, fcport);
6234	} else {
6235	ql_dbg(ql_dbg_disc, vha, 0x20d7,
6236	fmt: "%s %d %8phC post gpsc fcp_cnt %d\n",
6237	__func__, __LINE__, fcport->port_name,
6238	vha->fcport_count);
6239	qla24xx_post_gpsc_work(vha, fcport);
6240	}
6241	}
6242
6243	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_COMPLETE);
6244	}
6245
6246	void qla_register_fcport_fn(struct work_struct *work)
6247	{
6248	fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
6249	u32 rscn_gen = fcport->rscn_gen;
6250	u16 data[2];
6251
6252	if (IS_SW_RESV_ADDR(fcport->d_id))
6253	return;
6254
6255	qla2x00_update_fcport(vha: fcport->vha, fcport);
6256
6257	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x911e,
6258	fmt: "%s rscn gen %d/%d next DS %d\n", __func__,
6259	rscn_gen, fcport->rscn_gen, fcport->next_disc_state);
6260
6261	if (rscn_gen != fcport->rscn_gen) {
6262	/* RSCN(s) came in while registration */
6263	switch (fcport->next_disc_state) {
6264	case DSC_DELETE_PEND:
6265	qlt_schedule_sess_for_deletion(fcport);
6266	break;
6267	case DSC_ADISC:
6268	data[0] = data[1] = 0;
6269	qla2x00_post_async_adisc_work(fcport->vha, fcport,
6270	data);
6271	break;
6272	default:
6273	break;
6274	}
6275	}
6276	}
6277
6278	/*
6279	* qla2x00_configure_fabric
6280	* Setup SNS devices with loop ID's.
6281	*
6282	* Input:
6283	* ha = adapter block pointer.
6284	*
6285	* Returns:
6286	* 0 = success.
6287	* BIT_0 = error
6288	*/
6289	static int
6290	qla2x00_configure_fabric(scsi_qla_host_t *vha)
6291	{
6292	int rval;
6293	fc_port_t *fcport;
6294	uint16_t mb[MAILBOX_REGISTER_COUNT];
6295	uint16_t loop_id;
6296	struct qla_hw_data *ha = vha->hw;
6297	int discovery_gen;
6298
6299	/* If FL port exists, then SNS is present */
6300	if (IS_FWI2_CAPABLE(ha))
6301	loop_id = NPH_F_PORT;
6302	else
6303	loop_id = SNS_FL_PORT;
6304	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
6305	if (rval != QLA_SUCCESS) {
6306	ql_dbg(ql_dbg_disc, vha, 0x20a0,
6307	fmt: "MBX_GET_PORT_NAME failed, No FL Port.\n");
6308
6309	vha->device_flags &= ~SWITCH_FOUND;
6310	return (QLA_SUCCESS);
6311	}
6312	vha->device_flags |= SWITCH_FOUND;
6313
6314	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
6315	if (rval != QLA_SUCCESS)
6316	ql_dbg(ql_dbg_disc, vha, 0x20ff,
6317	fmt: "Failed to get Fabric Port Name\n");
6318
6319	if (qla_tgt_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha)) {
6320	rval = qla2x00_send_change_request(vha, 0x3, 0);
6321	if (rval != QLA_SUCCESS)
6322	ql_log(ql_log_warn, vha, 0x121,
6323	fmt: "Failed to enable receiving of RSCN requests: 0x%x.\n",
6324	rval);
6325	}
6326
6327	do {
6328	qla2x00_mgmt_svr_login(vha);
6329
6330	/* Ensure we are logged into the SNS. */
6331	loop_id = NPH_SNS_LID(ha);
6332	rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
6333	0xfc, mb, BIT_1|BIT_0);
6334	if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6335	ql_dbg(ql_dbg_disc, vha, 0x20a1,
6336	fmt: "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
6337	loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
6338	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6339	return rval;
6340	}
6341
6342	/* FDMI support. */
6343	if (ql2xfdmienable &&
6344	test_and_clear_bit(REGISTER_FDMI_NEEDED, addr: &vha->dpc_flags))
6345	qla2x00_fdmi_register(vha);
6346
6347	if (test_and_clear_bit(REGISTER_FC4_NEEDED, addr: &vha->dpc_flags)) {
6348	if (qla2x00_rft_id(vha)) {
6349	/* EMPTY */
6350	ql_dbg(ql_dbg_disc, vha, 0x20a2,
6351	fmt: "Register FC-4 TYPE failed.\n");
6352	if (test_bit(LOOP_RESYNC_NEEDED,
6353	&vha->dpc_flags))
6354	break;
6355	}
6356	if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
6357	/* EMPTY */
6358	ql_dbg(ql_dbg_disc, vha, 0x209a,
6359	fmt: "Register FC-4 Features failed.\n");
6360	if (test_bit(LOOP_RESYNC_NEEDED,
6361	&vha->dpc_flags))
6362	break;
6363	}
6364	if (vha->flags.nvme_enabled) {
6365	if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
6366	ql_dbg(ql_dbg_disc, vha, 0x2049,
6367	fmt: "Register NVME FC Type Features failed.\n");
6368	}
6369	}
6370	if (qla2x00_rnn_id(vha)) {
6371	/* EMPTY */
6372	ql_dbg(ql_dbg_disc, vha, 0x2104,
6373	fmt: "Register Node Name failed.\n");
6374	if (test_bit(LOOP_RESYNC_NEEDED,
6375	&vha->dpc_flags))
6376	break;
6377	} else if (qla2x00_rsnn_nn(vha)) {
6378	/* EMPTY */
6379	ql_dbg(ql_dbg_disc, vha, 0x209b,
6380	fmt: "Register Symbolic Node Name failed.\n");
6381	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6382	break;
6383	}
6384	}
6385
6386
6387	/* Mark the time right before querying FW for connected ports.
6388	* This process is long, asynchronous and by the time it's done,
6389	* collected information might not be accurate anymore. E.g.
6390	* disconnected port might have re-connected and a brand new
6391	* session has been created. In this case session's generation
6392	* will be newer than discovery_gen. */
6393	qlt_do_generation_tick(vha, &discovery_gen);
6394
6395	if (USE_ASYNC_SCAN(ha)) {
6396	rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
6397	NULL);
6398	if (rval)
6399	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6400	} else {
6401	list_for_each_entry(fcport, &vha->vp_fcports, list)
6402	fcport->scan_state = QLA_FCPORT_SCAN;
6403
6404	rval = qla2x00_find_all_fabric_devs(vha);
6405	}
6406	if (rval != QLA_SUCCESS)
6407	break;
6408	} while (0);
6409
6410	if (!vha->nvme_local_port && vha->flags.nvme_enabled)
6411	qla_nvme_register_hba(vha);
6412
6413	if (rval)
6414	ql_dbg(ql_dbg_disc, vha, 0x2068,
6415	fmt: "Configure fabric error exit rval=%d.\n", rval);
6416
6417	return (rval);
6418	}
6419
6420	/*
6421	* qla2x00_find_all_fabric_devs
6422	*
6423	* Input:
6424	* ha = adapter block pointer.
6425	* dev = database device entry pointer.
6426	*
6427	* Returns:
6428	* 0 = success.
6429	*
6430	* Context:
6431	* Kernel context.
6432	*/
6433	static int
6434	qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6435	{
6436	int rval;
6437	uint16_t loop_id;
6438	fc_port_t *fcport, *new_fcport;
6439	int found;
6440
6441	sw_info_t *swl;
6442	int swl_idx;
6443	int first_dev, last_dev;
6444	port_id_t wrap = {}, nxt_d_id;
6445	struct qla_hw_data *ha = vha->hw;
6446	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
6447	unsigned long flags;
6448
6449	rval = QLA_SUCCESS;
6450
6451	/* Try GID_PT to get device list, else GAN. */
6452	if (!ha->swl)
6453	ha->swl = kcalloc(n: ha->max_fibre_devices, size: sizeof(sw_info_t),
6454	GFP_KERNEL);
6455	swl = ha->swl;
6456	if (!swl) {
6457	/*EMPTY*/
6458	ql_dbg(ql_dbg_disc, vha, 0x209c,
6459	fmt: "GID_PT allocations failed, fallback on GA_NXT.\n");
6460	} else {
6461	memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6462	if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6463	swl = NULL;
6464	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6465	return rval;
6466	} else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6467	swl = NULL;
6468	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6469	return rval;
6470	} else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6471	swl = NULL;
6472	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6473	return rval;
6474	} else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6475	swl = NULL;
6476	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6477	return rval;
6478	}
6479
6480	/* If other queries succeeded probe for FC-4 type */
6481	if (swl) {
6482	qla2x00_gff_id(vha, swl);
6483	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6484	return rval;
6485	}
6486	}
6487	swl_idx = 0;
6488
6489	/* Allocate temporary fcport for any new fcports discovered. */
6490	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6491	if (new_fcport == NULL) {
6492	ql_log(ql_log_warn, vha, 0x209d,
6493	fmt: "Failed to allocate memory for fcport.\n");
6494	return (QLA_MEMORY_ALLOC_FAILED);
6495	}
6496	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6497	/* Set start port ID scan at adapter ID. */
6498	first_dev = 1;
6499	last_dev = 0;
6500
6501	/* Starting free loop ID. */
6502	loop_id = ha->min_external_loopid;
6503	for (; loop_id <= ha->max_loop_id; loop_id++) {
6504	if (qla2x00_is_reserved_id(vha, loop_id))
6505	continue;
6506
6507	if (ha->current_topology == ISP_CFG_FL &&
6508	(atomic_read(v: &vha->loop_down_timer) ||
6509	LOOP_TRANSITION(vha))) {
6510	atomic_set(v: &vha->loop_down_timer, i: 0);
6511	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6512	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
6513	break;
6514	}
6515
6516	if (swl != NULL) {
6517	if (last_dev) {
6518	wrap.b24 = new_fcport->d_id.b24;
6519	} else {
6520	new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6521	memcpy(new_fcport->node_name,
6522	swl[swl_idx].node_name, WWN_SIZE);
6523	memcpy(new_fcport->port_name,
6524	swl[swl_idx].port_name, WWN_SIZE);
6525	memcpy(new_fcport->fabric_port_name,
6526	swl[swl_idx].fabric_port_name, WWN_SIZE);
6527	new_fcport->fp_speed = swl[swl_idx].fp_speed;
6528	new_fcport->fc4_type = swl[swl_idx].fc4_type;
6529
6530	new_fcport->nvme_flag = 0;
6531	if (vha->flags.nvme_enabled &&
6532	swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6533	ql_log(ql_log_info, vha, 0x2131,
6534	fmt: "FOUND: NVME port %8phC as FC Type 28h\n",
6535	new_fcport->port_name);
6536	}
6537
6538	if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6539	last_dev = 1;
6540	}
6541	swl_idx++;
6542	}
6543	} else {
6544	/* Send GA_NXT to the switch */
6545	rval = qla2x00_ga_nxt(vha, new_fcport);
6546	if (rval != QLA_SUCCESS) {
6547	ql_log(ql_log_warn, vha, 0x209e,
6548	fmt: "SNS scan failed -- assuming "
6549	"zero-entry result.\n");
6550	rval = QLA_SUCCESS;
6551	break;
6552	}
6553	}
6554
6555	/* If wrap on switch device list, exit. */
6556	if (first_dev) {
6557	wrap.b24 = new_fcport->d_id.b24;
6558	first_dev = 0;
6559	} else if (new_fcport->d_id.b24 == wrap.b24) {
6560	ql_dbg(ql_dbg_disc, vha, 0x209f,
6561	fmt: "Device wrap (%02x%02x%02x).\n",
6562	new_fcport->d_id.b.domain,
6563	new_fcport->d_id.b.area,
6564	new_fcport->d_id.b.al_pa);
6565	break;
6566	}
6567
6568	/* Bypass if same physical adapter. */
6569	if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6570	continue;
6571
6572	/* Bypass virtual ports of the same host. */
6573	if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6574	continue;
6575
6576	/* Bypass if same domain and area of adapter. */
6577	if (((new_fcport->d_id.b24 & 0xffff00) ==
6578	(vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6579	ISP_CFG_FL)
6580	continue;
6581
6582	/* Bypass reserved domain fields. */
6583	if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6584	continue;
6585
6586	/* Bypass ports whose FCP-4 type is not FCP_SCSI */
6587	if (ql2xgffidenable &&
6588	(!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6589	new_fcport->fc4_type != 0))
6590	continue;
6591
6592	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6593
6594	/* Locate matching device in database. */
6595	found = 0;
6596	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6597	if (memcmp(p: new_fcport->port_name, q: fcport->port_name,
6598	WWN_SIZE))
6599	continue;
6600
6601	fcport->scan_state = QLA_FCPORT_FOUND;
6602
6603	found++;
6604
6605	/* Update port state. */
6606	memcpy(fcport->fabric_port_name,
6607	new_fcport->fabric_port_name, WWN_SIZE);
6608	fcport->fp_speed = new_fcport->fp_speed;
6609
6610	/*
6611	* If address the same and state FCS_ONLINE
6612	* (or in target mode), nothing changed.
6613	*/
6614	if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6615	(atomic_read(v: &fcport->state) == FCS_ONLINE ||
6616	(vha->host->active_mode == MODE_TARGET))) {
6617	break;
6618	}
6619
6620	if (fcport->login_retry == 0)
6621	fcport->login_retry =
6622	vha->hw->login_retry_count;
6623	/*
6624	* If device was not a fabric device before.
6625	*/
6626	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6627	fcport->d_id.b24 = new_fcport->d_id.b24;
6628	qla2x00_clear_loop_id(fcport);
6629	fcport->flags |= (FCF_FABRIC_DEVICE |
6630	FCF_LOGIN_NEEDED);
6631	break;
6632	}
6633
6634	/*
6635	* Port ID changed or device was marked to be updated;
6636	* Log it out if still logged in and mark it for
6637	* relogin later.
6638	*/
6639	if (qla_tgt_mode_enabled(ha: base_vha)) {
6640	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6641	fmt: "port changed FC ID, %8phC"
6642	" old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6643	fcport->port_name,
6644	fcport->d_id.b.domain,
6645	fcport->d_id.b.area,
6646	fcport->d_id.b.al_pa,
6647	fcport->loop_id,
6648	new_fcport->d_id.b.domain,
6649	new_fcport->d_id.b.area,
6650	new_fcport->d_id.b.al_pa);
6651	fcport->d_id.b24 = new_fcport->d_id.b24;
6652	break;
6653	}
6654
6655	fcport->d_id.b24 = new_fcport->d_id.b24;
6656	fcport->flags |= FCF_LOGIN_NEEDED;
6657	break;
6658	}
6659
6660	if (found && NVME_TARGET(vha->hw, fcport)) {
6661	if (fcport->disc_state == DSC_DELETE_PEND) {
6662	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
6663	vha->fcport_count--;
6664	fcport->login_succ = 0;
6665	}
6666	}
6667
6668	if (found) {
6669	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6670	continue;
6671	}
6672	/* If device was not in our fcports list, then add it. */
6673	new_fcport->scan_state = QLA_FCPORT_FOUND;
6674	list_add_tail(new: &new_fcport->list, head: &vha->vp_fcports);
6675
6676	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6677
6678
6679	/* Allocate a new replacement fcport. */
6680	nxt_d_id.b24 = new_fcport->d_id.b24;
6681	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6682	if (new_fcport == NULL) {
6683	ql_log(ql_log_warn, vha, 0xd032,
6684	fmt: "Memory allocation failed for fcport.\n");
6685	return (QLA_MEMORY_ALLOC_FAILED);
6686	}
6687	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6688	new_fcport->d_id.b24 = nxt_d_id.b24;
6689	}
6690
6691	qla2x00_free_fcport(fcport: new_fcport);
6692
6693	/*
6694	* Logout all previous fabric dev marked lost, except FCP2 devices.
6695	*/
6696	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6697	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6698	break;
6699
6700	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6701	continue;
6702
6703	if (fcport->scan_state == QLA_FCPORT_SCAN) {
6704	if ((qla_dual_mode_enabled(ha: vha) ||
6705	qla_ini_mode_enabled(ha: vha)) &&
6706	atomic_read(v: &fcport->state) == FCS_ONLINE) {
6707	qla2x00_mark_device_lost(vha, fcport,
6708	ql2xplogiabsentdevice);
6709	if (fcport->loop_id != FC_NO_LOOP_ID &&
6710	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6711	fcport->port_type != FCT_INITIATOR &&
6712	fcport->port_type != FCT_BROADCAST) {
6713	ql_dbg(ql_dbg_disc, vha, 0x20f0,
6714	fmt: "%s %d %8phC post del sess\n",
6715	__func__, __LINE__,
6716	fcport->port_name);
6717	qlt_schedule_sess_for_deletion(fcport);
6718	continue;
6719	}
6720	}
6721	}
6722
6723	if (fcport->scan_state == QLA_FCPORT_FOUND &&
6724	(fcport->flags & FCF_LOGIN_NEEDED) != 0)
6725	qla24xx_fcport_handle_login(vha, fcport);
6726	}
6727	return (rval);
6728	}
6729
6730	/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6731	int
6732	qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6733	{
6734	int loop_id = FC_NO_LOOP_ID;
6735	int lid = NPH_MGMT_SERVER - vha->vp_idx;
6736	unsigned long flags;
6737	struct qla_hw_data *ha = vha->hw;
6738
6739	if (vha->vp_idx == 0) {
6740	set_bit(NPH_MGMT_SERVER, addr: ha->loop_id_map);
6741	return NPH_MGMT_SERVER;
6742	}
6743
6744	/* pick id from high and work down to low */
6745	spin_lock_irqsave(&ha->vport_slock, flags);
6746	for (; lid > 0; lid--) {
6747	if (!test_bit(lid, vha->hw->loop_id_map)) {
6748	set_bit(nr: lid, addr: vha->hw->loop_id_map);
6749	loop_id = lid;
6750	break;
6751	}
6752	}
6753	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
6754
6755	return loop_id;
6756	}
6757
6758	/*
6759	* qla2x00_fabric_login
6760	* Issue fabric login command.
6761	*
6762	* Input:
6763	* ha = adapter block pointer.
6764	* device = pointer to FC device type structure.
6765	*
6766	* Returns:
6767	* 0 - Login successfully
6768	* 1 - Login failed
6769	* 2 - Initiator device
6770	* 3 - Fatal error
6771	*/
6772	int
6773	qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6774	uint16_t *next_loopid)
6775	{
6776	int rval;
6777	int retry;
6778	uint16_t tmp_loopid;
6779	uint16_t mb[MAILBOX_REGISTER_COUNT];
6780	struct qla_hw_data *ha = vha->hw;
6781
6782	retry = 0;
6783	tmp_loopid = 0;
6784
6785	for (;;) {
6786	ql_dbg(ql_dbg_disc, vha, 0x2000,
6787	fmt: "Trying Fabric Login w/loop id 0x%04x for port "
6788	"%02x%02x%02x.\n",
6789	fcport->loop_id, fcport->d_id.b.domain,
6790	fcport->d_id.b.area, fcport->d_id.b.al_pa);
6791
6792	/* Login fcport on switch. */
6793	rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6794	fcport->d_id.b.domain, fcport->d_id.b.area,
6795	fcport->d_id.b.al_pa, mb, BIT_0);
6796	if (rval != QLA_SUCCESS) {
6797	return rval;
6798	}
6799	if (mb[0] == MBS_PORT_ID_USED) {
6800	/*
6801	* Device has another loop ID. The firmware team
6802	* recommends the driver perform an implicit login with
6803	* the specified ID again. The ID we just used is save
6804	* here so we return with an ID that can be tried by
6805	* the next login.
6806	*/
6807	retry++;
6808	tmp_loopid = fcport->loop_id;
6809	fcport->loop_id = mb[1];
6810
6811	ql_dbg(ql_dbg_disc, vha, 0x2001,
6812	fmt: "Fabric Login: port in use - next loop "
6813	"id=0x%04x, port id= %02x%02x%02x.\n",
6814	fcport->loop_id, fcport->d_id.b.domain,
6815	fcport->d_id.b.area, fcport->d_id.b.al_pa);
6816
6817	} else if (mb[0] == MBS_COMMAND_COMPLETE) {
6818	/*
6819	* Login succeeded.
6820	*/
6821	if (retry) {
6822	/* A retry occurred before. */
6823	*next_loopid = tmp_loopid;
6824	} else {
6825	/*
6826	* No retry occurred before. Just increment the
6827	* ID value for next login.
6828	*/
6829	*next_loopid = (fcport->loop_id + 1);
6830	}
6831
6832	if (mb[1] & BIT_0) {
6833	fcport->port_type = FCT_INITIATOR;
6834	} else {
6835	fcport->port_type = FCT_TARGET;
6836	if (mb[1] & BIT_1) {
6837	fcport->flags |= FCF_FCP2_DEVICE;
6838	}
6839	}
6840
6841	if (mb[10] & BIT_0)
6842	fcport->supported_classes |= FC_COS_CLASS2;
6843	if (mb[10] & BIT_1)
6844	fcport->supported_classes |= FC_COS_CLASS3;
6845
6846	if (IS_FWI2_CAPABLE(ha)) {
6847	if (mb[10] & BIT_7)
6848	fcport->flags |=
6849	FCF_CONF_COMP_SUPPORTED;
6850	}
6851
6852	rval = QLA_SUCCESS;
6853	break;
6854	} else if (mb[0] == MBS_LOOP_ID_USED) {
6855	/*
6856	* Loop ID already used, try next loop ID.
6857	*/
6858	fcport->loop_id++;
6859	rval = qla2x00_find_new_loop_id(vha, dev: fcport);
6860	if (rval != QLA_SUCCESS) {
6861	/* Ran out of loop IDs to use */
6862	break;
6863	}
6864	} else if (mb[0] == MBS_COMMAND_ERROR) {
6865	/*
6866	* Firmware possibly timed out during login. If NO
6867	* retries are left to do then the device is declared
6868	* dead.
6869	*/
6870	*next_loopid = fcport->loop_id;
6871	ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6872	fcport->d_id.b.domain, fcport->d_id.b.area,
6873	fcport->d_id.b.al_pa);
6874	qla2x00_mark_device_lost(vha, fcport, 1);
6875
6876	rval = 1;
6877	break;
6878	} else {
6879	/*
6880	* unrecoverable / not handled error
6881	*/
6882	ql_dbg(ql_dbg_disc, vha, 0x2002,
6883	fmt: "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6884	"jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6885	fcport->d_id.b.area, fcport->d_id.b.al_pa,
6886	fcport->loop_id, jiffies);
6887
6888	*next_loopid = fcport->loop_id;
6889	ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6890	fcport->d_id.b.domain, fcport->d_id.b.area,
6891	fcport->d_id.b.al_pa);
6892	qla2x00_clear_loop_id(fcport);
6893	fcport->login_retry = 0;
6894
6895	rval = 3;
6896	break;
6897	}
6898	}
6899
6900	return (rval);
6901	}
6902
6903	/*
6904	* qla2x00_local_device_login
6905	* Issue local device login command.
6906	*
6907	* Input:
6908	* ha = adapter block pointer.
6909	* loop_id = loop id of device to login to.
6910	*
6911	* Returns (Where's the #define!!!!):
6912	* 0 - Login successfully
6913	* 1 - Login failed
6914	* 3 - Fatal error
6915	*/
6916	int
6917	qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6918	{
6919	int rval;
6920	uint16_t mb[MAILBOX_REGISTER_COUNT];
6921
6922	memset(mb, 0, sizeof(mb));
6923	rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6924	if (rval == QLA_SUCCESS) {
6925	/* Interrogate mailbox registers for any errors */
6926	if (mb[0] == MBS_COMMAND_ERROR)
6927	rval = 1;
6928	else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6929	/* device not in PCB table */
6930	rval = 3;
6931	}
6932
6933	return (rval);
6934	}
6935
6936	/*
6937	* qla2x00_loop_resync
6938	* Resync with fibre channel devices.
6939	*
6940	* Input:
6941	* ha = adapter block pointer.
6942	*
6943	* Returns:
6944	* 0 = success
6945	*/
6946	int
6947	qla2x00_loop_resync(scsi_qla_host_t *vha)
6948	{
6949	int rval = QLA_SUCCESS;
6950	uint32_t wait_time;
6951
6952	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
6953	if (vha->flags.online) {
6954	if (!(rval = qla2x00_fw_ready(vha))) {
6955	/* Wait at most MAX_TARGET RSCNs for a stable link. */
6956	wait_time = 256;
6957	do {
6958	if (!IS_QLAFX00(vha->hw)) {
6959	/*
6960	* Issue a marker after FW becomes
6961	* ready.
6962	*/
6963	qla2x00_marker(vha, vha->hw->base_qpair,
6964	0, 0, MK_SYNC_ALL);
6965	vha->marker_needed = 0;
6966	}
6967
6968	/* Remap devices on Loop. */
6969	clear_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6970
6971	if (IS_QLAFX00(vha->hw))
6972	qlafx00_configure_devices(vha);
6973	else
6974	qla2x00_configure_loop(vha);
6975
6976	wait_time--;
6977	} while (!atomic_read(v: &vha->loop_down_timer) &&
6978	!(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6979	&& wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6980	&vha->dpc_flags)));
6981	}
6982	}
6983
6984	if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6985	return (QLA_FUNCTION_FAILED);
6986
6987	if (rval)
6988	ql_dbg(ql_dbg_disc, vha, 0x206c,
6989	fmt: "%s *** FAILED ***.\n", __func__);
6990
6991	return (rval);
6992	}
6993
6994	/*
6995	* qla2x00_perform_loop_resync
6996	* Description: This function will set the appropriate flags and call
6997	* qla2x00_loop_resync. If successful loop will be resynced
6998	* Arguments : scsi_qla_host_t pointer
6999	* returm : Success or Failure
7000	*/
7001
7002	int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
7003	{
7004	int32_t rval = 0;
7005
7006	if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, addr: &ha->dpc_flags)) {
7007	/*Configure the flags so that resync happens properly*/
7008	atomic_set(v: &ha->loop_down_timer, i: 0);
7009	if (!(ha->device_flags & DFLG_NO_CABLE)) {
7010	atomic_set(v: &ha->loop_state, LOOP_UP);
7011	set_bit(LOCAL_LOOP_UPDATE, addr: &ha->dpc_flags);
7012	set_bit(REGISTER_FC4_NEEDED, addr: &ha->dpc_flags);
7013	set_bit(LOOP_RESYNC_NEEDED, addr: &ha->dpc_flags);
7014
7015	rval = qla2x00_loop_resync(vha: ha);
7016	} else
7017	atomic_set(v: &ha->loop_state, LOOP_DEAD);
7018
7019	clear_bit(LOOP_RESYNC_ACTIVE, addr: &ha->dpc_flags);
7020	}
7021
7022	return rval;
7023	}
7024
7025	/* Assumes idc_lock always held on entry */
7026	void
7027	qla83xx_reset_ownership(scsi_qla_host_t *vha)
7028	{
7029	struct qla_hw_data *ha = vha->hw;
7030	uint32_t drv_presence, drv_presence_mask;
7031	uint32_t dev_part_info1, dev_part_info2, class_type;
7032	uint32_t class_type_mask = 0x3;
7033	uint16_t fcoe_other_function = 0xffff, i;
7034
7035	if (IS_QLA8044(ha)) {
7036	drv_presence = qla8044_rd_direct(vha,
7037	crb_reg: QLA8044_CRB_DRV_ACTIVE_INDEX);
7038	dev_part_info1 = qla8044_rd_direct(vha,
7039	crb_reg: QLA8044_CRB_DEV_PART_INFO_INDEX);
7040	dev_part_info2 = qla8044_rd_direct(vha,
7041	QLA8044_CRB_DEV_PART_INFO2);
7042	} else {
7043	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7044	qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
7045	qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
7046	}
7047	for (i = 0; i < 8; i++) {
7048	class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
7049	if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7050	(i != ha->portnum)) {
7051	fcoe_other_function = i;
7052	break;
7053	}
7054	}
7055	if (fcoe_other_function == 0xffff) {
7056	for (i = 0; i < 8; i++) {
7057	class_type = ((dev_part_info2 >> (i * 4)) &
7058	class_type_mask);
7059	if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7060	((i + 8) != ha->portnum)) {
7061	fcoe_other_function = i + 8;
7062	break;
7063	}
7064	}
7065	}
7066	/*
7067	* Prepare drv-presence mask based on fcoe functions present.
7068	* However consider only valid physical fcoe function numbers (0-15).
7069	*/
7070	drv_presence_mask = ~((1 << (ha->portnum)) |
7071	((fcoe_other_function == 0xffff) ?
7072	0 : (1 << (fcoe_other_function))));
7073
7074	/* We are the reset owner iff:
7075	* - No other protocol drivers present.
7076	* - This is the lowest among fcoe functions. */
7077	if (!(drv_presence & drv_presence_mask) &&
7078	(ha->portnum < fcoe_other_function)) {
7079	ql_dbg(ql_dbg_p3p, vha, 0xb07f,
7080	fmt: "This host is Reset owner.\n");
7081	ha->flags.nic_core_reset_owner = 1;
7082	}
7083	}
7084
7085	static int
7086	__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
7087	{
7088	int rval = QLA_SUCCESS;
7089	struct qla_hw_data *ha = vha->hw;
7090	uint32_t drv_ack;
7091
7092	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7093	if (rval == QLA_SUCCESS) {
7094	drv_ack |= (1 << ha->portnum);
7095	rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7096	}
7097
7098	return rval;
7099	}
7100
7101	static int
7102	__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
7103	{
7104	int rval = QLA_SUCCESS;
7105	struct qla_hw_data *ha = vha->hw;
7106	uint32_t drv_ack;
7107
7108	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7109	if (rval == QLA_SUCCESS) {
7110	drv_ack &= ~(1 << ha->portnum);
7111	rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7112	}
7113
7114	return rval;
7115	}
7116
7117	/* Assumes idc-lock always held on entry */
7118	void
7119	qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
7120	{
7121	struct qla_hw_data *ha = vha->hw;
7122	uint32_t idc_audit_reg = 0, duration_secs = 0;
7123
7124	switch (audit_type) {
7125	case IDC_AUDIT_TIMESTAMP:
7126	ha->idc_audit_ts = (jiffies_to_msecs(j: jiffies) / 1000);
7127	idc_audit_reg = (ha->portnum) |
7128	(IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
7129	qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7130	break;
7131
7132	case IDC_AUDIT_COMPLETION:
7133	duration_secs = ((jiffies_to_msecs(j: jiffies) -
7134	jiffies_to_msecs(j: ha->idc_audit_ts)) / 1000);
7135	idc_audit_reg = (ha->portnum) |
7136	(IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
7137	qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7138	break;
7139
7140	default:
7141	ql_log(ql_log_warn, vha, 0xb078,
7142	fmt: "Invalid audit type specified.\n");
7143	break;
7144	}
7145	}
7146
7147	/* Assumes idc_lock always held on entry */
7148	static int
7149	qla83xx_initiating_reset(scsi_qla_host_t *vha)
7150	{
7151	struct qla_hw_data *ha = vha->hw;
7152	uint32_t idc_control, dev_state;
7153
7154	__qla83xx_get_idc_control(vha, &idc_control);
7155	if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
7156	ql_log(ql_log_info, vha, 0xb080,
7157	fmt: "NIC Core reset has been disabled. idc-control=0x%x\n",
7158	idc_control);
7159	return QLA_FUNCTION_FAILED;
7160	}
7161
7162	/* Set NEED-RESET iff in READY state and we are the reset-owner */
7163	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7164	if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
7165	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
7166	QLA8XXX_DEV_NEED_RESET);
7167	ql_log(ql_log_info, vha, 0xb056, fmt: "HW State: NEED RESET.\n");
7168	qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
7169	} else {
7170	ql_log(ql_log_info, vha, 0xb057, fmt: "HW State: %s.\n",
7171	qdev_state(dev_state));
7172
7173	/* SV: XXX: Is timeout required here? */
7174	/* Wait for IDC state change READY -> NEED_RESET */
7175	while (dev_state == QLA8XXX_DEV_READY) {
7176	qla83xx_idc_unlock(vha, 0);
7177	msleep(msecs: 200);
7178	qla83xx_idc_lock(vha, 0);
7179	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7180	}
7181	}
7182
7183	/* Send IDC ack by writing to drv-ack register */
7184	__qla83xx_set_drv_ack(vha);
7185
7186	return QLA_SUCCESS;
7187	}
7188
7189	int
7190	__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
7191	{
7192	return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7193	}
7194
7195	int
7196	__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
7197	{
7198	return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7199	}
7200
7201	static int
7202	qla83xx_check_driver_presence(scsi_qla_host_t *vha)
7203	{
7204	uint32_t drv_presence = 0;
7205	struct qla_hw_data *ha = vha->hw;
7206
7207	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7208	if (drv_presence & (1 << ha->portnum))
7209	return QLA_SUCCESS;
7210	else
7211	return QLA_TEST_FAILED;
7212	}
7213
7214	int
7215	qla83xx_nic_core_reset(scsi_qla_host_t *vha)
7216	{
7217	int rval = QLA_SUCCESS;
7218	struct qla_hw_data *ha = vha->hw;
7219
7220	ql_dbg(ql_dbg_p3p, vha, 0xb058,
7221	fmt: "Entered %s().\n", __func__);
7222
7223	if (vha->device_flags & DFLG_DEV_FAILED) {
7224	ql_log(ql_log_warn, vha, 0xb059,
7225	fmt: "Device in unrecoverable FAILED state.\n");
7226	return QLA_FUNCTION_FAILED;
7227	}
7228
7229	qla83xx_idc_lock(vha, 0);
7230
7231	if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
7232	ql_log(ql_log_warn, vha, 0xb05a,
7233	fmt: "Function=0x%x has been removed from IDC participation.\n",
7234	ha->portnum);
7235	rval = QLA_FUNCTION_FAILED;
7236	goto exit;
7237	}
7238
7239	qla83xx_reset_ownership(vha);
7240
7241	rval = qla83xx_initiating_reset(vha);
7242
7243	/*
7244	* Perform reset if we are the reset-owner,
7245	* else wait till IDC state changes to READY/FAILED.
7246	*/
7247	if (rval == QLA_SUCCESS) {
7248	rval = qla83xx_idc_state_handler(vha);
7249
7250	if (rval == QLA_SUCCESS)
7251	ha->flags.nic_core_hung = 0;
7252	__qla83xx_clear_drv_ack(vha);
7253	}
7254
7255	exit:
7256	qla83xx_idc_unlock(vha, 0);
7257
7258	ql_dbg(ql_dbg_p3p, vha, 0xb05b, fmt: "Exiting %s.\n", __func__);
7259
7260	return rval;
7261	}
7262
7263	int
7264	qla2xxx_mctp_dump(scsi_qla_host_t *vha)
7265	{
7266	struct qla_hw_data *ha = vha->hw;
7267	int rval = QLA_FUNCTION_FAILED;
7268
7269	if (!IS_MCTP_CAPABLE(ha)) {
7270	/* This message can be removed from the final version */
7271	ql_log(ql_log_info, vha, 0x506d,
7272	fmt: "This board is not MCTP capable\n");
7273	return rval;
7274	}
7275
7276	if (!ha->mctp_dump) {
7277	ha->mctp_dump = dma_alloc_coherent(dev: &ha->pdev->dev,
7278	MCTP_DUMP_SIZE, dma_handle: &ha->mctp_dump_dma, GFP_KERNEL);
7279
7280	if (!ha->mctp_dump) {
7281	ql_log(ql_log_warn, vha, 0x506e,
7282	fmt: "Failed to allocate memory for mctp dump\n");
7283	return rval;
7284	}
7285	}
7286
7287	#define MCTP_DUMP_STR_ADDR 0x00000000
7288	rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
7289	MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
7290	if (rval != QLA_SUCCESS) {
7291	ql_log(ql_log_warn, vha, 0x506f,
7292	fmt: "Failed to capture mctp dump\n");
7293	} else {
7294	ql_log(ql_log_info, vha, 0x5070,
7295	fmt: "Mctp dump capture for host (%ld/%p).\n",
7296	vha->host_no, ha->mctp_dump);
7297	ha->mctp_dumped = 1;
7298	}
7299
7300	if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
7301	ha->flags.nic_core_reset_hdlr_active = 1;
7302	rval = qla83xx_restart_nic_firmware(vha);
7303	if (rval)
7304	/* NIC Core reset failed. */
7305	ql_log(ql_log_warn, vha, 0x5071,
7306	fmt: "Failed to restart nic firmware\n");
7307	else
7308	ql_dbg(ql_dbg_p3p, vha, 0xb084,
7309	fmt: "Restarted NIC firmware successfully.\n");
7310	ha->flags.nic_core_reset_hdlr_active = 0;
7311	}
7312
7313	return rval;
7314
7315	}
7316
7317	/*
7318	* qla2x00_quiesce_io
7319	* Description: This function will block the new I/Os
7320	* Its not aborting any I/Os as context
7321	* is not destroyed during quiescence
7322	* Arguments: scsi_qla_host_t
7323	* return : void
7324	*/
7325	void
7326	qla2x00_quiesce_io(scsi_qla_host_t *vha)
7327	{
7328	struct qla_hw_data *ha = vha->hw;
7329	struct scsi_qla_host *vp, *tvp;
7330	unsigned long flags;
7331
7332	ql_dbg(ql_dbg_dpc, vha, 0x401d,
7333	fmt: "Quiescing I/O - ha=%p.\n", ha);
7334
7335	atomic_set(v: &ha->loop_down_timer, LOOP_DOWN_TIME);
7336	if (atomic_read(v: &vha->loop_state) != LOOP_DOWN) {
7337	atomic_set(v: &vha->loop_state, LOOP_DOWN);
7338	qla2x00_mark_all_devices_lost(vha);
7339
7340	spin_lock_irqsave(&ha->vport_slock, flags);
7341	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7342	atomic_inc(v: &vp->vref_count);
7343	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7344
7345	qla2x00_mark_all_devices_lost(vp);
7346
7347	spin_lock_irqsave(&ha->vport_slock, flags);
7348	atomic_dec(v: &vp->vref_count);
7349	}
7350	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7351	} else {
7352	if (!atomic_read(v: &vha->loop_down_timer))
7353	atomic_set(v: &vha->loop_down_timer,
7354	LOOP_DOWN_TIME);
7355	}
7356	/* Wait for pending cmds to complete */
7357	WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
7358	!= QLA_SUCCESS);
7359	}
7360
7361	void
7362	qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
7363	{
7364	struct qla_hw_data *ha = vha->hw;
7365	struct scsi_qla_host *vp, *tvp;
7366	unsigned long flags;
7367	fc_port_t *fcport;
7368	u16 i;
7369
7370	/* For ISP82XX, driver waits for completion of the commands.
7371	* online flag should be set.
7372	*/
7373	if (!(IS_P3P_TYPE(ha)))
7374	vha->flags.online = 0;
7375	ha->flags.chip_reset_done = 0;
7376	clear_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
7377	vha->qla_stats.total_isp_aborts++;
7378
7379	ql_log(ql_log_info, vha, 0x00af,
7380	fmt: "Performing ISP error recovery - ha=%p.\n", ha);
7381
7382	ha->flags.purge_mbox = 1;
7383	/* For ISP82XX, reset_chip is just disabling interrupts.
7384	* Driver waits for the completion of the commands.
7385	* the interrupts need to be enabled.
7386	*/
7387	if (!(IS_P3P_TYPE(ha)))
7388	ha->isp_ops->reset_chip(vha);
7389
7390	ha->link_data_rate = PORT_SPEED_UNKNOWN;
7391	SAVE_TOPO(ha);
7392	ha->flags.rida_fmt2 = 0;
7393	ha->flags.n2n_ae = 0;
7394	ha->flags.lip_ae = 0;
7395	ha->current_topology = 0;
7396	QLA_FW_STOPPED(ha);
7397	ha->flags.fw_init_done = 0;
7398	ha->chip_reset++;
7399	ha->base_qpair->chip_reset = ha->chip_reset;
7400	ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7401	ha->base_qpair->prev_completion_cnt = 0;
7402	for (i = 0; i < ha->max_qpairs; i++) {
7403	if (ha->queue_pair_map[i]) {
7404	ha->queue_pair_map[i]->chip_reset =
7405	ha->base_qpair->chip_reset;
7406	ha->queue_pair_map[i]->cmd_cnt =
7407	ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7408	ha->base_qpair->prev_completion_cnt = 0;
7409	}
7410	}
7411
7412	/* purge MBox commands */
7413	spin_lock_irqsave(&ha->hardware_lock, flags);
7414	if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
7415	clear_bit(MBX_INTR_WAIT, addr: &ha->mbx_cmd_flags);
7416	complete(&ha->mbx_intr_comp);
7417	}
7418	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7419
7420	i = 0;
7421	while (atomic_read(v: &ha->num_pend_mbx_stage2) ||
7422	atomic_read(v: &ha->num_pend_mbx_stage1)) {
7423	msleep(msecs: 20);
7424	i++;
7425	if (i > 50)
7426	break;
7427	}
7428	ha->flags.purge_mbox = 0;
7429
7430	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
7431	if (atomic_read(v: &vha->loop_state) != LOOP_DOWN) {
7432	atomic_set(v: &vha->loop_state, LOOP_DOWN);
7433	qla2x00_mark_all_devices_lost(vha);
7434
7435	spin_lock_irqsave(&ha->vport_slock, flags);
7436	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7437	atomic_inc(v: &vp->vref_count);
7438	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7439
7440	qla2x00_mark_all_devices_lost(vp);
7441
7442	spin_lock_irqsave(&ha->vport_slock, flags);
7443	atomic_dec(v: &vp->vref_count);
7444	}
7445	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7446	} else {
7447	if (!atomic_read(v: &vha->loop_down_timer))
7448	atomic_set(v: &vha->loop_down_timer,
7449	LOOP_DOWN_TIME);
7450	}
7451
7452	/* Clear all async request states across all VPs. */
7453	list_for_each_entry(fcport, &vha->vp_fcports, list) {
7454	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7455	fcport->scan_state = 0;
7456	}
7457	spin_lock_irqsave(&ha->vport_slock, flags);
7458	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7459	atomic_inc(v: &vp->vref_count);
7460	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7461
7462	list_for_each_entry(fcport, &vp->vp_fcports, list)
7463	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7464
7465	spin_lock_irqsave(&ha->vport_slock, flags);
7466	atomic_dec(v: &vp->vref_count);
7467	}
7468	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7469
7470	/* Make sure for ISP 82XX IO DMA is complete */
7471	if (IS_P3P_TYPE(ha)) {
7472	qla82xx_chip_reset_cleanup(vha);
7473	ql_log(ql_log_info, vha, 0x00b4,
7474	fmt: "Done chip reset cleanup.\n");
7475
7476	/* Done waiting for pending commands. Reset online flag */
7477	vha->flags.online = 0;
7478	}
7479
7480	/* Requeue all commands in outstanding command list. */
7481	qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7482	/* memory barrier */
7483	wmb();
7484	}
7485
7486	/*
7487	* qla2x00_abort_isp
7488	* Resets ISP and aborts all outstanding commands.
7489	*
7490	* Input:
7491	* ha = adapter block pointer.
7492	*
7493	* Returns:
7494	* 0 = success
7495	*/
7496	int
7497	qla2x00_abort_isp(scsi_qla_host_t *vha)
7498	{
7499	uint8_t status = 0;
7500	struct qla_hw_data *ha = vha->hw;
7501	struct scsi_qla_host *vp, *tvp;
7502	struct req_que *req = ha->req_q_map[0];
7503	unsigned long flags;
7504	fc_port_t *fcport;
7505
7506	if (vha->flags.online) {
7507	qla2x00_abort_isp_cleanup(vha);
7508
7509	vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS;
7510	vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS;
7511
7512	if (vha->hw->flags.port_isolated)
7513	return status;
7514
7515	if (qla2x00_isp_reg_stat(ha)) {
7516	ql_log(ql_log_info, vha, 0x803f,
7517	fmt: "ISP Abort - ISP reg disconnect, exiting.\n");
7518	return status;
7519	}
7520
7521	if (test_and_clear_bit(ISP_ABORT_TO_ROM, addr: &vha->dpc_flags)) {
7522	ha->flags.chip_reset_done = 1;
7523	vha->flags.online = 1;
7524	status = 0;
7525	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7526	return status;
7527	}
7528
7529	if (IS_QLA8031(ha)) {
7530	ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7531	fmt: "Clearing fcoe driver presence.\n");
7532	if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7533	ql_dbg(ql_dbg_p3p, vha, 0xb073,
7534	fmt: "Error while clearing DRV-Presence.\n");
7535	}
7536
7537	if (unlikely(pci_channel_offline(ha->pdev) &&
7538	ha->flags.pci_channel_io_perm_failure)) {
7539	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7540	status = 0;
7541	return status;
7542	}
7543
7544	switch (vha->qlini_mode) {
7545	case QLA2XXX_INI_MODE_DISABLED:
7546	if (!qla_tgt_mode_enabled(ha: vha))
7547	return 0;
7548	break;
7549	case QLA2XXX_INI_MODE_DUAL:
7550	if (!qla_dual_mode_enabled(ha: vha) &&
7551	!qla_ini_mode_enabled(ha: vha))
7552	return 0;
7553	break;
7554	case QLA2XXX_INI_MODE_ENABLED:
7555	default:
7556	break;
7557	}
7558
7559	ha->isp_ops->get_flash_version(vha, req->ring);
7560
7561	if (qla2x00_isp_reg_stat(ha)) {
7562	ql_log(ql_log_info, vha, 0x803f,
7563	fmt: "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7564	return status;
7565	}
7566	ha->isp_ops->nvram_config(vha);
7567
7568	if (qla2x00_isp_reg_stat(ha)) {
7569	ql_log(ql_log_info, vha, 0x803f,
7570	fmt: "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7571	return status;
7572	}
7573
7574	/* User may have updated [fcp|nvme] prefer in flash */
7575	list_for_each_entry(fcport, &vha->vp_fcports, list) {
7576	if (NVME_PRIORITY(ha, fcport))
7577	fcport->do_prli_nvme = 1;
7578	else
7579	fcport->do_prli_nvme = 0;
7580	}
7581
7582	if (!qla2x00_restart_isp(vha)) {
7583	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
7584
7585	if (!atomic_read(v: &vha->loop_down_timer)) {
7586	/*
7587	* Issue marker command only when we are going
7588	* to start the I/O .
7589	*/
7590	vha->marker_needed = 1;
7591	}
7592
7593	vha->flags.online = 1;
7594
7595	ha->isp_ops->enable_intrs(ha);
7596
7597	ha->isp_abort_cnt = 0;
7598	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7599
7600	if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7601	qla2x00_get_fw_version(vha);
7602
7603	} else { /* failed the ISP abort */
7604	vha->flags.online = 1;
7605	if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7606	if (ha->isp_abort_cnt == 0) {
7607	ql_log(ql_log_fatal, vha, 0x8035,
7608	fmt: "ISP error recover failed - "
7609	"board disabled.\n");
7610	/*
7611	* The next call disables the board
7612	* completely.
7613	*/
7614	qla2x00_abort_isp_cleanup(vha);
7615	vha->flags.online = 0;
7616	clear_bit(ISP_ABORT_RETRY,
7617	addr: &vha->dpc_flags);
7618	status = 0;
7619	} else { /* schedule another ISP abort */
7620	ha->isp_abort_cnt--;
7621	ql_dbg(ql_dbg_taskm, vha, 0x8020,
7622	fmt: "ISP abort - retry remaining %d.\n",
7623	ha->isp_abort_cnt);
7624	status = 1;
7625	}
7626	} else {
7627	ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7628	ql_dbg(ql_dbg_taskm, vha, 0x8021,
7629	fmt: "ISP error recovery - retrying (%d) "
7630	"more times.\n", ha->isp_abort_cnt);
7631	set_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7632	status = 1;
7633	}
7634	}
7635
7636	}
7637
7638	if (vha->hw->flags.port_isolated) {
7639	qla2x00_abort_isp_cleanup(vha);
7640	return status;
7641	}
7642
7643	if (!status) {
7644	ql_dbg(ql_dbg_taskm, vha, 0x8022, fmt: "%s succeeded.\n", __func__);
7645	qla2x00_configure_hba(vha);
7646	spin_lock_irqsave(&ha->vport_slock, flags);
7647	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7648	if (vp->vp_idx) {
7649	atomic_inc(v: &vp->vref_count);
7650	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7651
7652	/* User may have updated [fcp|nvme] prefer in flash */
7653	list_for_each_entry(fcport, &vp->vp_fcports, list) {
7654	if (NVME_PRIORITY(ha, fcport))
7655	fcport->do_prli_nvme = 1;
7656	else
7657	fcport->do_prli_nvme = 0;
7658	}
7659
7660	qla2x00_vp_abort_isp(vp);
7661
7662	spin_lock_irqsave(&ha->vport_slock, flags);
7663	atomic_dec(v: &vp->vref_count);
7664	}
7665	}
7666	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7667
7668	if (IS_QLA8031(ha)) {
7669	ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7670	fmt: "Setting back fcoe driver presence.\n");
7671	if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7672	ql_dbg(ql_dbg_p3p, vha, 0xb074,
7673	fmt: "Error while setting DRV-Presence.\n");
7674	}
7675	} else {
7676	ql_log(ql_log_warn, vha, 0x8023, fmt: "%s **** FAILED ****.\n",
7677	__func__);
7678	}
7679
7680	return(status);
7681	}
7682
7683	/*
7684	* qla2x00_restart_isp
7685	* restarts the ISP after a reset
7686	*
7687	* Input:
7688	* ha = adapter block pointer.
7689	*
7690	* Returns:
7691	* 0 = success
7692	*/
7693	static int
7694	qla2x00_restart_isp(scsi_qla_host_t *vha)
7695	{
7696	int status;
7697	struct qla_hw_data *ha = vha->hw;
7698
7699	/* If firmware needs to be loaded */
7700	if (qla2x00_isp_firmware(vha)) {
7701	vha->flags.online = 0;
7702	status = ha->isp_ops->chip_diag(vha);
7703	if (status)
7704	return status;
7705	status = qla2x00_setup_chip(vha);
7706	if (status)
7707	return status;
7708	}
7709
7710	status = qla2x00_init_rings(vha);
7711	if (status)
7712	return status;
7713
7714	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
7715	ha->flags.chip_reset_done = 1;
7716
7717	/* Initialize the queues in use */
7718	qla25xx_init_queues(ha);
7719
7720	status = qla2x00_fw_ready(vha);
7721	if (status) {
7722	/* if no cable then assume it's good */
7723	return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7724	}
7725
7726	/* Issue a marker after FW becomes ready. */
7727	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7728	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
7729
7730	return 0;
7731	}
7732
7733	static int
7734	qla25xx_init_queues(struct qla_hw_data *ha)
7735	{
7736	struct rsp_que *rsp = NULL;
7737	struct req_que *req = NULL;
7738	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
7739	int ret = -1;
7740	int i;
7741
7742	for (i = 1; i < ha->max_rsp_queues; i++) {
7743	rsp = ha->rsp_q_map[i];
7744	if (rsp && test_bit(i, ha->rsp_qid_map)) {
7745	rsp->options &= ~BIT_0;
7746	ret = qla25xx_init_rsp_que(base_vha, rsp);
7747	if (ret != QLA_SUCCESS)
7748	ql_dbg(ql_dbg_init, vha: base_vha, 0x00ff,
7749	fmt: "%s Rsp que: %d init failed.\n",
7750	__func__, rsp->id);
7751	else
7752	ql_dbg(ql_dbg_init, vha: base_vha, 0x0100,
7753	fmt: "%s Rsp que: %d inited.\n",
7754	__func__, rsp->id);
7755	}
7756	}
7757	for (i = 1; i < ha->max_req_queues; i++) {
7758	req = ha->req_q_map[i];
7759	if (req && test_bit(i, ha->req_qid_map)) {
7760	/* Clear outstanding commands array. */
7761	req->options &= ~BIT_0;
7762	ret = qla25xx_init_req_que(base_vha, req);
7763	if (ret != QLA_SUCCESS)
7764	ql_dbg(ql_dbg_init, vha: base_vha, 0x0101,
7765	fmt: "%s Req que: %d init failed.\n",
7766	__func__, req->id);
7767	else
7768	ql_dbg(ql_dbg_init, vha: base_vha, 0x0102,
7769	fmt: "%s Req que: %d inited.\n",
7770	__func__, req->id);
7771	}
7772	}
7773	return ret;
7774	}
7775
7776	/*
7777	* qla2x00_reset_adapter
7778	* Reset adapter.
7779	*
7780	* Input:
7781	* ha = adapter block pointer.
7782	*/
7783	int
7784	qla2x00_reset_adapter(scsi_qla_host_t *vha)
7785	{
7786	unsigned long flags = 0;
7787	struct qla_hw_data *ha = vha->hw;
7788	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7789
7790	vha->flags.online = 0;
7791	ha->isp_ops->disable_intrs(ha);
7792
7793	spin_lock_irqsave(&ha->hardware_lock, flags);
7794	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
7795	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
7796	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
7797	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
7798	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7799
7800	return QLA_SUCCESS;
7801	}
7802
7803	int
7804	qla24xx_reset_adapter(scsi_qla_host_t *vha)
7805	{
7806	unsigned long flags = 0;
7807	struct qla_hw_data *ha = vha->hw;
7808	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7809
7810	if (IS_P3P_TYPE(ha))
7811	return QLA_SUCCESS;
7812
7813	vha->flags.online = 0;
7814	ha->isp_ops->disable_intrs(ha);
7815
7816	spin_lock_irqsave(&ha->hardware_lock, flags);
7817	wrt_reg_dword(addr: &reg->hccr, HCCRX_SET_RISC_RESET);
7818	rd_reg_dword(addr: &reg->hccr);
7819	wrt_reg_dword(addr: &reg->hccr, HCCRX_REL_RISC_PAUSE);
7820	rd_reg_dword(addr: &reg->hccr);
7821	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7822
7823	if (IS_NOPOLLING_TYPE(ha))
7824	ha->isp_ops->enable_intrs(ha);
7825
7826	return QLA_SUCCESS;
7827	}
7828
7829	/* On sparc systems, obtain port and node WWN from firmware
7830	* properties.
7831	*/
7832	static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7833	struct nvram_24xx *nv)
7834	{
7835	#ifdef CONFIG_SPARC
7836	struct qla_hw_data *ha = vha->hw;
7837	struct pci_dev *pdev = ha->pdev;
7838	struct device_node *dp = pci_device_to_OF_node(pdev);
7839	const u8 *val;
7840	int len;
7841
7842	val = of_get_property(dp, "port-wwn", &len);
7843	if (val && len >= WWN_SIZE)
7844	memcpy(nv->port_name, val, WWN_SIZE);
7845
7846	val = of_get_property(dp, "node-wwn", &len);
7847	if (val && len >= WWN_SIZE)
7848	memcpy(nv->node_name, val, WWN_SIZE);
7849	#endif
7850	}
7851
7852	int
7853	qla24xx_nvram_config(scsi_qla_host_t *vha)
7854	{
7855	int rval;
7856	struct init_cb_24xx *icb;
7857	struct nvram_24xx *nv;
7858	__le32 *dptr;
7859	uint8_t *dptr1, *dptr2;
7860	uint32_t chksum;
7861	uint16_t cnt;
7862	struct qla_hw_data *ha = vha->hw;
7863
7864	rval = QLA_SUCCESS;
7865	icb = (struct init_cb_24xx *)ha->init_cb;
7866	nv = ha->nvram;
7867
7868	/* Determine NVRAM starting address. */
7869	if (ha->port_no == 0) {
7870	ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7871	ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7872	} else {
7873	ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7874	ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7875	}
7876
7877	ha->nvram_size = sizeof(*nv);
7878	ha->vpd_size = FA_NVRAM_VPD_SIZE;
7879
7880	/* Get VPD data into cache */
7881	ha->vpd = ha->nvram + VPD_OFFSET;
7882	ha->isp_ops->read_nvram(vha, ha->vpd,
7883	ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7884
7885	/* Get NVRAM data into cache and calculate checksum. */
7886	dptr = (__force __le32 *)nv;
7887	ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7888	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7889	chksum += le32_to_cpu(*dptr);
7890
7891	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7892	fmt: "Contents of NVRAM\n");
7893	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7894	nv, ha->nvram_size);
7895
7896	/* Bad NVRAM data, set defaults parameters. */
7897	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
7898	le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7899	/* Reset NVRAM data. */
7900	ql_log(ql_log_warn, vha, 0x006b,
7901	fmt: "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7902	chksum, nv->id, nv->nvram_version);
7903	ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7904	ql_log(ql_log_warn, vha, 0x006c,
7905	fmt: "Falling back to functioning (yet invalid -- WWPN) "
7906	"defaults.\n");
7907
7908	/*
7909	* Set default initialization control block.
7910	*/
7911	memset(nv, 0, ha->nvram_size);
7912	nv->nvram_version = cpu_to_le16(ICB_VERSION);
7913	nv->version = cpu_to_le16(ICB_VERSION);
7914	nv->frame_payload_size = cpu_to_le16(2048);
7915	nv->execution_throttle = cpu_to_le16(0xFFFF);
7916	nv->exchange_count = cpu_to_le16(0);
7917	nv->hard_address = cpu_to_le16(124);
7918	nv->port_name[0] = 0x21;
7919	nv->port_name[1] = 0x00 + ha->port_no + 1;
7920	nv->port_name[2] = 0x00;
7921	nv->port_name[3] = 0xe0;
7922	nv->port_name[4] = 0x8b;
7923	nv->port_name[5] = 0x1c;
7924	nv->port_name[6] = 0x55;
7925	nv->port_name[7] = 0x86;
7926	nv->node_name[0] = 0x20;
7927	nv->node_name[1] = 0x00;
7928	nv->node_name[2] = 0x00;
7929	nv->node_name[3] = 0xe0;
7930	nv->node_name[4] = 0x8b;
7931	nv->node_name[5] = 0x1c;
7932	nv->node_name[6] = 0x55;
7933	nv->node_name[7] = 0x86;
7934	qla24xx_nvram_wwn_from_ofw(vha, nv);
7935	nv->login_retry_count = cpu_to_le16(8);
7936	nv->interrupt_delay_timer = cpu_to_le16(0);
7937	nv->login_timeout = cpu_to_le16(0);
7938	nv->firmware_options_1 =
7939	cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7940	nv->firmware_options_2 = cpu_to_le32(2 << 4);
7941	nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7942	nv->firmware_options_3 = cpu_to_le32(2 << 13);
7943	nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7944	nv->efi_parameters = cpu_to_le32(0);
7945	nv->reset_delay = 5;
7946	nv->max_luns_per_target = cpu_to_le16(128);
7947	nv->port_down_retry_count = cpu_to_le16(30);
7948	nv->link_down_timeout = cpu_to_le16(30);
7949
7950	rval = 1;
7951	}
7952
7953	if (qla_tgt_mode_enabled(ha: vha)) {
7954	/* Don't enable full login after initial LIP */
7955	nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7956	/* Don't enable LIP full login for initiator */
7957	nv->host_p &= cpu_to_le32(~BIT_10);
7958	}
7959
7960	qlt_24xx_config_nvram_stage1(vha, nv);
7961
7962	/* Reset Initialization control block */
7963	memset(icb, 0, ha->init_cb_size);
7964
7965	/* Copy 1st segment. */
7966	dptr1 = (uint8_t *)icb;
7967	dptr2 = (uint8_t *)&nv->version;
7968	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7969	while (cnt--)
7970	*dptr1++ = *dptr2++;
7971
7972	icb->login_retry_count = nv->login_retry_count;
7973	icb->link_down_on_nos = nv->link_down_on_nos;
7974
7975	/* Copy 2nd segment. */
7976	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7977	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7978	cnt = (uint8_t *)&icb->reserved_3 -
7979	(uint8_t *)&icb->interrupt_delay_timer;
7980	while (cnt--)
7981	*dptr1++ = *dptr2++;
7982	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7983	/*
7984	* Setup driver NVRAM options.
7985	*/
7986	qla2x00_set_model_info(vha, model: nv->model_name, len: sizeof(nv->model_name),
7987	def: "QLA2462");
7988
7989	qlt_24xx_config_nvram_stage2(vha, icb);
7990
7991	if (nv->host_p & cpu_to_le32(BIT_15)) {
7992	/* Use alternate WWN? */
7993	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7994	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7995	}
7996
7997	/* Prepare nodename */
7998	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7999	/*
8000	* Firmware will apply the following mask if the nodename was
8001	* not provided.
8002	*/
8003	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8004	icb->node_name[0] &= 0xF0;
8005	}
8006
8007	/* Set host adapter parameters. */
8008	ha->flags.disable_risc_code_load = 0;
8009	ha->flags.enable_lip_reset = 0;
8010	ha->flags.enable_lip_full_login =
8011	le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8012	ha->flags.enable_target_reset =
8013	le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8014	ha->flags.enable_led_scheme = 0;
8015	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8016
8017	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8018	(BIT_6 | BIT_5 | BIT_4)) >> 4;
8019
8020	memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
8021	sizeof(ha->fw_seriallink_options24));
8022
8023	/* save HBA serial number */
8024	ha->serial0 = icb->port_name[5];
8025	ha->serial1 = icb->port_name[6];
8026	ha->serial2 = icb->port_name[7];
8027	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8028	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8029
8030	icb->execution_throttle = cpu_to_le16(0xFFFF);
8031
8032	ha->retry_count = le16_to_cpu(nv->login_retry_count);
8033
8034	/* Set minimum login_timeout to 4 seconds. */
8035	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8036	nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8037	if (le16_to_cpu(nv->login_timeout) < 4)
8038	nv->login_timeout = cpu_to_le16(4);
8039	ha->login_timeout = le16_to_cpu(nv->login_timeout);
8040
8041	/* Set minimum RATOV to 100 tenths of a second. */
8042	ha->r_a_tov = 100;
8043
8044	ha->loop_reset_delay = nv->reset_delay;
8045
8046	/* Link Down Timeout = 0:
8047	*
8048	* When Port Down timer expires we will start returning
8049	* I/O's to OS with "DID_NO_CONNECT".
8050	*
8051	* Link Down Timeout != 0:
8052	*
8053	* The driver waits for the link to come up after link down
8054	* before returning I/Os to OS with "DID_NO_CONNECT".
8055	*/
8056	if (le16_to_cpu(nv->link_down_timeout) == 0) {
8057	ha->loop_down_abort_time =
8058	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8059	} else {
8060	ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8061	ha->loop_down_abort_time =
8062	(LOOP_DOWN_TIME - ha->link_down_timeout);
8063	}
8064
8065	/* Need enough time to try and get the port back. */
8066	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8067	if (qlport_down_retry)
8068	ha->port_down_retry_count = qlport_down_retry;
8069
8070	/* Set login_retry_count */
8071	ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8072	if (ha->port_down_retry_count ==
8073	le16_to_cpu(nv->port_down_retry_count) &&
8074	ha->port_down_retry_count > 3)
8075	ha->login_retry_count = ha->port_down_retry_count;
8076	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8077	ha->login_retry_count = ha->port_down_retry_count;
8078	if (ql2xloginretrycount)
8079	ha->login_retry_count = ql2xloginretrycount;
8080
8081	/* N2N: driver will initiate Login instead of FW */
8082	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8083
8084	/* Enable ZIO. */
8085	if (!vha->flags.init_done) {
8086	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8087	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
8088	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8089	le16_to_cpu(icb->interrupt_delay_timer) : 2;
8090	}
8091	icb->firmware_options_2 &= cpu_to_le32(
8092	~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8093	if (ha->zio_mode != QLA_ZIO_DISABLED) {
8094	ha->zio_mode = QLA_ZIO_MODE_6;
8095
8096	ql_log(ql_log_info, vha, 0x006f,
8097	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
8098	ha->zio_mode, ha->zio_timer * 100);
8099
8100	icb->firmware_options_2 |= cpu_to_le32(
8101	(uint32_t)ha->zio_mode);
8102	icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8103	}
8104
8105	if (rval) {
8106	ql_log(ql_log_warn, vha, 0x0070,
8107	fmt: "NVRAM configuration failed.\n");
8108	}
8109	return (rval);
8110	}
8111
8112	static void
8113	qla27xx_print_image(struct scsi_qla_host *vha, char *name,
8114	struct qla27xx_image_status *image_status)
8115	{
8116	ql_dbg(ql_dbg_init, vha, 0x018b,
8117	fmt: "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
8118	name, "status",
8119	image_status->image_status_mask,
8120	le16_to_cpu(image_status->generation),
8121	image_status->ver_major,
8122	image_status->ver_minor,
8123	image_status->bitmap,
8124	le32_to_cpu(image_status->checksum),
8125	le32_to_cpu(image_status->signature));
8126	}
8127
8128	static bool
8129	qla28xx_check_aux_image_status_signature(
8130	struct qla27xx_image_status *image_status)
8131	{
8132	ulong signature = le32_to_cpu(image_status->signature);
8133
8134	return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
8135	}
8136
8137	static bool
8138	qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
8139	{
8140	ulong signature = le32_to_cpu(image_status->signature);
8141
8142	return
8143	signature != QLA27XX_IMG_STATUS_SIGN &&
8144	signature != QLA28XX_IMG_STATUS_SIGN;
8145	}
8146
8147	static ulong
8148	qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
8149	{
8150	__le32 *p = (__force __le32 *)image_status;
8151	uint n = sizeof(*image_status) / sizeof(*p);
8152	uint32_t sum = 0;
8153
8154	for ( ; n--; p++)
8155	sum += le32_to_cpup(p);
8156
8157	return sum;
8158	}
8159
8160	static inline uint
8161	qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
8162	{
8163	return aux->bitmap & bitmask ?
8164	QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
8165	}
8166
8167	static void
8168	qla28xx_component_status(
8169	struct active_regions *active_regions, struct qla27xx_image_status *aux)
8170	{
8171	active_regions->aux.board_config =
8172	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
8173
8174	active_regions->aux.vpd_nvram =
8175	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
8176
8177	active_regions->aux.npiv_config_0_1 =
8178	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
8179
8180	active_regions->aux.npiv_config_2_3 =
8181	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
8182
8183	active_regions->aux.nvme_params =
8184	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS);
8185	}
8186
8187	static int
8188	qla27xx_compare_image_generation(
8189	struct qla27xx_image_status *pri_image_status,
8190	struct qla27xx_image_status *sec_image_status)
8191	{
8192	/* calculate generation delta as uint16 (this accounts for wrap) */
8193	int16_t delta =
8194	le16_to_cpu(pri_image_status->generation) -
8195	le16_to_cpu(sec_image_status->generation);
8196
8197	ql_dbg(ql_dbg_init, NULL, 0x0180, fmt: "generation delta = %d\n", delta);
8198
8199	return delta;
8200	}
8201
8202	void
8203	qla28xx_get_aux_images(
8204	struct scsi_qla_host *vha, struct active_regions *active_regions)
8205	{
8206	struct qla_hw_data *ha = vha->hw;
8207	struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
8208	bool valid_pri_image = false, valid_sec_image = false;
8209	bool active_pri_image = false, active_sec_image = false;
8210
8211	if (!ha->flt_region_aux_img_status_pri) {
8212	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Primary aux image not addressed\n");
8213	goto check_sec_image;
8214	}
8215
8216	qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
8217	ha->flt_region_aux_img_status_pri,
8218	sizeof(pri_aux_image_status) >> 2);
8219	qla27xx_print_image(vha, name: "Primary aux image", image_status: &pri_aux_image_status);
8220
8221	if (qla28xx_check_aux_image_status_signature(image_status: &pri_aux_image_status)) {
8222	ql_dbg(ql_dbg_init, vha, 0x018b,
8223	fmt: "Primary aux image signature (%#x) not valid\n",
8224	le32_to_cpu(pri_aux_image_status.signature));
8225	goto check_sec_image;
8226	}
8227
8228	if (qla27xx_image_status_checksum(image_status: &pri_aux_image_status)) {
8229	ql_dbg(ql_dbg_init, vha, 0x018c,
8230	fmt: "Primary aux image checksum failed\n");
8231	goto check_sec_image;
8232	}
8233
8234	valid_pri_image = true;
8235
8236	if (pri_aux_image_status.image_status_mask & 1) {
8237	ql_dbg(ql_dbg_init, vha, 0x018d,
8238	fmt: "Primary aux image is active\n");
8239	active_pri_image = true;
8240	}
8241
8242	check_sec_image:
8243	if (!ha->flt_region_aux_img_status_sec) {
8244	ql_dbg(ql_dbg_init, vha, 0x018a,
8245	fmt: "Secondary aux image not addressed\n");
8246	goto check_valid_image;
8247	}
8248
8249	qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
8250	ha->flt_region_aux_img_status_sec,
8251	sizeof(sec_aux_image_status) >> 2);
8252	qla27xx_print_image(vha, name: "Secondary aux image", image_status: &sec_aux_image_status);
8253
8254	if (qla28xx_check_aux_image_status_signature(image_status: &sec_aux_image_status)) {
8255	ql_dbg(ql_dbg_init, vha, 0x018b,
8256	fmt: "Secondary aux image signature (%#x) not valid\n",
8257	le32_to_cpu(sec_aux_image_status.signature));
8258	goto check_valid_image;
8259	}
8260
8261	if (qla27xx_image_status_checksum(image_status: &sec_aux_image_status)) {
8262	ql_dbg(ql_dbg_init, vha, 0x018c,
8263	fmt: "Secondary aux image checksum failed\n");
8264	goto check_valid_image;
8265	}
8266
8267	valid_sec_image = true;
8268
8269	if (sec_aux_image_status.image_status_mask & 1) {
8270	ql_dbg(ql_dbg_init, vha, 0x018d,
8271	fmt: "Secondary aux image is active\n");
8272	active_sec_image = true;
8273	}
8274
8275	check_valid_image:
8276	if (valid_pri_image && active_pri_image &&
8277	valid_sec_image && active_sec_image) {
8278	if (qla27xx_compare_image_generation(pri_image_status: &pri_aux_image_status,
8279	sec_image_status: &sec_aux_image_status) >= 0) {
8280	qla28xx_component_status(active_regions,
8281	aux: &pri_aux_image_status);
8282	} else {
8283	qla28xx_component_status(active_regions,
8284	aux: &sec_aux_image_status);
8285	}
8286	} else if (valid_pri_image && active_pri_image) {
8287	qla28xx_component_status(active_regions, aux: &pri_aux_image_status);
8288	} else if (valid_sec_image && active_sec_image) {
8289	qla28xx_component_status(active_regions, aux: &sec_aux_image_status);
8290	}
8291
8292	ql_dbg(ql_dbg_init, vha, 0x018f,
8293	fmt: "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n",
8294	active_regions->aux.board_config,
8295	active_regions->aux.vpd_nvram,
8296	active_regions->aux.npiv_config_0_1,
8297	active_regions->aux.npiv_config_2_3,
8298	active_regions->aux.nvme_params);
8299	}
8300
8301	void
8302	qla27xx_get_active_image(struct scsi_qla_host *vha,
8303	struct active_regions *active_regions)
8304	{
8305	struct qla_hw_data *ha = vha->hw;
8306	struct qla27xx_image_status pri_image_status, sec_image_status;
8307	bool valid_pri_image = false, valid_sec_image = false;
8308	bool active_pri_image = false, active_sec_image = false;
8309
8310	if (!ha->flt_region_img_status_pri) {
8311	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Primary image not addressed\n");
8312	goto check_sec_image;
8313	}
8314
8315	if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
8316	ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
8317	QLA_SUCCESS) {
8318	WARN_ON_ONCE(true);
8319	goto check_sec_image;
8320	}
8321	qla27xx_print_image(vha, name: "Primary image", image_status: &pri_image_status);
8322
8323	if (qla27xx_check_image_status_signature(image_status: &pri_image_status)) {
8324	ql_dbg(ql_dbg_init, vha, 0x018b,
8325	fmt: "Primary image signature (%#x) not valid\n",
8326	le32_to_cpu(pri_image_status.signature));
8327	goto check_sec_image;
8328	}
8329
8330	if (qla27xx_image_status_checksum(image_status: &pri_image_status)) {
8331	ql_dbg(ql_dbg_init, vha, 0x018c,
8332	fmt: "Primary image checksum failed\n");
8333	goto check_sec_image;
8334	}
8335
8336	valid_pri_image = true;
8337
8338	if (pri_image_status.image_status_mask & 1) {
8339	ql_dbg(ql_dbg_init, vha, 0x018d,
8340	fmt: "Primary image is active\n");
8341	active_pri_image = true;
8342	}
8343
8344	check_sec_image:
8345	if (!ha->flt_region_img_status_sec) {
8346	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Secondary image not addressed\n");
8347	goto check_valid_image;
8348	}
8349
8350	qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
8351	ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
8352	qla27xx_print_image(vha, name: "Secondary image", image_status: &sec_image_status);
8353
8354	if (qla27xx_check_image_status_signature(image_status: &sec_image_status)) {
8355	ql_dbg(ql_dbg_init, vha, 0x018b,
8356	fmt: "Secondary image signature (%#x) not valid\n",
8357	le32_to_cpu(sec_image_status.signature));
8358	goto check_valid_image;
8359	}
8360
8361	if (qla27xx_image_status_checksum(image_status: &sec_image_status)) {
8362	ql_dbg(ql_dbg_init, vha, 0x018c,
8363	fmt: "Secondary image checksum failed\n");
8364	goto check_valid_image;
8365	}
8366
8367	valid_sec_image = true;
8368
8369	if (sec_image_status.image_status_mask & 1) {
8370	ql_dbg(ql_dbg_init, vha, 0x018d,
8371	fmt: "Secondary image is active\n");
8372	active_sec_image = true;
8373	}
8374
8375	check_valid_image:
8376	if (valid_pri_image && active_pri_image)
8377	active_regions->global = QLA27XX_PRIMARY_IMAGE;
8378
8379	if (valid_sec_image && active_sec_image) {
8380	if (!active_regions->global ||
8381	qla27xx_compare_image_generation(
8382	pri_image_status: &pri_image_status, sec_image_status: &sec_image_status) < 0) {
8383	active_regions->global = QLA27XX_SECONDARY_IMAGE;
8384	}
8385	}
8386
8387	ql_dbg(ql_dbg_init, vha, 0x018f, fmt: "active image %s (%u)\n",
8388	active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8389	"default (boot/fw)" :
8390	active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8391	"primary" :
8392	active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8393	"secondary" : "invalid",
8394	active_regions->global);
8395	}
8396
8397	bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8398	{
8399	return
8400	!(dword[4] | dword[5] | dword[6] | dword[7]) ||
8401	!(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8402	}
8403
8404	static int
8405	qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8406	uint32_t faddr)
8407	{
8408	int rval;
8409	uint templates, segments, fragment;
8410	ulong i;
8411	uint j;
8412	ulong dlen;
8413	uint32_t *dcode;
8414	uint32_t risc_addr, risc_size, risc_attr = 0;
8415	struct qla_hw_data *ha = vha->hw;
8416	struct req_que *req = ha->req_q_map[0];
8417	struct fwdt *fwdt = ha->fwdt;
8418
8419	ql_dbg(ql_dbg_init, vha, 0x008b,
8420	fmt: "FW: Loading firmware from flash (%x).\n", faddr);
8421
8422	dcode = (uint32_t *)req->ring;
8423	qla24xx_read_flash_data(vha, dcode, faddr, 8);
8424	if (qla24xx_risc_firmware_invalid(dword: dcode)) {
8425	ql_log(ql_log_fatal, vha, 0x008c,
8426	fmt: "Unable to verify the integrity of flash firmware "
8427	"image.\n");
8428	ql_log(ql_log_fatal, vha, 0x008d,
8429	fmt: "Firmware data: %08x %08x %08x %08x.\n",
8430	dcode[0], dcode[1], dcode[2], dcode[3]);
8431
8432	return QLA_FUNCTION_FAILED;
8433	}
8434
8435	dcode = (uint32_t *)req->ring;
8436	*srisc_addr = 0;
8437	segments = FA_RISC_CODE_SEGMENTS;
8438	for (j = 0; j < segments; j++) {
8439	ql_dbg(ql_dbg_init, vha, 0x008d,
8440	fmt: "-> Loading segment %u...\n", j);
8441	qla24xx_read_flash_data(vha, dcode, faddr, 10);
8442	risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8443	risc_size = be32_to_cpu((__force __be32)dcode[3]);
8444	if (!*srisc_addr) {
8445	*srisc_addr = risc_addr;
8446	risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8447	}
8448
8449	dlen = ha->fw_transfer_size >> 2;
8450	for (fragment = 0; risc_size; fragment++) {
8451	if (dlen > risc_size)
8452	dlen = risc_size;
8453
8454	ql_dbg(ql_dbg_init, vha, 0x008e,
8455	fmt: "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8456	fragment, risc_addr, faddr, dlen);
8457	qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8458	for (i = 0; i < dlen; i++)
8459	dcode[i] = swab32(dcode[i]);
8460
8461	rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8462	if (rval) {
8463	ql_log(ql_log_fatal, vha, 0x008f,
8464	fmt: "-> Failed load firmware fragment %u.\n",
8465	fragment);
8466	return QLA_FUNCTION_FAILED;
8467	}
8468
8469	faddr += dlen;
8470	risc_addr += dlen;
8471	risc_size -= dlen;
8472	}
8473	}
8474
8475	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8476	return QLA_SUCCESS;
8477
8478	templates = (risc_attr & BIT_9) ? 2 : 1;
8479	ql_dbg(ql_dbg_init, vha, 0x0160, fmt: "-> templates = %u\n", templates);
8480	for (j = 0; j < templates; j++, fwdt++) {
8481	vfree(addr: fwdt->template);
8482	fwdt->template = NULL;
8483	fwdt->length = 0;
8484
8485	dcode = (uint32_t *)req->ring;
8486	qla24xx_read_flash_data(vha, dcode, faddr, 7);
8487	risc_size = be32_to_cpu((__force __be32)dcode[2]);
8488	ql_dbg(ql_dbg_init, vha, 0x0161,
8489	fmt: "-> fwdt%u template array at %#x (%#x dwords)\n",
8490	j, faddr, risc_size);
8491	if (!risc_size || !~risc_size) {
8492	ql_dbg(ql_dbg_init, vha, 0x0162,
8493	fmt: "-> fwdt%u failed to read array\n", j);
8494	goto failed;
8495	}
8496
8497	/* skip header and ignore checksum */
8498	faddr += 7;
8499	risc_size -= 8;
8500
8501	ql_dbg(ql_dbg_init, vha, 0x0163,
8502	fmt: "-> fwdt%u template allocate template %#x words...\n",
8503	j, risc_size);
8504	fwdt->template = vmalloc_array(n: risc_size, size: sizeof(*dcode));
8505	if (!fwdt->template) {
8506	ql_log(ql_log_warn, vha, 0x0164,
8507	fmt: "-> fwdt%u failed allocate template.\n", j);
8508	goto failed;
8509	}
8510
8511	dcode = fwdt->template;
8512	qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8513
8514	if (!qla27xx_fwdt_template_valid(dcode)) {
8515	ql_log(ql_log_warn, vha, 0x0165,
8516	fmt: "-> fwdt%u failed template validate\n", j);
8517	goto failed;
8518	}
8519
8520	dlen = qla27xx_fwdt_template_size(dcode);
8521	ql_dbg(ql_dbg_init, vha, 0x0166,
8522	fmt: "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8523	j, dlen, dlen / sizeof(*dcode));
8524	if (dlen > risc_size * sizeof(*dcode)) {
8525	ql_log(ql_log_warn, vha, 0x0167,
8526	fmt: "-> fwdt%u template exceeds array (%-lu bytes)\n",
8527	j, dlen - risc_size * sizeof(*dcode));
8528	goto failed;
8529	}
8530
8531	fwdt->length = dlen;
8532	ql_dbg(ql_dbg_init, vha, 0x0168,
8533	fmt: "-> fwdt%u loaded template ok\n", j);
8534
8535	faddr += risc_size + 1;
8536	}
8537
8538	return QLA_SUCCESS;
8539
8540	failed:
8541	vfree(addr: fwdt->template);
8542	fwdt->template = NULL;
8543	fwdt->length = 0;
8544
8545	return QLA_SUCCESS;
8546	}
8547
8548	#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8549
8550	int
8551	qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8552	{
8553	int rval;
8554	int i, fragment;
8555	uint16_t *wcode;
8556	__be16 *fwcode;
8557	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8558	struct fw_blob *blob;
8559	struct qla_hw_data *ha = vha->hw;
8560	struct req_que *req = ha->req_q_map[0];
8561
8562	/* Load firmware blob. */
8563	blob = qla2x00_request_firmware(vha);
8564	if (!blob) {
8565	ql_log(ql_log_info, vha, 0x0083,
8566	fmt: "Firmware image unavailable.\n");
8567	ql_log(ql_log_info, vha, 0x0084,
8568	fmt: "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8569	return QLA_FUNCTION_FAILED;
8570	}
8571
8572	rval = QLA_SUCCESS;
8573
8574	wcode = (uint16_t *)req->ring;
8575	*srisc_addr = 0;
8576	fwcode = (__force __be16 *)blob->fw->data;
8577	fwclen = 0;
8578
8579	/* Validate firmware image by checking version. */
8580	if (blob->fw->size < 8 * sizeof(uint16_t)) {
8581	ql_log(ql_log_fatal, vha, 0x0085,
8582	fmt: "Unable to verify integrity of firmware image (%zd).\n",
8583	blob->fw->size);
8584	goto fail_fw_integrity;
8585	}
8586	for (i = 0; i < 4; i++)
8587	wcode[i] = be16_to_cpu(fwcode[i + 4]);
8588	if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8589	wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8590	wcode[2] == 0 && wcode[3] == 0)) {
8591	ql_log(ql_log_fatal, vha, 0x0086,
8592	fmt: "Unable to verify integrity of firmware image.\n");
8593	ql_log(ql_log_fatal, vha, 0x0087,
8594	fmt: "Firmware data: %04x %04x %04x %04x.\n",
8595	wcode[0], wcode[1], wcode[2], wcode[3]);
8596	goto fail_fw_integrity;
8597	}
8598
8599	seg = blob->segs;
8600	while (*seg && rval == QLA_SUCCESS) {
8601	risc_addr = *seg;
8602	*srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8603	risc_size = be16_to_cpu(fwcode[3]);
8604
8605	/* Validate firmware image size. */
8606	fwclen += risc_size * sizeof(uint16_t);
8607	if (blob->fw->size < fwclen) {
8608	ql_log(ql_log_fatal, vha, 0x0088,
8609	fmt: "Unable to verify integrity of firmware image "
8610	"(%zd).\n", blob->fw->size);
8611	goto fail_fw_integrity;
8612	}
8613
8614	fragment = 0;
8615	while (risc_size > 0 && rval == QLA_SUCCESS) {
8616	wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8617	if (wlen > risc_size)
8618	wlen = risc_size;
8619	ql_dbg(ql_dbg_init, vha, 0x0089,
8620	fmt: "Loading risc segment@ risc addr %x number of "
8621	"words 0x%x.\n", risc_addr, wlen);
8622
8623	for (i = 0; i < wlen; i++)
8624	wcode[i] = swab16((__force u32)fwcode[i]);
8625
8626	rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8627	wlen);
8628	if (rval) {
8629	ql_log(ql_log_fatal, vha, 0x008a,
8630	fmt: "Failed to load segment %d of firmware.\n",
8631	fragment);
8632	break;
8633	}
8634
8635	fwcode += wlen;
8636	risc_addr += wlen;
8637	risc_size -= wlen;
8638	fragment++;
8639	}
8640
8641	/* Next segment. */
8642	seg++;
8643	}
8644	return rval;
8645
8646	fail_fw_integrity:
8647	return QLA_FUNCTION_FAILED;
8648	}
8649
8650	static int
8651	qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8652	{
8653	int rval;
8654	uint templates, segments, fragment;
8655	uint32_t *dcode;
8656	ulong dlen;
8657	uint32_t risc_addr, risc_size, risc_attr = 0;
8658	ulong i;
8659	uint j;
8660	struct fw_blob *blob;
8661	__be32 *fwcode;
8662	struct qla_hw_data *ha = vha->hw;
8663	struct req_que *req = ha->req_q_map[0];
8664	struct fwdt *fwdt = ha->fwdt;
8665
8666	ql_dbg(ql_dbg_init, vha, 0x0090,
8667	fmt: "-> FW: Loading via request-firmware.\n");
8668
8669	blob = qla2x00_request_firmware(vha);
8670	if (!blob) {
8671	ql_log(ql_log_warn, vha, 0x0092,
8672	fmt: "-> Firmware file not found.\n");
8673
8674	return QLA_FUNCTION_FAILED;
8675	}
8676
8677	fwcode = (__force __be32 *)blob->fw->data;
8678	dcode = (__force uint32_t *)fwcode;
8679	if (qla24xx_risc_firmware_invalid(dword: dcode)) {
8680	ql_log(ql_log_fatal, vha, 0x0093,
8681	fmt: "Unable to verify integrity of firmware image (%zd).\n",
8682	blob->fw->size);
8683	ql_log(ql_log_fatal, vha, 0x0095,
8684	fmt: "Firmware data: %08x %08x %08x %08x.\n",
8685	dcode[0], dcode[1], dcode[2], dcode[3]);
8686	return QLA_FUNCTION_FAILED;
8687	}
8688
8689	dcode = (uint32_t *)req->ring;
8690	*srisc_addr = 0;
8691	segments = FA_RISC_CODE_SEGMENTS;
8692	for (j = 0; j < segments; j++) {
8693	ql_dbg(ql_dbg_init, vha, 0x0096,
8694	fmt: "-> Loading segment %u...\n", j);
8695	risc_addr = be32_to_cpu(fwcode[2]);
8696	risc_size = be32_to_cpu(fwcode[3]);
8697
8698	if (!*srisc_addr) {
8699	*srisc_addr = risc_addr;
8700	risc_attr = be32_to_cpu(fwcode[9]);
8701	}
8702
8703	dlen = ha->fw_transfer_size >> 2;
8704	for (fragment = 0; risc_size; fragment++) {
8705	if (dlen > risc_size)
8706	dlen = risc_size;
8707
8708	ql_dbg(ql_dbg_init, vha, 0x0097,
8709	fmt: "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8710	fragment, risc_addr,
8711	(uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8712	dlen);
8713
8714	for (i = 0; i < dlen; i++)
8715	dcode[i] = swab32((__force u32)fwcode[i]);
8716
8717	rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8718	if (rval) {
8719	ql_log(ql_log_fatal, vha, 0x0098,
8720	fmt: "-> Failed load firmware fragment %u.\n",
8721	fragment);
8722	return QLA_FUNCTION_FAILED;
8723	}
8724
8725	fwcode += dlen;
8726	risc_addr += dlen;
8727	risc_size -= dlen;
8728	}
8729	}
8730
8731	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8732	return QLA_SUCCESS;
8733
8734	templates = (risc_attr & BIT_9) ? 2 : 1;
8735	ql_dbg(ql_dbg_init, vha, 0x0170, fmt: "-> templates = %u\n", templates);
8736	for (j = 0; j < templates; j++, fwdt++) {
8737	vfree(addr: fwdt->template);
8738	fwdt->template = NULL;
8739	fwdt->length = 0;
8740
8741	risc_size = be32_to_cpu(fwcode[2]);
8742	ql_dbg(ql_dbg_init, vha, 0x0171,
8743	fmt: "-> fwdt%u template array at %#x (%#x dwords)\n",
8744	j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8745	risc_size);
8746	if (!risc_size || !~risc_size) {
8747	ql_dbg(ql_dbg_init, vha, 0x0172,
8748	fmt: "-> fwdt%u failed to read array\n", j);
8749	goto failed;
8750	}
8751
8752	/* skip header and ignore checksum */
8753	fwcode += 7;
8754	risc_size -= 8;
8755
8756	ql_dbg(ql_dbg_init, vha, 0x0173,
8757	fmt: "-> fwdt%u template allocate template %#x words...\n",
8758	j, risc_size);
8759	fwdt->template = vmalloc_array(n: risc_size, size: sizeof(*dcode));
8760	if (!fwdt->template) {
8761	ql_log(ql_log_warn, vha, 0x0174,
8762	fmt: "-> fwdt%u failed allocate template.\n", j);
8763	goto failed;
8764	}
8765
8766	dcode = fwdt->template;
8767	for (i = 0; i < risc_size; i++)
8768	dcode[i] = (__force u32)fwcode[i];
8769
8770	if (!qla27xx_fwdt_template_valid(dcode)) {
8771	ql_log(ql_log_warn, vha, 0x0175,
8772	fmt: "-> fwdt%u failed template validate\n", j);
8773	goto failed;
8774	}
8775
8776	dlen = qla27xx_fwdt_template_size(dcode);
8777	ql_dbg(ql_dbg_init, vha, 0x0176,
8778	fmt: "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8779	j, dlen, dlen / sizeof(*dcode));
8780	if (dlen > risc_size * sizeof(*dcode)) {
8781	ql_log(ql_log_warn, vha, 0x0177,
8782	fmt: "-> fwdt%u template exceeds array (%-lu bytes)\n",
8783	j, dlen - risc_size * sizeof(*dcode));
8784	goto failed;
8785	}
8786
8787	fwdt->length = dlen;
8788	ql_dbg(ql_dbg_init, vha, 0x0178,
8789	fmt: "-> fwdt%u loaded template ok\n", j);
8790
8791	fwcode += risc_size + 1;
8792	}
8793
8794	return QLA_SUCCESS;
8795
8796	failed:
8797	vfree(addr: fwdt->template);
8798	fwdt->template = NULL;
8799	fwdt->length = 0;
8800
8801	return QLA_SUCCESS;
8802	}
8803
8804	int
8805	qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8806	{
8807	int rval;
8808
8809	if (ql2xfwloadbin == 1)
8810	return qla81xx_load_risc(vha, srisc_addr);
8811
8812	/*
8813	* FW Load priority:
8814	* 1) Firmware via request-firmware interface (.bin file).
8815	* 2) Firmware residing in flash.
8816	*/
8817	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8818	if (rval == QLA_SUCCESS)
8819	return rval;
8820
8821	return qla24xx_load_risc_flash(vha, srisc_addr,
8822	faddr: vha->hw->flt_region_fw);
8823	}
8824
8825	int
8826	qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8827	{
8828	int rval;
8829	struct qla_hw_data *ha = vha->hw;
8830	struct active_regions active_regions = { };
8831
8832	if (ql2xfwloadbin == 2)
8833	goto try_blob_fw;
8834
8835	/* FW Load priority:
8836	* 1) Firmware residing in flash.
8837	* 2) Firmware via request-firmware interface (.bin file).
8838	* 3) Golden-Firmware residing in flash -- (limited operation).
8839	*/
8840
8841	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8842	goto try_primary_fw;
8843
8844	qla27xx_get_active_image(vha, active_regions: &active_regions);
8845
8846	if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8847	goto try_primary_fw;
8848
8849	ql_dbg(ql_dbg_init, vha, 0x008b,
8850	fmt: "Loading secondary firmware image.\n");
8851	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_fw_sec);
8852	if (!rval)
8853	return rval;
8854
8855	try_primary_fw:
8856	ql_dbg(ql_dbg_init, vha, 0x008b,
8857	fmt: "Loading primary firmware image.\n");
8858	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_fw);
8859	if (!rval)
8860	return rval;
8861
8862	try_blob_fw:
8863	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8864	if (!rval || !ha->flt_region_gold_fw)
8865	return rval;
8866
8867	ql_log(ql_log_info, vha, 0x0099,
8868	fmt: "Attempting to fallback to golden firmware.\n");
8869	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_gold_fw);
8870	if (rval)
8871	return rval;
8872
8873	ql_log(ql_log_info, vha, 0x009a, fmt: "Need firmware flash update.\n");
8874	ha->flags.running_gold_fw = 1;
8875	return rval;
8876	}
8877
8878	void
8879	qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8880	{
8881	int ret, retries;
8882	struct qla_hw_data *ha = vha->hw;
8883
8884	if (ha->flags.pci_channel_io_perm_failure)
8885	return;
8886	if (!IS_FWI2_CAPABLE(ha))
8887	return;
8888	if (!ha->fw_major_version)
8889	return;
8890	if (!ha->flags.fw_started)
8891	return;
8892
8893	ret = qla2x00_stop_firmware(vha);
8894	for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8895	ret != QLA_INVALID_COMMAND && retries ; retries--) {
8896	ha->isp_ops->reset_chip(vha);
8897	if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8898	continue;
8899	if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8900	continue;
8901	ql_log(ql_log_info, vha, 0x8015,
8902	fmt: "Attempting retry of stop-firmware command.\n");
8903	ret = qla2x00_stop_firmware(vha);
8904	}
8905
8906	QLA_FW_STOPPED(ha);
8907	ha->flags.fw_init_done = 0;
8908	}
8909
8910	int
8911	qla24xx_configure_vhba(scsi_qla_host_t *vha)
8912	{
8913	int rval = QLA_SUCCESS;
8914	int rval2;
8915	uint16_t mb[MAILBOX_REGISTER_COUNT];
8916	struct qla_hw_data *ha = vha->hw;
8917	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
8918
8919	if (!vha->vp_idx)
8920	return -EINVAL;
8921
8922	rval = qla2x00_fw_ready(vha: base_vha);
8923
8924	if (rval == QLA_SUCCESS) {
8925	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
8926	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8927	}
8928
8929	vha->flags.management_server_logged_in = 0;
8930
8931	/* Login to SNS first */
8932	rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8933	BIT_1);
8934	if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8935	if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8936	ql_dbg(ql_dbg_init, vha, 0x0120,
8937	fmt: "Failed SNS login: loop_id=%x, rval2=%d\n",
8938	NPH_SNS, rval2);
8939	else
8940	ql_dbg(ql_dbg_init, vha, 0x0103,
8941	fmt: "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8942	"mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8943	NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8944	return (QLA_FUNCTION_FAILED);
8945	}
8946
8947	atomic_set(v: &vha->loop_down_timer, i: 0);
8948	atomic_set(v: &vha->loop_state, LOOP_UP);
8949	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
8950	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
8951	rval = qla2x00_loop_resync(vha: base_vha);
8952
8953	return rval;
8954	}
8955
8956	/* 84XX Support **************************************************************/
8957
8958	static LIST_HEAD(qla_cs84xx_list);
8959	static DEFINE_MUTEX(qla_cs84xx_mutex);
8960
8961	static struct qla_chip_state_84xx *
8962	qla84xx_get_chip(struct scsi_qla_host *vha)
8963	{
8964	struct qla_chip_state_84xx *cs84xx;
8965	struct qla_hw_data *ha = vha->hw;
8966
8967	mutex_lock(&qla_cs84xx_mutex);
8968
8969	/* Find any shared 84xx chip. */
8970	list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8971	if (cs84xx->bus == ha->pdev->bus) {
8972	kref_get(kref: &cs84xx->kref);
8973	goto done;
8974	}
8975	}
8976
8977	cs84xx = kzalloc(size: sizeof(*cs84xx), GFP_KERNEL);
8978	if (!cs84xx)
8979	goto done;
8980
8981	kref_init(kref: &cs84xx->kref);
8982	spin_lock_init(&cs84xx->access_lock);
8983	mutex_init(&cs84xx->fw_update_mutex);
8984	cs84xx->bus = ha->pdev->bus;
8985
8986	list_add_tail(new: &cs84xx->list, head: &qla_cs84xx_list);
8987	done:
8988	mutex_unlock(lock: &qla_cs84xx_mutex);
8989	return cs84xx;
8990	}
8991
8992	static void
8993	__qla84xx_chip_release(struct kref *kref)
8994	{
8995	struct qla_chip_state_84xx *cs84xx =
8996	container_of(kref, struct qla_chip_state_84xx, kref);
8997
8998	mutex_lock(&qla_cs84xx_mutex);
8999	list_del(entry: &cs84xx->list);
9000	mutex_unlock(lock: &qla_cs84xx_mutex);
9001	kfree(objp: cs84xx);
9002	}
9003
9004	void
9005	qla84xx_put_chip(struct scsi_qla_host *vha)
9006	{
9007	struct qla_hw_data *ha = vha->hw;
9008
9009	if (ha->cs84xx)
9010	kref_put(kref: &ha->cs84xx->kref, release: __qla84xx_chip_release);
9011	}
9012
9013	static int
9014	qla84xx_init_chip(scsi_qla_host_t *vha)
9015	{
9016	int rval;
9017	uint16_t status[2];
9018	struct qla_hw_data *ha = vha->hw;
9019
9020	mutex_lock(&ha->cs84xx->fw_update_mutex);
9021
9022	rval = qla84xx_verify_chip(vha, status);
9023
9024	mutex_unlock(lock: &ha->cs84xx->fw_update_mutex);
9025
9026	return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
9027	QLA_SUCCESS;
9028	}
9029
9030	/* 81XX Support **************************************************************/
9031
9032	int
9033	qla81xx_nvram_config(scsi_qla_host_t *vha)
9034	{
9035	int rval;
9036	struct init_cb_81xx *icb;
9037	struct nvram_81xx *nv;
9038	__le32 *dptr;
9039	uint8_t *dptr1, *dptr2;
9040	uint32_t chksum;
9041	uint16_t cnt;
9042	struct qla_hw_data *ha = vha->hw;
9043	uint32_t faddr;
9044	struct active_regions active_regions = { };
9045
9046	rval = QLA_SUCCESS;
9047	icb = (struct init_cb_81xx *)ha->init_cb;
9048	nv = ha->nvram;
9049
9050	/* Determine NVRAM starting address. */
9051	ha->nvram_size = sizeof(*nv);
9052	ha->vpd_size = FA_NVRAM_VPD_SIZE;
9053	if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
9054	ha->vpd_size = FA_VPD_SIZE_82XX;
9055
9056	if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
9057	qla28xx_get_aux_images(vha, active_regions: &active_regions);
9058
9059	/* Get VPD data into cache */
9060	ha->vpd = ha->nvram + VPD_OFFSET;
9061
9062	faddr = ha->flt_region_vpd;
9063	if (IS_QLA28XX(ha)) {
9064	if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9065	faddr = ha->flt_region_vpd_sec;
9066	ql_dbg(ql_dbg_init, vha, 0x0110,
9067	fmt: "Loading %s nvram image.\n",
9068	active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9069	"primary" : "secondary");
9070	}
9071	ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
9072
9073	/* Get NVRAM data into cache and calculate checksum. */
9074	faddr = ha->flt_region_nvram;
9075	if (IS_QLA28XX(ha)) {
9076	if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9077	faddr = ha->flt_region_nvram_sec;
9078	}
9079	ql_dbg(ql_dbg_init, vha, 0x0110,
9080	fmt: "Loading %s nvram image.\n",
9081	active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9082	"primary" : "secondary");
9083	ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
9084
9085	dptr = (__force __le32 *)nv;
9086	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
9087	chksum += le32_to_cpu(*dptr);
9088
9089	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
9090	fmt: "Contents of NVRAM:\n");
9091	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
9092	nv, ha->nvram_size);
9093
9094	/* Bad NVRAM data, set defaults parameters. */
9095	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
9096	le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
9097	/* Reset NVRAM data. */
9098	ql_log(ql_log_info, vha, 0x0073,
9099	fmt: "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
9100	chksum, nv->id, le16_to_cpu(nv->nvram_version));
9101	ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
9102	ql_log(ql_log_info, vha, 0x0074,
9103	fmt: "Falling back to functioning (yet invalid -- WWPN) "
9104	"defaults.\n");
9105
9106	/*
9107	* Set default initialization control block.
9108	*/
9109	memset(nv, 0, ha->nvram_size);
9110	nv->nvram_version = cpu_to_le16(ICB_VERSION);
9111	nv->version = cpu_to_le16(ICB_VERSION);
9112	nv->frame_payload_size = cpu_to_le16(2048);
9113	nv->execution_throttle = cpu_to_le16(0xFFFF);
9114	nv->exchange_count = cpu_to_le16(0);
9115	nv->port_name[0] = 0x21;
9116	nv->port_name[1] = 0x00 + ha->port_no + 1;
9117	nv->port_name[2] = 0x00;
9118	nv->port_name[3] = 0xe0;
9119	nv->port_name[4] = 0x8b;
9120	nv->port_name[5] = 0x1c;
9121	nv->port_name[6] = 0x55;
9122	nv->port_name[7] = 0x86;
9123	nv->node_name[0] = 0x20;
9124	nv->node_name[1] = 0x00;
9125	nv->node_name[2] = 0x00;
9126	nv->node_name[3] = 0xe0;
9127	nv->node_name[4] = 0x8b;
9128	nv->node_name[5] = 0x1c;
9129	nv->node_name[6] = 0x55;
9130	nv->node_name[7] = 0x86;
9131	nv->login_retry_count = cpu_to_le16(8);
9132	nv->interrupt_delay_timer = cpu_to_le16(0);
9133	nv->login_timeout = cpu_to_le16(0);
9134	nv->firmware_options_1 =
9135	cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
9136	nv->firmware_options_2 = cpu_to_le32(2 << 4);
9137	nv->firmware_options_2 |= cpu_to_le32(BIT_12);
9138	nv->firmware_options_3 = cpu_to_le32(2 << 13);
9139	nv->host_p = cpu_to_le32(BIT_11|BIT_10);
9140	nv->efi_parameters = cpu_to_le32(0);
9141	nv->reset_delay = 5;
9142	nv->max_luns_per_target = cpu_to_le16(128);
9143	nv->port_down_retry_count = cpu_to_le16(30);
9144	nv->link_down_timeout = cpu_to_le16(180);
9145	nv->enode_mac[0] = 0x00;
9146	nv->enode_mac[1] = 0xC0;
9147	nv->enode_mac[2] = 0xDD;
9148	nv->enode_mac[3] = 0x04;
9149	nv->enode_mac[4] = 0x05;
9150	nv->enode_mac[5] = 0x06 + ha->port_no + 1;
9151
9152	rval = 1;
9153	}
9154
9155	if (IS_T10_PI_CAPABLE(ha))
9156	nv->frame_payload_size &= cpu_to_le16(~7);
9157
9158	qlt_81xx_config_nvram_stage1(vha, nv);
9159
9160	/* Reset Initialization control block */
9161	memset(icb, 0, ha->init_cb_size);
9162
9163	/* Copy 1st segment. */
9164	dptr1 = (uint8_t *)icb;
9165	dptr2 = (uint8_t *)&nv->version;
9166	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
9167	while (cnt--)
9168	*dptr1++ = *dptr2++;
9169
9170	icb->login_retry_count = nv->login_retry_count;
9171
9172	/* Copy 2nd segment. */
9173	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
9174	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
9175	cnt = (uint8_t *)&icb->reserved_5 -
9176	(uint8_t *)&icb->interrupt_delay_timer;
9177	while (cnt--)
9178	*dptr1++ = *dptr2++;
9179
9180	memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
9181	/* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
9182	if (!memcmp(p: icb->enode_mac, q: "\0\0\0\0\0\0", size: sizeof(icb->enode_mac))) {
9183	icb->enode_mac[0] = 0x00;
9184	icb->enode_mac[1] = 0xC0;
9185	icb->enode_mac[2] = 0xDD;
9186	icb->enode_mac[3] = 0x04;
9187	icb->enode_mac[4] = 0x05;
9188	icb->enode_mac[5] = 0x06 + ha->port_no + 1;
9189	}
9190
9191	/* Use extended-initialization control block. */
9192	memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
9193	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
9194	/*
9195	* Setup driver NVRAM options.
9196	*/
9197	qla2x00_set_model_info(vha, model: nv->model_name, len: sizeof(nv->model_name),
9198	def: "QLE8XXX");
9199
9200	qlt_81xx_config_nvram_stage2(vha, icb);
9201
9202	/* Use alternate WWN? */
9203	if (nv->host_p & cpu_to_le32(BIT_15)) {
9204	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
9205	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
9206	}
9207
9208	/* Prepare nodename */
9209	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
9210	/*
9211	* Firmware will apply the following mask if the nodename was
9212	* not provided.
9213	*/
9214	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
9215	icb->node_name[0] &= 0xF0;
9216	}
9217
9218	if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
9219	if ((nv->enhanced_features & BIT_7) == 0)
9220	ha->flags.scm_supported_a = 1;
9221	}
9222
9223	/* Set host adapter parameters. */
9224	ha->flags.disable_risc_code_load = 0;
9225	ha->flags.enable_lip_reset = 0;
9226	ha->flags.enable_lip_full_login =
9227	le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
9228	ha->flags.enable_target_reset =
9229	le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
9230	ha->flags.enable_led_scheme = 0;
9231	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
9232
9233	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
9234	(BIT_6 | BIT_5 | BIT_4)) >> 4;
9235
9236	/* save HBA serial number */
9237	ha->serial0 = icb->port_name[5];
9238	ha->serial1 = icb->port_name[6];
9239	ha->serial2 = icb->port_name[7];
9240	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
9241	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
9242
9243	icb->execution_throttle = cpu_to_le16(0xFFFF);
9244
9245	ha->retry_count = le16_to_cpu(nv->login_retry_count);
9246
9247	/* Set minimum login_timeout to 4 seconds. */
9248	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
9249	nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
9250	if (le16_to_cpu(nv->login_timeout) < 4)
9251	nv->login_timeout = cpu_to_le16(4);
9252	ha->login_timeout = le16_to_cpu(nv->login_timeout);
9253
9254	/* Set minimum RATOV to 100 tenths of a second. */
9255	ha->r_a_tov = 100;
9256
9257	ha->loop_reset_delay = nv->reset_delay;
9258
9259	/* Link Down Timeout = 0:
9260	*
9261	* When Port Down timer expires we will start returning
9262	* I/O's to OS with "DID_NO_CONNECT".
9263	*
9264	* Link Down Timeout != 0:
9265	*
9266	* The driver waits for the link to come up after link down
9267	* before returning I/Os to OS with "DID_NO_CONNECT".
9268	*/
9269	if (le16_to_cpu(nv->link_down_timeout) == 0) {
9270	ha->loop_down_abort_time =
9271	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
9272	} else {
9273	ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
9274	ha->loop_down_abort_time =
9275	(LOOP_DOWN_TIME - ha->link_down_timeout);
9276	}
9277
9278	/* Need enough time to try and get the port back. */
9279	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
9280	if (qlport_down_retry)
9281	ha->port_down_retry_count = qlport_down_retry;
9282
9283	/* Set login_retry_count */
9284	ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
9285	if (ha->port_down_retry_count ==
9286	le16_to_cpu(nv->port_down_retry_count) &&
9287	ha->port_down_retry_count > 3)
9288	ha->login_retry_count = ha->port_down_retry_count;
9289	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
9290	ha->login_retry_count = ha->port_down_retry_count;
9291	if (ql2xloginretrycount)
9292	ha->login_retry_count = ql2xloginretrycount;
9293
9294	/* if not running MSI-X we need handshaking on interrupts */
9295	if (!vha->hw->flags.msix_enabled &&
9296	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
9297	icb->firmware_options_2 |= cpu_to_le32(BIT_22);
9298
9299	/* Enable ZIO. */
9300	if (!vha->flags.init_done) {
9301	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
9302	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
9303	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
9304	le16_to_cpu(icb->interrupt_delay_timer) : 2;
9305	}
9306	icb->firmware_options_2 &= cpu_to_le32(
9307	~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
9308	vha->flags.process_response_queue = 0;
9309	if (ha->zio_mode != QLA_ZIO_DISABLED) {
9310	ha->zio_mode = QLA_ZIO_MODE_6;
9311
9312	ql_log(ql_log_info, vha, 0x0075,
9313	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
9314	ha->zio_mode,
9315	ha->zio_timer * 100);
9316
9317	icb->firmware_options_2 |= cpu_to_le32(
9318	(uint32_t)ha->zio_mode);
9319	icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
9320	vha->flags.process_response_queue = 1;
9321	}
9322
9323	/* enable RIDA Format2 */
9324	icb->firmware_options_3 |= cpu_to_le32(BIT_0);
9325
9326	/* N2N: driver will initiate Login instead of FW */
9327	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
9328
9329	/* Determine NVMe/FCP priority for target ports */
9330	ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
9331
9332	if (rval) {
9333	ql_log(ql_log_warn, vha, 0x0076,
9334	fmt: "NVRAM configuration failed.\n");
9335	}
9336	return (rval);
9337	}
9338
9339	int
9340	qla82xx_restart_isp(scsi_qla_host_t *vha)
9341	{
9342	int status, rval;
9343	struct qla_hw_data *ha = vha->hw;
9344	struct scsi_qla_host *vp, *tvp;
9345	unsigned long flags;
9346
9347	status = qla2x00_init_rings(vha);
9348	if (!status) {
9349	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
9350	ha->flags.chip_reset_done = 1;
9351
9352	status = qla2x00_fw_ready(vha);
9353	if (!status) {
9354	/* Issue a marker after FW becomes ready. */
9355	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
9356	vha->flags.online = 1;
9357	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
9358	}
9359
9360	/* if no cable then assume it's good */
9361	if ((vha->device_flags & DFLG_NO_CABLE))
9362	status = 0;
9363	}
9364
9365	if (!status) {
9366	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
9367
9368	if (!atomic_read(v: &vha->loop_down_timer)) {
9369	/*
9370	* Issue marker command only when we are going
9371	* to start the I/O .
9372	*/
9373	vha->marker_needed = 1;
9374	}
9375
9376	ha->isp_ops->enable_intrs(ha);
9377
9378	ha->isp_abort_cnt = 0;
9379	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
9380
9381	/* Update the firmware version */
9382	status = qla82xx_check_md_needed(vha);
9383
9384	if (ha->fce) {
9385	ha->flags.fce_enabled = 1;
9386	memset(ha->fce, 0,
9387	fce_calc_size(ha->fce_bufs));
9388	rval = qla2x00_enable_fce_trace(vha,
9389	ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9390	&ha->fce_bufs);
9391	if (rval) {
9392	ql_log(ql_log_warn, vha, 0x8001,
9393	fmt: "Unable to reinitialize FCE (%d).\n",
9394	rval);
9395	ha->flags.fce_enabled = 0;
9396	}
9397	}
9398
9399	if (ha->eft) {
9400	memset(ha->eft, 0, EFT_SIZE);
9401	rval = qla2x00_enable_eft_trace(vha,
9402	ha->eft_dma, EFT_NUM_BUFFERS);
9403	if (rval) {
9404	ql_log(ql_log_warn, vha, 0x8010,
9405	fmt: "Unable to reinitialize EFT (%d).\n",
9406	rval);
9407	}
9408	}
9409	}
9410
9411	if (!status) {
9412	ql_dbg(ql_dbg_taskm, vha, 0x8011,
9413	fmt: "qla82xx_restart_isp succeeded.\n");
9414
9415	spin_lock_irqsave(&ha->vport_slock, flags);
9416	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9417	if (vp->vp_idx) {
9418	atomic_inc(v: &vp->vref_count);
9419	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
9420
9421	qla2x00_vp_abort_isp(vp);
9422
9423	spin_lock_irqsave(&ha->vport_slock, flags);
9424	atomic_dec(v: &vp->vref_count);
9425	}
9426	}
9427	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
9428
9429	} else {
9430	ql_log(ql_log_warn, vha, 0x8016,
9431	fmt: "qla82xx_restart_isp **** FAILED ****.\n");
9432	}
9433
9434	return status;
9435	}
9436
9437	/*
9438	* qla24xx_get_fcp_prio
9439	* Gets the fcp cmd priority value for the logged in port.
9440	* Looks for a match of the port descriptors within
9441	* each of the fcp prio config entries. If a match is found,
9442	* the tag (priority) value is returned.
9443	*
9444	* Input:
9445	* vha = scsi host structure pointer.
9446	* fcport = port structure pointer.
9447	*
9448	* Return:
9449	* non-zero (if found)
9450	* -1 (if not found)
9451	*
9452	* Context:
9453	* Kernel context
9454	*/
9455	static int
9456	qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9457	{
9458	int i, entries;
9459	uint8_t pid_match, wwn_match;
9460	int priority;
9461	uint32_t pid1, pid2;
9462	uint64_t wwn1, wwn2;
9463	struct qla_fcp_prio_entry *pri_entry;
9464	struct qla_hw_data *ha = vha->hw;
9465
9466	if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9467	return -1;
9468
9469	priority = -1;
9470	entries = ha->fcp_prio_cfg->num_entries;
9471	pri_entry = &ha->fcp_prio_cfg->entry[0];
9472
9473	for (i = 0; i < entries; i++) {
9474	pid_match = wwn_match = 0;
9475
9476	if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9477	pri_entry++;
9478	continue;
9479	}
9480
9481	/* check source pid for a match */
9482	if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9483	pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9484	pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9485	if (pid1 == INVALID_PORT_ID)
9486	pid_match++;
9487	else if (pid1 == pid2)
9488	pid_match++;
9489	}
9490
9491	/* check destination pid for a match */
9492	if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9493	pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9494	pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9495	if (pid1 == INVALID_PORT_ID)
9496	pid_match++;
9497	else if (pid1 == pid2)
9498	pid_match++;
9499	}
9500
9501	/* check source WWN for a match */
9502	if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9503	wwn1 = wwn_to_u64(wwn: vha->port_name);
9504	wwn2 = wwn_to_u64(wwn: pri_entry->src_wwpn);
9505	if (wwn2 == (uint64_t)-1)
9506	wwn_match++;
9507	else if (wwn1 == wwn2)
9508	wwn_match++;
9509	}
9510
9511	/* check destination WWN for a match */
9512	if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9513	wwn1 = wwn_to_u64(wwn: fcport->port_name);
9514	wwn2 = wwn_to_u64(wwn: pri_entry->dst_wwpn);
9515	if (wwn2 == (uint64_t)-1)
9516	wwn_match++;
9517	else if (wwn1 == wwn2)
9518	wwn_match++;
9519	}
9520
9521	if (pid_match == 2 || wwn_match == 2) {
9522	/* Found a matching entry */
9523	if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9524	priority = pri_entry->tag;
9525	break;
9526	}
9527
9528	pri_entry++;
9529	}
9530
9531	return priority;
9532	}
9533
9534	/*
9535	* qla24xx_update_fcport_fcp_prio
9536	* Activates fcp priority for the logged in fc port
9537	*
9538	* Input:
9539	* vha = scsi host structure pointer.
9540	* fcp = port structure pointer.
9541	*
9542	* Return:
9543	* QLA_SUCCESS or QLA_FUNCTION_FAILED
9544	*
9545	* Context:
9546	* Kernel context.
9547	*/
9548	int
9549	qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9550	{
9551	int ret;
9552	int priority;
9553	uint16_t mb[5];
9554
9555	if (fcport->port_type != FCT_TARGET ||
9556	fcport->loop_id == FC_NO_LOOP_ID)
9557	return QLA_FUNCTION_FAILED;
9558
9559	priority = qla24xx_get_fcp_prio(vha, fcport);
9560	if (priority < 0)
9561	return QLA_FUNCTION_FAILED;
9562
9563	if (IS_P3P_TYPE(vha->hw)) {
9564	fcport->fcp_prio = priority & 0xf;
9565	return QLA_SUCCESS;
9566	}
9567
9568	ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9569	if (ret == QLA_SUCCESS) {
9570	if (fcport->fcp_prio != priority)
9571	ql_dbg(ql_dbg_user, vha, 0x709e,
9572	fmt: "Updated FCP_CMND priority - value=%d loop_id=%d "
9573	"port_id=%02x%02x%02x.\n", priority,
9574	fcport->loop_id, fcport->d_id.b.domain,
9575	fcport->d_id.b.area, fcport->d_id.b.al_pa);
9576	fcport->fcp_prio = priority & 0xf;
9577	} else
9578	ql_dbg(ql_dbg_user, vha, 0x704f,
9579	fmt: "Unable to update FCP_CMND priority - ret=0x%x for "
9580	"loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9581	fcport->d_id.b.domain, fcport->d_id.b.area,
9582	fcport->d_id.b.al_pa);
9583	return ret;
9584	}
9585
9586	/*
9587	* qla24xx_update_all_fcp_prio
9588	* Activates fcp priority for all the logged in ports
9589	*
9590	* Input:
9591	* ha = adapter block pointer.
9592	*
9593	* Return:
9594	* QLA_SUCCESS or QLA_FUNCTION_FAILED
9595	*
9596	* Context:
9597	* Kernel context.
9598	*/
9599	int
9600	qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9601	{
9602	int ret;
9603	fc_port_t *fcport;
9604
9605	ret = QLA_FUNCTION_FAILED;
9606	/* We need to set priority for all logged in ports */
9607	list_for_each_entry(fcport, &vha->vp_fcports, list)
9608	ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9609
9610	return ret;
9611	}
9612
9613	struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9614	int vp_idx, bool startqp)
9615	{
9616	int rsp_id = 0;
9617	int req_id = 0;
9618	int i;
9619	struct qla_hw_data *ha = vha->hw;
9620	uint16_t qpair_id = 0;
9621	struct qla_qpair *qpair = NULL;
9622	struct qla_msix_entry *msix;
9623
9624	if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9625	ql_log(ql_log_warn, vha, 0x00181,
9626	fmt: "FW/Driver is not multi-queue capable.\n");
9627	return NULL;
9628	}
9629
9630	if (ql2xmqsupport || ql2xnvmeenable) {
9631	qpair = kzalloc(size: sizeof(struct qla_qpair), GFP_KERNEL);
9632	if (qpair == NULL) {
9633	ql_log(ql_log_warn, vha, 0x0182,
9634	fmt: "Failed to allocate memory for queue pair.\n");
9635	return NULL;
9636	}
9637
9638	qpair->hw = vha->hw;
9639	qpair->vha = vha;
9640	qpair->qp_lock_ptr = &qpair->qp_lock;
9641	spin_lock_init(&qpair->qp_lock);
9642	qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9643
9644	/* Assign available que pair id */
9645	mutex_lock(&ha->mq_lock);
9646	qpair_id = find_first_zero_bit(addr: ha->qpair_qid_map, size: ha->max_qpairs);
9647	if (ha->num_qpairs >= ha->max_qpairs) {
9648	mutex_unlock(lock: &ha->mq_lock);
9649	ql_log(ql_log_warn, vha, 0x0183,
9650	fmt: "No resources to create additional q pair.\n");
9651	goto fail_qid_map;
9652	}
9653	ha->num_qpairs++;
9654	set_bit(nr: qpair_id, addr: ha->qpair_qid_map);
9655	ha->queue_pair_map[qpair_id] = qpair;
9656	qpair->id = qpair_id;
9657	qpair->vp_idx = vp_idx;
9658	qpair->fw_started = ha->flags.fw_started;
9659	INIT_LIST_HEAD(list: &qpair->hints_list);
9660	INIT_LIST_HEAD(list: &qpair->dsd_list);
9661	qpair->chip_reset = ha->base_qpair->chip_reset;
9662	qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9663	qpair->enable_explicit_conf =
9664	ha->base_qpair->enable_explicit_conf;
9665
9666	for (i = 0; i < ha->msix_count; i++) {
9667	msix = &ha->msix_entries[i];
9668	if (msix->in_use)
9669	continue;
9670	qpair->msix = msix;
9671	ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9672	fmt: "Vector %x selected for qpair\n", msix->vector);
9673	break;
9674	}
9675	if (!qpair->msix) {
9676	ql_log(ql_log_warn, vha, 0x0184,
9677	fmt: "Out of MSI-X vectors!.\n");
9678	goto fail_msix;
9679	}
9680
9681	qpair->msix->in_use = 1;
9682	list_add_tail(new: &qpair->qp_list_elem, head: &vha->qp_list);
9683	qpair->pdev = ha->pdev;
9684	if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9685	qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9686
9687	mutex_unlock(lock: &ha->mq_lock);
9688
9689	/* Create response queue first */
9690	rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9691	if (!rsp_id) {
9692	ql_log(ql_log_warn, vha, 0x0185,
9693	fmt: "Failed to create response queue.\n");
9694	goto fail_rsp;
9695	}
9696
9697	qpair->rsp = ha->rsp_q_map[rsp_id];
9698
9699	/* Create request queue */
9700	req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9701	startqp);
9702	if (!req_id) {
9703	ql_log(ql_log_warn, vha, 0x0186,
9704	fmt: "Failed to create request queue.\n");
9705	goto fail_req;
9706	}
9707
9708	qpair->req = ha->req_q_map[req_id];
9709	qpair->rsp->req = qpair->req;
9710	qpair->rsp->qpair = qpair;
9711
9712	if (!qpair->cpu_mapped)
9713	qla_cpu_update(qpair, raw_smp_processor_id());
9714
9715	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9716	if (ha->fw_attributes & BIT_4)
9717	qpair->difdix_supported = 1;
9718	}
9719
9720	qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, kc: srb_cachep);
9721	if (!qpair->srb_mempool) {
9722	ql_log(ql_log_warn, vha, 0xd036,
9723	fmt: "Failed to create srb mempool for qpair %d\n",
9724	qpair->id);
9725	goto fail_mempool;
9726	}
9727
9728	if (qla_create_buf_pool(vha, qpair)) {
9729	ql_log(ql_log_warn, vha, 0xd036,
9730	fmt: "Failed to initialize buf pool for qpair %d\n",
9731	qpair->id);
9732	goto fail_bufpool;
9733	}
9734
9735	/* Mark as online */
9736	qpair->online = 1;
9737
9738	if (!vha->flags.qpairs_available)
9739	vha->flags.qpairs_available = 1;
9740
9741	ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9742	fmt: "Request/Response queue pair created, id %d\n",
9743	qpair->id);
9744	ql_dbg(ql_dbg_init, vha, 0x0187,
9745	fmt: "Request/Response queue pair created, id %d\n",
9746	qpair->id);
9747	}
9748	return qpair;
9749
9750	fail_bufpool:
9751	mempool_destroy(pool: qpair->srb_mempool);
9752	fail_mempool:
9753	qla25xx_delete_req_que(vha, qpair->req);
9754	fail_req:
9755	qla25xx_delete_rsp_que(vha, qpair->rsp);
9756	fail_rsp:
9757	mutex_lock(&ha->mq_lock);
9758	qpair->msix->in_use = 0;
9759	list_del(entry: &qpair->qp_list_elem);
9760	if (list_empty(head: &vha->qp_list))
9761	vha->flags.qpairs_available = 0;
9762	fail_msix:
9763	ha->queue_pair_map[qpair_id] = NULL;
9764	clear_bit(nr: qpair_id, addr: ha->qpair_qid_map);
9765	ha->num_qpairs--;
9766	mutex_unlock(lock: &ha->mq_lock);
9767	fail_qid_map:
9768	kfree(objp: qpair);
9769	return NULL;
9770	}
9771
9772	int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9773	{
9774	int ret = QLA_FUNCTION_FAILED;
9775	struct qla_hw_data *ha = qpair->hw;
9776
9777	qpair->delete_in_progress = 1;
9778
9779	qla_free_buf_pool(qpair);
9780
9781	ret = qla25xx_delete_req_que(vha, qpair->req);
9782	if (ret != QLA_SUCCESS)
9783	goto fail;
9784
9785	ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9786	if (ret != QLA_SUCCESS)
9787	goto fail;
9788
9789	if (!list_empty(head: &qpair->dsd_list)) {
9790	struct dsd_dma *dsd_ptr, *tdsd_ptr;
9791
9792	/* clean up allocated prev pool */
9793	list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
9794	&qpair->dsd_list, list) {
9795	dma_pool_free(pool: ha->dl_dma_pool, vaddr: dsd_ptr->dsd_addr,
9796	addr: dsd_ptr->dsd_list_dma);
9797	list_del(entry: &dsd_ptr->list);
9798	kfree(objp: dsd_ptr);
9799	}
9800	}
9801
9802	mutex_lock(&ha->mq_lock);
9803	ha->queue_pair_map[qpair->id] = NULL;
9804	clear_bit(nr: qpair->id, addr: ha->qpair_qid_map);
9805	ha->num_qpairs--;
9806	list_del(entry: &qpair->qp_list_elem);
9807	if (list_empty(head: &vha->qp_list)) {
9808	vha->flags.qpairs_available = 0;
9809	vha->flags.qpairs_req_created = 0;
9810	vha->flags.qpairs_rsp_created = 0;
9811	}
9812	mempool_destroy(pool: qpair->srb_mempool);
9813	kfree(objp: qpair);
9814	mutex_unlock(lock: &ha->mq_lock);
9815
9816	return QLA_SUCCESS;
9817	fail:
9818	return ret;
9819	}
9820
9821	uint64_t
9822	qla2x00_count_set_bits(uint32_t num)
9823	{
9824	/* Brian Kernighan's Algorithm */
9825	u64 count = 0;
9826
9827	while (num) {
9828	num &= (num - 1);
9829	count++;
9830	}
9831	return count;
9832	}
9833
9834	uint64_t
9835	qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9836	{
9837	fc_port_t *f, *tf;
9838	u64 count = 0;
9839
9840	f = NULL;
9841	tf = NULL;
9842
9843	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9844	if (f->port_type != FCT_TARGET)
9845	continue;
9846	count++;
9847	}
9848	return count;
9849	}
9850
9851	int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9852	{
9853	scsi_qla_host_t *vha = shost_priv(shost: host);
9854	fc_port_t *fcport = NULL;
9855	unsigned long int_flags;
9856
9857	if (flags & QLA2XX_HW_ERROR)
9858	vha->hw_err_cnt = 0;
9859	if (flags & QLA2XX_SHT_LNK_DWN)
9860	vha->short_link_down_cnt = 0;
9861	if (flags & QLA2XX_INT_ERR)
9862	vha->interface_err_cnt = 0;
9863	if (flags & QLA2XX_CMD_TIMEOUT)
9864	vha->cmd_timeout_cnt = 0;
9865	if (flags & QLA2XX_RESET_CMD_ERR)
9866	vha->reset_cmd_err_cnt = 0;
9867	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9868	spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9869	list_for_each_entry(fcport, &vha->vp_fcports, list) {
9870	fcport->tgt_short_link_down_cnt = 0;
9871	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9872	}
9873	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags: int_flags);
9874	}
9875	vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9876	return 0;
9877	}
9878
9879	int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9880	{
9881	return qla2xxx_reset_stats(host, flags);
9882	}
9883
9884	int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9885	{
9886	return qla2xxx_reset_stats(host, flags);
9887	}
9888
9889	int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9890	void *data, u64 size)
9891	{
9892	scsi_qla_host_t *vha = shost_priv(shost: host);
9893	struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9894	struct ql_vnd_stats *rsp_data = &resp->stats;
9895	u64 ini_entry_count = 0;
9896	u64 i = 0;
9897	u64 entry_count = 0;
9898	u64 num_tgt = 0;
9899	u32 tmp_stat_type = 0;
9900	fc_port_t *fcport = NULL;
9901	unsigned long int_flags;
9902
9903	/* Copy stat type to work on it */
9904	tmp_stat_type = flags;
9905
9906	if (tmp_stat_type & BIT_17) {
9907	num_tgt = qla2x00_get_num_tgts(vha);
9908	/* unset BIT_17 */
9909	tmp_stat_type &= ~(1 << 17);
9910	}
9911	ini_entry_count = qla2x00_count_set_bits(num: tmp_stat_type);
9912
9913	entry_count = ini_entry_count + num_tgt;
9914
9915	rsp_data->entry_count = entry_count;
9916
9917	i = 0;
9918	if (flags & QLA2XX_HW_ERROR) {
9919	rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9920	rsp_data->entry[i].tgt_num = 0x0;
9921	rsp_data->entry[i].cnt = vha->hw_err_cnt;
9922	i++;
9923	}
9924
9925	if (flags & QLA2XX_SHT_LNK_DWN) {
9926	rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9927	rsp_data->entry[i].tgt_num = 0x0;
9928	rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9929	i++;
9930	}
9931
9932	if (flags & QLA2XX_INT_ERR) {
9933	rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9934	rsp_data->entry[i].tgt_num = 0x0;
9935	rsp_data->entry[i].cnt = vha->interface_err_cnt;
9936	i++;
9937	}
9938
9939	if (flags & QLA2XX_CMD_TIMEOUT) {
9940	rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9941	rsp_data->entry[i].tgt_num = 0x0;
9942	rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
9943	i++;
9944	}
9945
9946	if (flags & QLA2XX_RESET_CMD_ERR) {
9947	rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
9948	rsp_data->entry[i].tgt_num = 0x0;
9949	rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
9950	i++;
9951	}
9952
9953	/* i will continue from previous loop, as target
9954	* entries are after initiator
9955	*/
9956	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9957	spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9958	list_for_each_entry(fcport, &vha->vp_fcports, list) {
9959	if (fcport->port_type != FCT_TARGET)
9960	continue;
9961	if (!fcport->rport)
9962	continue;
9963	rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
9964	rsp_data->entry[i].tgt_num = fcport->rport->number;
9965	rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
9966	i++;
9967	}
9968	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags: int_flags);
9969	}
9970	resp->status = EXT_STATUS_OK;
9971
9972	return 0;
9973	}
9974
9975	int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
9976	struct fc_rport *rport, void *data, u64 size)
9977	{
9978	struct ql_vnd_tgt_stats_resp *tgt_data = data;
9979	fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
9980
9981	tgt_data->status = 0;
9982	tgt_data->stats.entry_count = 1;
9983	tgt_data->stats.entry[0].stat_type = flags;
9984	tgt_data->stats.entry[0].tgt_num = rport->number;
9985	tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
9986
9987	return 0;
9988	}
9989
9990	int qla2xxx_disable_port(struct Scsi_Host *host)
9991	{
9992	scsi_qla_host_t *vha = shost_priv(shost: host);
9993
9994	vha->hw->flags.port_isolated = 1;
9995
9996	if (qla2x00_isp_reg_stat(ha: vha->hw)) {
9997	ql_log(ql_log_info, vha, 0x9006,
9998	fmt: "PCI/Register disconnect, exiting.\n");
9999	qla_pci_set_eeh_busy(vha);
10000	return FAILED;
10001	}
10002	if (qla2x00_chip_is_down(vha))
10003	return 0;
10004
10005	if (vha->flags.online) {
10006	qla2x00_abort_isp_cleanup(vha);
10007	qla2x00_wait_for_sess_deletion(vha);
10008	}
10009
10010	return 0;
10011	}
10012
10013	int qla2xxx_enable_port(struct Scsi_Host *host)
10014	{
10015	scsi_qla_host_t *vha = shost_priv(shost: host);
10016
10017	if (qla2x00_isp_reg_stat(ha: vha->hw)) {
10018	ql_log(ql_log_info, vha, 0x9001,
10019	fmt: "PCI/Register disconnect, exiting.\n");
10020	qla_pci_set_eeh_busy(vha);
10021	return FAILED;
10022	}
10023
10024	vha->hw->flags.port_isolated = 0;
10025	/* Set the flag to 1, so that isp_abort can proceed */
10026	vha->flags.online = 1;
10027	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
10028	qla2xxx_wake_dpc(vha);
10029
10030	return 0;
10031	}
10032