1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* QLogic Fibre Channel HBA Driver
4	* Copyright (c) 2003-2014 QLogic Corporation
5	*/
6	#include "qla_def.h"
7	#include "qla_gbl.h"
8
9	#include <linux/delay.h>
10	#include <linux/slab.h>
11	#include <linux/vmalloc.h>
12
13	#include "qla_devtbl.h"
14
15	#ifdef CONFIG_SPARC
16	#include <asm/prom.h>
17	#endif
18
19	#include "qla_target.h"
20
21	/*
22	* QLogic ISP2x00 Hardware Support Function Prototypes.
23	*/
24	static int qla2x00_isp_firmware(scsi_qla_host_t *);
25	static int qla2x00_setup_chip(scsi_qla_host_t *);
26	static int qla2x00_fw_ready(scsi_qla_host_t *);
27	static int qla2x00_configure_hba(scsi_qla_host_t *);
28	static int qla2x00_configure_loop(scsi_qla_host_t *);
29	static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30	static int qla2x00_configure_fabric(scsi_qla_host_t *);
31	static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32	static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34	static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35	static int qla84xx_init_chip(scsi_qla_host_t *);
36	static int qla25xx_init_queues(struct qla_hw_data *);
37	static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38	struct event_arg *ea);
39	static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40	struct event_arg *);
41	static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42
43	/* SRB Extensions ---------------------------------------------------------- */
44
45	void
46	qla2x00_sp_timeout(struct timer_list *t)
47	{
48	srb_t *sp = timer_container_of(sp, t, u.iocb_cmd.timer);
49	struct srb_iocb *iocb;
50	scsi_qla_host_t *vha = sp->vha;
51
52	WARN_ON(irqs_disabled());
53	iocb = &sp->u.iocb_cmd;
54	iocb->timeout(sp);
55
56	/* ref: TMR */
57	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
58
59	if (vha && qla2x00_isp_reg_stat(ha: vha->hw)) {
60	ql_log(ql_log_info, vha, 0x9008,
61	fmt: "PCI/Register disconnect.\n");
62	qla_pci_set_eeh_busy(vha);
63	}
64	}
65
66	void qla2x00_sp_free(srb_t *sp)
67	{
68	struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70	timer_delete(timer: &iocb->timer);
71	qla2x00_rel_sp(sp);
72	}
73
74	void qla2xxx_rel_done_warning(srb_t *sp, int res)
75	{
76	WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
77	}
78
79	void qla2xxx_rel_free_warning(srb_t *sp)
80	{
81	WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
82	}
83
84	/* Asynchronous Login/Logout Routines -------------------------------------- */
85
86	unsigned long
87	qla2x00_get_async_timeout(struct scsi_qla_host *vha)
88	{
89	unsigned long tmo;
90	struct qla_hw_data *ha = vha->hw;
91
92	/* Firmware should use switch negotiated r_a_tov for timeout. */
93	tmo = ha->r_a_tov / 10 * 2;
94	if (IS_QLAFX00(ha)) {
95	tmo = FX00_DEF_RATOV * 2;
96	} else if (!IS_FWI2_CAPABLE(ha)) {
97	/*
98	* Except for earlier ISPs where the timeout is seeded from the
99	* initialization control block.
100	*/
101	tmo = ha->login_timeout;
102	}
103	return tmo;
104	}
105
106	static void qla24xx_abort_iocb_timeout(void *data)
107	{
108	srb_t *sp = data;
109	struct srb_iocb *abt = &sp->u.iocb_cmd;
110	struct qla_qpair *qpair = sp->qpair;
111	u32 handle;
112	unsigned long flags;
113	int sp_found = 0, cmdsp_found = 0;
114
115	if (sp->cmd_sp)
116	ql_dbg(ql_dbg_async, vha: sp->vha, 0x507c,
117	fmt: "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
118	sp->cmd_sp->handle, sp->cmd_sp->type,
119	sp->handle, sp->type);
120	else
121	ql_dbg(ql_dbg_async, vha: sp->vha, 0x507c,
122	fmt: "Abort timeout 2 - hdl=%x, type=%x\n",
123	sp->handle, sp->type);
124
125	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
126	for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
127	if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
128	sp->cmd_sp)) {
129	qpair->req->outstanding_cmds[handle] = NULL;
130	cmdsp_found = 1;
131	qla_put_fw_resources(qp: qpair, iores: &sp->cmd_sp->iores);
132	}
133
134	/* removing the abort */
135	if (qpair->req->outstanding_cmds[handle] == sp) {
136	qpair->req->outstanding_cmds[handle] = NULL;
137	sp_found = 1;
138	qla_put_fw_resources(qp: qpair, iores: &sp->iores);
139	break;
140	}
141	}
142	spin_unlock_irqrestore(lock: qpair->qp_lock_ptr, flags);
143
144	if (cmdsp_found && sp->cmd_sp) {
145	/*
146	* This done function should take care of
147	* original command ref: INIT
148	*/
149	sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
150	}
151
152	if (sp_found) {
153	abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
154	sp->done(sp, QLA_OS_TIMER_EXPIRED);
155	}
156	}
157
158	static void qla24xx_abort_sp_done(srb_t *sp, int res)
159	{
160	struct srb_iocb *abt = &sp->u.iocb_cmd;
161	srb_t *orig_sp = sp->cmd_sp;
162
163	if (orig_sp)
164	qla_wait_nvme_release_cmd_kref(sp: orig_sp);
165
166	if (sp->flags & SRB_WAKEUP_ON_COMP)
167	complete(&abt->u.abt.comp);
168	else
169	/* ref: INIT */
170	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
171	}
172
173	int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
174	{
175	scsi_qla_host_t *vha = cmd_sp->vha;
176	struct srb_iocb *abt_iocb;
177	srb_t *sp;
178	int rval = QLA_FUNCTION_FAILED;
179
180	/* ref: INIT for ABTS command */
181	sp = qla2xxx_get_qpair_sp(vha: cmd_sp->vha, qpair: cmd_sp->qpair, fcport: cmd_sp->fcport,
182	GFP_ATOMIC);
183	if (!sp)
184	return QLA_MEMORY_ALLOC_FAILED;
185
186	qla_vha_mark_busy(vha);
187	abt_iocb = &sp->u.iocb_cmd;
188	sp->type = SRB_ABT_CMD;
189	sp->name = "abort";
190	sp->qpair = cmd_sp->qpair;
191	sp->cmd_sp = cmd_sp;
192	if (wait)
193	sp->flags = SRB_WAKEUP_ON_COMP;
194
195	init_completion(x: &abt_iocb->u.abt.comp);
196	/* FW can send 2 x ABTS's timeout/20s */
197	qla2x00_init_async_sp(sp, tmo: 42, done: qla24xx_abort_sp_done);
198	sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
199
200	abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
201	abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
202
203	ql_dbg(ql_dbg_async, vha, 0x507c,
204	fmt: "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
205	cmd_sp->type);
206
207	rval = qla2x00_start_sp(sp);
208	if (rval != QLA_SUCCESS) {
209	/* ref: INIT */
210	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
211	return rval;
212	}
213
214	if (wait) {
215	wait_for_completion(&abt_iocb->u.abt.comp);
216	rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
217	QLA_SUCCESS : QLA_ERR_FROM_FW;
218	/* ref: INIT */
219	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
220	}
221
222	return rval;
223	}
224
225	void
226	qla2x00_async_iocb_timeout(void *data)
227	{
228	srb_t *sp = data;
229	fc_port_t *fcport = sp->fcport;
230	struct srb_iocb *lio = &sp->u.iocb_cmd;
231	int rc, h;
232	unsigned long flags;
233
234	if (fcport) {
235	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x2071,
236	fmt: "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
237	sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
238
239	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
240	} else {
241	pr_info("Async-%s timeout - hdl=%x.\n",
242	sp->name, sp->handle);
243	}
244
245	switch (sp->type) {
246	case SRB_LOGIN_CMD:
247	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
248	if (rc) {
249	/* Retry as needed. */
250	lio->u.logio.data[0] = MBS_COMMAND_ERROR;
251	lio->u.logio.data[1] =
252	lio->u.logio.flags & SRB_LOGIN_RETRIED ?
253	QLA_LOGIO_LOGIN_RETRIED : 0;
254	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
255	for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
256	h++) {
257	if (sp->qpair->req->outstanding_cmds[h] ==
258	sp) {
259	sp->qpair->req->outstanding_cmds[h] =
260	NULL;
261	break;
262	}
263	}
264	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
265	sp->done(sp, QLA_FUNCTION_TIMEOUT);
266	}
267	break;
268	case SRB_LOGOUT_CMD:
269	case SRB_CT_PTHRU_CMD:
270	case SRB_MB_IOCB:
271	case SRB_NACK_PLOGI:
272	case SRB_NACK_PRLI:
273	case SRB_NACK_LOGO:
274	case SRB_CTRL_VP:
275	default:
276	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
277	if (rc) {
278	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
279	for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
280	h++) {
281	if (sp->qpair->req->outstanding_cmds[h] ==
282	sp) {
283	sp->qpair->req->outstanding_cmds[h] =
284	NULL;
285	break;
286	}
287	}
288	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
289	sp->done(sp, QLA_FUNCTION_TIMEOUT);
290	}
291	break;
292	}
293	}
294
295	static void qla2x00_async_login_sp_done(srb_t *sp, int res)
296	{
297	struct scsi_qla_host *vha = sp->vha;
298	struct srb_iocb *lio = &sp->u.iocb_cmd;
299	struct event_arg ea;
300
301	ql_dbg(ql_dbg_disc, vha, 0x20dd,
302	fmt: "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
303
304	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
305
306	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
307	memset(&ea, 0, sizeof(ea));
308	ea.fcport = sp->fcport;
309	ea.data[0] = lio->u.logio.data[0];
310	ea.data[1] = lio->u.logio.data[1];
311	ea.iop[0] = lio->u.logio.iop[0];
312	ea.iop[1] = lio->u.logio.iop[1];
313	ea.sp = sp;
314	if (res)
315	ea.data[0] = MBS_COMMAND_ERROR;
316	qla24xx_handle_plogi_done_event(vha, ea: &ea);
317	}
318
319	/* ref: INIT */
320	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
321	}
322
323	int
324	qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
325	uint16_t *data)
326	{
327	srb_t *sp;
328	struct srb_iocb *lio;
329	int rval = QLA_FUNCTION_FAILED;
330
331	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
332	fcport->loop_id == FC_NO_LOOP_ID) {
333	ql_log(ql_log_warn, vha, 0xffff,
334	fmt: "%s: %8phC - not sending command.\n",
335	__func__, fcport->port_name);
336	return rval;
337	}
338
339	/* ref: INIT */
340	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
341	if (!sp)
342	goto done;
343
344	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_PEND);
345	fcport->flags |= FCF_ASYNC_SENT;
346	fcport->logout_completed = 0;
347
348	sp->type = SRB_LOGIN_CMD;
349	sp->name = "login";
350	sp->gen1 = fcport->rscn_gen;
351	sp->gen2 = fcport->login_gen;
352	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
353	done: qla2x00_async_login_sp_done);
354
355	lio = &sp->u.iocb_cmd;
356	if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
357	lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
358	} else {
359	if (vha->hw->flags.edif_enabled &&
360	DBELL_ACTIVE(vha)) {
361	lio->u.logio.flags |=
362	(SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
363	} else {
364	lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
365	}
366	}
367
368	if (NVME_TARGET(vha->hw, fcport))
369	lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
370
371	rval = qla2x00_start_sp(sp);
372
373	ql_dbg(ql_dbg_disc, vha, 0x2072,
374	fmt: "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
375	fcport->port_name, sp->handle, fcport->loop_id,
376	fcport->d_id.b24, fcport->login_retry,
377	lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : "");
378
379	if (rval != QLA_SUCCESS) {
380	fcport->flags |= FCF_LOGIN_NEEDED;
381	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
382	goto done_free_sp;
383	}
384
385	return rval;
386
387	done_free_sp:
388	/* ref: INIT */
389	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
390	fcport->flags &= ~FCF_ASYNC_SENT;
391	done:
392	fcport->flags &= ~FCF_ASYNC_ACTIVE;
393
394	/*
395	* async login failed. Could be due to iocb/exchange resource
396	* being low. Set state DELETED for re-login process to start again.
397	*/
398	qla2x00_set_fcport_disc_state(fcport, state: DSC_DELETED);
399	return rval;
400	}
401
402	static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
403	{
404	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
405	sp->fcport->login_gen++;
406	qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
407	/* ref: INIT */
408	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
409	}
410
411	int
412	qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
413	{
414	srb_t *sp;
415	int rval = QLA_FUNCTION_FAILED;
416
417	fcport->flags |= FCF_ASYNC_SENT;
418	/* ref: INIT */
419	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
420	if (!sp)
421	goto done;
422
423	sp->type = SRB_LOGOUT_CMD;
424	sp->name = "logout";
425	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
426	done: qla2x00_async_logout_sp_done);
427
428	ql_dbg(ql_dbg_disc, vha, 0x2070,
429	fmt: "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
430	sp->handle, fcport->loop_id, fcport->d_id.b.domain,
431	fcport->d_id.b.area, fcport->d_id.b.al_pa,
432	fcport->port_name, fcport->explicit_logout);
433
434	rval = qla2x00_start_sp(sp);
435	if (rval != QLA_SUCCESS)
436	goto done_free_sp;
437	return rval;
438
439	done_free_sp:
440	/* ref: INIT */
441	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
442	done:
443	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
444	return rval;
445	}
446
447	void
448	qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
449	uint16_t *data)
450	{
451	fcport->flags &= ~FCF_ASYNC_ACTIVE;
452	/* Don't re-login in target mode */
453	if (!fcport->tgt_session)
454	qla2x00_mark_device_lost(vha, fcport, 1);
455	qlt_logo_completion_handler(fcport, data[0]);
456	}
457
458	static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
459	{
460	struct srb_iocb *lio = &sp->u.iocb_cmd;
461	struct scsi_qla_host *vha = sp->vha;
462
463	sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
464	if (!test_bit(UNLOADING, &vha->dpc_flags))
465	qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
466	lio->u.logio.data);
467	/* ref: INIT */
468	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
469	}
470
471	int
472	qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
473	{
474	srb_t *sp;
475	int rval;
476
477	rval = QLA_FUNCTION_FAILED;
478	/* ref: INIT */
479	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
480	if (!sp)
481	goto done;
482
483	sp->type = SRB_PRLO_CMD;
484	sp->name = "prlo";
485	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
486	done: qla2x00_async_prlo_sp_done);
487
488	ql_dbg(ql_dbg_disc, vha, 0x2070,
489	fmt: "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
490	sp->handle, fcport->loop_id, fcport->d_id.b.domain,
491	fcport->d_id.b.area, fcport->d_id.b.al_pa);
492
493	rval = qla2x00_start_sp(sp);
494	if (rval != QLA_SUCCESS)
495	goto done_free_sp;
496
497	return rval;
498
499	done_free_sp:
500	/* ref: INIT */
501	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
502	done:
503	fcport->flags &= ~FCF_ASYNC_ACTIVE;
504	return rval;
505	}
506
507	static
508	void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
509	{
510	struct fc_port *fcport = ea->fcport;
511	unsigned long flags;
512
513	ql_dbg(ql_dbg_disc, vha, 0x20d2,
514	fmt: "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
515	__func__, fcport->port_name, fcport->disc_state,
516	fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
517	fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
518
519	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
520	ea->data[0]);
521
522	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
523	ql_dbg(ql_dbg_disc, vha, 0x2066,
524	fmt: "%s %8phC: adisc fail: post delete\n",
525	__func__, ea->fcport->port_name);
526
527	spin_lock_irqsave(&vha->work_lock, flags);
528	/* deleted = 0 & logout_on_delete = force fw cleanup */
529	if (fcport->deleted == QLA_SESS_DELETED)
530	fcport->deleted = 0;
531
532	fcport->logout_on_delete = 1;
533	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
534
535	qlt_schedule_sess_for_deletion(ea->fcport);
536	return;
537	}
538
539	if (ea->fcport->disc_state == DSC_DELETE_PEND)
540	return;
541
542	if (ea->sp->gen2 != ea->fcport->login_gen) {
543	/* target side must have changed it. */
544	ql_dbg(ql_dbg_disc, vha, 0x20d3,
545	fmt: "%s %8phC generation changed\n",
546	__func__, ea->fcport->port_name);
547	return;
548	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
549	qla_rscn_replay(fcport);
550	qlt_schedule_sess_for_deletion(fcport);
551	return;
552	}
553
554	__qla24xx_handle_gpdb_event(vha, ea);
555	}
556
557	static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
558	{
559	struct qla_work_evt *e;
560
561	e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
562	if (!e)
563	return QLA_FUNCTION_FAILED;
564
565	e->u.fcport.fcport = fcport;
566	fcport->flags |= FCF_ASYNC_ACTIVE;
567	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_PEND);
568	return qla2x00_post_work(vha, e);
569	}
570
571	static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
572	{
573	struct scsi_qla_host *vha = sp->vha;
574	struct event_arg ea;
575	struct srb_iocb *lio = &sp->u.iocb_cmd;
576
577	ql_dbg(ql_dbg_disc, vha, 0x2066,
578	fmt: "Async done-%s res %x %8phC\n",
579	sp->name, res, sp->fcport->port_name);
580
581	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
582
583	memset(&ea, 0, sizeof(ea));
584	ea.rc = res;
585	ea.data[0] = lio->u.logio.data[0];
586	ea.data[1] = lio->u.logio.data[1];
587	ea.iop[0] = lio->u.logio.iop[0];
588	ea.iop[1] = lio->u.logio.iop[1];
589	ea.fcport = sp->fcport;
590	ea.sp = sp;
591	if (res)
592	ea.data[0] = MBS_COMMAND_ERROR;
593
594	qla24xx_handle_adisc_event(vha, ea: &ea);
595	/* ref: INIT */
596	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
597	}
598
599	int
600	qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
601	uint16_t *data)
602	{
603	srb_t *sp;
604	struct srb_iocb *lio;
605	int rval = QLA_FUNCTION_FAILED;
606
607	if (IS_SESSION_DELETED(fcport)) {
608	ql_log(ql_log_warn, vha, 0xffff,
609	fmt: "%s: %8phC is being delete - not sending command.\n",
610	__func__, fcport->port_name);
611	fcport->flags &= ~FCF_ASYNC_ACTIVE;
612	return rval;
613	}
614
615	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
616	return rval;
617
618	fcport->flags |= FCF_ASYNC_SENT;
619	/* ref: INIT */
620	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
621	if (!sp)
622	goto done;
623
624	sp->type = SRB_ADISC_CMD;
625	sp->name = "adisc";
626	sp->gen1 = fcport->rscn_gen;
627	sp->gen2 = fcport->login_gen;
628	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
629	done: qla2x00_async_adisc_sp_done);
630
631	if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
632	lio = &sp->u.iocb_cmd;
633	lio->u.logio.flags |= SRB_LOGIN_RETRIED;
634	}
635
636	ql_dbg(ql_dbg_disc, vha, 0x206f,
637	fmt: "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
638	sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
639
640	rval = qla2x00_start_sp(sp);
641	if (rval != QLA_SUCCESS)
642	goto done_free_sp;
643
644	return rval;
645
646	done_free_sp:
647	/* ref: INIT */
648	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
649	done:
650	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
651	qla2x00_post_async_adisc_work(vha, fcport, data);
652	return rval;
653	}
654
655	static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
656	{
657	struct qla_hw_data *ha = vha->hw;
658
659	if (IS_FWI2_CAPABLE(ha))
660	return loop_id > NPH_LAST_HANDLE;
661
662	return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
663	loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
664	}
665
666	/**
667	* qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
668	* @vha: adapter state pointer.
669	* @dev: port structure pointer.
670	*
671	* Returns:
672	* qla2x00 local function return status code.
673	*
674	* Context:
675	* Kernel context.
676	*/
677	static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
678	{
679	int rval;
680	struct qla_hw_data *ha = vha->hw;
681	unsigned long flags = 0;
682
683	rval = QLA_SUCCESS;
684
685	spin_lock_irqsave(&ha->vport_slock, flags);
686
687	dev->loop_id = find_first_zero_bit(addr: ha->loop_id_map, LOOPID_MAP_SIZE);
688	if (dev->loop_id >= LOOPID_MAP_SIZE ||
689	qla2x00_is_reserved_id(vha, loop_id: dev->loop_id)) {
690	dev->loop_id = FC_NO_LOOP_ID;
691	rval = QLA_FUNCTION_FAILED;
692	} else {
693	set_bit(nr: dev->loop_id, addr: ha->loop_id_map);
694	}
695	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
696
697	if (rval == QLA_SUCCESS)
698	ql_dbg(ql_dbg_disc, vha: dev->vha, 0x2086,
699	fmt: "Assigning new loopid=%x, portid=%x.\n",
700	dev->loop_id, dev->d_id.b24);
701	else
702	ql_log(ql_log_warn, vha: dev->vha, 0x2087,
703	fmt: "No loop_id's available, portid=%x.\n",
704	dev->d_id.b24);
705
706	return rval;
707	}
708
709	void qla2x00_clear_loop_id(fc_port_t *fcport)
710	{
711	struct qla_hw_data *ha = fcport->vha->hw;
712
713	if (fcport->loop_id == FC_NO_LOOP_ID ||
714	qla2x00_is_reserved_id(vha: fcport->vha, loop_id: fcport->loop_id))
715	return;
716
717	clear_bit(nr: fcport->loop_id, addr: ha->loop_id_map);
718	fcport->loop_id = FC_NO_LOOP_ID;
719	}
720
721	static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
722	struct event_arg *ea)
723	{
724	fc_port_t *fcport, *conflict_fcport;
725	struct get_name_list_extended *e;
726	u16 i, n, found = 0, loop_id;
727	port_id_t id;
728	u64 wwn;
729	u16 data[2];
730	u8 current_login_state, nvme_cls;
731
732	fcport = ea->fcport;
733	ql_dbg(ql_dbg_disc, vha, 0xffff,
734	fmt: "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
735	__func__, fcport->port_name, fcport->disc_state,
736	fcport->fw_login_state, ea->rc,
737	fcport->login_gen, fcport->last_login_gen,
738	fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
739
740	if (fcport->disc_state == DSC_DELETE_PEND)
741	return;
742
743	if (ea->rc) { /* rval */
744	if (fcport->login_retry == 0) {
745	ql_dbg(ql_dbg_disc, vha, 0x20de,
746	fmt: "GNL failed Port login retry %8phN, retry cnt=%d.\n",
747	fcport->port_name, fcport->login_retry);
748	}
749	return;
750	}
751
752	if (fcport->last_rscn_gen != fcport->rscn_gen) {
753	qla_rscn_replay(fcport);
754	qlt_schedule_sess_for_deletion(fcport);
755	return;
756	} else if (fcport->last_login_gen != fcport->login_gen) {
757	ql_dbg(ql_dbg_disc, vha, 0x20e0,
758	fmt: "%s %8phC login gen changed\n",
759	__func__, fcport->port_name);
760	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
761	return;
762	}
763
764	n = ea->data[0] / sizeof(struct get_name_list_extended);
765
766	ql_dbg(ql_dbg_disc, vha, 0x20e1,
767	fmt: "%s %d %8phC n %d %02x%02x%02x lid %d \n",
768	__func__, __LINE__, fcport->port_name, n,
769	fcport->d_id.b.domain, fcport->d_id.b.area,
770	fcport->d_id.b.al_pa, fcport->loop_id);
771
772	for (i = 0; i < n; i++) {
773	e = &vha->gnl.l[i];
774	wwn = wwn_to_u64(wwn: e->port_name);
775	id.b.domain = e->port_id[2];
776	id.b.area = e->port_id[1];
777	id.b.al_pa = e->port_id[0];
778	id.b.rsvd_1 = 0;
779
780	if (memcmp(p: (u8 *)&wwn, q: fcport->port_name, WWN_SIZE))
781	continue;
782
783	if (IS_SW_RESV_ADDR(id))
784	continue;
785
786	found = 1;
787
788	loop_id = le16_to_cpu(e->nport_handle);
789	loop_id = (loop_id & 0x7fff);
790	nvme_cls = e->current_login_state >> 4;
791	current_login_state = e->current_login_state & 0xf;
792
793	if (PRLI_PHASE(nvme_cls)) {
794	current_login_state = nvme_cls;
795	fcport->fc4_type &= ~FS_FC4TYPE_FCP;
796	fcport->fc4_type |= FS_FC4TYPE_NVME;
797	} else if (PRLI_PHASE(current_login_state)) {
798	fcport->fc4_type |= FS_FC4TYPE_FCP;
799	fcport->fc4_type &= ~FS_FC4TYPE_NVME;
800	}
801
802	ql_dbg(ql_dbg_disc, vha, 0x20e2,
803	fmt: "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
804	__func__, fcport->port_name,
805	e->current_login_state, fcport->fw_login_state,
806	fcport->fc4_type, id.b24, fcport->d_id.b24,
807	loop_id, fcport->loop_id);
808
809	switch (fcport->disc_state) {
810	case DSC_DELETE_PEND:
811	case DSC_DELETED:
812	break;
813	default:
814	if ((id.b24 != fcport->d_id.b24 &&
815	fcport->d_id.b24 &&
816	fcport->loop_id != FC_NO_LOOP_ID) ||
817	(fcport->loop_id != FC_NO_LOOP_ID &&
818	fcport->loop_id != loop_id)) {
819	ql_dbg(ql_dbg_disc, vha, 0x20e3,
820	fmt: "%s %d %8phC post del sess\n",
821	__func__, __LINE__, fcport->port_name);
822	if (fcport->n2n_flag)
823	fcport->d_id.b24 = 0;
824	qlt_schedule_sess_for_deletion(fcport);
825	return;
826	}
827	break;
828	}
829
830	fcport->loop_id = loop_id;
831	if (fcport->n2n_flag)
832	fcport->d_id.b24 = id.b24;
833
834	wwn = wwn_to_u64(wwn: fcport->port_name);
835	qlt_find_sess_invalidate_other(vha, wwn,
836	port_id: id, loop_id, &conflict_fcport);
837
838	if (conflict_fcport) {
839	/*
840	* Another share fcport share the same loop_id &
841	* nport id. Conflict fcport needs to finish
842	* cleanup before this fcport can proceed to login.
843	*/
844	conflict_fcport->conflict = fcport;
845	fcport->login_pause = 1;
846	}
847
848	switch (vha->hw->current_topology) {
849	default:
850	switch (current_login_state) {
851	case DSC_LS_PRLI_COMP:
852	ql_dbg(ql_dbg_disc,
853	vha, 0x20e4, fmt: "%s %d %8phC post gpdb\n",
854	__func__, __LINE__, fcport->port_name);
855
856	if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
857	fcport->port_type = FCT_INITIATOR;
858	else
859	fcport->port_type = FCT_TARGET;
860	data[0] = data[1] = 0;
861	qla2x00_post_async_adisc_work(vha, fcport,
862	data);
863	break;
864	case DSC_LS_PLOGI_COMP:
865	if (vha->hw->flags.edif_enabled) {
866	/* check to see if App support Secure */
867	qla24xx_post_gpdb_work(vha, fcport, 0);
868	break;
869	}
870	fallthrough;
871	case DSC_LS_PORT_UNAVAIL:
872	default:
873	if (fcport->loop_id == FC_NO_LOOP_ID) {
874	qla2x00_find_new_loop_id(vha, dev: fcport);
875	fcport->fw_login_state =
876	DSC_LS_PORT_UNAVAIL;
877	}
878	ql_dbg(ql_dbg_disc, vha, 0x20e5,
879	fmt: "%s %d %8phC\n", __func__, __LINE__,
880	fcport->port_name);
881	qla24xx_fcport_handle_login(vha, fcport);
882	break;
883	}
884	break;
885	case ISP_CFG_N:
886	fcport->fw_login_state = current_login_state;
887	fcport->d_id = id;
888	switch (current_login_state) {
889	case DSC_LS_PRLI_PEND:
890	/*
891	* In the middle of PRLI. Let it finish.
892	* Allow relogin code to recheck state again
893	* with GNL. Push disc_state back to DELETED
894	* so GNL can go out again
895	*/
896	qla2x00_set_fcport_disc_state(fcport,
897	state: DSC_DELETED);
898	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
899	break;
900	case DSC_LS_PRLI_COMP:
901	if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
902	fcport->port_type = FCT_INITIATOR;
903	else
904	fcport->port_type = FCT_TARGET;
905
906	data[0] = data[1] = 0;
907	qla2x00_post_async_adisc_work(vha, fcport,
908	data);
909	break;
910	case DSC_LS_PLOGI_COMP:
911	if (vha->hw->flags.edif_enabled &&
912	DBELL_ACTIVE(vha)) {
913	/* check to see if App support secure or not */
914	qla24xx_post_gpdb_work(vha, fcport, 0);
915	break;
916	}
917	if (fcport_is_bigger(fcport)) {
918	/* local adapter is smaller */
919	if (fcport->loop_id != FC_NO_LOOP_ID)
920	qla2x00_clear_loop_id(fcport);
921
922	fcport->loop_id = loop_id;
923	qla24xx_fcport_handle_login(vha,
924	fcport);
925	break;
926	}
927	fallthrough;
928	default:
929	if (fcport_is_smaller(fcport)) {
930	/* local adapter is bigger */
931	if (fcport->loop_id != FC_NO_LOOP_ID)
932	qla2x00_clear_loop_id(fcport);
933
934	fcport->loop_id = loop_id;
935	qla24xx_fcport_handle_login(vha,
936	fcport);
937	}
938	break;
939	}
940	break;
941	} /* switch (ha->current_topology) */
942	}
943
944	if (!found) {
945	switch (vha->hw->current_topology) {
946	case ISP_CFG_F:
947	case ISP_CFG_FL:
948	for (i = 0; i < n; i++) {
949	e = &vha->gnl.l[i];
950	id.b.domain = e->port_id[0];
951	id.b.area = e->port_id[1];
952	id.b.al_pa = e->port_id[2];
953	id.b.rsvd_1 = 0;
954	loop_id = le16_to_cpu(e->nport_handle);
955
956	if (fcport->d_id.b24 == id.b24) {
957	conflict_fcport =
958	qla2x00_find_fcport_by_wwpn(vha,
959	e->port_name, 0);
960	if (conflict_fcport) {
961	ql_dbg(ql_dbg_disc + ql_dbg_verbose,
962	vha, 0x20e5,
963	fmt: "%s %d %8phC post del sess\n",
964	__func__, __LINE__,
965	conflict_fcport->port_name);
966	qlt_schedule_sess_for_deletion
967	(conflict_fcport);
968	}
969	}
970	/*
971	* FW already picked this loop id for
972	* another fcport
973	*/
974	if (fcport->loop_id == loop_id)
975	fcport->loop_id = FC_NO_LOOP_ID;
976	}
977	qla24xx_fcport_handle_login(vha, fcport);
978	break;
979	case ISP_CFG_N:
980	qla2x00_set_fcport_disc_state(fcport, state: DSC_DELETED);
981	if (time_after_eq(jiffies, fcport->dm_login_expire)) {
982	if (fcport->n2n_link_reset_cnt < 2) {
983	fcport->n2n_link_reset_cnt++;
984	/*
985	* remote port is not sending PLOGI.
986	* Reset link to kick start his state
987	* machine
988	*/
989	set_bit(N2N_LINK_RESET,
990	addr: &vha->dpc_flags);
991	} else {
992	if (fcport->n2n_chip_reset < 1) {
993	ql_log(ql_log_info, vha, 0x705d,
994	fmt: "Chip reset to bring laser down");
995	set_bit(ISP_ABORT_NEEDED,
996	addr: &vha->dpc_flags);
997	fcport->n2n_chip_reset++;
998	} else {
999	ql_log(ql_log_info, vha, 0x705d,
1000	fmt: "Remote port %8ph is not coming back\n",
1001	fcport->port_name);
1002	fcport->scan_state = 0;
1003	}
1004	}
1005	qla2xxx_wake_dpc(vha);
1006	} else {
1007	/*
1008	* report port suppose to do PLOGI. Give him
1009	* more time. FW will catch it.
1010	*/
1011	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1012	}
1013	break;
1014	case ISP_CFG_NL:
1015	qla24xx_fcport_handle_login(vha, fcport);
1016	break;
1017	default:
1018	break;
1019	}
1020	}
1021	} /* gnl_event */
1022
1023	static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
1024	{
1025	struct scsi_qla_host *vha = sp->vha;
1026	unsigned long flags;
1027	struct fc_port *fcport = NULL, *tf;
1028	u16 i, n = 0, loop_id;
1029	struct event_arg ea;
1030	struct get_name_list_extended *e;
1031	u64 wwn;
1032	struct list_head h;
1033	bool found = false;
1034
1035	ql_dbg(ql_dbg_disc, vha, 0x20e7,
1036	fmt: "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
1037	sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
1038	sp->u.iocb_cmd.u.mbx.in_mb[2]);
1039
1040
1041	sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
1042	memset(&ea, 0, sizeof(ea));
1043	ea.sp = sp;
1044	ea.rc = res;
1045
1046	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
1047	sizeof(struct get_name_list_extended)) {
1048	n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1049	sizeof(struct get_name_list_extended);
1050	ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1051	}
1052
1053	for (i = 0; i < n; i++) {
1054	e = &vha->gnl.l[i];
1055	loop_id = le16_to_cpu(e->nport_handle);
1056	/* mask out reserve bit */
1057	loop_id = (loop_id & 0x7fff);
1058	set_bit(nr: loop_id, addr: vha->hw->loop_id_map);
1059	wwn = wwn_to_u64(wwn: e->port_name);
1060
1061	ql_dbg(ql_dbg_disc, vha, 0x20e8,
1062	fmt: "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1063	__func__, &wwn, e->port_id[2], e->port_id[1],
1064	e->port_id[0], e->current_login_state, e->last_login_state,
1065	(loop_id & 0x7fff));
1066	}
1067
1068	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1069
1070	INIT_LIST_HEAD(list: &h);
1071	fcport = tf = NULL;
1072	if (!list_empty(head: &vha->gnl.fcports))
1073	list_splice_init(list: &vha->gnl.fcports, head: &h);
1074	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1075
1076	list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1077	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1078	list_del_init(entry: &fcport->gnl_entry);
1079	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1080	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1081	ea.fcport = fcport;
1082
1083	qla24xx_handle_gnl_done_event(vha, ea: &ea);
1084	}
1085
1086	/* create new fcport if fw has knowledge of new sessions */
1087	for (i = 0; i < n; i++) {
1088	port_id_t id;
1089	u64 wwnn;
1090
1091	e = &vha->gnl.l[i];
1092	wwn = wwn_to_u64(wwn: e->port_name);
1093
1094	found = false;
1095	list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1096	if (!memcmp(p: (u8 *)&wwn, q: fcport->port_name,
1097	WWN_SIZE)) {
1098	found = true;
1099	break;
1100	}
1101	}
1102
1103	id.b.domain = e->port_id[2];
1104	id.b.area = e->port_id[1];
1105	id.b.al_pa = e->port_id[0];
1106	id.b.rsvd_1 = 0;
1107
1108	if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1109	ql_dbg(ql_dbg_disc, vha, 0x2065,
1110	fmt: "%s %d %8phC %06x post new sess\n",
1111	__func__, __LINE__, (u8 *)&wwn, id.b24);
1112	wwnn = wwn_to_u64(wwn: e->node_name);
1113	qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1114	(u8 *)&wwnn, NULL, 0);
1115	}
1116	}
1117
1118	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1119	vha->gnl.sent = 0;
1120	if (!list_empty(head: &vha->gnl.fcports)) {
1121	/* retrigger gnl */
1122	list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1123	gnl_entry) {
1124	list_del_init(entry: &fcport->gnl_entry);
1125	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1126	if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1127	break;
1128	}
1129	}
1130	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1131
1132	/* ref: INIT */
1133	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1134	}
1135
1136	int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1137	{
1138	srb_t *sp;
1139	int rval = QLA_FUNCTION_FAILED;
1140	unsigned long flags;
1141	u16 *mb;
1142
1143	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1144	goto done;
1145
1146	ql_dbg(ql_dbg_disc, vha, 0x20d9,
1147	fmt: "Async-gnlist WWPN %8phC \n", fcport->port_name);
1148
1149	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1150	fcport->flags |= FCF_ASYNC_SENT;
1151	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
1152	fcport->last_rscn_gen = fcport->rscn_gen;
1153	fcport->last_login_gen = fcport->login_gen;
1154
1155	list_add_tail(new: &fcport->gnl_entry, head: &vha->gnl.fcports);
1156	if (vha->gnl.sent) {
1157	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1158	return QLA_SUCCESS;
1159	}
1160	vha->gnl.sent = 1;
1161	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1162
1163	/* ref: INIT */
1164	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1165	if (!sp)
1166	goto done;
1167
1168	sp->type = SRB_MB_IOCB;
1169	sp->name = "gnlist";
1170	sp->gen1 = fcport->rscn_gen;
1171	sp->gen2 = fcport->login_gen;
1172	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1173	done: qla24xx_async_gnl_sp_done);
1174
1175	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1176	mb[0] = MBC_PORT_NODE_NAME_LIST;
1177	mb[1] = BIT_2 | BIT_3;
1178	mb[2] = MSW(vha->gnl.ldma);
1179	mb[3] = LSW(vha->gnl.ldma);
1180	mb[6] = MSW(MSD(vha->gnl.ldma));
1181	mb[7] = LSW(MSD(vha->gnl.ldma));
1182	mb[8] = vha->gnl.size;
1183	mb[9] = vha->vp_idx;
1184
1185	ql_dbg(ql_dbg_disc, vha, 0x20da,
1186	fmt: "Async-%s - OUT WWPN %8phC hndl %x\n",
1187	sp->name, fcport->port_name, sp->handle);
1188
1189	rval = qla2x00_start_sp(sp);
1190	if (rval != QLA_SUCCESS)
1191	goto done_free_sp;
1192
1193	return rval;
1194
1195	done_free_sp:
1196	/*
1197	* use qla24xx_async_gnl_sp_done to purge all pending gnl request.
1198	* kref_put is call behind the scene.
1199	*/
1200	sp->u.iocb_cmd.u.mbx.in_mb[0] = MBS_COMMAND_ERROR;
1201	qla24xx_async_gnl_sp_done(sp, QLA_COMMAND_ERROR);
1202	fcport->flags &= ~(FCF_ASYNC_SENT);
1203	done:
1204	fcport->flags &= ~(FCF_ASYNC_ACTIVE);
1205	return rval;
1206	}
1207
1208	int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1209	{
1210	struct qla_work_evt *e;
1211
1212	e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1213	if (!e)
1214	return QLA_FUNCTION_FAILED;
1215
1216	e->u.fcport.fcport = fcport;
1217	fcport->flags |= FCF_ASYNC_ACTIVE;
1218	return qla2x00_post_work(vha, e);
1219	}
1220
1221	static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1222	{
1223	struct scsi_qla_host *vha = sp->vha;
1224	struct qla_hw_data *ha = vha->hw;
1225	fc_port_t *fcport = sp->fcport;
1226	u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1227	struct event_arg ea;
1228
1229	ql_dbg(ql_dbg_disc, vha, 0x20db,
1230	fmt: "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1231	sp->name, res, fcport->port_name, mb[1], mb[2]);
1232
1233	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1234
1235	if (res == QLA_FUNCTION_TIMEOUT)
1236	goto done;
1237
1238	memset(&ea, 0, sizeof(ea));
1239	ea.fcport = fcport;
1240	ea.sp = sp;
1241
1242	qla24xx_handle_gpdb_event(vha, ea: &ea);
1243
1244	done:
1245	dma_pool_free(pool: ha->s_dma_pool, vaddr: sp->u.iocb_cmd.u.mbx.in,
1246	addr: sp->u.iocb_cmd.u.mbx.in_dma);
1247
1248	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1249	}
1250
1251	int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1252	{
1253	struct qla_work_evt *e;
1254
1255	if (vha->host->active_mode == MODE_TARGET)
1256	return QLA_FUNCTION_FAILED;
1257
1258	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1259	if (!e)
1260	return QLA_FUNCTION_FAILED;
1261
1262	e->u.fcport.fcport = fcport;
1263
1264	return qla2x00_post_work(vha, e);
1265	}
1266
1267	static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1268	{
1269	struct scsi_qla_host *vha = sp->vha;
1270	struct srb_iocb *lio = &sp->u.iocb_cmd;
1271	struct event_arg ea;
1272
1273	ql_dbg(ql_dbg_disc, vha, 0x2129,
1274	fmt: "%s %8phC res %x\n", __func__,
1275	sp->fcport->port_name, res);
1276
1277	sp->fcport->flags &= ~FCF_ASYNC_SENT;
1278
1279	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1280	memset(&ea, 0, sizeof(ea));
1281	ea.fcport = sp->fcport;
1282	ea.data[0] = lio->u.logio.data[0];
1283	ea.data[1] = lio->u.logio.data[1];
1284	ea.iop[0] = lio->u.logio.iop[0];
1285	ea.iop[1] = lio->u.logio.iop[1];
1286	ea.sp = sp;
1287	if (res == QLA_OS_TIMER_EXPIRED)
1288	ea.data[0] = QLA_OS_TIMER_EXPIRED;
1289	else if (res)
1290	ea.data[0] = MBS_COMMAND_ERROR;
1291
1292	qla24xx_handle_prli_done_event(vha, &ea);
1293	}
1294
1295	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1296	}
1297
1298	int
1299	qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1300	{
1301	srb_t *sp;
1302	struct srb_iocb *lio;
1303	int rval = QLA_FUNCTION_FAILED;
1304
1305	if (!vha->flags.online) {
1306	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s %d %8phC exit\n",
1307	__func__, __LINE__, fcport->port_name);
1308	return rval;
1309	}
1310
1311	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1312	fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1313	qla_dual_mode_enabled(ha: vha)) {
1314	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s %d %8phC exit\n",
1315	__func__, __LINE__, fcport->port_name);
1316	return rval;
1317	}
1318
1319	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1320	if (!sp)
1321	return rval;
1322
1323	fcport->flags |= FCF_ASYNC_SENT;
1324	fcport->logout_completed = 0;
1325
1326	sp->type = SRB_PRLI_CMD;
1327	sp->name = "prli";
1328	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1329	done: qla2x00_async_prli_sp_done);
1330
1331	lio = &sp->u.iocb_cmd;
1332	lio->u.logio.flags = 0;
1333
1334	if (NVME_TARGET(vha->hw, fcport))
1335	lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1336
1337	ql_dbg(ql_dbg_disc, vha, 0x211b,
1338	fmt: "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1339	fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1340	fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1341	NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1342
1343	rval = qla2x00_start_sp(sp);
1344	if (rval != QLA_SUCCESS) {
1345	fcport->flags |= FCF_LOGIN_NEEDED;
1346	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1347	goto done_free_sp;
1348	}
1349
1350	return rval;
1351
1352	done_free_sp:
1353	/* ref: INIT */
1354	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1355	fcport->flags &= ~FCF_ASYNC_SENT;
1356	return rval;
1357	}
1358
1359	int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1360	{
1361	struct qla_work_evt *e;
1362
1363	e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1364	if (!e)
1365	return QLA_FUNCTION_FAILED;
1366
1367	e->u.fcport.fcport = fcport;
1368	e->u.fcport.opt = opt;
1369	fcport->flags |= FCF_ASYNC_ACTIVE;
1370	return qla2x00_post_work(vha, e);
1371	}
1372
1373	int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1374	{
1375	srb_t *sp;
1376	struct srb_iocb *mbx;
1377	int rval = QLA_FUNCTION_FAILED;
1378	u16 *mb;
1379	dma_addr_t pd_dma;
1380	struct port_database_24xx *pd;
1381	struct qla_hw_data *ha = vha->hw;
1382
1383	if (IS_SESSION_DELETED(fcport)) {
1384	ql_log(ql_log_warn, vha, 0xffff,
1385	fmt: "%s: %8phC is being delete - not sending command.\n",
1386	__func__, fcport->port_name);
1387	fcport->flags &= ~FCF_ASYNC_ACTIVE;
1388	return rval;
1389	}
1390
1391	if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1392	ql_log(ql_log_warn, vha, 0xffff,
1393	fmt: "%s: %8phC online %d flags %x - not sending command.\n",
1394	__func__, fcport->port_name, vha->flags.online, fcport->flags);
1395	goto done;
1396	}
1397
1398	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1399	if (!sp)
1400	goto done;
1401
1402	qla2x00_set_fcport_disc_state(fcport, state: DSC_GPDB);
1403
1404	fcport->flags |= FCF_ASYNC_SENT;
1405	sp->type = SRB_MB_IOCB;
1406	sp->name = "gpdb";
1407	sp->gen1 = fcport->rscn_gen;
1408	sp->gen2 = fcport->login_gen;
1409	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha) + 2,
1410	done: qla24xx_async_gpdb_sp_done);
1411
1412	pd = dma_pool_zalloc(pool: ha->s_dma_pool, GFP_KERNEL, handle: &pd_dma);
1413	if (pd == NULL) {
1414	ql_log(ql_log_warn, vha, 0xd043,
1415	fmt: "Failed to allocate port database structure.\n");
1416	goto done_free_sp;
1417	}
1418
1419	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1420	mb[0] = MBC_GET_PORT_DATABASE;
1421	mb[1] = fcport->loop_id;
1422	mb[2] = MSW(pd_dma);
1423	mb[3] = LSW(pd_dma);
1424	mb[6] = MSW(MSD(pd_dma));
1425	mb[7] = LSW(MSD(pd_dma));
1426	mb[9] = vha->vp_idx;
1427	mb[10] = opt;
1428
1429	mbx = &sp->u.iocb_cmd;
1430	mbx->u.mbx.in = (void *)pd;
1431	mbx->u.mbx.in_dma = pd_dma;
1432
1433	ql_dbg(ql_dbg_disc, vha, 0x20dc,
1434	fmt: "Async-%s %8phC hndl %x opt %x\n",
1435	sp->name, fcport->port_name, sp->handle, opt);
1436
1437	rval = qla2x00_start_sp(sp);
1438	if (rval != QLA_SUCCESS)
1439	goto done_free_sp;
1440	return rval;
1441
1442	done_free_sp:
1443	if (pd)
1444	dma_pool_free(pool: ha->s_dma_pool, vaddr: pd, addr: pd_dma);
1445
1446	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
1447	fcport->flags &= ~FCF_ASYNC_SENT;
1448	done:
1449	fcport->flags &= ~FCF_ASYNC_ACTIVE;
1450	qla24xx_post_gpdb_work(vha, fcport, opt);
1451	return rval;
1452	}
1453
1454	static
1455	void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1456	{
1457	unsigned long flags;
1458
1459	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1460	ea->fcport->login_gen++;
1461	ea->fcport->logout_on_delete = 1;
1462
1463	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1464	vha->fcport_count++;
1465	ea->fcport->login_succ = 1;
1466
1467	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1468	qla24xx_sched_upd_fcport(ea->fcport);
1469	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1470	} else if (ea->fcport->login_succ) {
1471	/*
1472	* We have an existing session. A late RSCN delivery
1473	* must have triggered the session to be re-validate.
1474	* Session is still valid.
1475	*/
1476	ql_dbg(ql_dbg_disc, vha, 0x20d6,
1477	fmt: "%s %d %8phC session revalidate success\n",
1478	__func__, __LINE__, ea->fcport->port_name);
1479	qla2x00_set_fcport_disc_state(fcport: ea->fcport, state: DSC_LOGIN_COMPLETE);
1480	}
1481	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
1482	}
1483
1484	static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1485	struct port_database_24xx *pd)
1486	{
1487	int rc = 0;
1488
1489	if (pd->secure_login) {
1490	ql_dbg(ql_dbg_disc, vha, 0x104d,
1491	fmt: "Secure Login established on %8phC\n",
1492	fcport->port_name);
1493	fcport->flags |= FCF_FCSP_DEVICE;
1494	} else {
1495	ql_dbg(ql_dbg_disc, vha, 0x104d,
1496	fmt: "non-Secure Login %8phC",
1497	fcport->port_name);
1498	fcport->flags &= ~FCF_FCSP_DEVICE;
1499	}
1500	if (vha->hw->flags.edif_enabled) {
1501	if (fcport->flags & FCF_FCSP_DEVICE) {
1502	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_AUTH_PEND);
1503	/* Start edif prli timer & ring doorbell for app */
1504	fcport->edif.rx_sa_set = 0;
1505	fcport->edif.tx_sa_set = 0;
1506	fcport->edif.rx_sa_pending = 0;
1507	fcport->edif.tx_sa_pending = 0;
1508
1509	qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1510	fcport->d_id.b24);
1511
1512	if (DBELL_ACTIVE(vha)) {
1513	ql_dbg(ql_dbg_disc, vha, 0x20ef,
1514	fmt: "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1515	__func__, __LINE__, fcport->port_name);
1516	fcport->edif.app_sess_online = 1;
1517
1518	qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1519	data: fcport->d_id.b24, data2: 0, fcport);
1520	}
1521
1522	rc = 1;
1523	} else if (qla_ini_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha)) {
1524	ql_dbg(ql_dbg_disc, vha, 0x2117,
1525	fmt: "%s %d %8phC post prli\n",
1526	__func__, __LINE__, fcport->port_name);
1527	qla24xx_post_prli_work(vha, fcport);
1528	rc = 1;
1529	}
1530	}
1531	return rc;
1532	}
1533
1534	static
1535	void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1536	{
1537	fc_port_t *fcport = ea->fcport;
1538	struct port_database_24xx *pd;
1539	struct srb *sp = ea->sp;
1540	uint8_t ls;
1541
1542	pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1543
1544	fcport->flags &= ~FCF_ASYNC_SENT;
1545
1546	ql_dbg(ql_dbg_disc, vha, 0x20d2,
1547	fmt: "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1548	fcport->port_name, fcport->disc_state, pd->current_login_state,
1549	fcport->fc4_type, ea->rc);
1550
1551	if (fcport->disc_state == DSC_DELETE_PEND) {
1552	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC\n",
1553	__func__, __LINE__, fcport->port_name);
1554	return;
1555	}
1556
1557	if (NVME_TARGET(vha->hw, fcport))
1558	ls = pd->current_login_state >> 4;
1559	else
1560	ls = pd->current_login_state & 0xf;
1561
1562	if (ea->sp->gen2 != fcport->login_gen) {
1563	/* target side must have changed it. */
1564
1565	ql_dbg(ql_dbg_disc, vha, 0x20d3,
1566	fmt: "%s %8phC generation changed\n",
1567	__func__, fcport->port_name);
1568	return;
1569	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1570	qla_rscn_replay(fcport);
1571	qlt_schedule_sess_for_deletion(fcport);
1572	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1573	__func__, __LINE__, fcport->port_name, ls);
1574	return;
1575	}
1576
1577	switch (ls) {
1578	case PDS_PRLI_COMPLETE:
1579	__qla24xx_parse_gpdb(vha, fcport, pd);
1580	break;
1581	case PDS_PLOGI_COMPLETE:
1582	if (qla_chk_secure_login(vha, fcport, pd)) {
1583	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1584	__func__, __LINE__, fcport->port_name, ls);
1585	return;
1586	}
1587	fallthrough;
1588	case PDS_PLOGI_PENDING:
1589	case PDS_PRLI_PENDING:
1590	case PDS_PRLI2_PENDING:
1591	/* Set discovery state back to GNL to Relogin attempt */
1592	if (qla_dual_mode_enabled(ha: vha) ||
1593	qla_ini_mode_enabled(ha: vha)) {
1594	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
1595	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1596	}
1597	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC, ls %x\n",
1598	__func__, __LINE__, fcport->port_name, ls);
1599	return;
1600	case PDS_LOGO_PENDING:
1601	case PDS_PORT_UNAVAILABLE:
1602	default:
1603	ql_dbg(ql_dbg_disc, vha, 0x20d5, fmt: "%s %d %8phC post del sess\n",
1604	__func__, __LINE__, fcport->port_name);
1605	qlt_schedule_sess_for_deletion(fcport);
1606	return;
1607	}
1608	__qla24xx_handle_gpdb_event(vha, ea);
1609	} /* gpdb event */
1610
1611	static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1612	{
1613	u8 login = 0;
1614	int rc;
1615
1616	ql_dbg(ql_dbg_disc, vha, 0x307b,
1617	fmt: "%s %8phC DS %d LS %d lid %d retries=%d\n",
1618	__func__, fcport->port_name, fcport->disc_state,
1619	fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1620
1621	if (qla_tgt_mode_enabled(ha: vha))
1622	return;
1623
1624	if (qla_dual_mode_enabled(ha: vha)) {
1625	if (N2N_TOPO(vha->hw)) {
1626	u64 mywwn, wwn;
1627
1628	mywwn = wwn_to_u64(wwn: vha->port_name);
1629	wwn = wwn_to_u64(wwn: fcport->port_name);
1630	if (mywwn > wwn)
1631	login = 1;
1632	else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1633	&& time_after_eq(jiffies,
1634	fcport->plogi_nack_done_deadline))
1635	login = 1;
1636	} else {
1637	login = 1;
1638	}
1639	} else {
1640	/* initiator mode */
1641	login = 1;
1642	}
1643
1644	if (login && fcport->login_retry) {
1645	fcport->login_retry--;
1646	if (fcport->loop_id == FC_NO_LOOP_ID) {
1647	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1648	rc = qla2x00_find_new_loop_id(vha, dev: fcport);
1649	if (rc) {
1650	ql_dbg(ql_dbg_disc, vha, 0x20e6,
1651	fmt: "%s %d %8phC post del sess - out of loopid\n",
1652	__func__, __LINE__, fcport->port_name);
1653	fcport->scan_state = 0;
1654	qlt_schedule_sess_for_deletion(fcport);
1655	return;
1656	}
1657	}
1658	ql_dbg(ql_dbg_disc, vha, 0x20bf,
1659	fmt: "%s %d %8phC post login\n",
1660	__func__, __LINE__, fcport->port_name);
1661	qla2x00_post_async_login_work(vha, fcport, NULL);
1662	}
1663	}
1664
1665	int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1666	{
1667	u16 data[2];
1668	u16 sec;
1669
1670	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1671	fmt: "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1672	__func__, fcport->port_name, fcport->disc_state,
1673	fcport->fw_login_state, fcport->login_pause, fcport->flags,
1674	fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1675	fcport->login_gen, fcport->loop_id, fcport->scan_state,
1676	fcport->fc4_type);
1677
1678	if (fcport->scan_state != QLA_FCPORT_FOUND ||
1679	fcport->disc_state == DSC_DELETE_PEND)
1680	return 0;
1681
1682	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1683	qla_dual_mode_enabled(ha: vha) &&
1684	((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1685	(fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1686	return 0;
1687
1688	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1689	!N2N_TOPO(vha->hw)) {
1690	if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1691	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1692	return 0;
1693	}
1694	}
1695
1696	/* Target won't initiate port login if fabric is present */
1697	if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1698	return 0;
1699
1700	if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1701	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1702	return 0;
1703	}
1704
1705	switch (fcport->disc_state) {
1706	case DSC_DELETED:
1707	switch (vha->hw->current_topology) {
1708	case ISP_CFG_N:
1709	if (fcport_is_smaller(fcport)) {
1710	/* this adapter is bigger */
1711	if (fcport->login_retry) {
1712	if (fcport->loop_id == FC_NO_LOOP_ID) {
1713	qla2x00_find_new_loop_id(vha,
1714	dev: fcport);
1715	fcport->fw_login_state =
1716	DSC_LS_PORT_UNAVAIL;
1717	}
1718	fcport->login_retry--;
1719	qla_post_els_plogi_work(vha, fcport);
1720	} else {
1721	ql_log(ql_log_info, vha, 0x705d,
1722	fmt: "Unable to reach remote port %8phC",
1723	fcport->port_name);
1724	}
1725	} else {
1726	qla24xx_post_gnl_work(vha, fcport);
1727	}
1728	break;
1729	default:
1730	if (fcport->loop_id == FC_NO_LOOP_ID) {
1731	ql_dbg(ql_dbg_disc, vha, 0x20bd,
1732	fmt: "%s %d %8phC post gnl\n",
1733	__func__, __LINE__, fcport->port_name);
1734	qla24xx_post_gnl_work(vha, fcport);
1735	} else {
1736	qla_chk_n2n_b4_login(vha, fcport);
1737	}
1738	break;
1739	}
1740	break;
1741
1742	case DSC_GNL:
1743	switch (vha->hw->current_topology) {
1744	case ISP_CFG_N:
1745	if ((fcport->current_login_state & 0xf) == 0x6) {
1746	ql_dbg(ql_dbg_disc, vha, 0x2118,
1747	fmt: "%s %d %8phC post GPDB work\n",
1748	__func__, __LINE__, fcport->port_name);
1749	fcport->chip_reset =
1750	vha->hw->base_qpair->chip_reset;
1751	qla24xx_post_gpdb_work(vha, fcport, opt: 0);
1752	} else {
1753	ql_dbg(ql_dbg_disc, vha, 0x2118,
1754	fmt: "%s %d %8phC post %s PRLI\n",
1755	__func__, __LINE__, fcport->port_name,
1756	NVME_TARGET(vha->hw, fcport) ? "NVME" :
1757	"FC");
1758	qla24xx_post_prli_work(vha, fcport);
1759	}
1760	break;
1761	default:
1762	if (fcport->login_pause) {
1763	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1764	fmt: "%s %d %8phC exit\n",
1765	__func__, __LINE__,
1766	fcport->port_name);
1767	fcport->last_rscn_gen = fcport->rscn_gen;
1768	fcport->last_login_gen = fcport->login_gen;
1769	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1770	break;
1771	}
1772	qla_chk_n2n_b4_login(vha, fcport);
1773	break;
1774	}
1775	break;
1776
1777	case DSC_LOGIN_FAILED:
1778	if (N2N_TOPO(vha->hw))
1779	qla_chk_n2n_b4_login(vha, fcport);
1780	else
1781	qlt_schedule_sess_for_deletion(fcport);
1782	break;
1783
1784	case DSC_LOGIN_COMPLETE:
1785	/* recheck login state */
1786	data[0] = data[1] = 0;
1787	qla2x00_post_async_adisc_work(vha, fcport, data);
1788	break;
1789
1790	case DSC_LOGIN_PEND:
1791	if (vha->hw->flags.edif_enabled)
1792	break;
1793
1794	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1795	ql_dbg(ql_dbg_disc, vha, 0x2118,
1796	fmt: "%s %d %8phC post %s PRLI\n",
1797	__func__, __LINE__, fcport->port_name,
1798	NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
1799	qla24xx_post_prli_work(vha, fcport);
1800	}
1801	break;
1802
1803	case DSC_UPD_FCPORT:
1804	sec = jiffies_to_msecs(j: jiffies -
1805	fcport->jiffies_at_registration)/1000;
1806	if (fcport->sec_since_registration < sec && sec &&
1807	!(sec % 60)) {
1808	fcport->sec_since_registration = sec;
1809	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0xffff,
1810	fmt: "%s %8phC - Slow Rport registration(%d Sec)\n",
1811	__func__, fcport->port_name, sec);
1812	}
1813
1814	if (fcport->next_disc_state != DSC_DELETE_PEND)
1815	fcport->next_disc_state = DSC_ADISC;
1816	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
1817	break;
1818
1819	default:
1820	break;
1821	}
1822
1823	return 0;
1824	}
1825
1826	int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1827	u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1828	{
1829	struct qla_work_evt *e;
1830
1831	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1832	if (!e)
1833	return QLA_FUNCTION_FAILED;
1834
1835	e->u.new_sess.id = *id;
1836	e->u.new_sess.pla = pla;
1837	e->u.new_sess.fc4_type = fc4_type;
1838	memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1839	if (node_name)
1840	memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1841
1842	return qla2x00_post_work(vha, e);
1843	}
1844
1845	static void qla_rscn_gen_tick(scsi_qla_host_t *vha, u32 *ret_rscn_gen)
1846	{
1847	*ret_rscn_gen = atomic_inc_return(v: &vha->rscn_gen);
1848	/* memory barrier */
1849	wmb();
1850	}
1851
1852	void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1853	{
1854	fc_port_t *fcport;
1855	unsigned long flags;
1856	u32 rscn_gen;
1857
1858	switch (ea->id.b.rsvd_1) {
1859	case RSCN_PORT_ADDR:
1860	fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1861	if (fcport) {
1862	if (ql2xfc2target &&
1863	fcport->flags & FCF_FCP2_DEVICE &&
1864	atomic_read(v: &fcport->state) == FCS_ONLINE) {
1865	ql_dbg(ql_dbg_disc, vha, 0x2115,
1866	fmt: "Delaying session delete for FCP2 portid=%06x %8phC ",
1867	fcport->d_id.b24, fcport->port_name);
1868	return;
1869	}
1870
1871	if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
1872	/*
1873	* On ipsec start by remote port, Target port
1874	* may use RSCN to trigger initiator to
1875	* relogin. If driver is already in the
1876	* process of a relogin, then ignore the RSCN
1877	* and allow the current relogin to continue.
1878	* This reduces thrashing of the connection.
1879	*/
1880	if (atomic_read(v: &fcport->state) == FCS_ONLINE) {
1881	/*
1882	* If state = online, then set scan_needed=1 to do relogin.
1883	* Otherwise we're already in the middle of a relogin
1884	*/
1885	fcport->scan_needed = 1;
1886	qla_rscn_gen_tick(vha, ret_rscn_gen: &fcport->rscn_gen);
1887	}
1888	} else {
1889	fcport->scan_needed = 1;
1890	qla_rscn_gen_tick(vha, ret_rscn_gen: &fcport->rscn_gen);
1891	}
1892	}
1893	break;
1894	case RSCN_AREA_ADDR:
1895	qla_rscn_gen_tick(vha, ret_rscn_gen: &rscn_gen);
1896	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1897	if (fcport->flags & FCF_FCP2_DEVICE &&
1898	atomic_read(v: &fcport->state) == FCS_ONLINE)
1899	continue;
1900
1901	if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1902	fcport->scan_needed = 1;
1903	fcport->rscn_gen = rscn_gen;
1904	}
1905	}
1906	break;
1907	case RSCN_DOM_ADDR:
1908	qla_rscn_gen_tick(vha, ret_rscn_gen: &rscn_gen);
1909	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1910	if (fcport->flags & FCF_FCP2_DEVICE &&
1911	atomic_read(v: &fcport->state) == FCS_ONLINE)
1912	continue;
1913
1914	if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1915	fcport->scan_needed = 1;
1916	fcport->rscn_gen = rscn_gen;
1917	}
1918	}
1919	break;
1920	case RSCN_FAB_ADDR:
1921	default:
1922	qla_rscn_gen_tick(vha, ret_rscn_gen: &rscn_gen);
1923	list_for_each_entry(fcport, &vha->vp_fcports, list) {
1924	if (fcport->flags & FCF_FCP2_DEVICE &&
1925	atomic_read(v: &fcport->state) == FCS_ONLINE)
1926	continue;
1927
1928	fcport->scan_needed = 1;
1929	fcport->rscn_gen = rscn_gen;
1930	}
1931	break;
1932	}
1933
1934	spin_lock_irqsave(&vha->work_lock, flags);
1935	if (vha->scan.scan_flags == 0) {
1936	ql_dbg(ql_dbg_disc, vha, 0xffff, fmt: "%s: schedule\n", __func__);
1937	vha->scan.scan_flags |= SF_QUEUED;
1938	vha->scan.rscn_gen_start = atomic_read(v: &vha->rscn_gen);
1939	schedule_delayed_work(dwork: &vha->scan.scan_work, delay: 5);
1940	}
1941	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
1942	}
1943
1944	void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1945	struct event_arg *ea)
1946	{
1947	fc_port_t *fcport = ea->fcport;
1948
1949	if (test_bit(UNLOADING, &vha->dpc_flags))
1950	return;
1951
1952	ql_dbg(ql_dbg_disc, vha, 0x2102,
1953	fmt: "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1954	__func__, fcport->port_name, fcport->disc_state,
1955	fcport->fw_login_state, fcport->login_pause,
1956	fcport->deleted, fcport->conflict,
1957	fcport->last_rscn_gen, fcport->rscn_gen,
1958	fcport->last_login_gen, fcport->login_gen,
1959	fcport->flags);
1960
1961	if (fcport->last_rscn_gen != fcport->rscn_gen) {
1962	ql_dbg(ql_dbg_disc, vha, 0x20e9, fmt: "%s %d %8phC post gnl\n",
1963	__func__, __LINE__, fcport->port_name);
1964	qla24xx_post_gnl_work(vha, fcport);
1965	return;
1966	}
1967
1968	qla24xx_fcport_handle_login(vha, fcport);
1969	}
1970
1971	void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1972	struct event_arg *ea)
1973	{
1974	if (N2N_TOPO(vha->hw) && fcport_is_smaller(fcport: ea->fcport) &&
1975	vha->hw->flags.edif_enabled) {
1976	/* check to see if App support Secure */
1977	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
1978	return;
1979	}
1980
1981	/* for pure Target Mode, PRLI will not be initiated */
1982	if (vha->host->active_mode == MODE_TARGET)
1983	return;
1984
1985	ql_dbg(ql_dbg_disc, vha, 0x2118,
1986	fmt: "%s %d %8phC post PRLI\n",
1987	__func__, __LINE__, ea->fcport->port_name);
1988	qla24xx_post_prli_work(vha, fcport: ea->fcport);
1989	}
1990
1991	/*
1992	* RSCN(s) came in for this fcport, but the RSCN(s) was not able
1993	* to be consumed by the fcport
1994	*/
1995	void qla_rscn_replay(fc_port_t *fcport)
1996	{
1997	struct event_arg ea;
1998
1999	switch (fcport->disc_state) {
2000	case DSC_DELETE_PEND:
2001	return;
2002	default:
2003	break;
2004	}
2005
2006	if (fcport->scan_needed) {
2007	memset(&ea, 0, sizeof(ea));
2008	ea.id = fcport->d_id;
2009	ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
2010	qla2x00_handle_rscn(vha: fcport->vha, ea: &ea);
2011	}
2012	}
2013
2014	static void
2015	qla2x00_tmf_iocb_timeout(void *data)
2016	{
2017	srb_t *sp = data;
2018	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2019	int rc, h;
2020	unsigned long flags;
2021
2022	if (sp->type == SRB_MARKER)
2023	rc = QLA_FUNCTION_FAILED;
2024	else
2025	rc = qla24xx_async_abort_cmd(cmd_sp: sp, wait: false);
2026
2027	if (rc) {
2028	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
2029	for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
2030	if (sp->qpair->req->outstanding_cmds[h] == sp) {
2031	sp->qpair->req->outstanding_cmds[h] = NULL;
2032	qla_put_fw_resources(qp: sp->qpair, iores: &sp->iores);
2033	break;
2034	}
2035	}
2036	spin_unlock_irqrestore(lock: sp->qpair->qp_lock_ptr, flags);
2037	tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
2038	tmf->u.tmf.data = QLA_FUNCTION_FAILED;
2039	complete(&tmf->u.tmf.comp);
2040	}
2041	}
2042
2043	static void qla_marker_sp_done(srb_t *sp, int res)
2044	{
2045	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2046
2047	if (res != QLA_SUCCESS)
2048	ql_dbg(ql_dbg_taskm, vha: sp->vha, 0x8004,
2049	fmt: "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n",
2050	sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags,
2051	sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id);
2052
2053	sp->u.iocb_cmd.u.tmf.data = res;
2054	complete(&tmf->u.tmf.comp);
2055	}
2056
2057	#define START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \
2058	{\
2059	int cnt = 5; \
2060	do { \
2061	if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\
2062	_rval = EINVAL; \
2063	break; \
2064	} \
2065	_rval = qla2x00_start_sp(_sp); \
2066	if (_rval == EAGAIN) \
2067	msleep(1); \
2068	else \
2069	break; \
2070	cnt--; \
2071	} while (cnt); \
2072	}
2073
2074	/**
2075	* qla26xx_marker: send marker IOCB and wait for the completion of it.
2076	* @arg: pointer to argument list.
2077	* It is assume caller will provide an fcport pointer and modifier
2078	*/
2079	static int
2080	qla26xx_marker(struct tmf_arg *arg)
2081	{
2082	struct scsi_qla_host *vha = arg->vha;
2083	struct srb_iocb *tm_iocb;
2084	srb_t *sp;
2085	int rval = QLA_FUNCTION_FAILED;
2086	fc_port_t *fcport = arg->fcport;
2087	u32 chip_gen, login_gen;
2088
2089	if (TMF_NOT_READY(arg->fcport)) {
2090	ql_dbg(ql_dbg_taskm, vha, 0x8039,
2091	fmt: "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2092	fcport->loop_id, fcport->d_id.b24,
2093	arg->modifier, arg->lun, arg->qpair->id);
2094	return QLA_SUSPENDED;
2095	}
2096
2097	chip_gen = vha->hw->chip_reset;
2098	login_gen = fcport->login_gen;
2099
2100	/* ref: INIT */
2101	sp = qla2xxx_get_qpair_sp(vha, qpair: arg->qpair, fcport, GFP_KERNEL);
2102	if (!sp)
2103	goto done;
2104
2105	sp->type = SRB_MARKER;
2106	sp->name = "marker";
2107	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha), done: qla_marker_sp_done);
2108	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2109
2110	tm_iocb = &sp->u.iocb_cmd;
2111	init_completion(x: &tm_iocb->u.tmf.comp);
2112	tm_iocb->u.tmf.modifier = arg->modifier;
2113	tm_iocb->u.tmf.lun = arg->lun;
2114	tm_iocb->u.tmf.loop_id = fcport->loop_id;
2115	tm_iocb->u.tmf.vp_index = vha->vp_idx;
2116
2117	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2118
2119	ql_dbg(ql_dbg_taskm, vha, 0x8006,
2120	fmt: "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2121	sp->handle, fcport->loop_id, fcport->d_id.b24,
2122	arg->modifier, arg->lun, sp->qpair->id, rval);
2123
2124	if (rval != QLA_SUCCESS) {
2125	ql_log(ql_log_warn, vha, 0x8031,
2126	fmt: "Marker IOCB send failure (%x).\n", rval);
2127	goto done_free_sp;
2128	}
2129
2130	wait_for_completion(&tm_iocb->u.tmf.comp);
2131	rval = tm_iocb->u.tmf.data;
2132
2133	if (rval != QLA_SUCCESS) {
2134	ql_log(ql_log_warn, vha, 0x8019,
2135	fmt: "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2136	sp->handle, fcport->loop_id, fcport->d_id.b24,
2137	arg->modifier, arg->lun, sp->qpair->id, rval);
2138	}
2139
2140	done_free_sp:
2141	/* ref: INIT */
2142	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
2143	done:
2144	return rval;
2145	}
2146
2147	static void qla2x00_tmf_sp_done(srb_t *sp, int res)
2148	{
2149	struct srb_iocb *tmf = &sp->u.iocb_cmd;
2150
2151	if (res)
2152	tmf->u.tmf.data = res;
2153	complete(&tmf->u.tmf.comp);
2154	}
2155
2156	static int qla_tmf_wait(struct tmf_arg *arg)
2157	{
2158	/* there are only 2 types of error handling that reaches here, lun or target reset */
2159	if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET))
2160	return qla2x00_eh_wait_for_pending_commands(arg->vha,
2161	arg->fcport->d_id.b24, arg->lun, WAIT_LUN);
2162	else
2163	return qla2x00_eh_wait_for_pending_commands(arg->vha,
2164	arg->fcport->d_id.b24, arg->lun, WAIT_TARGET);
2165	}
2166
2167	static int
2168	__qla2x00_async_tm_cmd(struct tmf_arg *arg)
2169	{
2170	struct scsi_qla_host *vha = arg->vha;
2171	struct srb_iocb *tm_iocb;
2172	srb_t *sp;
2173	int rval = QLA_FUNCTION_FAILED;
2174	fc_port_t *fcport = arg->fcport;
2175	u32 chip_gen, login_gen;
2176	u64 jif;
2177
2178	if (TMF_NOT_READY(arg->fcport)) {
2179	ql_dbg(ql_dbg_taskm, vha, 0x8032,
2180	fmt: "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2181	fcport->loop_id, fcport->d_id.b24,
2182	arg->modifier, arg->lun, arg->qpair->id);
2183	return QLA_SUSPENDED;
2184	}
2185
2186	chip_gen = vha->hw->chip_reset;
2187	login_gen = fcport->login_gen;
2188
2189	/* ref: INIT */
2190	sp = qla2xxx_get_qpair_sp(vha, qpair: arg->qpair, fcport, GFP_KERNEL);
2191	if (!sp)
2192	goto done;
2193
2194	qla_vha_mark_busy(vha);
2195	sp->type = SRB_TM_CMD;
2196	sp->name = "tmf";
2197	qla2x00_init_async_sp(sp, tmo: qla2x00_get_async_timeout(vha),
2198	done: qla2x00_tmf_sp_done);
2199	sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2200
2201	tm_iocb = &sp->u.iocb_cmd;
2202	init_completion(x: &tm_iocb->u.tmf.comp);
2203	tm_iocb->u.tmf.flags = arg->flags;
2204	tm_iocb->u.tmf.lun = arg->lun;
2205
2206	START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2207
2208	ql_dbg(ql_dbg_taskm, vha, 0x802f,
2209	fmt: "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n",
2210	sp->handle, fcport->loop_id, fcport->d_id.b24,
2211	arg->flags, arg->lun, sp->qpair->id, rval);
2212
2213	if (rval != QLA_SUCCESS)
2214	goto done_free_sp;
2215	wait_for_completion(&tm_iocb->u.tmf.comp);
2216
2217	rval = tm_iocb->u.tmf.data;
2218
2219	if (rval != QLA_SUCCESS) {
2220	ql_log(ql_log_warn, vha, 0x8030,
2221	fmt: "TM IOCB failed (%x).\n", rval);
2222	}
2223
2224	if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
2225	jif = jiffies;
2226	if (qla_tmf_wait(arg)) {
2227	ql_log(ql_log_info, vha, 0x803e,
2228	fmt: "Waited %u ms Nexus=%ld:%06x:%llu.\n",
2229	jiffies_to_msecs(j: jiffies - jif), vha->host_no,
2230	fcport->d_id.b24, arg->lun);
2231	}
2232
2233	if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) {
2234	rval = qla26xx_marker(arg);
2235	} else {
2236	ql_log(ql_log_info, vha, 0x803e,
2237	fmt: "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n",
2238	vha->host_no, fcport->d_id.b24, arg->lun);
2239	rval = QLA_FUNCTION_FAILED;
2240	}
2241	}
2242	if (tm_iocb->u.tmf.data)
2243	rval = tm_iocb->u.tmf.data;
2244
2245	done_free_sp:
2246	/* ref: INIT */
2247	kref_put(kref: &sp->cmd_kref, release: qla2x00_sp_release);
2248	done:
2249	return rval;
2250	}
2251
2252	static void qla_put_tmf(struct tmf_arg *arg)
2253	{
2254	struct scsi_qla_host *vha = arg->vha;
2255	struct qla_hw_data *ha = vha->hw;
2256	unsigned long flags;
2257
2258	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2259	ha->active_tmf--;
2260	list_del(entry: &arg->tmf_elem);
2261	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2262	}
2263
2264	static
2265	int qla_get_tmf(struct tmf_arg *arg)
2266	{
2267	struct scsi_qla_host *vha = arg->vha;
2268	struct qla_hw_data *ha = vha->hw;
2269	unsigned long flags;
2270	fc_port_t *fcport = arg->fcport;
2271	int rc = 0;
2272	struct tmf_arg *t;
2273
2274	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2275	list_for_each_entry(t, &ha->tmf_active, tmf_elem) {
2276	if (t->fcport == arg->fcport && t->lun == arg->lun) {
2277	/* reject duplicate TMF */
2278	ql_log(ql_log_warn, vha, 0x802c,
2279	fmt: "found duplicate TMF. Nexus=%ld:%06x:%llu.\n",
2280	vha->host_no, fcport->d_id.b24, arg->lun);
2281	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2282	return -EINVAL;
2283	}
2284	}
2285
2286	list_add_tail(new: &arg->tmf_elem, head: &ha->tmf_pending);
2287	while (ha->active_tmf >= MAX_ACTIVE_TMF) {
2288	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2289
2290	msleep(msecs: 1);
2291
2292	spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2293	if (TMF_NOT_READY(fcport)) {
2294	ql_log(ql_log_warn, vha, 0x802c,
2295	fmt: "Unable to acquire TM resource due to disruption.\n");
2296	rc = EIO;
2297	break;
2298	}
2299	if (ha->active_tmf < MAX_ACTIVE_TMF &&
2300	list_is_first(list: &arg->tmf_elem, head: &ha->tmf_pending))
2301	break;
2302	}
2303
2304	list_del(entry: &arg->tmf_elem);
2305
2306	if (!rc) {
2307	ha->active_tmf++;
2308	list_add_tail(new: &arg->tmf_elem, head: &ha->tmf_active);
2309	}
2310
2311	spin_unlock_irqrestore(lock: &ha->tgt.sess_lock, flags);
2312
2313	return rc;
2314	}
2315
2316	int
2317	qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun,
2318	uint32_t tag)
2319	{
2320	struct scsi_qla_host *vha = fcport->vha;
2321	struct tmf_arg a;
2322	int rval = QLA_SUCCESS;
2323
2324	if (TMF_NOT_READY(fcport))
2325	return QLA_SUSPENDED;
2326
2327	a.vha = fcport->vha;
2328	a.fcport = fcport;
2329	a.lun = lun;
2330	a.flags = flags;
2331	INIT_LIST_HEAD(list: &a.tmf_elem);
2332
2333	if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
2334	a.modifier = MK_SYNC_ID_LUN;
2335	} else {
2336	a.modifier = MK_SYNC_ID;
2337	}
2338
2339	if (qla_get_tmf(arg: &a))
2340	return QLA_FUNCTION_FAILED;
2341
2342	a.qpair = vha->hw->base_qpair;
2343	rval = __qla2x00_async_tm_cmd(arg: &a);
2344
2345	qla_put_tmf(arg: &a);
2346	return rval;
2347	}
2348
2349	int
2350	qla24xx_async_abort_command(srb_t *sp)
2351	{
2352	unsigned long flags = 0;
2353
2354	uint32_t handle;
2355	fc_port_t *fcport = sp->fcport;
2356	struct qla_qpair *qpair = sp->qpair;
2357	struct scsi_qla_host *vha = fcport->vha;
2358	struct req_que *req = qpair->req;
2359
2360	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
2361	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2362	if (req->outstanding_cmds[handle] == sp)
2363	break;
2364	}
2365	spin_unlock_irqrestore(lock: qpair->qp_lock_ptr, flags);
2366
2367	if (handle == req->num_outstanding_cmds) {
2368	/* Command not found. */
2369	return QLA_ERR_NOT_FOUND;
2370	}
2371	if (sp->type == SRB_FXIOCB_DCMD)
2372	return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2373	FXDISC_ABORT_IOCTL);
2374
2375	return qla24xx_async_abort_cmd(cmd_sp: sp, wait: true);
2376	}
2377
2378	static void
2379	qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2380	{
2381	struct srb *sp;
2382	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2383	ea->data[0]);
2384
2385	switch (ea->data[0]) {
2386	case MBS_COMMAND_COMPLETE:
2387	ql_dbg(ql_dbg_disc, vha, 0x2118,
2388	fmt: "%s %d %8phC post gpdb\n",
2389	__func__, __LINE__, ea->fcport->port_name);
2390
2391	ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2392	ea->fcport->logout_on_delete = 1;
2393	ea->fcport->nvme_prli_service_param = ea->iop[0];
2394	if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2395	ea->fcport->nvme_first_burst_size =
2396	(ea->iop[1] & 0xffff) * 512;
2397	else
2398	ea->fcport->nvme_first_burst_size = 0;
2399	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
2400	break;
2401	default:
2402	sp = ea->sp;
2403	ql_dbg(ql_dbg_disc, vha, 0x2118,
2404	fmt: "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2405	__func__, __LINE__, ea->fcport->port_name,
2406	vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2407	"FCP" : "NVMe", ea->fcport->fc4_type,
2408	(sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2409	"NVME" : "FCP");
2410
2411	if (NVME_FCP_TARGET(ea->fcport)) {
2412	if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2413	ea->fcport->do_prli_nvme = 0;
2414	else
2415	ea->fcport->do_prli_nvme = 1;
2416	} else {
2417	ea->fcport->do_prli_nvme = 0;
2418	}
2419
2420	if (N2N_TOPO(vha->hw)) {
2421	if (ea->fcport->n2n_link_reset_cnt ==
2422	vha->hw->login_retry_count &&
2423	ea->fcport->flags & FCF_FCSP_DEVICE) {
2424	/* remote authentication app just started */
2425	ea->fcport->n2n_link_reset_cnt = 0;
2426	}
2427
2428	if (ea->fcport->n2n_link_reset_cnt <
2429	vha->hw->login_retry_count) {
2430	ea->fcport->n2n_link_reset_cnt++;
2431	vha->relogin_jif = jiffies + 2 * HZ;
2432	/*
2433	* PRLI failed. Reset link to kick start
2434	* state machine
2435	*/
2436	set_bit(N2N_LINK_RESET, addr: &vha->dpc_flags);
2437	qla2xxx_wake_dpc(vha);
2438	} else {
2439	ql_log(ql_log_warn, vha, 0x2119,
2440	fmt: "%s %d %8phC Unable to reconnect\n",
2441	__func__, __LINE__,
2442	ea->fcport->port_name);
2443	}
2444	} else {
2445	/*
2446	* switch connect. login failed. Take connection down
2447	* and allow relogin to retrigger
2448	*/
2449	ea->fcport->flags &= ~FCF_ASYNC_SENT;
2450	ea->fcport->keep_nport_handle = 0;
2451	ea->fcport->logout_on_delete = 1;
2452	qlt_schedule_sess_for_deletion(ea->fcport);
2453	}
2454	break;
2455	}
2456	}
2457
2458	void
2459	qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2460	{
2461	port_id_t cid; /* conflict Nport id */
2462	u16 lid;
2463	struct fc_port *conflict_fcport;
2464	unsigned long flags;
2465	struct fc_port *fcport = ea->fcport;
2466
2467	ql_dbg(ql_dbg_disc, vha, 0xffff,
2468	fmt: "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2469	__func__, fcport->port_name, fcport->disc_state,
2470	fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2471	ea->sp->gen1, fcport->rscn_gen,
2472	ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2473
2474	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2475	(fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2476	ql_dbg(ql_dbg_disc, vha, 0x20ea,
2477	fmt: "%s %d %8phC Remote is trying to login\n",
2478	__func__, __LINE__, fcport->port_name);
2479	return;
2480	}
2481
2482	if ((fcport->disc_state == DSC_DELETE_PEND) ||
2483	(fcport->disc_state == DSC_DELETED)) {
2484	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
2485	return;
2486	}
2487
2488	if (ea->sp->gen2 != fcport->login_gen) {
2489	/* target side must have changed it. */
2490	ql_dbg(ql_dbg_disc, vha, 0x20d3,
2491	fmt: "%s %8phC generation changed\n",
2492	__func__, fcport->port_name);
2493	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
2494	return;
2495	} else if (ea->sp->gen1 != fcport->rscn_gen) {
2496	ql_dbg(ql_dbg_disc, vha, 0x20d3,
2497	fmt: "%s %8phC RSCN generation changed\n",
2498	__func__, fcport->port_name);
2499	qla_rscn_replay(fcport);
2500	qlt_schedule_sess_for_deletion(fcport);
2501	return;
2502	}
2503
2504	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2505	ea->data[0]);
2506
2507	switch (ea->data[0]) {
2508	case MBS_COMMAND_COMPLETE:
2509	/*
2510	* Driver must validate login state - If PRLI not complete,
2511	* force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2512	* requests.
2513	*/
2514	if (vha->hw->flags.edif_enabled) {
2515	set_bit(nr: ea->fcport->loop_id, addr: vha->hw->loop_id_map);
2516	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2517	ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2518	ea->fcport->logout_on_delete = 1;
2519	ea->fcport->send_els_logo = 0;
2520	ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2521	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
2522
2523	qla24xx_post_gpdb_work(vha, fcport: ea->fcport, opt: 0);
2524	} else {
2525	if (NVME_TARGET(vha->hw, fcport)) {
2526	ql_dbg(ql_dbg_disc, vha, 0x2117,
2527	fmt: "%s %d %8phC post prli\n",
2528	__func__, __LINE__, fcport->port_name);
2529	qla24xx_post_prli_work(vha, fcport);
2530	} else {
2531	ql_dbg(ql_dbg_disc, vha, 0x20ea,
2532	fmt: "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2533	__func__, __LINE__, fcport->port_name,
2534	fcport->loop_id, fcport->d_id.b24);
2535
2536	set_bit(nr: fcport->loop_id, addr: vha->hw->loop_id_map);
2537	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2538	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2539	fcport->logout_on_delete = 1;
2540	fcport->send_els_logo = 0;
2541	fcport->fw_login_state = DSC_LS_PRLI_COMP;
2542	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
2543
2544	qla24xx_post_gpdb_work(vha, fcport, opt: 0);
2545	}
2546	}
2547	break;
2548	case MBS_COMMAND_ERROR:
2549	ql_dbg(ql_dbg_disc, vha, 0x20eb, fmt: "%s %d %8phC cmd error %x\n",
2550	__func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2551
2552	qlt_schedule_sess_for_deletion(ea->fcport);
2553	break;
2554	case MBS_LOOP_ID_USED:
2555	/* data[1] = IO PARAM 1 = nport ID */
2556	cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2557	cid.b.area = (ea->iop[1] >> 8) & 0xff;
2558	cid.b.al_pa = ea->iop[1] & 0xff;
2559	cid.b.rsvd_1 = 0;
2560
2561	ql_dbg(ql_dbg_disc, vha, 0x20ec,
2562	fmt: "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2563	__func__, __LINE__, ea->fcport->port_name,
2564	ea->fcport->loop_id, cid.b24);
2565
2566	set_bit(nr: ea->fcport->loop_id, addr: vha->hw->loop_id_map);
2567	ea->fcport->loop_id = FC_NO_LOOP_ID;
2568	qla24xx_post_gnl_work(vha, fcport: ea->fcport);
2569	break;
2570	case MBS_PORT_ID_USED:
2571	lid = ea->iop[1] & 0xffff;
2572	qlt_find_sess_invalidate_other(vha,
2573	wwn: wwn_to_u64(wwn: ea->fcport->port_name),
2574	port_id: ea->fcport->d_id, loop_id: lid, &conflict_fcport);
2575
2576	if (conflict_fcport) {
2577	/*
2578	* Another fcport share the same loop_id/nport id.
2579	* Conflict fcport needs to finish cleanup before this
2580	* fcport can proceed to login.
2581	*/
2582	conflict_fcport->conflict = ea->fcport;
2583	ea->fcport->login_pause = 1;
2584
2585	ql_dbg(ql_dbg_disc, vha, 0x20ed,
2586	fmt: "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n",
2587	__func__, __LINE__, ea->fcport->port_name,
2588	ea->fcport->d_id.b24, lid);
2589	} else {
2590	ql_dbg(ql_dbg_disc, vha, 0x20ed,
2591	fmt: "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2592	__func__, __LINE__, ea->fcport->port_name,
2593	ea->fcport->d_id.b24, lid);
2594
2595	qla2x00_clear_loop_id(fcport: ea->fcport);
2596	set_bit(nr: lid, addr: vha->hw->loop_id_map);
2597	ea->fcport->loop_id = lid;
2598	ea->fcport->keep_nport_handle = 0;
2599	ea->fcport->logout_on_delete = 1;
2600	qlt_schedule_sess_for_deletion(ea->fcport);
2601	}
2602	break;
2603	}
2604	return;
2605	}
2606
2607	/****************************************************************************/
2608	/* QLogic ISP2x00 Hardware Support Functions. */
2609	/****************************************************************************/
2610
2611	static int
2612	qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2613	{
2614	int rval = QLA_SUCCESS;
2615	struct qla_hw_data *ha = vha->hw;
2616	uint32_t idc_major_ver, idc_minor_ver;
2617	uint16_t config[4];
2618
2619	qla83xx_idc_lock(vha, 0);
2620
2621	/* SV: TODO: Assign initialization timeout from
2622	* flash-info / other param
2623	*/
2624	ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2625	ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2626
2627	/* Set our fcoe function presence */
2628	if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2629	ql_dbg(ql_dbg_p3p, vha, 0xb077,
2630	fmt: "Error while setting DRV-Presence.\n");
2631	rval = QLA_FUNCTION_FAILED;
2632	goto exit;
2633	}
2634
2635	/* Decide the reset ownership */
2636	qla83xx_reset_ownership(vha);
2637
2638	/*
2639	* On first protocol driver load:
2640	* Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2641	* register.
2642	* Others: Check compatibility with current IDC Major version.
2643	*/
2644	qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2645	if (ha->flags.nic_core_reset_owner) {
2646	/* Set IDC Major version */
2647	idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2648	qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2649
2650	/* Clearing IDC-Lock-Recovery register */
2651	qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2652	} else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2653	/*
2654	* Clear further IDC participation if we are not compatible with
2655	* the current IDC Major Version.
2656	*/
2657	ql_log(ql_log_warn, vha, 0xb07d,
2658	fmt: "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2659	idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2660	__qla83xx_clear_drv_presence(vha);
2661	rval = QLA_FUNCTION_FAILED;
2662	goto exit;
2663	}
2664	/* Each function sets its supported Minor version. */
2665	qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2666	idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2667	qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2668
2669	if (ha->flags.nic_core_reset_owner) {
2670	memset(config, 0, sizeof(config));
2671	if (!qla81xx_get_port_config(vha, config))
2672	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2673	QLA8XXX_DEV_READY);
2674	}
2675
2676	rval = qla83xx_idc_state_handler(vha);
2677
2678	exit:
2679	qla83xx_idc_unlock(vha, 0);
2680
2681	return rval;
2682	}
2683
2684	void qla_enable_fce_trace(scsi_qla_host_t *vha)
2685	{
2686	int rval;
2687	struct qla_hw_data *ha = vha->hw;
2688
2689	if (ha->fce) {
2690	ha->flags.fce_enabled = 1;
2691	memset(ha->fce, 0, fce_calc_size(ha->fce_bufs));
2692	rval = qla2x00_enable_fce_trace(vha,
2693	ha->fce_dma, ha->fce_bufs, ha->fce_mb, &ha->fce_bufs);
2694
2695	if (rval) {
2696	ql_log(ql_log_warn, vha, 0x8033,
2697	fmt: "Unable to reinitialize FCE (%d).\n", rval);
2698	ha->flags.fce_enabled = 0;
2699	}
2700	}
2701	}
2702
2703	static void qla_enable_eft_trace(scsi_qla_host_t *vha)
2704	{
2705	int rval;
2706	struct qla_hw_data *ha = vha->hw;
2707
2708	if (ha->eft) {
2709	memset(ha->eft, 0, EFT_SIZE);
2710	rval = qla2x00_enable_eft_trace(vha, ha->eft_dma, EFT_NUM_BUFFERS);
2711
2712	if (rval) {
2713	ql_log(ql_log_warn, vha, 0x8034,
2714	fmt: "Unable to reinitialize EFT (%d).\n", rval);
2715	}
2716	}
2717	}
2718	/*
2719	* qla2x00_initialize_adapter
2720	* Initialize board.
2721	*
2722	* Input:
2723	* ha = adapter block pointer.
2724	*
2725	* Returns:
2726	* 0 = success
2727	*/
2728	int
2729	qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2730	{
2731	int rval;
2732	struct qla_hw_data *ha = vha->hw;
2733	struct req_que *req = ha->req_q_map[0];
2734	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2735
2736	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2737	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2738
2739	/* Clear adapter flags. */
2740	vha->flags.online = 0;
2741	ha->flags.chip_reset_done = 0;
2742	vha->flags.reset_active = 0;
2743	ha->flags.pci_channel_io_perm_failure = 0;
2744	ha->flags.eeh_busy = 0;
2745	vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2746	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
2747	atomic_set(v: &vha->loop_state, LOOP_DOWN);
2748	vha->device_flags = DFLG_NO_CABLE;
2749	vha->dpc_flags = 0;
2750	vha->flags.management_server_logged_in = 0;
2751	vha->marker_needed = 0;
2752	ha->isp_abort_cnt = 0;
2753	ha->beacon_blink_led = 0;
2754
2755	set_bit(nr: 0, addr: ha->req_qid_map);
2756	set_bit(nr: 0, addr: ha->rsp_qid_map);
2757
2758	ql_dbg(ql_dbg_init, vha, 0x0040,
2759	fmt: "Configuring PCI space...\n");
2760	rval = ha->isp_ops->pci_config(vha);
2761	if (rval) {
2762	ql_log(ql_log_warn, vha, 0x0044,
2763	fmt: "Unable to configure PCI space.\n");
2764	return (rval);
2765	}
2766
2767	ha->isp_ops->reset_chip(vha);
2768
2769	/* Check for secure flash support */
2770	if (IS_QLA28XX(ha)) {
2771	if (rd_reg_word(addr: &reg->mailbox12) & BIT_0)
2772	ha->flags.secure_adapter = 1;
2773	ql_log(ql_log_info, vha, 0xffff, fmt: "Secure Adapter: %s\n",
2774	(ha->flags.secure_adapter) ? "Yes" : "No");
2775	}
2776
2777
2778	rval = qla2xxx_get_flash_info(vha);
2779	if (rval) {
2780	ql_log(ql_log_fatal, vha, 0x004f,
2781	fmt: "Unable to validate FLASH data.\n");
2782	return rval;
2783	}
2784
2785	if (IS_QLA8044(ha)) {
2786	qla8044_read_reset_template(ha: vha);
2787
2788	/* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2789	* If DONRESET_BIT0 is set, drivers should not set dev_state
2790	* to NEED_RESET. But if NEED_RESET is set, drivers should
2791	* should honor the reset. */
2792	if (ql2xdontresethba == 1)
2793	qla8044_set_idc_dontreset(ha: vha);
2794	}
2795
2796	ha->isp_ops->get_flash_version(vha, req->ring);
2797	ql_dbg(ql_dbg_init, vha, 0x0061,
2798	fmt: "Configure NVRAM parameters...\n");
2799
2800	/* Let priority default to FCP, can be overridden by nvram_config */
2801	ha->fc4_type_priority = FC4_PRIORITY_FCP;
2802
2803	ha->isp_ops->nvram_config(vha);
2804
2805	if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2806	ha->fc4_type_priority != FC4_PRIORITY_NVME)
2807	ha->fc4_type_priority = FC4_PRIORITY_FCP;
2808
2809	ql_log(ql_log_info, vha, 0xffff, fmt: "FC4 priority set to %s\n",
2810	ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2811
2812	if (ha->flags.disable_serdes) {
2813	/* Mask HBA via NVRAM settings? */
2814	ql_log(ql_log_info, vha, 0x0077,
2815	fmt: "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2816	return QLA_FUNCTION_FAILED;
2817	}
2818
2819	ql_dbg(ql_dbg_init, vha, 0x0078,
2820	fmt: "Verifying loaded RISC code...\n");
2821
2822	/* If smartsan enabled then require fdmi and rdp enabled */
2823	if (ql2xsmartsan) {
2824	ql2xfdmienable = 1;
2825	ql2xrdpenable = 1;
2826	}
2827
2828	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2829	rval = ha->isp_ops->chip_diag(vha);
2830	if (rval)
2831	return (rval);
2832	rval = qla2x00_setup_chip(vha);
2833	if (rval)
2834	return (rval);
2835	}
2836
2837	if (IS_QLA84XX(ha)) {
2838	ha->cs84xx = qla84xx_get_chip(vha);
2839	if (!ha->cs84xx) {
2840	ql_log(ql_log_warn, vha, 0x00d0,
2841	fmt: "Unable to configure ISP84XX.\n");
2842	return QLA_FUNCTION_FAILED;
2843	}
2844	}
2845
2846	if (qla_ini_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha))
2847	rval = qla2x00_init_rings(vha);
2848
2849	/* No point in continuing if firmware initialization failed. */
2850	if (rval != QLA_SUCCESS)
2851	return rval;
2852
2853	ha->flags.chip_reset_done = 1;
2854
2855	if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2856	/* Issue verify 84xx FW IOCB to complete 84xx initialization */
2857	rval = qla84xx_init_chip(vha);
2858	if (rval != QLA_SUCCESS) {
2859	ql_log(ql_log_warn, vha, 0x00d4,
2860	fmt: "Unable to initialize ISP84XX.\n");
2861	qla84xx_put_chip(vha);
2862	}
2863	}
2864
2865	/* Load the NIC Core f/w if we are the first protocol driver. */
2866	if (IS_QLA8031(ha)) {
2867	rval = qla83xx_nic_core_fw_load(vha);
2868	if (rval)
2869	ql_log(ql_log_warn, vha, 0x0124,
2870	fmt: "Error in initializing NIC Core f/w.\n");
2871	}
2872
2873	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2874	qla24xx_read_fcp_prio_cfg(vha);
2875
2876	if (IS_P3P_TYPE(ha))
2877	qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2878	else
2879	qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2880
2881	return (rval);
2882	}
2883
2884	/**
2885	* qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2886	* @vha: HA context
2887	*
2888	* Returns 0 on success.
2889	*/
2890	int
2891	qla2100_pci_config(scsi_qla_host_t *vha)
2892	{
2893	uint16_t w;
2894	unsigned long flags;
2895	struct qla_hw_data *ha = vha->hw;
2896	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2897
2898	pci_set_master(dev: ha->pdev);
2899	pci_try_set_mwi(dev: ha->pdev);
2900
2901	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
2902	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2903	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
2904
2905	pci_disable_rom(pdev: ha->pdev);
2906
2907	/* Get PCI bus information. */
2908	spin_lock_irqsave(&ha->hardware_lock, flags);
2909	ha->pci_attr = rd_reg_word(addr: &reg->ctrl_status);
2910	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2911
2912	return QLA_SUCCESS;
2913	}
2914
2915	/**
2916	* qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2917	* @vha: HA context
2918	*
2919	* Returns 0 on success.
2920	*/
2921	int
2922	qla2300_pci_config(scsi_qla_host_t *vha)
2923	{
2924	uint16_t w;
2925	unsigned long flags = 0;
2926	uint32_t cnt;
2927	struct qla_hw_data *ha = vha->hw;
2928	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2929
2930	pci_set_master(dev: ha->pdev);
2931	pci_try_set_mwi(dev: ha->pdev);
2932
2933	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
2934	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2935
2936	if (IS_QLA2322(ha) || IS_QLA6322(ha))
2937	w &= ~PCI_COMMAND_INTX_DISABLE;
2938	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
2939
2940	/*
2941	* If this is a 2300 card and not 2312, reset the
2942	* COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2943	* the 2310 also reports itself as a 2300 so we need to get the
2944	* fb revision level -- a 6 indicates it really is a 2300 and
2945	* not a 2310.
2946	*/
2947	if (IS_QLA2300(ha)) {
2948	spin_lock_irqsave(&ha->hardware_lock, flags);
2949
2950	/* Pause RISC. */
2951	wrt_reg_word(addr: &reg->hccr, HCCR_PAUSE_RISC);
2952	for (cnt = 0; cnt < 30000; cnt++) {
2953	if ((rd_reg_word(addr: &reg->hccr) & HCCR_RISC_PAUSE) != 0)
2954	break;
2955
2956	udelay(usec: 10);
2957	}
2958
2959	/* Select FPM registers. */
2960	wrt_reg_word(addr: &reg->ctrl_status, data: 0x20);
2961	rd_reg_word(addr: &reg->ctrl_status);
2962
2963	/* Get the fb rev level */
2964	ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2965
2966	if (ha->fb_rev == FPM_2300)
2967	pci_clear_mwi(dev: ha->pdev);
2968
2969	/* Deselect FPM registers. */
2970	wrt_reg_word(addr: &reg->ctrl_status, data: 0x0);
2971	rd_reg_word(addr: &reg->ctrl_status);
2972
2973	/* Release RISC module. */
2974	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
2975	for (cnt = 0; cnt < 30000; cnt++) {
2976	if ((rd_reg_word(addr: &reg->hccr) & HCCR_RISC_PAUSE) == 0)
2977	break;
2978
2979	udelay(usec: 10);
2980	}
2981
2982	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2983	}
2984
2985	pci_write_config_byte(dev: ha->pdev, PCI_LATENCY_TIMER, val: 0x80);
2986
2987	pci_disable_rom(pdev: ha->pdev);
2988
2989	/* Get PCI bus information. */
2990	spin_lock_irqsave(&ha->hardware_lock, flags);
2991	ha->pci_attr = rd_reg_word(addr: &reg->ctrl_status);
2992	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
2993
2994	return QLA_SUCCESS;
2995	}
2996
2997	/**
2998	* qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2999	* @vha: HA context
3000	*
3001	* Returns 0 on success.
3002	*/
3003	int
3004	qla24xx_pci_config(scsi_qla_host_t *vha)
3005	{
3006	uint16_t w;
3007	unsigned long flags = 0;
3008	struct qla_hw_data *ha = vha->hw;
3009	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3010
3011	pci_set_master(dev: ha->pdev);
3012	pci_try_set_mwi(dev: ha->pdev);
3013
3014	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
3015	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3016	w &= ~PCI_COMMAND_INTX_DISABLE;
3017	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
3018
3019	pci_write_config_byte(dev: ha->pdev, PCI_LATENCY_TIMER, val: 0x80);
3020
3021	/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
3022	if (pci_find_capability(dev: ha->pdev, PCI_CAP_ID_PCIX))
3023	pcix_set_mmrbc(dev: ha->pdev, mmrbc: 2048);
3024
3025	/* PCIe -- adjust Maximum Read Request Size (2048). */
3026	if (pci_is_pcie(dev: ha->pdev))
3027	pcie_set_readrq(dev: ha->pdev, rq: 4096);
3028
3029	pci_disable_rom(pdev: ha->pdev);
3030
3031	ha->chip_revision = ha->pdev->revision;
3032
3033	/* Get PCI bus information. */
3034	spin_lock_irqsave(&ha->hardware_lock, flags);
3035	ha->pci_attr = rd_reg_dword(addr: &reg->ctrl_status);
3036	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3037
3038	return QLA_SUCCESS;
3039	}
3040
3041	/**
3042	* qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
3043	* @vha: HA context
3044	*
3045	* Returns 0 on success.
3046	*/
3047	int
3048	qla25xx_pci_config(scsi_qla_host_t *vha)
3049	{
3050	uint16_t w;
3051	struct qla_hw_data *ha = vha->hw;
3052
3053	pci_set_master(dev: ha->pdev);
3054	pci_try_set_mwi(dev: ha->pdev);
3055
3056	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &w);
3057	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3058	w &= ~PCI_COMMAND_INTX_DISABLE;
3059	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: w);
3060
3061	/* PCIe -- adjust Maximum Read Request Size (2048). */
3062	if (pci_is_pcie(dev: ha->pdev))
3063	pcie_set_readrq(dev: ha->pdev, rq: 4096);
3064
3065	pci_disable_rom(pdev: ha->pdev);
3066
3067	ha->chip_revision = ha->pdev->revision;
3068
3069	return QLA_SUCCESS;
3070	}
3071
3072	/**
3073	* qla2x00_isp_firmware() - Choose firmware image.
3074	* @vha: HA context
3075	*
3076	* Returns 0 on success.
3077	*/
3078	static int
3079	qla2x00_isp_firmware(scsi_qla_host_t *vha)
3080	{
3081	int rval;
3082	uint16_t loop_id, topo, sw_cap;
3083	uint8_t domain, area, al_pa;
3084	struct qla_hw_data *ha = vha->hw;
3085
3086	/* Assume loading risc code */
3087	rval = QLA_FUNCTION_FAILED;
3088
3089	if (ha->flags.disable_risc_code_load) {
3090	ql_log(ql_log_info, vha, 0x0079, fmt: "RISC CODE NOT loaded.\n");
3091
3092	/* Verify checksum of loaded RISC code. */
3093	rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
3094	if (rval == QLA_SUCCESS) {
3095	/* And, verify we are not in ROM code. */
3096	rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
3097	&area, &domain, &topo, &sw_cap);
3098	}
3099	}
3100
3101	if (rval)
3102	ql_dbg(ql_dbg_init, vha, 0x007a,
3103	fmt: "**** Load RISC code ****.\n");
3104
3105	return (rval);
3106	}
3107
3108	/**
3109	* qla2x00_reset_chip() - Reset ISP chip.
3110	* @vha: HA context
3111	*
3112	* Returns 0 on success.
3113	*/
3114	int
3115	qla2x00_reset_chip(scsi_qla_host_t *vha)
3116	{
3117	unsigned long flags = 0;
3118	struct qla_hw_data *ha = vha->hw;
3119	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3120	uint32_t cnt;
3121	uint16_t cmd;
3122	int rval = QLA_FUNCTION_FAILED;
3123
3124	if (unlikely(pci_channel_offline(ha->pdev)))
3125	return rval;
3126
3127	ha->isp_ops->disable_intrs(ha);
3128
3129	spin_lock_irqsave(&ha->hardware_lock, flags);
3130
3131	/* Turn off master enable */
3132	cmd = 0;
3133	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &cmd);
3134	cmd &= ~PCI_COMMAND_MASTER;
3135	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: cmd);
3136
3137	if (!IS_QLA2100(ha)) {
3138	/* Pause RISC. */
3139	wrt_reg_word(addr: &reg->hccr, HCCR_PAUSE_RISC);
3140	if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
3141	for (cnt = 0; cnt < 30000; cnt++) {
3142	if ((rd_reg_word(addr: &reg->hccr) &
3143	HCCR_RISC_PAUSE) != 0)
3144	break;
3145	udelay(usec: 100);
3146	}
3147	} else {
3148	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3149	udelay(usec: 10);
3150	}
3151
3152	/* Select FPM registers. */
3153	wrt_reg_word(addr: &reg->ctrl_status, data: 0x20);
3154	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3155
3156	/* FPM Soft Reset. */
3157	wrt_reg_word(addr: &reg->fpm_diag_config, data: 0x100);
3158	rd_reg_word(addr: &reg->fpm_diag_config); /* PCI Posting. */
3159
3160	/* Toggle Fpm Reset. */
3161	if (!IS_QLA2200(ha)) {
3162	wrt_reg_word(addr: &reg->fpm_diag_config, data: 0x0);
3163	rd_reg_word(addr: &reg->fpm_diag_config); /* PCI Posting. */
3164	}
3165
3166	/* Select frame buffer registers. */
3167	wrt_reg_word(addr: &reg->ctrl_status, data: 0x10);
3168	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3169
3170	/* Reset frame buffer FIFOs. */
3171	if (IS_QLA2200(ha)) {
3172	WRT_FB_CMD_REG(ha, reg, 0xa000);
3173	RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
3174	} else {
3175	WRT_FB_CMD_REG(ha, reg, 0x00fc);
3176
3177	/* Read back fb_cmd until zero or 3 seconds max */
3178	for (cnt = 0; cnt < 3000; cnt++) {
3179	if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
3180	break;
3181	udelay(usec: 100);
3182	}
3183	}
3184
3185	/* Select RISC module registers. */
3186	wrt_reg_word(addr: &reg->ctrl_status, data: 0);
3187	rd_reg_word(addr: &reg->ctrl_status); /* PCI Posting. */
3188
3189	/* Reset RISC processor. */
3190	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3191	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3192
3193	/* Release RISC processor. */
3194	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3195	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3196	}
3197
3198	wrt_reg_word(addr: &reg->hccr, HCCR_CLR_RISC_INT);
3199	wrt_reg_word(addr: &reg->hccr, HCCR_CLR_HOST_INT);
3200
3201	/* Reset ISP chip. */
3202	wrt_reg_word(addr: &reg->ctrl_status, CSR_ISP_SOFT_RESET);
3203
3204	/* Wait for RISC to recover from reset. */
3205	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3206	/*
3207	* It is necessary to for a delay here since the card doesn't
3208	* respond to PCI reads during a reset. On some architectures
3209	* this will result in an MCA.
3210	*/
3211	udelay(usec: 20);
3212	for (cnt = 30000; cnt; cnt--) {
3213	if ((rd_reg_word(addr: &reg->ctrl_status) &
3214	CSR_ISP_SOFT_RESET) == 0)
3215	break;
3216	udelay(usec: 100);
3217	}
3218	} else
3219	udelay(usec: 10);
3220
3221	/* Reset RISC processor. */
3222	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3223
3224	wrt_reg_word(addr: &reg->semaphore, data: 0);
3225
3226	/* Release RISC processor. */
3227	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3228	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3229
3230	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3231	for (cnt = 0; cnt < 30000; cnt++) {
3232	if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
3233	break;
3234
3235	udelay(usec: 100);
3236	}
3237	} else
3238	udelay(usec: 100);
3239
3240	/* Turn on master enable */
3241	cmd |= PCI_COMMAND_MASTER;
3242	pci_write_config_word(dev: ha->pdev, PCI_COMMAND, val: cmd);
3243
3244	/* Disable RISC pause on FPM parity error. */
3245	if (!IS_QLA2100(ha)) {
3246	wrt_reg_word(addr: &reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
3247	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
3248	}
3249
3250	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3251
3252	return QLA_SUCCESS;
3253	}
3254
3255	/**
3256	* qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
3257	* @vha: HA context
3258	*
3259	* Returns 0 on success.
3260	*/
3261	static int
3262	qla81xx_reset_mpi(scsi_qla_host_t *vha)
3263	{
3264	uint16_t mb[4] = {0x1010, 0, 1, 0};
3265
3266	if (!IS_QLA81XX(vha->hw))
3267	return QLA_SUCCESS;
3268
3269	return qla81xx_write_mpi_register(vha, mb);
3270	}
3271
3272	static int
3273	qla_chk_risc_recovery(scsi_qla_host_t *vha)
3274	{
3275	struct qla_hw_data *ha = vha->hw;
3276	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3277	__le16 __iomem *mbptr = &reg->mailbox0;
3278	int i;
3279	u16 mb[32];
3280	int rc = QLA_SUCCESS;
3281
3282	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3283	return rc;
3284
3285	/* this check is only valid after RISC reset */
3286	mb[0] = rd_reg_word(addr: mbptr);
3287	mbptr++;
3288	if (mb[0] == 0xf) {
3289	rc = QLA_FUNCTION_FAILED;
3290
3291	for (i = 1; i < 32; i++) {
3292	mb[i] = rd_reg_word(addr: mbptr);
3293	mbptr++;
3294	}
3295
3296	ql_log(ql_log_warn, vha, 0x1015,
3297	fmt: "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3298	mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
3299	ql_log(ql_log_warn, vha, 0x1015,
3300	fmt: "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3301	mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
3302	mb[15]);
3303	ql_log(ql_log_warn, vha, 0x1015,
3304	fmt: "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3305	mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
3306	mb[23]);
3307	ql_log(ql_log_warn, vha, 0x1015,
3308	fmt: "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3309	mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
3310	mb[31]);
3311	}
3312	return rc;
3313	}
3314
3315	/**
3316	* qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
3317	* @vha: HA context
3318	*
3319	* Returns 0 on success.
3320	*/
3321	static inline int
3322	qla24xx_reset_risc(scsi_qla_host_t *vha)
3323	{
3324	unsigned long flags = 0;
3325	struct qla_hw_data *ha = vha->hw;
3326	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3327	uint32_t cnt;
3328	uint16_t wd;
3329	static int abts_cnt; /* ISP abort retry counts */
3330	int rval = QLA_SUCCESS;
3331	int print = 1;
3332
3333	spin_lock_irqsave(&ha->hardware_lock, flags);
3334
3335	/* Reset RISC. */
3336	wrt_reg_dword(addr: &reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3337	for (cnt = 0; cnt < 30000; cnt++) {
3338	if ((rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
3339	break;
3340
3341	udelay(usec: 10);
3342	}
3343
3344	if (!(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE))
3345	set_bit(DMA_SHUTDOWN_CMPL, addr: &ha->fw_dump_cap_flags);
3346
3347	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
3348	fmt: "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
3349	rd_reg_dword(addr: &reg->hccr),
3350	rd_reg_dword(addr: &reg->ctrl_status),
3351	(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_DMA_ACTIVE));
3352
3353	wrt_reg_dword(addr: &reg->ctrl_status,
3354	CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3355	pci_read_config_word(dev: ha->pdev, PCI_COMMAND, val: &wd);
3356
3357	udelay(usec: 100);
3358
3359	/* Wait for firmware to complete NVRAM accesses. */
3360	rd_reg_word(addr: &reg->mailbox0);
3361	for (cnt = 10000; rd_reg_word(addr: &reg->mailbox0) != 0 &&
3362	rval == QLA_SUCCESS; cnt--) {
3363	barrier();
3364	if (cnt)
3365	udelay(usec: 5);
3366	else
3367	rval = QLA_FUNCTION_TIMEOUT;
3368	}
3369
3370	if (rval == QLA_SUCCESS)
3371	set_bit(ISP_MBX_RDY, addr: &ha->fw_dump_cap_flags);
3372
3373	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
3374	fmt: "HCCR: 0x%x, MailBox0 Status 0x%x\n",
3375	rd_reg_dword(addr: &reg->hccr),
3376	rd_reg_word(addr: &reg->mailbox0));
3377
3378	/* Wait for soft-reset to complete. */
3379	rd_reg_dword(addr: &reg->ctrl_status);
3380	for (cnt = 0; cnt < 60; cnt++) {
3381	barrier();
3382	if ((rd_reg_dword(addr: &reg->ctrl_status) &
3383	CSRX_ISP_SOFT_RESET) == 0)
3384	break;
3385
3386	udelay(usec: 5);
3387	}
3388	if (!(rd_reg_dword(addr: &reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
3389	set_bit(ISP_SOFT_RESET_CMPL, addr: &ha->fw_dump_cap_flags);
3390
3391	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
3392	fmt: "HCCR: 0x%x, Soft Reset status: 0x%x\n",
3393	rd_reg_dword(addr: &reg->hccr),
3394	rd_reg_dword(addr: &reg->ctrl_status));
3395
3396	/* If required, do an MPI FW reset now */
3397	if (test_and_clear_bit(MPI_RESET_NEEDED, addr: &vha->dpc_flags)) {
3398	if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
3399	if (++abts_cnt < 5) {
3400	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
3401	set_bit(MPI_RESET_NEEDED, addr: &vha->dpc_flags);
3402	} else {
3403	/*
3404	* We exhausted the ISP abort retries. We have to
3405	* set the board offline.
3406	*/
3407	abts_cnt = 0;
3408	vha->flags.online = 0;
3409	}
3410	}
3411	}
3412
3413	wrt_reg_dword(addr: &reg->hccr, HCCRX_SET_RISC_RESET);
3414	rd_reg_dword(addr: &reg->hccr);
3415
3416	wrt_reg_dword(addr: &reg->hccr, HCCRX_REL_RISC_PAUSE);
3417	rd_reg_dword(addr: &reg->hccr);
3418
3419	wrt_reg_dword(addr: &reg->hccr, HCCRX_CLR_RISC_RESET);
3420	mdelay(10);
3421	rd_reg_dword(addr: &reg->hccr);
3422
3423	wd = rd_reg_word(addr: &reg->mailbox0);
3424	for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3425	barrier();
3426	if (cnt) {
3427	mdelay(1);
3428	if (print && qla_chk_risc_recovery(vha))
3429	print = 0;
3430
3431	wd = rd_reg_word(addr: &reg->mailbox0);
3432	} else {
3433	rval = QLA_FUNCTION_TIMEOUT;
3434
3435	ql_log(ql_log_warn, vha, 0x015e,
3436	fmt: "RISC reset timeout\n");
3437	}
3438	}
3439
3440	if (rval == QLA_SUCCESS)
3441	set_bit(RISC_RDY_AFT_RESET, addr: &ha->fw_dump_cap_flags);
3442
3443	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3444	fmt: "Host Risc 0x%x, mailbox0 0x%x\n",
3445	rd_reg_dword(addr: &reg->hccr),
3446	rd_reg_word(addr: &reg->mailbox0));
3447
3448	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3449
3450	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3451	fmt: "Driver in %s mode\n",
3452	IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3453
3454	if (IS_NOPOLLING_TYPE(ha))
3455	ha->isp_ops->enable_intrs(ha);
3456
3457	return rval;
3458	}
3459
3460	static void
3461	qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3462	{
3463	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3464
3465	wrt_reg_dword(addr: &reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3466	*data = rd_reg_dword(addr: &reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3467	}
3468
3469	static void
3470	qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3471	{
3472	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3473
3474	wrt_reg_dword(addr: &reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3475	wrt_reg_dword(addr: &reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3476	}
3477
3478	static void
3479	qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3480	{
3481	uint32_t wd32 = 0;
3482	uint delta_msec = 100;
3483	uint elapsed_msec = 0;
3484	uint timeout_msec;
3485	ulong n;
3486
3487	if (vha->hw->pdev->subsystem_device != 0x0175 &&
3488	vha->hw->pdev->subsystem_device != 0x0240)
3489	return;
3490
3491	wrt_reg_dword(addr: &vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3492	udelay(usec: 100);
3493
3494	attempt:
3495	timeout_msec = TIMEOUT_SEMAPHORE;
3496	n = timeout_msec / delta_msec;
3497	while (n--) {
3498	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3499	qla25xx_read_risc_sema_reg(vha, data: &wd32);
3500	if (wd32 & RISC_SEMAPHORE)
3501	break;
3502	msleep(msecs: delta_msec);
3503	elapsed_msec += delta_msec;
3504	if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3505	goto force;
3506	}
3507
3508	if (!(wd32 & RISC_SEMAPHORE))
3509	goto force;
3510
3511	if (!(wd32 & RISC_SEMAPHORE_FORCE))
3512	goto acquired;
3513
3514	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3515	timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3516	n = timeout_msec / delta_msec;
3517	while (n--) {
3518	qla25xx_read_risc_sema_reg(vha, data: &wd32);
3519	if (!(wd32 & RISC_SEMAPHORE_FORCE))
3520	break;
3521	msleep(msecs: delta_msec);
3522	elapsed_msec += delta_msec;
3523	if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3524	goto force;
3525	}
3526
3527	if (wd32 & RISC_SEMAPHORE_FORCE)
3528	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3529
3530	goto attempt;
3531
3532	force:
3533	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3534
3535	acquired:
3536	return;
3537	}
3538
3539	/**
3540	* qla24xx_reset_chip() - Reset ISP24xx chip.
3541	* @vha: HA context
3542	*
3543	* Returns 0 on success.
3544	*/
3545	int
3546	qla24xx_reset_chip(scsi_qla_host_t *vha)
3547	{
3548	struct qla_hw_data *ha = vha->hw;
3549	int rval = QLA_FUNCTION_FAILED;
3550
3551	if (pci_channel_offline(pdev: ha->pdev) &&
3552	ha->flags.pci_channel_io_perm_failure) {
3553	return rval;
3554	}
3555
3556	ha->isp_ops->disable_intrs(ha);
3557
3558	qla25xx_manipulate_risc_semaphore(vha);
3559
3560	/* Perform RISC reset. */
3561	rval = qla24xx_reset_risc(vha);
3562
3563	return rval;
3564	}
3565
3566	/**
3567	* qla2x00_chip_diag() - Test chip for proper operation.
3568	* @vha: HA context
3569	*
3570	* Returns 0 on success.
3571	*/
3572	int
3573	qla2x00_chip_diag(scsi_qla_host_t *vha)
3574	{
3575	int rval;
3576	struct qla_hw_data *ha = vha->hw;
3577	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3578	unsigned long flags = 0;
3579	uint16_t data;
3580	uint32_t cnt;
3581	uint16_t mb[5];
3582	struct req_que *req = ha->req_q_map[0];
3583
3584	/* Assume a failed state */
3585	rval = QLA_FUNCTION_FAILED;
3586
3587	ql_dbg(ql_dbg_init, vha, 0x007b, fmt: "Testing device at %p.\n",
3588	&reg->flash_address);
3589
3590	spin_lock_irqsave(&ha->hardware_lock, flags);
3591
3592	/* Reset ISP chip. */
3593	wrt_reg_word(addr: &reg->ctrl_status, CSR_ISP_SOFT_RESET);
3594
3595	/*
3596	* We need to have a delay here since the card will not respond while
3597	* in reset causing an MCA on some architectures.
3598	*/
3599	udelay(usec: 20);
3600	data = qla2x00_debounce_register(addr: &reg->ctrl_status);
3601	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3602	udelay(usec: 5);
3603	data = rd_reg_word(addr: &reg->ctrl_status);
3604	barrier();
3605	}
3606
3607	if (!cnt)
3608	goto chip_diag_failed;
3609
3610	ql_dbg(ql_dbg_init, vha, 0x007c,
3611	fmt: "Reset register cleared by chip reset.\n");
3612
3613	/* Reset RISC processor. */
3614	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
3615	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
3616
3617	/* Workaround for QLA2312 PCI parity error */
3618	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3619	data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3620	for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3621	udelay(usec: 5);
3622	data = RD_MAILBOX_REG(ha, reg, 0);
3623	barrier();
3624	}
3625	} else
3626	udelay(usec: 10);
3627
3628	if (!cnt)
3629	goto chip_diag_failed;
3630
3631	/* Check product ID of chip */
3632	ql_dbg(ql_dbg_init, vha, 0x007d, fmt: "Checking product ID of chip.\n");
3633
3634	mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3635	mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3636	mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3637	mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3638	if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3639	mb[3] != PROD_ID_3) {
3640	ql_log(ql_log_warn, vha, 0x0062,
3641	fmt: "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3642	mb[1], mb[2], mb[3]);
3643
3644	goto chip_diag_failed;
3645	}
3646	ha->product_id[0] = mb[1];
3647	ha->product_id[1] = mb[2];
3648	ha->product_id[2] = mb[3];
3649	ha->product_id[3] = mb[4];
3650
3651	/* Adjust fw RISC transfer size */
3652	if (req->length > 1024)
3653	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3654	else
3655	ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3656	req->length;
3657
3658	if (IS_QLA2200(ha) &&
3659	RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3660	/* Limit firmware transfer size with a 2200A */
3661	ql_dbg(ql_dbg_init, vha, 0x007e, fmt: "Found QLA2200A Chip.\n");
3662
3663	ha->device_type |= DT_ISP2200A;
3664	ha->fw_transfer_size = 128;
3665	}
3666
3667	/* Wrap Incoming Mailboxes Test. */
3668	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3669
3670	ql_dbg(ql_dbg_init, vha, 0x007f, fmt: "Checking mailboxes.\n");
3671	rval = qla2x00_mbx_reg_test(vha);
3672	if (rval)
3673	ql_log(ql_log_warn, vha, 0x0080,
3674	fmt: "Failed mailbox send register test.\n");
3675	else
3676	/* Flag a successful rval */
3677	rval = QLA_SUCCESS;
3678	spin_lock_irqsave(&ha->hardware_lock, flags);
3679
3680	chip_diag_failed:
3681	if (rval)
3682	ql_log(ql_log_info, vha, 0x0081,
3683	fmt: "Chip diagnostics **** FAILED ****.\n");
3684
3685	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
3686
3687	return (rval);
3688	}
3689
3690	/**
3691	* qla24xx_chip_diag() - Test ISP24xx for proper operation.
3692	* @vha: HA context
3693	*
3694	* Returns 0 on success.
3695	*/
3696	int
3697	qla24xx_chip_diag(scsi_qla_host_t *vha)
3698	{
3699	int rval;
3700	struct qla_hw_data *ha = vha->hw;
3701	struct req_que *req = ha->req_q_map[0];
3702
3703	if (IS_P3P_TYPE(ha))
3704	return QLA_SUCCESS;
3705
3706	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3707
3708	rval = qla2x00_mbx_reg_test(vha);
3709	if (rval) {
3710	ql_log(ql_log_warn, vha, 0x0082,
3711	fmt: "Failed mailbox send register test.\n");
3712	} else {
3713	/* Flag a successful rval */
3714	rval = QLA_SUCCESS;
3715	}
3716
3717	return rval;
3718	}
3719
3720	int qla2x00_alloc_fce_trace(scsi_qla_host_t *vha)
3721	{
3722	dma_addr_t tc_dma;
3723	void *tc;
3724	struct qla_hw_data *ha = vha->hw;
3725
3726	if (!IS_FWI2_CAPABLE(ha))
3727	return -EINVAL;
3728
3729	if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3730	!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3731	return -EINVAL;
3732
3733	if (ha->fce) {
3734	ql_dbg(ql_dbg_init, vha, 0x00bd,
3735	fmt: "%s: FCE Mem is already allocated.\n",
3736	__func__);
3737	return -EIO;
3738	}
3739
3740	/* Allocate memory for Fibre Channel Event Buffer. */
3741	tc = dma_alloc_coherent(dev: &ha->pdev->dev, FCE_SIZE, dma_handle: &tc_dma,
3742	GFP_KERNEL);
3743	if (!tc) {
3744	ql_log(ql_log_warn, vha, 0x00be,
3745	fmt: "Unable to allocate (%d KB) for FCE.\n",
3746	FCE_SIZE / 1024);
3747	return -ENOMEM;
3748	}
3749
3750	ql_dbg(ql_dbg_init, vha, 0x00c0,
3751	fmt: "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3752
3753	ha->fce_dma = tc_dma;
3754	ha->fce = tc;
3755	ha->fce_bufs = FCE_NUM_BUFFERS;
3756	return 0;
3757	}
3758
3759	void qla2x00_free_fce_trace(struct qla_hw_data *ha)
3760	{
3761	if (!ha->fce)
3762	return;
3763	dma_free_coherent(dev: &ha->pdev->dev, FCE_SIZE, cpu_addr: ha->fce, dma_handle: ha->fce_dma);
3764	ha->fce = NULL;
3765	ha->fce_dma = 0;
3766	}
3767
3768	static void
3769	qla2x00_alloc_eft_trace(scsi_qla_host_t *vha)
3770	{
3771	dma_addr_t tc_dma;
3772	void *tc;
3773	struct qla_hw_data *ha = vha->hw;
3774
3775	if (!IS_FWI2_CAPABLE(ha))
3776	return;
3777
3778	if (ha->eft) {
3779	ql_dbg(ql_dbg_init, vha, 0x00bd,
3780	fmt: "%s: EFT Mem is already allocated.\n",
3781	__func__);
3782	return;
3783	}
3784
3785	/* Allocate memory for Extended Trace Buffer. */
3786	tc = dma_alloc_coherent(dev: &ha->pdev->dev, EFT_SIZE, dma_handle: &tc_dma,
3787	GFP_KERNEL);
3788	if (!tc) {
3789	ql_log(ql_log_warn, vha, 0x00c1,
3790	fmt: "Unable to allocate (%d KB) for EFT.\n",
3791	EFT_SIZE / 1024);
3792	return;
3793	}
3794
3795	ql_dbg(ql_dbg_init, vha, 0x00c3,
3796	fmt: "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3797
3798	ha->eft_dma = tc_dma;
3799	ha->eft = tc;
3800	}
3801
3802	void
3803	qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3804	{
3805	uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3806	eft_size, fce_size, mq_size;
3807	struct qla_hw_data *ha = vha->hw;
3808	struct req_que *req = ha->req_q_map[0];
3809	struct rsp_que *rsp = ha->rsp_q_map[0];
3810	struct qla2xxx_fw_dump *fw_dump;
3811
3812	if (ha->fw_dump) {
3813	ql_dbg(ql_dbg_init, vha, 0x00bd,
3814	fmt: "Firmware dump already allocated.\n");
3815	return;
3816	}
3817
3818	ha->fw_dumped = 0;
3819	ha->fw_dump_cap_flags = 0;
3820	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3821	req_q_size = rsp_q_size = 0;
3822
3823	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3824	fixed_size = sizeof(struct qla2100_fw_dump);
3825	} else if (IS_QLA23XX(ha)) {
3826	fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3827	mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3828	sizeof(uint16_t);
3829	} else if (IS_FWI2_CAPABLE(ha)) {
3830	if (IS_QLA83XX(ha))
3831	fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3832	else if (IS_QLA81XX(ha))
3833	fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3834	else if (IS_QLA25XX(ha))
3835	fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3836	else
3837	fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3838
3839	mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3840	sizeof(uint32_t);
3841	if (ha->mqenable) {
3842	if (!IS_QLA83XX(ha))
3843	mq_size = sizeof(struct qla2xxx_mq_chain);
3844	/*
3845	* Allocate maximum buffer size for all queues - Q0.
3846	* Resizing must be done at end-of-dump processing.
3847	*/
3848	mq_size += (ha->max_req_queues - 1) *
3849	(req->length * sizeof(request_t));
3850	mq_size += (ha->max_rsp_queues - 1) *
3851	(rsp->length * sizeof(response_t));
3852	}
3853	if (ha->tgt.atio_ring)
3854	mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3855
3856	if (ha->fce) {
3857	fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3858	ha->flags.fce_dump_buf_alloced = 1;
3859	}
3860	qla2x00_alloc_eft_trace(vha);
3861	if (ha->eft)
3862	eft_size = EFT_SIZE;
3863	}
3864
3865	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3866	struct fwdt *fwdt = ha->fwdt;
3867	uint j;
3868
3869	for (j = 0; j < 2; j++, fwdt++) {
3870	if (!fwdt->template) {
3871	ql_dbg(ql_dbg_init, vha, 0x00ba,
3872	fmt: "-> fwdt%u no template\n", j);
3873	continue;
3874	}
3875	ql_dbg(ql_dbg_init, vha, 0x00fa,
3876	fmt: "-> fwdt%u calculating fwdump size...\n", j);
3877	fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3878	vha, fwdt->template);
3879	ql_dbg(ql_dbg_init, vha, 0x00fa,
3880	fmt: "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3881	j, fwdt->dump_size);
3882	dump_size += fwdt->dump_size;
3883	}
3884	/* Add space for spare MPI fw dump. */
3885	dump_size += ha->fwdt[1].dump_size;
3886	} else {
3887	req_q_size = req->length * sizeof(request_t);
3888	rsp_q_size = rsp->length * sizeof(response_t);
3889	dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3890	dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3891	+ eft_size;
3892	ha->chain_offset = dump_size;
3893	dump_size += mq_size + fce_size;
3894	if (ha->exchoffld_buf)
3895	dump_size += sizeof(struct qla2xxx_offld_chain) +
3896	ha->exchoffld_size;
3897	if (ha->exlogin_buf)
3898	dump_size += sizeof(struct qla2xxx_offld_chain) +
3899	ha->exlogin_size;
3900	}
3901
3902	if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3903
3904	ql_dbg(ql_dbg_init, vha, 0x00c5,
3905	fmt: "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3906	__func__, dump_size, ha->fw_dump_len,
3907	ha->fw_dump_alloc_len);
3908
3909	fw_dump = vmalloc(dump_size);
3910	if (!fw_dump) {
3911	ql_log(ql_log_warn, vha, 0x00c4,
3912	fmt: "Unable to allocate (%d KB) for firmware dump.\n",
3913	dump_size / 1024);
3914	} else {
3915	mutex_lock(&ha->optrom_mutex);
3916	if (ha->fw_dumped) {
3917	memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3918	vfree(addr: ha->fw_dump);
3919	ha->fw_dump = fw_dump;
3920	ha->fw_dump_alloc_len = dump_size;
3921	ql_dbg(ql_dbg_init, vha, 0x00c5,
3922	fmt: "Re-Allocated (%d KB) and save firmware dump.\n",
3923	dump_size / 1024);
3924	} else {
3925	vfree(addr: ha->fw_dump);
3926	ha->fw_dump = fw_dump;
3927
3928	ha->fw_dump_len = ha->fw_dump_alloc_len =
3929	dump_size;
3930	ql_dbg(ql_dbg_init, vha, 0x00c5,
3931	fmt: "Allocated (%d KB) for firmware dump.\n",
3932	dump_size / 1024);
3933
3934	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3935	ha->mpi_fw_dump = (char *)fw_dump +
3936	ha->fwdt[1].dump_size;
3937	mutex_unlock(lock: &ha->optrom_mutex);
3938	return;
3939	}
3940
3941	ha->fw_dump->signature[0] = 'Q';
3942	ha->fw_dump->signature[1] = 'L';
3943	ha->fw_dump->signature[2] = 'G';
3944	ha->fw_dump->signature[3] = 'C';
3945	ha->fw_dump->version = htonl(1);
3946
3947	ha->fw_dump->fixed_size = htonl(fixed_size);
3948	ha->fw_dump->mem_size = htonl(mem_size);
3949	ha->fw_dump->req_q_size = htonl(req_q_size);
3950	ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3951
3952	ha->fw_dump->eft_size = htonl(eft_size);
3953	ha->fw_dump->eft_addr_l =
3954	htonl(LSD(ha->eft_dma));
3955	ha->fw_dump->eft_addr_h =
3956	htonl(MSD(ha->eft_dma));
3957
3958	ha->fw_dump->header_size =
3959	htonl(offsetof
3960	(struct qla2xxx_fw_dump, isp));
3961	}
3962	mutex_unlock(lock: &ha->optrom_mutex);
3963	}
3964	}
3965	}
3966
3967	static int
3968	qla81xx_mpi_sync(scsi_qla_host_t *vha)
3969	{
3970	#define MPS_MASK 0xe0
3971	int rval;
3972	uint16_t dc;
3973	uint32_t dw;
3974
3975	if (!IS_QLA81XX(vha->hw))
3976	return QLA_SUCCESS;
3977
3978	rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3979	if (rval != QLA_SUCCESS) {
3980	ql_log(ql_log_warn, vha, 0x0105,
3981	fmt: "Unable to acquire semaphore.\n");
3982	goto done;
3983	}
3984
3985	pci_read_config_word(dev: vha->hw->pdev, where: 0x54, val: &dc);
3986	rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3987	if (rval != QLA_SUCCESS) {
3988	ql_log(ql_log_warn, vha, 0x0067, fmt: "Unable to read sync.\n");
3989	goto done_release;
3990	}
3991
3992	dc &= MPS_MASK;
3993	if (dc == (dw & MPS_MASK))
3994	goto done_release;
3995
3996	dw &= ~MPS_MASK;
3997	dw |= dc;
3998	rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3999	if (rval != QLA_SUCCESS) {
4000	ql_log(ql_log_warn, vha, 0x0114, fmt: "Unable to gain sync.\n");
4001	}
4002
4003	done_release:
4004	rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
4005	if (rval != QLA_SUCCESS) {
4006	ql_log(ql_log_warn, vha, 0x006d,
4007	fmt: "Unable to release semaphore.\n");
4008	}
4009
4010	done:
4011	return rval;
4012	}
4013
4014	int
4015	qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
4016	{
4017	/* Don't try to reallocate the array */
4018	if (req->outstanding_cmds)
4019	return QLA_SUCCESS;
4020
4021	if (!IS_FWI2_CAPABLE(ha))
4022	req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
4023	else {
4024	if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
4025	req->num_outstanding_cmds = ha->cur_fw_xcb_count;
4026	else
4027	req->num_outstanding_cmds = ha->cur_fw_iocb_count;
4028	}
4029
4030	req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
4031	sizeof(srb_t *),
4032	GFP_KERNEL);
4033
4034	if (!req->outstanding_cmds) {
4035	/*
4036	* Try to allocate a minimal size just so we can get through
4037	* initialization.
4038	*/
4039	req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
4040	req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
4041	sizeof(srb_t *),
4042	GFP_KERNEL);
4043
4044	if (!req->outstanding_cmds) {
4045	ql_log(ql_log_fatal, NULL, 0x0126,
4046	fmt: "Failed to allocate memory for "
4047	"outstanding_cmds for req_que %p.\n", req);
4048	req->num_outstanding_cmds = 0;
4049	return QLA_FUNCTION_FAILED;
4050	}
4051	}
4052
4053	return QLA_SUCCESS;
4054	}
4055
4056	#define PRINT_FIELD(_field, _flag, _str) { \
4057	if (a0->_field & _flag) {\
4058	if (p) {\
4059	strcat(ptr, "|");\
4060	ptr++;\
4061	leftover--;\
4062	} \
4063	len = snprintf(ptr, leftover, "%s", _str); \
4064	p = 1;\
4065	leftover -= len;\
4066	ptr += len; \
4067	} \
4068	}
4069
4070	static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
4071	{
4072	#define STR_LEN 64
4073	struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
4074	u8 str[STR_LEN], *ptr, p;
4075	int leftover, len;
4076
4077	memset(str, 0, STR_LEN);
4078	snprintf(buf: str, SFF_VEN_NAME_LEN+1, fmt: a0->vendor_name);
4079	ql_dbg(ql_dbg_init, vha, 0x015a,
4080	fmt: "SFP MFG Name: %s\n", str);
4081
4082	memset(str, 0, STR_LEN);
4083	snprintf(buf: str, SFF_PART_NAME_LEN+1, fmt: a0->vendor_pn);
4084	ql_dbg(ql_dbg_init, vha, 0x015c,
4085	fmt: "SFP Part Name: %s\n", str);
4086
4087	/* media */
4088	memset(str, 0, STR_LEN);
4089	ptr = str;
4090	leftover = STR_LEN;
4091	p = len = 0;
4092	PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
4093	PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
4094	PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
4095	PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
4096	PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
4097	PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
4098	PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
4099	ql_dbg(ql_dbg_init, vha, 0x0160,
4100	fmt: "SFP Media: %s\n", str);
4101
4102	/* link length */
4103	memset(str, 0, STR_LEN);
4104	ptr = str;
4105	leftover = STR_LEN;
4106	p = len = 0;
4107	PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
4108	PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
4109	PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
4110	PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
4111	PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
4112	ql_dbg(ql_dbg_init, vha, 0x0196,
4113	fmt: "SFP Link Length: %s\n", str);
4114
4115	memset(str, 0, STR_LEN);
4116	ptr = str;
4117	leftover = STR_LEN;
4118	p = len = 0;
4119	PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
4120	PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
4121	PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
4122	PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
4123	PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
4124	ql_dbg(ql_dbg_init, vha, 0x016e,
4125	fmt: "SFP FC Link Tech: %s\n", str);
4126
4127	if (a0->length_km)
4128	ql_dbg(ql_dbg_init, vha, 0x016f,
4129	fmt: "SFP Distant: %d km\n", a0->length_km);
4130	if (a0->length_100m)
4131	ql_dbg(ql_dbg_init, vha, 0x0170,
4132	fmt: "SFP Distant: %d m\n", a0->length_100m*100);
4133	if (a0->length_50um_10m)
4134	ql_dbg(ql_dbg_init, vha, 0x0189,
4135	fmt: "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
4136	if (a0->length_62um_10m)
4137	ql_dbg(ql_dbg_init, vha, 0x018a,
4138	fmt: "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
4139	if (a0->length_om4_10m)
4140	ql_dbg(ql_dbg_init, vha, 0x0194,
4141	fmt: "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
4142	if (a0->length_om3_10m)
4143	ql_dbg(ql_dbg_init, vha, 0x0195,
4144	fmt: "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
4145	}
4146
4147
4148	/**
4149	* qla24xx_detect_sfp()
4150	*
4151	* @vha: adapter state pointer.
4152	*
4153	* @return
4154	* 0 -- Configure firmware to use short-range settings -- normal
4155	* buffer-to-buffer credits.
4156	*
4157	* 1 -- Configure firmware to use long-range settings -- extra
4158	* buffer-to-buffer credits should be allocated with
4159	* ha->lr_distance containing distance settings from NVRAM or SFP
4160	* (if supported).
4161	*/
4162	int
4163	qla24xx_detect_sfp(scsi_qla_host_t *vha)
4164	{
4165	int rc, used_nvram;
4166	struct sff_8247_a0 *a;
4167	struct qla_hw_data *ha = vha->hw;
4168	struct nvram_81xx *nv = ha->nvram;
4169	#define LR_DISTANCE_UNKNOWN 2
4170	static const char * const types[] = { "Short", "Long" };
4171	static const char * const lengths[] = { "(10km)", "(5km)", "" };
4172	u8 ll = 0;
4173
4174	/* Seed with NVRAM settings. */
4175	used_nvram = 0;
4176	ha->flags.lr_detected = 0;
4177	if (IS_BPM_RANGE_CAPABLE(ha) &&
4178	(nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
4179	used_nvram = 1;
4180	ha->flags.lr_detected = 1;
4181	ha->lr_distance =
4182	(nv->enhanced_features >> LR_DIST_NV_POS)
4183	& LR_DIST_NV_MASK;
4184	}
4185
4186	if (!IS_BPM_ENABLED(vha))
4187	goto out;
4188	/* Determine SR/LR capabilities of SFP/Transceiver. */
4189	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
4190	if (rc)
4191	goto out;
4192
4193	used_nvram = 0;
4194	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
4195	qla2xxx_print_sfp_info(vha);
4196
4197	ha->flags.lr_detected = 0;
4198	ll = a->fc_ll_cc7;
4199	if (ll & FC_LL_VL || ll & FC_LL_L) {
4200	/* Long range, track length. */
4201	ha->flags.lr_detected = 1;
4202
4203	if (a->length_km > 5 || a->length_100m > 50)
4204	ha->lr_distance = LR_DISTANCE_10K;
4205	else
4206	ha->lr_distance = LR_DISTANCE_5K;
4207	}
4208
4209	out:
4210	ql_dbg(ql_dbg_async, vha, 0x507b,
4211	fmt: "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
4212	types[ha->flags.lr_detected],
4213	ha->flags.lr_detected ? lengths[ha->lr_distance] :
4214	lengths[LR_DISTANCE_UNKNOWN],
4215	used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
4216	return ha->flags.lr_detected;
4217	}
4218
4219	static void __qla_adjust_iocb_limit(struct qla_qpair *qpair)
4220	{
4221	u8 num_qps;
4222	u16 limit;
4223	struct qla_hw_data *ha = qpair->vha->hw;
4224
4225	num_qps = ha->num_qpairs + 1;
4226	limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4227
4228	qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
4229	qpair->fwres.iocbs_limit = limit;
4230	qpair->fwres.iocbs_qp_limit = limit / num_qps;
4231
4232	qpair->fwres.exch_total = ha->orig_fw_xcb_count;
4233	qpair->fwres.exch_limit = (ha->orig_fw_xcb_count *
4234	QLA_IOCB_PCT_LIMIT) / 100;
4235	}
4236
4237	void qla_init_iocb_limit(scsi_qla_host_t *vha)
4238	{
4239	u8 i;
4240	struct qla_hw_data *ha = vha->hw;
4241
4242	__qla_adjust_iocb_limit(qpair: ha->base_qpair);
4243	ha->base_qpair->fwres.iocbs_used = 0;
4244	ha->base_qpair->fwres.exch_used = 0;
4245
4246	for (i = 0; i < ha->max_qpairs; i++) {
4247	if (ha->queue_pair_map[i]) {
4248	__qla_adjust_iocb_limit(qpair: ha->queue_pair_map[i]);
4249	ha->queue_pair_map[i]->fwres.iocbs_used = 0;
4250	ha->queue_pair_map[i]->fwres.exch_used = 0;
4251	}
4252	}
4253
4254	ha->fwres.iocb_total = ha->orig_fw_iocb_count;
4255	ha->fwres.iocb_limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4256	ha->fwres.exch_total = ha->orig_fw_xcb_count;
4257	ha->fwres.exch_limit = (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100;
4258
4259	atomic_set(v: &ha->fwres.iocb_used, i: 0);
4260	atomic_set(v: &ha->fwres.exch_used, i: 0);
4261	}
4262
4263	void qla_adjust_iocb_limit(scsi_qla_host_t *vha)
4264	{
4265	u8 i;
4266	struct qla_hw_data *ha = vha->hw;
4267
4268	__qla_adjust_iocb_limit(qpair: ha->base_qpair);
4269
4270	for (i = 0; i < ha->max_qpairs; i++) {
4271	if (ha->queue_pair_map[i])
4272	__qla_adjust_iocb_limit(qpair: ha->queue_pair_map[i]);
4273	}
4274	}
4275
4276	/**
4277	* qla2x00_setup_chip() - Load and start RISC firmware.
4278	* @vha: HA context
4279	*
4280	* Returns 0 on success.
4281	*/
4282	static int
4283	qla2x00_setup_chip(scsi_qla_host_t *vha)
4284	{
4285	int rval;
4286	uint32_t srisc_address = 0;
4287	struct qla_hw_data *ha = vha->hw;
4288	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4289	unsigned long flags;
4290	int done_once = 0;
4291
4292	if (IS_P3P_TYPE(ha)) {
4293	rval = ha->isp_ops->load_risc(vha, &srisc_address);
4294	if (rval == QLA_SUCCESS) {
4295	qla2x00_stop_firmware(vha);
4296	goto enable_82xx_npiv;
4297	} else
4298	goto failed;
4299	}
4300
4301	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4302	/* Disable SRAM, Instruction RAM and GP RAM parity. */
4303	spin_lock_irqsave(&ha->hardware_lock, flags);
4304	wrt_reg_word(addr: &reg->hccr, data: (HCCR_ENABLE_PARITY + 0x0));
4305	rd_reg_word(addr: &reg->hccr);
4306	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4307	}
4308
4309	qla81xx_mpi_sync(vha);
4310
4311	execute_fw_with_lr:
4312	/* Load firmware sequences */
4313	rval = ha->isp_ops->load_risc(vha, &srisc_address);
4314	if (rval == QLA_SUCCESS) {
4315	ql_dbg(ql_dbg_init, vha, 0x00c9,
4316	fmt: "Verifying Checksum of loaded RISC code.\n");
4317
4318	rval = qla2x00_verify_checksum(vha, srisc_address);
4319	if (rval == QLA_SUCCESS) {
4320	/* Start firmware execution. */
4321	ql_dbg(ql_dbg_init, vha, 0x00ca,
4322	fmt: "Starting firmware.\n");
4323
4324	if (ql2xexlogins)
4325	ha->flags.exlogins_enabled = 1;
4326
4327	if (qla_is_exch_offld_enabled(vha))
4328	ha->flags.exchoffld_enabled = 1;
4329
4330	rval = qla2x00_execute_fw(vha, srisc_address);
4331	/* Retrieve firmware information. */
4332	if (rval == QLA_SUCCESS) {
4333	/* Enable BPM support? */
4334	if (!done_once++ && qla24xx_detect_sfp(vha)) {
4335	ql_dbg(ql_dbg_init, vha, 0x00ca,
4336	fmt: "Re-starting firmware -- BPM.\n");
4337	/* Best-effort - re-init. */
4338	ha->isp_ops->reset_chip(vha);
4339	ha->isp_ops->chip_diag(vha);
4340	goto execute_fw_with_lr;
4341	}
4342
4343	if (IS_ZIO_THRESHOLD_CAPABLE(ha))
4344	qla27xx_set_zio_threshold(vha,
4345	ha->last_zio_threshold);
4346
4347	rval = qla2x00_set_exlogins_buffer(vha);
4348	if (rval != QLA_SUCCESS)
4349	goto failed;
4350
4351	rval = qla2x00_set_exchoffld_buffer(vha);
4352	if (rval != QLA_SUCCESS)
4353	goto failed;
4354
4355	enable_82xx_npiv:
4356	if (IS_P3P_TYPE(ha))
4357	qla82xx_check_md_needed(vha);
4358	else
4359	rval = qla2x00_get_fw_version(vha);
4360	if (rval != QLA_SUCCESS)
4361	goto failed;
4362	ha->flags.npiv_supported = 0;
4363	if (IS_QLA2XXX_MIDTYPE(ha) &&
4364	(ha->fw_attributes & BIT_2)) {
4365	ha->flags.npiv_supported = 1;
4366	if ((!ha->max_npiv_vports) ||
4367	((ha->max_npiv_vports + 1) %
4368	MIN_MULTI_ID_FABRIC))
4369	ha->max_npiv_vports =
4370	MIN_MULTI_ID_FABRIC - 1;
4371	}
4372	qla2x00_get_resource_cnts(vha);
4373	qla_init_iocb_limit(vha);
4374
4375	/*
4376	* Allocate the array of outstanding commands
4377	* now that we know the firmware resources.
4378	*/
4379	rval = qla2x00_alloc_outstanding_cmds(ha,
4380	req: vha->req);
4381	if (rval != QLA_SUCCESS)
4382	goto failed;
4383
4384	if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
4385	qla2x00_alloc_fw_dump(vha);
4386
4387	qla_enable_fce_trace(vha);
4388	qla_enable_eft_trace(vha);
4389	} else {
4390	goto failed;
4391	}
4392	} else {
4393	ql_log(ql_log_fatal, vha, 0x00cd,
4394	fmt: "ISP Firmware failed checksum.\n");
4395	goto failed;
4396	}
4397
4398	/* Enable PUREX PASSTHRU */
4399	if (ql2xrdpenable || ha->flags.scm_supported_f ||
4400	ha->flags.edif_enabled)
4401	qla25xx_set_els_cmds_supported(vha);
4402	} else
4403	goto failed;
4404
4405	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4406	/* Enable proper parity. */
4407	spin_lock_irqsave(&ha->hardware_lock, flags);
4408	if (IS_QLA2300(ha))
4409	/* SRAM parity */
4410	wrt_reg_word(addr: &reg->hccr, HCCR_ENABLE_PARITY + 0x1);
4411	else
4412	/* SRAM, Instruction RAM and GP RAM parity */
4413	wrt_reg_word(addr: &reg->hccr, HCCR_ENABLE_PARITY + 0x7);
4414	rd_reg_word(addr: &reg->hccr);
4415	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4416	}
4417
4418	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4419	ha->flags.fac_supported = 1;
4420	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
4421	uint32_t size;
4422
4423	rval = qla81xx_fac_get_sector_size(vha, &size);
4424	if (rval == QLA_SUCCESS) {
4425	ha->flags.fac_supported = 1;
4426	ha->fdt_block_size = size << 2;
4427	} else {
4428	ql_log(ql_log_warn, vha, 0x00ce,
4429	fmt: "Unsupported FAC firmware (%d.%02d.%02d).\n",
4430	ha->fw_major_version, ha->fw_minor_version,
4431	ha->fw_subminor_version);
4432
4433	if (IS_QLA83XX(ha)) {
4434	ha->flags.fac_supported = 0;
4435	rval = QLA_SUCCESS;
4436	}
4437	}
4438	}
4439	failed:
4440	if (rval) {
4441	ql_log(ql_log_fatal, vha, 0x00cf,
4442	fmt: "Setup chip ****FAILED****.\n");
4443	}
4444
4445	return (rval);
4446	}
4447
4448	/**
4449	* qla2x00_init_response_q_entries() - Initializes response queue entries.
4450	* @rsp: response queue
4451	*
4452	* Beginning of request ring has initialization control block already built
4453	* by nvram config routine.
4454	*
4455	* Returns 0 on success.
4456	*/
4457	void
4458	qla2x00_init_response_q_entries(struct rsp_que *rsp)
4459	{
4460	uint16_t cnt;
4461	response_t *pkt;
4462
4463	rsp->ring_ptr = rsp->ring;
4464	rsp->ring_index = 0;
4465	rsp->status_srb = NULL;
4466	pkt = rsp->ring_ptr;
4467	for (cnt = 0; cnt < rsp->length; cnt++) {
4468	pkt->signature = RESPONSE_PROCESSED;
4469	pkt++;
4470	}
4471	}
4472
4473	/**
4474	* qla2x00_update_fw_options() - Read and process firmware options.
4475	* @vha: HA context
4476	*
4477	* Returns 0 on success.
4478	*/
4479	void
4480	qla2x00_update_fw_options(scsi_qla_host_t *vha)
4481	{
4482	uint16_t swing, emphasis, tx_sens, rx_sens;
4483	struct qla_hw_data *ha = vha->hw;
4484
4485	memset(ha->fw_options, 0, sizeof(ha->fw_options));
4486	qla2x00_get_fw_options(vha, ha->fw_options);
4487
4488	if (IS_QLA2100(ha) || IS_QLA2200(ha))
4489	return;
4490
4491	/* Serial Link options. */
4492	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4493	fmt: "Serial link options.\n");
4494	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4495	ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4496
4497	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4498	if (ha->fw_seriallink_options[3] & BIT_2) {
4499	ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4500
4501	/* 1G settings */
4502	swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4503	emphasis = (ha->fw_seriallink_options[2] &
4504	(BIT_4 | BIT_3)) >> 3;
4505	tx_sens = ha->fw_seriallink_options[0] &
4506	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4507	rx_sens = (ha->fw_seriallink_options[0] &
4508	(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4509	ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4510	if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4511	if (rx_sens == 0x0)
4512	rx_sens = 0x3;
4513	ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4514	} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4515	ha->fw_options[10] |= BIT_5 |
4516	((rx_sens & (BIT_1 | BIT_0)) << 2) |
4517	(tx_sens & (BIT_1 | BIT_0));
4518
4519	/* 2G settings */
4520	swing = (ha->fw_seriallink_options[2] &
4521	(BIT_7 | BIT_6 | BIT_5)) >> 5;
4522	emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4523	tx_sens = ha->fw_seriallink_options[1] &
4524	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4525	rx_sens = (ha->fw_seriallink_options[1] &
4526	(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4527	ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4528	if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4529	if (rx_sens == 0x0)
4530	rx_sens = 0x3;
4531	ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4532	} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4533	ha->fw_options[11] |= BIT_5 |
4534	((rx_sens & (BIT_1 | BIT_0)) << 2) |
4535	(tx_sens & (BIT_1 | BIT_0));
4536	}
4537
4538	/* FCP2 options. */
4539	/* Return command IOCBs without waiting for an ABTS to complete. */
4540	ha->fw_options[3] |= BIT_13;
4541
4542	/* LED scheme. */
4543	if (ha->flags.enable_led_scheme)
4544	ha->fw_options[2] |= BIT_12;
4545
4546	/* Detect ISP6312. */
4547	if (IS_QLA6312(ha))
4548	ha->fw_options[2] |= BIT_13;
4549
4550	/* Set Retry FLOGI in case of P2P connection */
4551	if (ha->operating_mode == P2P) {
4552	ha->fw_options[2] |= BIT_3;
4553	ql_dbg(ql_dbg_disc, vha, 0x2100,
4554	fmt: "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4555	__func__, ha->fw_options[2]);
4556	}
4557
4558	/* Update firmware options. */
4559	qla2x00_set_fw_options(vha, ha->fw_options);
4560	}
4561
4562	void
4563	qla24xx_update_fw_options(scsi_qla_host_t *vha)
4564	{
4565	int rval;
4566	struct qla_hw_data *ha = vha->hw;
4567
4568	if (IS_P3P_TYPE(ha))
4569	return;
4570
4571	/* Hold status IOCBs until ABTS response received. */
4572	if (ql2xfwholdabts)
4573	ha->fw_options[3] |= BIT_12;
4574
4575	/* Set Retry FLOGI in case of P2P connection */
4576	if (ha->operating_mode == P2P) {
4577	ha->fw_options[2] |= BIT_3;
4578	ql_dbg(ql_dbg_disc, vha, 0x2101,
4579	fmt: "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4580	__func__, ha->fw_options[2]);
4581	}
4582
4583	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
4584	if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4585	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4586	if (qla_tgt_mode_enabled(ha: vha) ||
4587	qla_dual_mode_enabled(ha: vha))
4588	ha->fw_options[2] |= BIT_11;
4589	else
4590	ha->fw_options[2] &= ~BIT_11;
4591	}
4592
4593	if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4594	IS_QLA28XX(ha)) {
4595	/*
4596	* Tell FW to track each exchange to prevent
4597	* driver from using stale exchange.
4598	*/
4599	if (qla_tgt_mode_enabled(ha: vha) ||
4600	qla_dual_mode_enabled(ha: vha))
4601	ha->fw_options[2] |= BIT_4;
4602	else
4603	ha->fw_options[2] &= ~(BIT_4);
4604
4605	/* Reserve 1/2 of emergency exchanges for ELS.*/
4606	if (qla2xuseresexchforels)
4607	ha->fw_options[2] |= BIT_8;
4608	else
4609	ha->fw_options[2] &= ~BIT_8;
4610
4611	/*
4612	* N2N: set Secure=1 for PLOGI ACC and
4613	* fw shal not send PRLI after PLOGI Acc
4614	*/
4615	if (ha->flags.edif_enabled &&
4616	DBELL_ACTIVE(vha)) {
4617	ha->fw_options[3] |= BIT_15;
4618	ha->flags.n2n_fw_acc_sec = 1;
4619	} else {
4620	ha->fw_options[3] &= ~BIT_15;
4621	ha->flags.n2n_fw_acc_sec = 0;
4622	}
4623	}
4624
4625	if (ql2xrdpenable || ha->flags.scm_supported_f ||
4626	ha->flags.edif_enabled)
4627	ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4628
4629	/* Enable Async 8130/8131 events -- transceiver insertion/removal */
4630	if (IS_BPM_RANGE_CAPABLE(ha))
4631	ha->fw_options[3] |= BIT_10;
4632
4633	ql_dbg(ql_dbg_init, vha, 0x00e8,
4634	fmt: "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4635	__func__, ha->fw_options[1], ha->fw_options[2],
4636	ha->fw_options[3], vha->host->active_mode);
4637
4638	if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4639	qla2x00_set_fw_options(vha, ha->fw_options);
4640
4641	/* Update Serial Link options. */
4642	if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4643	return;
4644
4645	rval = qla2x00_set_serdes_params(vha,
4646	le16_to_cpu(ha->fw_seriallink_options24[1]),
4647	le16_to_cpu(ha->fw_seriallink_options24[2]),
4648	le16_to_cpu(ha->fw_seriallink_options24[3]));
4649	if (rval != QLA_SUCCESS) {
4650	ql_log(ql_log_warn, vha, 0x0104,
4651	fmt: "Unable to update Serial Link options (%x).\n", rval);
4652	}
4653	}
4654
4655	void
4656	qla2x00_config_rings(struct scsi_qla_host *vha)
4657	{
4658	struct qla_hw_data *ha = vha->hw;
4659	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4660	struct req_que *req = ha->req_q_map[0];
4661	struct rsp_que *rsp = ha->rsp_q_map[0];
4662
4663	/* Setup ring parameters in initialization control block. */
4664	ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4665	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4666	ha->init_cb->request_q_length = cpu_to_le16(req->length);
4667	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4668	put_unaligned_le64(val: req->dma, p: &ha->init_cb->request_q_address);
4669	put_unaligned_le64(val: rsp->dma, p: &ha->init_cb->response_q_address);
4670
4671	wrt_reg_word(ISP_REQ_Q_IN(ha, reg), data: 0);
4672	wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), data: 0);
4673	wrt_reg_word(ISP_RSP_Q_IN(ha, reg), data: 0);
4674	wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), data: 0);
4675	rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4676	}
4677
4678	void
4679	qla24xx_config_rings(struct scsi_qla_host *vha)
4680	{
4681	struct qla_hw_data *ha = vha->hw;
4682	device_reg_t *reg = ISP_QUE_REG(ha, 0);
4683	struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4684	struct qla_msix_entry *msix;
4685	struct init_cb_24xx *icb;
4686	uint16_t rid = 0;
4687	struct req_que *req = ha->req_q_map[0];
4688	struct rsp_que *rsp = ha->rsp_q_map[0];
4689
4690	/* Setup ring parameters in initialization control block. */
4691	icb = (struct init_cb_24xx *)ha->init_cb;
4692	icb->request_q_outpointer = cpu_to_le16(0);
4693	icb->response_q_inpointer = cpu_to_le16(0);
4694	icb->request_q_length = cpu_to_le16(req->length);
4695	icb->response_q_length = cpu_to_le16(rsp->length);
4696	put_unaligned_le64(val: req->dma, p: &icb->request_q_address);
4697	put_unaligned_le64(val: rsp->dma, p: &icb->response_q_address);
4698
4699	/* Setup ATIO queue dma pointers for target mode */
4700	icb->atio_q_inpointer = cpu_to_le16(0);
4701	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4702	put_unaligned_le64(val: ha->tgt.atio_dma, p: &icb->atio_q_address);
4703
4704	if (IS_SHADOW_REG_CAPABLE(ha))
4705	icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4706
4707	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4708	IS_QLA28XX(ha)) {
4709	icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4710	icb->rid = cpu_to_le16(rid);
4711	if (ha->flags.msix_enabled) {
4712	msix = &ha->msix_entries[1];
4713	ql_dbg(ql_dbg_init, vha, 0x0019,
4714	fmt: "Registering vector 0x%x for base que.\n",
4715	msix->entry);
4716	icb->msix = cpu_to_le16(msix->entry);
4717	}
4718	/* Use alternate PCI bus number */
4719	if (MSB(rid))
4720	icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4721	/* Use alternate PCI devfn */
4722	if (LSB(rid))
4723	icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4724
4725	/* Use Disable MSIX Handshake mode for capable adapters */
4726	if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4727	(ha->flags.msix_enabled)) {
4728	icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4729	ha->flags.disable_msix_handshake = 1;
4730	ql_dbg(ql_dbg_init, vha, 0x00fe,
4731	fmt: "MSIX Handshake Disable Mode turned on.\n");
4732	} else {
4733	icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4734	}
4735	icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4736
4737	wrt_reg_dword(addr: &reg->isp25mq.req_q_in, data: 0);
4738	wrt_reg_dword(addr: &reg->isp25mq.req_q_out, data: 0);
4739	wrt_reg_dword(addr: &reg->isp25mq.rsp_q_in, data: 0);
4740	wrt_reg_dword(addr: &reg->isp25mq.rsp_q_out, data: 0);
4741	} else {
4742	wrt_reg_dword(addr: &reg->isp24.req_q_in, data: 0);
4743	wrt_reg_dword(addr: &reg->isp24.req_q_out, data: 0);
4744	wrt_reg_dword(addr: &reg->isp24.rsp_q_in, data: 0);
4745	wrt_reg_dword(addr: &reg->isp24.rsp_q_out, data: 0);
4746	}
4747
4748	qlt_24xx_config_rings(vha);
4749
4750	/* If the user has configured the speed, set it here */
4751	if (ha->set_data_rate) {
4752	ql_dbg(ql_dbg_init, vha, 0x00fd,
4753	fmt: "Speed set by user : %s Gbps \n",
4754	qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4755	icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4756	}
4757
4758	/* PCI posting */
4759	rd_reg_word(addr: &ioreg->hccr);
4760	}
4761
4762	/**
4763	* qla2x00_init_rings() - Initializes firmware.
4764	* @vha: HA context
4765	*
4766	* Beginning of request ring has initialization control block already built
4767	* by nvram config routine.
4768	*
4769	* Returns 0 on success.
4770	*/
4771	int
4772	qla2x00_init_rings(scsi_qla_host_t *vha)
4773	{
4774	int rval;
4775	unsigned long flags = 0;
4776	int cnt, que;
4777	struct qla_hw_data *ha = vha->hw;
4778	struct req_que *req;
4779	struct rsp_que *rsp;
4780	struct mid_init_cb_24xx *mid_init_cb =
4781	(struct mid_init_cb_24xx *) ha->init_cb;
4782
4783	spin_lock_irqsave(&ha->hardware_lock, flags);
4784
4785	/* Clear outstanding commands array. */
4786	for (que = 0; que < ha->max_req_queues; que++) {
4787	req = ha->req_q_map[que];
4788	if (!req || !test_bit(que, ha->req_qid_map))
4789	continue;
4790	req->out_ptr = (uint16_t *)(req->ring + req->length);
4791	*req->out_ptr = 0;
4792	for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4793	req->outstanding_cmds[cnt] = NULL;
4794
4795	req->current_outstanding_cmd = 1;
4796
4797	/* Initialize firmware. */
4798	req->ring_ptr = req->ring;
4799	req->ring_index = 0;
4800	req->cnt = req->length;
4801	}
4802
4803	for (que = 0; que < ha->max_rsp_queues; que++) {
4804	rsp = ha->rsp_q_map[que];
4805	if (!rsp || !test_bit(que, ha->rsp_qid_map))
4806	continue;
4807	rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4808	*rsp->in_ptr = 0;
4809	/* Initialize response queue entries */
4810	if (IS_QLAFX00(ha))
4811	qlafx00_init_response_q_entries(rsp);
4812	else
4813	qla2x00_init_response_q_entries(rsp);
4814	}
4815
4816	ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4817	ha->tgt.atio_ring_index = 0;
4818	/* Initialize ATIO queue entries */
4819	qlt_init_atio_q_entries(vha);
4820
4821	ha->isp_ops->config_rings(vha);
4822
4823	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
4824
4825	if (IS_QLAFX00(ha)) {
4826	rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4827	goto next_check;
4828	}
4829
4830	/* Update any ISP specific firmware options before initialization. */
4831	ha->isp_ops->update_fw_options(vha);
4832
4833	ql_dbg(ql_dbg_init, vha, 0x00d1,
4834	fmt: "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4835	le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4836	le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4837	le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4838
4839	if (ha->flags.npiv_supported) {
4840	if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4841	ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4842	mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4843	}
4844
4845	if (IS_FWI2_CAPABLE(ha)) {
4846	mid_init_cb->options = cpu_to_le16(BIT_1);
4847	mid_init_cb->init_cb.execution_throttle =
4848	cpu_to_le16(ha->cur_fw_xcb_count);
4849	ha->flags.dport_enabled =
4850	(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4851	BIT_7) != 0;
4852	ql_dbg(ql_dbg_init, vha, 0x0191, fmt: "DPORT Support: %s.\n",
4853	(ha->flags.dport_enabled) ? "enabled" : "disabled");
4854	/* FA-WWPN Status */
4855	ha->flags.fawwpn_enabled =
4856	(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4857	BIT_6) != 0;
4858	ql_dbg(ql_dbg_init, vha, 0x00bc, fmt: "FA-WWPN Support: %s.\n",
4859	(ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4860	/* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4861	memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4862	}
4863
4864	/* ELS pass through payload is limit by frame size. */
4865	if (ha->flags.edif_enabled)
4866	mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
4867
4868	QLA_FW_STARTED(ha);
4869	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4870	next_check:
4871	if (rval) {
4872	QLA_FW_STOPPED(ha);
4873	ql_log(ql_log_fatal, vha, 0x00d2,
4874	fmt: "Init Firmware **** FAILED ****.\n");
4875	} else {
4876	ql_dbg(ql_dbg_init, vha, 0x00d3,
4877	fmt: "Init Firmware -- success.\n");
4878	vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4879	}
4880
4881	return (rval);
4882	}
4883
4884	/**
4885	* qla2x00_fw_ready() - Waits for firmware ready.
4886	* @vha: HA context
4887	*
4888	* Returns 0 on success.
4889	*/
4890	static int
4891	qla2x00_fw_ready(scsi_qla_host_t *vha)
4892	{
4893	int rval;
4894	unsigned long wtime, mtime, cs84xx_time;
4895	uint16_t min_wait; /* Minimum wait time if loop is down */
4896	uint16_t wait_time; /* Wait time if loop is coming ready */
4897	uint16_t state[6];
4898	struct qla_hw_data *ha = vha->hw;
4899
4900	if (IS_QLAFX00(vha->hw))
4901	return qlafx00_fw_ready(vha);
4902
4903	/* Time to wait for loop down */
4904	if (IS_P3P_TYPE(ha))
4905	min_wait = 30;
4906	else
4907	min_wait = 20;
4908
4909	/*
4910	* Firmware should take at most one RATOV to login, plus 5 seconds for
4911	* our own processing.
4912	*/
4913	if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4914	wait_time = min_wait;
4915	}
4916
4917	/* Min wait time if loop down */
4918	mtime = jiffies + (min_wait * HZ);
4919
4920	/* wait time before firmware ready */
4921	wtime = jiffies + (wait_time * HZ);
4922
4923	/* Wait for ISP to finish LIP */
4924	if (!vha->flags.init_done)
4925	ql_log(ql_log_info, vha, 0x801e,
4926	fmt: "Waiting for LIP to complete.\n");
4927
4928	do {
4929	memset(state, -1, sizeof(state));
4930	rval = qla2x00_get_firmware_state(vha, state);
4931	if (rval == QLA_SUCCESS) {
4932	if (state[0] < FSTATE_LOSS_OF_SYNC) {
4933	vha->device_flags &= ~DFLG_NO_CABLE;
4934	}
4935	if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4936	ql_dbg(ql_dbg_taskm, vha, 0x801f,
4937	fmt: "fw_state=%x 84xx=%x.\n", state[0],
4938	state[2]);
4939	if ((state[2] & FSTATE_LOGGED_IN) &&
4940	(state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4941	ql_dbg(ql_dbg_taskm, vha, 0x8028,
4942	fmt: "Sending verify iocb.\n");
4943
4944	cs84xx_time = jiffies;
4945	rval = qla84xx_init_chip(vha);
4946	if (rval != QLA_SUCCESS) {
4947	ql_log(ql_log_warn,
4948	vha, 0x8007,
4949	fmt: "Init chip failed.\n");
4950	break;
4951	}
4952
4953	/* Add time taken to initialize. */
4954	cs84xx_time = jiffies - cs84xx_time;
4955	wtime += cs84xx_time;
4956	mtime += cs84xx_time;
4957	ql_dbg(ql_dbg_taskm, vha, 0x8008,
4958	fmt: "Increasing wait time by %ld. "
4959	"New time %ld.\n", cs84xx_time,
4960	wtime);
4961	}
4962	} else if (state[0] == FSTATE_READY) {
4963	ql_dbg(ql_dbg_taskm, vha, 0x8037,
4964	fmt: "F/W Ready - OK.\n");
4965
4966	qla2x00_get_retry_cnt(vha, &ha->retry_count,
4967	&ha->login_timeout, &ha->r_a_tov);
4968
4969	rval = QLA_SUCCESS;
4970	break;
4971	}
4972
4973	rval = QLA_FUNCTION_FAILED;
4974
4975	if (atomic_read(v: &vha->loop_down_timer) &&
4976	state[0] != FSTATE_READY) {
4977	/* Loop down. Timeout on min_wait for states
4978	* other than Wait for Login.
4979	*/
4980	if (time_after_eq(jiffies, mtime)) {
4981	ql_log(ql_log_info, vha, 0x8038,
4982	fmt: "Cable is unplugged...\n");
4983
4984	vha->device_flags |= DFLG_NO_CABLE;
4985	break;
4986	}
4987	}
4988	} else {
4989	/* Mailbox cmd failed. Timeout on min_wait. */
4990	if (time_after_eq(jiffies, mtime) ||
4991	ha->flags.isp82xx_fw_hung)
4992	break;
4993	}
4994
4995	if (time_after_eq(jiffies, wtime))
4996	break;
4997
4998	/* Delay for a while */
4999	msleep(msecs: 500);
5000	} while (1);
5001
5002	ql_dbg(ql_dbg_taskm, vha, 0x803a,
5003	fmt: "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
5004	state[1], state[2], state[3], state[4], state[5], jiffies);
5005
5006	if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
5007	ql_log(ql_log_warn, vha, 0x803b,
5008	fmt: "Firmware ready **** FAILED ****.\n");
5009	}
5010
5011	return (rval);
5012	}
5013
5014	/*
5015	* qla2x00_configure_hba
5016	* Setup adapter context.
5017	*
5018	* Input:
5019	* ha = adapter state pointer.
5020	*
5021	* Returns:
5022	* 0 = success
5023	*
5024	* Context:
5025	* Kernel context.
5026	*/
5027	static int
5028	qla2x00_configure_hba(scsi_qla_host_t *vha)
5029	{
5030	int rval;
5031	uint16_t loop_id;
5032	uint16_t topo;
5033	uint16_t sw_cap;
5034	uint8_t al_pa;
5035	uint8_t area;
5036	uint8_t domain;
5037	char connect_type[22];
5038	struct qla_hw_data *ha = vha->hw;
5039	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev: ha->pdev);
5040	port_id_t id;
5041	unsigned long flags;
5042
5043	/* Get host addresses. */
5044	rval = qla2x00_get_adapter_id(vha,
5045	&loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
5046	if (rval != QLA_SUCCESS) {
5047	if (LOOP_TRANSITION(vha) || atomic_read(v: &ha->loop_down_timer) ||
5048	IS_CNA_CAPABLE(ha) ||
5049	(rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
5050	ql_dbg(ql_dbg_disc, vha, 0x2008,
5051	fmt: "Loop is in a transition state.\n");
5052	} else {
5053	ql_log(ql_log_warn, vha, 0x2009,
5054	fmt: "Unable to get host loop ID.\n");
5055	if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
5056	(rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
5057	ql_log(ql_log_warn, vha, 0x1151,
5058	fmt: "Doing link init.\n");
5059	if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
5060	return rval;
5061	}
5062	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
5063	}
5064	return (rval);
5065	}
5066
5067	if (topo == 4) {
5068	ql_log(ql_log_info, vha, 0x200a,
5069	fmt: "Cannot get topology - retrying.\n");
5070	return (QLA_FUNCTION_FAILED);
5071	}
5072
5073	vha->loop_id = loop_id;
5074
5075	/* initialize */
5076	ha->min_external_loopid = SNS_FIRST_LOOP_ID;
5077	ha->operating_mode = LOOP;
5078
5079	switch (topo) {
5080	case 0:
5081	ql_dbg(ql_dbg_disc, vha, 0x200b, fmt: "HBA in NL topology.\n");
5082	ha->switch_cap = 0;
5083	ha->current_topology = ISP_CFG_NL;
5084	strcpy(p: connect_type, q: "(Loop)");
5085	break;
5086
5087	case 1:
5088	ql_dbg(ql_dbg_disc, vha, 0x200c, fmt: "HBA in FL topology.\n");
5089	ha->switch_cap = sw_cap;
5090	ha->current_topology = ISP_CFG_FL;
5091	strcpy(p: connect_type, q: "(FL_Port)");
5092	break;
5093
5094	case 2:
5095	ql_dbg(ql_dbg_disc, vha, 0x200d, fmt: "HBA in N P2P topology.\n");
5096	ha->switch_cap = 0;
5097	ha->operating_mode = P2P;
5098	ha->current_topology = ISP_CFG_N;
5099	strcpy(p: connect_type, q: "(N_Port-to-N_Port)");
5100	break;
5101
5102	case 3:
5103	ql_dbg(ql_dbg_disc, vha, 0x200e, fmt: "HBA in F P2P topology.\n");
5104	ha->switch_cap = sw_cap;
5105	ha->operating_mode = P2P;
5106	ha->current_topology = ISP_CFG_F;
5107	strcpy(p: connect_type, q: "(F_Port)");
5108	break;
5109
5110	default:
5111	ql_dbg(ql_dbg_disc, vha, 0x200f,
5112	fmt: "HBA in unknown topology %x, using NL.\n", topo);
5113	ha->switch_cap = 0;
5114	ha->current_topology = ISP_CFG_NL;
5115	strcpy(p: connect_type, q: "(Loop)");
5116	break;
5117	}
5118
5119	/* Save Host port and loop ID. */
5120	/* byte order - Big Endian */
5121	id.b.domain = domain;
5122	id.b.area = area;
5123	id.b.al_pa = al_pa;
5124	id.b.rsvd_1 = 0;
5125	spin_lock_irqsave(&ha->hardware_lock, flags);
5126	if (vha->hw->flags.edif_enabled) {
5127	if (topo != 2)
5128	qla_update_host_map(vha, id);
5129	} else if (!(topo == 2 && ha->flags.n2n_bigger))
5130	qla_update_host_map(vha, id);
5131	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
5132
5133	if (!vha->flags.init_done)
5134	ql_log(ql_log_info, vha, 0x2010,
5135	fmt: "Topology - %s, Host Loop address 0x%x.\n",
5136	connect_type, vha->loop_id);
5137
5138	return(rval);
5139	}
5140
5141	inline void
5142	qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
5143	const char *def)
5144	{
5145	char *st, *en;
5146	uint16_t index;
5147	uint64_t zero[2] = { 0 };
5148	struct qla_hw_data *ha = vha->hw;
5149	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
5150	!IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
5151
5152	if (len > sizeof(zero))
5153	len = sizeof(zero);
5154	if (memcmp(p: model, q: &zero, size: len) != 0) {
5155	memcpy(ha->model_number, model, len);
5156	st = en = ha->model_number;
5157	en += len - 1;
5158	while (en > st) {
5159	if (*en != 0x20 && *en != 0x00)
5160	break;
5161	*en-- = '\0';
5162	}
5163
5164	index = (ha->pdev->subsystem_device & 0xff);
5165	if (use_tbl &&
5166	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5167	index < QLA_MODEL_NAMES)
5168	strscpy(ha->model_desc,
5169	qla2x00_model_name[index * 2 + 1],
5170	sizeof(ha->model_desc));
5171	} else {
5172	index = (ha->pdev->subsystem_device & 0xff);
5173	if (use_tbl &&
5174	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5175	index < QLA_MODEL_NAMES) {
5176	strscpy(ha->model_number,
5177	qla2x00_model_name[index * 2],
5178	sizeof(ha->model_number));
5179	strscpy(ha->model_desc,
5180	qla2x00_model_name[index * 2 + 1],
5181	sizeof(ha->model_desc));
5182	} else {
5183	strscpy(ha->model_number, def,
5184	sizeof(ha->model_number));
5185	}
5186	}
5187	if (IS_FWI2_CAPABLE(ha))
5188	qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
5189	sizeof(ha->model_desc));
5190	}
5191
5192	/* On sparc systems, obtain port and node WWN from firmware
5193	* properties.
5194	*/
5195	static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
5196	{
5197	#ifdef CONFIG_SPARC
5198	struct qla_hw_data *ha = vha->hw;
5199	struct pci_dev *pdev = ha->pdev;
5200	struct device_node *dp = pci_device_to_OF_node(pdev);
5201	const u8 *val;
5202	int len;
5203
5204	val = of_get_property(dp, "port-wwn", &len);
5205	if (val && len >= WWN_SIZE)
5206	memcpy(nv->port_name, val, WWN_SIZE);
5207
5208	val = of_get_property(dp, "node-wwn", &len);
5209	if (val && len >= WWN_SIZE)
5210	memcpy(nv->node_name, val, WWN_SIZE);
5211	#endif
5212	}
5213
5214	/*
5215	* NVRAM configuration for ISP 2xxx
5216	*
5217	* Input:
5218	* ha = adapter block pointer.
5219	*
5220	* Output:
5221	* initialization control block in response_ring
5222	* host adapters parameters in host adapter block
5223	*
5224	* Returns:
5225	* 0 = success.
5226	*/
5227	int
5228	qla2x00_nvram_config(scsi_qla_host_t *vha)
5229	{
5230	int rval;
5231	uint8_t chksum = 0;
5232	uint16_t cnt;
5233	uint8_t *dptr1, *dptr2;
5234	struct qla_hw_data *ha = vha->hw;
5235	init_cb_t *icb = ha->init_cb;
5236	nvram_t *nv = ha->nvram;
5237	uint8_t *ptr = ha->nvram;
5238	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5239
5240	rval = QLA_SUCCESS;
5241
5242	/* Determine NVRAM starting address. */
5243	ha->nvram_size = sizeof(*nv);
5244	ha->nvram_base = 0;
5245	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
5246	if ((rd_reg_word(addr: &reg->ctrl_status) >> 14) == 1)
5247	ha->nvram_base = 0x80;
5248
5249	/* Get NVRAM data and calculate checksum. */
5250	ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
5251	for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
5252	chksum += *ptr++;
5253
5254	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
5255	fmt: "Contents of NVRAM.\n");
5256	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
5257	nv, ha->nvram_size);
5258
5259	/* Bad NVRAM data, set defaults parameters. */
5260	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
5261	nv->nvram_version < 1) {
5262	/* Reset NVRAM data. */
5263	ql_log(ql_log_warn, vha, 0x0064,
5264	fmt: "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
5265	chksum, nv->id, nv->nvram_version);
5266	ql_log(ql_log_warn, vha, 0x0065,
5267	fmt: "Falling back to "
5268	"functioning (yet invalid -- WWPN) defaults.\n");
5269
5270	/*
5271	* Set default initialization control block.
5272	*/
5273	memset(nv, 0, ha->nvram_size);
5274	nv->parameter_block_version = ICB_VERSION;
5275
5276	if (IS_QLA23XX(ha)) {
5277	nv->firmware_options[0] = BIT_2 | BIT_1;
5278	nv->firmware_options[1] = BIT_7 | BIT_5;
5279	nv->add_firmware_options[0] = BIT_5;
5280	nv->add_firmware_options[1] = BIT_5 | BIT_4;
5281	nv->frame_payload_size = cpu_to_le16(2048);
5282	nv->special_options[1] = BIT_7;
5283	} else if (IS_QLA2200(ha)) {
5284	nv->firmware_options[0] = BIT_2 | BIT_1;
5285	nv->firmware_options[1] = BIT_7 | BIT_5;
5286	nv->add_firmware_options[0] = BIT_5;
5287	nv->add_firmware_options[1] = BIT_5 | BIT_4;
5288	nv->frame_payload_size = cpu_to_le16(1024);
5289	} else if (IS_QLA2100(ha)) {
5290	nv->firmware_options[0] = BIT_3 | BIT_1;
5291	nv->firmware_options[1] = BIT_5;
5292	nv->frame_payload_size = cpu_to_le16(1024);
5293	}
5294
5295	nv->max_iocb_allocation = cpu_to_le16(256);
5296	nv->execution_throttle = cpu_to_le16(16);
5297	nv->retry_count = 8;
5298	nv->retry_delay = 1;
5299
5300	nv->port_name[0] = 33;
5301	nv->port_name[3] = 224;
5302	nv->port_name[4] = 139;
5303
5304	qla2xxx_nvram_wwn_from_ofw(vha, nv);
5305
5306	nv->login_timeout = 4;
5307
5308	/*
5309	* Set default host adapter parameters
5310	*/
5311	nv->host_p[1] = BIT_2;
5312	nv->reset_delay = 5;
5313	nv->port_down_retry_count = 8;
5314	nv->max_luns_per_target = cpu_to_le16(8);
5315	nv->link_down_timeout = 60;
5316
5317	rval = 1;
5318	}
5319
5320	/* Reset Initialization control block */
5321	memset(icb, 0, ha->init_cb_size);
5322
5323	/*
5324	* Setup driver NVRAM options.
5325	*/
5326	nv->firmware_options[0] |= (BIT_6 | BIT_1);
5327	nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
5328	nv->firmware_options[1] |= (BIT_5 | BIT_0);
5329	nv->firmware_options[1] &= ~BIT_4;
5330
5331	if (IS_QLA23XX(ha)) {
5332	nv->firmware_options[0] |= BIT_2;
5333	nv->firmware_options[0] &= ~BIT_3;
5334	nv->special_options[0] &= ~BIT_6;
5335	nv->add_firmware_options[1] |= BIT_5 | BIT_4;
5336
5337	if (IS_QLA2300(ha)) {
5338	if (ha->fb_rev == FPM_2310) {
5339	strcpy(p: ha->model_number, q: "QLA2310");
5340	} else {
5341	strcpy(p: ha->model_number, q: "QLA2300");
5342	}
5343	} else {
5344	qla2x00_set_model_info(vha, model: nv->model_number,
5345	len: sizeof(nv->model_number), def: "QLA23xx");
5346	}
5347	} else if (IS_QLA2200(ha)) {
5348	nv->firmware_options[0] |= BIT_2;
5349	/*
5350	* 'Point-to-point preferred, else loop' is not a safe
5351	* connection mode setting.
5352	*/
5353	if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
5354	(BIT_5 | BIT_4)) {
5355	/* Force 'loop preferred, else point-to-point'. */
5356	nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
5357	nv->add_firmware_options[0] |= BIT_5;
5358	}
5359	strcpy(p: ha->model_number, q: "QLA22xx");
5360	} else /*if (IS_QLA2100(ha))*/ {
5361	strcpy(p: ha->model_number, q: "QLA2100");
5362	}
5363
5364	/*
5365	* Copy over NVRAM RISC parameter block to initialization control block.
5366	*/
5367	dptr1 = (uint8_t *)icb;
5368	dptr2 = (uint8_t *)&nv->parameter_block_version;
5369	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
5370	while (cnt--)
5371	*dptr1++ = *dptr2++;
5372
5373	/* Copy 2nd half. */
5374	dptr1 = (uint8_t *)icb->add_firmware_options;
5375	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
5376	while (cnt--)
5377	*dptr1++ = *dptr2++;
5378	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5379	/* Use alternate WWN? */
5380	if (nv->host_p[1] & BIT_7) {
5381	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5382	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5383	}
5384
5385	/* Prepare nodename */
5386	if ((icb->firmware_options[1] & BIT_6) == 0) {
5387	/*
5388	* Firmware will apply the following mask if the nodename was
5389	* not provided.
5390	*/
5391	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5392	icb->node_name[0] &= 0xF0;
5393	}
5394
5395	/*
5396	* Set host adapter parameters.
5397	*/
5398
5399	/*
5400	* BIT_7 in the host-parameters section allows for modification to
5401	* internal driver logging.
5402	*/
5403	if (nv->host_p[0] & BIT_7)
5404	ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
5405	ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
5406	/* Always load RISC code on non ISP2[12]00 chips. */
5407	if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
5408	ha->flags.disable_risc_code_load = 0;
5409	ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
5410	ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
5411	ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
5412	ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
5413	ha->flags.disable_serdes = 0;
5414
5415	ha->operating_mode =
5416	(icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
5417
5418	memcpy(ha->fw_seriallink_options, nv->seriallink_options,
5419	sizeof(ha->fw_seriallink_options));
5420
5421	/* save HBA serial number */
5422	ha->serial0 = icb->port_name[5];
5423	ha->serial1 = icb->port_name[6];
5424	ha->serial2 = icb->port_name[7];
5425	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5426	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5427
5428	icb->execution_throttle = cpu_to_le16(0xFFFF);
5429
5430	ha->retry_count = nv->retry_count;
5431
5432	/* Set minimum login_timeout to 4 seconds. */
5433	if (nv->login_timeout != ql2xlogintimeout)
5434	nv->login_timeout = ql2xlogintimeout;
5435	if (nv->login_timeout < 4)
5436	nv->login_timeout = 4;
5437	ha->login_timeout = nv->login_timeout;
5438
5439	/* Set minimum RATOV to 100 tenths of a second. */
5440	ha->r_a_tov = 100;
5441
5442	ha->loop_reset_delay = nv->reset_delay;
5443
5444	/* Link Down Timeout = 0:
5445	*
5446	* When Port Down timer expires we will start returning
5447	* I/O's to OS with "DID_NO_CONNECT".
5448	*
5449	* Link Down Timeout != 0:
5450	*
5451	* The driver waits for the link to come up after link down
5452	* before returning I/Os to OS with "DID_NO_CONNECT".
5453	*/
5454	if (nv->link_down_timeout == 0) {
5455	ha->loop_down_abort_time =
5456	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5457	} else {
5458	ha->link_down_timeout = nv->link_down_timeout;
5459	ha->loop_down_abort_time =
5460	(LOOP_DOWN_TIME - ha->link_down_timeout);
5461	}
5462
5463	/*
5464	* Need enough time to try and get the port back.
5465	*/
5466	ha->port_down_retry_count = nv->port_down_retry_count;
5467	if (qlport_down_retry)
5468	ha->port_down_retry_count = qlport_down_retry;
5469	/* Set login_retry_count */
5470	ha->login_retry_count = nv->retry_count;
5471	if (ha->port_down_retry_count == nv->port_down_retry_count &&
5472	ha->port_down_retry_count > 3)
5473	ha->login_retry_count = ha->port_down_retry_count;
5474	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5475	ha->login_retry_count = ha->port_down_retry_count;
5476	if (ql2xloginretrycount)
5477	ha->login_retry_count = ql2xloginretrycount;
5478
5479	icb->lun_enables = cpu_to_le16(0);
5480	icb->command_resource_count = 0;
5481	icb->immediate_notify_resource_count = 0;
5482	icb->timeout = cpu_to_le16(0);
5483
5484	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5485	/* Enable RIO */
5486	icb->firmware_options[0] &= ~BIT_3;
5487	icb->add_firmware_options[0] &=
5488	~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5489	icb->add_firmware_options[0] |= BIT_2;
5490	icb->response_accumulation_timer = 3;
5491	icb->interrupt_delay_timer = 5;
5492
5493	vha->flags.process_response_queue = 1;
5494	} else {
5495	/* Enable ZIO. */
5496	if (!vha->flags.init_done) {
5497	ha->zio_mode = icb->add_firmware_options[0] &
5498	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5499	ha->zio_timer = icb->interrupt_delay_timer ?
5500	icb->interrupt_delay_timer : 2;
5501	}
5502	icb->add_firmware_options[0] &=
5503	~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5504	vha->flags.process_response_queue = 0;
5505	if (ha->zio_mode != QLA_ZIO_DISABLED) {
5506	ha->zio_mode = QLA_ZIO_MODE_6;
5507
5508	ql_log(ql_log_info, vha, 0x0068,
5509	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
5510	ha->zio_mode, ha->zio_timer * 100);
5511
5512	icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5513	icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5514	vha->flags.process_response_queue = 1;
5515	}
5516	}
5517
5518	if (rval) {
5519	ql_log(ql_log_warn, vha, 0x0069,
5520	fmt: "NVRAM configuration failed.\n");
5521	}
5522	return (rval);
5523	}
5524
5525	void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5526	{
5527	int old_state;
5528
5529	old_state = atomic_read(v: &fcport->state);
5530	atomic_set(v: &fcport->state, i: state);
5531
5532	/* Don't print state transitions during initial allocation of fcport */
5533	if (old_state && old_state != state) {
5534	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x207d,
5535	fmt: "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5536	fcport->port_name, port_state_str[old_state],
5537	port_state_str[state], fcport->d_id.b.domain,
5538	fcport->d_id.b.area, fcport->d_id.b.al_pa);
5539	}
5540	}
5541
5542	/**
5543	* qla2x00_alloc_fcport() - Allocate a generic fcport.
5544	* @vha: HA context
5545	* @flags: allocation flags
5546	*
5547	* Returns a pointer to the allocated fcport, or NULL, if none available.
5548	*/
5549	fc_port_t *
5550	qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5551	{
5552	fc_port_t *fcport;
5553
5554	fcport = kzalloc(sizeof(fc_port_t), flags);
5555	if (!fcport)
5556	return NULL;
5557
5558	fcport->ct_desc.ct_sns = dma_alloc_coherent(dev: &vha->hw->pdev->dev,
5559	size: sizeof(struct ct_sns_pkt), dma_handle: &fcport->ct_desc.ct_sns_dma,
5560	gfp: flags);
5561	if (!fcport->ct_desc.ct_sns) {
5562	ql_log(ql_log_warn, vha, 0xd049,
5563	fmt: "Failed to allocate ct_sns request.\n");
5564	kfree(objp: fcport);
5565	return NULL;
5566	}
5567
5568	/* Setup fcport template structure. */
5569	fcport->vha = vha;
5570	fcport->port_type = FCT_UNKNOWN;
5571	fcport->loop_id = FC_NO_LOOP_ID;
5572	qla2x00_set_fcport_state(fcport, state: FCS_UNCONFIGURED);
5573	fcport->supported_classes = FC_COS_UNSPECIFIED;
5574	fcport->fp_speed = PORT_SPEED_UNKNOWN;
5575
5576	fcport->disc_state = DSC_DELETED;
5577	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5578	fcport->deleted = QLA_SESS_DELETED;
5579	fcport->login_retry = vha->hw->login_retry_count;
5580	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5581	fcport->logout_on_delete = 1;
5582	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5583	fcport->tgt_short_link_down_cnt = 0;
5584	fcport->dev_loss_tmo = 0;
5585
5586	if (!fcport->ct_desc.ct_sns) {
5587	ql_log(ql_log_warn, vha, 0xd049,
5588	fmt: "Failed to allocate ct_sns request.\n");
5589	kfree(objp: fcport);
5590	return NULL;
5591	}
5592
5593	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5594	INIT_WORK(&fcport->free_work, qlt_free_session_done);
5595	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5596	INIT_LIST_HEAD(list: &fcport->gnl_entry);
5597	INIT_LIST_HEAD(list: &fcport->list);
5598	INIT_LIST_HEAD(list: &fcport->unsol_ctx_head);
5599
5600	INIT_LIST_HEAD(list: &fcport->sess_cmd_list);
5601	spin_lock_init(&fcport->sess_cmd_lock);
5602
5603	spin_lock_init(&fcport->edif.sa_list_lock);
5604	INIT_LIST_HEAD(list: &fcport->edif.tx_sa_list);
5605	INIT_LIST_HEAD(list: &fcport->edif.rx_sa_list);
5606
5607	spin_lock_init(&fcport->edif.indx_list_lock);
5608	INIT_LIST_HEAD(list: &fcport->edif.edif_indx_list);
5609
5610	return fcport;
5611	}
5612
5613	void
5614	qla2x00_free_fcport(fc_port_t *fcport)
5615	{
5616	if (fcport->ct_desc.ct_sns) {
5617	dma_free_coherent(dev: &fcport->vha->hw->pdev->dev,
5618	size: sizeof(struct ct_sns_pkt), cpu_addr: fcport->ct_desc.ct_sns,
5619	dma_handle: fcport->ct_desc.ct_sns_dma);
5620
5621	fcport->ct_desc.ct_sns = NULL;
5622	}
5623
5624	qla_edif_flush_sa_ctl_lists(fcport);
5625	list_del(entry: &fcport->list);
5626	qla2x00_clear_loop_id(fcport);
5627
5628	qla_edif_list_del(fcport);
5629
5630	kfree(objp: fcport);
5631	}
5632
5633	static void qla_get_login_template(scsi_qla_host_t *vha)
5634	{
5635	struct qla_hw_data *ha = vha->hw;
5636	int rval;
5637	u32 *bp, sz;
5638	__be32 *q;
5639
5640	memset(ha->init_cb, 0, ha->init_cb_size);
5641	sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5642	rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5643	ha->init_cb, sz);
5644	if (rval != QLA_SUCCESS) {
5645	ql_dbg(ql_dbg_init, vha, 0x00d1,
5646	fmt: "PLOGI ELS param read fail.\n");
5647	return;
5648	}
5649	q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5650
5651	bp = (uint32_t *)ha->init_cb;
5652	cpu_to_be32_array(dst: q, src: bp, len: sz / 4);
5653	ha->flags.plogi_template_valid = 1;
5654	}
5655
5656	/*
5657	* qla2x00_configure_loop
5658	* Updates Fibre Channel Device Database with what is actually on loop.
5659	*
5660	* Input:
5661	* ha = adapter block pointer.
5662	*
5663	* Returns:
5664	* 0 = success.
5665	* 1 = error.
5666	* 2 = database was full and device was not configured.
5667	*/
5668	static int
5669	qla2x00_configure_loop(scsi_qla_host_t *vha)
5670	{
5671	int rval;
5672	unsigned long flags, save_flags;
5673	struct qla_hw_data *ha = vha->hw;
5674
5675	rval = QLA_SUCCESS;
5676
5677	/* Get Initiator ID */
5678	if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5679	rval = qla2x00_configure_hba(vha);
5680	if (rval != QLA_SUCCESS) {
5681	ql_dbg(ql_dbg_disc, vha, 0x2013,
5682	fmt: "Unable to configure HBA.\n");
5683	return (rval);
5684	}
5685	}
5686
5687	save_flags = flags = vha->dpc_flags;
5688	ql_dbg(ql_dbg_disc, vha, 0x2014,
5689	fmt: "Configure loop -- dpc flags = 0x%lx.\n", flags);
5690
5691	/*
5692	* If we have both an RSCN and PORT UPDATE pending then handle them
5693	* both at the same time.
5694	*/
5695	clear_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5696	clear_bit(RSCN_UPDATE, addr: &vha->dpc_flags);
5697
5698	qla2x00_get_data_rate(vha);
5699	qla_get_login_template(vha);
5700
5701	/* Determine what we need to do */
5702	if ((ha->current_topology == ISP_CFG_FL ||
5703	ha->current_topology == ISP_CFG_F) &&
5704	(test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5705
5706	set_bit(RSCN_UPDATE, addr: &flags);
5707	clear_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5708
5709	} else if (ha->current_topology == ISP_CFG_NL ||
5710	ha->current_topology == ISP_CFG_N) {
5711	clear_bit(RSCN_UPDATE, addr: &flags);
5712	set_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5713	} else if (!vha->flags.online ||
5714	(test_bit(ABORT_ISP_ACTIVE, &flags))) {
5715	set_bit(RSCN_UPDATE, addr: &flags);
5716	set_bit(LOCAL_LOOP_UPDATE, addr: &flags);
5717	}
5718
5719	if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5720	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5721	ql_dbg(ql_dbg_disc, vha, 0x2015,
5722	fmt: "Loop resync needed, failing.\n");
5723	rval = QLA_FUNCTION_FAILED;
5724	} else
5725	rval = qla2x00_configure_local_loop(vha);
5726	}
5727
5728	if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5729	if (LOOP_TRANSITION(vha)) {
5730	ql_dbg(ql_dbg_disc, vha, 0x2099,
5731	fmt: "Needs RSCN update and loop transition.\n");
5732	rval = QLA_FUNCTION_FAILED;
5733	}
5734	else
5735	rval = qla2x00_configure_fabric(vha);
5736	}
5737
5738	if (rval == QLA_SUCCESS) {
5739	if (atomic_read(v: &vha->loop_down_timer) ||
5740	test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5741	rval = QLA_FUNCTION_FAILED;
5742	} else {
5743	atomic_set(v: &vha->loop_state, LOOP_READY);
5744	ql_dbg(ql_dbg_disc, vha, 0x2069,
5745	fmt: "LOOP READY.\n");
5746	ha->flags.fw_init_done = 1;
5747
5748	/*
5749	* use link up to wake up app to get ready for
5750	* authentication.
5751	*/
5752	if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
5753	qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
5754	ha->link_data_rate);
5755
5756	/*
5757	* Process any ATIO queue entries that came in
5758	* while we weren't online.
5759	*/
5760	if (qla_tgt_mode_enabled(ha: vha) ||
5761	qla_dual_mode_enabled(ha: vha)) {
5762	spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5763	qlt_24xx_process_atio_queue(vha, 0);
5764	spin_unlock_irqrestore(lock: &ha->tgt.atio_lock,
5765	flags);
5766	}
5767	}
5768	}
5769
5770	if (rval) {
5771	ql_dbg(ql_dbg_disc, vha, 0x206a,
5772	fmt: "%s *** FAILED ***.\n", __func__);
5773	} else {
5774	ql_dbg(ql_dbg_disc, vha, 0x206b,
5775	fmt: "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5776	__func__, vha->port_name, vha->d_id.b24);
5777	}
5778
5779	/* Restore state if a resync event occurred during processing */
5780	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5781	if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5782	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5783	if (test_bit(RSCN_UPDATE, &save_flags)) {
5784	set_bit(RSCN_UPDATE, addr: &vha->dpc_flags);
5785	}
5786	}
5787
5788	return (rval);
5789	}
5790
5791	static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5792	{
5793	unsigned long flags;
5794	fc_port_t *fcport;
5795
5796	ql_dbg(ql_dbg_disc, vha, 0x206a, fmt: "%s %d.\n", __func__, __LINE__);
5797
5798	if (test_and_clear_bit(N2N_LOGIN_NEEDED, addr: &vha->dpc_flags))
5799	set_bit(RELOGIN_NEEDED, addr: &vha->dpc_flags);
5800
5801	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5802	if (fcport->n2n_flag) {
5803	qla24xx_fcport_handle_login(vha, fcport);
5804	return QLA_SUCCESS;
5805	}
5806	}
5807
5808	spin_lock_irqsave(&vha->work_lock, flags);
5809	vha->scan.scan_retry++;
5810	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
5811
5812	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5813	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5814	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5815	}
5816	return QLA_FUNCTION_FAILED;
5817	}
5818
5819	static void
5820	qla_reinitialize_link(scsi_qla_host_t *vha)
5821	{
5822	int rval;
5823
5824	atomic_set(v: &vha->loop_state, LOOP_DOWN);
5825	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
5826	rval = qla2x00_full_login_lip(ha: vha);
5827	if (rval == QLA_SUCCESS) {
5828	ql_dbg(ql_dbg_disc, vha, 0xd050, fmt: "Link reinitialized\n");
5829	} else {
5830	ql_dbg(ql_dbg_disc, vha, 0xd051,
5831	fmt: "Link reinitialization failed (%d)\n", rval);
5832	}
5833	}
5834
5835	/*
5836	* qla2x00_configure_local_loop
5837	* Updates Fibre Channel Device Database with local loop devices.
5838	*
5839	* Input:
5840	* ha = adapter block pointer.
5841	*
5842	* Returns:
5843	* 0 = success.
5844	*/
5845	static int
5846	qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5847	{
5848	int rval, rval2;
5849	int found;
5850	fc_port_t *fcport, *new_fcport;
5851	uint16_t index;
5852	uint16_t entries;
5853	struct gid_list_info *gid;
5854	uint16_t loop_id;
5855	uint8_t domain, area, al_pa;
5856	struct qla_hw_data *ha = vha->hw;
5857	unsigned long flags;
5858
5859	/* Inititae N2N login. */
5860	if (N2N_TOPO(ha))
5861	return qla2x00_configure_n2n_loop(vha);
5862
5863	new_fcport = NULL;
5864	entries = MAX_FIBRE_DEVICES_LOOP;
5865
5866	/* Get list of logged in devices. */
5867	memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5868	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5869	&entries);
5870	if (rval != QLA_SUCCESS)
5871	goto err;
5872
5873	ql_dbg(ql_dbg_disc, vha, 0x2011,
5874	fmt: "Entries in ID list (%d).\n", entries);
5875	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5876	ha->gid_list, entries * sizeof(*ha->gid_list));
5877
5878	if (entries == 0) {
5879	spin_lock_irqsave(&vha->work_lock, flags);
5880	vha->scan.scan_retry++;
5881	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
5882
5883	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5884	u8 loop_map_entries = 0;
5885	int rc;
5886
5887	rc = qla2x00_get_fcal_position_map(ha: vha, NULL,
5888	num_entries: &loop_map_entries);
5889	if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5890	/*
5891	* There are devices that are still not logged
5892	* in. Reinitialize to give them a chance.
5893	*/
5894	qla_reinitialize_link(vha);
5895	return QLA_FUNCTION_FAILED;
5896	}
5897	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
5898	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5899	}
5900	} else {
5901	vha->scan.scan_retry = 0;
5902	}
5903
5904	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5905	fcport->scan_state = QLA_FCPORT_SCAN;
5906	}
5907
5908	/* Allocate temporary fcport for any new fcports discovered. */
5909	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5910	if (new_fcport == NULL) {
5911	ql_log(ql_log_warn, vha, 0x2012,
5912	fmt: "Memory allocation failed for fcport.\n");
5913	rval = QLA_MEMORY_ALLOC_FAILED;
5914	goto err;
5915	}
5916	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5917
5918	/* Add devices to port list. */
5919	gid = ha->gid_list;
5920	for (index = 0; index < entries; index++) {
5921	domain = gid->domain;
5922	area = gid->area;
5923	al_pa = gid->al_pa;
5924	if (IS_QLA2100(ha) || IS_QLA2200(ha))
5925	loop_id = gid->loop_id_2100;
5926	else
5927	loop_id = le16_to_cpu(gid->loop_id);
5928	gid = (void *)gid + ha->gid_list_info_size;
5929
5930	/* Bypass reserved domain fields. */
5931	if ((domain & 0xf0) == 0xf0)
5932	continue;
5933
5934	/* Bypass if not same domain and area of adapter. */
5935	if (area && domain && ((area != vha->d_id.b.area) ||
5936	(domain != vha->d_id.b.domain)) &&
5937	(ha->current_topology == ISP_CFG_NL))
5938	continue;
5939
5940
5941	/* Bypass invalid local loop ID. */
5942	if (loop_id > LAST_LOCAL_LOOP_ID)
5943	continue;
5944
5945	memset(new_fcport->port_name, 0, WWN_SIZE);
5946
5947	/* Fill in member data. */
5948	new_fcport->d_id.b.domain = domain;
5949	new_fcport->d_id.b.area = area;
5950	new_fcport->d_id.b.al_pa = al_pa;
5951	new_fcport->loop_id = loop_id;
5952	new_fcport->scan_state = QLA_FCPORT_FOUND;
5953
5954	rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5955	if (rval2 != QLA_SUCCESS) {
5956	ql_dbg(ql_dbg_disc, vha, 0x2097,
5957	fmt: "Failed to retrieve fcport information "
5958	"-- get_port_database=%x, loop_id=0x%04x.\n",
5959	rval2, new_fcport->loop_id);
5960	/* Skip retry if N2N */
5961	if (ha->current_topology != ISP_CFG_N) {
5962	ql_dbg(ql_dbg_disc, vha, 0x2105,
5963	fmt: "Scheduling resync.\n");
5964	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
5965	continue;
5966	}
5967	}
5968
5969	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5970	/* Check for matching device in port list. */
5971	found = 0;
5972	fcport = NULL;
5973	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5974	if (memcmp(p: new_fcport->port_name, q: fcport->port_name,
5975	WWN_SIZE))
5976	continue;
5977
5978	fcport->flags &= ~FCF_FABRIC_DEVICE;
5979	fcport->loop_id = new_fcport->loop_id;
5980	fcport->port_type = new_fcport->port_type;
5981	fcport->d_id.b24 = new_fcport->d_id.b24;
5982	memcpy(fcport->node_name, new_fcport->node_name,
5983	WWN_SIZE);
5984	fcport->scan_state = QLA_FCPORT_FOUND;
5985	if (fcport->login_retry == 0) {
5986	fcport->login_retry = vha->hw->login_retry_count;
5987	ql_dbg(ql_dbg_disc, vha, 0x2135,
5988	fmt: "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5989	fcport->port_name, fcport->loop_id,
5990	fcport->login_retry);
5991	}
5992	found++;
5993	break;
5994	}
5995
5996	if (!found) {
5997	/* New device, add to fcports list. */
5998	list_add_tail(new: &new_fcport->list, head: &vha->vp_fcports);
5999
6000	/* Allocate a new replacement fcport. */
6001	fcport = new_fcport;
6002
6003	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6004
6005	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6006
6007	if (new_fcport == NULL) {
6008	ql_log(ql_log_warn, vha, 0xd031,
6009	fmt: "Failed to allocate memory for fcport.\n");
6010	rval = QLA_MEMORY_ALLOC_FAILED;
6011	goto err;
6012	}
6013	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6014	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
6015	}
6016
6017	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6018
6019	/* Base iIDMA settings on HBA port speed. */
6020	fcport->fp_speed = ha->link_data_rate;
6021	}
6022
6023	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6024	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6025	break;
6026
6027	if (fcport->scan_state == QLA_FCPORT_SCAN) {
6028	if ((qla_dual_mode_enabled(ha: vha) ||
6029	qla_ini_mode_enabled(ha: vha)) &&
6030	atomic_read(v: &fcport->state) == FCS_ONLINE) {
6031	qla2x00_mark_device_lost(vha, fcport,
6032	ql2xplogiabsentdevice);
6033	if (fcport->loop_id != FC_NO_LOOP_ID &&
6034	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6035	fcport->port_type != FCT_INITIATOR &&
6036	fcport->port_type != FCT_BROADCAST) {
6037	ql_dbg(ql_dbg_disc, vha, 0x20f0,
6038	fmt: "%s %d %8phC post del sess\n",
6039	__func__, __LINE__,
6040	fcport->port_name);
6041
6042	qlt_schedule_sess_for_deletion(fcport);
6043	continue;
6044	}
6045	}
6046	}
6047
6048	if (fcport->scan_state == QLA_FCPORT_FOUND)
6049	qla24xx_fcport_handle_login(vha, fcport);
6050	}
6051
6052	qla2x00_free_fcport(fcport: new_fcport);
6053
6054	return rval;
6055
6056	err:
6057	ql_dbg(ql_dbg_disc, vha, 0x2098,
6058	fmt: "Configure local loop error exit: rval=%x.\n", rval);
6059	return rval;
6060	}
6061
6062	static void
6063	qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6064	{
6065	int rval;
6066	uint16_t mb[MAILBOX_REGISTER_COUNT];
6067	struct qla_hw_data *ha = vha->hw;
6068
6069	if (!IS_IIDMA_CAPABLE(ha))
6070	return;
6071
6072	if (atomic_read(v: &fcport->state) != FCS_ONLINE)
6073	return;
6074
6075	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
6076	fcport->fp_speed > ha->link_data_rate ||
6077	!ha->flags.gpsc_supported)
6078	return;
6079
6080	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
6081	mb);
6082	if (rval != QLA_SUCCESS) {
6083	ql_dbg(ql_dbg_disc, vha, 0x2004,
6084	fmt: "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
6085	fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
6086	} else {
6087	ql_dbg(ql_dbg_disc, vha, 0x2005,
6088	fmt: "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
6089	qla2x00_get_link_speed_str(ha, fcport->fp_speed),
6090	fcport->fp_speed, fcport->port_name);
6091	}
6092	}
6093
6094	void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6095	{
6096	qla2x00_iidma_fcport(vha, fcport);
6097	qla24xx_update_fcport_fcp_prio(vha, fcport);
6098	}
6099
6100	int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6101	{
6102	struct qla_work_evt *e;
6103
6104	e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
6105	if (!e)
6106	return QLA_FUNCTION_FAILED;
6107
6108	e->u.fcport.fcport = fcport;
6109	return qla2x00_post_work(vha, e);
6110	}
6111
6112	/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
6113	static void
6114	qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
6115	{
6116	struct fc_rport_identifiers rport_ids;
6117	struct fc_rport *rport;
6118	unsigned long flags;
6119
6120	if (atomic_read(v: &fcport->state) == FCS_ONLINE)
6121	return;
6122
6123	rport_ids.node_name = wwn_to_u64(wwn: fcport->node_name);
6124	rport_ids.port_name = wwn_to_u64(wwn: fcport->port_name);
6125	rport_ids.port_id = fcport->d_id.b.domain << 16 |
6126	fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
6127	rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
6128	fcport->rport = rport = fc_remote_port_add(shost: vha->host, channel: 0, ids: &rport_ids);
6129	if (!rport) {
6130	ql_log(ql_log_warn, vha, 0x2006,
6131	fmt: "Unable to allocate fc remote port.\n");
6132	return;
6133	}
6134
6135	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
6136	*((fc_port_t **)rport->dd_data) = fcport;
6137	spin_unlock_irqrestore(lock: fcport->vha->host->host_lock, flags);
6138	fcport->dev_loss_tmo = rport->dev_loss_tmo;
6139
6140	rport->supported_classes = fcport->supported_classes;
6141
6142	rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
6143	if (fcport->port_type == FCT_INITIATOR)
6144	rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
6145	if (fcport->port_type == FCT_TARGET)
6146	rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
6147	if (fcport->port_type & FCT_NVME_INITIATOR)
6148	rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
6149	if (fcport->port_type & FCT_NVME_TARGET)
6150	rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
6151	if (fcport->port_type & FCT_NVME_DISCOVERY)
6152	rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
6153
6154	fc_remote_port_rolechg(rport, roles: rport_ids.roles);
6155
6156	ql_dbg(ql_dbg_disc, vha, 0x20ee,
6157	fmt: "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
6158	__func__, fcport->port_name, vha->host_no,
6159	rport->scsi_target_id, rport,
6160	(fcport->port_type == FCT_TARGET) ? "tgt" :
6161	((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
6162	}
6163
6164	/*
6165	* qla2x00_update_fcport
6166	* Updates device on list.
6167	*
6168	* Input:
6169	* ha = adapter block pointer.
6170	* fcport = port structure pointer.
6171	*
6172	* Return:
6173	* 0 - Success
6174	* BIT_0 - error
6175	*
6176	* Context:
6177	* Kernel context.
6178	*/
6179	void
6180	qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6181	{
6182	unsigned long flags;
6183
6184	if (IS_SW_RESV_ADDR(fcport->d_id))
6185	return;
6186
6187	ql_dbg(ql_dbg_disc, vha, 0x20ef, fmt: "%s %8phC\n",
6188	__func__, fcport->port_name);
6189
6190	qla2x00_set_fcport_disc_state(fcport, state: DSC_UPD_FCPORT);
6191	fcport->login_retry = vha->hw->login_retry_count;
6192	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6193
6194	spin_lock_irqsave(&vha->work_lock, flags);
6195	fcport->deleted = 0;
6196	spin_unlock_irqrestore(lock: &vha->work_lock, flags);
6197
6198	if (vha->hw->current_topology == ISP_CFG_NL)
6199	fcport->logout_on_delete = 0;
6200	else
6201	fcport->logout_on_delete = 1;
6202	fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
6203
6204	if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
6205	fcport->tgt_short_link_down_cnt++;
6206	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
6207	}
6208
6209	switch (vha->hw->current_topology) {
6210	case ISP_CFG_N:
6211	case ISP_CFG_NL:
6212	fcport->keep_nport_handle = 1;
6213	break;
6214	default:
6215	break;
6216	}
6217
6218	qla2x00_iidma_fcport(vha, fcport);
6219
6220	qla2x00_dfs_create_rport(vha, fp: fcport);
6221
6222	qla24xx_update_fcport_fcp_prio(vha, fcport);
6223
6224	switch (vha->host->active_mode) {
6225	case MODE_INITIATOR:
6226	qla2x00_reg_remote_port(vha, fcport);
6227	break;
6228	case MODE_TARGET:
6229	if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6230	!vha->vha_tgt.qla_tgt->tgt_stopped)
6231	qlt_fc_port_added(vha, fcport);
6232	break;
6233	case MODE_DUAL:
6234	qla2x00_reg_remote_port(vha, fcport);
6235	if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6236	!vha->vha_tgt.qla_tgt->tgt_stopped)
6237	qlt_fc_port_added(vha, fcport);
6238	break;
6239	default:
6240	break;
6241	}
6242
6243	if (NVME_TARGET(vha->hw, fcport))
6244	qla_nvme_register_remote(vha, fcport);
6245
6246	qla2x00_set_fcport_state(fcport, state: FCS_ONLINE);
6247
6248	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
6249	if (fcport->id_changed) {
6250	fcport->id_changed = 0;
6251	ql_dbg(ql_dbg_disc, vha, 0x20d7,
6252	fmt: "%s %d %8phC post gfpnid fcp_cnt %d\n",
6253	__func__, __LINE__, fcport->port_name,
6254	vha->fcport_count);
6255	qla24xx_post_gfpnid_work(vha, fcport);
6256	} else {
6257	ql_dbg(ql_dbg_disc, vha, 0x20d7,
6258	fmt: "%s %d %8phC post gpsc fcp_cnt %d\n",
6259	__func__, __LINE__, fcport->port_name,
6260	vha->fcport_count);
6261	qla24xx_post_gpsc_work(vha, fcport);
6262	}
6263	}
6264
6265	qla2x00_set_fcport_disc_state(fcport, state: DSC_LOGIN_COMPLETE);
6266	}
6267
6268	void qla_register_fcport_fn(struct work_struct *work)
6269	{
6270	fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
6271	u32 rscn_gen = fcport->rscn_gen;
6272	u16 data[2];
6273
6274	if (IS_SW_RESV_ADDR(fcport->d_id))
6275	return;
6276
6277	qla2x00_update_fcport(vha: fcport->vha, fcport);
6278
6279	ql_dbg(ql_dbg_disc, vha: fcport->vha, 0x911e,
6280	fmt: "%s rscn gen %d/%d next DS %d\n", __func__,
6281	rscn_gen, fcport->rscn_gen, fcport->next_disc_state);
6282
6283	if (rscn_gen != fcport->rscn_gen) {
6284	/* RSCN(s) came in while registration */
6285	switch (fcport->next_disc_state) {
6286	case DSC_DELETE_PEND:
6287	qlt_schedule_sess_for_deletion(fcport);
6288	break;
6289	case DSC_ADISC:
6290	data[0] = data[1] = 0;
6291	qla2x00_post_async_adisc_work(fcport->vha, fcport,
6292	data);
6293	break;
6294	default:
6295	break;
6296	}
6297	}
6298	}
6299
6300	/*
6301	* qla2x00_configure_fabric
6302	* Setup SNS devices with loop ID's.
6303	*
6304	* Input:
6305	* ha = adapter block pointer.
6306	*
6307	* Returns:
6308	* 0 = success.
6309	* BIT_0 = error
6310	*/
6311	static int
6312	qla2x00_configure_fabric(scsi_qla_host_t *vha)
6313	{
6314	int rval;
6315	fc_port_t *fcport;
6316	uint16_t mb[MAILBOX_REGISTER_COUNT];
6317	uint16_t loop_id;
6318	struct qla_hw_data *ha = vha->hw;
6319	int discovery_gen;
6320
6321	/* If FL port exists, then SNS is present */
6322	if (IS_FWI2_CAPABLE(ha))
6323	loop_id = NPH_F_PORT;
6324	else
6325	loop_id = SNS_FL_PORT;
6326	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
6327	if (rval != QLA_SUCCESS) {
6328	ql_dbg(ql_dbg_disc, vha, 0x20a0,
6329	fmt: "MBX_GET_PORT_NAME failed, No FL Port.\n");
6330
6331	vha->device_flags &= ~SWITCH_FOUND;
6332	return (QLA_SUCCESS);
6333	}
6334	vha->device_flags |= SWITCH_FOUND;
6335
6336	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
6337	if (rval != QLA_SUCCESS)
6338	ql_dbg(ql_dbg_disc, vha, 0x20ff,
6339	fmt: "Failed to get Fabric Port Name\n");
6340
6341	if (qla_tgt_mode_enabled(ha: vha) || qla_dual_mode_enabled(ha: vha)) {
6342	rval = qla2x00_send_change_request(vha, 0x3, 0);
6343	if (rval != QLA_SUCCESS)
6344	ql_log(ql_log_warn, vha, 0x121,
6345	fmt: "Failed to enable receiving of RSCN requests: 0x%x.\n",
6346	rval);
6347	}
6348
6349	do {
6350	qla2x00_mgmt_svr_login(vha);
6351
6352	/* Ensure we are logged into the SNS. */
6353	loop_id = NPH_SNS_LID(ha);
6354	rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
6355	0xfc, mb, BIT_1|BIT_0);
6356	if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6357	ql_dbg(ql_dbg_disc, vha, 0x20a1,
6358	fmt: "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
6359	loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
6360	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6361	return rval;
6362	}
6363
6364	/* FDMI support. */
6365	if (ql2xfdmienable &&
6366	test_and_clear_bit(REGISTER_FDMI_NEEDED, addr: &vha->dpc_flags))
6367	qla2x00_fdmi_register(vha);
6368
6369	if (test_and_clear_bit(REGISTER_FC4_NEEDED, addr: &vha->dpc_flags)) {
6370	if (qla2x00_rft_id(vha)) {
6371	/* EMPTY */
6372	ql_dbg(ql_dbg_disc, vha, 0x20a2,
6373	fmt: "Register FC-4 TYPE failed.\n");
6374	if (test_bit(LOOP_RESYNC_NEEDED,
6375	&vha->dpc_flags))
6376	break;
6377	}
6378	if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
6379	/* EMPTY */
6380	ql_dbg(ql_dbg_disc, vha, 0x209a,
6381	fmt: "Register FC-4 Features failed.\n");
6382	if (test_bit(LOOP_RESYNC_NEEDED,
6383	&vha->dpc_flags))
6384	break;
6385	}
6386	if (vha->flags.nvme_enabled) {
6387	if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
6388	ql_dbg(ql_dbg_disc, vha, 0x2049,
6389	fmt: "Register NVME FC Type Features failed.\n");
6390	}
6391	}
6392	if (qla2x00_rnn_id(vha)) {
6393	/* EMPTY */
6394	ql_dbg(ql_dbg_disc, vha, 0x2104,
6395	fmt: "Register Node Name failed.\n");
6396	if (test_bit(LOOP_RESYNC_NEEDED,
6397	&vha->dpc_flags))
6398	break;
6399	} else if (qla2x00_rsnn_nn(vha)) {
6400	/* EMPTY */
6401	ql_dbg(ql_dbg_disc, vha, 0x209b,
6402	fmt: "Register Symbolic Node Name failed.\n");
6403	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6404	break;
6405	}
6406	}
6407
6408
6409	/* Mark the time right before querying FW for connected ports.
6410	* This process is long, asynchronous and by the time it's done,
6411	* collected information might not be accurate anymore. E.g.
6412	* disconnected port might have re-connected and a brand new
6413	* session has been created. In this case session's generation
6414	* will be newer than discovery_gen. */
6415	qlt_do_generation_tick(vha, &discovery_gen);
6416
6417	if (USE_ASYNC_SCAN(ha)) {
6418	/* start of scan begins here */
6419	vha->scan.rscn_gen_end = atomic_read(v: &vha->rscn_gen);
6420	qla_fab_scan_start(vha);
6421	} else {
6422	list_for_each_entry(fcport, &vha->vp_fcports, list)
6423	fcport->scan_state = QLA_FCPORT_SCAN;
6424
6425	rval = qla2x00_find_all_fabric_devs(vha);
6426	}
6427	if (rval != QLA_SUCCESS)
6428	break;
6429	} while (0);
6430
6431	if (!vha->nvme_local_port && vha->flags.nvme_enabled)
6432	qla_nvme_register_hba(vha);
6433
6434	if (rval)
6435	ql_dbg(ql_dbg_disc, vha, 0x2068,
6436	fmt: "Configure fabric error exit rval=%d.\n", rval);
6437
6438	return (rval);
6439	}
6440
6441	/*
6442	* qla2x00_find_all_fabric_devs
6443	*
6444	* Input:
6445	* ha = adapter block pointer.
6446	* dev = database device entry pointer.
6447	*
6448	* Returns:
6449	* 0 = success.
6450	*
6451	* Context:
6452	* Kernel context.
6453	*/
6454	static int
6455	qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6456	{
6457	int rval;
6458	uint16_t loop_id;
6459	fc_port_t *fcport, *new_fcport;
6460	int found;
6461
6462	sw_info_t *swl;
6463	int swl_idx;
6464	int first_dev, last_dev;
6465	port_id_t wrap = {}, nxt_d_id;
6466	struct qla_hw_data *ha = vha->hw;
6467	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
6468	unsigned long flags;
6469
6470	rval = QLA_SUCCESS;
6471
6472	/* Try GID_PT to get device list, else GAN. */
6473	if (!ha->swl)
6474	ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
6475	GFP_KERNEL);
6476	swl = ha->swl;
6477	if (!swl) {
6478	/*EMPTY*/
6479	ql_dbg(ql_dbg_disc, vha, 0x209c,
6480	fmt: "GID_PT allocations failed, fallback on GA_NXT.\n");
6481	} else {
6482	memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6483	if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6484	swl = NULL;
6485	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6486	return rval;
6487	} else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6488	swl = NULL;
6489	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6490	return rval;
6491	} else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6492	swl = NULL;
6493	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6494	return rval;
6495	} else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6496	swl = NULL;
6497	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6498	return rval;
6499	}
6500
6501	/* If other queries succeeded probe for FC-4 type */
6502	if (swl) {
6503	qla2x00_gff_id(vha, swl);
6504	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6505	return rval;
6506	}
6507	}
6508	swl_idx = 0;
6509
6510	/* Allocate temporary fcport for any new fcports discovered. */
6511	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6512	if (new_fcport == NULL) {
6513	ql_log(ql_log_warn, vha, 0x209d,
6514	fmt: "Failed to allocate memory for fcport.\n");
6515	return (QLA_MEMORY_ALLOC_FAILED);
6516	}
6517	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6518	/* Set start port ID scan at adapter ID. */
6519	first_dev = 1;
6520	last_dev = 0;
6521
6522	/* Starting free loop ID. */
6523	loop_id = ha->min_external_loopid;
6524	for (; loop_id <= ha->max_loop_id; loop_id++) {
6525	if (qla2x00_is_reserved_id(vha, loop_id))
6526	continue;
6527
6528	if (ha->current_topology == ISP_CFG_FL &&
6529	(atomic_read(v: &vha->loop_down_timer) ||
6530	LOOP_TRANSITION(vha))) {
6531	atomic_set(v: &vha->loop_down_timer, i: 0);
6532	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6533	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
6534	break;
6535	}
6536
6537	if (swl != NULL) {
6538	if (last_dev) {
6539	wrap.b24 = new_fcport->d_id.b24;
6540	} else {
6541	new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6542	memcpy(new_fcport->node_name,
6543	swl[swl_idx].node_name, WWN_SIZE);
6544	memcpy(new_fcport->port_name,
6545	swl[swl_idx].port_name, WWN_SIZE);
6546	memcpy(new_fcport->fabric_port_name,
6547	swl[swl_idx].fabric_port_name, WWN_SIZE);
6548	new_fcport->fp_speed = swl[swl_idx].fp_speed;
6549	new_fcport->fc4_type = swl[swl_idx].fc4_type;
6550
6551	new_fcport->nvme_flag = 0;
6552	if (vha->flags.nvme_enabled &&
6553	swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6554	ql_log(ql_log_info, vha, 0x2131,
6555	fmt: "FOUND: NVME port %8phC as FC Type 28h\n",
6556	new_fcport->port_name);
6557	}
6558
6559	if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6560	last_dev = 1;
6561	}
6562	swl_idx++;
6563	}
6564	} else {
6565	/* Send GA_NXT to the switch */
6566	rval = qla2x00_ga_nxt(vha, new_fcport);
6567	if (rval != QLA_SUCCESS) {
6568	ql_log(ql_log_warn, vha, 0x209e,
6569	fmt: "SNS scan failed -- assuming "
6570	"zero-entry result.\n");
6571	rval = QLA_SUCCESS;
6572	break;
6573	}
6574	}
6575
6576	/* If wrap on switch device list, exit. */
6577	if (first_dev) {
6578	wrap.b24 = new_fcport->d_id.b24;
6579	first_dev = 0;
6580	} else if (new_fcport->d_id.b24 == wrap.b24) {
6581	ql_dbg(ql_dbg_disc, vha, 0x209f,
6582	fmt: "Device wrap (%02x%02x%02x).\n",
6583	new_fcport->d_id.b.domain,
6584	new_fcport->d_id.b.area,
6585	new_fcport->d_id.b.al_pa);
6586	break;
6587	}
6588
6589	/* Bypass if same physical adapter. */
6590	if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6591	continue;
6592
6593	/* Bypass virtual ports of the same host. */
6594	if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6595	continue;
6596
6597	/* Bypass if same domain and area of adapter. */
6598	if (((new_fcport->d_id.b24 & 0xffff00) ==
6599	(vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6600	ISP_CFG_FL)
6601	continue;
6602
6603	/* Bypass reserved domain fields. */
6604	if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6605	continue;
6606
6607	/* Bypass ports whose FCP-4 type is not FCP_SCSI */
6608	if (ql2xgffidenable &&
6609	(!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6610	new_fcport->fc4_type != 0))
6611	continue;
6612
6613	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6614
6615	/* Locate matching device in database. */
6616	found = 0;
6617	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6618	if (memcmp(p: new_fcport->port_name, q: fcport->port_name,
6619	WWN_SIZE))
6620	continue;
6621
6622	fcport->scan_state = QLA_FCPORT_FOUND;
6623
6624	found++;
6625
6626	/* Update port state. */
6627	memcpy(fcport->fabric_port_name,
6628	new_fcport->fabric_port_name, WWN_SIZE);
6629	fcport->fp_speed = new_fcport->fp_speed;
6630
6631	/*
6632	* If address the same and state FCS_ONLINE
6633	* (or in target mode), nothing changed.
6634	*/
6635	if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6636	(atomic_read(v: &fcport->state) == FCS_ONLINE ||
6637	(vha->host->active_mode == MODE_TARGET))) {
6638	break;
6639	}
6640
6641	if (fcport->login_retry == 0)
6642	fcport->login_retry =
6643	vha->hw->login_retry_count;
6644	/*
6645	* If device was not a fabric device before.
6646	*/
6647	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6648	fcport->d_id.b24 = new_fcport->d_id.b24;
6649	qla2x00_clear_loop_id(fcport);
6650	fcport->flags |= (FCF_FABRIC_DEVICE |
6651	FCF_LOGIN_NEEDED);
6652	break;
6653	}
6654
6655	/*
6656	* Port ID changed or device was marked to be updated;
6657	* Log it out if still logged in and mark it for
6658	* relogin later.
6659	*/
6660	if (qla_tgt_mode_enabled(ha: base_vha)) {
6661	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6662	fmt: "port changed FC ID, %8phC"
6663	" old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6664	fcport->port_name,
6665	fcport->d_id.b.domain,
6666	fcport->d_id.b.area,
6667	fcport->d_id.b.al_pa,
6668	fcport->loop_id,
6669	new_fcport->d_id.b.domain,
6670	new_fcport->d_id.b.area,
6671	new_fcport->d_id.b.al_pa);
6672	fcport->d_id.b24 = new_fcport->d_id.b24;
6673	break;
6674	}
6675
6676	fcport->d_id.b24 = new_fcport->d_id.b24;
6677	fcport->flags |= FCF_LOGIN_NEEDED;
6678	break;
6679	}
6680
6681	if (found && NVME_TARGET(vha->hw, fcport)) {
6682	if (fcport->disc_state == DSC_DELETE_PEND) {
6683	qla2x00_set_fcport_disc_state(fcport, state: DSC_GNL);
6684	vha->fcport_count--;
6685	fcport->login_succ = 0;
6686	}
6687	}
6688
6689	if (found) {
6690	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6691	continue;
6692	}
6693	/* If device was not in our fcports list, then add it. */
6694	new_fcport->scan_state = QLA_FCPORT_FOUND;
6695	list_add_tail(new: &new_fcport->list, head: &vha->vp_fcports);
6696
6697	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags);
6698
6699
6700	/* Allocate a new replacement fcport. */
6701	nxt_d_id.b24 = new_fcport->d_id.b24;
6702	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6703	if (new_fcport == NULL) {
6704	ql_log(ql_log_warn, vha, 0xd032,
6705	fmt: "Memory allocation failed for fcport.\n");
6706	return (QLA_MEMORY_ALLOC_FAILED);
6707	}
6708	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6709	new_fcport->d_id.b24 = nxt_d_id.b24;
6710	}
6711
6712	qla2x00_free_fcport(fcport: new_fcport);
6713
6714	/*
6715	* Logout all previous fabric dev marked lost, except FCP2 devices.
6716	*/
6717	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6718	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6719	break;
6720
6721	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6722	continue;
6723
6724	if (fcport->scan_state == QLA_FCPORT_SCAN) {
6725	if ((qla_dual_mode_enabled(ha: vha) ||
6726	qla_ini_mode_enabled(ha: vha)) &&
6727	atomic_read(v: &fcport->state) == FCS_ONLINE) {
6728	qla2x00_mark_device_lost(vha, fcport,
6729	ql2xplogiabsentdevice);
6730	if (fcport->loop_id != FC_NO_LOOP_ID &&
6731	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6732	fcport->port_type != FCT_INITIATOR &&
6733	fcport->port_type != FCT_BROADCAST) {
6734	ql_dbg(ql_dbg_disc, vha, 0x20f0,
6735	fmt: "%s %d %8phC post del sess\n",
6736	__func__, __LINE__,
6737	fcport->port_name);
6738	qlt_schedule_sess_for_deletion(fcport);
6739	continue;
6740	}
6741	}
6742	}
6743
6744	if (fcport->scan_state == QLA_FCPORT_FOUND &&
6745	(fcport->flags & FCF_LOGIN_NEEDED) != 0)
6746	qla24xx_fcport_handle_login(vha, fcport);
6747	}
6748	return (rval);
6749	}
6750
6751	/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6752	int
6753	qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6754	{
6755	int loop_id = FC_NO_LOOP_ID;
6756	int lid = NPH_MGMT_SERVER - vha->vp_idx;
6757	unsigned long flags;
6758	struct qla_hw_data *ha = vha->hw;
6759
6760	if (vha->vp_idx == 0) {
6761	set_bit(NPH_MGMT_SERVER, addr: ha->loop_id_map);
6762	return NPH_MGMT_SERVER;
6763	}
6764
6765	/* pick id from high and work down to low */
6766	spin_lock_irqsave(&ha->vport_slock, flags);
6767	for (; lid > 0; lid--) {
6768	if (!test_bit(lid, vha->hw->loop_id_map)) {
6769	set_bit(nr: lid, addr: vha->hw->loop_id_map);
6770	loop_id = lid;
6771	break;
6772	}
6773	}
6774	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
6775
6776	return loop_id;
6777	}
6778
6779	/*
6780	* qla2x00_fabric_login
6781	* Issue fabric login command.
6782	*
6783	* Input:
6784	* ha = adapter block pointer.
6785	* device = pointer to FC device type structure.
6786	*
6787	* Returns:
6788	* 0 - Login successfully
6789	* 1 - Login failed
6790	* 2 - Initiator device
6791	* 3 - Fatal error
6792	*/
6793	int
6794	qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6795	uint16_t *next_loopid)
6796	{
6797	int rval;
6798	int retry;
6799	uint16_t tmp_loopid;
6800	uint16_t mb[MAILBOX_REGISTER_COUNT];
6801	struct qla_hw_data *ha = vha->hw;
6802
6803	retry = 0;
6804	tmp_loopid = 0;
6805
6806	for (;;) {
6807	ql_dbg(ql_dbg_disc, vha, 0x2000,
6808	fmt: "Trying Fabric Login w/loop id 0x%04x for port "
6809	"%02x%02x%02x.\n",
6810	fcport->loop_id, fcport->d_id.b.domain,
6811	fcport->d_id.b.area, fcport->d_id.b.al_pa);
6812
6813	/* Login fcport on switch. */
6814	rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6815	fcport->d_id.b.domain, fcport->d_id.b.area,
6816	fcport->d_id.b.al_pa, mb, BIT_0);
6817	if (rval != QLA_SUCCESS) {
6818	return rval;
6819	}
6820	if (mb[0] == MBS_PORT_ID_USED) {
6821	/*
6822	* Device has another loop ID. The firmware team
6823	* recommends the driver perform an implicit login with
6824	* the specified ID again. The ID we just used is save
6825	* here so we return with an ID that can be tried by
6826	* the next login.
6827	*/
6828	retry++;
6829	tmp_loopid = fcport->loop_id;
6830	fcport->loop_id = mb[1];
6831
6832	ql_dbg(ql_dbg_disc, vha, 0x2001,
6833	fmt: "Fabric Login: port in use - next loop "
6834	"id=0x%04x, port id= %02x%02x%02x.\n",
6835	fcport->loop_id, fcport->d_id.b.domain,
6836	fcport->d_id.b.area, fcport->d_id.b.al_pa);
6837
6838	} else if (mb[0] == MBS_COMMAND_COMPLETE) {
6839	/*
6840	* Login succeeded.
6841	*/
6842	if (retry) {
6843	/* A retry occurred before. */
6844	*next_loopid = tmp_loopid;
6845	} else {
6846	/*
6847	* No retry occurred before. Just increment the
6848	* ID value for next login.
6849	*/
6850	*next_loopid = (fcport->loop_id + 1);
6851	}
6852
6853	if (mb[1] & BIT_0) {
6854	fcport->port_type = FCT_INITIATOR;
6855	} else {
6856	fcport->port_type = FCT_TARGET;
6857	if (mb[1] & BIT_1) {
6858	fcport->flags |= FCF_FCP2_DEVICE;
6859	}
6860	}
6861
6862	if (mb[10] & BIT_0)
6863	fcport->supported_classes |= FC_COS_CLASS2;
6864	if (mb[10] & BIT_1)
6865	fcport->supported_classes |= FC_COS_CLASS3;
6866
6867	if (IS_FWI2_CAPABLE(ha)) {
6868	if (mb[10] & BIT_7)
6869	fcport->flags |=
6870	FCF_CONF_COMP_SUPPORTED;
6871	}
6872
6873	rval = QLA_SUCCESS;
6874	break;
6875	} else if (mb[0] == MBS_LOOP_ID_USED) {
6876	/*
6877	* Loop ID already used, try next loop ID.
6878	*/
6879	fcport->loop_id++;
6880	rval = qla2x00_find_new_loop_id(vha, dev: fcport);
6881	if (rval != QLA_SUCCESS) {
6882	/* Ran out of loop IDs to use */
6883	break;
6884	}
6885	} else if (mb[0] == MBS_COMMAND_ERROR) {
6886	/*
6887	* Firmware possibly timed out during login. If NO
6888	* retries are left to do then the device is declared
6889	* dead.
6890	*/
6891	*next_loopid = fcport->loop_id;
6892	ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6893	fcport->d_id.b.domain, fcport->d_id.b.area,
6894	fcport->d_id.b.al_pa);
6895	qla2x00_mark_device_lost(vha, fcport, 1);
6896
6897	rval = 1;
6898	break;
6899	} else {
6900	/*
6901	* unrecoverable / not handled error
6902	*/
6903	ql_dbg(ql_dbg_disc, vha, 0x2002,
6904	fmt: "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6905	"jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6906	fcport->d_id.b.area, fcport->d_id.b.al_pa,
6907	fcport->loop_id, jiffies);
6908
6909	*next_loopid = fcport->loop_id;
6910	ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6911	fcport->d_id.b.domain, fcport->d_id.b.area,
6912	fcport->d_id.b.al_pa);
6913	qla2x00_clear_loop_id(fcport);
6914	fcport->login_retry = 0;
6915
6916	rval = 3;
6917	break;
6918	}
6919	}
6920
6921	return (rval);
6922	}
6923
6924	/*
6925	* qla2x00_local_device_login
6926	* Issue local device login command.
6927	*
6928	* Input:
6929	* ha = adapter block pointer.
6930	* loop_id = loop id of device to login to.
6931	*
6932	* Returns (Where's the #define!!!!):
6933	* 0 - Login successfully
6934	* 1 - Login failed
6935	* 3 - Fatal error
6936	*/
6937	int
6938	qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6939	{
6940	int rval;
6941	uint16_t mb[MAILBOX_REGISTER_COUNT];
6942
6943	memset(mb, 0, sizeof(mb));
6944	rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6945	if (rval == QLA_SUCCESS) {
6946	/* Interrogate mailbox registers for any errors */
6947	if (mb[0] == MBS_COMMAND_ERROR)
6948	rval = 1;
6949	else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6950	/* device not in PCB table */
6951	rval = 3;
6952	}
6953
6954	return (rval);
6955	}
6956
6957	/*
6958	* qla2x00_loop_resync
6959	* Resync with fibre channel devices.
6960	*
6961	* Input:
6962	* ha = adapter block pointer.
6963	*
6964	* Returns:
6965	* 0 = success
6966	*/
6967	int
6968	qla2x00_loop_resync(scsi_qla_host_t *vha)
6969	{
6970	int rval = QLA_SUCCESS;
6971	uint32_t wait_time;
6972
6973	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
6974	if (vha->flags.online) {
6975	if (!(rval = qla2x00_fw_ready(vha))) {
6976	/* Wait at most MAX_TARGET RSCNs for a stable link. */
6977	wait_time = 256;
6978	do {
6979	if (!IS_QLAFX00(vha->hw)) {
6980	/*
6981	* Issue a marker after FW becomes
6982	* ready.
6983	*/
6984	qla2x00_marker(vha, vha->hw->base_qpair,
6985	0, 0, MK_SYNC_ALL);
6986	vha->marker_needed = 0;
6987	}
6988
6989	/* Remap devices on Loop. */
6990	clear_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
6991
6992	if (IS_QLAFX00(vha->hw))
6993	qlafx00_configure_devices(vha);
6994	else
6995	qla2x00_configure_loop(vha);
6996
6997	wait_time--;
6998	} while (!atomic_read(v: &vha->loop_down_timer) &&
6999	!(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7000	&& wait_time && (test_bit(LOOP_RESYNC_NEEDED,
7001	&vha->dpc_flags)));
7002	}
7003	}
7004
7005	if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7006	return (QLA_FUNCTION_FAILED);
7007
7008	if (rval)
7009	ql_dbg(ql_dbg_disc, vha, 0x206c,
7010	fmt: "%s *** FAILED ***.\n", __func__);
7011
7012	return (rval);
7013	}
7014
7015	/*
7016	* qla2x00_perform_loop_resync
7017	* Description: This function will set the appropriate flags and call
7018	* qla2x00_loop_resync. If successful loop will be resynced
7019	* Arguments : scsi_qla_host_t pointer
7020	* returm : Success or Failure
7021	*/
7022
7023	int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
7024	{
7025	int32_t rval = 0;
7026
7027	if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, addr: &ha->dpc_flags)) {
7028	/*Configure the flags so that resync happens properly*/
7029	atomic_set(v: &ha->loop_down_timer, i: 0);
7030	if (!(ha->device_flags & DFLG_NO_CABLE)) {
7031	atomic_set(v: &ha->loop_state, LOOP_UP);
7032	set_bit(LOCAL_LOOP_UPDATE, addr: &ha->dpc_flags);
7033	set_bit(REGISTER_FC4_NEEDED, addr: &ha->dpc_flags);
7034	set_bit(LOOP_RESYNC_NEEDED, addr: &ha->dpc_flags);
7035
7036	rval = qla2x00_loop_resync(vha: ha);
7037	} else
7038	atomic_set(v: &ha->loop_state, LOOP_DEAD);
7039
7040	clear_bit(LOOP_RESYNC_ACTIVE, addr: &ha->dpc_flags);
7041	}
7042
7043	return rval;
7044	}
7045
7046	/* Assumes idc_lock always held on entry */
7047	void
7048	qla83xx_reset_ownership(scsi_qla_host_t *vha)
7049	{
7050	struct qla_hw_data *ha = vha->hw;
7051	uint32_t drv_presence, drv_presence_mask;
7052	uint32_t dev_part_info1, dev_part_info2, class_type;
7053	uint32_t class_type_mask = 0x3;
7054	uint16_t fcoe_other_function = 0xffff, i;
7055
7056	if (IS_QLA8044(ha)) {
7057	drv_presence = qla8044_rd_direct(vha,
7058	crb_reg: QLA8044_CRB_DRV_ACTIVE_INDEX);
7059	dev_part_info1 = qla8044_rd_direct(vha,
7060	crb_reg: QLA8044_CRB_DEV_PART_INFO_INDEX);
7061	dev_part_info2 = qla8044_rd_direct(vha,
7062	QLA8044_CRB_DEV_PART_INFO2);
7063	} else {
7064	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7065	qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
7066	qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
7067	}
7068	for (i = 0; i < 8; i++) {
7069	class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
7070	if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7071	(i != ha->portnum)) {
7072	fcoe_other_function = i;
7073	break;
7074	}
7075	}
7076	if (fcoe_other_function == 0xffff) {
7077	for (i = 0; i < 8; i++) {
7078	class_type = ((dev_part_info2 >> (i * 4)) &
7079	class_type_mask);
7080	if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7081	((i + 8) != ha->portnum)) {
7082	fcoe_other_function = i + 8;
7083	break;
7084	}
7085	}
7086	}
7087	/*
7088	* Prepare drv-presence mask based on fcoe functions present.
7089	* However consider only valid physical fcoe function numbers (0-15).
7090	*/
7091	drv_presence_mask = ~((1 << (ha->portnum)) |
7092	((fcoe_other_function == 0xffff) ?
7093	0 : (1 << (fcoe_other_function))));
7094
7095	/* We are the reset owner iff:
7096	* - No other protocol drivers present.
7097	* - This is the lowest among fcoe functions. */
7098	if (!(drv_presence & drv_presence_mask) &&
7099	(ha->portnum < fcoe_other_function)) {
7100	ql_dbg(ql_dbg_p3p, vha, 0xb07f,
7101	fmt: "This host is Reset owner.\n");
7102	ha->flags.nic_core_reset_owner = 1;
7103	}
7104	}
7105
7106	static int
7107	__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
7108	{
7109	int rval = QLA_SUCCESS;
7110	struct qla_hw_data *ha = vha->hw;
7111	uint32_t drv_ack;
7112
7113	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7114	if (rval == QLA_SUCCESS) {
7115	drv_ack |= (1 << ha->portnum);
7116	rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7117	}
7118
7119	return rval;
7120	}
7121
7122	static int
7123	__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
7124	{
7125	int rval = QLA_SUCCESS;
7126	struct qla_hw_data *ha = vha->hw;
7127	uint32_t drv_ack;
7128
7129	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7130	if (rval == QLA_SUCCESS) {
7131	drv_ack &= ~(1 << ha->portnum);
7132	rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7133	}
7134
7135	return rval;
7136	}
7137
7138	/* Assumes idc-lock always held on entry */
7139	void
7140	qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
7141	{
7142	struct qla_hw_data *ha = vha->hw;
7143	uint32_t idc_audit_reg = 0, duration_secs = 0;
7144
7145	switch (audit_type) {
7146	case IDC_AUDIT_TIMESTAMP:
7147	ha->idc_audit_ts = (jiffies_to_msecs(j: jiffies) / 1000);
7148	idc_audit_reg = (ha->portnum) |
7149	(IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
7150	qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7151	break;
7152
7153	case IDC_AUDIT_COMPLETION:
7154	duration_secs = ((jiffies_to_msecs(j: jiffies) -
7155	jiffies_to_msecs(j: ha->idc_audit_ts)) / 1000);
7156	idc_audit_reg = (ha->portnum) |
7157	(IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
7158	qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7159	break;
7160
7161	default:
7162	ql_log(ql_log_warn, vha, 0xb078,
7163	fmt: "Invalid audit type specified.\n");
7164	break;
7165	}
7166	}
7167
7168	/* Assumes idc_lock always held on entry */
7169	static int
7170	qla83xx_initiating_reset(scsi_qla_host_t *vha)
7171	{
7172	struct qla_hw_data *ha = vha->hw;
7173	uint32_t idc_control, dev_state;
7174
7175	__qla83xx_get_idc_control(vha, &idc_control);
7176	if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
7177	ql_log(ql_log_info, vha, 0xb080,
7178	fmt: "NIC Core reset has been disabled. idc-control=0x%x\n",
7179	idc_control);
7180	return QLA_FUNCTION_FAILED;
7181	}
7182
7183	/* Set NEED-RESET iff in READY state and we are the reset-owner */
7184	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7185	if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
7186	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
7187	QLA8XXX_DEV_NEED_RESET);
7188	ql_log(ql_log_info, vha, 0xb056, fmt: "HW State: NEED RESET.\n");
7189	qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
7190	} else {
7191	ql_log(ql_log_info, vha, 0xb057, fmt: "HW State: %s.\n",
7192	qdev_state(dev_state));
7193
7194	/* SV: XXX: Is timeout required here? */
7195	/* Wait for IDC state change READY -> NEED_RESET */
7196	while (dev_state == QLA8XXX_DEV_READY) {
7197	qla83xx_idc_unlock(vha, 0);
7198	msleep(msecs: 200);
7199	qla83xx_idc_lock(vha, 0);
7200	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7201	}
7202	}
7203
7204	/* Send IDC ack by writing to drv-ack register */
7205	__qla83xx_set_drv_ack(vha);
7206
7207	return QLA_SUCCESS;
7208	}
7209
7210	int
7211	__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
7212	{
7213	return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7214	}
7215
7216	int
7217	__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
7218	{
7219	return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7220	}
7221
7222	static int
7223	qla83xx_check_driver_presence(scsi_qla_host_t *vha)
7224	{
7225	uint32_t drv_presence = 0;
7226	struct qla_hw_data *ha = vha->hw;
7227
7228	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7229	if (drv_presence & (1 << ha->portnum))
7230	return QLA_SUCCESS;
7231	else
7232	return QLA_TEST_FAILED;
7233	}
7234
7235	int
7236	qla83xx_nic_core_reset(scsi_qla_host_t *vha)
7237	{
7238	int rval = QLA_SUCCESS;
7239	struct qla_hw_data *ha = vha->hw;
7240
7241	ql_dbg(ql_dbg_p3p, vha, 0xb058,
7242	fmt: "Entered %s().\n", __func__);
7243
7244	if (vha->device_flags & DFLG_DEV_FAILED) {
7245	ql_log(ql_log_warn, vha, 0xb059,
7246	fmt: "Device in unrecoverable FAILED state.\n");
7247	return QLA_FUNCTION_FAILED;
7248	}
7249
7250	qla83xx_idc_lock(vha, 0);
7251
7252	if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
7253	ql_log(ql_log_warn, vha, 0xb05a,
7254	fmt: "Function=0x%x has been removed from IDC participation.\n",
7255	ha->portnum);
7256	rval = QLA_FUNCTION_FAILED;
7257	goto exit;
7258	}
7259
7260	qla83xx_reset_ownership(vha);
7261
7262	rval = qla83xx_initiating_reset(vha);
7263
7264	/*
7265	* Perform reset if we are the reset-owner,
7266	* else wait till IDC state changes to READY/FAILED.
7267	*/
7268	if (rval == QLA_SUCCESS) {
7269	rval = qla83xx_idc_state_handler(vha);
7270
7271	if (rval == QLA_SUCCESS)
7272	ha->flags.nic_core_hung = 0;
7273	__qla83xx_clear_drv_ack(vha);
7274	}
7275
7276	exit:
7277	qla83xx_idc_unlock(vha, 0);
7278
7279	ql_dbg(ql_dbg_p3p, vha, 0xb05b, fmt: "Exiting %s.\n", __func__);
7280
7281	return rval;
7282	}
7283
7284	int
7285	qla2xxx_mctp_dump(scsi_qla_host_t *vha)
7286	{
7287	struct qla_hw_data *ha = vha->hw;
7288	int rval = QLA_FUNCTION_FAILED;
7289
7290	if (!IS_MCTP_CAPABLE(ha)) {
7291	/* This message can be removed from the final version */
7292	ql_log(ql_log_info, vha, 0x506d,
7293	fmt: "This board is not MCTP capable\n");
7294	return rval;
7295	}
7296
7297	if (!ha->mctp_dump) {
7298	ha->mctp_dump = dma_alloc_coherent(dev: &ha->pdev->dev,
7299	MCTP_DUMP_SIZE, dma_handle: &ha->mctp_dump_dma, GFP_KERNEL);
7300
7301	if (!ha->mctp_dump) {
7302	ql_log(ql_log_warn, vha, 0x506e,
7303	fmt: "Failed to allocate memory for mctp dump\n");
7304	return rval;
7305	}
7306	}
7307
7308	#define MCTP_DUMP_STR_ADDR 0x00000000
7309	rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
7310	MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
7311	if (rval != QLA_SUCCESS) {
7312	ql_log(ql_log_warn, vha, 0x506f,
7313	fmt: "Failed to capture mctp dump\n");
7314	} else {
7315	ql_log(ql_log_info, vha, 0x5070,
7316	fmt: "Mctp dump capture for host (%ld/%p).\n",
7317	vha->host_no, ha->mctp_dump);
7318	ha->mctp_dumped = 1;
7319	}
7320
7321	if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
7322	ha->flags.nic_core_reset_hdlr_active = 1;
7323	rval = qla83xx_restart_nic_firmware(vha);
7324	if (rval)
7325	/* NIC Core reset failed. */
7326	ql_log(ql_log_warn, vha, 0x5071,
7327	fmt: "Failed to restart nic firmware\n");
7328	else
7329	ql_dbg(ql_dbg_p3p, vha, 0xb084,
7330	fmt: "Restarted NIC firmware successfully.\n");
7331	ha->flags.nic_core_reset_hdlr_active = 0;
7332	}
7333
7334	return rval;
7335
7336	}
7337
7338	/*
7339	* qla2x00_quiesce_io
7340	* Description: This function will block the new I/Os
7341	* Its not aborting any I/Os as context
7342	* is not destroyed during quiescence
7343	* Arguments: scsi_qla_host_t
7344	* return : void
7345	*/
7346	void
7347	qla2x00_quiesce_io(scsi_qla_host_t *vha)
7348	{
7349	struct qla_hw_data *ha = vha->hw;
7350	struct scsi_qla_host *vp, *tvp;
7351	unsigned long flags;
7352
7353	ql_dbg(ql_dbg_dpc, vha, 0x401d,
7354	fmt: "Quiescing I/O - ha=%p.\n", ha);
7355
7356	atomic_set(v: &ha->loop_down_timer, LOOP_DOWN_TIME);
7357	if (atomic_read(v: &vha->loop_state) != LOOP_DOWN) {
7358	atomic_set(v: &vha->loop_state, LOOP_DOWN);
7359	qla2x00_mark_all_devices_lost(vha);
7360
7361	spin_lock_irqsave(&ha->vport_slock, flags);
7362	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7363	atomic_inc(v: &vp->vref_count);
7364	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7365
7366	qla2x00_mark_all_devices_lost(vp);
7367
7368	spin_lock_irqsave(&ha->vport_slock, flags);
7369	atomic_dec(v: &vp->vref_count);
7370	}
7371	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7372	} else {
7373	if (!atomic_read(v: &vha->loop_down_timer))
7374	atomic_set(v: &vha->loop_down_timer,
7375	LOOP_DOWN_TIME);
7376	}
7377	/* Wait for pending cmds to complete */
7378	WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
7379	!= QLA_SUCCESS);
7380	}
7381
7382	void
7383	qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
7384	{
7385	struct qla_hw_data *ha = vha->hw;
7386	struct scsi_qla_host *vp, *tvp;
7387	unsigned long flags;
7388	fc_port_t *fcport;
7389	u16 i;
7390
7391	/* For ISP82XX, driver waits for completion of the commands.
7392	* online flag should be set.
7393	*/
7394	if (!(IS_P3P_TYPE(ha)))
7395	vha->flags.online = 0;
7396	ha->flags.chip_reset_done = 0;
7397	clear_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
7398	vha->qla_stats.total_isp_aborts++;
7399
7400	ql_log(ql_log_info, vha, 0x00af,
7401	fmt: "Performing ISP error recovery - ha=%p.\n", ha);
7402
7403	ha->flags.purge_mbox = 1;
7404	/* For ISP82XX, reset_chip is just disabling interrupts.
7405	* Driver waits for the completion of the commands.
7406	* the interrupts need to be enabled.
7407	*/
7408	if (!(IS_P3P_TYPE(ha)))
7409	ha->isp_ops->reset_chip(vha);
7410
7411	ha->link_data_rate = PORT_SPEED_UNKNOWN;
7412	SAVE_TOPO(ha);
7413	ha->flags.rida_fmt2 = 0;
7414	ha->flags.n2n_ae = 0;
7415	ha->flags.lip_ae = 0;
7416	ha->current_topology = 0;
7417	QLA_FW_STOPPED(ha);
7418	ha->flags.fw_init_done = 0;
7419	ha->chip_reset++;
7420	ha->base_qpair->chip_reset = ha->chip_reset;
7421	ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7422	ha->base_qpair->prev_completion_cnt = 0;
7423	for (i = 0; i < ha->max_qpairs; i++) {
7424	if (ha->queue_pair_map[i]) {
7425	ha->queue_pair_map[i]->chip_reset =
7426	ha->base_qpair->chip_reset;
7427	ha->queue_pair_map[i]->cmd_cnt =
7428	ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7429	ha->base_qpair->prev_completion_cnt = 0;
7430	}
7431	}
7432
7433	/* purge MBox commands */
7434	spin_lock_irqsave(&ha->hardware_lock, flags);
7435	if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
7436	clear_bit(MBX_INTR_WAIT, addr: &ha->mbx_cmd_flags);
7437	complete(&ha->mbx_intr_comp);
7438	}
7439	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7440
7441	i = 0;
7442	while (atomic_read(v: &ha->num_pend_mbx_stage2) ||
7443	atomic_read(v: &ha->num_pend_mbx_stage1)) {
7444	msleep(msecs: 20);
7445	i++;
7446	if (i > 50)
7447	break;
7448	}
7449	ha->flags.purge_mbox = 0;
7450
7451	atomic_set(v: &vha->loop_down_timer, LOOP_DOWN_TIME);
7452	if (atomic_read(v: &vha->loop_state) != LOOP_DOWN) {
7453	atomic_set(v: &vha->loop_state, LOOP_DOWN);
7454	qla2x00_mark_all_devices_lost(vha);
7455
7456	spin_lock_irqsave(&ha->vport_slock, flags);
7457	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7458	atomic_inc(v: &vp->vref_count);
7459	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7460
7461	qla2x00_mark_all_devices_lost(vp);
7462
7463	spin_lock_irqsave(&ha->vport_slock, flags);
7464	atomic_dec(v: &vp->vref_count);
7465	}
7466	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7467	} else {
7468	if (!atomic_read(v: &vha->loop_down_timer))
7469	atomic_set(v: &vha->loop_down_timer,
7470	LOOP_DOWN_TIME);
7471	}
7472
7473	/* Clear all async request states across all VPs. */
7474	list_for_each_entry(fcport, &vha->vp_fcports, list) {
7475	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7476	fcport->scan_state = 0;
7477	}
7478	spin_lock_irqsave(&ha->vport_slock, flags);
7479	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7480	atomic_inc(v: &vp->vref_count);
7481	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7482
7483	list_for_each_entry(fcport, &vp->vp_fcports, list)
7484	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7485
7486	spin_lock_irqsave(&ha->vport_slock, flags);
7487	atomic_dec(v: &vp->vref_count);
7488	}
7489	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7490
7491	/* Make sure for ISP 82XX IO DMA is complete */
7492	if (IS_P3P_TYPE(ha)) {
7493	qla82xx_chip_reset_cleanup(vha);
7494	ql_log(ql_log_info, vha, 0x00b4,
7495	fmt: "Done chip reset cleanup.\n");
7496
7497	/* Done waiting for pending commands. Reset online flag */
7498	vha->flags.online = 0;
7499	}
7500
7501	/* Requeue all commands in outstanding command list. */
7502	qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7503	/* memory barrier */
7504	wmb();
7505	}
7506
7507	/*
7508	* qla2x00_abort_isp
7509	* Resets ISP and aborts all outstanding commands.
7510	*
7511	* Input:
7512	* ha = adapter block pointer.
7513	*
7514	* Returns:
7515	* 0 = success
7516	*/
7517	int
7518	qla2x00_abort_isp(scsi_qla_host_t *vha)
7519	{
7520	uint8_t status = 0;
7521	struct qla_hw_data *ha = vha->hw;
7522	struct scsi_qla_host *vp, *tvp;
7523	struct req_que *req = ha->req_q_map[0];
7524	unsigned long flags;
7525	fc_port_t *fcport;
7526
7527	if (vha->flags.online) {
7528	qla2x00_abort_isp_cleanup(vha);
7529
7530	vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS;
7531	vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS;
7532
7533	if (vha->hw->flags.port_isolated)
7534	return status;
7535
7536	if (qla2x00_isp_reg_stat(ha)) {
7537	ql_log(ql_log_info, vha, 0x803f,
7538	fmt: "ISP Abort - ISP reg disconnect, exiting.\n");
7539	return status;
7540	}
7541
7542	if (test_and_clear_bit(ISP_ABORT_TO_ROM, addr: &vha->dpc_flags)) {
7543	ha->flags.chip_reset_done = 1;
7544	vha->flags.online = 1;
7545	status = 0;
7546	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7547	return status;
7548	}
7549
7550	if (IS_QLA8031(ha)) {
7551	ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7552	fmt: "Clearing fcoe driver presence.\n");
7553	if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7554	ql_dbg(ql_dbg_p3p, vha, 0xb073,
7555	fmt: "Error while clearing DRV-Presence.\n");
7556	}
7557
7558	if (unlikely(pci_channel_offline(ha->pdev) &&
7559	ha->flags.pci_channel_io_perm_failure)) {
7560	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7561	status = 0;
7562	return status;
7563	}
7564
7565	switch (vha->qlini_mode) {
7566	case QLA2XXX_INI_MODE_DISABLED:
7567	if (!qla_tgt_mode_enabled(ha: vha))
7568	return 0;
7569	break;
7570	case QLA2XXX_INI_MODE_DUAL:
7571	if (!qla_dual_mode_enabled(ha: vha) &&
7572	!qla_ini_mode_enabled(ha: vha))
7573	return 0;
7574	break;
7575	case QLA2XXX_INI_MODE_ENABLED:
7576	default:
7577	break;
7578	}
7579
7580	ha->isp_ops->get_flash_version(vha, req->ring);
7581
7582	if (qla2x00_isp_reg_stat(ha)) {
7583	ql_log(ql_log_info, vha, 0x803f,
7584	fmt: "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7585	return status;
7586	}
7587	ha->isp_ops->nvram_config(vha);
7588
7589	if (qla2x00_isp_reg_stat(ha)) {
7590	ql_log(ql_log_info, vha, 0x803f,
7591	fmt: "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7592	return status;
7593	}
7594
7595	/* User may have updated [fcp|nvme] prefer in flash */
7596	list_for_each_entry(fcport, &vha->vp_fcports, list) {
7597	if (NVME_PRIORITY(ha, fcport))
7598	fcport->do_prli_nvme = 1;
7599	else
7600	fcport->do_prli_nvme = 0;
7601	}
7602
7603	if (!qla2x00_restart_isp(vha)) {
7604	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
7605
7606	if (!atomic_read(v: &vha->loop_down_timer)) {
7607	/*
7608	* Issue marker command only when we are going
7609	* to start the I/O .
7610	*/
7611	vha->marker_needed = 1;
7612	}
7613
7614	vha->flags.online = 1;
7615
7616	ha->isp_ops->enable_intrs(ha);
7617
7618	ha->isp_abort_cnt = 0;
7619	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7620
7621	if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7622	qla2x00_get_fw_version(vha);
7623
7624	} else { /* failed the ISP abort */
7625	vha->flags.online = 1;
7626	if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7627	if (ha->isp_abort_cnt == 0) {
7628	ql_log(ql_log_fatal, vha, 0x8035,
7629	fmt: "ISP error recover failed - "
7630	"board disabled.\n");
7631	/*
7632	* The next call disables the board
7633	* completely.
7634	*/
7635	qla2x00_abort_isp_cleanup(vha);
7636	vha->flags.online = 0;
7637	clear_bit(ISP_ABORT_RETRY,
7638	addr: &vha->dpc_flags);
7639	status = 0;
7640	} else { /* schedule another ISP abort */
7641	ha->isp_abort_cnt--;
7642	ql_dbg(ql_dbg_taskm, vha, 0x8020,
7643	fmt: "ISP abort - retry remaining %d.\n",
7644	ha->isp_abort_cnt);
7645	status = 1;
7646	}
7647	} else {
7648	ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7649	ql_dbg(ql_dbg_taskm, vha, 0x8021,
7650	fmt: "ISP error recovery - retrying (%d) "
7651	"more times.\n", ha->isp_abort_cnt);
7652	set_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
7653	status = 1;
7654	}
7655	}
7656
7657	}
7658
7659	if (vha->hw->flags.port_isolated) {
7660	qla2x00_abort_isp_cleanup(vha);
7661	return status;
7662	}
7663
7664	if (!status) {
7665	ql_dbg(ql_dbg_taskm, vha, 0x8022, fmt: "%s succeeded.\n", __func__);
7666	qla2x00_configure_hba(vha);
7667	spin_lock_irqsave(&ha->vport_slock, flags);
7668	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7669	if (vp->vp_idx) {
7670	atomic_inc(v: &vp->vref_count);
7671	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7672
7673	/* User may have updated [fcp|nvme] prefer in flash */
7674	list_for_each_entry(fcport, &vp->vp_fcports, list) {
7675	if (NVME_PRIORITY(ha, fcport))
7676	fcport->do_prli_nvme = 1;
7677	else
7678	fcport->do_prli_nvme = 0;
7679	}
7680
7681	qla2x00_vp_abort_isp(vp);
7682
7683	spin_lock_irqsave(&ha->vport_slock, flags);
7684	atomic_dec(v: &vp->vref_count);
7685	}
7686	}
7687	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
7688
7689	if (IS_QLA8031(ha)) {
7690	ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7691	fmt: "Setting back fcoe driver presence.\n");
7692	if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7693	ql_dbg(ql_dbg_p3p, vha, 0xb074,
7694	fmt: "Error while setting DRV-Presence.\n");
7695	}
7696	} else {
7697	ql_log(ql_log_warn, vha, 0x8023, fmt: "%s **** FAILED ****.\n",
7698	__func__);
7699	}
7700
7701	return(status);
7702	}
7703
7704	/*
7705	* qla2x00_restart_isp
7706	* restarts the ISP after a reset
7707	*
7708	* Input:
7709	* ha = adapter block pointer.
7710	*
7711	* Returns:
7712	* 0 = success
7713	*/
7714	static int
7715	qla2x00_restart_isp(scsi_qla_host_t *vha)
7716	{
7717	int status;
7718	struct qla_hw_data *ha = vha->hw;
7719
7720	/* If firmware needs to be loaded */
7721	if (qla2x00_isp_firmware(vha)) {
7722	vha->flags.online = 0;
7723	status = ha->isp_ops->chip_diag(vha);
7724	if (status)
7725	return status;
7726	status = qla2x00_setup_chip(vha);
7727	if (status)
7728	return status;
7729	}
7730
7731	status = qla2x00_init_rings(vha);
7732	if (status)
7733	return status;
7734
7735	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
7736	ha->flags.chip_reset_done = 1;
7737
7738	/* Initialize the queues in use */
7739	qla25xx_init_queues(ha);
7740
7741	status = qla2x00_fw_ready(vha);
7742	if (status) {
7743	/* if no cable then assume it's good */
7744	return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7745	}
7746
7747	/* Issue a marker after FW becomes ready. */
7748	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7749	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
7750
7751	return 0;
7752	}
7753
7754	static int
7755	qla25xx_init_queues(struct qla_hw_data *ha)
7756	{
7757	struct rsp_que *rsp = NULL;
7758	struct req_que *req = NULL;
7759	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
7760	int ret = -1;
7761	int i;
7762
7763	for (i = 1; i < ha->max_rsp_queues; i++) {
7764	rsp = ha->rsp_q_map[i];
7765	if (rsp && test_bit(i, ha->rsp_qid_map)) {
7766	rsp->options &= ~BIT_0;
7767	ret = qla25xx_init_rsp_que(base_vha, rsp);
7768	if (ret != QLA_SUCCESS)
7769	ql_dbg(ql_dbg_init, vha: base_vha, 0x00ff,
7770	fmt: "%s Rsp que: %d init failed.\n",
7771	__func__, rsp->id);
7772	else
7773	ql_dbg(ql_dbg_init, vha: base_vha, 0x0100,
7774	fmt: "%s Rsp que: %d inited.\n",
7775	__func__, rsp->id);
7776	}
7777	}
7778	for (i = 1; i < ha->max_req_queues; i++) {
7779	req = ha->req_q_map[i];
7780	if (req && test_bit(i, ha->req_qid_map)) {
7781	/* Clear outstanding commands array. */
7782	req->options &= ~BIT_0;
7783	ret = qla25xx_init_req_que(base_vha, req);
7784	if (ret != QLA_SUCCESS)
7785	ql_dbg(ql_dbg_init, vha: base_vha, 0x0101,
7786	fmt: "%s Req que: %d init failed.\n",
7787	__func__, req->id);
7788	else
7789	ql_dbg(ql_dbg_init, vha: base_vha, 0x0102,
7790	fmt: "%s Req que: %d inited.\n",
7791	__func__, req->id);
7792	}
7793	}
7794	return ret;
7795	}
7796
7797	/*
7798	* qla2x00_reset_adapter
7799	* Reset adapter.
7800	*
7801	* Input:
7802	* ha = adapter block pointer.
7803	*/
7804	int
7805	qla2x00_reset_adapter(scsi_qla_host_t *vha)
7806	{
7807	unsigned long flags = 0;
7808	struct qla_hw_data *ha = vha->hw;
7809	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7810
7811	vha->flags.online = 0;
7812	ha->isp_ops->disable_intrs(ha);
7813
7814	spin_lock_irqsave(&ha->hardware_lock, flags);
7815	wrt_reg_word(addr: &reg->hccr, HCCR_RESET_RISC);
7816	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
7817	wrt_reg_word(addr: &reg->hccr, HCCR_RELEASE_RISC);
7818	rd_reg_word(addr: &reg->hccr); /* PCI Posting. */
7819	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7820
7821	return QLA_SUCCESS;
7822	}
7823
7824	int
7825	qla24xx_reset_adapter(scsi_qla_host_t *vha)
7826	{
7827	unsigned long flags = 0;
7828	struct qla_hw_data *ha = vha->hw;
7829	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7830
7831	if (IS_P3P_TYPE(ha))
7832	return QLA_SUCCESS;
7833
7834	vha->flags.online = 0;
7835	ha->isp_ops->disable_intrs(ha);
7836
7837	spin_lock_irqsave(&ha->hardware_lock, flags);
7838	wrt_reg_dword(addr: &reg->hccr, HCCRX_SET_RISC_RESET);
7839	rd_reg_dword(addr: &reg->hccr);
7840	wrt_reg_dword(addr: &reg->hccr, HCCRX_REL_RISC_PAUSE);
7841	rd_reg_dword(addr: &reg->hccr);
7842	spin_unlock_irqrestore(lock: &ha->hardware_lock, flags);
7843
7844	if (IS_NOPOLLING_TYPE(ha))
7845	ha->isp_ops->enable_intrs(ha);
7846
7847	return QLA_SUCCESS;
7848	}
7849
7850	/* On sparc systems, obtain port and node WWN from firmware
7851	* properties.
7852	*/
7853	static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7854	struct nvram_24xx *nv)
7855	{
7856	#ifdef CONFIG_SPARC
7857	struct qla_hw_data *ha = vha->hw;
7858	struct pci_dev *pdev = ha->pdev;
7859	struct device_node *dp = pci_device_to_OF_node(pdev);
7860	const u8 *val;
7861	int len;
7862
7863	val = of_get_property(dp, "port-wwn", &len);
7864	if (val && len >= WWN_SIZE)
7865	memcpy(nv->port_name, val, WWN_SIZE);
7866
7867	val = of_get_property(dp, "node-wwn", &len);
7868	if (val && len >= WWN_SIZE)
7869	memcpy(nv->node_name, val, WWN_SIZE);
7870	#endif
7871	}
7872
7873	int
7874	qla24xx_nvram_config(scsi_qla_host_t *vha)
7875	{
7876	int rval;
7877	struct init_cb_24xx *icb;
7878	struct nvram_24xx *nv;
7879	__le32 *dptr;
7880	uint8_t *dptr1, *dptr2;
7881	uint32_t chksum;
7882	uint16_t cnt;
7883	struct qla_hw_data *ha = vha->hw;
7884
7885	rval = QLA_SUCCESS;
7886	icb = (struct init_cb_24xx *)ha->init_cb;
7887	nv = ha->nvram;
7888
7889	/* Determine NVRAM starting address. */
7890	if (ha->port_no == 0) {
7891	ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7892	ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7893	} else {
7894	ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7895	ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7896	}
7897
7898	ha->nvram_size = sizeof(*nv);
7899	ha->vpd_size = FA_NVRAM_VPD_SIZE;
7900
7901	/* Get VPD data into cache */
7902	ha->vpd = ha->nvram + VPD_OFFSET;
7903	ha->isp_ops->read_nvram(vha, ha->vpd,
7904	ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7905
7906	/* Get NVRAM data into cache and calculate checksum. */
7907	dptr = (__force __le32 *)nv;
7908	ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7909	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7910	chksum += le32_to_cpu(*dptr);
7911
7912	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7913	fmt: "Contents of NVRAM\n");
7914	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7915	nv, ha->nvram_size);
7916
7917	/* Bad NVRAM data, set defaults parameters. */
7918	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
7919	le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7920	/* Reset NVRAM data. */
7921	ql_log(ql_log_warn, vha, 0x006b,
7922	fmt: "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7923	chksum, nv->id, nv->nvram_version);
7924	ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7925	ql_log(ql_log_warn, vha, 0x006c,
7926	fmt: "Falling back to functioning (yet invalid -- WWPN) "
7927	"defaults.\n");
7928
7929	/*
7930	* Set default initialization control block.
7931	*/
7932	memset(nv, 0, ha->nvram_size);
7933	nv->nvram_version = cpu_to_le16(ICB_VERSION);
7934	nv->version = cpu_to_le16(ICB_VERSION);
7935	nv->frame_payload_size = cpu_to_le16(2048);
7936	nv->execution_throttle = cpu_to_le16(0xFFFF);
7937	nv->exchange_count = cpu_to_le16(0);
7938	nv->hard_address = cpu_to_le16(124);
7939	nv->port_name[0] = 0x21;
7940	nv->port_name[1] = 0x00 + ha->port_no + 1;
7941	nv->port_name[2] = 0x00;
7942	nv->port_name[3] = 0xe0;
7943	nv->port_name[4] = 0x8b;
7944	nv->port_name[5] = 0x1c;
7945	nv->port_name[6] = 0x55;
7946	nv->port_name[7] = 0x86;
7947	nv->node_name[0] = 0x20;
7948	nv->node_name[1] = 0x00;
7949	nv->node_name[2] = 0x00;
7950	nv->node_name[3] = 0xe0;
7951	nv->node_name[4] = 0x8b;
7952	nv->node_name[5] = 0x1c;
7953	nv->node_name[6] = 0x55;
7954	nv->node_name[7] = 0x86;
7955	qla24xx_nvram_wwn_from_ofw(vha, nv);
7956	nv->login_retry_count = cpu_to_le16(8);
7957	nv->interrupt_delay_timer = cpu_to_le16(0);
7958	nv->login_timeout = cpu_to_le16(0);
7959	nv->firmware_options_1 =
7960	cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7961	nv->firmware_options_2 = cpu_to_le32(2 << 4);
7962	nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7963	nv->firmware_options_3 = cpu_to_le32(2 << 13);
7964	nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7965	nv->efi_parameters = cpu_to_le32(0);
7966	nv->reset_delay = 5;
7967	nv->max_luns_per_target = cpu_to_le16(128);
7968	nv->port_down_retry_count = cpu_to_le16(30);
7969	nv->link_down_timeout = cpu_to_le16(30);
7970
7971	rval = 1;
7972	}
7973
7974	if (qla_tgt_mode_enabled(ha: vha)) {
7975	/* Don't enable full login after initial LIP */
7976	nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7977	/* Don't enable LIP full login for initiator */
7978	nv->host_p &= cpu_to_le32(~BIT_10);
7979	}
7980
7981	qlt_24xx_config_nvram_stage1(vha, nv);
7982
7983	/* Reset Initialization control block */
7984	memset(icb, 0, ha->init_cb_size);
7985
7986	/* Copy 1st segment. */
7987	dptr1 = (uint8_t *)icb;
7988	dptr2 = (uint8_t *)&nv->version;
7989	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7990	while (cnt--)
7991	*dptr1++ = *dptr2++;
7992
7993	icb->login_retry_count = nv->login_retry_count;
7994	icb->link_down_on_nos = nv->link_down_on_nos;
7995
7996	/* Copy 2nd segment. */
7997	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7998	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7999	cnt = (uint8_t *)&icb->reserved_3 -
8000	(uint8_t *)&icb->interrupt_delay_timer;
8001	while (cnt--)
8002	*dptr1++ = *dptr2++;
8003	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8004	/*
8005	* Setup driver NVRAM options.
8006	*/
8007	qla2x00_set_model_info(vha, model: nv->model_name, len: sizeof(nv->model_name),
8008	def: "QLA2462");
8009
8010	qlt_24xx_config_nvram_stage2(vha, icb);
8011
8012	if (nv->host_p & cpu_to_le32(BIT_15)) {
8013	/* Use alternate WWN? */
8014	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8015	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8016	}
8017
8018	/* Prepare nodename */
8019	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8020	/*
8021	* Firmware will apply the following mask if the nodename was
8022	* not provided.
8023	*/
8024	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8025	icb->node_name[0] &= 0xF0;
8026	}
8027
8028	/* Set host adapter parameters. */
8029	ha->flags.disable_risc_code_load = 0;
8030	ha->flags.enable_lip_reset = 0;
8031	ha->flags.enable_lip_full_login =
8032	le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8033	ha->flags.enable_target_reset =
8034	le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8035	ha->flags.enable_led_scheme = 0;
8036	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8037
8038	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8039	(BIT_6 | BIT_5 | BIT_4)) >> 4;
8040
8041	memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
8042	sizeof(ha->fw_seriallink_options24));
8043
8044	/* save HBA serial number */
8045	ha->serial0 = icb->port_name[5];
8046	ha->serial1 = icb->port_name[6];
8047	ha->serial2 = icb->port_name[7];
8048	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8049	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8050
8051	icb->execution_throttle = cpu_to_le16(0xFFFF);
8052
8053	ha->retry_count = le16_to_cpu(nv->login_retry_count);
8054
8055	/* Set minimum login_timeout to 4 seconds. */
8056	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8057	nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8058	if (le16_to_cpu(nv->login_timeout) < 4)
8059	nv->login_timeout = cpu_to_le16(4);
8060	ha->login_timeout = le16_to_cpu(nv->login_timeout);
8061
8062	/* Set minimum RATOV to 100 tenths of a second. */
8063	ha->r_a_tov = 100;
8064
8065	ha->loop_reset_delay = nv->reset_delay;
8066
8067	/* Link Down Timeout = 0:
8068	*
8069	* When Port Down timer expires we will start returning
8070	* I/O's to OS with "DID_NO_CONNECT".
8071	*
8072	* Link Down Timeout != 0:
8073	*
8074	* The driver waits for the link to come up after link down
8075	* before returning I/Os to OS with "DID_NO_CONNECT".
8076	*/
8077	if (le16_to_cpu(nv->link_down_timeout) == 0) {
8078	ha->loop_down_abort_time =
8079	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8080	} else {
8081	ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8082	ha->loop_down_abort_time =
8083	(LOOP_DOWN_TIME - ha->link_down_timeout);
8084	}
8085
8086	/* Need enough time to try and get the port back. */
8087	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8088	if (qlport_down_retry)
8089	ha->port_down_retry_count = qlport_down_retry;
8090
8091	/* Set login_retry_count */
8092	ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8093	if (ha->port_down_retry_count ==
8094	le16_to_cpu(nv->port_down_retry_count) &&
8095	ha->port_down_retry_count > 3)
8096	ha->login_retry_count = ha->port_down_retry_count;
8097	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8098	ha->login_retry_count = ha->port_down_retry_count;
8099	if (ql2xloginretrycount)
8100	ha->login_retry_count = ql2xloginretrycount;
8101
8102	/* N2N: driver will initiate Login instead of FW */
8103	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8104
8105	/* Enable ZIO. */
8106	if (!vha->flags.init_done) {
8107	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8108	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
8109	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8110	le16_to_cpu(icb->interrupt_delay_timer) : 2;
8111	}
8112	icb->firmware_options_2 &= cpu_to_le32(
8113	~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8114	if (ha->zio_mode != QLA_ZIO_DISABLED) {
8115	ha->zio_mode = QLA_ZIO_MODE_6;
8116
8117	ql_log(ql_log_info, vha, 0x006f,
8118	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
8119	ha->zio_mode, ha->zio_timer * 100);
8120
8121	icb->firmware_options_2 |= cpu_to_le32(
8122	(uint32_t)ha->zio_mode);
8123	icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8124	}
8125
8126	if (rval) {
8127	ql_log(ql_log_warn, vha, 0x0070,
8128	fmt: "NVRAM configuration failed.\n");
8129	}
8130	return (rval);
8131	}
8132
8133	static void
8134	qla27xx_print_image(struct scsi_qla_host *vha, char *name,
8135	struct qla27xx_image_status *image_status)
8136	{
8137	ql_dbg(ql_dbg_init, vha, 0x018b,
8138	fmt: "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
8139	name, "status",
8140	image_status->image_status_mask,
8141	le16_to_cpu(image_status->generation),
8142	image_status->ver_major,
8143	image_status->ver_minor,
8144	image_status->bitmap,
8145	le32_to_cpu(image_status->checksum),
8146	le32_to_cpu(image_status->signature));
8147	}
8148
8149	static bool
8150	qla28xx_check_aux_image_status_signature(
8151	struct qla27xx_image_status *image_status)
8152	{
8153	ulong signature = le32_to_cpu(image_status->signature);
8154
8155	return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
8156	}
8157
8158	static bool
8159	qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
8160	{
8161	ulong signature = le32_to_cpu(image_status->signature);
8162
8163	return
8164	signature != QLA27XX_IMG_STATUS_SIGN &&
8165	signature != QLA28XX_IMG_STATUS_SIGN;
8166	}
8167
8168	static ulong
8169	qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
8170	{
8171	__le32 *p = (__force __le32 *)image_status;
8172	uint n = sizeof(*image_status) / sizeof(*p);
8173	uint32_t sum = 0;
8174
8175	for ( ; n--; p++)
8176	sum += le32_to_cpup(p);
8177
8178	return sum;
8179	}
8180
8181	static inline uint
8182	qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
8183	{
8184	return aux->bitmap & bitmask ?
8185	QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
8186	}
8187
8188	static void
8189	qla28xx_component_status(
8190	struct active_regions *active_regions, struct qla27xx_image_status *aux)
8191	{
8192	active_regions->aux.board_config =
8193	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
8194
8195	active_regions->aux.vpd_nvram =
8196	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
8197
8198	active_regions->aux.npiv_config_0_1 =
8199	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
8200
8201	active_regions->aux.npiv_config_2_3 =
8202	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
8203
8204	active_regions->aux.nvme_params =
8205	qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS);
8206	}
8207
8208	static int
8209	qla27xx_compare_image_generation(
8210	struct qla27xx_image_status *pri_image_status,
8211	struct qla27xx_image_status *sec_image_status)
8212	{
8213	/* calculate generation delta as uint16 (this accounts for wrap) */
8214	int16_t delta =
8215	le16_to_cpu(pri_image_status->generation) -
8216	le16_to_cpu(sec_image_status->generation);
8217
8218	ql_dbg(ql_dbg_init, NULL, 0x0180, fmt: "generation delta = %d\n", delta);
8219
8220	return delta;
8221	}
8222
8223	void
8224	qla28xx_get_aux_images(
8225	struct scsi_qla_host *vha, struct active_regions *active_regions)
8226	{
8227	struct qla_hw_data *ha = vha->hw;
8228	struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
8229	bool valid_pri_image = false, valid_sec_image = false;
8230	bool active_pri_image = false, active_sec_image = false;
8231	int rc;
8232
8233	if (!ha->flt_region_aux_img_status_pri) {
8234	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Primary aux image not addressed\n");
8235	goto check_sec_image;
8236	}
8237
8238	rc = qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
8239	ha->flt_region_aux_img_status_pri,
8240	sizeof(pri_aux_image_status) >> 2);
8241	if (rc) {
8242	ql_log(ql_log_info, vha, 0x01a1,
8243	fmt: "Unable to read Primary aux image(%x).\n", rc);
8244	goto check_sec_image;
8245	}
8246	qla27xx_print_image(vha, name: "Primary aux image", image_status: &pri_aux_image_status);
8247
8248	if (qla28xx_check_aux_image_status_signature(image_status: &pri_aux_image_status)) {
8249	ql_dbg(ql_dbg_init, vha, 0x018b,
8250	fmt: "Primary aux image signature (%#x) not valid\n",
8251	le32_to_cpu(pri_aux_image_status.signature));
8252	goto check_sec_image;
8253	}
8254
8255	if (qla27xx_image_status_checksum(image_status: &pri_aux_image_status)) {
8256	ql_dbg(ql_dbg_init, vha, 0x018c,
8257	fmt: "Primary aux image checksum failed\n");
8258	goto check_sec_image;
8259	}
8260
8261	valid_pri_image = true;
8262
8263	if (pri_aux_image_status.image_status_mask & 1) {
8264	ql_dbg(ql_dbg_init, vha, 0x018d,
8265	fmt: "Primary aux image is active\n");
8266	active_pri_image = true;
8267	}
8268
8269	check_sec_image:
8270	if (!ha->flt_region_aux_img_status_sec) {
8271	ql_dbg(ql_dbg_init, vha, 0x018a,
8272	fmt: "Secondary aux image not addressed\n");
8273	goto check_valid_image;
8274	}
8275
8276	rc = qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
8277	ha->flt_region_aux_img_status_sec,
8278	sizeof(sec_aux_image_status) >> 2);
8279	if (rc) {
8280	ql_log(ql_log_info, vha, 0x01a2,
8281	fmt: "Unable to read Secondary aux image(%x).\n", rc);
8282	goto check_valid_image;
8283	}
8284
8285	qla27xx_print_image(vha, name: "Secondary aux image", image_status: &sec_aux_image_status);
8286
8287	if (qla28xx_check_aux_image_status_signature(image_status: &sec_aux_image_status)) {
8288	ql_dbg(ql_dbg_init, vha, 0x018b,
8289	fmt: "Secondary aux image signature (%#x) not valid\n",
8290	le32_to_cpu(sec_aux_image_status.signature));
8291	goto check_valid_image;
8292	}
8293
8294	if (qla27xx_image_status_checksum(image_status: &sec_aux_image_status)) {
8295	ql_dbg(ql_dbg_init, vha, 0x018c,
8296	fmt: "Secondary aux image checksum failed\n");
8297	goto check_valid_image;
8298	}
8299
8300	valid_sec_image = true;
8301
8302	if (sec_aux_image_status.image_status_mask & 1) {
8303	ql_dbg(ql_dbg_init, vha, 0x018d,
8304	fmt: "Secondary aux image is active\n");
8305	active_sec_image = true;
8306	}
8307
8308	check_valid_image:
8309	if (valid_pri_image && active_pri_image &&
8310	valid_sec_image && active_sec_image) {
8311	if (qla27xx_compare_image_generation(pri_image_status: &pri_aux_image_status,
8312	sec_image_status: &sec_aux_image_status) >= 0) {
8313	qla28xx_component_status(active_regions,
8314	aux: &pri_aux_image_status);
8315	} else {
8316	qla28xx_component_status(active_regions,
8317	aux: &sec_aux_image_status);
8318	}
8319	} else if (valid_pri_image && active_pri_image) {
8320	qla28xx_component_status(active_regions, aux: &pri_aux_image_status);
8321	} else if (valid_sec_image && active_sec_image) {
8322	qla28xx_component_status(active_regions, aux: &sec_aux_image_status);
8323	}
8324
8325	ql_dbg(ql_dbg_init, vha, 0x018f,
8326	fmt: "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n",
8327	active_regions->aux.board_config,
8328	active_regions->aux.vpd_nvram,
8329	active_regions->aux.npiv_config_0_1,
8330	active_regions->aux.npiv_config_2_3,
8331	active_regions->aux.nvme_params);
8332	}
8333
8334	void
8335	qla27xx_get_active_image(struct scsi_qla_host *vha,
8336	struct active_regions *active_regions)
8337	{
8338	struct qla_hw_data *ha = vha->hw;
8339	struct qla27xx_image_status pri_image_status, sec_image_status;
8340	bool valid_pri_image = false, valid_sec_image = false;
8341	bool active_pri_image = false, active_sec_image = false;
8342	int rc;
8343
8344	if (!ha->flt_region_img_status_pri) {
8345	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Primary image not addressed\n");
8346	goto check_sec_image;
8347	}
8348
8349	if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
8350	ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
8351	QLA_SUCCESS) {
8352	WARN_ON_ONCE(true);
8353	goto check_sec_image;
8354	}
8355	qla27xx_print_image(vha, name: "Primary image", image_status: &pri_image_status);
8356
8357	if (qla27xx_check_image_status_signature(image_status: &pri_image_status)) {
8358	ql_dbg(ql_dbg_init, vha, 0x018b,
8359	fmt: "Primary image signature (%#x) not valid\n",
8360	le32_to_cpu(pri_image_status.signature));
8361	goto check_sec_image;
8362	}
8363
8364	if (qla27xx_image_status_checksum(image_status: &pri_image_status)) {
8365	ql_dbg(ql_dbg_init, vha, 0x018c,
8366	fmt: "Primary image checksum failed\n");
8367	goto check_sec_image;
8368	}
8369
8370	valid_pri_image = true;
8371
8372	if (pri_image_status.image_status_mask & 1) {
8373	ql_dbg(ql_dbg_init, vha, 0x018d,
8374	fmt: "Primary image is active\n");
8375	active_pri_image = true;
8376	}
8377
8378	check_sec_image:
8379	if (!ha->flt_region_img_status_sec) {
8380	ql_dbg(ql_dbg_init, vha, 0x018a, fmt: "Secondary image not addressed\n");
8381	goto check_valid_image;
8382	}
8383
8384	rc = qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
8385	ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
8386	if (rc) {
8387	ql_log(ql_log_info, vha, 0x01a3,
8388	fmt: "Unable to read Secondary image status(%x).\n", rc);
8389	goto check_valid_image;
8390	}
8391
8392	qla27xx_print_image(vha, name: "Secondary image", image_status: &sec_image_status);
8393
8394	if (qla27xx_check_image_status_signature(image_status: &sec_image_status)) {
8395	ql_dbg(ql_dbg_init, vha, 0x018b,
8396	fmt: "Secondary image signature (%#x) not valid\n",
8397	le32_to_cpu(sec_image_status.signature));
8398	goto check_valid_image;
8399	}
8400
8401	if (qla27xx_image_status_checksum(image_status: &sec_image_status)) {
8402	ql_dbg(ql_dbg_init, vha, 0x018c,
8403	fmt: "Secondary image checksum failed\n");
8404	goto check_valid_image;
8405	}
8406
8407	valid_sec_image = true;
8408
8409	if (sec_image_status.image_status_mask & 1) {
8410	ql_dbg(ql_dbg_init, vha, 0x018d,
8411	fmt: "Secondary image is active\n");
8412	active_sec_image = true;
8413	}
8414
8415	check_valid_image:
8416	if (valid_pri_image && active_pri_image)
8417	active_regions->global = QLA27XX_PRIMARY_IMAGE;
8418
8419	if (valid_sec_image && active_sec_image) {
8420	if (!active_regions->global ||
8421	qla27xx_compare_image_generation(
8422	pri_image_status: &pri_image_status, sec_image_status: &sec_image_status) < 0) {
8423	active_regions->global = QLA27XX_SECONDARY_IMAGE;
8424	}
8425	}
8426
8427	ql_dbg(ql_dbg_init, vha, 0x018f, fmt: "active image %s (%u)\n",
8428	active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8429	"default (boot/fw)" :
8430	active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8431	"primary" :
8432	active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8433	"secondary" : "invalid",
8434	active_regions->global);
8435	}
8436
8437	bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8438	{
8439	return
8440	!(dword[4] | dword[5] | dword[6] | dword[7]) ||
8441	!(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8442	}
8443
8444	static int
8445	qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8446	uint32_t faddr)
8447	{
8448	int rval;
8449	uint templates, segments, fragment;
8450	ulong i;
8451	uint j;
8452	ulong dlen;
8453	uint32_t *dcode;
8454	uint32_t risc_addr, risc_size, risc_attr = 0;
8455	struct qla_hw_data *ha = vha->hw;
8456	struct req_que *req = ha->req_q_map[0];
8457	struct fwdt *fwdt = ha->fwdt;
8458
8459	ql_dbg(ql_dbg_init, vha, 0x008b,
8460	fmt: "FW: Loading firmware from flash (%x).\n", faddr);
8461
8462	dcode = (uint32_t *)req->ring;
8463	rval = qla24xx_read_flash_data(vha, dcode, faddr, 8);
8464	if (rval || qla24xx_risc_firmware_invalid(dword: dcode)) {
8465	ql_log(ql_log_fatal, vha, 0x008c,
8466	fmt: "Unable to verify the integrity of flash firmware image (rval %x).\n", rval);
8467	ql_log(ql_log_fatal, vha, 0x008d,
8468	fmt: "Firmware data: %08x %08x %08x %08x.\n",
8469	dcode[0], dcode[1], dcode[2], dcode[3]);
8470
8471	return QLA_FUNCTION_FAILED;
8472	}
8473
8474	dcode = (uint32_t *)req->ring;
8475	*srisc_addr = 0;
8476	segments = FA_RISC_CODE_SEGMENTS;
8477	for (j = 0; j < segments; j++) {
8478	ql_dbg(ql_dbg_init, vha, 0x008d,
8479	fmt: "-> Loading segment %u...\n", j);
8480	rval = qla24xx_read_flash_data(vha, dcode, faddr, 10);
8481	if (rval) {
8482	ql_log(ql_log_fatal, vha, 0x016a,
8483	fmt: "-> Unable to read segment addr + size .\n");
8484	return QLA_FUNCTION_FAILED;
8485	}
8486	risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8487	risc_size = be32_to_cpu((__force __be32)dcode[3]);
8488	if (!*srisc_addr) {
8489	*srisc_addr = risc_addr;
8490	risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8491	}
8492
8493	dlen = ha->fw_transfer_size >> 2;
8494	for (fragment = 0; risc_size; fragment++) {
8495	if (dlen > risc_size)
8496	dlen = risc_size;
8497
8498	ql_dbg(ql_dbg_init, vha, 0x008e,
8499	fmt: "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8500	fragment, risc_addr, faddr, dlen);
8501	rval = qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8502	if (rval) {
8503	ql_log(ql_log_fatal, vha, 0x016b,
8504	fmt: "-> Unable to read fragment(faddr %#x dlen %#lx).\n",
8505	faddr, dlen);
8506	return QLA_FUNCTION_FAILED;
8507	}
8508	for (i = 0; i < dlen; i++)
8509	dcode[i] = swab32(dcode[i]);
8510
8511	rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8512	if (rval) {
8513	ql_log(ql_log_fatal, vha, 0x008f,
8514	fmt: "-> Failed load firmware fragment %u.\n",
8515	fragment);
8516	return QLA_FUNCTION_FAILED;
8517	}
8518
8519	faddr += dlen;
8520	risc_addr += dlen;
8521	risc_size -= dlen;
8522	}
8523	}
8524
8525	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8526	return QLA_SUCCESS;
8527
8528	templates = (risc_attr & BIT_9) ? 2 : 1;
8529	ql_dbg(ql_dbg_init, vha, 0x0160, fmt: "-> templates = %u\n", templates);
8530	for (j = 0; j < templates; j++, fwdt++) {
8531	vfree(addr: fwdt->template);
8532	fwdt->template = NULL;
8533	fwdt->length = 0;
8534
8535	dcode = (uint32_t *)req->ring;
8536
8537	rval = qla24xx_read_flash_data(vha, dcode, faddr, 7);
8538	if (rval) {
8539	ql_log(ql_log_fatal, vha, 0x016c,
8540	fmt: "-> Unable to read template size.\n");
8541	goto failed;
8542	}
8543
8544	risc_size = be32_to_cpu((__force __be32)dcode[2]);
8545	ql_dbg(ql_dbg_init, vha, 0x0161,
8546	fmt: "-> fwdt%u template array at %#x (%#x dwords)\n",
8547	j, faddr, risc_size);
8548	if (!risc_size || !~risc_size) {
8549	ql_dbg(ql_dbg_init, vha, 0x0162,
8550	fmt: "-> fwdt%u failed to read array\n", j);
8551	goto failed;
8552	}
8553
8554	/* skip header and ignore checksum */
8555	faddr += 7;
8556	risc_size -= 8;
8557
8558	ql_dbg(ql_dbg_init, vha, 0x0163,
8559	fmt: "-> fwdt%u template allocate template %#x words...\n",
8560	j, risc_size);
8561	fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
8562	if (!fwdt->template) {
8563	ql_log(ql_log_warn, vha, 0x0164,
8564	fmt: "-> fwdt%u failed allocate template.\n", j);
8565	goto failed;
8566	}
8567
8568	dcode = fwdt->template;
8569	rval = qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8570
8571	if (rval || !qla27xx_fwdt_template_valid(dcode)) {
8572	ql_log(ql_log_warn, vha, 0x0165,
8573	fmt: "-> fwdt%u failed template validate (rval %x)\n",
8574	j, rval);
8575	goto failed;
8576	}
8577
8578	dlen = qla27xx_fwdt_template_size(dcode);
8579	ql_dbg(ql_dbg_init, vha, 0x0166,
8580	fmt: "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8581	j, dlen, dlen / sizeof(*dcode));
8582	if (dlen > risc_size * sizeof(*dcode)) {
8583	ql_log(ql_log_warn, vha, 0x0167,
8584	fmt: "-> fwdt%u template exceeds array (%-lu bytes)\n",
8585	j, dlen - risc_size * sizeof(*dcode));
8586	goto failed;
8587	}
8588
8589	fwdt->length = dlen;
8590	ql_dbg(ql_dbg_init, vha, 0x0168,
8591	fmt: "-> fwdt%u loaded template ok\n", j);
8592
8593	faddr += risc_size + 1;
8594	}
8595
8596	return QLA_SUCCESS;
8597
8598	failed:
8599	vfree(addr: fwdt->template);
8600	fwdt->template = NULL;
8601	fwdt->length = 0;
8602
8603	return QLA_SUCCESS;
8604	}
8605
8606	#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8607
8608	int
8609	qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8610	{
8611	int rval;
8612	int i, fragment;
8613	uint16_t *wcode;
8614	__be16 *fwcode;
8615	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8616	struct fw_blob *blob;
8617	struct qla_hw_data *ha = vha->hw;
8618	struct req_que *req = ha->req_q_map[0];
8619
8620	/* Load firmware blob. */
8621	blob = qla2x00_request_firmware(vha);
8622	if (!blob) {
8623	ql_log(ql_log_info, vha, 0x0083,
8624	fmt: "Firmware image unavailable.\n");
8625	ql_log(ql_log_info, vha, 0x0084,
8626	fmt: "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8627	return QLA_FUNCTION_FAILED;
8628	}
8629
8630	rval = QLA_SUCCESS;
8631
8632	wcode = (uint16_t *)req->ring;
8633	*srisc_addr = 0;
8634	fwcode = (__force __be16 *)blob->fw->data;
8635	fwclen = 0;
8636
8637	/* Validate firmware image by checking version. */
8638	if (blob->fw->size < 8 * sizeof(uint16_t)) {
8639	ql_log(ql_log_fatal, vha, 0x0085,
8640	fmt: "Unable to verify integrity of firmware image (%zd).\n",
8641	blob->fw->size);
8642	goto fail_fw_integrity;
8643	}
8644	for (i = 0; i < 4; i++)
8645	wcode[i] = be16_to_cpu(fwcode[i + 4]);
8646	if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8647	wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8648	wcode[2] == 0 && wcode[3] == 0)) {
8649	ql_log(ql_log_fatal, vha, 0x0086,
8650	fmt: "Unable to verify integrity of firmware image.\n");
8651	ql_log(ql_log_fatal, vha, 0x0087,
8652	fmt: "Firmware data: %04x %04x %04x %04x.\n",
8653	wcode[0], wcode[1], wcode[2], wcode[3]);
8654	goto fail_fw_integrity;
8655	}
8656
8657	seg = blob->segs;
8658	while (*seg && rval == QLA_SUCCESS) {
8659	risc_addr = *seg;
8660	*srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8661	risc_size = be16_to_cpu(fwcode[3]);
8662
8663	/* Validate firmware image size. */
8664	fwclen += risc_size * sizeof(uint16_t);
8665	if (blob->fw->size < fwclen) {
8666	ql_log(ql_log_fatal, vha, 0x0088,
8667	fmt: "Unable to verify integrity of firmware image "
8668	"(%zd).\n", blob->fw->size);
8669	goto fail_fw_integrity;
8670	}
8671
8672	fragment = 0;
8673	while (risc_size > 0 && rval == QLA_SUCCESS) {
8674	wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8675	if (wlen > risc_size)
8676	wlen = risc_size;
8677	ql_dbg(ql_dbg_init, vha, 0x0089,
8678	fmt: "Loading risc segment@ risc addr %x number of "
8679	"words 0x%x.\n", risc_addr, wlen);
8680
8681	for (i = 0; i < wlen; i++)
8682	wcode[i] = swab16((__force u32)fwcode[i]);
8683
8684	rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8685	wlen);
8686	if (rval) {
8687	ql_log(ql_log_fatal, vha, 0x008a,
8688	fmt: "Failed to load segment %d of firmware.\n",
8689	fragment);
8690	break;
8691	}
8692
8693	fwcode += wlen;
8694	risc_addr += wlen;
8695	risc_size -= wlen;
8696	fragment++;
8697	}
8698
8699	/* Next segment. */
8700	seg++;
8701	}
8702	return rval;
8703
8704	fail_fw_integrity:
8705	return QLA_FUNCTION_FAILED;
8706	}
8707
8708	static int
8709	qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8710	{
8711	int rval;
8712	uint templates, segments, fragment;
8713	uint32_t *dcode;
8714	ulong dlen;
8715	uint32_t risc_addr, risc_size, risc_attr = 0;
8716	ulong i;
8717	uint j;
8718	struct fw_blob *blob;
8719	__be32 *fwcode;
8720	struct qla_hw_data *ha = vha->hw;
8721	struct req_que *req = ha->req_q_map[0];
8722	struct fwdt *fwdt = ha->fwdt;
8723
8724	ql_dbg(ql_dbg_init, vha, 0x0090,
8725	fmt: "-> FW: Loading via request-firmware.\n");
8726
8727	blob = qla2x00_request_firmware(vha);
8728	if (!blob) {
8729	ql_log(ql_log_warn, vha, 0x0092,
8730	fmt: "-> Firmware file not found.\n");
8731
8732	return QLA_FUNCTION_FAILED;
8733	}
8734
8735	fwcode = (__force __be32 *)blob->fw->data;
8736	dcode = (__force uint32_t *)fwcode;
8737	if (qla24xx_risc_firmware_invalid(dword: dcode)) {
8738	ql_log(ql_log_fatal, vha, 0x0093,
8739	fmt: "Unable to verify integrity of firmware image (%zd).\n",
8740	blob->fw->size);
8741	ql_log(ql_log_fatal, vha, 0x0095,
8742	fmt: "Firmware data: %08x %08x %08x %08x.\n",
8743	dcode[0], dcode[1], dcode[2], dcode[3]);
8744	return QLA_FUNCTION_FAILED;
8745	}
8746
8747	dcode = (uint32_t *)req->ring;
8748	*srisc_addr = 0;
8749	segments = FA_RISC_CODE_SEGMENTS;
8750	for (j = 0; j < segments; j++) {
8751	ql_dbg(ql_dbg_init, vha, 0x0096,
8752	fmt: "-> Loading segment %u...\n", j);
8753	risc_addr = be32_to_cpu(fwcode[2]);
8754	risc_size = be32_to_cpu(fwcode[3]);
8755
8756	if (!*srisc_addr) {
8757	*srisc_addr = risc_addr;
8758	risc_attr = be32_to_cpu(fwcode[9]);
8759	}
8760
8761	dlen = ha->fw_transfer_size >> 2;
8762	for (fragment = 0; risc_size; fragment++) {
8763	if (dlen > risc_size)
8764	dlen = risc_size;
8765
8766	ql_dbg(ql_dbg_init, vha, 0x0097,
8767	fmt: "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8768	fragment, risc_addr,
8769	(uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8770	dlen);
8771
8772	for (i = 0; i < dlen; i++)
8773	dcode[i] = swab32((__force u32)fwcode[i]);
8774
8775	rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8776	if (rval) {
8777	ql_log(ql_log_fatal, vha, 0x0098,
8778	fmt: "-> Failed load firmware fragment %u.\n",
8779	fragment);
8780	return QLA_FUNCTION_FAILED;
8781	}
8782
8783	fwcode += dlen;
8784	risc_addr += dlen;
8785	risc_size -= dlen;
8786	}
8787	}
8788
8789	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8790	return QLA_SUCCESS;
8791
8792	templates = (risc_attr & BIT_9) ? 2 : 1;
8793	ql_dbg(ql_dbg_init, vha, 0x0170, fmt: "-> templates = %u\n", templates);
8794	for (j = 0; j < templates; j++, fwdt++) {
8795	vfree(addr: fwdt->template);
8796	fwdt->template = NULL;
8797	fwdt->length = 0;
8798
8799	risc_size = be32_to_cpu(fwcode[2]);
8800	ql_dbg(ql_dbg_init, vha, 0x0171,
8801	fmt: "-> fwdt%u template array at %#x (%#x dwords)\n",
8802	j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8803	risc_size);
8804	if (!risc_size || !~risc_size) {
8805	ql_dbg(ql_dbg_init, vha, 0x0172,
8806	fmt: "-> fwdt%u failed to read array\n", j);
8807	goto failed;
8808	}
8809
8810	/* skip header and ignore checksum */
8811	fwcode += 7;
8812	risc_size -= 8;
8813
8814	ql_dbg(ql_dbg_init, vha, 0x0173,
8815	fmt: "-> fwdt%u template allocate template %#x words...\n",
8816	j, risc_size);
8817	fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
8818	if (!fwdt->template) {
8819	ql_log(ql_log_warn, vha, 0x0174,
8820	fmt: "-> fwdt%u failed allocate template.\n", j);
8821	goto failed;
8822	}
8823
8824	dcode = fwdt->template;
8825	for (i = 0; i < risc_size; i++)
8826	dcode[i] = (__force u32)fwcode[i];
8827
8828	if (!qla27xx_fwdt_template_valid(dcode)) {
8829	ql_log(ql_log_warn, vha, 0x0175,
8830	fmt: "-> fwdt%u failed template validate\n", j);
8831	goto failed;
8832	}
8833
8834	dlen = qla27xx_fwdt_template_size(dcode);
8835	ql_dbg(ql_dbg_init, vha, 0x0176,
8836	fmt: "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8837	j, dlen, dlen / sizeof(*dcode));
8838	if (dlen > risc_size * sizeof(*dcode)) {
8839	ql_log(ql_log_warn, vha, 0x0177,
8840	fmt: "-> fwdt%u template exceeds array (%-lu bytes)\n",
8841	j, dlen - risc_size * sizeof(*dcode));
8842	goto failed;
8843	}
8844
8845	fwdt->length = dlen;
8846	ql_dbg(ql_dbg_init, vha, 0x0178,
8847	fmt: "-> fwdt%u loaded template ok\n", j);
8848
8849	fwcode += risc_size + 1;
8850	}
8851
8852	return QLA_SUCCESS;
8853
8854	failed:
8855	vfree(addr: fwdt->template);
8856	fwdt->template = NULL;
8857	fwdt->length = 0;
8858
8859	return QLA_SUCCESS;
8860	}
8861
8862	int
8863	qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8864	{
8865	int rval;
8866
8867	if (ql2xfwloadbin == 1)
8868	return qla81xx_load_risc(vha, srisc_addr);
8869
8870	/*
8871	* FW Load priority:
8872	* 1) Firmware via request-firmware interface (.bin file).
8873	* 2) Firmware residing in flash.
8874	*/
8875	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8876	if (rval == QLA_SUCCESS)
8877	return rval;
8878
8879	return qla24xx_load_risc_flash(vha, srisc_addr,
8880	faddr: vha->hw->flt_region_fw);
8881	}
8882
8883	int
8884	qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8885	{
8886	int rval;
8887	struct qla_hw_data *ha = vha->hw;
8888	struct active_regions active_regions = { };
8889
8890	if (ql2xfwloadbin == 2)
8891	goto try_blob_fw;
8892
8893	/* FW Load priority:
8894	* 1) Firmware residing in flash.
8895	* 2) Firmware via request-firmware interface (.bin file).
8896	* 3) Golden-Firmware residing in flash -- (limited operation).
8897	*/
8898
8899	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8900	goto try_primary_fw;
8901
8902	qla27xx_get_active_image(vha, active_regions: &active_regions);
8903
8904	if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8905	goto try_primary_fw;
8906
8907	ql_dbg(ql_dbg_init, vha, 0x008b,
8908	fmt: "Loading secondary firmware image.\n");
8909	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_fw_sec);
8910	if (!rval)
8911	return rval;
8912
8913	try_primary_fw:
8914	ql_dbg(ql_dbg_init, vha, 0x008b,
8915	fmt: "Loading primary firmware image.\n");
8916	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_fw);
8917	if (!rval)
8918	return rval;
8919
8920	try_blob_fw:
8921	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8922	if (!rval || !ha->flt_region_gold_fw)
8923	return rval;
8924
8925	ql_log(ql_log_info, vha, 0x0099,
8926	fmt: "Attempting to fallback to golden firmware.\n");
8927	rval = qla24xx_load_risc_flash(vha, srisc_addr, faddr: ha->flt_region_gold_fw);
8928	if (rval)
8929	return rval;
8930
8931	ql_log(ql_log_info, vha, 0x009a, fmt: "Need firmware flash update.\n");
8932	ha->flags.running_gold_fw = 1;
8933	return rval;
8934	}
8935
8936	void
8937	qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8938	{
8939	int ret, retries;
8940	struct qla_hw_data *ha = vha->hw;
8941
8942	if (ha->flags.pci_channel_io_perm_failure)
8943	return;
8944	if (!IS_FWI2_CAPABLE(ha))
8945	return;
8946	if (!ha->fw_major_version)
8947	return;
8948	if (!ha->flags.fw_started)
8949	return;
8950
8951	ret = qla2x00_stop_firmware(vha);
8952	for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8953	ret != QLA_INVALID_COMMAND && retries ; retries--) {
8954	ha->isp_ops->reset_chip(vha);
8955	if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8956	continue;
8957	if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8958	continue;
8959	ql_log(ql_log_info, vha, 0x8015,
8960	fmt: "Attempting retry of stop-firmware command.\n");
8961	ret = qla2x00_stop_firmware(vha);
8962	}
8963
8964	QLA_FW_STOPPED(ha);
8965	ha->flags.fw_init_done = 0;
8966	}
8967
8968	int
8969	qla24xx_configure_vhba(scsi_qla_host_t *vha)
8970	{
8971	int rval = QLA_SUCCESS;
8972	int rval2;
8973	uint16_t mb[MAILBOX_REGISTER_COUNT];
8974	struct qla_hw_data *ha = vha->hw;
8975	struct scsi_qla_host *base_vha = pci_get_drvdata(pdev: ha->pdev);
8976
8977	if (!vha->vp_idx)
8978	return -EINVAL;
8979
8980	rval = qla2x00_fw_ready(vha: base_vha);
8981
8982	if (rval == QLA_SUCCESS) {
8983	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
8984	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8985	}
8986
8987	vha->flags.management_server_logged_in = 0;
8988
8989	/* Login to SNS first */
8990	rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8991	BIT_1);
8992	if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8993	if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8994	ql_dbg(ql_dbg_init, vha, 0x0120,
8995	fmt: "Failed SNS login: loop_id=%x, rval2=%d\n",
8996	NPH_SNS, rval2);
8997	else
8998	ql_dbg(ql_dbg_init, vha, 0x0103,
8999	fmt: "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
9000	"mb[2]=%x mb[6]=%x mb[7]=%x.\n",
9001	NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
9002	return (QLA_FUNCTION_FAILED);
9003	}
9004
9005	atomic_set(v: &vha->loop_down_timer, i: 0);
9006	atomic_set(v: &vha->loop_state, LOOP_UP);
9007	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
9008	set_bit(LOCAL_LOOP_UPDATE, addr: &vha->dpc_flags);
9009	rval = qla2x00_loop_resync(vha: base_vha);
9010
9011	return rval;
9012	}
9013
9014	/* 84XX Support **************************************************************/
9015
9016	static LIST_HEAD(qla_cs84xx_list);
9017	static DEFINE_MUTEX(qla_cs84xx_mutex);
9018
9019	static struct qla_chip_state_84xx *
9020	qla84xx_get_chip(struct scsi_qla_host *vha)
9021	{
9022	struct qla_chip_state_84xx *cs84xx;
9023	struct qla_hw_data *ha = vha->hw;
9024
9025	mutex_lock(&qla_cs84xx_mutex);
9026
9027	/* Find any shared 84xx chip. */
9028	list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
9029	if (cs84xx->bus == ha->pdev->bus) {
9030	kref_get(kref: &cs84xx->kref);
9031	goto done;
9032	}
9033	}
9034
9035	cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
9036	if (!cs84xx)
9037	goto done;
9038
9039	kref_init(kref: &cs84xx->kref);
9040	spin_lock_init(&cs84xx->access_lock);
9041	mutex_init(&cs84xx->fw_update_mutex);
9042	cs84xx->bus = ha->pdev->bus;
9043
9044	list_add_tail(new: &cs84xx->list, head: &qla_cs84xx_list);
9045	done:
9046	mutex_unlock(lock: &qla_cs84xx_mutex);
9047	return cs84xx;
9048	}
9049
9050	static void
9051	__qla84xx_chip_release(struct kref *kref)
9052	{
9053	struct qla_chip_state_84xx *cs84xx =
9054	container_of(kref, struct qla_chip_state_84xx, kref);
9055
9056	mutex_lock(&qla_cs84xx_mutex);
9057	list_del(entry: &cs84xx->list);
9058	mutex_unlock(lock: &qla_cs84xx_mutex);
9059	kfree(objp: cs84xx);
9060	}
9061
9062	void
9063	qla84xx_put_chip(struct scsi_qla_host *vha)
9064	{
9065	struct qla_hw_data *ha = vha->hw;
9066
9067	if (ha->cs84xx)
9068	kref_put(kref: &ha->cs84xx->kref, release: __qla84xx_chip_release);
9069	}
9070
9071	static int
9072	qla84xx_init_chip(scsi_qla_host_t *vha)
9073	{
9074	int rval;
9075	uint16_t status[2];
9076	struct qla_hw_data *ha = vha->hw;
9077
9078	mutex_lock(&ha->cs84xx->fw_update_mutex);
9079
9080	rval = qla84xx_verify_chip(vha, status);
9081
9082	mutex_unlock(lock: &ha->cs84xx->fw_update_mutex);
9083
9084	return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
9085	QLA_SUCCESS;
9086	}
9087
9088	/* 81XX Support **************************************************************/
9089
9090	int
9091	qla81xx_nvram_config(scsi_qla_host_t *vha)
9092	{
9093	int rval;
9094	struct init_cb_81xx *icb;
9095	struct nvram_81xx *nv;
9096	__le32 *dptr;
9097	uint8_t *dptr1, *dptr2;
9098	uint32_t chksum;
9099	uint16_t cnt;
9100	struct qla_hw_data *ha = vha->hw;
9101	uint32_t faddr;
9102	struct active_regions active_regions = { };
9103
9104	rval = QLA_SUCCESS;
9105	icb = (struct init_cb_81xx *)ha->init_cb;
9106	nv = ha->nvram;
9107
9108	/* Determine NVRAM starting address. */
9109	ha->nvram_size = sizeof(*nv);
9110	ha->vpd_size = FA_NVRAM_VPD_SIZE;
9111	if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
9112	ha->vpd_size = FA_VPD_SIZE_82XX;
9113
9114	if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
9115	qla28xx_get_aux_images(vha, active_regions: &active_regions);
9116
9117	/* Get VPD data into cache */
9118	ha->vpd = ha->nvram + VPD_OFFSET;
9119
9120	faddr = ha->flt_region_vpd;
9121	if (IS_QLA28XX(ha)) {
9122	if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9123	faddr = ha->flt_region_vpd_sec;
9124	ql_dbg(ql_dbg_init, vha, 0x0110,
9125	fmt: "Loading %s nvram image.\n",
9126	active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9127	"primary" : "secondary");
9128	}
9129	ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
9130
9131	/* Get NVRAM data into cache and calculate checksum. */
9132	faddr = ha->flt_region_nvram;
9133	if (IS_QLA28XX(ha)) {
9134	if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9135	faddr = ha->flt_region_nvram_sec;
9136	}
9137	ql_dbg(ql_dbg_init, vha, 0x0110,
9138	fmt: "Loading %s nvram image.\n",
9139	active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9140	"primary" : "secondary");
9141	ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
9142
9143	dptr = (__force __le32 *)nv;
9144	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
9145	chksum += le32_to_cpu(*dptr);
9146
9147	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
9148	fmt: "Contents of NVRAM:\n");
9149	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
9150	nv, ha->nvram_size);
9151
9152	/* Bad NVRAM data, set defaults parameters. */
9153	if (chksum || memcmp(p: "ISP ", q: nv->id, size: sizeof(nv->id)) ||
9154	le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
9155	/* Reset NVRAM data. */
9156	ql_log(ql_log_info, vha, 0x0073,
9157	fmt: "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
9158	chksum, nv->id, le16_to_cpu(nv->nvram_version));
9159	ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
9160	ql_log(ql_log_info, vha, 0x0074,
9161	fmt: "Falling back to functioning (yet invalid -- WWPN) "
9162	"defaults.\n");
9163
9164	/*
9165	* Set default initialization control block.
9166	*/
9167	memset(nv, 0, ha->nvram_size);
9168	nv->nvram_version = cpu_to_le16(ICB_VERSION);
9169	nv->version = cpu_to_le16(ICB_VERSION);
9170	nv->frame_payload_size = cpu_to_le16(2048);
9171	nv->execution_throttle = cpu_to_le16(0xFFFF);
9172	nv->exchange_count = cpu_to_le16(0);
9173	nv->port_name[0] = 0x21;
9174	nv->port_name[1] = 0x00 + ha->port_no + 1;
9175	nv->port_name[2] = 0x00;
9176	nv->port_name[3] = 0xe0;
9177	nv->port_name[4] = 0x8b;
9178	nv->port_name[5] = 0x1c;
9179	nv->port_name[6] = 0x55;
9180	nv->port_name[7] = 0x86;
9181	nv->node_name[0] = 0x20;
9182	nv->node_name[1] = 0x00;
9183	nv->node_name[2] = 0x00;
9184	nv->node_name[3] = 0xe0;
9185	nv->node_name[4] = 0x8b;
9186	nv->node_name[5] = 0x1c;
9187	nv->node_name[6] = 0x55;
9188	nv->node_name[7] = 0x86;
9189	nv->login_retry_count = cpu_to_le16(8);
9190	nv->interrupt_delay_timer = cpu_to_le16(0);
9191	nv->login_timeout = cpu_to_le16(0);
9192	nv->firmware_options_1 =
9193	cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
9194	nv->firmware_options_2 = cpu_to_le32(2 << 4);
9195	nv->firmware_options_2 |= cpu_to_le32(BIT_12);
9196	nv->firmware_options_3 = cpu_to_le32(2 << 13);
9197	nv->host_p = cpu_to_le32(BIT_11|BIT_10);
9198	nv->efi_parameters = cpu_to_le32(0);
9199	nv->reset_delay = 5;
9200	nv->max_luns_per_target = cpu_to_le16(128);
9201	nv->port_down_retry_count = cpu_to_le16(30);
9202	nv->link_down_timeout = cpu_to_le16(180);
9203	nv->enode_mac[0] = 0x00;
9204	nv->enode_mac[1] = 0xC0;
9205	nv->enode_mac[2] = 0xDD;
9206	nv->enode_mac[3] = 0x04;
9207	nv->enode_mac[4] = 0x05;
9208	nv->enode_mac[5] = 0x06 + ha->port_no + 1;
9209
9210	rval = 1;
9211	}
9212
9213	if (IS_T10_PI_CAPABLE(ha))
9214	nv->frame_payload_size &= cpu_to_le16(~7);
9215
9216	qlt_81xx_config_nvram_stage1(vha, nv);
9217
9218	/* Reset Initialization control block */
9219	memset(icb, 0, ha->init_cb_size);
9220
9221	/* Copy 1st segment. */
9222	dptr1 = (uint8_t *)icb;
9223	dptr2 = (uint8_t *)&nv->version;
9224	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
9225	while (cnt--)
9226	*dptr1++ = *dptr2++;
9227
9228	icb->login_retry_count = nv->login_retry_count;
9229
9230	/* Copy 2nd segment. */
9231	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
9232	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
9233	cnt = (uint8_t *)&icb->reserved_5 -
9234	(uint8_t *)&icb->interrupt_delay_timer;
9235	while (cnt--)
9236	*dptr1++ = *dptr2++;
9237
9238	memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
9239	/* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
9240	if (!memcmp(p: icb->enode_mac, q: "\0\0\0\0\0\0", size: sizeof(icb->enode_mac))) {
9241	icb->enode_mac[0] = 0x00;
9242	icb->enode_mac[1] = 0xC0;
9243	icb->enode_mac[2] = 0xDD;
9244	icb->enode_mac[3] = 0x04;
9245	icb->enode_mac[4] = 0x05;
9246	icb->enode_mac[5] = 0x06 + ha->port_no + 1;
9247	}
9248
9249	/* Use extended-initialization control block. */
9250	memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
9251	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
9252	/*
9253	* Setup driver NVRAM options.
9254	*/
9255	qla2x00_set_model_info(vha, model: nv->model_name, len: sizeof(nv->model_name),
9256	def: "QLE8XXX");
9257
9258	qlt_81xx_config_nvram_stage2(vha, icb);
9259
9260	/* Use alternate WWN? */
9261	if (nv->host_p & cpu_to_le32(BIT_15)) {
9262	memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
9263	memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
9264	}
9265
9266	/* Prepare nodename */
9267	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
9268	/*
9269	* Firmware will apply the following mask if the nodename was
9270	* not provided.
9271	*/
9272	memcpy(icb->node_name, icb->port_name, WWN_SIZE);
9273	icb->node_name[0] &= 0xF0;
9274	}
9275
9276	if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
9277	if ((nv->enhanced_features & BIT_7) == 0)
9278	ha->flags.scm_supported_a = 1;
9279	}
9280
9281	/* Set host adapter parameters. */
9282	ha->flags.disable_risc_code_load = 0;
9283	ha->flags.enable_lip_reset = 0;
9284	ha->flags.enable_lip_full_login =
9285	le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
9286	ha->flags.enable_target_reset =
9287	le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
9288	ha->flags.enable_led_scheme = 0;
9289	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
9290
9291	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
9292	(BIT_6 | BIT_5 | BIT_4)) >> 4;
9293
9294	/* save HBA serial number */
9295	ha->serial0 = icb->port_name[5];
9296	ha->serial1 = icb->port_name[6];
9297	ha->serial2 = icb->port_name[7];
9298	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
9299	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
9300
9301	icb->execution_throttle = cpu_to_le16(0xFFFF);
9302
9303	ha->retry_count = le16_to_cpu(nv->login_retry_count);
9304
9305	/* Set minimum login_timeout to 4 seconds. */
9306	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
9307	nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
9308	if (le16_to_cpu(nv->login_timeout) < 4)
9309	nv->login_timeout = cpu_to_le16(4);
9310	ha->login_timeout = le16_to_cpu(nv->login_timeout);
9311
9312	/* Set minimum RATOV to 100 tenths of a second. */
9313	ha->r_a_tov = 100;
9314
9315	ha->loop_reset_delay = nv->reset_delay;
9316
9317	/* Link Down Timeout = 0:
9318	*
9319	* When Port Down timer expires we will start returning
9320	* I/O's to OS with "DID_NO_CONNECT".
9321	*
9322	* Link Down Timeout != 0:
9323	*
9324	* The driver waits for the link to come up after link down
9325	* before returning I/Os to OS with "DID_NO_CONNECT".
9326	*/
9327	if (le16_to_cpu(nv->link_down_timeout) == 0) {
9328	ha->loop_down_abort_time =
9329	(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
9330	} else {
9331	ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
9332	ha->loop_down_abort_time =
9333	(LOOP_DOWN_TIME - ha->link_down_timeout);
9334	}
9335
9336	/* Need enough time to try and get the port back. */
9337	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
9338	if (qlport_down_retry)
9339	ha->port_down_retry_count = qlport_down_retry;
9340
9341	/* Set login_retry_count */
9342	ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
9343	if (ha->port_down_retry_count ==
9344	le16_to_cpu(nv->port_down_retry_count) &&
9345	ha->port_down_retry_count > 3)
9346	ha->login_retry_count = ha->port_down_retry_count;
9347	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
9348	ha->login_retry_count = ha->port_down_retry_count;
9349	if (ql2xloginretrycount)
9350	ha->login_retry_count = ql2xloginretrycount;
9351
9352	/* if not running MSI-X we need handshaking on interrupts */
9353	if (!vha->hw->flags.msix_enabled &&
9354	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
9355	icb->firmware_options_2 |= cpu_to_le32(BIT_22);
9356
9357	/* Enable ZIO. */
9358	if (!vha->flags.init_done) {
9359	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
9360	(BIT_3 | BIT_2 | BIT_1 | BIT_0);
9361	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
9362	le16_to_cpu(icb->interrupt_delay_timer) : 2;
9363	}
9364	icb->firmware_options_2 &= cpu_to_le32(
9365	~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
9366	vha->flags.process_response_queue = 0;
9367	if (ha->zio_mode != QLA_ZIO_DISABLED) {
9368	ha->zio_mode = QLA_ZIO_MODE_6;
9369
9370	ql_log(ql_log_info, vha, 0x0075,
9371	fmt: "ZIO mode %d enabled; timer delay (%d us).\n",
9372	ha->zio_mode,
9373	ha->zio_timer * 100);
9374
9375	icb->firmware_options_2 |= cpu_to_le32(
9376	(uint32_t)ha->zio_mode);
9377	icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
9378	vha->flags.process_response_queue = 1;
9379	}
9380
9381	/* enable RIDA Format2 */
9382	icb->firmware_options_3 |= cpu_to_le32(BIT_0);
9383
9384	/* N2N: driver will initiate Login instead of FW */
9385	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
9386
9387	/* Determine NVMe/FCP priority for target ports */
9388	ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
9389
9390	if (rval) {
9391	ql_log(ql_log_warn, vha, 0x0076,
9392	fmt: "NVRAM configuration failed.\n");
9393	}
9394	return (rval);
9395	}
9396
9397	int
9398	qla82xx_restart_isp(scsi_qla_host_t *vha)
9399	{
9400	int status, rval;
9401	struct qla_hw_data *ha = vha->hw;
9402	struct scsi_qla_host *vp, *tvp;
9403	unsigned long flags;
9404
9405	status = qla2x00_init_rings(vha);
9406	if (!status) {
9407	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
9408	ha->flags.chip_reset_done = 1;
9409
9410	status = qla2x00_fw_ready(vha);
9411	if (!status) {
9412	/* Issue a marker after FW becomes ready. */
9413	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
9414	vha->flags.online = 1;
9415	set_bit(LOOP_RESYNC_NEEDED, addr: &vha->dpc_flags);
9416	}
9417
9418	/* if no cable then assume it's good */
9419	if ((vha->device_flags & DFLG_NO_CABLE))
9420	status = 0;
9421	}
9422
9423	if (!status) {
9424	clear_bit(RESET_MARKER_NEEDED, addr: &vha->dpc_flags);
9425
9426	if (!atomic_read(v: &vha->loop_down_timer)) {
9427	/*
9428	* Issue marker command only when we are going
9429	* to start the I/O .
9430	*/
9431	vha->marker_needed = 1;
9432	}
9433
9434	ha->isp_ops->enable_intrs(ha);
9435
9436	ha->isp_abort_cnt = 0;
9437	clear_bit(ISP_ABORT_RETRY, addr: &vha->dpc_flags);
9438
9439	/* Update the firmware version */
9440	status = qla82xx_check_md_needed(vha);
9441
9442	if (ha->fce) {
9443	ha->flags.fce_enabled = 1;
9444	memset(ha->fce, 0,
9445	fce_calc_size(ha->fce_bufs));
9446	rval = qla2x00_enable_fce_trace(vha,
9447	ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9448	&ha->fce_bufs);
9449	if (rval) {
9450	ql_log(ql_log_warn, vha, 0x8001,
9451	fmt: "Unable to reinitialize FCE (%d).\n",
9452	rval);
9453	ha->flags.fce_enabled = 0;
9454	}
9455	}
9456
9457	if (ha->eft) {
9458	memset(ha->eft, 0, EFT_SIZE);
9459	rval = qla2x00_enable_eft_trace(vha,
9460	ha->eft_dma, EFT_NUM_BUFFERS);
9461	if (rval) {
9462	ql_log(ql_log_warn, vha, 0x8010,
9463	fmt: "Unable to reinitialize EFT (%d).\n",
9464	rval);
9465	}
9466	}
9467	}
9468
9469	if (!status) {
9470	ql_dbg(ql_dbg_taskm, vha, 0x8011,
9471	fmt: "qla82xx_restart_isp succeeded.\n");
9472
9473	spin_lock_irqsave(&ha->vport_slock, flags);
9474	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9475	if (vp->vp_idx) {
9476	atomic_inc(v: &vp->vref_count);
9477	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
9478
9479	qla2x00_vp_abort_isp(vp);
9480
9481	spin_lock_irqsave(&ha->vport_slock, flags);
9482	atomic_dec(v: &vp->vref_count);
9483	}
9484	}
9485	spin_unlock_irqrestore(lock: &ha->vport_slock, flags);
9486
9487	} else {
9488	ql_log(ql_log_warn, vha, 0x8016,
9489	fmt: "qla82xx_restart_isp **** FAILED ****.\n");
9490	}
9491
9492	return status;
9493	}
9494
9495	/*
9496	* qla24xx_get_fcp_prio
9497	* Gets the fcp cmd priority value for the logged in port.
9498	* Looks for a match of the port descriptors within
9499	* each of the fcp prio config entries. If a match is found,
9500	* the tag (priority) value is returned.
9501	*
9502	* Input:
9503	* vha = scsi host structure pointer.
9504	* fcport = port structure pointer.
9505	*
9506	* Return:
9507	* non-zero (if found)
9508	* -1 (if not found)
9509	*
9510	* Context:
9511	* Kernel context
9512	*/
9513	static int
9514	qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9515	{
9516	int i, entries;
9517	uint8_t pid_match, wwn_match;
9518	int priority;
9519	uint32_t pid1, pid2;
9520	uint64_t wwn1, wwn2;
9521	struct qla_fcp_prio_entry *pri_entry;
9522	struct qla_hw_data *ha = vha->hw;
9523
9524	if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9525	return -1;
9526
9527	priority = -1;
9528	entries = ha->fcp_prio_cfg->num_entries;
9529	pri_entry = &ha->fcp_prio_cfg->entry[0];
9530
9531	for (i = 0; i < entries; i++) {
9532	pid_match = wwn_match = 0;
9533
9534	if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9535	pri_entry++;
9536	continue;
9537	}
9538
9539	/* check source pid for a match */
9540	if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9541	pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9542	pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9543	if (pid1 == INVALID_PORT_ID)
9544	pid_match++;
9545	else if (pid1 == pid2)
9546	pid_match++;
9547	}
9548
9549	/* check destination pid for a match */
9550	if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9551	pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9552	pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9553	if (pid1 == INVALID_PORT_ID)
9554	pid_match++;
9555	else if (pid1 == pid2)
9556	pid_match++;
9557	}
9558
9559	/* check source WWN for a match */
9560	if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9561	wwn1 = wwn_to_u64(wwn: vha->port_name);
9562	wwn2 = wwn_to_u64(wwn: pri_entry->src_wwpn);
9563	if (wwn2 == (uint64_t)-1)
9564	wwn_match++;
9565	else if (wwn1 == wwn2)
9566	wwn_match++;
9567	}
9568
9569	/* check destination WWN for a match */
9570	if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9571	wwn1 = wwn_to_u64(wwn: fcport->port_name);
9572	wwn2 = wwn_to_u64(wwn: pri_entry->dst_wwpn);
9573	if (wwn2 == (uint64_t)-1)
9574	wwn_match++;
9575	else if (wwn1 == wwn2)
9576	wwn_match++;
9577	}
9578
9579	if (pid_match == 2 || wwn_match == 2) {
9580	/* Found a matching entry */
9581	if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9582	priority = pri_entry->tag;
9583	break;
9584	}
9585
9586	pri_entry++;
9587	}
9588
9589	return priority;
9590	}
9591
9592	/*
9593	* qla24xx_update_fcport_fcp_prio
9594	* Activates fcp priority for the logged in fc port
9595	*
9596	* Input:
9597	* vha = scsi host structure pointer.
9598	* fcp = port structure pointer.
9599	*
9600	* Return:
9601	* QLA_SUCCESS or QLA_FUNCTION_FAILED
9602	*
9603	* Context:
9604	* Kernel context.
9605	*/
9606	int
9607	qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9608	{
9609	int ret;
9610	int priority;
9611	uint16_t mb[5];
9612
9613	if (fcport->port_type != FCT_TARGET ||
9614	fcport->loop_id == FC_NO_LOOP_ID)
9615	return QLA_FUNCTION_FAILED;
9616
9617	priority = qla24xx_get_fcp_prio(vha, fcport);
9618	if (priority < 0)
9619	return QLA_FUNCTION_FAILED;
9620
9621	if (IS_P3P_TYPE(vha->hw)) {
9622	fcport->fcp_prio = priority & 0xf;
9623	return QLA_SUCCESS;
9624	}
9625
9626	ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9627	if (ret == QLA_SUCCESS) {
9628	if (fcport->fcp_prio != priority)
9629	ql_dbg(ql_dbg_user, vha, 0x709e,
9630	fmt: "Updated FCP_CMND priority - value=%d loop_id=%d "
9631	"port_id=%02x%02x%02x.\n", priority,
9632	fcport->loop_id, fcport->d_id.b.domain,
9633	fcport->d_id.b.area, fcport->d_id.b.al_pa);
9634	fcport->fcp_prio = priority & 0xf;
9635	} else
9636	ql_dbg(ql_dbg_user, vha, 0x704f,
9637	fmt: "Unable to update FCP_CMND priority - ret=0x%x for "
9638	"loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9639	fcport->d_id.b.domain, fcport->d_id.b.area,
9640	fcport->d_id.b.al_pa);
9641	return ret;
9642	}
9643
9644	/*
9645	* qla24xx_update_all_fcp_prio
9646	* Activates fcp priority for all the logged in ports
9647	*
9648	* Input:
9649	* ha = adapter block pointer.
9650	*
9651	* Return:
9652	* QLA_SUCCESS or QLA_FUNCTION_FAILED
9653	*
9654	* Context:
9655	* Kernel context.
9656	*/
9657	int
9658	qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9659	{
9660	int ret;
9661	fc_port_t *fcport;
9662
9663	ret = QLA_FUNCTION_FAILED;
9664	/* We need to set priority for all logged in ports */
9665	list_for_each_entry(fcport, &vha->vp_fcports, list)
9666	ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9667
9668	return ret;
9669	}
9670
9671	struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9672	int vp_idx, bool startqp)
9673	{
9674	int rsp_id = 0;
9675	int req_id = 0;
9676	int i;
9677	struct qla_hw_data *ha = vha->hw;
9678	uint16_t qpair_id = 0;
9679	struct qla_qpair *qpair = NULL;
9680	struct qla_msix_entry *msix;
9681
9682	if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9683	ql_log(ql_log_warn, vha, 0x00181,
9684	fmt: "FW/Driver is not multi-queue capable.\n");
9685	return NULL;
9686	}
9687
9688	if (ql2xmqsupport || ql2xnvmeenable) {
9689	qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9690	if (qpair == NULL) {
9691	ql_log(ql_log_warn, vha, 0x0182,
9692	fmt: "Failed to allocate memory for queue pair.\n");
9693	return NULL;
9694	}
9695
9696	qpair->hw = vha->hw;
9697	qpair->vha = vha;
9698	qpair->qp_lock_ptr = &qpair->qp_lock;
9699	spin_lock_init(&qpair->qp_lock);
9700	qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9701
9702	/* Assign available que pair id */
9703	mutex_lock(&ha->mq_lock);
9704	qpair_id = find_first_zero_bit(addr: ha->qpair_qid_map, size: ha->max_qpairs);
9705	if (ha->num_qpairs >= ha->max_qpairs) {
9706	mutex_unlock(lock: &ha->mq_lock);
9707	ql_log(ql_log_warn, vha, 0x0183,
9708	fmt: "No resources to create additional q pair.\n");
9709	goto fail_qid_map;
9710	}
9711	ha->num_qpairs++;
9712	set_bit(nr: qpair_id, addr: ha->qpair_qid_map);
9713	ha->queue_pair_map[qpair_id] = qpair;
9714	qpair->id = qpair_id;
9715	qpair->vp_idx = vp_idx;
9716	qpair->fw_started = ha->flags.fw_started;
9717	INIT_LIST_HEAD(list: &qpair->hints_list);
9718	INIT_LIST_HEAD(list: &qpair->dsd_list);
9719	qpair->chip_reset = ha->base_qpair->chip_reset;
9720	qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9721	qpair->enable_explicit_conf =
9722	ha->base_qpair->enable_explicit_conf;
9723
9724	for (i = 0; i < ha->msix_count; i++) {
9725	msix = &ha->msix_entries[i];
9726	if (msix->in_use)
9727	continue;
9728	qpair->msix = msix;
9729	ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9730	fmt: "Vector %x selected for qpair\n", msix->vector);
9731	break;
9732	}
9733	if (!qpair->msix) {
9734	ql_log(ql_log_warn, vha, 0x0184,
9735	fmt: "Out of MSI-X vectors!.\n");
9736	goto fail_msix;
9737	}
9738
9739	qpair->msix->in_use = 1;
9740	list_add_tail(new: &qpair->qp_list_elem, head: &vha->qp_list);
9741	qpair->pdev = ha->pdev;
9742	if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9743	qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9744
9745	mutex_unlock(lock: &ha->mq_lock);
9746
9747	/* Create response queue first */
9748	rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9749	if (!rsp_id) {
9750	ql_log(ql_log_warn, vha, 0x0185,
9751	fmt: "Failed to create response queue.\n");
9752	goto fail_rsp;
9753	}
9754
9755	qpair->rsp = ha->rsp_q_map[rsp_id];
9756
9757	/* Create request queue */
9758	req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9759	startqp);
9760	if (!req_id) {
9761	ql_log(ql_log_warn, vha, 0x0186,
9762	fmt: "Failed to create request queue.\n");
9763	goto fail_req;
9764	}
9765
9766	qpair->req = ha->req_q_map[req_id];
9767	qpair->rsp->req = qpair->req;
9768	qpair->rsp->qpair = qpair;
9769
9770	if (!qpair->cpu_mapped)
9771	qla_cpu_update(qpair, raw_smp_processor_id());
9772
9773	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9774	if (ha->fw_attributes & BIT_4)
9775	qpair->difdix_supported = 1;
9776	}
9777
9778	qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9779	if (!qpair->srb_mempool) {
9780	ql_log(ql_log_warn, vha, 0xd036,
9781	fmt: "Failed to create srb mempool for qpair %d\n",
9782	qpair->id);
9783	goto fail_mempool;
9784	}
9785
9786	if (qla_create_buf_pool(vha, qpair)) {
9787	ql_log(ql_log_warn, vha, 0xd036,
9788	fmt: "Failed to initialize buf pool for qpair %d\n",
9789	qpair->id);
9790	goto fail_bufpool;
9791	}
9792
9793	/* Mark as online */
9794	qpair->online = 1;
9795
9796	if (!vha->flags.qpairs_available)
9797	vha->flags.qpairs_available = 1;
9798
9799	ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9800	fmt: "Request/Response queue pair created, id %d\n",
9801	qpair->id);
9802	ql_dbg(ql_dbg_init, vha, 0x0187,
9803	fmt: "Request/Response queue pair created, id %d\n",
9804	qpair->id);
9805	}
9806	return qpair;
9807
9808	fail_bufpool:
9809	mempool_destroy(pool: qpair->srb_mempool);
9810	fail_mempool:
9811	qla25xx_delete_req_que(vha, qpair->req);
9812	fail_req:
9813	qla25xx_delete_rsp_que(vha, qpair->rsp);
9814	fail_rsp:
9815	mutex_lock(&ha->mq_lock);
9816	qpair->msix->in_use = 0;
9817	list_del(entry: &qpair->qp_list_elem);
9818	if (list_empty(head: &vha->qp_list))
9819	vha->flags.qpairs_available = 0;
9820	fail_msix:
9821	ha->queue_pair_map[qpair_id] = NULL;
9822	clear_bit(nr: qpair_id, addr: ha->qpair_qid_map);
9823	ha->num_qpairs--;
9824	mutex_unlock(lock: &ha->mq_lock);
9825	fail_qid_map:
9826	kfree(objp: qpair);
9827	return NULL;
9828	}
9829
9830	int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9831	{
9832	int ret = QLA_FUNCTION_FAILED;
9833	struct qla_hw_data *ha = qpair->hw;
9834
9835	qpair->delete_in_progress = 1;
9836
9837	qla_free_buf_pool(qpair);
9838
9839	ret = qla25xx_delete_req_que(vha, qpair->req);
9840	if (ret != QLA_SUCCESS)
9841	goto fail;
9842
9843	ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9844	if (ret != QLA_SUCCESS)
9845	goto fail;
9846
9847	if (!list_empty(head: &qpair->dsd_list)) {
9848	struct dsd_dma *dsd_ptr, *tdsd_ptr;
9849
9850	/* clean up allocated prev pool */
9851	list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
9852	&qpair->dsd_list, list) {
9853	dma_pool_free(pool: ha->dl_dma_pool, vaddr: dsd_ptr->dsd_addr,
9854	addr: dsd_ptr->dsd_list_dma);
9855	list_del(entry: &dsd_ptr->list);
9856	kfree(objp: dsd_ptr);
9857	}
9858	}
9859
9860	mutex_lock(&ha->mq_lock);
9861	ha->queue_pair_map[qpair->id] = NULL;
9862	clear_bit(nr: qpair->id, addr: ha->qpair_qid_map);
9863	ha->num_qpairs--;
9864	list_del(entry: &qpair->qp_list_elem);
9865	if (list_empty(head: &vha->qp_list)) {
9866	vha->flags.qpairs_available = 0;
9867	vha->flags.qpairs_req_created = 0;
9868	vha->flags.qpairs_rsp_created = 0;
9869	}
9870	mempool_destroy(pool: qpair->srb_mempool);
9871	kfree(objp: qpair);
9872	mutex_unlock(lock: &ha->mq_lock);
9873
9874	return QLA_SUCCESS;
9875	fail:
9876	return ret;
9877	}
9878
9879	uint64_t
9880	qla2x00_count_set_bits(uint32_t num)
9881	{
9882	/* Brian Kernighan's Algorithm */
9883	u64 count = 0;
9884
9885	while (num) {
9886	num &= (num - 1);
9887	count++;
9888	}
9889	return count;
9890	}
9891
9892	uint64_t
9893	qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9894	{
9895	fc_port_t *f, *tf;
9896	u64 count = 0;
9897
9898	f = NULL;
9899	tf = NULL;
9900
9901	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9902	if (f->port_type != FCT_TARGET)
9903	continue;
9904	count++;
9905	}
9906	return count;
9907	}
9908
9909	int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9910	{
9911	scsi_qla_host_t *vha = shost_priv(shost: host);
9912	fc_port_t *fcport = NULL;
9913	unsigned long int_flags;
9914
9915	if (flags & QLA2XX_HW_ERROR)
9916	vha->hw_err_cnt = 0;
9917	if (flags & QLA2XX_SHT_LNK_DWN)
9918	vha->short_link_down_cnt = 0;
9919	if (flags & QLA2XX_INT_ERR)
9920	vha->interface_err_cnt = 0;
9921	if (flags & QLA2XX_CMD_TIMEOUT)
9922	vha->cmd_timeout_cnt = 0;
9923	if (flags & QLA2XX_RESET_CMD_ERR)
9924	vha->reset_cmd_err_cnt = 0;
9925	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9926	spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9927	list_for_each_entry(fcport, &vha->vp_fcports, list) {
9928	fcport->tgt_short_link_down_cnt = 0;
9929	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9930	}
9931	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags: int_flags);
9932	}
9933	vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9934	return 0;
9935	}
9936
9937	int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9938	{
9939	return qla2xxx_reset_stats(host, flags);
9940	}
9941
9942	int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9943	{
9944	return qla2xxx_reset_stats(host, flags);
9945	}
9946
9947	int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9948	void *data, u64 size)
9949	{
9950	scsi_qla_host_t *vha = shost_priv(shost: host);
9951	struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9952	struct ql_vnd_stats *rsp_data = &resp->stats;
9953	u64 ini_entry_count = 0;
9954	u64 i = 0;
9955	u64 entry_count = 0;
9956	u64 num_tgt = 0;
9957	u32 tmp_stat_type = 0;
9958	fc_port_t *fcport = NULL;
9959	unsigned long int_flags;
9960
9961	/* Copy stat type to work on it */
9962	tmp_stat_type = flags;
9963
9964	if (tmp_stat_type & BIT_17) {
9965	num_tgt = qla2x00_get_num_tgts(vha);
9966	/* unset BIT_17 */
9967	tmp_stat_type &= ~(1 << 17);
9968	}
9969	ini_entry_count = qla2x00_count_set_bits(num: tmp_stat_type);
9970
9971	entry_count = ini_entry_count + num_tgt;
9972
9973	rsp_data->entry_count = entry_count;
9974
9975	i = 0;
9976	if (flags & QLA2XX_HW_ERROR) {
9977	rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9978	rsp_data->entry[i].tgt_num = 0x0;
9979	rsp_data->entry[i].cnt = vha->hw_err_cnt;
9980	i++;
9981	}
9982
9983	if (flags & QLA2XX_SHT_LNK_DWN) {
9984	rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9985	rsp_data->entry[i].tgt_num = 0x0;
9986	rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9987	i++;
9988	}
9989
9990	if (flags & QLA2XX_INT_ERR) {
9991	rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9992	rsp_data->entry[i].tgt_num = 0x0;
9993	rsp_data->entry[i].cnt = vha->interface_err_cnt;
9994	i++;
9995	}
9996
9997	if (flags & QLA2XX_CMD_TIMEOUT) {
9998	rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9999	rsp_data->entry[i].tgt_num = 0x0;
10000	rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
10001	i++;
10002	}
10003
10004	if (flags & QLA2XX_RESET_CMD_ERR) {
10005	rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
10006	rsp_data->entry[i].tgt_num = 0x0;
10007	rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
10008	i++;
10009	}
10010
10011	/* i will continue from previous loop, as target
10012	* entries are after initiator
10013	*/
10014	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
10015	spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
10016	list_for_each_entry(fcport, &vha->vp_fcports, list) {
10017	if (fcport->port_type != FCT_TARGET)
10018	continue;
10019	if (!fcport->rport)
10020	continue;
10021	rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
10022	rsp_data->entry[i].tgt_num = fcport->rport->number;
10023	rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
10024	i++;
10025	}
10026	spin_unlock_irqrestore(lock: &vha->hw->tgt.sess_lock, flags: int_flags);
10027	}
10028	resp->status = EXT_STATUS_OK;
10029
10030	return 0;
10031	}
10032
10033	int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
10034	struct fc_rport *rport, void *data, u64 size)
10035	{
10036	struct ql_vnd_tgt_stats_resp *tgt_data = data;
10037	fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
10038
10039	tgt_data->status = 0;
10040	tgt_data->stats.entry_count = 1;
10041	tgt_data->stats.entry[0].stat_type = flags;
10042	tgt_data->stats.entry[0].tgt_num = rport->number;
10043	tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
10044
10045	return 0;
10046	}
10047
10048	int qla2xxx_disable_port(struct Scsi_Host *host)
10049	{
10050	scsi_qla_host_t *vha = shost_priv(shost: host);
10051
10052	vha->hw->flags.port_isolated = 1;
10053
10054	if (qla2x00_isp_reg_stat(ha: vha->hw)) {
10055	ql_log(ql_log_info, vha, 0x9006,
10056	fmt: "PCI/Register disconnect, exiting.\n");
10057	qla_pci_set_eeh_busy(vha);
10058	return FAILED;
10059	}
10060	if (qla2x00_chip_is_down(vha))
10061	return 0;
10062
10063	if (vha->flags.online) {
10064	qla2x00_abort_isp_cleanup(vha);
10065	qla2x00_wait_for_sess_deletion(vha);
10066	}
10067
10068	return 0;
10069	}
10070
10071	int qla2xxx_enable_port(struct Scsi_Host *host)
10072	{
10073	scsi_qla_host_t *vha = shost_priv(shost: host);
10074
10075	if (qla2x00_isp_reg_stat(ha: vha->hw)) {
10076	ql_log(ql_log_info, vha, 0x9001,
10077	fmt: "PCI/Register disconnect, exiting.\n");
10078	qla_pci_set_eeh_busy(vha);
10079	return FAILED;
10080	}
10081
10082	vha->hw->flags.port_isolated = 0;
10083	/* Set the flag to 1, so that isp_abort can proceed */
10084	vha->flags.online = 1;
10085	set_bit(ISP_ABORT_NEEDED, addr: &vha->dpc_flags);
10086	qla2xxx_wake_dpc(vha);
10087
10088	return 0;
10089	}
10090