1 | //===-- MSP430RegisterInfo.cpp - MSP430 Register Information --------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file contains the MSP430 implementation of the TargetRegisterInfo class. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #include "MSP430RegisterInfo.h" |
14 | #include "MSP430.h" |
15 | #include "MSP430MachineFunctionInfo.h" |
16 | #include "MSP430TargetMachine.h" |
17 | #include "llvm/ADT/BitVector.h" |
18 | #include "llvm/CodeGen/MachineFrameInfo.h" |
19 | #include "llvm/CodeGen/MachineFunction.h" |
20 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
21 | #include "llvm/IR/Function.h" |
22 | #include "llvm/Support/ErrorHandling.h" |
23 | #include "llvm/Target/TargetMachine.h" |
24 | #include "llvm/Target/TargetOptions.h" |
25 | |
26 | using namespace llvm; |
27 | |
28 | #define DEBUG_TYPE "msp430-reg-info" |
29 | |
30 | #define GET_REGINFO_TARGET_DESC |
31 | #include "MSP430GenRegisterInfo.inc" |
32 | |
33 | // FIXME: Provide proper call frame setup / destroy opcodes. |
34 | MSP430RegisterInfo::MSP430RegisterInfo() |
35 | : MSP430GenRegisterInfo(MSP430::PC) {} |
36 | |
37 | const MCPhysReg* |
38 | MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { |
39 | const MSP430FrameLowering *TFI = getFrameLowering(*MF); |
40 | const Function* F = &MF->getFunction(); |
41 | static const MCPhysReg CalleeSavedRegs[] = { |
42 | MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, |
43 | MSP430::R8, MSP430::R9, MSP430::R10, |
44 | 0 |
45 | }; |
46 | static const MCPhysReg CalleeSavedRegsFP[] = { |
47 | MSP430::R5, MSP430::R6, MSP430::R7, |
48 | MSP430::R8, MSP430::R9, MSP430::R10, |
49 | 0 |
50 | }; |
51 | static const MCPhysReg CalleeSavedRegsIntr[] = { |
52 | MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, |
53 | MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, |
54 | MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, |
55 | 0 |
56 | }; |
57 | static const MCPhysReg CalleeSavedRegsIntrFP[] = { |
58 | MSP430::R5, MSP430::R6, MSP430::R7, |
59 | MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, |
60 | MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, |
61 | 0 |
62 | }; |
63 | |
64 | if (TFI->hasFP(MF: *MF)) |
65 | return (F->getCallingConv() == CallingConv::MSP430_INTR ? |
66 | CalleeSavedRegsIntrFP : CalleeSavedRegsFP); |
67 | else |
68 | return (F->getCallingConv() == CallingConv::MSP430_INTR ? |
69 | CalleeSavedRegsIntr : CalleeSavedRegs); |
70 | |
71 | } |
72 | |
73 | BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { |
74 | BitVector Reserved(getNumRegs()); |
75 | const MSP430FrameLowering *TFI = getFrameLowering(MF); |
76 | |
77 | // Mark 4 special registers with subregisters as reserved. |
78 | Reserved.set(MSP430::PCB); |
79 | Reserved.set(MSP430::SPB); |
80 | Reserved.set(MSP430::SRB); |
81 | Reserved.set(MSP430::CGB); |
82 | Reserved.set(MSP430::PC); |
83 | Reserved.set(MSP430::SP); |
84 | Reserved.set(MSP430::SR); |
85 | Reserved.set(MSP430::CG); |
86 | |
87 | // Mark frame pointer as reserved if needed. |
88 | if (TFI->hasFP(MF)) { |
89 | Reserved.set(MSP430::R4B); |
90 | Reserved.set(MSP430::R4); |
91 | } |
92 | |
93 | return Reserved; |
94 | } |
95 | |
96 | const TargetRegisterClass * |
97 | MSP430RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) |
98 | const { |
99 | return &MSP430::GR16RegClass; |
100 | } |
101 | |
102 | bool |
103 | MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, |
104 | int SPAdj, unsigned FIOperandNum, |
105 | RegScavenger *RS) const { |
106 | assert(SPAdj == 0 && "Unexpected" ); |
107 | |
108 | MachineInstr &MI = *II; |
109 | MachineBasicBlock &MBB = *MI.getParent(); |
110 | MachineFunction &MF = *MBB.getParent(); |
111 | const MSP430FrameLowering *TFI = getFrameLowering(MF); |
112 | DebugLoc dl = MI.getDebugLoc(); |
113 | int FrameIndex = MI.getOperand(i: FIOperandNum).getIndex(); |
114 | |
115 | unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP); |
116 | int Offset = MF.getFrameInfo().getObjectOffset(ObjectIdx: FrameIndex); |
117 | |
118 | // Skip the saved PC |
119 | Offset += 2; |
120 | |
121 | if (!TFI->hasFP(MF)) |
122 | Offset += MF.getFrameInfo().getStackSize(); |
123 | else |
124 | Offset += 2; // Skip the saved FP |
125 | |
126 | // Fold imm into offset |
127 | Offset += MI.getOperand(i: FIOperandNum + 1).getImm(); |
128 | |
129 | if (MI.getOpcode() == MSP430::ADDframe) { |
130 | // This is actually "load effective address" of the stack slot |
131 | // instruction. We have only two-address instructions, thus we need to |
132 | // expand it into mov + add |
133 | const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); |
134 | |
135 | MI.setDesc(TII.get(MSP430::MOV16rr)); |
136 | MI.getOperand(i: FIOperandNum).ChangeToRegister(Reg: BasePtr, isDef: false); |
137 | |
138 | // Remove the now unused Offset operand. |
139 | MI.removeOperand(OpNo: FIOperandNum + 1); |
140 | |
141 | if (Offset == 0) |
142 | return false; |
143 | |
144 | // We need to materialize the offset via add instruction. |
145 | Register DstReg = MI.getOperand(i: 0).getReg(); |
146 | if (Offset < 0) |
147 | BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg) |
148 | .addReg(DstReg).addImm(-Offset); |
149 | else |
150 | BuildMI(MBB, std::next(II), dl, TII.get(MSP430::ADD16ri), DstReg) |
151 | .addReg(DstReg).addImm(Offset); |
152 | |
153 | return false; |
154 | } |
155 | |
156 | MI.getOperand(i: FIOperandNum).ChangeToRegister(Reg: BasePtr, isDef: false); |
157 | MI.getOperand(i: FIOperandNum + 1).ChangeToImmediate(ImmVal: Offset); |
158 | return false; |
159 | } |
160 | |
161 | Register MSP430RegisterInfo::getFrameRegister(const MachineFunction &MF) const { |
162 | const MSP430FrameLowering *TFI = getFrameLowering(MF); |
163 | return TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP; |
164 | } |
165 | |