1	/* Register Transfer Language (RTL) definitions for GCC
2	Copyright (C) 1987-2025 Free Software Foundation, Inc.
3
4	This file is part of GCC.
5
6	GCC is free software; you can redistribute it and/or modify it under
7	the terms of the GNU General Public License as published by the Free
8	Software Foundation; either version 3, or (at your option) any later
9	version.
10
11	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12	WARRANTY; without even the implied warranty of MERCHANTABILITY or
13	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14	for more details.
15
16	You should have received a copy of the GNU General Public License
17	along with GCC; see the file COPYING3. If not see
18	<http://www.gnu.org/licenses/>. */
19
20	#ifndef GCC_RTL_H
21	#define GCC_RTL_H
22
23	/* This file is occasionally included by generator files which expect
24	machmode.h and other files to exist and would not normally have been
25	included by coretypes.h. */
26	#ifdef GENERATOR_FILE
27	#include "real.h"
28	#include "fixed-value.h"
29	#include "statistics.h"
30	#include "vec.h"
31	#include "hash-table.h"
32	#include "hash-set.h"
33	#include "input.h"
34	#include "is-a.h"
35	#endif /* GENERATOR_FILE */
36
37	#include "hard-reg-set.h"
38
39	class predefined_function_abi;
40
41	/* Value used by some passes to "recognize" noop moves as valid
42	instructions. */
43	#define NOOP_MOVE_INSN_CODE INT_MAX
44
45	/* Register Transfer Language EXPRESSIONS CODES */
46
47	#define RTX_CODE enum rtx_code
48	enum rtx_code : unsigned {
49
50	#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) ENUM ,
51	#include "rtl.def" /* rtl expressions are documented here */
52	#undef DEF_RTL_EXPR
53
54	LAST_AND_UNUSED_RTX_CODE}; /* A convenient way to get a value for
55	NUM_RTX_CODE.
56	Assumes default enum value assignment. */
57
58	/* The cast here, saves many elsewhere. */
59	#define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE)
60
61	/* Similar, but since generator files get more entries... */
62	#ifdef GENERATOR_FILE
63	# define NON_GENERATOR_NUM_RTX_CODE ((int) MATCH_OPERAND)
64	#endif
65
66	#define RTX_CODE_BITSIZE 8
67
68	/* Register Transfer Language EXPRESSIONS CODE CLASSES */
69
70	enum rtx_class {
71	/* We check bit 0-1 of some rtx class codes in the predicates below. */
72
73	/* Bit 0 = comparison if 0, arithmetic is 1
74	Bit 1 = 1 if commutative. */
75	RTX_COMPARE, /* 0 */
76	RTX_COMM_COMPARE,
77	RTX_BIN_ARITH,
78	RTX_COMM_ARITH,
79
80	/* Must follow the four preceding values. */
81	RTX_UNARY, /* 4 */
82
83	RTX_EXTRA,
84	RTX_MATCH,
85	RTX_INSN,
86
87	/* Bit 0 = 1 if constant. */
88	RTX_OBJ, /* 8 */
89	RTX_CONST_OBJ,
90
91	RTX_TERNARY,
92	RTX_BITFIELD_OPS,
93	RTX_AUTOINC
94	};
95
96	#define RTX_OBJ_MASK (~1)
97	#define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK)
98	#define RTX_COMPARE_MASK (~1)
99	#define RTX_COMPARE_RESULT (RTX_COMPARE & RTX_COMPARE_MASK)
100	#define RTX_ARITHMETIC_MASK (~1)
101	#define RTX_ARITHMETIC_RESULT (RTX_COMM_ARITH & RTX_ARITHMETIC_MASK)
102	#define RTX_BINARY_MASK (~3)
103	#define RTX_BINARY_RESULT (RTX_COMPARE & RTX_BINARY_MASK)
104	#define RTX_COMMUTATIVE_MASK (~2)
105	#define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK)
106	#define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK)
107
108	extern const unsigned char rtx_length[NUM_RTX_CODE];
109	#define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)])
110
111	extern const char * const rtx_name[NUM_RTX_CODE];
112	#define GET_RTX_NAME(CODE) (rtx_name[(int) (CODE)])
113
114	extern const char * const rtx_format[NUM_RTX_CODE];
115	#define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)])
116
117	extern const enum rtx_class rtx_class[NUM_RTX_CODE];
118	#define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)])
119
120	/* True if CODE is part of the insn chain (i.e. has INSN_UID, PREV_INSN
121	and NEXT_INSN fields). */
122	#define INSN_CHAIN_CODE_P(CODE) IN_RANGE (CODE, DEBUG_INSN, NOTE)
123
124	extern const unsigned char rtx_code_size[NUM_RTX_CODE];
125	extern const unsigned char rtx_next[NUM_RTX_CODE];
126
127	/* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label
128	relative to which the offsets are calculated, as explained in rtl.def. */
129	struct addr_diff_vec_flags
130	{
131	/* Set at the start of shorten_branches - ONLY WHEN OPTIMIZING - : */
132	unsigned min_align: 8;
133	/* Flags: */
134	unsigned base_after_vec: 1; /* BASE is after the ADDR_DIFF_VEC. */
135	unsigned min_after_vec: 1; /* minimum address target label is
136	after the ADDR_DIFF_VEC. */
137	unsigned max_after_vec: 1; /* maximum address target label is
138	after the ADDR_DIFF_VEC. */
139	unsigned min_after_base: 1; /* minimum address target label is
140	after BASE. */
141	unsigned max_after_base: 1; /* maximum address target label is
142	after BASE. */
143	/* Set by the actual branch shortening process - ONLY WHEN OPTIMIZING - : */
144	unsigned offset_unsigned: 1; /* offsets have to be treated as unsigned. */
145	unsigned : 2;
146	unsigned scale : 8;
147	};
148
149	/* Structure used to describe the attributes of a MEM. These are hashed
150	so MEMs that the same attributes share a data structure. This means
151	they cannot be modified in place. */
152	class GTY(()) mem_attrs
153	{
154	public:
155	mem_attrs ();
156
157	/* The expression that the MEM accesses, or null if not known.
158	This expression might be larger than the memory reference itself.
159	(In other words, the MEM might access only part of the object.) */
160	tree expr;
161
162	/* The offset of the memory reference from the start of EXPR.
163	Only valid if OFFSET_KNOWN_P. */
164	poly_int64 offset;
165
166	/* The size of the memory reference in bytes. Only valid if
167	SIZE_KNOWN_P. */
168	poly_int64 size;
169
170	/* The alias set of the memory reference. */
171	alias_set_type alias;
172
173	/* The alignment of the reference in bits. Always a multiple of
174	BITS_PER_UNIT. Note that EXPR may have a stricter alignment
175	than the memory reference itself. */
176	unsigned int align;
177
178	/* The address space that the memory reference uses. */
179	unsigned char addrspace;
180
181	/* True if OFFSET is known. */
182	bool offset_known_p;
183
184	/* True if SIZE is known. */
185	bool size_known_p;
186	};
187
188	/* Structure used to describe the attributes of a REG in similar way as
189	mem_attrs does for MEM above. Note that the OFFSET field is calculated
190	in the same way as for mem_attrs, rather than in the same way as a
191	SUBREG_BYTE. For example, if a big-endian target stores a byte
192	object in the low part of a 4-byte register, the OFFSET field
193	will be -3 rather than 0. */
194
195	class GTY((for_user)) reg_attrs {
196	public:
197	tree decl; /* decl corresponding to REG. */
198	poly_int64 offset; /* Offset from start of DECL. */
199	};
200
201	/* Common union for an element of an rtx. */
202
203	union rtunion
204	{
205	int rt_int;
206	unsigned int rt_uint;
207	location_t rt_loc;
208	poly_uint16 rt_subreg;
209	const char *rt_str;
210	rtx rt_rtx;
211	rtvec rt_rtvec;
212	machine_mode rt_type;
213	addr_diff_vec_flags rt_addr_diff_vec_flags;
214	struct cselib_val *rt_cselib;
215	tree rt_tree;
216	basic_block rt_bb;
217	mem_attrs *rt_mem;
218	class constant_descriptor_rtx *rt_constant;
219	struct dw_cfi_node *rt_cfi;
220	};
221
222	/* Describes the properties of a REG. */
223	struct GTY(()) reg_info {
224	/* The value of REGNO. */
225	unsigned int regno;
226
227	/* The value of REG_NREGS. */
228	unsigned int nregs : 8;
229	unsigned int unused : 24;
230
231	/* The value of REG_ATTRS. */
232	reg_attrs *attrs;
233	};
234
235	/* This structure remembers the position of a SYMBOL_REF within an
236	object_block structure. A SYMBOL_REF only provides this information
237	if SYMBOL_REF_HAS_BLOCK_INFO_P is true. */
238	struct GTY(()) block_symbol {
239	/* The usual SYMBOL_REF fields. */
240	rtunion GTY ((skip)) fld[2];
241
242	/* The block that contains this object. */
243	struct object_block *block;
244
245	/* The offset of this object from the start of its block. It is negative
246	if the symbol has not yet been assigned an offset. */
247	HOST_WIDE_INT offset;
248	};
249
250	/* Describes a group of objects that are to be placed together in such
251	a way that their relative positions are known. */
252	struct GTY((for_user)) object_block {
253	/* The section in which these objects should be placed. */
254	section *sect;
255
256	/* The alignment of the first object, measured in bits. */
257	unsigned int alignment;
258
259	/* The total size of the objects, measured in bytes. */
260	HOST_WIDE_INT size;
261
262	/* The SYMBOL_REFs for each object. The vector is sorted in
263	order of increasing offset and the following conditions will
264	hold for each element X:
265
266	SYMBOL_REF_HAS_BLOCK_INFO_P (X)
267	!SYMBOL_REF_ANCHOR_P (X)
268	SYMBOL_REF_BLOCK (X) == [address of this structure]
269	SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
270	vec<rtx, va_gc> *objects;
271
272	/* All the anchor SYMBOL_REFs used to address these objects, sorted
273	in order of increasing offset, and then increasing TLS model.
274	The following conditions will hold for each element X in this vector:
275
276	SYMBOL_REF_HAS_BLOCK_INFO_P (X)
277	SYMBOL_REF_ANCHOR_P (X)
278	SYMBOL_REF_BLOCK (X) == [address of this structure]
279	SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
280	vec<rtx, va_gc> *anchors;
281	};
282
283	struct GTY((variable_size)) hwivec_def {
284	HOST_WIDE_INT elem[1];
285	};
286
287	/* Number of elements of the HWIVEC if RTX is a CONST_WIDE_INT. */
288	#define CWI_GET_NUM_ELEM(RTX) \
289	((int)RTL_FLAG_CHECK1("CWI_GET_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem)
290	#define CWI_PUT_NUM_ELEM(RTX, NUM) \
291	(RTL_FLAG_CHECK1("CWI_PUT_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem = (NUM))
292
293	struct GTY((variable_size)) const_poly_int_def {
294	trailing_wide_ints<NUM_POLY_INT_COEFFS> coeffs;
295	};
296
297	/* RTL expression ("rtx"). */
298
299	/* The GTY "desc" and "tag" options below are a kludge: we need a desc
300	field for gengtype to recognize that inheritance is occurring,
301	so that all subclasses are redirected to the traversal hook for the
302	base class.
303	However, all of the fields are in the base class, and special-casing
304	is at work. Hence we use desc and tag of 0, generating a switch
305	statement of the form:
306	switch (0)
307	{
308	case 0: // all the work happens here
309	}
310	in order to work with the existing special-casing in gengtype. */
311
312	struct GTY((desc("0"), tag("0"),
313	chain_next ("RTX_NEXT (&%h)"),
314	chain_prev ("RTX_PREV (&%h)"))) rtx_def {
315	/* The kind of value the expression has. */
316	ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
317
318	/* The kind of expression this is. */
319	ENUM_BITFIELD(rtx_code) code: RTX_CODE_BITSIZE;
320
321	/* 1 in a MEM if we should keep the alias set for this mem unchanged
322	when we access a component.
323	1 in a JUMP_INSN if it is a crossing jump.
324	1 in a CALL_INSN if it is a sibling call.
325	1 in a SET that is for a return.
326	In a CODE_LABEL, part of the two-bit alternate entry field.
327	1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.cc.
328	1 in a VALUE is SP_BASED_VALUE_P in cselib.cc.
329	1 in a SUBREG generated by LRA for reload insns.
330	1 in a REG if this is a static chain register.
331	Dumped as "/j" in RTL dumps. */
332	unsigned int jump : 1;
333	/* In a CODE_LABEL, part of the two-bit alternate entry field.
334	1 in a MEM if it cannot trap.
335	1 in a CALL_INSN logically equivalent to
336	ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P.
337	1 in a VALUE is SP_DERIVED_VALUE_P in cselib.cc.
338	Dumped as "/c" in RTL dumps. */
339	unsigned int call : 1;
340	/* 1 in a REG, MEM, or CONCAT if the value is set at most once, anywhere.
341	1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
342	1 in a SYMBOL_REF if it addresses something in the per-function
343	constants pool.
344	1 in a CALL_INSN logically equivalent to ECF_CONST and TREE_READONLY.
345	1 in a NOTE, or EXPR_LIST for a const call.
346	1 in a JUMP_INSN of an annulling branch.
347	1 in a CONCAT is VAL_EXPR_IS_CLOBBERED in var-tracking.cc.
348	1 in a preserved VALUE is PRESERVED_VALUE_P in cselib.cc.
349	1 in a clobber temporarily created for LRA.
350	Dumped as "/u" in RTL dumps. */
351	unsigned int unchanging : 1;
352	/* 1 in a MEM or ASM_OPERANDS expression if the memory reference is volatile.
353	1 in an INSN, CALL_INSN, JUMP_INSN, CODE_LABEL, BARRIER, or NOTE
354	if it has been deleted.
355	1 in a REG expression if corresponds to a variable declared by the user,
356	0 for an internally generated temporary.
357	1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
358	1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a
359	non-local label.
360	In a SYMBOL_REF, this flag is used for machine-specific purposes.
361	In a PREFETCH, this flag indicates that it should be considered a
362	scheduling barrier.
363	1 in a CONCAT is VAL_NEEDS_RESOLUTION in var-tracking.cc.
364	Dumped as "/v" in RTL dumps. */
365	unsigned int volatil : 1;
366	/* 1 in a REG if the register is used only in exit code a loop.
367	1 in a SUBREG expression if was generated from a variable with a
368	promoted mode.
369	1 in a CODE_LABEL if the label is used for nonlocal gotos
370	and must not be deleted even if its count is zero.
371	1 in an INSN, JUMP_INSN or CALL_INSN if this insn must be scheduled
372	together with the preceding insn. Valid only within sched.
373	1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and
374	from the target of a branch. Valid from reorg until end of compilation;
375	cleared before used.
376
377	The name of the field is historical. It used to be used in MEMs
378	to record whether the MEM accessed part of a structure.
379	Dumped as "/s" in RTL dumps. */
380	unsigned int in_struct : 1;
381	/* At the end of RTL generation, 1 if this rtx is used. This is used for
382	copying shared structure. See `unshare_all_rtl'.
383	In a REG, this is not needed for that purpose, and used instead
384	in `leaf_renumber_regs_insn'.
385	1 in a SYMBOL_REF, means that emit_library_call
386	has used it as the function.
387	1 in a CONCAT is VAL_HOLDS_TRACK_EXPR in var-tracking.cc.
388	1 in a VALUE or DEBUG_EXPR is VALUE_RECURSED_INTO in var-tracking.cc. */
389	unsigned int used : 1;
390	/* 1 in an INSN or a SET if this rtx is related to the call frame,
391	either changing how we compute the frame address or saving and
392	restoring registers in the prologue and epilogue.
393	1 in a REG or MEM if it is a pointer.
394	1 in a SYMBOL_REF if it addresses something in the per-function
395	constant string pool.
396	1 in a VALUE is VALUE_CHANGED in var-tracking.cc.
397	Dumped as "/f" in RTL dumps. */
398	unsigned frame_related : 1;
399	/* 1 in a REG or PARALLEL that is the current function's return value.
400	1 in a SYMBOL_REF for a weak symbol.
401	1 in a CALL_INSN logically equivalent to ECF_PURE and DECL_PURE_P.
402	1 in a CONCAT is VAL_EXPR_HAS_REVERSE in var-tracking.cc.
403	1 in a VALUE or DEBUG_EXPR is NO_LOC_P in var-tracking.cc.
404	Dumped as "/i" in RTL dumps. */
405	unsigned return_val : 1;
406
407	union {
408	/* The final union field is aligned to 64 bits on LP64 hosts,
409	giving a 32-bit gap after the fields above. We optimize the
410	layout for that case and use the gap for extra code-specific
411	information. */
412
413	/* The ORIGINAL_REGNO of a REG. */
414	unsigned int original_regno;
415
416	/* The INSN_UID of an RTX_INSN-class code. */
417	int insn_uid;
418
419	/* The SYMBOL_REF_FLAGS of a SYMBOL_REF. */
420	unsigned int symbol_ref_flags;
421
422	/* The PAT_VAR_LOCATION_STATUS of a VAR_LOCATION. */
423	enum var_init_status var_location_status;
424
425	/* In a CONST_WIDE_INT (aka hwivec_def), this is the number of
426	HOST_WIDE_INTs in the hwivec_def. */
427	unsigned int num_elem;
428
429	/* Information about a CONST_VECTOR. */
430	struct
431	{
432	/* The value of CONST_VECTOR_NPATTERNS. */
433	unsigned int npatterns : 16;
434
435	/* The value of CONST_VECTOR_NELTS_PER_PATTERN. */
436	unsigned int nelts_per_pattern : 8;
437
438	/* For future expansion. */
439	unsigned int unused : 8;
440	} const_vector;
441	} GTY ((skip)) u2;
442
443	/* The first element of the operands of this rtx.
444	The number of operands and their types are controlled
445	by the `code' field, according to rtl.def. */
446	union u {
447	rtunion fld[1];
448	HOST_WIDE_INT hwint[1];
449	struct reg_info reg;
450	struct block_symbol block_sym;
451	struct real_value rv;
452	struct fixed_value fv;
453	struct hwivec_def hwiv;
454	struct const_poly_int_def cpi;
455	} GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
456	};
457
458	/* A node for constructing singly-linked lists of rtx. */
459
460	struct GTY(()) rtx_expr_list : public rtx_def
461	{
462	private:
463	/* No extra fields, but adds invariant: (GET_CODE (X) == EXPR_LIST). */
464
465	public:
466	/* Get next in list. */
467	rtx_expr_list *next () const;
468
469	/* Get at the underlying rtx. */
470	rtx element () const;
471	};
472
473	template <>
474	template <>
475	inline bool
476	is_a_helper <rtx_expr_list *>::test (rtx rt)
477	{
478	return rt->code == EXPR_LIST;
479	}
480
481	struct GTY(()) rtx_insn_list : public rtx_def
482	{
483	private:
484	/* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
485
486	This is an instance of:
487
488	DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
489
490	i.e. a node for constructing singly-linked lists of rtx_insn *, where
491	the list is "external" to the insn (as opposed to the doubly-linked
492	list embedded within rtx_insn itself). */
493
494	public:
495	/* Get next in list. */
496	rtx_insn_list *next () const;
497
498	/* Get at the underlying instruction. */
499	rtx_insn *insn () const;
500
501	};
502
503	template <>
504	template <>
505	inline bool
506	is_a_helper <rtx_insn_list *>::test (rtx rt)
507	{
508	return rt->code == INSN_LIST;
509	}
510
511	/* A node with invariant GET_CODE (X) == SEQUENCE i.e. a vector of rtx,
512	typically (but not always) of rtx_insn *, used in the late passes. */
513
514	struct GTY(()) rtx_sequence : public rtx_def
515	{
516	private:
517	/* No extra fields, but adds invariant: (GET_CODE (X) == SEQUENCE). */
518
519	public:
520	/* Get number of elements in sequence. */
521	int len () const;
522
523	/* Get i-th element of the sequence. */
524	rtx element (int index) const;
525
526	/* Get i-th element of the sequence, with a checked cast to
527	rtx_insn *. */
528	rtx_insn *insn (int index) const;
529	};
530
531	template <>
532	template <>
533	inline bool
534	is_a_helper <rtx_sequence *>::test (rtx rt)
535	{
536	return rt->code == SEQUENCE;
537	}
538
539	template <>
540	template <>
541	inline bool
542	is_a_helper <const rtx_sequence *>::test (const_rtx rt)
543	{
544	return rt->code == SEQUENCE;
545	}
546
547	struct GTY(()) rtx_insn : public rtx_def
548	{
549	public:
550	/* No extra fields, but adds the invariant:
551
552	(INSN_P (X)
553	|| NOTE_P (X)
554	|| JUMP_TABLE_DATA_P (X)
555	|| BARRIER_P (X)
556	|| LABEL_P (X))
557
558	i.e. that we must be able to use the following:
559	INSN_UID ()
560	NEXT_INSN ()
561	PREV_INSN ()
562	i.e. we have an rtx that has an INSN_UID field and can be part of
563	a linked list of insns.
564	*/
565
566	/* Returns true if this insn has been deleted. */
567
568	bool deleted () const { return volatil; }
569
570	/* Mark this insn as deleted. */
571
572	void set_deleted () { volatil = true; }
573
574	/* Mark this insn as not deleted. */
575
576	void set_undeleted () { volatil = false; }
577	};
578
579	/* Subclasses of rtx_insn. */
580
581	struct GTY(()) rtx_debug_insn : public rtx_insn
582	{
583	/* No extra fields, but adds the invariant:
584	DEBUG_INSN_P (X) aka (GET_CODE (X) == DEBUG_INSN)
585	i.e. an annotation for tracking variable assignments.
586
587	This is an instance of:
588	DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeLie", RTX_INSN)
589	from rtl.def. */
590	};
591
592	struct GTY(()) rtx_nonjump_insn : public rtx_insn
593	{
594	/* No extra fields, but adds the invariant:
595	NONJUMP_INSN_P (X) aka (GET_CODE (X) == INSN)
596	i.e an instruction that cannot jump.
597
598	This is an instance of:
599	DEF_RTL_EXPR(INSN, "insn", "uuBeLie", RTX_INSN)
600	from rtl.def. */
601	};
602
603	struct GTY(()) rtx_jump_insn : public rtx_insn
604	{
605	public:
606	/* No extra fields, but adds the invariant:
607	JUMP_P (X) aka (GET_CODE (X) == JUMP_INSN)
608	i.e. an instruction that can possibly jump.
609
610	This is an instance of:
611	DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeLie0", RTX_INSN)
612	from rtl.def. */
613
614	/* Returns jump target of this instruction. The returned value is not
615	necessarily a code label: it may also be a RETURN or SIMPLE_RETURN
616	expression. Also, when the code label is marked "deleted", it is
617	replaced by a NOTE. In some cases the value is NULL_RTX. */
618
619	inline rtx jump_label () const;
620
621	/* Returns jump target cast to rtx_code_label *. */
622
623	inline rtx_code_label *jump_target () const;
624
625	/* Set jump target. */
626
627	inline void set_jump_target (rtx_code_label *);
628	};
629
630	struct GTY(()) rtx_call_insn : public rtx_insn
631	{
632	/* No extra fields, but adds the invariant:
633	CALL_P (X) aka (GET_CODE (X) == CALL_INSN)
634	i.e. an instruction that can possibly call a subroutine
635	but which will not change which instruction comes next
636	in the current function.
637
638	This is an instance of:
639	DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeLiee", RTX_INSN)
640	from rtl.def. */
641	};
642
643	struct GTY(()) rtx_jump_table_data : public rtx_insn
644	{
645	/* No extra fields, but adds the invariant:
646	JUMP_TABLE_DATA_P (X) aka (GET_CODE (INSN) == JUMP_TABLE_DATA)
647	i.e. a data for a jump table, considered an instruction for
648	historical reasons.
649
650	This is an instance of:
651	DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
652	from rtl.def. */
653
654	/* This can be either:
655
656	(a) a table of absolute jumps, in which case PATTERN (this) is an
657	ADDR_VEC with arg 0 a vector of labels, or
658
659	(b) a table of relative jumps (e.g. for -fPIC), in which case
660	PATTERN (this) is an ADDR_DIFF_VEC, with arg 0 a LABEL_REF and
661	arg 1 the vector of labels.
662
663	This method gets the underlying vec. */
664
665	inline rtvec get_labels () const;
666	inline scalar_int_mode get_data_mode () const;
667	};
668
669	struct GTY(()) rtx_barrier : public rtx_insn
670	{
671	/* No extra fields, but adds the invariant:
672	BARRIER_P (X) aka (GET_CODE (X) == BARRIER)
673	i.e. a marker that indicates that control will not flow through.
674
675	This is an instance of:
676	DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
677	from rtl.def. */
678	};
679
680	struct GTY(()) rtx_code_label : public rtx_insn
681	{
682	/* No extra fields, but adds the invariant:
683	LABEL_P (X) aka (GET_CODE (X) == CODE_LABEL)
684	i.e. a label in the assembler.
685
686	This is an instance of:
687	DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
688	from rtl.def. */
689	};
690
691	struct GTY(()) rtx_note : public rtx_insn
692	{
693	/* No extra fields, but adds the invariant:
694	NOTE_P(X) aka (GET_CODE (X) == NOTE)
695	i.e. a note about the corresponding source code.
696
697	This is an instance of:
698	DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
699	from rtl.def. */
700	};
701
702	/* The size in bytes of an rtx header (code, mode and flags). */
703	#define RTX_HDR_SIZE offsetof (struct rtx_def, u)
704
705	/* The size in bytes of an rtx with code CODE. */
706	#define RTX_CODE_SIZE(CODE) rtx_code_size[CODE]
707
708	#define NULL_RTX (rtx) 0
709
710	/* The "next" and "previous" RTX, relative to this one. */
711
712	#define RTX_NEXT(X) (rtx_next[GET_CODE (X)] == 0 ? NULL \
713	: *(rtx *)(((char *)X) + rtx_next[GET_CODE (X)]))
714
715	/* FIXME: the "NEXT_INSN (PREV_INSN (X)) == X" condition shouldn't be needed.
716	*/
717	#define RTX_PREV(X) ((INSN_P (X) \
718	|| NOTE_P (X) \
719	|| JUMP_TABLE_DATA_P (X) \
720	|| BARRIER_P (X) \
721	|| LABEL_P (X)) \
722	&& PREV_INSN (as_a <rtx_insn *> (X)) != NULL \
723	&& NEXT_INSN (PREV_INSN (as_a <rtx_insn *> (X))) == X \
724	? PREV_INSN (as_a <rtx_insn *> (X)) : NULL)
725
726	/* Define macros to access the `code' field of the rtx. */
727
728	#define GET_CODE(RTX) ((enum rtx_code) (RTX)->code)
729	#define PUT_CODE(RTX, CODE) ((RTX)->code = (CODE))
730
731	#define GET_MODE(RTX) ((machine_mode) (RTX)->mode)
732	#define PUT_MODE_RAW(RTX, MODE) ((RTX)->mode = (MODE))
733
734	/* RTL vector. These appear inside RTX's when there is a need
735	for a variable number of things. The principle use is inside
736	PARALLEL expressions. */
737
738	struct GTY(()) rtvec_def {
739	int num_elem; /* number of elements */
740	rtx GTY ((length ("%h.num_elem"))) elem[1];
741	};
742
743	#define NULL_RTVEC (rtvec) 0
744
745	#define GET_NUM_ELEM(RTVEC) ((RTVEC)->num_elem)
746	#define PUT_NUM_ELEM(RTVEC, NUM) ((RTVEC)->num_elem = (NUM))
747
748	/* Predicate yielding nonzero iff X is an rtx for a register. */
749	#define REG_P(X) (GET_CODE (X) == REG)
750
751	/* Predicate yielding nonzero iff X is an rtx for a memory location. */
752	#define MEM_P(X) (GET_CODE (X) == MEM)
753
754	#if TARGET_SUPPORTS_WIDE_INT
755
756	/* Match CONST_*s that can represent compile-time constant integers. */
757	#define CASE_CONST_SCALAR_INT \
758	case CONST_INT: \
759	case CONST_WIDE_INT
760
761	/* Match CONST_*s for which pointer equality corresponds to value
762	equality. */
763	#define CASE_CONST_UNIQUE \
764	case CONST_INT: \
765	case CONST_WIDE_INT: \
766	case CONST_POLY_INT: \
767	case CONST_DOUBLE: \
768	case CONST_FIXED
769
770	/* Match all CONST_* rtxes. */
771	#define CASE_CONST_ANY \
772	case CONST_INT: \
773	case CONST_WIDE_INT: \
774	case CONST_POLY_INT: \
775	case CONST_DOUBLE: \
776	case CONST_FIXED: \
777	case CONST_VECTOR
778
779	#else
780
781	/* Match CONST_*s that can represent compile-time constant integers. */
782	#define CASE_CONST_SCALAR_INT \
783	case CONST_INT: \
784	case CONST_DOUBLE
785
786	/* Match CONST_*s for which pointer equality corresponds to value
787	equality. */
788	#define CASE_CONST_UNIQUE \
789	case CONST_INT: \
790	case CONST_DOUBLE: \
791	case CONST_FIXED
792
793	/* Match all CONST_* rtxes. */
794	#define CASE_CONST_ANY \
795	case CONST_INT: \
796	case CONST_DOUBLE: \
797	case CONST_FIXED: \
798	case CONST_VECTOR
799	#endif
800
801	/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
802	#define CONST_INT_P(X) (GET_CODE (X) == CONST_INT)
803
804	/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
805	#define CONST_WIDE_INT_P(X) (GET_CODE (X) == CONST_WIDE_INT)
806
807	/* Predicate yielding nonzero iff X is an rtx for a polynomial constant
808	integer. */
809	#define CONST_POLY_INT_P(X) \
810	(NUM_POLY_INT_COEFFS > 1 && GET_CODE (X) == CONST_POLY_INT)
811
812	/* Predicate yielding nonzero iff X is an rtx for a constant fixed-point. */
813	#define CONST_FIXED_P(X) (GET_CODE (X) == CONST_FIXED)
814
815	/* Predicate yielding true iff X is an rtx for a double-int
816	or floating point constant. */
817	#define CONST_DOUBLE_P(X) (GET_CODE (X) == CONST_DOUBLE)
818
819	/* Predicate yielding true iff X is an rtx for a double-int. */
820	#define CONST_DOUBLE_AS_INT_P(X) \
821	(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == VOIDmode)
822
823	/* Predicate yielding true iff X is an rtx for a integer const. */
824	#if TARGET_SUPPORTS_WIDE_INT
825	#define CONST_SCALAR_INT_P(X) \
826	(CONST_INT_P (X) || CONST_WIDE_INT_P (X))
827	#else
828	#define CONST_SCALAR_INT_P(X) \
829	(CONST_INT_P (X) || CONST_DOUBLE_AS_INT_P (X))
830	#endif
831
832	/* Predicate yielding true iff X is an rtx for a double-int. */
833	#define CONST_DOUBLE_AS_FLOAT_P(X) \
834	(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode)
835
836	/* Predicate yielding nonzero iff X is an rtx for a constant vector. */
837	#define CONST_VECTOR_P(X) (GET_CODE (X) == CONST_VECTOR)
838
839	/* Predicate yielding nonzero iff X is a label insn. */
840	#define LABEL_P(X) (GET_CODE (X) == CODE_LABEL)
841
842	/* Predicate yielding nonzero iff X is a jump insn. */
843	#define JUMP_P(X) (GET_CODE (X) == JUMP_INSN)
844
845	/* Predicate yielding nonzero iff X is a call insn. */
846	#define CALL_P(X) (GET_CODE (X) == CALL_INSN)
847
848	/* 1 if RTX is a call_insn for a fake call.
849	CALL_INSN use "used" flag to indicate it's a fake call. */
850	#define FAKE_CALL_P(RTX) \
851	(RTL_FLAG_CHECK1 ("FAKE_CALL_P", (RTX), CALL_INSN)->used)
852
853	/* Predicate yielding nonzero iff X is an insn that cannot jump. */
854	#define NONJUMP_INSN_P(X) (GET_CODE (X) == INSN)
855
856	/* Predicate yielding nonzero iff X is a debug note/insn. */
857	#define DEBUG_INSN_P(X) (GET_CODE (X) == DEBUG_INSN)
858
859	/* Predicate yielding nonzero iff X is an insn that is not a debug insn. */
860	#define NONDEBUG_INSN_P(X) (NONJUMP_INSN_P (X) || JUMP_P (X) || CALL_P (X))
861
862	/* Nonzero if DEBUG_MARKER_INSN_P may possibly hold. */
863	#define MAY_HAVE_DEBUG_MARKER_INSNS debug_nonbind_markers_p
864	/* Nonzero if DEBUG_BIND_INSN_P may possibly hold. */
865	#define MAY_HAVE_DEBUG_BIND_INSNS flag_var_tracking_assignments
866	/* Nonzero if DEBUG_INSN_P may possibly hold. */
867	#define MAY_HAVE_DEBUG_INSNS \
868	(MAY_HAVE_DEBUG_MARKER_INSNS || MAY_HAVE_DEBUG_BIND_INSNS)
869
870	/* Predicate yielding nonzero iff X is a real insn. */
871	#define INSN_P(X) (NONDEBUG_INSN_P (X) || DEBUG_INSN_P (X))
872
873	/* Predicate yielding nonzero iff X is a note insn. */
874	#define NOTE_P(X) (GET_CODE (X) == NOTE)
875
876	/* Predicate yielding nonzero iff X is a barrier insn. */
877	#define BARRIER_P(X) (GET_CODE (X) == BARRIER)
878
879	/* Predicate yielding nonzero iff X is a data for a jump table. */
880	#define JUMP_TABLE_DATA_P(INSN) (GET_CODE (INSN) == JUMP_TABLE_DATA)
881
882	/* Predicate yielding nonzero iff RTX is a subreg. */
883	#define SUBREG_P(RTX) (GET_CODE (RTX) == SUBREG)
884
885	/* Predicate yielding true iff RTX is a symbol ref. */
886	#define SYMBOL_REF_P(RTX) (GET_CODE (RTX) == SYMBOL_REF)
887
888	template <>
889	template <>
890	inline bool
891	is_a_helper <rtx_insn *>::test (rtx rt)
892	{
893	return (INSN_P (rt)
894	|| NOTE_P (rt)
895	|| JUMP_TABLE_DATA_P (rt)
896	|| BARRIER_P (rt)
897	|| LABEL_P (rt));
898	}
899
900	template <>
901	template <>
902	inline bool
903	is_a_helper <const rtx_insn *>::test (const_rtx rt)
904	{
905	return (INSN_P (rt)
906	|| NOTE_P (rt)
907	|| JUMP_TABLE_DATA_P (rt)
908	|| BARRIER_P (rt)
909	|| LABEL_P (rt));
910	}
911
912	template <>
913	template <>
914	inline bool
915	is_a_helper <rtx_debug_insn *>::test (rtx rt)
916	{
917	return DEBUG_INSN_P (rt);
918	}
919
920	template <>
921	template <>
922	inline bool
923	is_a_helper <rtx_nonjump_insn *>::test (rtx rt)
924	{
925	return NONJUMP_INSN_P (rt);
926	}
927
928	template <>
929	template <>
930	inline bool
931	is_a_helper <rtx_jump_insn *>::test (rtx rt)
932	{
933	return JUMP_P (rt);
934	}
935
936	template <>
937	template <>
938	inline bool
939	is_a_helper <rtx_jump_insn *>::test (rtx_insn *insn)
940	{
941	return JUMP_P (insn);
942	}
943
944	template <>
945	template <>
946	inline bool
947	is_a_helper <rtx_call_insn *>::test (rtx rt)
948	{
949	return CALL_P (rt);
950	}
951
952	template <>
953	template <>
954	inline bool
955	is_a_helper <rtx_call_insn *>::test (rtx_insn *insn)
956	{
957	return CALL_P (insn);
958	}
959
960	template <>
961	template <>
962	inline bool
963	is_a_helper <const rtx_call_insn *>::test (const rtx_insn *insn)
964	{
965	return CALL_P (insn);
966	}
967
968	template <>
969	template <>
970	inline bool
971	is_a_helper <rtx_jump_table_data *>::test (rtx rt)
972	{
973	return JUMP_TABLE_DATA_P (rt);
974	}
975
976	template <>
977	template <>
978	inline bool
979	is_a_helper <rtx_jump_table_data *>::test (rtx_insn *insn)
980	{
981	return JUMP_TABLE_DATA_P (insn);
982	}
983
984	template <>
985	template <>
986	inline bool
987	is_a_helper <rtx_barrier *>::test (rtx rt)
988	{
989	return BARRIER_P (rt);
990	}
991
992	template <>
993	template <>
994	inline bool
995	is_a_helper <rtx_code_label *>::test (rtx rt)
996	{
997	return LABEL_P (rt);
998	}
999
1000	template <>
1001	template <>
1002	inline bool
1003	is_a_helper <rtx_code_label *>::test (rtx_insn *insn)
1004	{
1005	return LABEL_P (insn);
1006	}
1007
1008	template <>
1009	template <>
1010	inline bool
1011	is_a_helper <rtx_note *>::test (rtx rt)
1012	{
1013	return NOTE_P (rt);
1014	}
1015
1016	template <>
1017	template <>
1018	inline bool
1019	is_a_helper <rtx_note *>::test (rtx_insn *insn)
1020	{
1021	return NOTE_P (insn);
1022	}
1023
1024	/* Predicate yielding nonzero iff X is a return or simple_return. */
1025	#define ANY_RETURN_P(X) \
1026	(GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
1027
1028	/* 1 if X is a unary operator. */
1029
1030	#define UNARY_P(X) \
1031	(GET_RTX_CLASS (GET_CODE (X)) == RTX_UNARY)
1032
1033	/* 1 if X is a binary operator. */
1034
1035	#define BINARY_P(X) \
1036	((GET_RTX_CLASS (GET_CODE (X)) & RTX_BINARY_MASK) == RTX_BINARY_RESULT)
1037
1038	/* 1 if X is an arithmetic operator. */
1039
1040	#define ARITHMETIC_P(X) \
1041	((GET_RTX_CLASS (GET_CODE (X)) & RTX_ARITHMETIC_MASK) \
1042	== RTX_ARITHMETIC_RESULT)
1043
1044	/* 1 if X is an arithmetic operator. */
1045
1046	#define COMMUTATIVE_ARITH_P(X) \
1047	(GET_RTX_CLASS (GET_CODE (X)) == RTX_COMM_ARITH)
1048
1049	/* 1 if X is a commutative arithmetic operator or a comparison operator.
1050	These two are sometimes selected together because it is possible to
1051	swap the two operands. */
1052
1053	#define SWAPPABLE_OPERANDS_P(X) \
1054	((1 << GET_RTX_CLASS (GET_CODE (X))) \
1055	& ((1 << RTX_COMM_ARITH) | (1 << RTX_COMM_COMPARE) \
1056	| (1 << RTX_COMPARE)))
1057
1058	/* 1 if X is a non-commutative operator. */
1059
1060	#define NON_COMMUTATIVE_P(X) \
1061	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
1062	== RTX_NON_COMMUTATIVE_RESULT)
1063
1064	/* 1 if X is a commutative operator on integers. */
1065
1066	#define COMMUTATIVE_P(X) \
1067	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
1068	== RTX_COMMUTATIVE_RESULT)
1069
1070	/* 1 if X is a relational operator. */
1071
1072	#define COMPARISON_P(X) \
1073	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMPARE_MASK) == RTX_COMPARE_RESULT)
1074
1075	/* 1 if X is a constant value that is an integer. */
1076
1077	#define CONSTANT_P(X) \
1078	(GET_RTX_CLASS (GET_CODE (X)) == RTX_CONST_OBJ)
1079
1080	/* 1 if X is a LABEL_REF. */
1081	#define LABEL_REF_P(X) \
1082	(GET_CODE (X) == LABEL_REF)
1083
1084	/* 1 if X can be used to represent an object. */
1085	#define OBJECT_P(X) \
1086	((GET_RTX_CLASS (GET_CODE (X)) & RTX_OBJ_MASK) == RTX_OBJ_RESULT)
1087
1088	/* General accessor macros for accessing the fields of an rtx. */
1089
1090	#if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007)
1091	/* The bit with a star outside the statement expr and an & inside is
1092	so that N can be evaluated only once. */
1093	#define RTL_CHECK1(RTX, N, C1) __extension__ \
1094	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1095	const enum rtx_code _code = GET_CODE (_rtx); \
1096	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1097	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1098	__FUNCTION__); \
1099	if (GET_RTX_FORMAT (_code)[_n] != C1) \
1100	rtl_check_failed_type1 (_rtx, _n, C1, __FILE__, __LINE__, \
1101	__FUNCTION__); \
1102	&_rtx->u.fld[_n]; }))
1103
1104	#define RTL_CHECK2(RTX, N, C1, C2) __extension__ \
1105	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1106	const enum rtx_code _code = GET_CODE (_rtx); \
1107	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1108	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1109	__FUNCTION__); \
1110	if (GET_RTX_FORMAT (_code)[_n] != C1 \
1111	&& GET_RTX_FORMAT (_code)[_n] != C2) \
1112	rtl_check_failed_type2 (_rtx, _n, C1, C2, __FILE__, __LINE__, \
1113	__FUNCTION__); \
1114	&_rtx->u.fld[_n]; }))
1115
1116	#define RTL_CHECKC1(RTX, N, C) __extension__ \
1117	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1118	if (GET_CODE (_rtx) != (C)) \
1119	rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
1120	__FUNCTION__); \
1121	&_rtx->u.fld[_n]; }))
1122
1123	#define RTL_CHECKC2(RTX, N, C1, C2) __extension__ \
1124	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1125	const enum rtx_code _code = GET_CODE (_rtx); \
1126	if (_code != (C1) && _code != (C2)) \
1127	rtl_check_failed_code2 (_rtx, (C1), (C2), __FILE__, __LINE__, \
1128	__FUNCTION__); \
1129	&_rtx->u.fld[_n]; }))
1130
1131	#define RTL_CHECKC3(RTX, N, C1, C2, C3) __extension__ \
1132	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1133	const enum rtx_code _code = GET_CODE (_rtx); \
1134	if (_code != (C1) && _code != (C2) && _code != (C3)) \
1135	rtl_check_failed_code3 (_rtx, (C1), (C2), (C3), __FILE__, \
1136	__LINE__, __FUNCTION__); \
1137	&_rtx->u.fld[_n]; }))
1138
1139	#define RTVEC_ELT(RTVEC, I) __extension__ \
1140	(*({ __typeof (RTVEC) const _rtvec = (RTVEC); const int _i = (I); \
1141	if (_i < 0 || _i >= GET_NUM_ELEM (_rtvec)) \
1142	rtvec_check_failed_bounds (_rtvec, _i, __FILE__, __LINE__, \
1143	__FUNCTION__); \
1144	&_rtvec->elem[_i]; }))
1145
1146	#define XWINT(RTX, N) __extension__ \
1147	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1148	const enum rtx_code _code = GET_CODE (_rtx); \
1149	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1150	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1151	__FUNCTION__); \
1152	if (GET_RTX_FORMAT (_code)[_n] != 'w') \
1153	rtl_check_failed_type1 (_rtx, _n, 'w', __FILE__, __LINE__, \
1154	__FUNCTION__); \
1155	&_rtx->u.hwint[_n]; }))
1156
1157	#define CWI_ELT(RTX, I) __extension__ \
1158	(*({ __typeof (RTX) const _cwi = (RTX); \
1159	int _max = CWI_GET_NUM_ELEM (_cwi); \
1160	const int _i = (I); \
1161	if (_i < 0 || _i >= _max) \
1162	cwi_check_failed_bounds (_cwi, _i, __FILE__, __LINE__, \
1163	__FUNCTION__); \
1164	&_cwi->u.hwiv.elem[_i]; }))
1165
1166	#define XCWINT(RTX, N, C) __extension__ \
1167	(*({ __typeof (RTX) const _rtx = (RTX); \
1168	if (GET_CODE (_rtx) != (C)) \
1169	rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
1170	__FUNCTION__); \
1171	&_rtx->u.hwint[N]; }))
1172
1173	#define XCMWINT(RTX, N, C, M) __extension__ \
1174	(*({ __typeof (RTX) const _rtx = (RTX); \
1175	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) != (M)) \
1176	rtl_check_failed_code_mode (_rtx, (C), (M), false, __FILE__, \
1177	__LINE__, __FUNCTION__); \
1178	&_rtx->u.hwint[N]; }))
1179
1180	#define XCNMPRV(RTX, C, M) __extension__ \
1181	({ __typeof (RTX) const _rtx = (RTX); \
1182	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
1183	rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
1184	__LINE__, __FUNCTION__); \
1185	&_rtx->u.rv; })
1186
1187	#define XCNMPFV(RTX, C, M) __extension__ \
1188	({ __typeof (RTX) const _rtx = (RTX); \
1189	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
1190	rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
1191	__LINE__, __FUNCTION__); \
1192	&_rtx->u.fv; })
1193
1194	#define REG_CHECK(RTX) __extension__ \
1195	({ __typeof (RTX) const _rtx = (RTX); \
1196	if (GET_CODE (_rtx) != REG) \
1197	rtl_check_failed_code1 (_rtx, REG, __FILE__, __LINE__, \
1198	__FUNCTION__); \
1199	&_rtx->u.reg; })
1200
1201	#define BLOCK_SYMBOL_CHECK(RTX) __extension__ \
1202	({ __typeof (RTX) const _symbol = (RTX); \
1203	const unsigned int flags = SYMBOL_REF_FLAGS (_symbol); \
1204	if ((flags & SYMBOL_FLAG_HAS_BLOCK_INFO) == 0) \
1205	rtl_check_failed_block_symbol (__FILE__, __LINE__, \
1206	__FUNCTION__); \
1207	&_symbol->u.block_sym; })
1208
1209	#define HWIVEC_CHECK(RTX,C) __extension__ \
1210	({ __typeof (RTX) const _symbol = (RTX); \
1211	RTL_CHECKC1 (_symbol, 0, C); \
1212	&_symbol->u.hwiv; })
1213
1214	extern void rtl_check_failed_bounds (const_rtx, int, const char *, int,
1215	const char *)
1216	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1217	extern void rtl_check_failed_type1 (const_rtx, int, int, const char *, int,
1218	const char *)
1219	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1220	extern void rtl_check_failed_type2 (const_rtx, int, int, int, const char *,
1221	int, const char *)
1222	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1223	extern void rtl_check_failed_code1 (const_rtx, enum rtx_code, const char *,
1224	int, const char *)
1225	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1226	extern void rtl_check_failed_code2 (const_rtx, enum rtx_code, enum rtx_code,
1227	const char *, int, const char *)
1228	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1229	extern void rtl_check_failed_code3 (const_rtx, enum rtx_code, enum rtx_code,
1230	enum rtx_code, const char *, int,
1231	const char *)
1232	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1233	extern void rtl_check_failed_code_mode (const_rtx, enum rtx_code, machine_mode,
1234	bool, const char *, int, const char *)
1235	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1236	extern void rtl_check_failed_block_symbol (const char *, int, const char *)
1237	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1238	extern void cwi_check_failed_bounds (const_rtx, int, const char *, int,
1239	const char *)
1240	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1241	extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
1242	const char *)
1243	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1244
1245	#else /* not ENABLE_RTL_CHECKING */
1246
1247	#define RTL_CHECK1(RTX, N, C1) ((RTX)->u.fld[N])
1248	#define RTL_CHECK2(RTX, N, C1, C2) ((RTX)->u.fld[N])
1249	#define RTL_CHECKC1(RTX, N, C) ((RTX)->u.fld[N])
1250	#define RTL_CHECKC2(RTX, N, C1, C2) ((RTX)->u.fld[N])
1251	#define RTL_CHECKC3(RTX, N, C1, C2, C3) ((RTX)->u.fld[N])
1252	#define RTVEC_ELT(RTVEC, I) ((RTVEC)->elem[I])
1253	#define XWINT(RTX, N) ((RTX)->u.hwint[N])
1254	#define CWI_ELT(RTX, I) ((RTX)->u.hwiv.elem[I])
1255	#define XCWINT(RTX, N, C) ((RTX)->u.hwint[N])
1256	#define XCMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
1257	#define XCNMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
1258	#define XCNMPRV(RTX, C, M) (&(RTX)->u.rv)
1259	#define XCNMPFV(RTX, C, M) (&(RTX)->u.fv)
1260	#define REG_CHECK(RTX) (&(RTX)->u.reg)
1261	#define BLOCK_SYMBOL_CHECK(RTX) (&(RTX)->u.block_sym)
1262	#define HWIVEC_CHECK(RTX,C) (&(RTX)->u.hwiv)
1263
1264	#endif
1265
1266	/* General accessor macros for accessing the flags of an rtx. */
1267
1268	/* Access an individual rtx flag, with no checking of any kind. */
1269	#define RTX_FLAG(RTX, FLAG) ((RTX)->FLAG)
1270
1271	#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION >= 2007)
1272	#define RTL_FLAG_CHECK1(NAME, RTX, C1) __extension__ \
1273	({ __typeof (RTX) const _rtx = (RTX); \
1274	if (GET_CODE (_rtx) != C1) \
1275	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1276	__FUNCTION__); \
1277	_rtx; })
1278
1279	#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) __extension__ \
1280	({ __typeof (RTX) const _rtx = (RTX); \
1281	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2) \
1282	rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
1283	__FUNCTION__); \
1284	_rtx; })
1285
1286	#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) __extension__ \
1287	({ __typeof (RTX) const _rtx = (RTX); \
1288	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \
1289	&& GET_CODE (_rtx) != C3) \
1290	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1291	__FUNCTION__); \
1292	_rtx; })
1293
1294	#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) __extension__ \
1295	({ __typeof (RTX) const _rtx = (RTX); \
1296	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \
1297	&& GET_CODE (_rtx) != C3 && GET_CODE(_rtx) != C4) \
1298	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1299	__FUNCTION__); \
1300	_rtx; })
1301
1302	#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) __extension__ \
1303	({ __typeof (RTX) const _rtx = (RTX); \
1304	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1305	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1306	&& GET_CODE (_rtx) != C5) \
1307	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1308	__FUNCTION__); \
1309	_rtx; })
1310
1311	#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) \
1312	__extension__ \
1313	({ __typeof (RTX) const _rtx = (RTX); \
1314	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1315	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1316	&& GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6) \
1317	rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
1318	__FUNCTION__); \
1319	_rtx; })
1320
1321	#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) \
1322	__extension__ \
1323	({ __typeof (RTX) const _rtx = (RTX); \
1324	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1325	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1326	&& GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6 \
1327	&& GET_CODE (_rtx) != C7) \
1328	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1329	__FUNCTION__); \
1330	_rtx; })
1331
1332	#define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) \
1333	__extension__ \
1334	({ __typeof (RTX) const _rtx = (RTX); \
1335	if (!INSN_CHAIN_CODE_P (GET_CODE (_rtx))) \
1336	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1337	__FUNCTION__); \
1338	_rtx; })
1339
1340	extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
1341	int, const char *)
1342	ATTRIBUTE_NORETURN ATTRIBUTE_COLD
1343	;
1344
1345	#else /* not ENABLE_RTL_FLAG_CHECKING */
1346
1347	#define RTL_FLAG_CHECK1(NAME, RTX, C1) (RTX)
1348	#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) (RTX)
1349	#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) (RTX)
1350	#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) (RTX)
1351	#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) (RTX)
1352	#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) (RTX)
1353	#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) (RTX)
1354	#define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) (RTX)
1355	#endif
1356
1357	#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
1358	#define XUINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_uint)
1359	#define XLOC(RTX, N) (RTL_CHECK1 (RTX, N, 'L').rt_loc)
1360	#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
1361	#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
1362	#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
1363	#define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type)
1364	#define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree)
1365	#define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb)
1366	#define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str)
1367	#define XCFI(RTX, N) (RTL_CHECK1 (RTX, N, 'C').rt_cfi)
1368
1369	#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
1370	#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
1371
1372	/* These are like XINT, etc. except that they expect a '0' field instead
1373	of the normal type code. */
1374
1375	#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
1376	#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
1377	#define X0LOC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_loc)
1378	#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
1379	#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
1380	#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
1381	#define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type)
1382	#define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree)
1383	#define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb)
1384	#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
1385	#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
1386	#define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
1387	#define X0CONSTANT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_constant)
1388
1389	/* Access a '0' field with any type. */
1390	#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
1391
1392	#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
1393	#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
1394	#define XCLOC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_loc)
1395	#define XCSUBREG(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_subreg)
1396	#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
1397	#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
1398	#define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec)
1399	#define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type)
1400	#define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree)
1401	#define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb)
1402	#define XCCFI(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cfi)
1403	#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
1404
1405	#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
1406	#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
1407
1408	#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
1409	#define XC3EXP(RTX, N, C1, C2, C3) (RTL_CHECKC3 (RTX, N, C1, C2, C3).rt_rtx)
1410
1411
1412	/* Methods of rtx_expr_list. */
1413
1414	inline rtx_expr_list *rtx_expr_list::next () const
1415	{
1416	rtx tmp = XEXP (this, 1);
1417	return safe_as_a <rtx_expr_list *> (p: tmp);
1418	}
1419
1420	inline rtx rtx_expr_list::element () const
1421	{
1422	return XEXP (this, 0);
1423	}
1424
1425	/* Methods of rtx_insn_list. */
1426
1427	inline rtx_insn_list *rtx_insn_list::next () const
1428	{
1429	rtx tmp = XEXP (this, 1);
1430	return safe_as_a <rtx_insn_list *> (p: tmp);
1431	}
1432
1433	inline rtx_insn *rtx_insn_list::insn () const
1434	{
1435	rtx tmp = XEXP (this, 0);
1436	return safe_as_a <rtx_insn *> (p: tmp);
1437	}
1438
1439	/* Methods of rtx_sequence. */
1440
1441	inline int rtx_sequence::len () const
1442	{
1443	return XVECLEN (this, 0);
1444	}
1445
1446	inline rtx rtx_sequence::element (int index) const
1447	{
1448	return XVECEXP (this, 0, index);
1449	}
1450
1451	inline rtx_insn *rtx_sequence::insn (int index) const
1452	{
1453	return as_a <rtx_insn *> (XVECEXP (this, 0, index));
1454	}
1455
1456	/* ACCESS MACROS for particular fields of insns. */
1457
1458	/* Holds a unique number for each insn.
1459	These are not necessarily sequentially increasing. */
1460	inline int INSN_UID (const_rtx insn)
1461	{
1462	return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
1463	(insn))->u2.insn_uid;
1464	}
1465	inline int& INSN_UID (rtx insn)
1466	{
1467	return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
1468	(insn))->u2.insn_uid;
1469	}
1470
1471	/* Chain insns together in sequence. */
1472
1473	/* For now these are split in two: an rvalue form:
1474	PREV_INSN/NEXT_INSN
1475	and an lvalue form:
1476	SET_NEXT_INSN/SET_PREV_INSN. */
1477
1478	inline rtx_insn *PREV_INSN (const rtx_insn *insn)
1479	{
1480	rtx prev = XEXP (insn, 0);
1481	return safe_as_a <rtx_insn *> (p: prev);
1482	}
1483
1484	inline rtx& SET_PREV_INSN (rtx_insn *insn)
1485	{
1486	return XEXP (insn, 0);
1487	}
1488
1489	inline rtx_insn *NEXT_INSN (const rtx_insn *insn)
1490	{
1491	rtx next = XEXP (insn, 1);
1492	return safe_as_a <rtx_insn *> (p: next);
1493	}
1494
1495	inline rtx& SET_NEXT_INSN (rtx_insn *insn)
1496	{
1497	return XEXP (insn, 1);
1498	}
1499
1500	inline basic_block BLOCK_FOR_INSN (const_rtx insn)
1501	{
1502	return XBBDEF (insn, 2);
1503	}
1504
1505	inline basic_block& BLOCK_FOR_INSN (rtx insn)
1506	{
1507	return XBBDEF (insn, 2);
1508	}
1509
1510	inline void set_block_for_insn (rtx_insn *insn, basic_block bb)
1511	{
1512	BLOCK_FOR_INSN (insn) = bb;
1513	}
1514
1515	/* The body of an insn. */
1516	inline rtx PATTERN (const_rtx insn)
1517	{
1518	return XEXP (insn, 3);
1519	}
1520
1521	inline rtx& PATTERN (rtx insn)
1522	{
1523	return XEXP (insn, 3);
1524	}
1525
1526	inline location_t INSN_LOCATION (const rtx_insn *insn)
1527	{
1528	return XLOC (insn, 4);
1529	}
1530
1531	inline location_t& INSN_LOCATION (rtx_insn *insn)
1532	{
1533	return XLOC (insn, 4);
1534	}
1535
1536	inline bool INSN_HAS_LOCATION (const rtx_insn *insn)
1537	{
1538	return LOCATION_LOCUS (INSN_LOCATION (insn)) != UNKNOWN_LOCATION;
1539	}
1540
1541	/* LOCATION of an RTX if relevant. */
1542	#define RTL_LOCATION(X) (INSN_P (X) ? \
1543	INSN_LOCATION (as_a <rtx_insn *> (X)) \
1544	: UNKNOWN_LOCATION)
1545
1546	/* Code number of instruction, from when it was recognized.
1547	-1 means this instruction has not been recognized yet. */
1548	#define INSN_CODE(INSN) XINT (INSN, 5)
1549
1550	inline rtvec rtx_jump_table_data::get_labels () const
1551	{
1552	rtx pat = PATTERN (insn: this);
1553	if (GET_CODE (pat) == ADDR_VEC)
1554	return XVEC (pat, 0);
1555	else
1556	return XVEC (pat, 1); /* presumably an ADDR_DIFF_VEC */
1557	}
1558
1559	/* Return the mode of the data in the table, which is always a scalar
1560	integer. */
1561
1562	inline scalar_int_mode
1563	rtx_jump_table_data::get_data_mode () const
1564	{
1565	return as_a <scalar_int_mode> (GET_MODE (PATTERN (this)));
1566	}
1567
1568	/* If LABEL is followed by a jump table, return the table, otherwise
1569	return null. */
1570
1571	inline rtx_jump_table_data *
1572	jump_table_for_label (const rtx_code_label *label)
1573	{
1574	return safe_dyn_cast <rtx_jump_table_data *> (p: NEXT_INSN (insn: label));
1575	}
1576
1577	#define RTX_FRAME_RELATED_P(RTX) \
1578	(RTL_FLAG_CHECK6 ("RTX_FRAME_RELATED_P", (RTX), DEBUG_INSN, INSN, \
1579	CALL_INSN, JUMP_INSN, BARRIER, SET)->frame_related)
1580
1581	/* 1 if JUMP RTX is a crossing jump. */
1582	#define CROSSING_JUMP_P(RTX) \
1583	(RTL_FLAG_CHECK1 ("CROSSING_JUMP_P", (RTX), JUMP_INSN)->jump)
1584
1585	/* 1 if RTX is a call to a const function. Built from ECF_CONST and
1586	TREE_READONLY. */
1587	#define RTL_CONST_CALL_P(RTX) \
1588	(RTL_FLAG_CHECK1 ("RTL_CONST_CALL_P", (RTX), CALL_INSN)->unchanging)
1589
1590	/* 1 if RTX is a call to a pure function. Built from ECF_PURE and
1591	DECL_PURE_P. */
1592	#define RTL_PURE_CALL_P(RTX) \
1593	(RTL_FLAG_CHECK1 ("RTL_PURE_CALL_P", (RTX), CALL_INSN)->return_val)
1594
1595	/* 1 if RTX is a call to a const or pure function. */
1596	#define RTL_CONST_OR_PURE_CALL_P(RTX) \
1597	(RTL_CONST_CALL_P (RTX) || RTL_PURE_CALL_P (RTX))
1598
1599	/* 1 if RTX is a call to a looping const or pure function. Built from
1600	ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. */
1601	#define RTL_LOOPING_CONST_OR_PURE_CALL_P(RTX) \
1602	(RTL_FLAG_CHECK1 ("CONST_OR_PURE_CALL_P", (RTX), CALL_INSN)->call)
1603
1604	/* 1 if RTX is a call_insn for a sibling call. */
1605	#define SIBLING_CALL_P(RTX) \
1606	(RTL_FLAG_CHECK1 ("SIBLING_CALL_P", (RTX), CALL_INSN)->jump)
1607
1608	/* 1 if RTX is a jump_insn, call_insn, or insn that is an annulling branch. */
1609	#define INSN_ANNULLED_BRANCH_P(RTX) \
1610	(RTL_FLAG_CHECK1 ("INSN_ANNULLED_BRANCH_P", (RTX), JUMP_INSN)->unchanging)
1611
1612	/* 1 if RTX is an insn in a delay slot and is from the target of the branch.
1613	If the branch insn has INSN_ANNULLED_BRANCH_P set, this insn should only be
1614	executed if the branch is taken. For annulled branches with this bit
1615	clear, the insn should be executed only if the branch is not taken. */
1616	#define INSN_FROM_TARGET_P(RTX) \
1617	(RTL_FLAG_CHECK3 ("INSN_FROM_TARGET_P", (RTX), INSN, JUMP_INSN, \
1618	CALL_INSN)->in_struct)
1619
1620	/* In an ADDR_DIFF_VEC, the flags for RTX for use by branch shortening.
1621	See the comments for ADDR_DIFF_VEC in rtl.def. */
1622	#define ADDR_DIFF_VEC_FLAGS(RTX) X0ADVFLAGS (RTX, 4)
1623
1624	/* In a VALUE, the value cselib has assigned to RTX.
1625	This is a "struct cselib_val", see cselib.h. */
1626	#define CSELIB_VAL_PTR(RTX) X0CSELIB (RTX, 0)
1627
1628	/* Holds a list of notes on what this insn does to various REGs.
1629	It is a chain of EXPR_LIST rtx's, where the second operand is the
1630	chain pointer and the first operand is the REG being described.
1631	The mode field of the EXPR_LIST contains not a real machine mode
1632	but a value from enum reg_note. */
1633	#define REG_NOTES(INSN) XEXP(INSN, 6)
1634
1635	/* In an ENTRY_VALUE this is the DECL_INCOMING_RTL of the argument in
1636	question. */
1637	#define ENTRY_VALUE_EXP(RTX) (RTL_CHECKC1 (RTX, 0, ENTRY_VALUE).rt_rtx)
1638
1639	enum reg_note
1640	{
1641	#define DEF_REG_NOTE(NAME) NAME,
1642	#include "reg-notes.def"
1643	#undef DEF_REG_NOTE
1644	REG_NOTE_MAX
1645	};
1646
1647	/* Define macros to extract and insert the reg-note kind in an EXPR_LIST. */
1648	#define REG_NOTE_KIND(LINK) ((enum reg_note) GET_MODE (LINK))
1649	#define PUT_REG_NOTE_KIND(LINK, KIND) \
1650	PUT_MODE_RAW (LINK, (machine_mode) (KIND))
1651
1652	/* Names for REG_NOTE's in EXPR_LIST insn's. */
1653
1654	extern const char * const reg_note_name[];
1655	#define GET_REG_NOTE_NAME(MODE) (reg_note_name[(int) (MODE)])
1656
1657	/* This field is only present on CALL_INSNs. It holds a chain of EXPR_LIST of
1658	USE, CLOBBER and SET expressions.
1659	USE expressions list the registers filled with arguments that
1660	are passed to the function.
1661	CLOBBER expressions document the registers explicitly clobbered
1662	by this CALL_INSN.
1663	SET expressions say that the return value of the call (the SET_DEST)
1664	is equivalent to a value available before the call (the SET_SRC).
1665	This kind of SET is used when the return value is predictable in
1666	advance. It is purely an optimisation hint; unlike USEs and CLOBBERs,
1667	it does not affect register liveness.
1668
1669	Pseudo registers cannot be mentioned in this list. */
1670	#define CALL_INSN_FUNCTION_USAGE(INSN) XEXP(INSN, 7)
1671
1672	/* The label-number of a code-label. The assembler label
1673	is made from `L' and the label-number printed in decimal.
1674	Label numbers are unique in a compilation. */
1675	#define CODE_LABEL_NUMBER(INSN) XINT (INSN, 5)
1676
1677	/* In a NOTE that is a line number, this is a string for the file name that the
1678	line is in. We use the same field to record block numbers temporarily in
1679	NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes. (We avoid lots of casts
1680	between ints and pointers if we use a different macro for the block number.)
1681	*/
1682
1683	/* Opaque data. */
1684	#define NOTE_DATA(INSN) RTL_CHECKC1 (INSN, 3, NOTE)
1685	#define NOTE_DELETED_LABEL_NAME(INSN) XCSTR (INSN, 3, NOTE)
1686	#define SET_INSN_DELETED(INSN) set_insn_deleted (INSN);
1687	#define NOTE_BLOCK(INSN) XCTREE (INSN, 3, NOTE)
1688	#define NOTE_EH_HANDLER(INSN) XCINT (INSN, 3, NOTE)
1689	#define NOTE_BASIC_BLOCK(INSN) XCBBDEF (INSN, 3, NOTE)
1690	#define NOTE_VAR_LOCATION(INSN) XCEXP (INSN, 3, NOTE)
1691	#define NOTE_MARKER_LOCATION(INSN) XCLOC (INSN, 3, NOTE)
1692	#define NOTE_CFI(INSN) XCCFI (INSN, 3, NOTE)
1693	#define NOTE_LABEL_NUMBER(INSN) XCINT (INSN, 3, NOTE)
1694
1695	/* In a NOTE that is a line number, this is the line number.
1696	Other kinds of NOTEs are identified by negative numbers here. */
1697	#define NOTE_KIND(INSN) XCINT (INSN, 4, NOTE)
1698
1699	/* Nonzero if INSN is a note marking the beginning of a basic block. */
1700	#define NOTE_INSN_BASIC_BLOCK_P(INSN) \
1701	(NOTE_P (INSN) && NOTE_KIND (INSN) == NOTE_INSN_BASIC_BLOCK)
1702
1703	/* Nonzero if INSN is a debug nonbind marker note,
1704	for which NOTE_MARKER_LOCATION can be used. */
1705	#define NOTE_MARKER_P(INSN) \
1706	(NOTE_P (INSN) && \
1707	(NOTE_KIND (INSN) == NOTE_INSN_BEGIN_STMT \
1708	|| NOTE_KIND (INSN) == NOTE_INSN_INLINE_ENTRY))
1709
1710	/* Variable declaration and the location of a variable. */
1711	#define PAT_VAR_LOCATION_DECL(PAT) (XCTREE ((PAT), 0, VAR_LOCATION))
1712	#define PAT_VAR_LOCATION_LOC(PAT) (XCEXP ((PAT), 1, VAR_LOCATION))
1713
1714	/* Initialization status of the variable in the location. Status
1715	can be unknown, uninitialized or initialized. See enumeration
1716	type below. */
1717	#define PAT_VAR_LOCATION_STATUS(PAT) \
1718	(RTL_FLAG_CHECK1 ("PAT_VAR_LOCATION_STATUS", PAT, VAR_LOCATION) \
1719	->u2.var_location_status)
1720
1721	/* Accessors for a NOTE_INSN_VAR_LOCATION. */
1722	#define NOTE_VAR_LOCATION_DECL(NOTE) \
1723	PAT_VAR_LOCATION_DECL (NOTE_VAR_LOCATION (NOTE))
1724	#define NOTE_VAR_LOCATION_LOC(NOTE) \
1725	PAT_VAR_LOCATION_LOC (NOTE_VAR_LOCATION (NOTE))
1726	#define NOTE_VAR_LOCATION_STATUS(NOTE) \
1727	PAT_VAR_LOCATION_STATUS (NOTE_VAR_LOCATION (NOTE))
1728
1729	/* Evaluate to TRUE if INSN is a debug insn that denotes a variable
1730	location/value tracking annotation. */
1731	#define DEBUG_BIND_INSN_P(INSN) \
1732	(DEBUG_INSN_P (INSN) \
1733	&& (GET_CODE (PATTERN (INSN)) \
1734	== VAR_LOCATION))
1735	/* Evaluate to TRUE if INSN is a debug insn that denotes a program
1736	source location marker. */
1737	#define DEBUG_MARKER_INSN_P(INSN) \
1738	(DEBUG_INSN_P (INSN) \
1739	&& (GET_CODE (PATTERN (INSN)) \
1740	!= VAR_LOCATION))
1741	/* Evaluate to the marker kind. */
1742	#define INSN_DEBUG_MARKER_KIND(INSN) \
1743	(GET_CODE (PATTERN (INSN)) == DEBUG_MARKER \
1744	? (GET_MODE (PATTERN (INSN)) == VOIDmode \
1745	? NOTE_INSN_BEGIN_STMT \
1746	: GET_MODE (PATTERN (INSN)) == BLKmode \
1747	? NOTE_INSN_INLINE_ENTRY \
1748	: (enum insn_note)-1) \
1749	: (enum insn_note)-1)
1750	/* Create patterns for debug markers. These and the above abstract
1751	the representation, so that it's easier to get rid of the abuse of
1752	the mode to hold the marker kind. Other marker types are
1753	envisioned, so a single bit flag won't do; maybe separate RTL codes
1754	wouldn't be a problem. */
1755	#define GEN_RTX_DEBUG_MARKER_BEGIN_STMT_PAT() \
1756	gen_rtx_DEBUG_MARKER (VOIDmode)
1757	#define GEN_RTX_DEBUG_MARKER_INLINE_ENTRY_PAT() \
1758	gen_rtx_DEBUG_MARKER (BLKmode)
1759
1760	/* The VAR_LOCATION rtx in a DEBUG_INSN. */
1761	#define INSN_VAR_LOCATION(INSN) \
1762	(RTL_FLAG_CHECK1 ("INSN_VAR_LOCATION", PATTERN (INSN), VAR_LOCATION))
1763	/* A pointer to the VAR_LOCATION rtx in a DEBUG_INSN. */
1764	#define INSN_VAR_LOCATION_PTR(INSN) \
1765	(&PATTERN (INSN))
1766
1767	/* Accessors for a tree-expanded var location debug insn. */
1768	#define INSN_VAR_LOCATION_DECL(INSN) \
1769	PAT_VAR_LOCATION_DECL (INSN_VAR_LOCATION (INSN))
1770	#define INSN_VAR_LOCATION_LOC(INSN) \
1771	PAT_VAR_LOCATION_LOC (INSN_VAR_LOCATION (INSN))
1772	#define INSN_VAR_LOCATION_STATUS(INSN) \
1773	PAT_VAR_LOCATION_STATUS (INSN_VAR_LOCATION (INSN))
1774
1775	/* Expand to the RTL that denotes an unknown variable location in a
1776	DEBUG_INSN. */
1777	#define gen_rtx_UNKNOWN_VAR_LOC() (gen_rtx_CLOBBER (VOIDmode, const0_rtx))
1778
1779	/* Determine whether X is such an unknown location. */
1780	#define VAR_LOC_UNKNOWN_P(X) \
1781	(GET_CODE (X) == CLOBBER && XEXP ((X), 0) == const0_rtx)
1782
1783	/* 1 if RTX is emitted after a call, but it should take effect before
1784	the call returns. */
1785	#define NOTE_DURING_CALL_P(RTX) \
1786	(RTL_FLAG_CHECK1 ("NOTE_VAR_LOCATION_DURING_CALL_P", (RTX), NOTE)->call)
1787
1788	/* DEBUG_EXPR_DECL corresponding to a DEBUG_EXPR RTX. */
1789	#define DEBUG_EXPR_TREE_DECL(RTX) XCTREE (RTX, 0, DEBUG_EXPR)
1790
1791	/* VAR_DECL/PARM_DECL DEBUG_IMPLICIT_PTR takes address of. */
1792	#define DEBUG_IMPLICIT_PTR_DECL(RTX) XCTREE (RTX, 0, DEBUG_IMPLICIT_PTR)
1793
1794	/* PARM_DECL DEBUG_PARAMETER_REF references. */
1795	#define DEBUG_PARAMETER_REF_DECL(RTX) XCTREE (RTX, 0, DEBUG_PARAMETER_REF)
1796
1797	/* Codes that appear in the NOTE_KIND field for kinds of notes
1798	that are not line numbers. These codes are all negative.
1799
1800	Notice that we do not try to use zero here for any of
1801	the special note codes because sometimes the source line
1802	actually can be zero! This happens (for example) when we
1803	are generating code for the per-translation-unit constructor
1804	and destructor routines for some C++ translation unit. */
1805
1806	enum insn_note
1807	{
1808	#define DEF_INSN_NOTE(NAME) NAME,
1809	#include "insn-notes.def"
1810	#undef DEF_INSN_NOTE
1811
1812	NOTE_INSN_MAX
1813	};
1814
1815	/* Names for NOTE insn's other than line numbers. */
1816
1817	extern const char * const note_insn_name[NOTE_INSN_MAX];
1818	#define GET_NOTE_INSN_NAME(NOTE_CODE) \
1819	(note_insn_name[(NOTE_CODE)])
1820
1821	/* The name of a label, in case it corresponds to an explicit label
1822	in the input source code. */
1823	#define LABEL_NAME(RTX) XCSTR (RTX, 6, CODE_LABEL)
1824
1825	/* In jump.cc, each label contains a count of the number
1826	of LABEL_REFs that point at it, so unused labels can be deleted. */
1827	#define LABEL_NUSES(RTX) XCINT (RTX, 4, CODE_LABEL)
1828
1829	/* Labels carry a two-bit field composed of the ->jump and ->call
1830	bits. This field indicates whether the label is an alternate
1831	entry point, and if so, what kind. */
1832	enum label_kind
1833	{
1834	LABEL_NORMAL = 0, /* ordinary label */
1835	LABEL_STATIC_ENTRY, /* alternate entry point, not exported */
1836	LABEL_GLOBAL_ENTRY, /* alternate entry point, exported */
1837	LABEL_WEAK_ENTRY /* alternate entry point, exported as weak symbol */
1838	};
1839
1840	#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION > 2007)
1841
1842	/* Retrieve the kind of LABEL. */
1843	#define LABEL_KIND(LABEL) __extension__ \
1844	({ __typeof (LABEL) const _label = (LABEL); \
1845	if (! LABEL_P (_label)) \
1846	rtl_check_failed_flag ("LABEL_KIND", _label, __FILE__, __LINE__, \
1847	__FUNCTION__); \
1848	(enum label_kind) ((_label->jump << 1) | _label->call); })
1849
1850	/* Set the kind of LABEL. */
1851	#define SET_LABEL_KIND(LABEL, KIND) do { \
1852	__typeof (LABEL) const _label = (LABEL); \
1853	const unsigned int _kind = (KIND); \
1854	if (! LABEL_P (_label)) \
1855	rtl_check_failed_flag ("SET_LABEL_KIND", _label, __FILE__, __LINE__, \
1856	__FUNCTION__); \
1857	_label->jump = ((_kind >> 1) & 1); \
1858	_label->call = (_kind & 1); \
1859	} while (0)
1860
1861	#else
1862
1863	/* Retrieve the kind of LABEL. */
1864	#define LABEL_KIND(LABEL) \
1865	((enum label_kind) (((LABEL)->jump << 1) | (LABEL)->call))
1866
1867	/* Set the kind of LABEL. */
1868	#define SET_LABEL_KIND(LABEL, KIND) do { \
1869	rtx const _label = (LABEL); \
1870	const unsigned int _kind = (KIND); \
1871	_label->jump = ((_kind >> 1) & 1); \
1872	_label->call = (_kind & 1); \
1873	} while (0)
1874
1875	#endif /* rtl flag checking */
1876
1877	#define LABEL_ALT_ENTRY_P(LABEL) (LABEL_KIND (LABEL) != LABEL_NORMAL)
1878
1879	/* In jump.cc, each JUMP_INSN can point to a label that it can jump to,
1880	so that if the JUMP_INSN is deleted, the label's LABEL_NUSES can
1881	be decremented and possibly the label can be deleted. */
1882	#define JUMP_LABEL(INSN) XCEXP (INSN, 7, JUMP_INSN)
1883
1884	inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn)
1885	{
1886	return safe_as_a <rtx_insn *> (JUMP_LABEL (insn));
1887	}
1888
1889	/* Methods of rtx_jump_insn. */
1890
1891	inline rtx rtx_jump_insn::jump_label () const
1892	{
1893	return JUMP_LABEL (this);
1894	}
1895
1896	inline rtx_code_label *rtx_jump_insn::jump_target () const
1897	{
1898	return safe_as_a <rtx_code_label *> (JUMP_LABEL (this));
1899	}
1900
1901	inline void rtx_jump_insn::set_jump_target (rtx_code_label *target)
1902	{
1903	JUMP_LABEL (this) = target;
1904	}
1905
1906	/* Once basic blocks are found, each CODE_LABEL starts a chain that
1907	goes through all the LABEL_REFs that jump to that label. The chain
1908	eventually winds up at the CODE_LABEL: it is circular. */
1909	#define LABEL_REFS(LABEL) XCEXP (LABEL, 3, CODE_LABEL)
1910
1911	/* Get the label that a LABEL_REF references. */
1912	inline rtx_insn *
1913	label_ref_label (const_rtx ref)
1914	{
1915	return as_a<rtx_insn *> (XCEXP (ref, 0, LABEL_REF));
1916	}
1917
1918	/* Set the label that LABEL_REF ref refers to. */
1919
1920	inline void
1921	set_label_ref_label (rtx ref, rtx_insn *label)
1922	{
1923	XCEXP (ref, 0, LABEL_REF) = label;
1924	}
1925
1926	/* For a REG rtx, REGNO extracts the register number. REGNO can only
1927	be used on RHS. Use SET_REGNO to change the value. */
1928	#define REGNO(RTX) (rhs_regno(RTX))
1929	#define SET_REGNO(RTX, N) (df_ref_change_reg_with_loc (RTX, N))
1930
1931	/* Return the number of consecutive registers in a REG. This is always
1932	1 for pseudo registers and is determined by TARGET_HARD_REGNO_NREGS for
1933	hard registers. */
1934	#define REG_NREGS(RTX) (REG_CHECK (RTX)->nregs)
1935
1936	/* ORIGINAL_REGNO holds the number the register originally had; for a
1937	pseudo register turned into a hard reg this will hold the old pseudo
1938	register number. */
1939	#define ORIGINAL_REGNO(RTX) \
1940	(RTL_FLAG_CHECK1 ("ORIGINAL_REGNO", (RTX), REG)->u2.original_regno)
1941
1942	/* Force the REGNO macro to only be used on the lhs. */
1943	inline unsigned int
1944	rhs_regno (const_rtx x)
1945	{
1946	return REG_CHECK (x)->regno;
1947	}
1948
1949	/* Return the final register in REG X plus one. */
1950	inline unsigned int
1951	END_REGNO (const_rtx x)
1952	{
1953	return REGNO (x) + REG_NREGS (x);
1954	}
1955
1956	/* Change the REGNO and REG_NREGS of REG X to the specified values,
1957	bypassing the df machinery. */
1958	inline void
1959	set_regno_raw (rtx x, unsigned int regno, unsigned int nregs)
1960	{
1961	reg_info *reg = REG_CHECK (x);
1962	reg->regno = regno;
1963	reg->nregs = nregs;
1964	}
1965
1966	/* 1 if RTX is a reg or parallel that is the current function's return
1967	value. */
1968	#define REG_FUNCTION_VALUE_P(RTX) \
1969	(RTL_FLAG_CHECK2 ("REG_FUNCTION_VALUE_P", (RTX), REG, PARALLEL)->return_val)
1970
1971	/* 1 if RTX is a reg that corresponds to a variable declared by the user. */
1972	#define REG_USERVAR_P(RTX) \
1973	(RTL_FLAG_CHECK1 ("REG_USERVAR_P", (RTX), REG)->volatil)
1974
1975	/* 1 if RTX is a reg that holds a pointer value. */
1976	#define REG_POINTER(RTX) \
1977	(RTL_FLAG_CHECK1 ("REG_POINTER", (RTX), REG)->frame_related)
1978
1979	/* 1 if RTX is a mem that holds a pointer value. */
1980	#define MEM_POINTER(RTX) \
1981	(RTL_FLAG_CHECK1 ("MEM_POINTER", (RTX), MEM)->frame_related)
1982
1983	/* 1 if the given register REG corresponds to a hard register. */
1984	#define HARD_REGISTER_P(REG) HARD_REGISTER_NUM_P (REGNO (REG))
1985
1986	/* 1 if the given register number REG_NO corresponds to a hard register. */
1987	#define HARD_REGISTER_NUM_P(REG_NO) ((REG_NO) < FIRST_PSEUDO_REGISTER)
1988
1989	/* 1 if the given register REG corresponds to a virtual register. */
1990	#define VIRTUAL_REGISTER_P(REG) VIRTUAL_REGISTER_NUM_P (REGNO (REG))
1991
1992	/* 1 if the given register number REG_NO corresponds to a virtual register. */
1993	#define VIRTUAL_REGISTER_NUM_P(REG_NO) \
1994	IN_RANGE (REG_NO, FIRST_VIRTUAL_REGISTER, LAST_VIRTUAL_REGISTER)
1995
1996	/* For a CONST_INT rtx, INTVAL extracts the integer. */
1997	#define INTVAL(RTX) XCWINT (RTX, 0, CONST_INT)
1998	#define UINTVAL(RTX) ((unsigned HOST_WIDE_INT) INTVAL (RTX))
1999
2000	/* For a CONST_WIDE_INT, CONST_WIDE_INT_NUNITS is the number of
2001	elements actually needed to represent the constant.
2002	CONST_WIDE_INT_ELT gets one of the elements. 0 is the least
2003	significant HOST_WIDE_INT. */
2004	#define CONST_WIDE_INT_VEC(RTX) HWIVEC_CHECK (RTX, CONST_WIDE_INT)
2005	#define CONST_WIDE_INT_NUNITS(RTX) CWI_GET_NUM_ELEM (RTX)
2006	#define CONST_WIDE_INT_ELT(RTX, N) CWI_ELT (RTX, N)
2007
2008	/* For a CONST_POLY_INT, CONST_POLY_INT_COEFFS gives access to the
2009	individual coefficients, in the form of a trailing_wide_ints structure. */
2010	#define CONST_POLY_INT_COEFFS(RTX) \
2011	(RTL_FLAG_CHECK1("CONST_POLY_INT_COEFFS", (RTX), \
2012	CONST_POLY_INT)->u.cpi.coeffs)
2013
2014	/* For a CONST_DOUBLE:
2015	#if TARGET_SUPPORTS_WIDE_INT == 0
2016	For a VOIDmode, there are two integers CONST_DOUBLE_LOW is the
2017	low-order word and ..._HIGH the high-order.
2018	#endif
2019	For a float, there is a REAL_VALUE_TYPE structure, and
2020	CONST_DOUBLE_REAL_VALUE(r) is a pointer to it. */
2021	#define CONST_DOUBLE_LOW(r) XCMWINT (r, 0, CONST_DOUBLE, VOIDmode)
2022	#define CONST_DOUBLE_HIGH(r) XCMWINT (r, 1, CONST_DOUBLE, VOIDmode)
2023	#define CONST_DOUBLE_REAL_VALUE(r) \
2024	((const struct real_value *) XCNMPRV (r, CONST_DOUBLE, VOIDmode))
2025
2026	#define CONST_FIXED_VALUE(r) \
2027	((const struct fixed_value *) XCNMPFV (r, CONST_FIXED, VOIDmode))
2028	#define CONST_FIXED_VALUE_HIGH(r) \
2029	((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.high))
2030	#define CONST_FIXED_VALUE_LOW(r) \
2031	((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.low))
2032
2033	/* For a CONST_VECTOR, return element #n. */
2034	#define CONST_VECTOR_ELT(RTX, N) const_vector_elt (RTX, N)
2035
2036	/* See rtl.texi for a description of these macros. */
2037	#define CONST_VECTOR_NPATTERNS(RTX) \
2038	(RTL_FLAG_CHECK1 ("CONST_VECTOR_NPATTERNS", (RTX), CONST_VECTOR) \
2039	->u2.const_vector.npatterns)
2040
2041	#define CONST_VECTOR_NELTS_PER_PATTERN(RTX) \
2042	(RTL_FLAG_CHECK1 ("CONST_VECTOR_NELTS_PER_PATTERN", (RTX), CONST_VECTOR) \
2043	->u2.const_vector.nelts_per_pattern)
2044
2045	#define CONST_VECTOR_DUPLICATE_P(RTX) \
2046	(CONST_VECTOR_NELTS_PER_PATTERN (RTX) == 1)
2047
2048	#define CONST_VECTOR_STEPPED_P(RTX) \
2049	(CONST_VECTOR_NELTS_PER_PATTERN (RTX) == 3)
2050
2051	#define CONST_VECTOR_ENCODED_ELT(RTX, N) XCVECEXP (RTX, 0, N, CONST_VECTOR)
2052
2053	/* Return the number of elements encoded directly in a CONST_VECTOR. */
2054
2055	inline unsigned int
2056	const_vector_encoded_nelts (const_rtx x)
2057	{
2058	return CONST_VECTOR_NPATTERNS (x) * CONST_VECTOR_NELTS_PER_PATTERN (x);
2059	}
2060
2061	/* For a CONST_VECTOR, return the number of elements in a vector. */
2062	#define CONST_VECTOR_NUNITS(RTX) GET_MODE_NUNITS (GET_MODE (RTX))
2063
2064	/* For a SUBREG rtx, SUBREG_REG extracts the value we want a subreg of.
2065	SUBREG_BYTE extracts the byte-number. */
2066
2067	#define SUBREG_REG(RTX) XCEXP (RTX, 0, SUBREG)
2068	#define SUBREG_BYTE(RTX) XCSUBREG (RTX, 1, SUBREG)
2069
2070	/* in rtlanal.cc */
2071	/* Return the right cost to give to an operation
2072	to make the cost of the corresponding register-to-register instruction
2073	N times that of a fast register-to-register instruction. */
2074	#define COSTS_N_INSNS(N) ((N) * 4)
2075
2076	/* Maximum cost of an rtl expression. This value has the special meaning
2077	not to use an rtx with this cost under any circumstances. */
2078	#define MAX_COST INT_MAX
2079
2080	/* Return true if CODE always has VOIDmode. */
2081
2082	inline bool
2083	always_void_p (enum rtx_code code)
2084	{
2085	switch (code)
2086	{
2087	case SET:
2088	case PC:
2089	case RETURN:
2090	case SIMPLE_RETURN:
2091	return true;
2092
2093	default:
2094	return false;
2095	}
2096	}
2097
2098	/* A structure to hold all available cost information about an rtl
2099	expression. */
2100	struct full_rtx_costs
2101	{
2102	int speed;
2103	int size;
2104	};
2105
2106	/* Initialize a full_rtx_costs structure C to the maximum cost. */
2107	inline void
2108	init_costs_to_max (struct full_rtx_costs *c)
2109	{
2110	c->speed = MAX_COST;
2111	c->size = MAX_COST;
2112	}
2113
2114	/* Initialize a full_rtx_costs structure C to zero cost. */
2115	inline void
2116	init_costs_to_zero (struct full_rtx_costs *c)
2117	{
2118	c->speed = 0;
2119	c->size = 0;
2120	}
2121
2122	/* Compare two full_rtx_costs structures A and B, returning true
2123	if A < B when optimizing for speed. */
2124	inline bool
2125	costs_lt_p (struct full_rtx_costs *a, struct full_rtx_costs *b,
2126	bool speed)
2127	{
2128	if (speed)
2129	return (a->speed < b->speed
2130	|| (a->speed == b->speed && a->size < b->size));
2131	else
2132	return (a->size < b->size
2133	|| (a->size == b->size && a->speed < b->speed));
2134	}
2135
2136	/* Increase both members of the full_rtx_costs structure C by the
2137	cost of N insns. */
2138	inline void
2139	costs_add_n_insns (struct full_rtx_costs *c, int n)
2140	{
2141	c->speed += COSTS_N_INSNS (n);
2142	c->size += COSTS_N_INSNS (n);
2143	}
2144
2145	/* Describes the shape of a subreg:
2146
2147	inner_mode == the mode of the SUBREG_REG
2148	offset == the SUBREG_BYTE
2149	outer_mode == the mode of the SUBREG itself. */
2150	class subreg_shape {
2151	public:
2152	subreg_shape (machine_mode, poly_uint16, machine_mode);
2153	bool operator == (const subreg_shape &) const;
2154	bool operator != (const subreg_shape &) const;
2155	unsigned HOST_WIDE_INT unique_id () const;
2156
2157	machine_mode inner_mode;
2158	poly_uint16 offset;
2159	machine_mode outer_mode;
2160	};
2161
2162	inline
2163	subreg_shape::subreg_shape (machine_mode inner_mode_in,
2164	poly_uint16 offset_in,
2165	machine_mode outer_mode_in)
2166	: inner_mode (inner_mode_in), offset (offset_in), outer_mode (outer_mode_in)
2167	{}
2168
2169	inline bool
2170	subreg_shape::operator == (const subreg_shape &other) const
2171	{
2172	return (inner_mode == other.inner_mode
2173	&& known_eq (offset, other.offset)
2174	&& outer_mode == other.outer_mode);
2175	}
2176
2177	inline bool
2178	subreg_shape::operator != (const subreg_shape &other) const
2179	{
2180	return !operator == (other);
2181	}
2182
2183	/* Return an integer that uniquely identifies this shape. Structures
2184	like rtx_def assume that a mode can fit in an 8-bit bitfield and no
2185	current mode is anywhere near being 65536 bytes in size, so the
2186	id comfortably fits in an int. */
2187
2188	inline unsigned HOST_WIDE_INT
2189	subreg_shape::unique_id () const
2190	{
2191	{ STATIC_ASSERT (MAX_MACHINE_MODE <= (1 << MACHINE_MODE_BITSIZE)); }
2192	{ STATIC_ASSERT (NUM_POLY_INT_COEFFS <= 3); }
2193	{ STATIC_ASSERT (sizeof (offset.coeffs[0]) <= 2); }
2194	int res = (int) inner_mode + ((int) outer_mode << 8);
2195	for (int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2196	res += (HOST_WIDE_INT) offset.coeffs[i] << ((1 + i) * 16);
2197	return res;
2198	}
2199
2200	/* Return the shape of a SUBREG rtx. */
2201
2202	inline subreg_shape
2203	shape_of_subreg (const_rtx x)
2204	{
2205	return subreg_shape (GET_MODE (SUBREG_REG (x)),
2206	SUBREG_BYTE (x), GET_MODE (x));
2207	}
2208
2209	/* Information about an address. This structure is supposed to be able
2210	to represent all supported target addresses. Please extend it if it
2211	is not yet general enough. */
2212	struct address_info {
2213	/* The mode of the value being addressed, or VOIDmode if this is
2214	a load-address operation with no known address mode. */
2215	machine_mode mode;
2216
2217	/* The address space. */
2218	addr_space_t as;
2219
2220	/* True if this is an RTX_AUTOINC address. */
2221	bool autoinc_p;
2222
2223	/* A pointer to the top-level address. */
2224	rtx *outer;
2225
2226	/* A pointer to the inner address, after all address mutations
2227	have been stripped from the top-level address. It can be one
2228	of the following:
2229
2230	- A {PRE,POST}_{INC,DEC} of *BASE. SEGMENT, INDEX and DISP are null.
2231
2232	- A {PRE,POST}_MODIFY of *BASE. In this case either INDEX or DISP
2233	points to the step value, depending on whether the step is variable
2234	or constant respectively. SEGMENT is null.
2235
2236	- A plain sum of the form SEGMENT + BASE + INDEX + DISP,
2237	with null fields evaluating to 0. */
2238	rtx *inner;
2239
2240	/* Components that make up *INNER. Each one may be null or nonnull.
2241	When nonnull, their meanings are as follows:
2242
2243	- *SEGMENT is the "segment" of memory to which the address refers.
2244	This value is entirely target-specific and is only called a "segment"
2245	because that's its most typical use. It contains exactly one UNSPEC,
2246	pointed to by SEGMENT_TERM. The contents of *SEGMENT do not need
2247	reloading.
2248
2249	- *BASE is a variable expression representing a base address.
2250	It contains exactly one "term", pointed to by BASE_TERM.
2251	This term can be one of the following:
2252
2253	(1) a REG, or a SUBREG of a REG
2254	(2) an eliminated REG (a PLUS of (1) and a constant)
2255	(3) a MEM, or a SUBREG of a MEM
2256	(4) a SCRATCH
2257
2258	This term is the one that base_reg_class constrains.
2259
2260	- *INDEX is a variable expression representing an index value.
2261	It may be a scaled expression, such as a MULT. It has exactly
2262	one "term", pointed to by INDEX_TERM. The possible terms are
2263	the same as for BASE. This term is the one that index_reg_class
2264	constrains.
2265
2266	- *DISP is a constant, possibly mutated. DISP_TERM points to the
2267	unmutated RTX_CONST_OBJ. */
2268	rtx *segment;
2269	rtx *base;
2270	rtx *index;
2271	rtx *disp;
2272
2273	rtx *segment_term;
2274	rtx *base_term;
2275	rtx *index_term;
2276	rtx *disp_term;
2277
2278	/* In a {PRE,POST}_MODIFY address, this points to a second copy
2279	of BASE_TERM, otherwise it is null. */
2280	rtx *base_term2;
2281
2282	/* ADDRESS if this structure describes an address operand, MEM if
2283	it describes a MEM address. */
2284	enum rtx_code addr_outer_code;
2285
2286	/* If BASE is nonnull, this is the code of the rtx that contains it. */
2287	enum rtx_code base_outer_code;
2288	};
2289
2290	/* This is used to bundle an rtx and a mode together so that the pair
2291	can be used with the wi:: routines. If we ever put modes into rtx
2292	integer constants, this should go away and then just pass an rtx in. */
2293	typedef std::pair <rtx, machine_mode> rtx_mode_t;
2294
2295	namespace wi
2296	{
2297	template <>
2298	struct int_traits <rtx_mode_t>
2299	{
2300	static const enum precision_type precision_type = VAR_PRECISION;
2301	static const bool host_dependent_precision = false;
2302	/* This ought to be true, except for the special case that BImode
2303	is canonicalized to STORE_FLAG_VALUE, which might be 1. */
2304	static const bool is_sign_extended = false;
2305	static const bool needs_write_val_arg = false;
2306	static unsigned int get_precision (const rtx_mode_t &);
2307	static wi::storage_ref decompose (HOST_WIDE_INT *, unsigned int,
2308	const rtx_mode_t &);
2309	};
2310	}
2311
2312	inline unsigned int
2313	wi::int_traits <rtx_mode_t>::get_precision (const rtx_mode_t &x)
2314	{
2315	return GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: x.second));
2316	}
2317
2318	inline wi::storage_ref
2319	wi::int_traits <rtx_mode_t>::decompose (HOST_WIDE_INT *,
2320	unsigned int precision,
2321	const rtx_mode_t &x)
2322	{
2323	gcc_checking_assert (precision == get_precision (x));
2324	switch (GET_CODE (x.first))
2325	{
2326	case CONST_INT:
2327	if (precision < HOST_BITS_PER_WIDE_INT)
2328	/* Nonzero BImodes are stored as STORE_FLAG_VALUE, which on many
2329	targets is 1 rather than -1. */
2330	gcc_checking_assert (INTVAL (x.first)
2331	== sext_hwi (INTVAL (x.first), precision)
2332	|| (x.second == BImode && INTVAL (x.first) == 1));
2333
2334	return wi::storage_ref (&INTVAL (x.first), 1, precision);
2335
2336	case CONST_WIDE_INT:
2337	return wi::storage_ref (&CONST_WIDE_INT_ELT (x.first, 0),
2338	CONST_WIDE_INT_NUNITS (x.first), precision);
2339
2340	#if TARGET_SUPPORTS_WIDE_INT == 0
2341	case CONST_DOUBLE:
2342	return wi::storage_ref (&CONST_DOUBLE_LOW (x.first), 2, precision);
2343	#endif
2344
2345	default:
2346	gcc_unreachable ();
2347	}
2348	}
2349
2350	namespace wi
2351	{
2352	hwi_with_prec shwi (HOST_WIDE_INT, machine_mode mode);
2353	wide_int min_value (machine_mode, signop);
2354	wide_int max_value (machine_mode, signop);
2355	}
2356
2357	inline wi::hwi_with_prec
2358	wi::shwi (HOST_WIDE_INT val, machine_mode mode)
2359	{
2360	return shwi (val, precision: GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)));
2361	}
2362
2363	/* Produce the smallest number that is represented in MODE. The precision
2364	is taken from MODE and the sign from SGN. */
2365	inline wide_int
2366	wi::min_value (machine_mode mode, signop sgn)
2367	{
2368	return min_value (GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)), sgn);
2369	}
2370
2371	/* Produce the largest number that is represented in MODE. The precision
2372	is taken from MODE and the sign from SGN. */
2373	inline wide_int
2374	wi::max_value (machine_mode mode, signop sgn)
2375	{
2376	return max_value (GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)), sgn);
2377	}
2378
2379	namespace wi
2380	{
2381	typedef poly_int<NUM_POLY_INT_COEFFS,
2382	generic_wide_int <wide_int_ref_storage <false, false> > >
2383	rtx_to_poly_wide_ref;
2384	rtx_to_poly_wide_ref to_poly_wide (const_rtx, machine_mode);
2385	}
2386
2387	/* Return the value of a CONST_POLY_INT in its native precision. */
2388
2389	inline wi::rtx_to_poly_wide_ref
2390	const_poly_int_value (const_rtx x)
2391	{
2392	poly_int<NUM_POLY_INT_COEFFS, WIDE_INT_REF_FOR (wide_int)> res;
2393	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2394	res.coeffs[i] = CONST_POLY_INT_COEFFS (x)[i];
2395	return res;
2396	}
2397
2398	/* Return true if X is a scalar integer or a CONST_POLY_INT. The value
2399	can then be extracted using wi::to_poly_wide. */
2400
2401	inline bool
2402	poly_int_rtx_p (const_rtx x)
2403	{
2404	return CONST_SCALAR_INT_P (x) || CONST_POLY_INT_P (x);
2405	}
2406
2407	/* Access X (which satisfies poly_int_rtx_p) as a poly_wide_int.
2408	MODE is the mode of X. */
2409
2410	inline wi::rtx_to_poly_wide_ref
2411	wi::to_poly_wide (const_rtx x, machine_mode mode)
2412	{
2413	if (CONST_POLY_INT_P (x))
2414	return const_poly_int_value (x);
2415	return rtx_mode_t (const_cast<rtx> (x), mode);
2416	}
2417
2418	/* Return the value of X as a poly_int64. */
2419
2420	inline poly_int64
2421	rtx_to_poly_int64 (const_rtx x)
2422	{
2423	if (CONST_POLY_INT_P (x))
2424	{
2425	poly_int64 res;
2426	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2427	res.coeffs[i] = CONST_POLY_INT_COEFFS (x)[i].to_shwi ();
2428	return res;
2429	}
2430	return INTVAL (x);
2431	}
2432
2433	/* Return true if arbitrary value X is an integer constant that can
2434	be represented as a poly_int64. Store the value in *RES if so,
2435	otherwise leave it unmodified. */
2436
2437	inline bool
2438	poly_int_rtx_p (const_rtx x, poly_int64 *res)
2439	{
2440	if (CONST_INT_P (x))
2441	{
2442	*res = INTVAL (x);
2443	return true;
2444	}
2445	if (CONST_POLY_INT_P (x))
2446	{
2447	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2448	if (!wi::fits_shwi_p (CONST_POLY_INT_COEFFS (x)[i]))
2449	return false;
2450	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2451	res->coeffs[i] = CONST_POLY_INT_COEFFS (x)[i].to_shwi ();
2452	return true;
2453	}
2454	return false;
2455	}
2456
2457	extern void init_rtlanal (void);
2458	extern int rtx_cost (rtx, machine_mode, enum rtx_code, int, bool);
2459	extern int address_cost (rtx, machine_mode, addr_space_t, bool);
2460	extern void get_full_rtx_cost (rtx, machine_mode, enum rtx_code, int,
2461	struct full_rtx_costs *);
2462	extern bool native_encode_rtx (machine_mode, rtx, vec<target_unit> &,
2463	unsigned int, unsigned int);
2464	extern wide_int native_decode_int (const vec<target_unit> &, unsigned int,
2465	unsigned int, unsigned int);
2466	extern rtx native_decode_rtx (machine_mode, const vec<target_unit> &,
2467	unsigned int);
2468	extern rtx native_decode_vector_rtx (machine_mode, const vec<target_unit> &,
2469	unsigned int, unsigned int, unsigned int);
2470	extern poly_uint64 subreg_lsb (const_rtx);
2471	extern poly_uint64 subreg_size_lsb (poly_uint64, poly_uint64, poly_uint64);
2472	extern poly_uint64 subreg_size_offset_from_lsb (poly_uint64, poly_uint64,
2473	poly_uint64);
2474	extern bool read_modify_subreg_p (const_rtx);
2475
2476	/* Given a subreg's OUTER_MODE, INNER_MODE, and SUBREG_BYTE, return the
2477	bit offset at which the subreg begins (counting from the least significant
2478	bit of the operand). */
2479
2480	inline poly_uint64
2481	subreg_lsb_1 (machine_mode outer_mode, machine_mode inner_mode,
2482	poly_uint64 subreg_byte)
2483	{
2484	return subreg_size_lsb (GET_MODE_SIZE (mode: outer_mode),
2485	GET_MODE_SIZE (mode: inner_mode), subreg_byte);
2486	}
2487
2488	/* Return the subreg byte offset for a subreg whose outer mode is
2489	OUTER_MODE, whose inner mode is INNER_MODE, and where there are
2490	LSB_SHIFT *bits* between the lsb of the outer value and the lsb of
2491	the inner value. This is the inverse of subreg_lsb_1 (which converts
2492	byte offsets to bit shifts). */
2493
2494	inline poly_uint64
2495	subreg_offset_from_lsb (machine_mode outer_mode,
2496	machine_mode inner_mode,
2497	poly_uint64 lsb_shift)
2498	{
2499	return subreg_size_offset_from_lsb (GET_MODE_SIZE (mode: outer_mode),
2500	GET_MODE_SIZE (mode: inner_mode), lsb_shift);
2501	}
2502
2503	extern unsigned int subreg_regno_offset (unsigned int, machine_mode,
2504	poly_uint64, machine_mode);
2505	extern bool subreg_offset_representable_p (unsigned int, machine_mode,
2506	poly_uint64, machine_mode);
2507	extern unsigned int subreg_regno (const_rtx);
2508	extern int simplify_subreg_regno (unsigned int, machine_mode,
2509	poly_uint64, machine_mode);
2510	extern int lowpart_subreg_regno (unsigned int, machine_mode,
2511	machine_mode);
2512	extern unsigned int subreg_nregs (const_rtx);
2513	extern unsigned int subreg_nregs_with_regno (unsigned int, const_rtx);
2514	extern unsigned HOST_WIDE_INT nonzero_bits (const_rtx, machine_mode);
2515	extern unsigned int num_sign_bit_copies (const_rtx, machine_mode);
2516	extern bool constant_pool_constant_p (rtx);
2517	extern bool truncated_to_mode (machine_mode, const_rtx);
2518	extern int low_bitmask_len (machine_mode, unsigned HOST_WIDE_INT);
2519	extern void split_double (rtx, rtx *, rtx *);
2520	extern rtx *strip_address_mutations (rtx *, enum rtx_code * = 0);
2521	extern void decompose_address (struct address_info *, rtx *,
2522	machine_mode, addr_space_t, enum rtx_code);
2523	extern void decompose_lea_address (struct address_info *, rtx *);
2524	extern void decompose_mem_address (struct address_info *, rtx);
2525	extern void update_address (struct address_info *);
2526	extern HOST_WIDE_INT get_index_scale (const struct address_info *);
2527	extern enum rtx_code get_index_code (const struct address_info *);
2528
2529	/* 1 if RTX is a subreg containing a reg that is already known to be
2530	sign- or zero-extended from the mode of the subreg to the mode of
2531	the reg. SUBREG_PROMOTED_UNSIGNED_P gives the signedness of the
2532	extension.
2533
2534	When used as a LHS, is means that this extension must be done
2535	when assigning to SUBREG_REG. */
2536
2537	#define SUBREG_PROMOTED_VAR_P(RTX) \
2538	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED", (RTX), SUBREG)->in_struct)
2539
2540	/* Valid for subregs which are SUBREG_PROMOTED_VAR_P(). In that case
2541	this gives the necessary extensions:
2542	0 - signed (SPR_SIGNED)
2543	1 - normal unsigned (SPR_UNSIGNED)
2544	2 - value is both sign and unsign extended for mode
2545	(SPR_SIGNED_AND_UNSIGNED).
2546	-1 - pointer unsigned, which most often can be handled like unsigned
2547	extension, except for generating instructions where we need to
2548	emit special code (ptr_extend insns) on some architectures
2549	(SPR_POINTER). */
2550
2551	const int SRP_POINTER = -1;
2552	const int SRP_SIGNED = 0;
2553	const int SRP_UNSIGNED = 1;
2554	const int SRP_SIGNED_AND_UNSIGNED = 2;
2555
2556	/* Sets promoted mode for SUBREG_PROMOTED_VAR_P(). */
2557	#define SUBREG_PROMOTED_SET(RTX, VAL) \
2558	do { \
2559	rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \
2560	(RTX), SUBREG); \
2561	switch (VAL) \
2562	{ \
2563	case SRP_POINTER: \
2564	_rtx->volatil = 0; \
2565	_rtx->unchanging = 0; \
2566	break; \
2567	case SRP_SIGNED: \
2568	_rtx->volatil = 0; \
2569	_rtx->unchanging = 1; \
2570	break; \
2571	case SRP_UNSIGNED: \
2572	_rtx->volatil = 1; \
2573	_rtx->unchanging = 0; \
2574	break; \
2575	case SRP_SIGNED_AND_UNSIGNED: \
2576	_rtx->volatil = 1; \
2577	_rtx->unchanging = 1; \
2578	break; \
2579	} \
2580	} while (0)
2581
2582	/* Gets the value stored in promoted mode for SUBREG_PROMOTED_VAR_P(),
2583	including SRP_SIGNED_AND_UNSIGNED if promoted for
2584	both signed and unsigned. */
2585	#define SUBREG_PROMOTED_GET(RTX) \
2586	(2 * (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", (RTX), SUBREG)->volatil)\
2587	+ (RTX)->unchanging - 1)
2588
2589	/* Returns sign of promoted mode for SUBREG_PROMOTED_VAR_P(). */
2590	#define SUBREG_PROMOTED_SIGN(RTX) \
2591	((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGN", (RTX), SUBREG)->volatil) ? 1\
2592	: (RTX)->unchanging - 1)
2593
2594	/* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted
2595	for SIGNED type. */
2596	#define SUBREG_PROMOTED_SIGNED_P(RTX) \
2597	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGNED_P", (RTX), SUBREG)->unchanging)
2598
2599	/* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted
2600	for UNSIGNED type. */
2601	#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
2602	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil)
2603
2604	/* Checks if RTX of SUBREG_PROMOTED_VAR_P() is promoted for given SIGN. */
2605	#define SUBREG_CHECK_PROMOTED_SIGN(RTX, SIGN) \
2606	((SIGN) == SRP_POINTER ? SUBREG_PROMOTED_GET (RTX) == SRP_POINTER \
2607	: (SIGN) == SRP_SIGNED ? SUBREG_PROMOTED_SIGNED_P (RTX) \
2608	: SUBREG_PROMOTED_UNSIGNED_P (RTX))
2609
2610	/* True if the REG is the static chain register for some CALL_INSN. */
2611	#define STATIC_CHAIN_REG_P(RTX) \
2612	(RTL_FLAG_CHECK1 ("STATIC_CHAIN_REG_P", (RTX), REG)->jump)
2613
2614	/* True if the subreg was generated by LRA for reload insns. Such
2615	subregs are valid only during LRA. */
2616	#define LRA_SUBREG_P(RTX) \
2617	(RTL_FLAG_CHECK1 ("LRA_SUBREG_P", (RTX), SUBREG)->jump)
2618
2619	/* Access various components of an ASM_OPERANDS rtx. */
2620
2621	#define ASM_OPERANDS_TEMPLATE(RTX) XCSTR (RTX, 0, ASM_OPERANDS)
2622	#define ASM_OPERANDS_OUTPUT_CONSTRAINT(RTX) XCSTR (RTX, 1, ASM_OPERANDS)
2623	#define ASM_OPERANDS_OUTPUT_IDX(RTX) XCINT (RTX, 2, ASM_OPERANDS)
2624	#define ASM_OPERANDS_INPUT_VEC(RTX) XCVEC (RTX, 3, ASM_OPERANDS)
2625	#define ASM_OPERANDS_INPUT_CONSTRAINT_VEC(RTX) XCVEC (RTX, 4, ASM_OPERANDS)
2626	#define ASM_OPERANDS_INPUT(RTX, N) XCVECEXP (RTX, 3, N, ASM_OPERANDS)
2627	#define ASM_OPERANDS_INPUT_LENGTH(RTX) XCVECLEN (RTX, 3, ASM_OPERANDS)
2628	#define ASM_OPERANDS_INPUT_CONSTRAINT_EXP(RTX, N) \
2629	XCVECEXP (RTX, 4, N, ASM_OPERANDS)
2630	#define ASM_OPERANDS_INPUT_CONSTRAINT(RTX, N) \
2631	XSTR (XCVECEXP (RTX, 4, N, ASM_OPERANDS), 0)
2632	#define ASM_OPERANDS_INPUT_MODE(RTX, N) \
2633	GET_MODE (XCVECEXP (RTX, 4, N, ASM_OPERANDS))
2634	#define ASM_OPERANDS_LABEL_VEC(RTX) XCVEC (RTX, 5, ASM_OPERANDS)
2635	#define ASM_OPERANDS_LABEL_LENGTH(RTX) XCVECLEN (RTX, 5, ASM_OPERANDS)
2636	#define ASM_OPERANDS_LABEL(RTX, N) XCVECEXP (RTX, 5, N, ASM_OPERANDS)
2637	#define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCLOC (RTX, 6, ASM_OPERANDS)
2638	#define ASM_INPUT_SOURCE_LOCATION(RTX) XCLOC (RTX, 1, ASM_INPUT)
2639
2640	/* 1 if RTX is a mem that is statically allocated in read-only memory. */
2641	#define MEM_READONLY_P(RTX) \
2642	(RTL_FLAG_CHECK1 ("MEM_READONLY_P", (RTX), MEM)->unchanging)
2643
2644	/* 1 if RTX is a mem and we should keep the alias set for this mem
2645	unchanged when we access a component. Set to 1, or example, when we
2646	are already in a non-addressable component of an aggregate. */
2647	#define MEM_KEEP_ALIAS_SET_P(RTX) \
2648	(RTL_FLAG_CHECK1 ("MEM_KEEP_ALIAS_SET_P", (RTX), MEM)->jump)
2649
2650	/* 1 if RTX is a mem or asm_operand for a volatile reference. */
2651	#define MEM_VOLATILE_P(RTX) \
2652	(RTL_FLAG_CHECK3 ("MEM_VOLATILE_P", (RTX), MEM, ASM_OPERANDS, \
2653	ASM_INPUT)->volatil)
2654
2655	/* 1 if RTX is a mem that cannot trap. */
2656	#define MEM_NOTRAP_P(RTX) \
2657	(RTL_FLAG_CHECK1 ("MEM_NOTRAP_P", (RTX), MEM)->call)
2658
2659	/* The memory attribute block. We provide access macros for each value
2660	in the block and provide defaults if none specified. */
2661	#define MEM_ATTRS(RTX) X0MEMATTR (RTX, 1)
2662
2663	/* The register attribute block. We provide access macros for each value
2664	in the block and provide defaults if none specified. */
2665	#define REG_ATTRS(RTX) (REG_CHECK (RTX)->attrs)
2666
2667	#ifndef GENERATOR_FILE
2668	/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias
2669	set, and may alias anything. Otherwise, the MEM can only alias
2670	MEMs in a conflicting alias set. This value is set in a
2671	language-dependent manner in the front-end, and should not be
2672	altered in the back-end. These set numbers are tested with
2673	alias_sets_conflict_p. */
2674	#define MEM_ALIAS_SET(RTX) (get_mem_attrs (RTX)->alias)
2675
2676	/* For a MEM rtx, the decl it is known to refer to, if it is known to
2677	refer to part of a DECL. It may also be a COMPONENT_REF. */
2678	#define MEM_EXPR(RTX) (get_mem_attrs (RTX)->expr)
2679
2680	/* For a MEM rtx, true if its MEM_OFFSET is known. */
2681	#define MEM_OFFSET_KNOWN_P(RTX) (get_mem_attrs (RTX)->offset_known_p)
2682
2683	/* For a MEM rtx, the offset from the start of MEM_EXPR. */
2684	#define MEM_OFFSET(RTX) (get_mem_attrs (RTX)->offset)
2685
2686	/* For a MEM rtx, the address space. */
2687	#define MEM_ADDR_SPACE(RTX) (get_mem_attrs (RTX)->addrspace)
2688
2689	/* For a MEM rtx, true if its MEM_SIZE is known. */
2690	#define MEM_SIZE_KNOWN_P(RTX) (get_mem_attrs (RTX)->size_known_p)
2691
2692	/* For a MEM rtx, the size in bytes of the MEM. */
2693	#define MEM_SIZE(RTX) (get_mem_attrs (RTX)->size)
2694
2695	/* For a MEM rtx, the alignment in bits. We can use the alignment of the
2696	mode as a default when STRICT_ALIGNMENT, but not if not. */
2697	#define MEM_ALIGN(RTX) (get_mem_attrs (RTX)->align)
2698	#else
2699	#define MEM_ADDR_SPACE(RTX) ADDR_SPACE_GENERIC
2700	#endif
2701
2702	/* For a REG rtx, the decl it is known to refer to, if it is known to
2703	refer to part of a DECL. */
2704	#define REG_EXPR(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->decl)
2705
2706	/* For a REG rtx, the offset from the start of REG_EXPR, if known, as an
2707	HOST_WIDE_INT. */
2708	#define REG_OFFSET(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->offset)
2709
2710	/* Copy the attributes that apply to memory locations from RHS to LHS. */
2711	#define MEM_COPY_ATTRIBUTES(LHS, RHS) \
2712	(MEM_VOLATILE_P (LHS) = MEM_VOLATILE_P (RHS), \
2713	MEM_NOTRAP_P (LHS) = MEM_NOTRAP_P (RHS), \
2714	MEM_READONLY_P (LHS) = MEM_READONLY_P (RHS), \
2715	MEM_KEEP_ALIAS_SET_P (LHS) = MEM_KEEP_ALIAS_SET_P (RHS), \
2716	MEM_POINTER (LHS) = MEM_POINTER (RHS), \
2717	MEM_ATTRS (LHS) = MEM_ATTRS (RHS))
2718
2719	/* 1 if RTX is a label_ref for a nonlocal label. */
2720	/* Likewise in an expr_list for a REG_LABEL_OPERAND or
2721	REG_LABEL_TARGET note. */
2722	#define LABEL_REF_NONLOCAL_P(RTX) \
2723	(RTL_FLAG_CHECK1 ("LABEL_REF_NONLOCAL_P", (RTX), LABEL_REF)->volatil)
2724
2725	/* 1 if RTX is a code_label that should always be considered to be needed. */
2726	#define LABEL_PRESERVE_P(RTX) \
2727	(RTL_FLAG_CHECK2 ("LABEL_PRESERVE_P", (RTX), CODE_LABEL, NOTE)->in_struct)
2728
2729	/* During sched, 1 if RTX is an insn that must be scheduled together
2730	with the preceding insn. */
2731	#define SCHED_GROUP_P(RTX) \
2732	(RTL_FLAG_CHECK4 ("SCHED_GROUP_P", (RTX), DEBUG_INSN, INSN, \
2733	JUMP_INSN, CALL_INSN)->in_struct)
2734
2735	/* For a SET rtx, SET_DEST is the place that is set
2736	and SET_SRC is the value it is set to. */
2737	#define SET_DEST(RTX) XC2EXP (RTX, 0, SET, CLOBBER)
2738	#define SET_SRC(RTX) XCEXP (RTX, 1, SET)
2739	#define SET_IS_RETURN_P(RTX) \
2740	(RTL_FLAG_CHECK1 ("SET_IS_RETURN_P", (RTX), SET)->jump)
2741
2742	/* For a TRAP_IF rtx, TRAP_CONDITION is an expression. */
2743	#define TRAP_CONDITION(RTX) XCEXP (RTX, 0, TRAP_IF)
2744	#define TRAP_CODE(RTX) XCEXP (RTX, 1, TRAP_IF)
2745
2746	/* For a COND_EXEC rtx, COND_EXEC_TEST is the condition to base
2747	conditionally executing the code on, COND_EXEC_CODE is the code
2748	to execute if the condition is true. */
2749	#define COND_EXEC_TEST(RTX) XCEXP (RTX, 0, COND_EXEC)
2750	#define COND_EXEC_CODE(RTX) XCEXP (RTX, 1, COND_EXEC)
2751
2752	/* 1 if RTX is a symbol_ref that addresses this function's rtl
2753	constants pool. */
2754	#define CONSTANT_POOL_ADDRESS_P(RTX) \
2755	(RTL_FLAG_CHECK1 ("CONSTANT_POOL_ADDRESS_P", (RTX), SYMBOL_REF)->unchanging)
2756
2757	/* 1 if RTX is a symbol_ref that addresses a value in the file's
2758	tree constant pool. This information is private to varasm.cc. */
2759	#define TREE_CONSTANT_POOL_ADDRESS_P(RTX) \
2760	(RTL_FLAG_CHECK1 ("TREE_CONSTANT_POOL_ADDRESS_P", \
2761	(RTX), SYMBOL_REF)->frame_related)
2762
2763	/* Used if RTX is a symbol_ref, for machine-specific purposes. */
2764	#define SYMBOL_REF_FLAG(RTX) \
2765	(RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAG", (RTX), SYMBOL_REF)->volatil)
2766
2767	/* 1 if RTX is a symbol_ref that has been the library function in
2768	emit_library_call. */
2769	#define SYMBOL_REF_USED(RTX) \
2770	(RTL_FLAG_CHECK1 ("SYMBOL_REF_USED", (RTX), SYMBOL_REF)->used)
2771
2772	/* 1 if RTX is a symbol_ref for a weak symbol. */
2773	#define SYMBOL_REF_WEAK(RTX) \
2774	(RTL_FLAG_CHECK1 ("SYMBOL_REF_WEAK", (RTX), SYMBOL_REF)->return_val)
2775
2776	/* A pointer attached to the SYMBOL_REF; either SYMBOL_REF_DECL or
2777	SYMBOL_REF_CONSTANT. */
2778	#define SYMBOL_REF_DATA(RTX) X0ANY ((RTX), 1)
2779
2780	/* Set RTX's SYMBOL_REF_DECL to DECL. RTX must not be a constant
2781	pool symbol. */
2782	#define SET_SYMBOL_REF_DECL(RTX, DECL) \
2783	(gcc_assert (!CONSTANT_POOL_ADDRESS_P (RTX)), X0TREE ((RTX), 1) = (DECL))
2784
2785	/* The tree (decl or constant) associated with the symbol, or null. */
2786	#define SYMBOL_REF_DECL(RTX) \
2787	(CONSTANT_POOL_ADDRESS_P (RTX) ? NULL : X0TREE ((RTX), 1))
2788
2789	/* Set RTX's SYMBOL_REF_CONSTANT to C. RTX must be a constant pool symbol. */
2790	#define SET_SYMBOL_REF_CONSTANT(RTX, C) \
2791	(gcc_assert (CONSTANT_POOL_ADDRESS_P (RTX)), X0CONSTANT ((RTX), 1) = (C))
2792
2793	/* The rtx constant pool entry for a symbol, or null. */
2794	#define SYMBOL_REF_CONSTANT(RTX) \
2795	(CONSTANT_POOL_ADDRESS_P (RTX) ? X0CONSTANT ((RTX), 1) : NULL)
2796
2797	/* A set of flags on a symbol_ref that are, in some respects, redundant with
2798	information derivable from the tree decl associated with this symbol.
2799	Except that we build a *lot* of SYMBOL_REFs that aren't associated with a
2800	decl. In some cases this is a bug. But beyond that, it's nice to cache
2801	this information to avoid recomputing it. Finally, this allows space for
2802	the target to store more than one bit of information, as with
2803	SYMBOL_REF_FLAG. */
2804	#define SYMBOL_REF_FLAGS(RTX) \
2805	(RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAGS", (RTX), SYMBOL_REF) \
2806	->u2.symbol_ref_flags)
2807
2808	/* These flags are common enough to be defined for all targets. They
2809	are computed by the default version of targetm.encode_section_info. */
2810
2811	/* Set if this symbol is a function. */
2812	#define SYMBOL_FLAG_FUNCTION (1 << 0)
2813	#define SYMBOL_REF_FUNCTION_P(RTX) \
2814	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_FUNCTION) != 0)
2815	/* Set if targetm.binds_local_p is true. */
2816	#define SYMBOL_FLAG_LOCAL (1 << 1)
2817	#define SYMBOL_REF_LOCAL_P(RTX) \
2818	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_LOCAL) != 0)
2819	/* Set if targetm.in_small_data_p is true. */
2820	#define SYMBOL_FLAG_SMALL (1 << 2)
2821	#define SYMBOL_REF_SMALL_P(RTX) \
2822	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_SMALL) != 0)
2823	/* The three-bit field at [5:3] is true for TLS variables; use
2824	SYMBOL_REF_TLS_MODEL to extract the field as an enum tls_model. */
2825	#define SYMBOL_FLAG_TLS_SHIFT 3
2826	#define SYMBOL_REF_TLS_MODEL(RTX) \
2827	((enum tls_model) ((SYMBOL_REF_FLAGS (RTX) >> SYMBOL_FLAG_TLS_SHIFT) & 7))
2828	/* Set if this symbol is not defined in this translation unit. */
2829	#define SYMBOL_FLAG_EXTERNAL (1 << 6)
2830	#define SYMBOL_REF_EXTERNAL_P(RTX) \
2831	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_EXTERNAL) != 0)
2832	/* Set if this symbol has a block_symbol structure associated with it. */
2833	#define SYMBOL_FLAG_HAS_BLOCK_INFO (1 << 7)
2834	#define SYMBOL_REF_HAS_BLOCK_INFO_P(RTX) \
2835	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_HAS_BLOCK_INFO) != 0)
2836	/* Set if this symbol is a section anchor. SYMBOL_REF_ANCHOR_P implies
2837	SYMBOL_REF_HAS_BLOCK_INFO_P. */
2838	#define SYMBOL_FLAG_ANCHOR (1 << 8)
2839	#define SYMBOL_REF_ANCHOR_P(RTX) \
2840	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_ANCHOR) != 0)
2841
2842	/* Subsequent bits are available for the target to use. */
2843	#define SYMBOL_FLAG_MACH_DEP_SHIFT 9
2844	#define SYMBOL_FLAG_MACH_DEP (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
2845
2846	/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the object_block
2847	structure to which the symbol belongs, or NULL if it has not been
2848	assigned a block. */
2849	#define SYMBOL_REF_BLOCK(RTX) (BLOCK_SYMBOL_CHECK (RTX)->block)
2850
2851	/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the offset of RTX from
2852	the first object in SYMBOL_REF_BLOCK (RTX). The value is negative if
2853	RTX has not yet been assigned to a block, or it has not been given an
2854	offset within that block. */
2855	#define SYMBOL_REF_BLOCK_OFFSET(RTX) (BLOCK_SYMBOL_CHECK (RTX)->offset)
2856
2857	/* True if RTX is flagged to be a scheduling barrier. */
2858	#define PREFETCH_SCHEDULE_BARRIER_P(RTX) \
2859	(RTL_FLAG_CHECK1 ("PREFETCH_SCHEDULE_BARRIER_P", (RTX), PREFETCH)->volatil)
2860
2861	/* Indicate whether the machine has any sort of auto increment addressing.
2862	If not, we can avoid checking for REG_INC notes. */
2863
2864	#if (defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) \
2865	|| defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) \
2866	|| defined (HAVE_PRE_MODIFY_DISP) || defined (HAVE_POST_MODIFY_DISP) \
2867	|| defined (HAVE_PRE_MODIFY_REG) || defined (HAVE_POST_MODIFY_REG))
2868	#define AUTO_INC_DEC 1
2869	#else
2870	#define AUTO_INC_DEC 0
2871	#endif
2872
2873	/* Define a macro to look for REG_INC notes,
2874	but save time on machines where they never exist. */
2875
2876	#if AUTO_INC_DEC
2877	#define FIND_REG_INC_NOTE(INSN, REG) \
2878	((REG) != NULL_RTX && REG_P ((REG)) \
2879	? find_regno_note ((INSN), REG_INC, REGNO (REG)) \
2880	: find_reg_note ((INSN), REG_INC, (REG)))
2881	#else
2882	#define FIND_REG_INC_NOTE(INSN, REG) 0
2883	#endif
2884
2885	#ifndef HAVE_PRE_INCREMENT
2886	#define HAVE_PRE_INCREMENT 0
2887	#endif
2888
2889	#ifndef HAVE_PRE_DECREMENT
2890	#define HAVE_PRE_DECREMENT 0
2891	#endif
2892
2893	#ifndef HAVE_POST_INCREMENT
2894	#define HAVE_POST_INCREMENT 0
2895	#endif
2896
2897	#ifndef HAVE_POST_DECREMENT
2898	#define HAVE_POST_DECREMENT 0
2899	#endif
2900
2901	#ifndef HAVE_POST_MODIFY_DISP
2902	#define HAVE_POST_MODIFY_DISP 0
2903	#endif
2904
2905	#ifndef HAVE_POST_MODIFY_REG
2906	#define HAVE_POST_MODIFY_REG 0
2907	#endif
2908
2909	#ifndef HAVE_PRE_MODIFY_DISP
2910	#define HAVE_PRE_MODIFY_DISP 0
2911	#endif
2912
2913	#ifndef HAVE_PRE_MODIFY_REG
2914	#define HAVE_PRE_MODIFY_REG 0
2915	#endif
2916
2917
2918	/* Some architectures do not have complete pre/post increment/decrement
2919	instruction sets, or only move some modes efficiently. These macros
2920	allow us to tune autoincrement generation. */
2921
2922	#ifndef USE_LOAD_POST_INCREMENT
2923	#define USE_LOAD_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
2924	#endif
2925
2926	#ifndef USE_LOAD_POST_DECREMENT
2927	#define USE_LOAD_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
2928	#endif
2929
2930	#ifndef USE_LOAD_PRE_INCREMENT
2931	#define USE_LOAD_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
2932	#endif
2933
2934	#ifndef USE_LOAD_PRE_DECREMENT
2935	#define USE_LOAD_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
2936	#endif
2937
2938	#ifndef USE_STORE_POST_INCREMENT
2939	#define USE_STORE_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
2940	#endif
2941
2942	#ifndef USE_STORE_POST_DECREMENT
2943	#define USE_STORE_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
2944	#endif
2945
2946	#ifndef USE_STORE_PRE_INCREMENT
2947	#define USE_STORE_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
2948	#endif
2949
2950	#ifndef USE_STORE_PRE_DECREMENT
2951	#define USE_STORE_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
2952	#endif
2953
2954	/* Nonzero when we are generating CONCATs. */
2955	extern int generating_concat_p;
2956
2957	/* Nonzero when we are expanding trees to RTL. */
2958	extern int currently_expanding_to_rtl;
2959
2960	/* Generally useful functions. */
2961
2962	#ifndef GENERATOR_FILE
2963	/* Return the cost of SET X. SPEED_P is true if optimizing for speed
2964	rather than size. */
2965
2966	inline int
2967	set_rtx_cost (rtx x, bool speed_p)
2968	{
2969	return rtx_cost (x, VOIDmode, INSN, 4, speed_p);
2970	}
2971
2972	/* Like set_rtx_cost, but return both the speed and size costs in C. */
2973
2974	inline void
2975	get_full_set_rtx_cost (rtx x, struct full_rtx_costs *c)
2976	{
2977	get_full_rtx_cost (x, VOIDmode, INSN, 4, c);
2978	}
2979
2980	/* Return the cost of moving X into a register, relative to the cost
2981	of a register move. SPEED_P is true if optimizing for speed rather
2982	than size. */
2983
2984	inline int
2985	set_src_cost (rtx x, machine_mode mode, bool speed_p)
2986	{
2987	return rtx_cost (x, mode, SET, 1, speed_p);
2988	}
2989
2990	/* Like set_src_cost, but return both the speed and size costs in C. */
2991
2992	inline void
2993	get_full_set_src_cost (rtx x, machine_mode mode, struct full_rtx_costs *c)
2994	{
2995	get_full_rtx_cost (x, mode, SET, 1, c);
2996	}
2997	#endif
2998
2999	/* A convenience macro to validate the arguments of a zero_extract
3000	expression. It determines whether SIZE lies inclusively within
3001	[1, RANGE], POS lies inclusively within between [0, RANGE - 1]
3002	and the sum lies inclusively within [1, RANGE]. RANGE must be
3003	>= 1, but SIZE and POS may be negative. */
3004	#define EXTRACT_ARGS_IN_RANGE(SIZE, POS, RANGE) \
3005	(IN_RANGE ((POS), 0, (unsigned HOST_WIDE_INT) (RANGE) - 1) \
3006	&& IN_RANGE ((SIZE), 1, (unsigned HOST_WIDE_INT) (RANGE) \
3007	- (unsigned HOST_WIDE_INT)(POS)))
3008
3009	/* In explow.cc */
3010	extern HOST_WIDE_INT trunc_int_for_mode (HOST_WIDE_INT, machine_mode);
3011	extern poly_int64 trunc_int_for_mode (poly_int64, machine_mode);
3012	extern rtx plus_constant (machine_mode, rtx, poly_int64, bool = false);
3013	extern HOST_WIDE_INT get_stack_check_protect (void);
3014
3015	/* In rtl.cc */
3016	extern rtx rtx_alloc (RTX_CODE CXX_MEM_STAT_INFO);
3017	inline rtx
3018	rtx_init (rtx rt, RTX_CODE code)
3019	{
3020	memset (s: rt, c: 0, RTX_HDR_SIZE);
3021	PUT_CODE (rt, code);
3022	return rt;
3023	}
3024	#define rtx_alloca(code) \
3025	rtx_init ((rtx) alloca (RTX_CODE_SIZE ((code))), (code))
3026	extern rtx rtx_alloc_stat_v (RTX_CODE MEM_STAT_DECL, int);
3027	#define rtx_alloc_v(c, SZ) rtx_alloc_stat_v (c MEM_STAT_INFO, SZ)
3028	#define const_wide_int_alloc(NWORDS) \
3029	rtx_alloc_v (CONST_WIDE_INT, \
3030	(sizeof (struct hwivec_def) \
3031	+ ((NWORDS)-1) * sizeof (HOST_WIDE_INT))) \
3032
3033	extern rtvec rtvec_alloc (size_t);
3034	extern rtvec shallow_copy_rtvec (rtvec);
3035	extern bool shared_const_p (const_rtx);
3036	extern rtx copy_rtx (rtx);
3037	extern enum rtx_code classify_insn (rtx);
3038	extern void dump_rtx_statistics (void);
3039
3040	/* In emit-rtl.cc */
3041
3042	/* Opcodes used in the bytecode generated by genemit.cc. */
3043	enum class expand_opcode {
3044	/* NULL_RTX. */
3045	NO_RTX,
3046
3047	/* A (match_operand N) or (match_dup N). Followed by the operand number. */
3048	MATCH_OPERAND,
3049
3050	/* A (match_operator N) or (match_op_dup N) that preserves the original mode.
3051	Followed by the operand number. */
3052	MATCH_OPERATOR,
3053
3054	/* A (match_operator N) or (match_op_dup N) that overrides the original mode.
3055	Followed by the new mode and by the operand number. */
3056	MATCH_OPERATOR_WITH_MODE,
3057
3058	/* A (match_parallel N) or (match_par_dup N). Followed by the operand
3059	number. */
3060	MATCH_PARALLEL,
3061
3062	/* A (clobber (reg:M R)). Followed by M and R. */
3063	CLOBBER_REG,
3064
3065	/* FIRST_CODE + X represents a normal rtx with code X. */
3066	FIRST_CODE
3067	};
3068
3069	extern rtx expand_rtx (const uint8_t *, rtx *);
3070	extern rtx_insn *complete_seq (const uint8_t *, rtx *);
3071	extern rtx copy_rtx_if_shared (rtx);
3072
3073	/* In rtl.cc */
3074	extern unsigned int rtx_size (const_rtx);
3075	extern rtx shallow_copy_rtx (const_rtx CXX_MEM_STAT_INFO);
3076
3077	typedef bool (*rtx_equal_p_callback_function) (const_rtx *, const_rtx *,
3078	rtx *, rtx *);
3079	extern bool rtx_equal_p (const_rtx, const_rtx,
3080	rtx_equal_p_callback_function = NULL);
3081
3082	extern bool rtvec_all_equal_p (const_rtvec);
3083	extern bool rtvec_series_p (rtvec, int);
3084
3085	/* Return true if X is a vector constant with a duplicated element value. */
3086
3087	inline bool
3088	const_vec_duplicate_p (const_rtx x)
3089	{
3090	return (GET_CODE (x) == CONST_VECTOR
3091	&& CONST_VECTOR_NPATTERNS (x) == 1
3092	&& CONST_VECTOR_DUPLICATE_P (x));
3093	}
3094
3095	/* Return true if X is a vector constant with a duplicated element value.
3096	Store the duplicated element in *ELT if so. */
3097
3098	template <typename T>
3099	inline bool
3100	const_vec_duplicate_p (T x, T *elt)
3101	{
3102	if (const_vec_duplicate_p (x))
3103	{
3104	*elt = CONST_VECTOR_ENCODED_ELT (x, 0);
3105	return true;
3106	}
3107	return false;
3108	}
3109
3110	/* Return true if X is a vector with a duplicated element value, either
3111	constant or nonconstant. Store the duplicated element in *ELT if so. */
3112
3113	template <typename T>
3114	inline bool
3115	vec_duplicate_p (T x, T *elt)
3116	{
3117	if (GET_CODE (x) == VEC_DUPLICATE
3118	&& !VECTOR_MODE_P (GET_MODE (XEXP (x, 0))))
3119	{
3120	*elt = XEXP (x, 0);
3121	return true;
3122	}
3123	return const_vec_duplicate_p (x, elt);
3124	}
3125
3126	/* If X is a vector constant with a duplicated element value, return that
3127	element value, otherwise return X. */
3128
3129	template <typename T>
3130	inline T
3131	unwrap_const_vec_duplicate (T x)
3132	{
3133	if (const_vec_duplicate_p (x))
3134	x = CONST_VECTOR_ELT (x, 0);
3135	return x;
3136	}
3137
3138	/* In emit-rtl.cc. */
3139	extern wide_int const_vector_int_elt (const_rtx, unsigned int);
3140	extern rtx const_vector_elt (const_rtx, unsigned int);
3141	extern bool const_vec_series_p_1 (const_rtx, rtx *, rtx *);
3142
3143	/* Return true if X is an integer constant vector that contains a linear
3144	series of the form:
3145
3146	{ B, B + S, B + 2 * S, B + 3 * S, ... }
3147
3148	for a nonzero S. Store B and S in *BASE_OUT and *STEP_OUT on sucess. */
3149
3150	inline bool
3151	const_vec_series_p (const_rtx x, rtx *base_out, rtx *step_out)
3152	{
3153	if (GET_CODE (x) == CONST_VECTOR
3154	&& CONST_VECTOR_NPATTERNS (x) == 1
3155	&& !CONST_VECTOR_DUPLICATE_P (x))
3156	return const_vec_series_p_1 (x, base_out, step_out);
3157	return false;
3158	}
3159
3160	/* Return true if X is a vector that contains a linear series of the
3161	form:
3162
3163	{ B, B + S, B + 2 * S, B + 3 * S, ... }
3164
3165	where B and S are constant or nonconstant. Store B and S in
3166	*BASE_OUT and *STEP_OUT on sucess. */
3167
3168	inline bool
3169	vec_series_p (const_rtx x, rtx *base_out, rtx *step_out)
3170	{
3171	if (GET_CODE (x) == VEC_SERIES)
3172	{
3173	*base_out = XEXP (x, 0);
3174	*step_out = XEXP (x, 1);
3175	return true;
3176	}
3177	return const_vec_series_p (x, base_out, step_out);
3178	}
3179
3180	/* Return true if CONST_VECTORs X and Y, which are known to have the same mode,
3181	also have the same encoding. This means that they are equal whenever their
3182	operands are equal. */
3183
3184	inline bool
3185	same_vector_encodings_p (const_rtx x, const_rtx y)
3186	{
3187	/* Don't be fussy about the encoding of constant-length vectors,
3188	since XVECEXP (X, 0) and XVECEXP (Y, 0) list all the elements anyway. */
3189	if (poly_uint64 (CONST_VECTOR_NUNITS (x)).is_constant ())
3190	return true;
3191
3192	return (CONST_VECTOR_NPATTERNS (x) == CONST_VECTOR_NPATTERNS (y)
3193	&& (CONST_VECTOR_NELTS_PER_PATTERN (x)
3194	== CONST_VECTOR_NELTS_PER_PATTERN (y)));
3195	}
3196
3197	/* Return the unpromoted (outer) mode of SUBREG_PROMOTED_VAR_P subreg X. */
3198
3199	inline scalar_int_mode
3200	subreg_unpromoted_mode (rtx x)
3201	{
3202	gcc_checking_assert (SUBREG_PROMOTED_VAR_P (x));
3203	return as_a <scalar_int_mode> (GET_MODE (x));
3204	}
3205
3206	/* Return the promoted (inner) mode of SUBREG_PROMOTED_VAR_P subreg X. */
3207
3208	inline scalar_int_mode
3209	subreg_promoted_mode (rtx x)
3210	{
3211	gcc_checking_assert (SUBREG_PROMOTED_VAR_P (x));
3212	return as_a <scalar_int_mode> (GET_MODE (SUBREG_REG (x)));
3213	}
3214
3215	/* In emit-rtl.cc */
3216	extern rtvec gen_rtvec_v (int, rtx *);
3217	extern rtvec gen_rtvec_v (int, rtx_insn **);
3218	extern rtx gen_reg_rtx (machine_mode);
3219	extern rtx gen_rtx_REG_offset (rtx, machine_mode, unsigned int, poly_int64);
3220	extern rtx gen_reg_rtx_offset (rtx, machine_mode, int);
3221	extern rtx gen_reg_rtx_and_attrs (rtx);
3222	extern rtx_code_label *gen_label_rtx (void);
3223	extern rtx gen_lowpart_common (machine_mode, rtx);
3224
3225	/* In cse.cc */
3226	extern rtx gen_lowpart_if_possible (machine_mode, rtx);
3227
3228	/* In emit-rtl.cc */
3229	extern rtx gen_highpart (machine_mode, rtx);
3230	extern rtx gen_highpart_mode (machine_mode, machine_mode, rtx);
3231	extern rtx operand_subword (rtx, poly_uint64, int, machine_mode);
3232
3233	/* In emit-rtl.cc */
3234	extern rtx operand_subword_force (rtx, poly_uint64, machine_mode);
3235	extern bool subreg_lowpart_p (const_rtx);
3236	extern poly_uint64 subreg_size_lowpart_offset (poly_uint64, poly_uint64);
3237
3238	/* Return true if a subreg of mode OUTERMODE would only access part of
3239	an inner register with mode INNERMODE. The other bits of the inner
3240	register would then be "don't care" on read. The behavior for writes
3241	depends on REGMODE_NATURAL_SIZE; bits in the same REGMODE_NATURAL_SIZE-d
3242	chunk would be clobbered but other bits would be preserved. */
3243
3244	inline bool
3245	partial_subreg_p (machine_mode outermode, machine_mode innermode)
3246	{
3247	/* Modes involved in a subreg must be ordered. In particular, we must
3248	always know at compile time whether the subreg is paradoxical. */
3249	poly_int64 outer_prec = GET_MODE_PRECISION (mode: outermode);
3250	poly_int64 inner_prec = GET_MODE_PRECISION (mode: innermode);
3251	gcc_checking_assert (ordered_p (outer_prec, inner_prec));
3252	return maybe_lt (a: outer_prec, b: inner_prec);
3253	}
3254
3255	/* Likewise return true if X is a subreg that is smaller than the inner
3256	register. Use read_modify_subreg_p to test whether writing to such
3257	a subreg preserves any part of the inner register. */
3258
3259	inline bool
3260	partial_subreg_p (const_rtx x)
3261	{
3262	if (GET_CODE (x) != SUBREG)
3263	return false;
3264	return partial_subreg_p (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3265	}
3266
3267	/* Return true if a subreg with the given outer and inner modes is
3268	paradoxical. */
3269
3270	inline bool
3271	paradoxical_subreg_p (machine_mode outermode, machine_mode innermode)
3272	{
3273	/* Modes involved in a subreg must be ordered. In particular, we must
3274	always know at compile time whether the subreg is paradoxical. */
3275	poly_int64 outer_prec = GET_MODE_PRECISION (mode: outermode);
3276	poly_int64 inner_prec = GET_MODE_PRECISION (mode: innermode);
3277	gcc_checking_assert (ordered_p (outer_prec, inner_prec));
3278	return maybe_gt (outer_prec, inner_prec);
3279	}
3280
3281	/* Return true if X is a paradoxical subreg, false otherwise. */
3282
3283	inline bool
3284	paradoxical_subreg_p (const_rtx x)
3285	{
3286	if (GET_CODE (x) != SUBREG)
3287	return false;
3288	return paradoxical_subreg_p (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3289	}
3290
3291	/* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
3292
3293	inline poly_uint64
3294	subreg_lowpart_offset (machine_mode outermode, machine_mode innermode)
3295	{
3296	return subreg_size_lowpart_offset (GET_MODE_SIZE (mode: outermode),
3297	GET_MODE_SIZE (mode: innermode));
3298	}
3299
3300	/* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE,
3301	return the smaller of the two modes if they are different sizes,
3302	otherwise return the outer mode. */
3303
3304	inline machine_mode
3305	narrower_subreg_mode (machine_mode outermode, machine_mode innermode)
3306	{
3307	return paradoxical_subreg_p (outermode, innermode) ? innermode : outermode;
3308	}
3309
3310	/* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE,
3311	return the mode that is big enough to hold both the outer and inner
3312	values. Prefer the outer mode in the event of a tie. */
3313
3314	inline machine_mode
3315	wider_subreg_mode (machine_mode outermode, machine_mode innermode)
3316	{
3317	return partial_subreg_p (outermode, innermode) ? innermode : outermode;
3318	}
3319
3320	/* Likewise for subreg X. */
3321
3322	inline machine_mode
3323	wider_subreg_mode (const_rtx x)
3324	{
3325	return wider_subreg_mode (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3326	}
3327
3328	extern poly_uint64 subreg_size_highpart_offset (poly_uint64, poly_uint64);
3329
3330	/* Return the SUBREG_BYTE for an OUTERMODE highpart of an INNERMODE value. */
3331
3332	inline poly_uint64
3333	subreg_highpart_offset (machine_mode outermode, machine_mode innermode)
3334	{
3335	return subreg_size_highpart_offset (GET_MODE_SIZE (mode: outermode),
3336	GET_MODE_SIZE (mode: innermode));
3337	}
3338
3339	extern poly_int64 byte_lowpart_offset (machine_mode, machine_mode);
3340	extern poly_int64 subreg_memory_offset (machine_mode, machine_mode,
3341	poly_uint64);
3342	extern poly_int64 subreg_memory_offset (const_rtx);
3343	extern rtx make_safe_from (rtx, rtx);
3344	extern rtx convert_memory_address_addr_space_1 (scalar_int_mode, rtx,
3345	addr_space_t, bool, bool);
3346	extern rtx convert_memory_address_addr_space (scalar_int_mode, rtx,
3347	addr_space_t);
3348	#define convert_memory_address(to_mode,x) \
3349	convert_memory_address_addr_space ((to_mode), (x), ADDR_SPACE_GENERIC)
3350	extern const char *get_insn_name (int);
3351	extern rtx_insn *get_last_insn_anywhere (void);
3352	extern rtx_insn *get_first_nonnote_insn (void);
3353	extern rtx_insn *get_last_nonnote_insn (void);
3354	extern void start_sequence (void);
3355	extern void push_to_sequence (rtx_insn *);
3356	extern void push_to_sequence2 (rtx_insn *, rtx_insn *);
3357	extern rtx_insn *end_sequence (void);
3358	#if TARGET_SUPPORTS_WIDE_INT == 0
3359	extern double_int rtx_to_double_int (const_rtx);
3360	#endif
3361	extern void cwi_output_hex (FILE *, const_rtx);
3362	#if TARGET_SUPPORTS_WIDE_INT == 0
3363	extern rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT,
3364	machine_mode);
3365	#endif
3366	extern rtx immed_wide_int_const (const poly_wide_int_ref &, machine_mode);
3367
3368	/* In varasm.cc */
3369	extern rtx force_const_mem (machine_mode, rtx);
3370
3371	/* In varasm.cc */
3372
3373	struct function;
3374	extern rtx get_pool_constant (const_rtx);
3375	extern rtx get_pool_constant_mark (rtx, bool *);
3376	extern fixed_size_mode get_pool_mode (const_rtx);
3377	extern rtx simplify_subtraction (rtx);
3378	extern void decide_function_section (tree);
3379
3380	/* In emit-rtl.cc */
3381	extern rtx_insn *emit_insn_before (rtx, rtx_insn *);
3382	extern rtx_insn *emit_insn_before_noloc (rtx, rtx_insn *, basic_block);
3383	extern rtx_insn *emit_insn_before_setloc (rtx, rtx_insn *, location_t);
3384	extern rtx_jump_insn *emit_jump_insn_before (rtx, rtx_insn *);
3385	extern rtx_jump_insn *emit_jump_insn_before_noloc (rtx, rtx_insn *);
3386	extern rtx_jump_insn *emit_jump_insn_before_setloc (rtx, rtx_insn *,
3387	location_t);
3388	extern rtx_insn *emit_call_insn_before (rtx, rtx_insn *);
3389	extern rtx_insn *emit_call_insn_before_noloc (rtx, rtx_insn *);
3390	extern rtx_insn *emit_call_insn_before_setloc (rtx, rtx_insn *, location_t);
3391	extern rtx_insn *emit_debug_insn_before (rtx, rtx_insn *);
3392	extern rtx_insn *emit_debug_insn_before_noloc (rtx, rtx_insn *);
3393	extern rtx_insn *emit_debug_insn_before_setloc (rtx, rtx_insn *, location_t);
3394	extern rtx_barrier *emit_barrier_before (rtx_insn *);
3395	extern rtx_code_label *emit_label_before (rtx_code_label *, rtx_insn *);
3396	extern rtx_note *emit_note_before (enum insn_note, rtx_insn *);
3397	extern rtx_insn *emit_insn_after (rtx, rtx_insn *);
3398	extern rtx_insn *emit_insn_after_noloc (rtx, rtx_insn *, basic_block);
3399	extern rtx_insn *emit_insn_after_setloc (rtx, rtx_insn *, location_t);
3400	extern rtx_jump_insn *emit_jump_insn_after (rtx, rtx_insn *);
3401	extern rtx_jump_insn *emit_jump_insn_after_noloc (rtx, rtx_insn *);
3402	extern rtx_jump_insn *emit_jump_insn_after_setloc (rtx, rtx_insn *, location_t);
3403	extern rtx_insn *emit_call_insn_after (rtx, rtx_insn *);
3404	extern rtx_insn *emit_call_insn_after_noloc (rtx, rtx_insn *);
3405	extern rtx_insn *emit_call_insn_after_setloc (rtx, rtx_insn *, location_t);
3406	extern rtx_insn *emit_debug_insn_after (rtx, rtx_insn *);
3407	extern rtx_insn *emit_debug_insn_after_noloc (rtx, rtx_insn *);
3408	extern rtx_insn *emit_debug_insn_after_setloc (rtx, rtx_insn *, location_t);
3409	extern rtx_barrier *emit_barrier_after (rtx_insn *);
3410	extern rtx_insn *emit_label_after (rtx_insn *, rtx_insn *);
3411	extern rtx_note *emit_note_after (enum insn_note, rtx_insn *);
3412	extern rtx_insn *emit_insn (rtx);
3413	extern rtx_insn *emit_debug_insn (rtx);
3414	extern rtx_insn *emit_jump_insn (rtx);
3415	extern rtx_insn *emit_likely_jump_insn (rtx);
3416	extern rtx_insn *emit_unlikely_jump_insn (rtx);
3417	extern rtx_insn *emit_call_insn (rtx);
3418	extern rtx_code_label *emit_label (rtx);
3419	extern rtx_jump_table_data *emit_jump_table_data (rtx);
3420	extern rtx_barrier *emit_barrier (void);
3421	extern rtx_note *emit_note (enum insn_note);
3422	extern rtx_note *emit_note_copy (rtx_note *);
3423	extern rtx_insn *gen_clobber (rtx);
3424	extern rtx_insn *emit_clobber (rtx);
3425	extern rtx_insn *gen_use (rtx);
3426	extern rtx_insn *emit_use (rtx);
3427	extern rtx_insn *make_insn_raw (rtx);
3428	extern void add_function_usage_to (rtx, rtx);
3429	extern rtx_call_insn *last_call_insn (void);
3430	extern rtx_insn *previous_insn (rtx_insn *);
3431	extern rtx_insn *next_insn (rtx_insn *);
3432	extern rtx_insn *prev_nonnote_insn (rtx_insn *);
3433	extern rtx_insn *next_nonnote_insn (rtx_insn *);
3434	extern rtx_insn *prev_nondebug_insn (rtx_insn *);
3435	extern rtx_insn *next_nondebug_insn (rtx_insn *);
3436	extern rtx_insn *prev_nonnote_nondebug_insn (rtx_insn *);
3437	extern rtx_insn *prev_nonnote_nondebug_insn_bb (rtx_insn *);
3438	extern rtx_insn *next_nonnote_nondebug_insn (rtx_insn *);
3439	extern rtx_insn *next_nonnote_nondebug_insn_bb (rtx_insn *);
3440	extern rtx_insn *prev_real_insn (rtx_insn *);
3441	extern rtx_insn *next_real_insn (rtx_insn *);
3442	extern rtx_insn *prev_real_nondebug_insn (rtx_insn *);
3443	extern rtx_insn *next_real_nondebug_insn (rtx);
3444	extern rtx_insn *prev_active_insn (rtx_insn *);
3445	extern rtx_insn *next_active_insn (rtx_insn *);
3446	extern bool active_insn_p (const rtx_insn *);
3447
3448	/* In emit-rtl.cc */
3449	extern int insn_line (const rtx_insn *);
3450	extern const char * insn_file (const rtx_insn *);
3451	extern tree insn_scope (const rtx_insn *);
3452	extern expanded_location insn_location (const rtx_insn *);
3453	extern int insn_discriminator (const rtx_insn *);
3454	extern location_t prologue_location, epilogue_location;
3455
3456	/* In jump.cc */
3457	extern enum rtx_code reverse_condition (enum rtx_code);
3458	extern enum rtx_code reverse_condition_maybe_unordered (enum rtx_code);
3459	extern enum rtx_code swap_condition (enum rtx_code);
3460	extern enum rtx_code unsigned_condition (enum rtx_code);
3461	extern enum rtx_code signed_condition (enum rtx_code);
3462	extern void mark_jump_label (rtx, rtx_insn *, int);
3463
3464	/* Return true if integer comparison operator CODE interprets its operands
3465	as unsigned. */
3466
3467	inline bool
3468	unsigned_condition_p (enum rtx_code code)
3469	{
3470	return unsigned_condition (code) == code;
3471	}
3472
3473	/* In jump.cc */
3474	extern rtx_insn *delete_related_insns (rtx);
3475
3476	/* In recog.cc */
3477	extern rtx *find_constant_term_loc (rtx *);
3478
3479	/* In emit-rtl.cc */
3480	extern rtx_insn *try_split (rtx, rtx_insn *, int);
3481
3482	/* In insn-recog.cc (generated by genrecog). */
3483	extern rtx_insn *split_insns (rtx, rtx_insn *);
3484
3485	/* In simplify-rtx.cc */
3486
3487	/* A class that records the context in which a simplification
3488	is being mode. */
3489	class simplify_context
3490	{
3491	public:
3492	rtx simplify_unary_operation (rtx_code, machine_mode, rtx, machine_mode);
3493	rtx simplify_binary_operation (rtx_code, machine_mode, rtx, rtx);
3494	rtx simplify_ternary_operation (rtx_code, machine_mode, machine_mode,
3495	rtx, rtx, rtx);
3496	rtx simplify_relational_operation (rtx_code, machine_mode, machine_mode,
3497	rtx, rtx);
3498	rtx simplify_subreg (machine_mode, rtx, machine_mode, poly_uint64);
3499
3500	rtx lowpart_subreg (machine_mode, rtx, machine_mode);
3501
3502	rtx simplify_merge_mask (rtx, rtx, int);
3503
3504	rtx simplify_gen_unary (rtx_code, machine_mode, rtx, machine_mode);
3505	rtx simplify_gen_binary (rtx_code, machine_mode, rtx, rtx);
3506	rtx simplify_gen_ternary (rtx_code, machine_mode, machine_mode,
3507	rtx, rtx, rtx);
3508	rtx simplify_gen_relational (rtx_code, machine_mode, machine_mode, rtx, rtx);
3509	rtx simplify_gen_subreg (machine_mode, rtx, machine_mode, poly_uint64);
3510	rtx simplify_gen_vec_select (rtx, unsigned int);
3511
3512	/* Tracks the level of MEM nesting for the value being simplified:
3513	0 means the value is not in a MEM, >0 means it is. This is needed
3514	because the canonical representation of multiplication is different
3515	inside a MEM than outside. */
3516	unsigned int mem_depth = 0;
3517
3518	/* Tracks number of simplify_associative_operation calls performed during
3519	outermost simplify* call. */
3520	unsigned int assoc_count = 0;
3521
3522	/* Limit for the above number, return NULL from
3523	simplify_associative_operation after we reach that assoc_count. */
3524	static const unsigned int max_assoc_count = 64;
3525
3526	private:
3527	rtx simplify_truncation (machine_mode, rtx, machine_mode);
3528	rtx simplify_byte_swapping_operation (rtx_code, machine_mode, rtx, rtx);
3529	rtx simplify_associative_operation (rtx_code, machine_mode, rtx, rtx);
3530	rtx simplify_distributive_operation (rtx_code, machine_mode, rtx, rtx);
3531	rtx simplify_logical_relational_operation (rtx_code, machine_mode, rtx, rtx,
3532	bool = false);
3533	rtx simplify_binary_operation_series (rtx_code, machine_mode, rtx, rtx);
3534	rtx simplify_distribute_over_subregs (rtx_code, machine_mode, rtx, rtx);
3535	rtx simplify_shift_const_int (rtx_code, machine_mode, rtx, unsigned int);
3536	rtx simplify_plus_minus (rtx_code, machine_mode, rtx, rtx);
3537	rtx simplify_cond_clz_ctz (rtx, rtx_code, rtx, rtx);
3538
3539	rtx simplify_unary_operation_1 (rtx_code, machine_mode, rtx);
3540	rtx simplify_binary_operation_1 (rtx_code, machine_mode, rtx, rtx, rtx, rtx);
3541	rtx simplify_ternary_operation_1 (rtx_code, machine_mode, machine_mode,
3542	rtx, rtx, rtx);
3543	rtx simplify_relational_operation_1 (rtx_code, machine_mode, machine_mode,
3544	rtx, rtx);
3545	};
3546
3547	inline rtx
3548	simplify_unary_operation (rtx_code code, machine_mode mode, rtx op,
3549	machine_mode op_mode)
3550	{
3551	return simplify_context ().simplify_unary_operation (code, mode, op,
3552	op_mode);
3553	}
3554
3555	inline rtx
3556	simplify_binary_operation (rtx_code code, machine_mode mode, rtx op0, rtx op1)
3557	{
3558	return simplify_context ().simplify_binary_operation (code, mode, op0, op1);
3559	}
3560
3561	inline rtx
3562	simplify_ternary_operation (rtx_code code, machine_mode mode,
3563	machine_mode op0_mode, rtx op0, rtx op1, rtx op2)
3564	{
3565	return simplify_context ().simplify_ternary_operation (code, mode, op0_mode,
3566	op0, op1, op2);
3567	}
3568
3569	inline rtx
3570	simplify_relational_operation (rtx_code code, machine_mode mode,
3571	machine_mode op_mode, rtx op0, rtx op1)
3572	{
3573	return simplify_context ().simplify_relational_operation (code, mode,
3574	op_mode, op0, op1);
3575	}
3576
3577	inline rtx
3578	simplify_subreg (machine_mode outermode, rtx op, machine_mode innermode,
3579	poly_uint64 byte)
3580	{
3581	return simplify_context ().simplify_subreg (outermode, op, innermode, byte);
3582	}
3583
3584	inline rtx
3585	simplify_gen_unary (rtx_code code, machine_mode mode, rtx op,
3586	machine_mode op_mode)
3587	{
3588	return simplify_context ().simplify_gen_unary (code, mode, op, op_mode);
3589	}
3590
3591	inline rtx
3592	simplify_gen_binary (rtx_code code, machine_mode mode, rtx op0, rtx op1)
3593	{
3594	return simplify_context ().simplify_gen_binary (code, mode, op0, op1);
3595	}
3596
3597	inline rtx
3598	simplify_gen_ternary (rtx_code code, machine_mode mode, machine_mode op0_mode,
3599	rtx op0, rtx op1, rtx op2)
3600	{
3601	return simplify_context ().simplify_gen_ternary (code, mode, op0_mode,
3602	op0, op1, op2);
3603	}
3604
3605	inline rtx
3606	simplify_gen_relational (rtx_code code, machine_mode mode,
3607	machine_mode op_mode, rtx op0, rtx op1)
3608	{
3609	return simplify_context ().simplify_gen_relational (code, mode, op_mode,
3610	op0, op1);
3611	}
3612
3613	inline rtx
3614	simplify_gen_subreg (machine_mode outermode, rtx op, machine_mode innermode,
3615	poly_uint64 byte)
3616	{
3617	return simplify_context ().simplify_gen_subreg (outermode, op,
3618	innermode, byte);
3619	}
3620
3621	inline rtx
3622	simplify_gen_vec_select (rtx op, unsigned int index)
3623	{
3624	return simplify_context ().simplify_gen_vec_select (op, index);
3625	}
3626
3627	inline rtx
3628	lowpart_subreg (machine_mode outermode, rtx op, machine_mode innermode)
3629	{
3630	return simplify_context ().lowpart_subreg (outermode, op, innermode);
3631	}
3632
3633	extern rtx simplify_const_unary_operation (enum rtx_code, machine_mode,
3634	rtx, machine_mode);
3635	extern rtx simplify_const_binary_operation (enum rtx_code, machine_mode,
3636	rtx, rtx);
3637	extern rtx simplify_const_relational_operation (enum rtx_code,
3638	machine_mode, rtx, rtx);
3639	extern rtx simplify_replace_fn_rtx (rtx, const_rtx,
3640	rtx (*fn) (rtx, const_rtx, void *), void *);
3641	extern rtx simplify_replace_rtx (rtx, const_rtx, rtx);
3642	extern rtx simplify_rtx (const_rtx);
3643	extern rtx avoid_constant_pool_reference (rtx);
3644	extern rtx delegitimize_mem_from_attrs (rtx);
3645	extern bool mode_signbit_p (machine_mode, const_rtx);
3646	extern bool val_signbit_p (machine_mode, unsigned HOST_WIDE_INT);
3647	extern bool val_signbit_known_set_p (machine_mode,
3648	unsigned HOST_WIDE_INT);
3649	extern bool val_signbit_known_clear_p (machine_mode,
3650	unsigned HOST_WIDE_INT);
3651	extern bool reverse_rotate_by_imm_p (machine_mode, unsigned int, rtx);
3652
3653	/* In reginfo.cc */
3654	extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int,
3655	const predefined_function_abi *);
3656	extern const HARD_REG_SET &simplifiable_subregs (const subreg_shape &);
3657
3658	/* In emit-rtl.cc */
3659	extern rtx set_for_reg_notes (rtx);
3660	extern rtx set_unique_reg_note (rtx, enum reg_note, rtx);
3661	extern rtx set_dst_reg_note (rtx, enum reg_note, rtx, rtx);
3662	extern void set_insn_deleted (rtx_insn *);
3663
3664	/* Functions in rtlanal.cc */
3665
3666	extern rtx single_set_2 (const rtx_insn *, const_rtx);
3667	extern rtx simple_regno_set (rtx, unsigned int);
3668	extern bool contains_symbol_ref_p (const_rtx);
3669	extern bool contains_symbolic_reference_p (const_rtx);
3670	extern bool contains_constant_pool_address_p (const_rtx);
3671	extern void add_auto_inc_notes (rtx_insn *, rtx);
3672
3673	/* Handle the cheap and common cases inline for performance. */
3674
3675	inline rtx single_set (const rtx_insn *insn)
3676	{
3677	if (!INSN_P (insn))
3678	return NULL_RTX;
3679
3680	if (GET_CODE (PATTERN (insn)) == SET)
3681	return PATTERN (insn);
3682
3683	/* Defer to the more expensive case. */
3684	return single_set_2 (insn, PATTERN (insn));
3685	}
3686
3687	extern scalar_int_mode get_address_mode (rtx mem);
3688	extern bool rtx_addr_can_trap_p (const_rtx);
3689	extern bool nonzero_address_p (const_rtx);
3690	extern bool rtx_unstable_p (const_rtx);
3691	extern bool rtx_varies_p (const_rtx, bool);
3692	extern bool rtx_addr_varies_p (const_rtx, bool);
3693	extern tree get_call_fndecl (const rtx_insn *);
3694	extern HOST_WIDE_INT get_integer_term (const_rtx);
3695	extern rtx get_related_value (const_rtx);
3696	extern bool offset_within_block_p (const_rtx, HOST_WIDE_INT);
3697	extern void split_const (rtx, rtx *, rtx *);
3698	extern rtx strip_offset (rtx, poly_int64 *);
3699	extern poly_int64 get_args_size (const_rtx);
3700	extern bool unsigned_reg_p (rtx);
3701	extern bool reg_mentioned_p (const_rtx, const_rtx);
3702	extern int count_occurrences (const_rtx, const_rtx, int);
3703	extern bool reg_referenced_p (const_rtx, const_rtx);
3704	extern bool reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3705	extern bool reg_set_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3706	extern int commutative_operand_precedence (rtx);
3707	extern bool swap_commutative_operands_p (rtx, rtx);
3708	extern bool modified_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3709	extern bool no_labels_between_p (const rtx_insn *, const rtx_insn *);
3710	extern bool modified_in_p (const_rtx, const_rtx);
3711	extern bool reg_set_p (const_rtx, const_rtx);
3712	extern bool multiple_sets (const_rtx);
3713	extern bool set_noop_p (const_rtx);
3714	extern bool noop_move_p (const rtx_insn *);
3715	extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
3716	extern bool reg_overlap_mentioned_p (const_rtx, const_rtx);
3717	extern const_rtx set_of (const_rtx, const_rtx);
3718	extern void record_hard_reg_sets (rtx, const_rtx, void *);
3719	extern void record_hard_reg_uses (rtx *, void *);
3720	extern void find_all_hard_regs (const_rtx, HARD_REG_SET *);
3721	extern void find_all_hard_reg_sets (const rtx_insn *, HARD_REG_SET *, bool);
3722	extern void note_pattern_stores (const_rtx,
3723	void (*) (rtx, const_rtx, void *), void *);
3724	extern void note_stores (const rtx_insn *,
3725	void (*) (rtx, const_rtx, void *), void *);
3726	extern void note_uses (rtx *, void (*) (rtx *, void *), void *);
3727	extern bool dead_or_set_p (const rtx_insn *, const_rtx);
3728	extern bool dead_or_set_regno_p (const rtx_insn *, unsigned int);
3729	extern rtx find_reg_note (const_rtx, enum reg_note, const_rtx);
3730	extern rtx find_regno_note (const_rtx, enum reg_note, unsigned int);
3731	extern rtx find_reg_equal_equiv_note (const_rtx);
3732	extern rtx find_constant_src (const rtx_insn *);
3733	extern bool find_reg_fusage (const_rtx, enum rtx_code, const_rtx);
3734	extern bool find_regno_fusage (const_rtx, enum rtx_code, unsigned int);
3735	extern rtx alloc_reg_note (enum reg_note, rtx, rtx);
3736	extern void add_reg_note (rtx, enum reg_note, rtx);
3737	extern void add_int_reg_note (rtx_insn *, enum reg_note, int);
3738	extern void add_args_size_note (rtx_insn *, poly_int64);
3739	extern void add_shallow_copy_of_reg_note (rtx_insn *, rtx);
3740	extern rtx duplicate_reg_note (rtx);
3741	extern void remove_note (rtx_insn *, const_rtx);
3742	extern bool remove_reg_equal_equiv_notes (rtx_insn *, bool = false);
3743	extern void remove_reg_equal_equiv_notes_for_regno (unsigned int);
3744	extern bool side_effects_p (const_rtx);
3745	extern bool volatile_refs_p (const_rtx);
3746	extern bool volatile_insn_p (const_rtx);
3747	extern bool may_trap_p_1 (const_rtx, unsigned);
3748	extern bool may_trap_p (const_rtx);
3749	extern bool may_trap_or_fault_p (const_rtx);
3750	extern bool can_throw_internal (const_rtx);
3751	extern bool can_throw_external (const_rtx);
3752	extern bool insn_could_throw_p (const_rtx);
3753	extern bool insn_nothrow_p (const_rtx);
3754	extern bool can_nonlocal_goto (const rtx_insn *);
3755	extern void copy_reg_eh_region_note_forward (rtx, rtx_insn *, rtx);
3756	extern void copy_reg_eh_region_note_backward (rtx, rtx_insn *, rtx);
3757	extern rtx replace_rtx (rtx, rtx, rtx, bool = false);
3758	extern void replace_label (rtx *, rtx, rtx, bool);
3759	extern void replace_label_in_insn (rtx_insn *, rtx_insn *, rtx_insn *, bool);
3760	extern bool rtx_referenced_p (const_rtx, const_rtx);
3761	extern bool tablejump_p (const rtx_insn *, rtx_insn **, rtx_jump_table_data **);
3762	extern rtx tablejump_casesi_pattern (const rtx_insn *insn);
3763	extern bool computed_jump_p (const rtx_insn *);
3764	extern bool tls_referenced_p (const_rtx);
3765	extern bool contains_mem_rtx_p (rtx x);
3766	extern bool register_asm_p (const_rtx);
3767
3768	/* Overload for refers_to_regno_p for checking a single register. */
3769	inline bool
3770	refers_to_regno_p (unsigned int regnum, const_rtx x, rtx* loc = NULL)
3771	{
3772	return refers_to_regno_p (regnum, regnum + 1, x, loc);
3773	}
3774
3775	/* Callback for for_each_inc_dec, to process the autoinc operation OP
3776	within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
3777	NULL. The callback is passed the same opaque ARG passed to
3778	for_each_inc_dec. Return zero to continue looking for other
3779	autoinc operations or any other value to interrupt the traversal and
3780	return that value to the caller of for_each_inc_dec. */
3781	typedef int (*for_each_inc_dec_fn) (rtx mem, rtx op, rtx dest, rtx src,
3782	rtx srcoff, void *arg);
3783	extern int for_each_inc_dec (rtx, for_each_inc_dec_fn, void *arg);
3784
3785	extern rtx regno_use_in (unsigned int, rtx);
3786	extern bool auto_inc_p (const_rtx);
3787	extern bool in_insn_list_p (const rtx_insn_list *, const rtx_insn *);
3788	extern void remove_node_from_insn_list (const rtx_insn *, rtx_insn_list **);
3789	extern bool loc_mentioned_in_p (rtx *, const_rtx);
3790	extern rtx_insn *find_first_parameter_load (rtx_insn *, rtx_insn *);
3791	extern bool keep_with_call_p (const rtx_insn *);
3792	extern bool label_is_jump_target_p (const_rtx, const rtx_insn *);
3793	extern int pattern_cost (rtx, bool);
3794	extern int insn_cost (rtx_insn *, bool);
3795	extern unsigned seq_cost (const rtx_insn *, bool);
3796
3797	/* Given an insn and condition, return a canonical description of
3798	the test being made. */
3799	extern rtx canonicalize_condition (rtx_insn *, rtx, int, rtx_insn **, rtx,
3800	int, int);
3801
3802	/* Given a JUMP_INSN, return a canonical description of the test
3803	being made. */
3804	extern rtx get_condition (rtx_insn *, rtx_insn **, int, int);
3805
3806	/* Information about a subreg of a hard register. */
3807	struct subreg_info
3808	{
3809	/* Offset of first hard register involved in the subreg. */
3810	int offset;
3811	/* Number of hard registers involved in the subreg. In the case of
3812	a paradoxical subreg, this is the number of registers that would
3813	be modified by writing to the subreg; some of them may be don't-care
3814	when reading from the subreg. */
3815	int nregs;
3816	/* Whether this subreg can be represented as a hard reg with the new
3817	mode (by adding OFFSET to the original hard register). */
3818	bool representable_p;
3819	};
3820
3821	extern void subreg_get_info (unsigned int, machine_mode,
3822	poly_uint64, machine_mode,
3823	struct subreg_info *);
3824
3825	/* lists.cc */
3826
3827	extern void free_EXPR_LIST_list (rtx_expr_list **);
3828	extern void free_INSN_LIST_list (rtx_insn_list **);
3829	extern void free_EXPR_LIST_node (rtx);
3830	extern void free_INSN_LIST_node (rtx);
3831	extern rtx_insn_list *alloc_INSN_LIST (rtx, rtx);
3832	extern rtx_insn_list *copy_INSN_LIST (rtx_insn_list *);
3833	extern rtx_insn_list *concat_INSN_LIST (rtx_insn_list *, rtx_insn_list *);
3834	extern rtx_expr_list *alloc_EXPR_LIST (int, rtx, rtx);
3835	extern void remove_free_INSN_LIST_elem (rtx_insn *, rtx_insn_list **);
3836	extern rtx remove_list_elem (rtx, rtx *);
3837	extern rtx_insn *remove_free_INSN_LIST_node (rtx_insn_list **);
3838	extern rtx remove_free_EXPR_LIST_node (rtx_expr_list **);
3839
3840
3841	/* reginfo.cc */
3842
3843	/* Resize reg info. */
3844	extern bool resize_reg_info (void);
3845	/* Free up register info memory. */
3846	extern void free_reg_info (void);
3847	extern void init_subregs_of_mode (void);
3848	extern void finish_subregs_of_mode (void);
3849	extern void reginfo_cc_finalize (void);
3850
3851	/* recog.cc */
3852	extern rtx extract_asm_operands (rtx);
3853	extern int asm_noperands (const_rtx);
3854	extern const char *decode_asm_operands (rtx, rtx *, rtx **, const char **,
3855	machine_mode *, location_t *);
3856	extern void get_referenced_operands (const char *, bool *, unsigned int);
3857
3858	extern enum reg_class reg_preferred_class (int);
3859	extern enum reg_class reg_alternate_class (int);
3860	extern enum reg_class reg_allocno_class (int);
3861	extern void setup_reg_classes (int, enum reg_class, enum reg_class,
3862	enum reg_class);
3863
3864	extern void split_all_insns (void);
3865	extern void split_all_insns_noflow (void);
3866
3867	#define MAX_SAVED_CONST_INT 64
3868	extern GTY(()) rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
3869
3870	#define const0_rtx (const_int_rtx[MAX_SAVED_CONST_INT])
3871	#define const1_rtx (const_int_rtx[MAX_SAVED_CONST_INT+1])
3872	#define const2_rtx (const_int_rtx[MAX_SAVED_CONST_INT+2])
3873	#define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1])
3874	extern GTY(()) rtx const_true_rtx;
3875
3876	extern GTY(()) rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
3877
3878	/* Returns a constant 0 rtx in mode MODE. Integer modes are treated the
3879	same as VOIDmode. */
3880
3881	#define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)])
3882
3883	/* Likewise, for the constants 1 and 2 and -1. */
3884
3885	#define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)])
3886	#define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)])
3887	#define CONSTM1_RTX(MODE) (const_tiny_rtx[3][(int) (MODE)])
3888
3889	extern GTY(()) rtx pc_rtx;
3890	extern GTY(()) rtx ret_rtx;
3891	extern GTY(()) rtx simple_return_rtx;
3892	extern GTY(()) rtx_insn *invalid_insn_rtx;
3893
3894	/* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg
3895	is used to represent the frame pointer. This is because the
3896	hard frame pointer and the automatic variables are separated by an amount
3897	that cannot be determined until after register allocation. We can assume
3898	that in this case ELIMINABLE_REGS will be defined, one action of which
3899	will be to eliminate FRAME_POINTER_REGNUM into HARD_FRAME_POINTER_REGNUM. */
3900	#ifndef HARD_FRAME_POINTER_REGNUM
3901	#define HARD_FRAME_POINTER_REGNUM FRAME_POINTER_REGNUM
3902	#endif
3903
3904	#ifndef HARD_FRAME_POINTER_IS_FRAME_POINTER
3905	#define HARD_FRAME_POINTER_IS_FRAME_POINTER \
3906	(HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3907	#endif
3908
3909	#ifndef HARD_FRAME_POINTER_IS_ARG_POINTER
3910	#define HARD_FRAME_POINTER_IS_ARG_POINTER \
3911	(HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3912	#endif
3913
3914	/* Index labels for global_rtl. */
3915	enum global_rtl_index
3916	{
3917	GR_STACK_POINTER,
3918	GR_FRAME_POINTER,
3919	/* For register elimination to work properly these hard_frame_pointer_rtx,
3920	frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
3921	the same register. */
3922	#if FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM
3923	GR_ARG_POINTER = GR_FRAME_POINTER,
3924	#endif
3925	#if HARD_FRAME_POINTER_IS_FRAME_POINTER
3926	GR_HARD_FRAME_POINTER = GR_FRAME_POINTER,
3927	#else
3928	GR_HARD_FRAME_POINTER,
3929	#endif
3930	#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3931	#if HARD_FRAME_POINTER_IS_ARG_POINTER
3932	GR_ARG_POINTER = GR_HARD_FRAME_POINTER,
3933	#else
3934	GR_ARG_POINTER,
3935	#endif
3936	#endif
3937	GR_VIRTUAL_INCOMING_ARGS,
3938	GR_VIRTUAL_STACK_ARGS,
3939	GR_VIRTUAL_STACK_DYNAMIC,
3940	GR_VIRTUAL_OUTGOING_ARGS,
3941	GR_VIRTUAL_CFA,
3942	GR_VIRTUAL_PREFERRED_STACK_BOUNDARY,
3943
3944	GR_MAX
3945	};
3946
3947	/* Target-dependent globals. */
3948	struct GTY(()) target_rtl {
3949	/* All references to the hard registers in global_rtl_index go through
3950	these unique rtl objects. On machines where the frame-pointer and
3951	arg-pointer are the same register, they use the same unique object.
3952
3953	After register allocation, other rtl objects which used to be pseudo-regs
3954	may be clobbered to refer to the frame-pointer register.
3955	But references that were originally to the frame-pointer can be
3956	distinguished from the others because they contain frame_pointer_rtx.
3957
3958	When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
3959	tricky: until register elimination has taken place hard_frame_pointer_rtx
3960	should be used if it is being set, and frame_pointer_rtx otherwise. After
3961	register elimination hard_frame_pointer_rtx should always be used.
3962	On machines where the two registers are same (most) then these are the
3963	same. */
3964	rtx x_global_rtl[GR_MAX];
3965
3966	/* A unique representation of (REG:Pmode PIC_OFFSET_TABLE_REGNUM). */
3967	rtx x_pic_offset_table_rtx;
3968
3969	/* A unique representation of (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM).
3970	This is used to implement __builtin_return_address for some machines;
3971	see for instance the MIPS port. */
3972	rtx x_return_address_pointer_rtx;
3973
3974	/* Commonly used RTL for hard registers. These objects are not
3975	necessarily unique, so we allocate them separately from global_rtl.
3976	They are initialized once per compilation unit, then copied into
3977	regno_reg_rtx at the beginning of each function. */
3978	rtx x_initial_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
3979
3980	/* A sample (mem:M stack_pointer_rtx) rtx for each mode M. */
3981	rtx x_top_of_stack[MAX_MACHINE_MODE];
3982
3983	/* Static hunks of RTL used by the aliasing code; these are treated
3984	as persistent to avoid unnecessary RTL allocations. */
3985	rtx x_static_reg_base_value[FIRST_PSEUDO_REGISTER];
3986
3987	/* The default memory attributes for each mode. */
3988	class mem_attrs *x_mode_mem_attrs[(int) MAX_MACHINE_MODE];
3989
3990	/* Track if RTL has been initialized. */
3991	bool target_specific_initialized;
3992	};
3993
3994	extern GTY(()) struct target_rtl default_target_rtl;
3995	#if SWITCHABLE_TARGET
3996	extern struct target_rtl *this_target_rtl;
3997	#else
3998	#define this_target_rtl (&default_target_rtl)
3999	#endif
4000
4001	#define global_rtl \
4002	(this_target_rtl->x_global_rtl)
4003	#define pic_offset_table_rtx \
4004	(this_target_rtl->x_pic_offset_table_rtx)
4005	#define return_address_pointer_rtx \
4006	(this_target_rtl->x_return_address_pointer_rtx)
4007	#define top_of_stack \
4008	(this_target_rtl->x_top_of_stack)
4009	#define mode_mem_attrs \
4010	(this_target_rtl->x_mode_mem_attrs)
4011
4012	/* All references to certain hard regs, except those created
4013	by allocating pseudo regs into them (when that's possible),
4014	go through these unique rtx objects. */
4015	#define stack_pointer_rtx (global_rtl[GR_STACK_POINTER])
4016	#define frame_pointer_rtx (global_rtl[GR_FRAME_POINTER])
4017	#define hard_frame_pointer_rtx (global_rtl[GR_HARD_FRAME_POINTER])
4018	#define arg_pointer_rtx (global_rtl[GR_ARG_POINTER])
4019
4020	#ifndef GENERATOR_FILE
4021	/* Return the attributes of a MEM rtx. */
4022	inline const class mem_attrs *
4023	get_mem_attrs (const_rtx x)
4024	{
4025	class mem_attrs *attrs;
4026
4027	attrs = MEM_ATTRS (x);
4028	if (!attrs)
4029	attrs = mode_mem_attrs[(int) GET_MODE (x)];
4030	return attrs;
4031	}
4032	#endif
4033
4034	/* Include the RTL generation functions. */
4035
4036	#ifndef GENERATOR_FILE
4037	#include "genrtl.h"
4038	#undef gen_rtx_ASM_INPUT
4039	#define gen_rtx_ASM_INPUT(MODE, ARG0) \
4040	gen_rtx_fmt_sL (ASM_INPUT, (MODE), (ARG0), 0)
4041	#define gen_rtx_ASM_INPUT_loc(MODE, ARG0, LOC) \
4042	gen_rtx_fmt_sL (ASM_INPUT, (MODE), (ARG0), (LOC))
4043	#endif
4044
4045	/* There are some RTL codes that require special attention; the
4046	generation functions included above do the raw handling. If you
4047	add to this list, modify special_rtx in gengenrtl.cc as well. */
4048
4049	extern rtx_expr_list *gen_rtx_EXPR_LIST (machine_mode, rtx, rtx);
4050	extern rtx_insn_list *gen_rtx_INSN_LIST (machine_mode, rtx, rtx);
4051	extern rtx_insn *
4052	gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
4053	basic_block bb, rtx pattern, location_t location, int code,
4054	rtx reg_notes);
4055	extern rtx gen_rtx_CONST_INT (machine_mode, HOST_WIDE_INT);
4056	extern rtx gen_rtx_CONST_VECTOR (machine_mode, rtvec);
4057	extern void set_mode_and_regno (rtx, machine_mode, unsigned int);
4058	extern rtx init_raw_REG (rtx, machine_mode, unsigned int);
4059	extern rtx gen_raw_REG (machine_mode, unsigned int);
4060	#define alloca_raw_REG(mode, regno) \
4061	init_raw_REG (rtx_alloca (REG), (mode), (regno))
4062	extern rtx gen_rtx_REG (machine_mode, unsigned int);
4063	extern rtx gen_rtx_SUBREG (machine_mode, rtx, poly_uint64);
4064	extern rtx gen_rtx_MEM (machine_mode, rtx);
4065	extern rtx gen_rtx_VAR_LOCATION (machine_mode, tree, rtx,
4066	enum var_init_status);
4067
4068	#ifdef GENERATOR_FILE
4069	#define PUT_MODE(RTX, MODE) PUT_MODE_RAW (RTX, MODE)
4070	#else
4071	inline void
4072	PUT_MODE (rtx x, machine_mode mode)
4073	{
4074	if (REG_P (x))
4075	set_mode_and_regno (x, mode, REGNO (x));
4076	else
4077	PUT_MODE_RAW (x, mode);
4078	}
4079	#endif
4080
4081	#define GEN_INT(N) gen_rtx_CONST_INT (VOIDmode, (N))
4082
4083	/* Virtual registers are used during RTL generation to refer to locations into
4084	the stack frame when the actual location isn't known until RTL generation
4085	is complete. The routine instantiate_virtual_regs replaces these with
4086	the proper value, which is normally {frame,arg,stack}_pointer_rtx plus
4087	a constant. */
4088
4089	#define FIRST_VIRTUAL_REGISTER (FIRST_PSEUDO_REGISTER)
4090
4091	/* This points to the first word of the incoming arguments passed on the stack,
4092	either by the caller or by the callee when pretending it was passed by the
4093	caller. */
4094
4095	#define virtual_incoming_args_rtx (global_rtl[GR_VIRTUAL_INCOMING_ARGS])
4096
4097	#define VIRTUAL_INCOMING_ARGS_REGNUM (FIRST_VIRTUAL_REGISTER)
4098
4099	/* If FRAME_GROWS_DOWNWARD, this points to immediately above the first
4100	variable on the stack. Otherwise, it points to the first variable on
4101	the stack. */
4102
4103	#define virtual_stack_vars_rtx (global_rtl[GR_VIRTUAL_STACK_ARGS])
4104
4105	#define VIRTUAL_STACK_VARS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 1)
4106
4107	/* This points to the location of dynamically-allocated memory on the stack
4108	immediately after the stack pointer has been adjusted by the amount
4109	desired. */
4110
4111	#define virtual_stack_dynamic_rtx (global_rtl[GR_VIRTUAL_STACK_DYNAMIC])
4112
4113	#define VIRTUAL_STACK_DYNAMIC_REGNUM ((FIRST_VIRTUAL_REGISTER) + 2)
4114
4115	/* This points to the location in the stack at which outgoing arguments should
4116	be written when the stack is pre-pushed (arguments pushed using push
4117	insns always use sp). */
4118
4119	#define virtual_outgoing_args_rtx (global_rtl[GR_VIRTUAL_OUTGOING_ARGS])
4120
4121	#define VIRTUAL_OUTGOING_ARGS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 3)
4122
4123	/* This points to the Canonical Frame Address of the function. This
4124	should correspond to the CFA produced by INCOMING_FRAME_SP_OFFSET,
4125	but is calculated relative to the arg pointer for simplicity; the
4126	frame pointer nor stack pointer are necessarily fixed relative to
4127	the CFA until after reload. */
4128
4129	#define virtual_cfa_rtx (global_rtl[GR_VIRTUAL_CFA])
4130
4131	#define VIRTUAL_CFA_REGNUM ((FIRST_VIRTUAL_REGISTER) + 4)
4132
4133	#define LAST_VIRTUAL_POINTER_REGISTER ((FIRST_VIRTUAL_REGISTER) + 4)
4134
4135	/* This is replaced by crtl->preferred_stack_boundary / BITS_PER_UNIT
4136	when finalized. */
4137
4138	#define virtual_preferred_stack_boundary_rtx \
4139	(global_rtl[GR_VIRTUAL_PREFERRED_STACK_BOUNDARY])
4140
4141	#define VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM \
4142	((FIRST_VIRTUAL_REGISTER) + 5)
4143
4144	#define LAST_VIRTUAL_REGISTER ((FIRST_VIRTUAL_REGISTER) + 5)
4145
4146	/* Nonzero if REGNUM is a pointer into the stack frame. */
4147	#define REGNO_PTR_FRAME_P(REGNUM) \
4148	((REGNUM) == STACK_POINTER_REGNUM \
4149	|| (REGNUM) == FRAME_POINTER_REGNUM \
4150	|| (REGNUM) == HARD_FRAME_POINTER_REGNUM \
4151	|| (REGNUM) == ARG_POINTER_REGNUM \
4152	|| VIRTUAL_REGISTER_NUM_P (REGNUM))
4153
4154	/* REGNUM never really appearing in the INSN stream. */
4155	#define INVALID_REGNUM (~(unsigned int) 0)
4156
4157	/* REGNUM for which no debug information can be generated. */
4158	#define IGNORED_DWARF_REGNUM (INVALID_REGNUM - 1)
4159
4160	extern rtx output_constant_def (tree, int);
4161	extern rtx lookup_constant_def (tree);
4162
4163	/* Nonzero after end of reload pass.
4164	Set to 1 or 0 by reload1.cc. */
4165
4166	extern int reload_completed;
4167
4168	/* Nonzero after thread_prologue_and_epilogue_insns has run. */
4169	extern int epilogue_completed;
4170
4171	/* Set to 1 while reload_as_needed is operating.
4172	Required by some machines to handle any generated moves differently. */
4173
4174	extern int reload_in_progress;
4175
4176	/* Set to true while in IRA. */
4177	extern bool ira_in_progress;
4178
4179	/* Set to true while in LRA. */
4180	extern bool lra_in_progress;
4181
4182	/* This macro indicates whether you may create a new
4183	pseudo-register. */
4184
4185	#define can_create_pseudo_p() (!reload_in_progress && !reload_completed)
4186
4187	#ifdef STACK_REGS
4188	/* Nonzero after end of regstack pass.
4189	Set to 1 or 0 by reg-stack.cc. */
4190	extern int regstack_completed;
4191	#endif
4192
4193	/* If this is nonzero, we do not bother generating VOLATILE
4194	around volatile memory references, and we are willing to
4195	output indirect addresses. If cse is to follow, we reject
4196	indirect addresses so a useful potential cse is generated;
4197	if it is used only once, instruction combination will produce
4198	the same indirect address eventually. */
4199	extern int cse_not_expected;
4200
4201	/* Translates rtx code to tree code, for those codes needed by
4202	real_arithmetic. The function returns an int because the caller may not
4203	know what `enum tree_code' means. */
4204
4205	extern int rtx_to_tree_code (enum rtx_code);
4206
4207	/* In cse.cc */
4208	extern int delete_trivially_dead_insns (rtx_insn *, int);
4209	extern bool exp_equiv_p (const_rtx, const_rtx, int, bool);
4210
4211	typedef bool (*hash_rtx_callback_function) (const_rtx, machine_mode, rtx *,
4212	machine_mode *);
4213	extern unsigned hash_rtx (const_rtx, machine_mode, int *, int *,
4214	bool, hash_rtx_callback_function = NULL);
4215
4216	/* In dse.cc */
4217	extern bool check_for_inc_dec (rtx_insn *insn);
4218
4219	/* In jump.cc */
4220	extern bool comparison_dominates_p (enum rtx_code, enum rtx_code);
4221	extern bool jump_to_label_p (const rtx_insn *);
4222	extern bool condjump_p (const rtx_insn *);
4223	extern bool any_condjump_p (const rtx_insn *);
4224	extern bool any_uncondjump_p (const rtx_insn *);
4225	extern rtx pc_set (const rtx_insn *);
4226	extern rtx condjump_label (const rtx_insn *);
4227	extern bool simplejump_p (const rtx_insn *);
4228	extern bool returnjump_p (const rtx_insn *);
4229	extern bool eh_returnjump_p (rtx_insn *);
4230	extern bool onlyjump_p (const rtx_insn *);
4231	extern bool invert_jump_1 (rtx_jump_insn *, rtx);
4232	extern bool invert_jump (rtx_jump_insn *, rtx, int);
4233	extern bool rtx_renumbered_equal_p (const_rtx, const_rtx);
4234	extern int true_regnum (const_rtx);
4235	extern unsigned int reg_or_subregno (const_rtx);
4236	extern bool redirect_jump_1 (rtx_insn *, rtx);
4237	extern void redirect_jump_2 (rtx_jump_insn *, rtx, rtx, int, int);
4238	extern bool redirect_jump (rtx_jump_insn *, rtx, int);
4239	extern void rebuild_jump_labels (rtx_insn *);
4240	extern void rebuild_jump_labels_chain (rtx_insn *);
4241	extern rtx reversed_comparison (const_rtx, machine_mode);
4242	extern enum rtx_code reversed_comparison_code (const_rtx, const rtx_insn *);
4243	extern enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx,
4244	const_rtx, const rtx_insn *);
4245	extern void delete_for_peephole (rtx_insn *, rtx_insn *);
4246	extern bool condjump_in_parallel_p (const rtx_insn *);
4247
4248	/* In emit-rtl.cc. */
4249	extern int max_reg_num (void);
4250	extern int max_label_num (void);
4251	extern int get_first_label_num (void);
4252	extern void maybe_set_first_label_num (rtx_code_label *);
4253	extern void delete_insns_since (rtx_insn *);
4254	extern void mark_reg_pointer (rtx, int);
4255	extern void mark_user_reg (rtx);
4256	extern void reset_used_flags (rtx);
4257	extern void set_used_flags (rtx);
4258	extern void reorder_insns (rtx_insn *, rtx_insn *, rtx_insn *);
4259	extern void reorder_insns_nobb (rtx_insn *, rtx_insn *, rtx_insn *);
4260	extern int get_max_insn_count (void);
4261	extern bool in_sequence_p (void);
4262	extern void init_emit (void);
4263	extern void init_emit_regs (void);
4264	extern void init_derived_machine_modes (void);
4265	extern void init_emit_once (void);
4266	extern void push_topmost_sequence (void);
4267	extern void pop_topmost_sequence (void);
4268	extern void set_new_first_and_last_insn (rtx_insn *, rtx_insn *);
4269	extern void unshare_all_rtl (void);
4270	extern void unshare_all_rtl_again (rtx_insn *);
4271	extern void unshare_all_rtl_in_chain (rtx_insn *);
4272	extern void verify_rtl_sharing (void);
4273	extern void add_insn (rtx_insn *);
4274	extern void add_insn_before (rtx_insn *, rtx_insn *, basic_block);
4275	extern void add_insn_after (rtx_insn *, rtx_insn *, basic_block);
4276	extern void remove_insn (rtx_insn *);
4277	extern rtx_insn *emit (rtx, bool = true);
4278	extern void emit_insn_at_entry (rtx);
4279	extern rtx gen_lowpart_SUBREG (machine_mode, rtx);
4280	extern rtx gen_const_mem (machine_mode, rtx);
4281	extern rtx gen_frame_mem (machine_mode, rtx);
4282	extern rtx gen_tmp_stack_mem (machine_mode, rtx);
4283	extern bool validate_subreg (machine_mode, machine_mode,
4284	const_rtx, poly_uint64);
4285
4286	/* In combine.cc */
4287	extern unsigned int extended_count (const_rtx, machine_mode, bool);
4288	extern rtx remove_death (unsigned int, rtx_insn *);
4289	extern rtx make_compound_operation (rtx, enum rtx_code);
4290
4291	/* In sched-rgn.cc. */
4292	extern void schedule_insns (void);
4293
4294	/* In sched-ebb.cc. */
4295	extern void schedule_ebbs (void);
4296
4297	/* In sel-sched-dump.cc. */
4298	extern void sel_sched_fix_param (const char *param, const char *val);
4299
4300	/* In print-rtl.cc */
4301	extern const char *print_rtx_head;
4302	extern void debug (const rtx_def &ref);
4303	extern void debug (const rtx_def *ptr);
4304	extern void debug_rtx (const_rtx);
4305	extern void debug_rtx_list (const rtx_insn *, int);
4306	extern void debug_rtx_range (const rtx_insn *, const rtx_insn *);
4307	extern const rtx_insn *debug_rtx_find (const rtx_insn *, int);
4308	extern void print_mem_expr (FILE *, const_tree);
4309	extern void print_rtl (FILE *, const_rtx);
4310	extern void print_simple_rtl (FILE *, const_rtx);
4311	extern void print_rtl_single (FILE *, const_rtx);
4312	extern void print_rtl_single_with_indent (FILE *, const_rtx, int);
4313	extern void print_inline_rtx (FILE *, const_rtx, int);
4314
4315	/* In stmt.cc */
4316	extern void expand_null_return (void);
4317	extern void expand_naked_return (void);
4318	extern void emit_jump (rtx);
4319
4320	/* Memory operation built-ins differ by return value. Mapping
4321	of the enum values is following:
4322	- RETURN_BEGIN - return destination, e.g. memcpy
4323	- RETURN_END - return destination + n, e.g. mempcpy
4324	- RETURN_END_MINUS_ONE - return a pointer to the terminating
4325	null byte of the string, e.g. strcpy
4326	*/
4327
4328	enum memop_ret
4329	{
4330	RETURN_BEGIN,
4331	RETURN_END,
4332	RETURN_END_MINUS_ONE
4333	};
4334
4335	/* In expr.cc */
4336	extern rtx move_by_pieces (rtx, rtx, unsigned HOST_WIDE_INT,
4337	unsigned int, memop_ret);
4338	extern poly_int64 find_args_size_adjust (rtx_insn *);
4339	extern poly_int64 fixup_args_size_notes (rtx_insn *, rtx_insn *, poly_int64);
4340
4341	/* In expmed.cc */
4342	extern void init_expmed (void);
4343	extern void expand_inc (rtx, rtx);
4344	extern void expand_dec (rtx, rtx);
4345
4346	/* In lower-subreg.cc */
4347	extern void init_lower_subreg (void);
4348
4349	/* In gcse.cc */
4350	extern bool can_copy_p (machine_mode);
4351	extern bool can_assign_to_reg_without_clobbers_p (rtx, machine_mode);
4352	extern rtx_insn *prepare_copy_insn (rtx, rtx);
4353
4354	/* In cprop.cc */
4355	extern rtx fis_get_condition (rtx_insn *);
4356
4357	/* In ira.cc */
4358	extern HARD_REG_SET eliminable_regset;
4359	extern void mark_elimination (int, int);
4360
4361	/* In reginfo.cc */
4362	extern bool reg_classes_intersect_p (reg_class_t, reg_class_t);
4363	extern bool reg_class_subset_p (reg_class_t, reg_class_t);
4364	extern void globalize_reg (tree, int);
4365	extern void init_reg_modes_target (void);
4366	extern void init_regs (void);
4367	extern void reinit_regs (void);
4368	extern void init_fake_stack_mems (void);
4369	extern void save_register_info (void);
4370	extern void init_reg_sets (void);
4371	extern void regclass (rtx, int);
4372	extern void reg_scan (rtx_insn *, unsigned int);
4373	extern void fix_register (const char *, int, int);
4374	extern const HARD_REG_SET *valid_mode_changes_for_regno (unsigned int);
4375
4376	/* In reload1.cc */
4377	extern bool function_invariant_p (const_rtx);
4378
4379	/* In calls.cc */
4380	enum libcall_type
4381	{
4382	LCT_NORMAL = 0,
4383	LCT_CONST = 1,
4384	LCT_PURE = 2,
4385	LCT_NORETURN = 3,
4386	LCT_THROW = 4,
4387	LCT_RETURNS_TWICE = 5
4388	};
4389
4390	extern rtx emit_library_call_value_1 (int, rtx, rtx, enum libcall_type,
4391	machine_mode, int, rtx_mode_t *);
4392
4393	/* Output a library call and discard the returned value. FUN is the
4394	address of the function, as a SYMBOL_REF rtx, and OUTMODE is the mode
4395	of the (discarded) return value. FN_TYPE is LCT_NORMAL for `normal'
4396	calls, LCT_CONST for `const' calls, LCT_PURE for `pure' calls, or
4397	another LCT_ value for other types of library calls.
4398
4399	There are different overloads of this function for different numbers
4400	of arguments. In each case the argument value is followed by its mode. */
4401
4402	inline void
4403	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode)
4404	{
4405	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 0, NULL);
4406	}
4407
4408	inline void
4409	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4410	rtx arg1, machine_mode arg1_mode)
4411	{
4412	rtx_mode_t args[] = { rtx_mode_t (arg1, arg1_mode) };
4413	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 1, args);
4414	}
4415
4416	inline void
4417	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4418	rtx arg1, machine_mode arg1_mode,
4419	rtx arg2, machine_mode arg2_mode)
4420	{
4421	rtx_mode_t args[] = {
4422	rtx_mode_t (arg1, arg1_mode),
4423	rtx_mode_t (arg2, arg2_mode)
4424	};
4425	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 2, args);
4426	}
4427
4428	inline void
4429	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4430	rtx arg1, machine_mode arg1_mode,
4431	rtx arg2, machine_mode arg2_mode,
4432	rtx arg3, machine_mode arg3_mode)
4433	{
4434	rtx_mode_t args[] = {
4435	rtx_mode_t (arg1, arg1_mode),
4436	rtx_mode_t (arg2, arg2_mode),
4437	rtx_mode_t (arg3, arg3_mode)
4438	};
4439	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 3, args);
4440	}
4441
4442	inline void
4443	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4444	rtx arg1, machine_mode arg1_mode,
4445	rtx arg2, machine_mode arg2_mode,
4446	rtx arg3, machine_mode arg3_mode,
4447	rtx arg4, machine_mode arg4_mode)
4448	{
4449	rtx_mode_t args[] = {
4450	rtx_mode_t (arg1, arg1_mode),
4451	rtx_mode_t (arg2, arg2_mode),
4452	rtx_mode_t (arg3, arg3_mode),
4453	rtx_mode_t (arg4, arg4_mode)
4454	};
4455	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 4, args);
4456	}
4457
4458	/* Like emit_library_call, but return the value produced by the call.
4459	Use VALUE to store the result if it is nonnull, otherwise pick a
4460	convenient location. */
4461
4462	inline rtx
4463	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4464	machine_mode outmode)
4465	{
4466	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 0, NULL);
4467	}
4468
4469	inline rtx
4470	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4471	machine_mode outmode,
4472	rtx arg1, machine_mode arg1_mode)
4473	{
4474	rtx_mode_t args[] = { rtx_mode_t (arg1, arg1_mode) };
4475	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 1, args);
4476	}
4477
4478	inline rtx
4479	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4480	machine_mode outmode,
4481	rtx arg1, machine_mode arg1_mode,
4482	rtx arg2, machine_mode arg2_mode)
4483	{
4484	rtx_mode_t args[] = {
4485	rtx_mode_t (arg1, arg1_mode),
4486	rtx_mode_t (arg2, arg2_mode)
4487	};
4488	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 2, args);
4489	}
4490
4491	inline rtx
4492	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4493	machine_mode outmode,
4494	rtx arg1, machine_mode arg1_mode,
4495	rtx arg2, machine_mode arg2_mode,
4496	rtx arg3, machine_mode arg3_mode)
4497	{
4498	rtx_mode_t args[] = {
4499	rtx_mode_t (arg1, arg1_mode),
4500	rtx_mode_t (arg2, arg2_mode),
4501	rtx_mode_t (arg3, arg3_mode)
4502	};
4503	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 3, args);
4504	}
4505
4506	inline rtx
4507	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4508	machine_mode outmode,
4509	rtx arg1, machine_mode arg1_mode,
4510	rtx arg2, machine_mode arg2_mode,
4511	rtx arg3, machine_mode arg3_mode,
4512	rtx arg4, machine_mode arg4_mode)
4513	{
4514	rtx_mode_t args[] = {
4515	rtx_mode_t (arg1, arg1_mode),
4516	rtx_mode_t (arg2, arg2_mode),
4517	rtx_mode_t (arg3, arg3_mode),
4518	rtx_mode_t (arg4, arg4_mode)
4519	};
4520	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 4, args);
4521	}
4522
4523	/* In varasm.cc */
4524	extern void init_varasm_once (void);
4525
4526	extern rtx make_debug_expr_from_rtl (const_rtx);
4527
4528	/* In read-rtl.cc */
4529	#ifdef GENERATOR_FILE
4530	extern bool read_rtx (const char *, vec<rtx> *);
4531	#endif
4532
4533	/* In alias.cc */
4534	extern rtx canon_rtx (rtx);
4535	extern rtx get_addr (rtx);
4536	extern bool read_dependence (const_rtx, const_rtx);
4537	extern bool true_dependence (const_rtx, machine_mode, const_rtx);
4538	extern bool canon_true_dependence (const_rtx, machine_mode, rtx,
4539	const_rtx, rtx);
4540	extern bool anti_dependence (const_rtx, const_rtx);
4541	extern bool canon_anti_dependence (const_rtx, bool,
4542	const_rtx, machine_mode, rtx);
4543	extern bool output_dependence (const_rtx, const_rtx);
4544	extern bool canon_output_dependence (const_rtx, bool,
4545	const_rtx, machine_mode, rtx);
4546	extern bool may_alias_p (const_rtx, const_rtx);
4547	extern void init_alias_target (void);
4548	extern void init_alias_analysis (void);
4549	extern void end_alias_analysis (void);
4550	extern void vt_equate_reg_base_value (const_rtx, const_rtx);
4551	extern bool memory_modified_in_insn_p (const_rtx, const_rtx);
4552	extern bool may_be_sp_based_p (rtx);
4553	extern rtx gen_hard_reg_clobber (machine_mode, unsigned int);
4554	extern rtx get_reg_known_value (unsigned int);
4555	extern bool get_reg_known_equiv_p (unsigned int);
4556	extern rtx get_reg_base_value (unsigned int);
4557	extern rtx extract_mem_from_operand (rtx);
4558
4559	#ifdef STACK_REGS
4560	extern bool stack_regs_mentioned (const_rtx insn);
4561	#endif
4562
4563	/* In toplev.cc */
4564	extern GTY(()) rtx stack_limit_rtx;
4565
4566	/* In var-tracking.cc */
4567	extern unsigned int variable_tracking_main (void);
4568	extern void delete_vta_debug_insns (bool);
4569
4570	/* In stor-layout.cc. */
4571	extern void get_mode_bounds (scalar_int_mode, int,
4572	scalar_int_mode, rtx *, rtx *);
4573
4574	/* In loop-iv.cc */
4575	extern rtx canon_condition (rtx);
4576	extern void simplify_using_condition (rtx, rtx *, bitmap);
4577
4578	/* In final.cc */
4579	extern void compute_alignments (void);
4580	extern void update_alignments (vec<rtx> &);
4581	extern int asm_str_count (const char *templ);
4582	extern rtx get_call_rtx_from (const rtx_insn *);
4583
4584	struct rtl_hooks
4585	{
4586	rtx (*gen_lowpart) (machine_mode, rtx);
4587	rtx (*gen_lowpart_no_emit) (machine_mode, rtx);
4588	rtx (*reg_nonzero_bits) (const_rtx, scalar_int_mode, scalar_int_mode,
4589	unsigned HOST_WIDE_INT *);
4590	rtx (*reg_num_sign_bit_copies) (const_rtx, scalar_int_mode, scalar_int_mode,
4591	unsigned int *);
4592	bool (*reg_truncated_to_mode) (machine_mode, const_rtx);
4593
4594	/* Whenever you add entries here, make sure you adjust rtlhooks-def.h. */
4595	};
4596
4597	/* Each pass can provide its own. */
4598	extern struct rtl_hooks rtl_hooks;
4599
4600	/* ... but then it has to restore these. */
4601	extern const struct rtl_hooks general_rtl_hooks;
4602
4603	/* Keep this for the nonce. */
4604	#define gen_lowpart rtl_hooks.gen_lowpart
4605
4606	extern void insn_locations_init (void);
4607	extern void insn_locations_finalize (void);
4608	extern void set_curr_insn_location (location_t);
4609	extern location_t curr_insn_location (void);
4610	extern void set_insn_locations (rtx_insn *, location_t);
4611
4612	/* rtl-error.cc */
4613	extern void _fatal_insn_not_found (const_rtx, const char *, int, const char *)
4614	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
4615	extern void _fatal_insn (const char *, const_rtx, const char *, int, const char *)
4616	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
4617
4618	#define fatal_insn(msgid, insn) \
4619	_fatal_insn (msgid, insn, __FILE__, __LINE__, __FUNCTION__)
4620	#define fatal_insn_not_found(insn) \
4621	_fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)
4622
4623	/* reginfo.cc */
4624	extern tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
4625
4626	/* Information about the function that is propagated by the RTL backend.
4627	Available only for functions that has been already assembled. */
4628
4629	struct GTY(()) cgraph_rtl_info {
4630	unsigned int preferred_incoming_stack_boundary;
4631
4632	/* Which registers the function clobbers, either directly or by
4633	calling another function. */
4634	HARD_REG_SET function_used_regs;
4635	};
4636
4637	/* If loads from memories of mode MODE always sign or zero extend,
4638	return SIGN_EXTEND or ZERO_EXTEND as appropriate. Return UNKNOWN
4639	otherwise. */
4640
4641	inline rtx_code
4642	load_extend_op (machine_mode mode)
4643	{
4644	scalar_int_mode int_mode;
4645	if (is_a <scalar_int_mode> (m: mode, result: &int_mode)
4646	&& GET_MODE_PRECISION (mode: int_mode) < BITS_PER_WORD)
4647	return LOAD_EXTEND_OP (int_mode);
4648	return UNKNOWN;
4649	}
4650
4651	/* If X is a PLUS of a base and a constant offset, add the constant to *OFFSET
4652	and return the base. Return X otherwise. */
4653
4654	inline rtx
4655	strip_offset_and_add (rtx x, poly_int64 *offset)
4656	{
4657	if (GET_CODE (x) == PLUS)
4658	{
4659	poly_int64 suboffset;
4660	x = strip_offset (x, &suboffset);
4661	*offset = poly_uint64 (*offset) + suboffset;
4662	}
4663	return x;
4664	}
4665
4666	/* Return true if X is an operation that always operates on the full
4667	registers for WORD_REGISTER_OPERATIONS architectures. */
4668
4669	inline bool
4670	word_register_operation_p (const_rtx x)
4671	{
4672	switch (GET_CODE (x))
4673	{
4674	case CONST_INT:
4675	case ROTATE:
4676	case ROTATERT:
4677	case SIGN_EXTRACT:
4678	case ZERO_EXTRACT:
4679	return false;
4680
4681	default:
4682	return true;
4683	}
4684	}
4685
4686	/* Holds an rtx comparison to simplify passing many parameters pertaining to a
4687	single comparison. */
4688
4689	struct rtx_comparison {
4690	rtx_code code;
4691	rtx op0, op1;
4692	machine_mode mode;
4693	};
4694
4695	/* gtype-desc.cc. */
4696	extern void gt_ggc_mx (rtx &);
4697	extern void gt_pch_nx (rtx &);
4698	extern void gt_pch_nx (rtx &, gt_pointer_operator, void *);
4699
4700	#endif /* ! GCC_RTL_H */
4701