1	/* Register Transfer Language (RTL) definitions for GCC
2	Copyright (C) 1987-2024 Free Software Foundation, Inc.
3
4	This file is part of GCC.
5
6	GCC is free software; you can redistribute it and/or modify it under
7	the terms of the GNU General Public License as published by the Free
8	Software Foundation; either version 3, or (at your option) any later
9	version.
10
11	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12	WARRANTY; without even the implied warranty of MERCHANTABILITY or
13	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14	for more details.
15
16	You should have received a copy of the GNU General Public License
17	along with GCC; see the file COPYING3. If not see
18	<http://www.gnu.org/licenses/>. */
19
20	#ifndef GCC_RTL_H
21	#define GCC_RTL_H
22
23	/* This file is occasionally included by generator files which expect
24	machmode.h and other files to exist and would not normally have been
25	included by coretypes.h. */
26	#ifdef GENERATOR_FILE
27	#include "real.h"
28	#include "fixed-value.h"
29	#include "statistics.h"
30	#include "vec.h"
31	#include "hash-table.h"
32	#include "hash-set.h"
33	#include "input.h"
34	#include "is-a.h"
35	#endif /* GENERATOR_FILE */
36
37	#include "hard-reg-set.h"
38
39	class predefined_function_abi;
40
41	/* Value used by some passes to "recognize" noop moves as valid
42	instructions. */
43	#define NOOP_MOVE_INSN_CODE INT_MAX
44
45	/* Register Transfer Language EXPRESSIONS CODES */
46
47	#define RTX_CODE enum rtx_code
48	enum rtx_code : unsigned {
49
50	#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) ENUM ,
51	#include "rtl.def" /* rtl expressions are documented here */
52	#undef DEF_RTL_EXPR
53
54	LAST_AND_UNUSED_RTX_CODE}; /* A convenient way to get a value for
55	NUM_RTX_CODE.
56	Assumes default enum value assignment. */
57
58	/* The cast here, saves many elsewhere. */
59	#define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE)
60
61	/* Similar, but since generator files get more entries... */
62	#ifdef GENERATOR_FILE
63	# define NON_GENERATOR_NUM_RTX_CODE ((int) MATCH_OPERAND)
64	#endif
65
66	#define RTX_CODE_BITSIZE 8
67
68	/* Register Transfer Language EXPRESSIONS CODE CLASSES */
69
70	enum rtx_class {
71	/* We check bit 0-1 of some rtx class codes in the predicates below. */
72
73	/* Bit 0 = comparison if 0, arithmetic is 1
74	Bit 1 = 1 if commutative. */
75	RTX_COMPARE, /* 0 */
76	RTX_COMM_COMPARE,
77	RTX_BIN_ARITH,
78	RTX_COMM_ARITH,
79
80	/* Must follow the four preceding values. */
81	RTX_UNARY, /* 4 */
82
83	RTX_EXTRA,
84	RTX_MATCH,
85	RTX_INSN,
86
87	/* Bit 0 = 1 if constant. */
88	RTX_OBJ, /* 8 */
89	RTX_CONST_OBJ,
90
91	RTX_TERNARY,
92	RTX_BITFIELD_OPS,
93	RTX_AUTOINC
94	};
95
96	#define RTX_OBJ_MASK (~1)
97	#define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK)
98	#define RTX_COMPARE_MASK (~1)
99	#define RTX_COMPARE_RESULT (RTX_COMPARE & RTX_COMPARE_MASK)
100	#define RTX_ARITHMETIC_MASK (~1)
101	#define RTX_ARITHMETIC_RESULT (RTX_COMM_ARITH & RTX_ARITHMETIC_MASK)
102	#define RTX_BINARY_MASK (~3)
103	#define RTX_BINARY_RESULT (RTX_COMPARE & RTX_BINARY_MASK)
104	#define RTX_COMMUTATIVE_MASK (~2)
105	#define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK)
106	#define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK)
107
108	extern const unsigned char rtx_length[NUM_RTX_CODE];
109	#define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)])
110
111	extern const char * const rtx_name[NUM_RTX_CODE];
112	#define GET_RTX_NAME(CODE) (rtx_name[(int) (CODE)])
113
114	extern const char * const rtx_format[NUM_RTX_CODE];
115	#define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)])
116
117	extern const enum rtx_class rtx_class[NUM_RTX_CODE];
118	#define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)])
119
120	/* True if CODE is part of the insn chain (i.e. has INSN_UID, PREV_INSN
121	and NEXT_INSN fields). */
122	#define INSN_CHAIN_CODE_P(CODE) IN_RANGE (CODE, DEBUG_INSN, NOTE)
123
124	extern const unsigned char rtx_code_size[NUM_RTX_CODE];
125	extern const unsigned char rtx_next[NUM_RTX_CODE];
126
127	/* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label
128	relative to which the offsets are calculated, as explained in rtl.def. */
129	struct addr_diff_vec_flags
130	{
131	/* Set at the start of shorten_branches - ONLY WHEN OPTIMIZING - : */
132	unsigned min_align: 8;
133	/* Flags: */
134	unsigned base_after_vec: 1; /* BASE is after the ADDR_DIFF_VEC. */
135	unsigned min_after_vec: 1; /* minimum address target label is
136	after the ADDR_DIFF_VEC. */
137	unsigned max_after_vec: 1; /* maximum address target label is
138	after the ADDR_DIFF_VEC. */
139	unsigned min_after_base: 1; /* minimum address target label is
140	after BASE. */
141	unsigned max_after_base: 1; /* maximum address target label is
142	after BASE. */
143	/* Set by the actual branch shortening process - ONLY WHEN OPTIMIZING - : */
144	unsigned offset_unsigned: 1; /* offsets have to be treated as unsigned. */
145	unsigned : 2;
146	unsigned scale : 8;
147	};
148
149	/* Structure used to describe the attributes of a MEM. These are hashed
150	so MEMs that the same attributes share a data structure. This means
151	they cannot be modified in place. */
152	class GTY(()) mem_attrs
153	{
154	public:
155	mem_attrs ();
156
157	/* The expression that the MEM accesses, or null if not known.
158	This expression might be larger than the memory reference itself.
159	(In other words, the MEM might access only part of the object.) */
160	tree expr;
161
162	/* The offset of the memory reference from the start of EXPR.
163	Only valid if OFFSET_KNOWN_P. */
164	poly_int64 offset;
165
166	/* The size of the memory reference in bytes. Only valid if
167	SIZE_KNOWN_P. */
168	poly_int64 size;
169
170	/* The alias set of the memory reference. */
171	alias_set_type alias;
172
173	/* The alignment of the reference in bits. Always a multiple of
174	BITS_PER_UNIT. Note that EXPR may have a stricter alignment
175	than the memory reference itself. */
176	unsigned int align;
177
178	/* The address space that the memory reference uses. */
179	unsigned char addrspace;
180
181	/* True if OFFSET is known. */
182	bool offset_known_p;
183
184	/* True if SIZE is known. */
185	bool size_known_p;
186	};
187
188	/* Structure used to describe the attributes of a REG in similar way as
189	mem_attrs does for MEM above. Note that the OFFSET field is calculated
190	in the same way as for mem_attrs, rather than in the same way as a
191	SUBREG_BYTE. For example, if a big-endian target stores a byte
192	object in the low part of a 4-byte register, the OFFSET field
193	will be -3 rather than 0. */
194
195	class GTY((for_user)) reg_attrs {
196	public:
197	tree decl; /* decl corresponding to REG. */
198	poly_int64 offset; /* Offset from start of DECL. */
199	};
200
201	/* Common union for an element of an rtx. */
202
203	union rtunion
204	{
205	int rt_int;
206	unsigned int rt_uint;
207	poly_uint16 rt_subreg;
208	const char *rt_str;
209	rtx rt_rtx;
210	rtvec rt_rtvec;
211	machine_mode rt_type;
212	addr_diff_vec_flags rt_addr_diff_vec_flags;
213	struct cselib_val *rt_cselib;
214	tree rt_tree;
215	basic_block rt_bb;
216	mem_attrs *rt_mem;
217	class constant_descriptor_rtx *rt_constant;
218	struct dw_cfi_node *rt_cfi;
219	};
220
221	/* Describes the properties of a REG. */
222	struct GTY(()) reg_info {
223	/* The value of REGNO. */
224	unsigned int regno;
225
226	/* The value of REG_NREGS. */
227	unsigned int nregs : 8;
228	unsigned int unused : 24;
229
230	/* The value of REG_ATTRS. */
231	reg_attrs *attrs;
232	};
233
234	/* This structure remembers the position of a SYMBOL_REF within an
235	object_block structure. A SYMBOL_REF only provides this information
236	if SYMBOL_REF_HAS_BLOCK_INFO_P is true. */
237	struct GTY(()) block_symbol {
238	/* The usual SYMBOL_REF fields. */
239	rtunion GTY ((skip)) fld[2];
240
241	/* The block that contains this object. */
242	struct object_block *block;
243
244	/* The offset of this object from the start of its block. It is negative
245	if the symbol has not yet been assigned an offset. */
246	HOST_WIDE_INT offset;
247	};
248
249	/* Describes a group of objects that are to be placed together in such
250	a way that their relative positions are known. */
251	struct GTY((for_user)) object_block {
252	/* The section in which these objects should be placed. */
253	section *sect;
254
255	/* The alignment of the first object, measured in bits. */
256	unsigned int alignment;
257
258	/* The total size of the objects, measured in bytes. */
259	HOST_WIDE_INT size;
260
261	/* The SYMBOL_REFs for each object. The vector is sorted in
262	order of increasing offset and the following conditions will
263	hold for each element X:
264
265	SYMBOL_REF_HAS_BLOCK_INFO_P (X)
266	!SYMBOL_REF_ANCHOR_P (X)
267	SYMBOL_REF_BLOCK (X) == [address of this structure]
268	SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
269	vec<rtx, va_gc> *objects;
270
271	/* All the anchor SYMBOL_REFs used to address these objects, sorted
272	in order of increasing offset, and then increasing TLS model.
273	The following conditions will hold for each element X in this vector:
274
275	SYMBOL_REF_HAS_BLOCK_INFO_P (X)
276	SYMBOL_REF_ANCHOR_P (X)
277	SYMBOL_REF_BLOCK (X) == [address of this structure]
278	SYMBOL_REF_BLOCK_OFFSET (X) >= 0. */
279	vec<rtx, va_gc> *anchors;
280	};
281
282	struct GTY((variable_size)) hwivec_def {
283	HOST_WIDE_INT elem[1];
284	};
285
286	/* Number of elements of the HWIVEC if RTX is a CONST_WIDE_INT. */
287	#define CWI_GET_NUM_ELEM(RTX) \
288	((int)RTL_FLAG_CHECK1("CWI_GET_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem)
289	#define CWI_PUT_NUM_ELEM(RTX, NUM) \
290	(RTL_FLAG_CHECK1("CWI_PUT_NUM_ELEM", (RTX), CONST_WIDE_INT)->u2.num_elem = (NUM))
291
292	struct GTY((variable_size)) const_poly_int_def {
293	trailing_wide_ints<NUM_POLY_INT_COEFFS> coeffs;
294	};
295
296	/* RTL expression ("rtx"). */
297
298	/* The GTY "desc" and "tag" options below are a kludge: we need a desc
299	field for gengtype to recognize that inheritance is occurring,
300	so that all subclasses are redirected to the traversal hook for the
301	base class.
302	However, all of the fields are in the base class, and special-casing
303	is at work. Hence we use desc and tag of 0, generating a switch
304	statement of the form:
305	switch (0)
306	{
307	case 0: // all the work happens here
308	}
309	in order to work with the existing special-casing in gengtype. */
310
311	struct GTY((desc("0"), tag("0"),
312	chain_next ("RTX_NEXT (&%h)"),
313	chain_prev ("RTX_PREV (&%h)"))) rtx_def {
314	/* The kind of value the expression has. */
315	ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
316
317	/* The kind of expression this is. */
318	ENUM_BITFIELD(rtx_code) code: RTX_CODE_BITSIZE;
319
320	/* 1 in a MEM if we should keep the alias set for this mem unchanged
321	when we access a component.
322	1 in a JUMP_INSN if it is a crossing jump.
323	1 in a CALL_INSN if it is a sibling call.
324	1 in a SET that is for a return.
325	In a CODE_LABEL, part of the two-bit alternate entry field.
326	1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.cc.
327	1 in a VALUE is SP_BASED_VALUE_P in cselib.cc.
328	1 in a SUBREG generated by LRA for reload insns.
329	1 in a REG if this is a static chain register.
330	Dumped as "/j" in RTL dumps. */
331	unsigned int jump : 1;
332	/* In a CODE_LABEL, part of the two-bit alternate entry field.
333	1 in a MEM if it cannot trap.
334	1 in a CALL_INSN logically equivalent to
335	ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P.
336	1 in a VALUE is SP_DERIVED_VALUE_P in cselib.cc.
337	Dumped as "/c" in RTL dumps. */
338	unsigned int call : 1;
339	/* 1 in a REG, MEM, or CONCAT if the value is set at most once, anywhere.
340	1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
341	1 in a SYMBOL_REF if it addresses something in the per-function
342	constants pool.
343	1 in a CALL_INSN logically equivalent to ECF_CONST and TREE_READONLY.
344	1 in a NOTE, or EXPR_LIST for a const call.
345	1 in a JUMP_INSN of an annulling branch.
346	1 in a CONCAT is VAL_EXPR_IS_CLOBBERED in var-tracking.cc.
347	1 in a preserved VALUE is PRESERVED_VALUE_P in cselib.cc.
348	1 in a clobber temporarily created for LRA.
349	Dumped as "/u" in RTL dumps. */
350	unsigned int unchanging : 1;
351	/* 1 in a MEM or ASM_OPERANDS expression if the memory reference is volatile.
352	1 in an INSN, CALL_INSN, JUMP_INSN, CODE_LABEL, BARRIER, or NOTE
353	if it has been deleted.
354	1 in a REG expression if corresponds to a variable declared by the user,
355	0 for an internally generated temporary.
356	1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
357	1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a
358	non-local label.
359	In a SYMBOL_REF, this flag is used for machine-specific purposes.
360	In a PREFETCH, this flag indicates that it should be considered a
361	scheduling barrier.
362	1 in a CONCAT is VAL_NEEDS_RESOLUTION in var-tracking.cc.
363	Dumped as "/v" in RTL dumps. */
364	unsigned int volatil : 1;
365	/* 1 in a REG if the register is used only in exit code a loop.
366	1 in a SUBREG expression if was generated from a variable with a
367	promoted mode.
368	1 in a CODE_LABEL if the label is used for nonlocal gotos
369	and must not be deleted even if its count is zero.
370	1 in an INSN, JUMP_INSN or CALL_INSN if this insn must be scheduled
371	together with the preceding insn. Valid only within sched.
372	1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and
373	from the target of a branch. Valid from reorg until end of compilation;
374	cleared before used.
375
376	The name of the field is historical. It used to be used in MEMs
377	to record whether the MEM accessed part of a structure.
378	Dumped as "/s" in RTL dumps. */
379	unsigned int in_struct : 1;
380	/* At the end of RTL generation, 1 if this rtx is used. This is used for
381	copying shared structure. See `unshare_all_rtl'.
382	In a REG, this is not needed for that purpose, and used instead
383	in `leaf_renumber_regs_insn'.
384	1 in a SYMBOL_REF, means that emit_library_call
385	has used it as the function.
386	1 in a CONCAT is VAL_HOLDS_TRACK_EXPR in var-tracking.cc.
387	1 in a VALUE or DEBUG_EXPR is VALUE_RECURSED_INTO in var-tracking.cc. */
388	unsigned int used : 1;
389	/* 1 in an INSN or a SET if this rtx is related to the call frame,
390	either changing how we compute the frame address or saving and
391	restoring registers in the prologue and epilogue.
392	1 in a REG or MEM if it is a pointer.
393	1 in a SYMBOL_REF if it addresses something in the per-function
394	constant string pool.
395	1 in a VALUE is VALUE_CHANGED in var-tracking.cc.
396	Dumped as "/f" in RTL dumps. */
397	unsigned frame_related : 1;
398	/* 1 in a REG or PARALLEL that is the current function's return value.
399	1 in a SYMBOL_REF for a weak symbol.
400	1 in a CALL_INSN logically equivalent to ECF_PURE and DECL_PURE_P.
401	1 in a CONCAT is VAL_EXPR_HAS_REVERSE in var-tracking.cc.
402	1 in a VALUE or DEBUG_EXPR is NO_LOC_P in var-tracking.cc.
403	Dumped as "/i" in RTL dumps. */
404	unsigned return_val : 1;
405
406	union {
407	/* The final union field is aligned to 64 bits on LP64 hosts,
408	giving a 32-bit gap after the fields above. We optimize the
409	layout for that case and use the gap for extra code-specific
410	information. */
411
412	/* The ORIGINAL_REGNO of a REG. */
413	unsigned int original_regno;
414
415	/* The INSN_UID of an RTX_INSN-class code. */
416	int insn_uid;
417
418	/* The SYMBOL_REF_FLAGS of a SYMBOL_REF. */
419	unsigned int symbol_ref_flags;
420
421	/* The PAT_VAR_LOCATION_STATUS of a VAR_LOCATION. */
422	enum var_init_status var_location_status;
423
424	/* In a CONST_WIDE_INT (aka hwivec_def), this is the number of
425	HOST_WIDE_INTs in the hwivec_def. */
426	unsigned int num_elem;
427
428	/* Information about a CONST_VECTOR. */
429	struct
430	{
431	/* The value of CONST_VECTOR_NPATTERNS. */
432	unsigned int npatterns : 16;
433
434	/* The value of CONST_VECTOR_NELTS_PER_PATTERN. */
435	unsigned int nelts_per_pattern : 8;
436
437	/* For future expansion. */
438	unsigned int unused : 8;
439	} const_vector;
440	} GTY ((skip)) u2;
441
442	/* The first element of the operands of this rtx.
443	The number of operands and their types are controlled
444	by the `code' field, according to rtl.def. */
445	union u {
446	rtunion fld[1];
447	HOST_WIDE_INT hwint[1];
448	struct reg_info reg;
449	struct block_symbol block_sym;
450	struct real_value rv;
451	struct fixed_value fv;
452	struct hwivec_def hwiv;
453	struct const_poly_int_def cpi;
454	} GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
455	};
456
457	/* A node for constructing singly-linked lists of rtx. */
458
459	struct GTY(()) rtx_expr_list : public rtx_def
460	{
461	private:
462	/* No extra fields, but adds invariant: (GET_CODE (X) == EXPR_LIST). */
463
464	public:
465	/* Get next in list. */
466	rtx_expr_list *next () const;
467
468	/* Get at the underlying rtx. */
469	rtx element () const;
470	};
471
472	template <>
473	template <>
474	inline bool
475	is_a_helper <rtx_expr_list *>::test (rtx rt)
476	{
477	return rt->code == EXPR_LIST;
478	}
479
480	struct GTY(()) rtx_insn_list : public rtx_def
481	{
482	private:
483	/* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
484
485	This is an instance of:
486
487	DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
488
489	i.e. a node for constructing singly-linked lists of rtx_insn *, where
490	the list is "external" to the insn (as opposed to the doubly-linked
491	list embedded within rtx_insn itself). */
492
493	public:
494	/* Get next in list. */
495	rtx_insn_list *next () const;
496
497	/* Get at the underlying instruction. */
498	rtx_insn *insn () const;
499
500	};
501
502	template <>
503	template <>
504	inline bool
505	is_a_helper <rtx_insn_list *>::test (rtx rt)
506	{
507	return rt->code == INSN_LIST;
508	}
509
510	/* A node with invariant GET_CODE (X) == SEQUENCE i.e. a vector of rtx,
511	typically (but not always) of rtx_insn *, used in the late passes. */
512
513	struct GTY(()) rtx_sequence : public rtx_def
514	{
515	private:
516	/* No extra fields, but adds invariant: (GET_CODE (X) == SEQUENCE). */
517
518	public:
519	/* Get number of elements in sequence. */
520	int len () const;
521
522	/* Get i-th element of the sequence. */
523	rtx element (int index) const;
524
525	/* Get i-th element of the sequence, with a checked cast to
526	rtx_insn *. */
527	rtx_insn *insn (int index) const;
528	};
529
530	template <>
531	template <>
532	inline bool
533	is_a_helper <rtx_sequence *>::test (rtx rt)
534	{
535	return rt->code == SEQUENCE;
536	}
537
538	template <>
539	template <>
540	inline bool
541	is_a_helper <const rtx_sequence *>::test (const_rtx rt)
542	{
543	return rt->code == SEQUENCE;
544	}
545
546	struct GTY(()) rtx_insn : public rtx_def
547	{
548	public:
549	/* No extra fields, but adds the invariant:
550
551	(INSN_P (X)
552	|| NOTE_P (X)
553	|| JUMP_TABLE_DATA_P (X)
554	|| BARRIER_P (X)
555	|| LABEL_P (X))
556
557	i.e. that we must be able to use the following:
558	INSN_UID ()
559	NEXT_INSN ()
560	PREV_INSN ()
561	i.e. we have an rtx that has an INSN_UID field and can be part of
562	a linked list of insns.
563	*/
564
565	/* Returns true if this insn has been deleted. */
566
567	bool deleted () const { return volatil; }
568
569	/* Mark this insn as deleted. */
570
571	void set_deleted () { volatil = true; }
572
573	/* Mark this insn as not deleted. */
574
575	void set_undeleted () { volatil = false; }
576	};
577
578	/* Subclasses of rtx_insn. */
579
580	struct GTY(()) rtx_debug_insn : public rtx_insn
581	{
582	/* No extra fields, but adds the invariant:
583	DEBUG_INSN_P (X) aka (GET_CODE (X) == DEBUG_INSN)
584	i.e. an annotation for tracking variable assignments.
585
586	This is an instance of:
587	DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
588	from rtl.def. */
589	};
590
591	struct GTY(()) rtx_nonjump_insn : public rtx_insn
592	{
593	/* No extra fields, but adds the invariant:
594	NONJUMP_INSN_P (X) aka (GET_CODE (X) == INSN)
595	i.e an instruction that cannot jump.
596
597	This is an instance of:
598	DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
599	from rtl.def. */
600	};
601
602	struct GTY(()) rtx_jump_insn : public rtx_insn
603	{
604	public:
605	/* No extra fields, but adds the invariant:
606	JUMP_P (X) aka (GET_CODE (X) == JUMP_INSN)
607	i.e. an instruction that can possibly jump.
608
609	This is an instance of:
610	DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
611	from rtl.def. */
612
613	/* Returns jump target of this instruction. The returned value is not
614	necessarily a code label: it may also be a RETURN or SIMPLE_RETURN
615	expression. Also, when the code label is marked "deleted", it is
616	replaced by a NOTE. In some cases the value is NULL_RTX. */
617
618	inline rtx jump_label () const;
619
620	/* Returns jump target cast to rtx_code_label *. */
621
622	inline rtx_code_label *jump_target () const;
623
624	/* Set jump target. */
625
626	inline void set_jump_target (rtx_code_label *);
627	};
628
629	struct GTY(()) rtx_call_insn : public rtx_insn
630	{
631	/* No extra fields, but adds the invariant:
632	CALL_P (X) aka (GET_CODE (X) == CALL_INSN)
633	i.e. an instruction that can possibly call a subroutine
634	but which will not change which instruction comes next
635	in the current function.
636
637	This is an instance of:
638	DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
639	from rtl.def. */
640	};
641
642	struct GTY(()) rtx_jump_table_data : public rtx_insn
643	{
644	/* No extra fields, but adds the invariant:
645	JUMP_TABLE_DATA_P (X) aka (GET_CODE (INSN) == JUMP_TABLE_DATA)
646	i.e. a data for a jump table, considered an instruction for
647	historical reasons.
648
649	This is an instance of:
650	DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
651	from rtl.def. */
652
653	/* This can be either:
654
655	(a) a table of absolute jumps, in which case PATTERN (this) is an
656	ADDR_VEC with arg 0 a vector of labels, or
657
658	(b) a table of relative jumps (e.g. for -fPIC), in which case
659	PATTERN (this) is an ADDR_DIFF_VEC, with arg 0 a LABEL_REF and
660	arg 1 the vector of labels.
661
662	This method gets the underlying vec. */
663
664	inline rtvec get_labels () const;
665	inline scalar_int_mode get_data_mode () const;
666	};
667
668	struct GTY(()) rtx_barrier : public rtx_insn
669	{
670	/* No extra fields, but adds the invariant:
671	BARRIER_P (X) aka (GET_CODE (X) == BARRIER)
672	i.e. a marker that indicates that control will not flow through.
673
674	This is an instance of:
675	DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
676	from rtl.def. */
677	};
678
679	struct GTY(()) rtx_code_label : public rtx_insn
680	{
681	/* No extra fields, but adds the invariant:
682	LABEL_P (X) aka (GET_CODE (X) == CODE_LABEL)
683	i.e. a label in the assembler.
684
685	This is an instance of:
686	DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
687	from rtl.def. */
688	};
689
690	struct GTY(()) rtx_note : public rtx_insn
691	{
692	/* No extra fields, but adds the invariant:
693	NOTE_P(X) aka (GET_CODE (X) == NOTE)
694	i.e. a note about the corresponding source code.
695
696	This is an instance of:
697	DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
698	from rtl.def. */
699	};
700
701	/* The size in bytes of an rtx header (code, mode and flags). */
702	#define RTX_HDR_SIZE offsetof (struct rtx_def, u)
703
704	/* The size in bytes of an rtx with code CODE. */
705	#define RTX_CODE_SIZE(CODE) rtx_code_size[CODE]
706
707	#define NULL_RTX (rtx) 0
708
709	/* The "next" and "previous" RTX, relative to this one. */
710
711	#define RTX_NEXT(X) (rtx_next[GET_CODE (X)] == 0 ? NULL \
712	: *(rtx *)(((char *)X) + rtx_next[GET_CODE (X)]))
713
714	/* FIXME: the "NEXT_INSN (PREV_INSN (X)) == X" condition shouldn't be needed.
715	*/
716	#define RTX_PREV(X) ((INSN_P (X) \
717	|| NOTE_P (X) \
718	|| JUMP_TABLE_DATA_P (X) \
719	|| BARRIER_P (X) \
720	|| LABEL_P (X)) \
721	&& PREV_INSN (as_a <rtx_insn *> (X)) != NULL \
722	&& NEXT_INSN (PREV_INSN (as_a <rtx_insn *> (X))) == X \
723	? PREV_INSN (as_a <rtx_insn *> (X)) : NULL)
724
725	/* Define macros to access the `code' field of the rtx. */
726
727	#define GET_CODE(RTX) ((enum rtx_code) (RTX)->code)
728	#define PUT_CODE(RTX, CODE) ((RTX)->code = (CODE))
729
730	#define GET_MODE(RTX) ((machine_mode) (RTX)->mode)
731	#define PUT_MODE_RAW(RTX, MODE) ((RTX)->mode = (MODE))
732
733	/* RTL vector. These appear inside RTX's when there is a need
734	for a variable number of things. The principle use is inside
735	PARALLEL expressions. */
736
737	struct GTY(()) rtvec_def {
738	int num_elem; /* number of elements */
739	rtx GTY ((length ("%h.num_elem"))) elem[1];
740	};
741
742	#define NULL_RTVEC (rtvec) 0
743
744	#define GET_NUM_ELEM(RTVEC) ((RTVEC)->num_elem)
745	#define PUT_NUM_ELEM(RTVEC, NUM) ((RTVEC)->num_elem = (NUM))
746
747	/* Predicate yielding nonzero iff X is an rtx for a register. */
748	#define REG_P(X) (GET_CODE (X) == REG)
749
750	/* Predicate yielding nonzero iff X is an rtx for a memory location. */
751	#define MEM_P(X) (GET_CODE (X) == MEM)
752
753	#if TARGET_SUPPORTS_WIDE_INT
754
755	/* Match CONST_*s that can represent compile-time constant integers. */
756	#define CASE_CONST_SCALAR_INT \
757	case CONST_INT: \
758	case CONST_WIDE_INT
759
760	/* Match CONST_*s for which pointer equality corresponds to value
761	equality. */
762	#define CASE_CONST_UNIQUE \
763	case CONST_INT: \
764	case CONST_WIDE_INT: \
765	case CONST_POLY_INT: \
766	case CONST_DOUBLE: \
767	case CONST_FIXED
768
769	/* Match all CONST_* rtxes. */
770	#define CASE_CONST_ANY \
771	case CONST_INT: \
772	case CONST_WIDE_INT: \
773	case CONST_POLY_INT: \
774	case CONST_DOUBLE: \
775	case CONST_FIXED: \
776	case CONST_VECTOR
777
778	#else
779
780	/* Match CONST_*s that can represent compile-time constant integers. */
781	#define CASE_CONST_SCALAR_INT \
782	case CONST_INT: \
783	case CONST_DOUBLE
784
785	/* Match CONST_*s for which pointer equality corresponds to value
786	equality. */
787	#define CASE_CONST_UNIQUE \
788	case CONST_INT: \
789	case CONST_DOUBLE: \
790	case CONST_FIXED
791
792	/* Match all CONST_* rtxes. */
793	#define CASE_CONST_ANY \
794	case CONST_INT: \
795	case CONST_DOUBLE: \
796	case CONST_FIXED: \
797	case CONST_VECTOR
798	#endif
799
800	/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
801	#define CONST_INT_P(X) (GET_CODE (X) == CONST_INT)
802
803	/* Predicate yielding nonzero iff X is an rtx for a constant integer. */
804	#define CONST_WIDE_INT_P(X) (GET_CODE (X) == CONST_WIDE_INT)
805
806	/* Predicate yielding nonzero iff X is an rtx for a polynomial constant
807	integer. */
808	#define CONST_POLY_INT_P(X) \
809	(NUM_POLY_INT_COEFFS > 1 && GET_CODE (X) == CONST_POLY_INT)
810
811	/* Predicate yielding nonzero iff X is an rtx for a constant fixed-point. */
812	#define CONST_FIXED_P(X) (GET_CODE (X) == CONST_FIXED)
813
814	/* Predicate yielding true iff X is an rtx for a double-int
815	or floating point constant. */
816	#define CONST_DOUBLE_P(X) (GET_CODE (X) == CONST_DOUBLE)
817
818	/* Predicate yielding true iff X is an rtx for a double-int. */
819	#define CONST_DOUBLE_AS_INT_P(X) \
820	(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == VOIDmode)
821
822	/* Predicate yielding true iff X is an rtx for a integer const. */
823	#if TARGET_SUPPORTS_WIDE_INT
824	#define CONST_SCALAR_INT_P(X) \
825	(CONST_INT_P (X) || CONST_WIDE_INT_P (X))
826	#else
827	#define CONST_SCALAR_INT_P(X) \
828	(CONST_INT_P (X) || CONST_DOUBLE_AS_INT_P (X))
829	#endif
830
831	/* Predicate yielding true iff X is an rtx for a double-int. */
832	#define CONST_DOUBLE_AS_FLOAT_P(X) \
833	(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode)
834
835	/* Predicate yielding nonzero iff X is an rtx for a constant vector. */
836	#define CONST_VECTOR_P(X) (GET_CODE (X) == CONST_VECTOR)
837
838	/* Predicate yielding nonzero iff X is a label insn. */
839	#define LABEL_P(X) (GET_CODE (X) == CODE_LABEL)
840
841	/* Predicate yielding nonzero iff X is a jump insn. */
842	#define JUMP_P(X) (GET_CODE (X) == JUMP_INSN)
843
844	/* Predicate yielding nonzero iff X is a call insn. */
845	#define CALL_P(X) (GET_CODE (X) == CALL_INSN)
846
847	/* 1 if RTX is a call_insn for a fake call.
848	CALL_INSN use "used" flag to indicate it's a fake call. */
849	#define FAKE_CALL_P(RTX) \
850	(RTL_FLAG_CHECK1 ("FAKE_CALL_P", (RTX), CALL_INSN)->used)
851
852	/* Predicate yielding nonzero iff X is an insn that cannot jump. */
853	#define NONJUMP_INSN_P(X) (GET_CODE (X) == INSN)
854
855	/* Predicate yielding nonzero iff X is a debug note/insn. */
856	#define DEBUG_INSN_P(X) (GET_CODE (X) == DEBUG_INSN)
857
858	/* Predicate yielding nonzero iff X is an insn that is not a debug insn. */
859	#define NONDEBUG_INSN_P(X) (NONJUMP_INSN_P (X) || JUMP_P (X) || CALL_P (X))
860
861	/* Nonzero if DEBUG_MARKER_INSN_P may possibly hold. */
862	#define MAY_HAVE_DEBUG_MARKER_INSNS debug_nonbind_markers_p
863	/* Nonzero if DEBUG_BIND_INSN_P may possibly hold. */
864	#define MAY_HAVE_DEBUG_BIND_INSNS flag_var_tracking_assignments
865	/* Nonzero if DEBUG_INSN_P may possibly hold. */
866	#define MAY_HAVE_DEBUG_INSNS \
867	(MAY_HAVE_DEBUG_MARKER_INSNS || MAY_HAVE_DEBUG_BIND_INSNS)
868
869	/* Predicate yielding nonzero iff X is a real insn. */
870	#define INSN_P(X) (NONDEBUG_INSN_P (X) || DEBUG_INSN_P (X))
871
872	/* Predicate yielding nonzero iff X is a note insn. */
873	#define NOTE_P(X) (GET_CODE (X) == NOTE)
874
875	/* Predicate yielding nonzero iff X is a barrier insn. */
876	#define BARRIER_P(X) (GET_CODE (X) == BARRIER)
877
878	/* Predicate yielding nonzero iff X is a data for a jump table. */
879	#define JUMP_TABLE_DATA_P(INSN) (GET_CODE (INSN) == JUMP_TABLE_DATA)
880
881	/* Predicate yielding nonzero iff RTX is a subreg. */
882	#define SUBREG_P(RTX) (GET_CODE (RTX) == SUBREG)
883
884	/* Predicate yielding true iff RTX is a symbol ref. */
885	#define SYMBOL_REF_P(RTX) (GET_CODE (RTX) == SYMBOL_REF)
886
887	template <>
888	template <>
889	inline bool
890	is_a_helper <rtx_insn *>::test (rtx rt)
891	{
892	return (INSN_P (rt)
893	|| NOTE_P (rt)
894	|| JUMP_TABLE_DATA_P (rt)
895	|| BARRIER_P (rt)
896	|| LABEL_P (rt));
897	}
898
899	template <>
900	template <>
901	inline bool
902	is_a_helper <const rtx_insn *>::test (const_rtx rt)
903	{
904	return (INSN_P (rt)
905	|| NOTE_P (rt)
906	|| JUMP_TABLE_DATA_P (rt)
907	|| BARRIER_P (rt)
908	|| LABEL_P (rt));
909	}
910
911	template <>
912	template <>
913	inline bool
914	is_a_helper <rtx_debug_insn *>::test (rtx rt)
915	{
916	return DEBUG_INSN_P (rt);
917	}
918
919	template <>
920	template <>
921	inline bool
922	is_a_helper <rtx_nonjump_insn *>::test (rtx rt)
923	{
924	return NONJUMP_INSN_P (rt);
925	}
926
927	template <>
928	template <>
929	inline bool
930	is_a_helper <rtx_jump_insn *>::test (rtx rt)
931	{
932	return JUMP_P (rt);
933	}
934
935	template <>
936	template <>
937	inline bool
938	is_a_helper <rtx_jump_insn *>::test (rtx_insn *insn)
939	{
940	return JUMP_P (insn);
941	}
942
943	template <>
944	template <>
945	inline bool
946	is_a_helper <rtx_call_insn *>::test (rtx rt)
947	{
948	return CALL_P (rt);
949	}
950
951	template <>
952	template <>
953	inline bool
954	is_a_helper <rtx_call_insn *>::test (rtx_insn *insn)
955	{
956	return CALL_P (insn);
957	}
958
959	template <>
960	template <>
961	inline bool
962	is_a_helper <rtx_jump_table_data *>::test (rtx rt)
963	{
964	return JUMP_TABLE_DATA_P (rt);
965	}
966
967	template <>
968	template <>
969	inline bool
970	is_a_helper <rtx_jump_table_data *>::test (rtx_insn *insn)
971	{
972	return JUMP_TABLE_DATA_P (insn);
973	}
974
975	template <>
976	template <>
977	inline bool
978	is_a_helper <rtx_barrier *>::test (rtx rt)
979	{
980	return BARRIER_P (rt);
981	}
982
983	template <>
984	template <>
985	inline bool
986	is_a_helper <rtx_code_label *>::test (rtx rt)
987	{
988	return LABEL_P (rt);
989	}
990
991	template <>
992	template <>
993	inline bool
994	is_a_helper <rtx_code_label *>::test (rtx_insn *insn)
995	{
996	return LABEL_P (insn);
997	}
998
999	template <>
1000	template <>
1001	inline bool
1002	is_a_helper <rtx_note *>::test (rtx rt)
1003	{
1004	return NOTE_P (rt);
1005	}
1006
1007	template <>
1008	template <>
1009	inline bool
1010	is_a_helper <rtx_note *>::test (rtx_insn *insn)
1011	{
1012	return NOTE_P (insn);
1013	}
1014
1015	/* Predicate yielding nonzero iff X is a return or simple_return. */
1016	#define ANY_RETURN_P(X) \
1017	(GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
1018
1019	/* 1 if X is a unary operator. */
1020
1021	#define UNARY_P(X) \
1022	(GET_RTX_CLASS (GET_CODE (X)) == RTX_UNARY)
1023
1024	/* 1 if X is a binary operator. */
1025
1026	#define BINARY_P(X) \
1027	((GET_RTX_CLASS (GET_CODE (X)) & RTX_BINARY_MASK) == RTX_BINARY_RESULT)
1028
1029	/* 1 if X is an arithmetic operator. */
1030
1031	#define ARITHMETIC_P(X) \
1032	((GET_RTX_CLASS (GET_CODE (X)) & RTX_ARITHMETIC_MASK) \
1033	== RTX_ARITHMETIC_RESULT)
1034
1035	/* 1 if X is an arithmetic operator. */
1036
1037	#define COMMUTATIVE_ARITH_P(X) \
1038	(GET_RTX_CLASS (GET_CODE (X)) == RTX_COMM_ARITH)
1039
1040	/* 1 if X is a commutative arithmetic operator or a comparison operator.
1041	These two are sometimes selected together because it is possible to
1042	swap the two operands. */
1043
1044	#define SWAPPABLE_OPERANDS_P(X) \
1045	((1 << GET_RTX_CLASS (GET_CODE (X))) \
1046	& ((1 << RTX_COMM_ARITH) | (1 << RTX_COMM_COMPARE) \
1047	| (1 << RTX_COMPARE)))
1048
1049	/* 1 if X is a non-commutative operator. */
1050
1051	#define NON_COMMUTATIVE_P(X) \
1052	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
1053	== RTX_NON_COMMUTATIVE_RESULT)
1054
1055	/* 1 if X is a commutative operator on integers. */
1056
1057	#define COMMUTATIVE_P(X) \
1058	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
1059	== RTX_COMMUTATIVE_RESULT)
1060
1061	/* 1 if X is a relational operator. */
1062
1063	#define COMPARISON_P(X) \
1064	((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMPARE_MASK) == RTX_COMPARE_RESULT)
1065
1066	/* 1 if X is a constant value that is an integer. */
1067
1068	#define CONSTANT_P(X) \
1069	(GET_RTX_CLASS (GET_CODE (X)) == RTX_CONST_OBJ)
1070
1071	/* 1 if X is a LABEL_REF. */
1072	#define LABEL_REF_P(X) \
1073	(GET_CODE (X) == LABEL_REF)
1074
1075	/* 1 if X can be used to represent an object. */
1076	#define OBJECT_P(X) \
1077	((GET_RTX_CLASS (GET_CODE (X)) & RTX_OBJ_MASK) == RTX_OBJ_RESULT)
1078
1079	/* General accessor macros for accessing the fields of an rtx. */
1080
1081	#if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007)
1082	/* The bit with a star outside the statement expr and an & inside is
1083	so that N can be evaluated only once. */
1084	#define RTL_CHECK1(RTX, N, C1) __extension__ \
1085	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1086	const enum rtx_code _code = GET_CODE (_rtx); \
1087	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1088	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1089	__FUNCTION__); \
1090	if (GET_RTX_FORMAT (_code)[_n] != C1) \
1091	rtl_check_failed_type1 (_rtx, _n, C1, __FILE__, __LINE__, \
1092	__FUNCTION__); \
1093	&_rtx->u.fld[_n]; }))
1094
1095	#define RTL_CHECK2(RTX, N, C1, C2) __extension__ \
1096	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1097	const enum rtx_code _code = GET_CODE (_rtx); \
1098	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1099	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1100	__FUNCTION__); \
1101	if (GET_RTX_FORMAT (_code)[_n] != C1 \
1102	&& GET_RTX_FORMAT (_code)[_n] != C2) \
1103	rtl_check_failed_type2 (_rtx, _n, C1, C2, __FILE__, __LINE__, \
1104	__FUNCTION__); \
1105	&_rtx->u.fld[_n]; }))
1106
1107	#define RTL_CHECKC1(RTX, N, C) __extension__ \
1108	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1109	if (GET_CODE (_rtx) != (C)) \
1110	rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
1111	__FUNCTION__); \
1112	&_rtx->u.fld[_n]; }))
1113
1114	#define RTL_CHECKC2(RTX, N, C1, C2) __extension__ \
1115	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1116	const enum rtx_code _code = GET_CODE (_rtx); \
1117	if (_code != (C1) && _code != (C2)) \
1118	rtl_check_failed_code2 (_rtx, (C1), (C2), __FILE__, __LINE__, \
1119	__FUNCTION__); \
1120	&_rtx->u.fld[_n]; }))
1121
1122	#define RTL_CHECKC3(RTX, N, C1, C2, C3) __extension__ \
1123	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1124	const enum rtx_code _code = GET_CODE (_rtx); \
1125	if (_code != (C1) && _code != (C2) && _code != (C3)) \
1126	rtl_check_failed_code3 (_rtx, (C1), (C2), (C3), __FILE__, \
1127	__LINE__, __FUNCTION__); \
1128	&_rtx->u.fld[_n]; }))
1129
1130	#define RTVEC_ELT(RTVEC, I) __extension__ \
1131	(*({ __typeof (RTVEC) const _rtvec = (RTVEC); const int _i = (I); \
1132	if (_i < 0 || _i >= GET_NUM_ELEM (_rtvec)) \
1133	rtvec_check_failed_bounds (_rtvec, _i, __FILE__, __LINE__, \
1134	__FUNCTION__); \
1135	&_rtvec->elem[_i]; }))
1136
1137	#define XWINT(RTX, N) __extension__ \
1138	(*({ __typeof (RTX) const _rtx = (RTX); const int _n = (N); \
1139	const enum rtx_code _code = GET_CODE (_rtx); \
1140	if (_n < 0 || _n >= GET_RTX_LENGTH (_code)) \
1141	rtl_check_failed_bounds (_rtx, _n, __FILE__, __LINE__, \
1142	__FUNCTION__); \
1143	if (GET_RTX_FORMAT (_code)[_n] != 'w') \
1144	rtl_check_failed_type1 (_rtx, _n, 'w', __FILE__, __LINE__, \
1145	__FUNCTION__); \
1146	&_rtx->u.hwint[_n]; }))
1147
1148	#define CWI_ELT(RTX, I) __extension__ \
1149	(*({ __typeof (RTX) const _cwi = (RTX); \
1150	int _max = CWI_GET_NUM_ELEM (_cwi); \
1151	const int _i = (I); \
1152	if (_i < 0 || _i >= _max) \
1153	cwi_check_failed_bounds (_cwi, _i, __FILE__, __LINE__, \
1154	__FUNCTION__); \
1155	&_cwi->u.hwiv.elem[_i]; }))
1156
1157	#define XCWINT(RTX, N, C) __extension__ \
1158	(*({ __typeof (RTX) const _rtx = (RTX); \
1159	if (GET_CODE (_rtx) != (C)) \
1160	rtl_check_failed_code1 (_rtx, (C), __FILE__, __LINE__, \
1161	__FUNCTION__); \
1162	&_rtx->u.hwint[N]; }))
1163
1164	#define XCMWINT(RTX, N, C, M) __extension__ \
1165	(*({ __typeof (RTX) const _rtx = (RTX); \
1166	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) != (M)) \
1167	rtl_check_failed_code_mode (_rtx, (C), (M), false, __FILE__, \
1168	__LINE__, __FUNCTION__); \
1169	&_rtx->u.hwint[N]; }))
1170
1171	#define XCNMPRV(RTX, C, M) __extension__ \
1172	({ __typeof (RTX) const _rtx = (RTX); \
1173	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
1174	rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
1175	__LINE__, __FUNCTION__); \
1176	&_rtx->u.rv; })
1177
1178	#define XCNMPFV(RTX, C, M) __extension__ \
1179	({ __typeof (RTX) const _rtx = (RTX); \
1180	if (GET_CODE (_rtx) != (C) || GET_MODE (_rtx) == (M)) \
1181	rtl_check_failed_code_mode (_rtx, (C), (M), true, __FILE__, \
1182	__LINE__, __FUNCTION__); \
1183	&_rtx->u.fv; })
1184
1185	#define REG_CHECK(RTX) __extension__ \
1186	({ __typeof (RTX) const _rtx = (RTX); \
1187	if (GET_CODE (_rtx) != REG) \
1188	rtl_check_failed_code1 (_rtx, REG, __FILE__, __LINE__, \
1189	__FUNCTION__); \
1190	&_rtx->u.reg; })
1191
1192	#define BLOCK_SYMBOL_CHECK(RTX) __extension__ \
1193	({ __typeof (RTX) const _symbol = (RTX); \
1194	const unsigned int flags = SYMBOL_REF_FLAGS (_symbol); \
1195	if ((flags & SYMBOL_FLAG_HAS_BLOCK_INFO) == 0) \
1196	rtl_check_failed_block_symbol (__FILE__, __LINE__, \
1197	__FUNCTION__); \
1198	&_symbol->u.block_sym; })
1199
1200	#define HWIVEC_CHECK(RTX,C) __extension__ \
1201	({ __typeof (RTX) const _symbol = (RTX); \
1202	RTL_CHECKC1 (_symbol, 0, C); \
1203	&_symbol->u.hwiv; })
1204
1205	extern void rtl_check_failed_bounds (const_rtx, int, const char *, int,
1206	const char *)
1207	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1208	extern void rtl_check_failed_type1 (const_rtx, int, int, const char *, int,
1209	const char *)
1210	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1211	extern void rtl_check_failed_type2 (const_rtx, int, int, int, const char *,
1212	int, const char *)
1213	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1214	extern void rtl_check_failed_code1 (const_rtx, enum rtx_code, const char *,
1215	int, const char *)
1216	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1217	extern void rtl_check_failed_code2 (const_rtx, enum rtx_code, enum rtx_code,
1218	const char *, int, const char *)
1219	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1220	extern void rtl_check_failed_code3 (const_rtx, enum rtx_code, enum rtx_code,
1221	enum rtx_code, const char *, int,
1222	const char *)
1223	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1224	extern void rtl_check_failed_code_mode (const_rtx, enum rtx_code, machine_mode,
1225	bool, const char *, int, const char *)
1226	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1227	extern void rtl_check_failed_block_symbol (const char *, int, const char *)
1228	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1229	extern void cwi_check_failed_bounds (const_rtx, int, const char *, int,
1230	const char *)
1231	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1232	extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
1233	const char *)
1234	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
1235
1236	#else /* not ENABLE_RTL_CHECKING */
1237
1238	#define RTL_CHECK1(RTX, N, C1) ((RTX)->u.fld[N])
1239	#define RTL_CHECK2(RTX, N, C1, C2) ((RTX)->u.fld[N])
1240	#define RTL_CHECKC1(RTX, N, C) ((RTX)->u.fld[N])
1241	#define RTL_CHECKC2(RTX, N, C1, C2) ((RTX)->u.fld[N])
1242	#define RTL_CHECKC3(RTX, N, C1, C2, C3) ((RTX)->u.fld[N])
1243	#define RTVEC_ELT(RTVEC, I) ((RTVEC)->elem[I])
1244	#define XWINT(RTX, N) ((RTX)->u.hwint[N])
1245	#define CWI_ELT(RTX, I) ((RTX)->u.hwiv.elem[I])
1246	#define XCWINT(RTX, N, C) ((RTX)->u.hwint[N])
1247	#define XCMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
1248	#define XCNMWINT(RTX, N, C, M) ((RTX)->u.hwint[N])
1249	#define XCNMPRV(RTX, C, M) (&(RTX)->u.rv)
1250	#define XCNMPFV(RTX, C, M) (&(RTX)->u.fv)
1251	#define REG_CHECK(RTX) (&(RTX)->u.reg)
1252	#define BLOCK_SYMBOL_CHECK(RTX) (&(RTX)->u.block_sym)
1253	#define HWIVEC_CHECK(RTX,C) (&(RTX)->u.hwiv)
1254
1255	#endif
1256
1257	/* General accessor macros for accessing the flags of an rtx. */
1258
1259	/* Access an individual rtx flag, with no checking of any kind. */
1260	#define RTX_FLAG(RTX, FLAG) ((RTX)->FLAG)
1261
1262	#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION >= 2007)
1263	#define RTL_FLAG_CHECK1(NAME, RTX, C1) __extension__ \
1264	({ __typeof (RTX) const _rtx = (RTX); \
1265	if (GET_CODE (_rtx) != C1) \
1266	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1267	__FUNCTION__); \
1268	_rtx; })
1269
1270	#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) __extension__ \
1271	({ __typeof (RTX) const _rtx = (RTX); \
1272	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2) \
1273	rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
1274	__FUNCTION__); \
1275	_rtx; })
1276
1277	#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) __extension__ \
1278	({ __typeof (RTX) const _rtx = (RTX); \
1279	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \
1280	&& GET_CODE (_rtx) != C3) \
1281	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1282	__FUNCTION__); \
1283	_rtx; })
1284
1285	#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) __extension__ \
1286	({ __typeof (RTX) const _rtx = (RTX); \
1287	if (GET_CODE (_rtx) != C1 && GET_CODE(_rtx) != C2 \
1288	&& GET_CODE (_rtx) != C3 && GET_CODE(_rtx) != C4) \
1289	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1290	__FUNCTION__); \
1291	_rtx; })
1292
1293	#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) __extension__ \
1294	({ __typeof (RTX) const _rtx = (RTX); \
1295	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1296	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1297	&& GET_CODE (_rtx) != C5) \
1298	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1299	__FUNCTION__); \
1300	_rtx; })
1301
1302	#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) \
1303	__extension__ \
1304	({ __typeof (RTX) const _rtx = (RTX); \
1305	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1306	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1307	&& GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6) \
1308	rtl_check_failed_flag (NAME,_rtx, __FILE__, __LINE__, \
1309	__FUNCTION__); \
1310	_rtx; })
1311
1312	#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) \
1313	__extension__ \
1314	({ __typeof (RTX) const _rtx = (RTX); \
1315	if (GET_CODE (_rtx) != C1 && GET_CODE (_rtx) != C2 \
1316	&& GET_CODE (_rtx) != C3 && GET_CODE (_rtx) != C4 \
1317	&& GET_CODE (_rtx) != C5 && GET_CODE (_rtx) != C6 \
1318	&& GET_CODE (_rtx) != C7) \
1319	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1320	__FUNCTION__); \
1321	_rtx; })
1322
1323	#define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) \
1324	__extension__ \
1325	({ __typeof (RTX) const _rtx = (RTX); \
1326	if (!INSN_CHAIN_CODE_P (GET_CODE (_rtx))) \
1327	rtl_check_failed_flag (NAME, _rtx, __FILE__, __LINE__, \
1328	__FUNCTION__); \
1329	_rtx; })
1330
1331	extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
1332	int, const char *)
1333	ATTRIBUTE_NORETURN ATTRIBUTE_COLD
1334	;
1335
1336	#else /* not ENABLE_RTL_FLAG_CHECKING */
1337
1338	#define RTL_FLAG_CHECK1(NAME, RTX, C1) (RTX)
1339	#define RTL_FLAG_CHECK2(NAME, RTX, C1, C2) (RTX)
1340	#define RTL_FLAG_CHECK3(NAME, RTX, C1, C2, C3) (RTX)
1341	#define RTL_FLAG_CHECK4(NAME, RTX, C1, C2, C3, C4) (RTX)
1342	#define RTL_FLAG_CHECK5(NAME, RTX, C1, C2, C3, C4, C5) (RTX)
1343	#define RTL_FLAG_CHECK6(NAME, RTX, C1, C2, C3, C4, C5, C6) (RTX)
1344	#define RTL_FLAG_CHECK7(NAME, RTX, C1, C2, C3, C4, C5, C6, C7) (RTX)
1345	#define RTL_INSN_CHAIN_FLAG_CHECK(NAME, RTX) (RTX)
1346	#endif
1347
1348	#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
1349	#define XUINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_uint)
1350	#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
1351	#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
1352	#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
1353	#define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type)
1354	#define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree)
1355	#define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb)
1356	#define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str)
1357	#define XCFI(RTX, N) (RTL_CHECK1 (RTX, N, 'C').rt_cfi)
1358
1359	#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
1360	#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
1361
1362	/* These are like XINT, etc. except that they expect a '0' field instead
1363	of the normal type code. */
1364
1365	#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
1366	#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
1367	#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
1368	#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
1369	#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
1370	#define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type)
1371	#define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree)
1372	#define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb)
1373	#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
1374	#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
1375	#define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
1376	#define X0CONSTANT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_constant)
1377
1378	/* Access a '0' field with any type. */
1379	#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
1380
1381	#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
1382	#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
1383	#define XCSUBREG(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_subreg)
1384	#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
1385	#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
1386	#define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec)
1387	#define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type)
1388	#define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree)
1389	#define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb)
1390	#define XCCFI(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cfi)
1391	#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
1392
1393	#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
1394	#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
1395
1396	#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
1397	#define XC3EXP(RTX, N, C1, C2, C3) (RTL_CHECKC3 (RTX, N, C1, C2, C3).rt_rtx)
1398
1399
1400	/* Methods of rtx_expr_list. */
1401
1402	inline rtx_expr_list *rtx_expr_list::next () const
1403	{
1404	rtx tmp = XEXP (this, 1);
1405	return safe_as_a <rtx_expr_list *> (p: tmp);
1406	}
1407
1408	inline rtx rtx_expr_list::element () const
1409	{
1410	return XEXP (this, 0);
1411	}
1412
1413	/* Methods of rtx_insn_list. */
1414
1415	inline rtx_insn_list *rtx_insn_list::next () const
1416	{
1417	rtx tmp = XEXP (this, 1);
1418	return safe_as_a <rtx_insn_list *> (p: tmp);
1419	}
1420
1421	inline rtx_insn *rtx_insn_list::insn () const
1422	{
1423	rtx tmp = XEXP (this, 0);
1424	return safe_as_a <rtx_insn *> (p: tmp);
1425	}
1426
1427	/* Methods of rtx_sequence. */
1428
1429	inline int rtx_sequence::len () const
1430	{
1431	return XVECLEN (this, 0);
1432	}
1433
1434	inline rtx rtx_sequence::element (int index) const
1435	{
1436	return XVECEXP (this, 0, index);
1437	}
1438
1439	inline rtx_insn *rtx_sequence::insn (int index) const
1440	{
1441	return as_a <rtx_insn *> (XVECEXP (this, 0, index));
1442	}
1443
1444	/* ACCESS MACROS for particular fields of insns. */
1445
1446	/* Holds a unique number for each insn.
1447	These are not necessarily sequentially increasing. */
1448	inline int INSN_UID (const_rtx insn)
1449	{
1450	return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
1451	(insn))->u2.insn_uid;
1452	}
1453	inline int& INSN_UID (rtx insn)
1454	{
1455	return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
1456	(insn))->u2.insn_uid;
1457	}
1458
1459	/* Chain insns together in sequence. */
1460
1461	/* For now these are split in two: an rvalue form:
1462	PREV_INSN/NEXT_INSN
1463	and an lvalue form:
1464	SET_NEXT_INSN/SET_PREV_INSN. */
1465
1466	inline rtx_insn *PREV_INSN (const rtx_insn *insn)
1467	{
1468	rtx prev = XEXP (insn, 0);
1469	return safe_as_a <rtx_insn *> (p: prev);
1470	}
1471
1472	inline rtx& SET_PREV_INSN (rtx_insn *insn)
1473	{
1474	return XEXP (insn, 0);
1475	}
1476
1477	inline rtx_insn *NEXT_INSN (const rtx_insn *insn)
1478	{
1479	rtx next = XEXP (insn, 1);
1480	return safe_as_a <rtx_insn *> (p: next);
1481	}
1482
1483	inline rtx& SET_NEXT_INSN (rtx_insn *insn)
1484	{
1485	return XEXP (insn, 1);
1486	}
1487
1488	inline basic_block BLOCK_FOR_INSN (const_rtx insn)
1489	{
1490	return XBBDEF (insn, 2);
1491	}
1492
1493	inline basic_block& BLOCK_FOR_INSN (rtx insn)
1494	{
1495	return XBBDEF (insn, 2);
1496	}
1497
1498	inline void set_block_for_insn (rtx_insn *insn, basic_block bb)
1499	{
1500	BLOCK_FOR_INSN (insn) = bb;
1501	}
1502
1503	/* The body of an insn. */
1504	inline rtx PATTERN (const_rtx insn)
1505	{
1506	return XEXP (insn, 3);
1507	}
1508
1509	inline rtx& PATTERN (rtx insn)
1510	{
1511	return XEXP (insn, 3);
1512	}
1513
1514	inline unsigned int INSN_LOCATION (const rtx_insn *insn)
1515	{
1516	return XUINT (insn, 4);
1517	}
1518
1519	inline unsigned int& INSN_LOCATION (rtx_insn *insn)
1520	{
1521	return XUINT (insn, 4);
1522	}
1523
1524	inline bool INSN_HAS_LOCATION (const rtx_insn *insn)
1525	{
1526	return LOCATION_LOCUS (INSN_LOCATION (insn)) != UNKNOWN_LOCATION;
1527	}
1528
1529	/* LOCATION of an RTX if relevant. */
1530	#define RTL_LOCATION(X) (INSN_P (X) ? \
1531	INSN_LOCATION (as_a <rtx_insn *> (X)) \
1532	: UNKNOWN_LOCATION)
1533
1534	/* Code number of instruction, from when it was recognized.
1535	-1 means this instruction has not been recognized yet. */
1536	#define INSN_CODE(INSN) XINT (INSN, 5)
1537
1538	inline rtvec rtx_jump_table_data::get_labels () const
1539	{
1540	rtx pat = PATTERN (insn: this);
1541	if (GET_CODE (pat) == ADDR_VEC)
1542	return XVEC (pat, 0);
1543	else
1544	return XVEC (pat, 1); /* presumably an ADDR_DIFF_VEC */
1545	}
1546
1547	/* Return the mode of the data in the table, which is always a scalar
1548	integer. */
1549
1550	inline scalar_int_mode
1551	rtx_jump_table_data::get_data_mode () const
1552	{
1553	return as_a <scalar_int_mode> (GET_MODE (PATTERN (this)));
1554	}
1555
1556	/* If LABEL is followed by a jump table, return the table, otherwise
1557	return null. */
1558
1559	inline rtx_jump_table_data *
1560	jump_table_for_label (const rtx_code_label *label)
1561	{
1562	return safe_dyn_cast <rtx_jump_table_data *> (p: NEXT_INSN (insn: label));
1563	}
1564
1565	#define RTX_FRAME_RELATED_P(RTX) \
1566	(RTL_FLAG_CHECK6 ("RTX_FRAME_RELATED_P", (RTX), DEBUG_INSN, INSN, \
1567	CALL_INSN, JUMP_INSN, BARRIER, SET)->frame_related)
1568
1569	/* 1 if JUMP RTX is a crossing jump. */
1570	#define CROSSING_JUMP_P(RTX) \
1571	(RTL_FLAG_CHECK1 ("CROSSING_JUMP_P", (RTX), JUMP_INSN)->jump)
1572
1573	/* 1 if RTX is a call to a const function. Built from ECF_CONST and
1574	TREE_READONLY. */
1575	#define RTL_CONST_CALL_P(RTX) \
1576	(RTL_FLAG_CHECK1 ("RTL_CONST_CALL_P", (RTX), CALL_INSN)->unchanging)
1577
1578	/* 1 if RTX is a call to a pure function. Built from ECF_PURE and
1579	DECL_PURE_P. */
1580	#define RTL_PURE_CALL_P(RTX) \
1581	(RTL_FLAG_CHECK1 ("RTL_PURE_CALL_P", (RTX), CALL_INSN)->return_val)
1582
1583	/* 1 if RTX is a call to a const or pure function. */
1584	#define RTL_CONST_OR_PURE_CALL_P(RTX) \
1585	(RTL_CONST_CALL_P (RTX) || RTL_PURE_CALL_P (RTX))
1586
1587	/* 1 if RTX is a call to a looping const or pure function. Built from
1588	ECF_LOOPING_CONST_OR_PURE and DECL_LOOPING_CONST_OR_PURE_P. */
1589	#define RTL_LOOPING_CONST_OR_PURE_CALL_P(RTX) \
1590	(RTL_FLAG_CHECK1 ("CONST_OR_PURE_CALL_P", (RTX), CALL_INSN)->call)
1591
1592	/* 1 if RTX is a call_insn for a sibling call. */
1593	#define SIBLING_CALL_P(RTX) \
1594	(RTL_FLAG_CHECK1 ("SIBLING_CALL_P", (RTX), CALL_INSN)->jump)
1595
1596	/* 1 if RTX is a jump_insn, call_insn, or insn that is an annulling branch. */
1597	#define INSN_ANNULLED_BRANCH_P(RTX) \
1598	(RTL_FLAG_CHECK1 ("INSN_ANNULLED_BRANCH_P", (RTX), JUMP_INSN)->unchanging)
1599
1600	/* 1 if RTX is an insn in a delay slot and is from the target of the branch.
1601	If the branch insn has INSN_ANNULLED_BRANCH_P set, this insn should only be
1602	executed if the branch is taken. For annulled branches with this bit
1603	clear, the insn should be executed only if the branch is not taken. */
1604	#define INSN_FROM_TARGET_P(RTX) \
1605	(RTL_FLAG_CHECK3 ("INSN_FROM_TARGET_P", (RTX), INSN, JUMP_INSN, \
1606	CALL_INSN)->in_struct)
1607
1608	/* In an ADDR_DIFF_VEC, the flags for RTX for use by branch shortening.
1609	See the comments for ADDR_DIFF_VEC in rtl.def. */
1610	#define ADDR_DIFF_VEC_FLAGS(RTX) X0ADVFLAGS (RTX, 4)
1611
1612	/* In a VALUE, the value cselib has assigned to RTX.
1613	This is a "struct cselib_val", see cselib.h. */
1614	#define CSELIB_VAL_PTR(RTX) X0CSELIB (RTX, 0)
1615
1616	/* Holds a list of notes on what this insn does to various REGs.
1617	It is a chain of EXPR_LIST rtx's, where the second operand is the
1618	chain pointer and the first operand is the REG being described.
1619	The mode field of the EXPR_LIST contains not a real machine mode
1620	but a value from enum reg_note. */
1621	#define REG_NOTES(INSN) XEXP(INSN, 6)
1622
1623	/* In an ENTRY_VALUE this is the DECL_INCOMING_RTL of the argument in
1624	question. */
1625	#define ENTRY_VALUE_EXP(RTX) (RTL_CHECKC1 (RTX, 0, ENTRY_VALUE).rt_rtx)
1626
1627	enum reg_note
1628	{
1629	#define DEF_REG_NOTE(NAME) NAME,
1630	#include "reg-notes.def"
1631	#undef DEF_REG_NOTE
1632	REG_NOTE_MAX
1633	};
1634
1635	/* Define macros to extract and insert the reg-note kind in an EXPR_LIST. */
1636	#define REG_NOTE_KIND(LINK) ((enum reg_note) GET_MODE (LINK))
1637	#define PUT_REG_NOTE_KIND(LINK, KIND) \
1638	PUT_MODE_RAW (LINK, (machine_mode) (KIND))
1639
1640	/* Names for REG_NOTE's in EXPR_LIST insn's. */
1641
1642	extern const char * const reg_note_name[];
1643	#define GET_REG_NOTE_NAME(MODE) (reg_note_name[(int) (MODE)])
1644
1645	/* This field is only present on CALL_INSNs. It holds a chain of EXPR_LIST of
1646	USE, CLOBBER and SET expressions.
1647	USE expressions list the registers filled with arguments that
1648	are passed to the function.
1649	CLOBBER expressions document the registers explicitly clobbered
1650	by this CALL_INSN.
1651	SET expressions say that the return value of the call (the SET_DEST)
1652	is equivalent to a value available before the call (the SET_SRC).
1653	This kind of SET is used when the return value is predictable in
1654	advance. It is purely an optimisation hint; unlike USEs and CLOBBERs,
1655	it does not affect register liveness.
1656
1657	Pseudo registers cannot be mentioned in this list. */
1658	#define CALL_INSN_FUNCTION_USAGE(INSN) XEXP(INSN, 7)
1659
1660	/* The label-number of a code-label. The assembler label
1661	is made from `L' and the label-number printed in decimal.
1662	Label numbers are unique in a compilation. */
1663	#define CODE_LABEL_NUMBER(INSN) XINT (INSN, 5)
1664
1665	/* In a NOTE that is a line number, this is a string for the file name that the
1666	line is in. We use the same field to record block numbers temporarily in
1667	NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes. (We avoid lots of casts
1668	between ints and pointers if we use a different macro for the block number.)
1669	*/
1670
1671	/* Opaque data. */
1672	#define NOTE_DATA(INSN) RTL_CHECKC1 (INSN, 3, NOTE)
1673	#define NOTE_DELETED_LABEL_NAME(INSN) XCSTR (INSN, 3, NOTE)
1674	#define SET_INSN_DELETED(INSN) set_insn_deleted (INSN);
1675	#define NOTE_BLOCK(INSN) XCTREE (INSN, 3, NOTE)
1676	#define NOTE_EH_HANDLER(INSN) XCINT (INSN, 3, NOTE)
1677	#define NOTE_BASIC_BLOCK(INSN) XCBBDEF (INSN, 3, NOTE)
1678	#define NOTE_VAR_LOCATION(INSN) XCEXP (INSN, 3, NOTE)
1679	#define NOTE_MARKER_LOCATION(INSN) XCUINT (INSN, 3, NOTE)
1680	#define NOTE_CFI(INSN) XCCFI (INSN, 3, NOTE)
1681	#define NOTE_LABEL_NUMBER(INSN) XCINT (INSN, 3, NOTE)
1682
1683	/* In a NOTE that is a line number, this is the line number.
1684	Other kinds of NOTEs are identified by negative numbers here. */
1685	#define NOTE_KIND(INSN) XCINT (INSN, 4, NOTE)
1686
1687	/* Nonzero if INSN is a note marking the beginning of a basic block. */
1688	#define NOTE_INSN_BASIC_BLOCK_P(INSN) \
1689	(NOTE_P (INSN) && NOTE_KIND (INSN) == NOTE_INSN_BASIC_BLOCK)
1690
1691	/* Nonzero if INSN is a debug nonbind marker note,
1692	for which NOTE_MARKER_LOCATION can be used. */
1693	#define NOTE_MARKER_P(INSN) \
1694	(NOTE_P (INSN) && \
1695	(NOTE_KIND (INSN) == NOTE_INSN_BEGIN_STMT \
1696	|| NOTE_KIND (INSN) == NOTE_INSN_INLINE_ENTRY))
1697
1698	/* Variable declaration and the location of a variable. */
1699	#define PAT_VAR_LOCATION_DECL(PAT) (XCTREE ((PAT), 0, VAR_LOCATION))
1700	#define PAT_VAR_LOCATION_LOC(PAT) (XCEXP ((PAT), 1, VAR_LOCATION))
1701
1702	/* Initialization status of the variable in the location. Status
1703	can be unknown, uninitialized or initialized. See enumeration
1704	type below. */
1705	#define PAT_VAR_LOCATION_STATUS(PAT) \
1706	(RTL_FLAG_CHECK1 ("PAT_VAR_LOCATION_STATUS", PAT, VAR_LOCATION) \
1707	->u2.var_location_status)
1708
1709	/* Accessors for a NOTE_INSN_VAR_LOCATION. */
1710	#define NOTE_VAR_LOCATION_DECL(NOTE) \
1711	PAT_VAR_LOCATION_DECL (NOTE_VAR_LOCATION (NOTE))
1712	#define NOTE_VAR_LOCATION_LOC(NOTE) \
1713	PAT_VAR_LOCATION_LOC (NOTE_VAR_LOCATION (NOTE))
1714	#define NOTE_VAR_LOCATION_STATUS(NOTE) \
1715	PAT_VAR_LOCATION_STATUS (NOTE_VAR_LOCATION (NOTE))
1716
1717	/* Evaluate to TRUE if INSN is a debug insn that denotes a variable
1718	location/value tracking annotation. */
1719	#define DEBUG_BIND_INSN_P(INSN) \
1720	(DEBUG_INSN_P (INSN) \
1721	&& (GET_CODE (PATTERN (INSN)) \
1722	== VAR_LOCATION))
1723	/* Evaluate to TRUE if INSN is a debug insn that denotes a program
1724	source location marker. */
1725	#define DEBUG_MARKER_INSN_P(INSN) \
1726	(DEBUG_INSN_P (INSN) \
1727	&& (GET_CODE (PATTERN (INSN)) \
1728	!= VAR_LOCATION))
1729	/* Evaluate to the marker kind. */
1730	#define INSN_DEBUG_MARKER_KIND(INSN) \
1731	(GET_CODE (PATTERN (INSN)) == DEBUG_MARKER \
1732	? (GET_MODE (PATTERN (INSN)) == VOIDmode \
1733	? NOTE_INSN_BEGIN_STMT \
1734	: GET_MODE (PATTERN (INSN)) == BLKmode \
1735	? NOTE_INSN_INLINE_ENTRY \
1736	: (enum insn_note)-1) \
1737	: (enum insn_note)-1)
1738	/* Create patterns for debug markers. These and the above abstract
1739	the representation, so that it's easier to get rid of the abuse of
1740	the mode to hold the marker kind. Other marker types are
1741	envisioned, so a single bit flag won't do; maybe separate RTL codes
1742	wouldn't be a problem. */
1743	#define GEN_RTX_DEBUG_MARKER_BEGIN_STMT_PAT() \
1744	gen_rtx_DEBUG_MARKER (VOIDmode)
1745	#define GEN_RTX_DEBUG_MARKER_INLINE_ENTRY_PAT() \
1746	gen_rtx_DEBUG_MARKER (BLKmode)
1747
1748	/* The VAR_LOCATION rtx in a DEBUG_INSN. */
1749	#define INSN_VAR_LOCATION(INSN) \
1750	(RTL_FLAG_CHECK1 ("INSN_VAR_LOCATION", PATTERN (INSN), VAR_LOCATION))
1751	/* A pointer to the VAR_LOCATION rtx in a DEBUG_INSN. */
1752	#define INSN_VAR_LOCATION_PTR(INSN) \
1753	(&PATTERN (INSN))
1754
1755	/* Accessors for a tree-expanded var location debug insn. */
1756	#define INSN_VAR_LOCATION_DECL(INSN) \
1757	PAT_VAR_LOCATION_DECL (INSN_VAR_LOCATION (INSN))
1758	#define INSN_VAR_LOCATION_LOC(INSN) \
1759	PAT_VAR_LOCATION_LOC (INSN_VAR_LOCATION (INSN))
1760	#define INSN_VAR_LOCATION_STATUS(INSN) \
1761	PAT_VAR_LOCATION_STATUS (INSN_VAR_LOCATION (INSN))
1762
1763	/* Expand to the RTL that denotes an unknown variable location in a
1764	DEBUG_INSN. */
1765	#define gen_rtx_UNKNOWN_VAR_LOC() (gen_rtx_CLOBBER (VOIDmode, const0_rtx))
1766
1767	/* Determine whether X is such an unknown location. */
1768	#define VAR_LOC_UNKNOWN_P(X) \
1769	(GET_CODE (X) == CLOBBER && XEXP ((X), 0) == const0_rtx)
1770
1771	/* 1 if RTX is emitted after a call, but it should take effect before
1772	the call returns. */
1773	#define NOTE_DURING_CALL_P(RTX) \
1774	(RTL_FLAG_CHECK1 ("NOTE_VAR_LOCATION_DURING_CALL_P", (RTX), NOTE)->call)
1775
1776	/* DEBUG_EXPR_DECL corresponding to a DEBUG_EXPR RTX. */
1777	#define DEBUG_EXPR_TREE_DECL(RTX) XCTREE (RTX, 0, DEBUG_EXPR)
1778
1779	/* VAR_DECL/PARM_DECL DEBUG_IMPLICIT_PTR takes address of. */
1780	#define DEBUG_IMPLICIT_PTR_DECL(RTX) XCTREE (RTX, 0, DEBUG_IMPLICIT_PTR)
1781
1782	/* PARM_DECL DEBUG_PARAMETER_REF references. */
1783	#define DEBUG_PARAMETER_REF_DECL(RTX) XCTREE (RTX, 0, DEBUG_PARAMETER_REF)
1784
1785	/* Codes that appear in the NOTE_KIND field for kinds of notes
1786	that are not line numbers. These codes are all negative.
1787
1788	Notice that we do not try to use zero here for any of
1789	the special note codes because sometimes the source line
1790	actually can be zero! This happens (for example) when we
1791	are generating code for the per-translation-unit constructor
1792	and destructor routines for some C++ translation unit. */
1793
1794	enum insn_note
1795	{
1796	#define DEF_INSN_NOTE(NAME) NAME,
1797	#include "insn-notes.def"
1798	#undef DEF_INSN_NOTE
1799
1800	NOTE_INSN_MAX
1801	};
1802
1803	/* Names for NOTE insn's other than line numbers. */
1804
1805	extern const char * const note_insn_name[NOTE_INSN_MAX];
1806	#define GET_NOTE_INSN_NAME(NOTE_CODE) \
1807	(note_insn_name[(NOTE_CODE)])
1808
1809	/* The name of a label, in case it corresponds to an explicit label
1810	in the input source code. */
1811	#define LABEL_NAME(RTX) XCSTR (RTX, 6, CODE_LABEL)
1812
1813	/* In jump.cc, each label contains a count of the number
1814	of LABEL_REFs that point at it, so unused labels can be deleted. */
1815	#define LABEL_NUSES(RTX) XCINT (RTX, 4, CODE_LABEL)
1816
1817	/* Labels carry a two-bit field composed of the ->jump and ->call
1818	bits. This field indicates whether the label is an alternate
1819	entry point, and if so, what kind. */
1820	enum label_kind
1821	{
1822	LABEL_NORMAL = 0, /* ordinary label */
1823	LABEL_STATIC_ENTRY, /* alternate entry point, not exported */
1824	LABEL_GLOBAL_ENTRY, /* alternate entry point, exported */
1825	LABEL_WEAK_ENTRY /* alternate entry point, exported as weak symbol */
1826	};
1827
1828	#if defined ENABLE_RTL_FLAG_CHECKING && (GCC_VERSION > 2007)
1829
1830	/* Retrieve the kind of LABEL. */
1831	#define LABEL_KIND(LABEL) __extension__ \
1832	({ __typeof (LABEL) const _label = (LABEL); \
1833	if (! LABEL_P (_label)) \
1834	rtl_check_failed_flag ("LABEL_KIND", _label, __FILE__, __LINE__, \
1835	__FUNCTION__); \
1836	(enum label_kind) ((_label->jump << 1) | _label->call); })
1837
1838	/* Set the kind of LABEL. */
1839	#define SET_LABEL_KIND(LABEL, KIND) do { \
1840	__typeof (LABEL) const _label = (LABEL); \
1841	const unsigned int _kind = (KIND); \
1842	if (! LABEL_P (_label)) \
1843	rtl_check_failed_flag ("SET_LABEL_KIND", _label, __FILE__, __LINE__, \
1844	__FUNCTION__); \
1845	_label->jump = ((_kind >> 1) & 1); \
1846	_label->call = (_kind & 1); \
1847	} while (0)
1848
1849	#else
1850
1851	/* Retrieve the kind of LABEL. */
1852	#define LABEL_KIND(LABEL) \
1853	((enum label_kind) (((LABEL)->jump << 1) | (LABEL)->call))
1854
1855	/* Set the kind of LABEL. */
1856	#define SET_LABEL_KIND(LABEL, KIND) do { \
1857	rtx const _label = (LABEL); \
1858	const unsigned int _kind = (KIND); \
1859	_label->jump = ((_kind >> 1) & 1); \
1860	_label->call = (_kind & 1); \
1861	} while (0)
1862
1863	#endif /* rtl flag checking */
1864
1865	#define LABEL_ALT_ENTRY_P(LABEL) (LABEL_KIND (LABEL) != LABEL_NORMAL)
1866
1867	/* In jump.cc, each JUMP_INSN can point to a label that it can jump to,
1868	so that if the JUMP_INSN is deleted, the label's LABEL_NUSES can
1869	be decremented and possibly the label can be deleted. */
1870	#define JUMP_LABEL(INSN) XCEXP (INSN, 7, JUMP_INSN)
1871
1872	inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn)
1873	{
1874	return safe_as_a <rtx_insn *> (JUMP_LABEL (insn));
1875	}
1876
1877	/* Methods of rtx_jump_insn. */
1878
1879	inline rtx rtx_jump_insn::jump_label () const
1880	{
1881	return JUMP_LABEL (this);
1882	}
1883
1884	inline rtx_code_label *rtx_jump_insn::jump_target () const
1885	{
1886	return safe_as_a <rtx_code_label *> (JUMP_LABEL (this));
1887	}
1888
1889	inline void rtx_jump_insn::set_jump_target (rtx_code_label *target)
1890	{
1891	JUMP_LABEL (this) = target;
1892	}
1893
1894	/* Once basic blocks are found, each CODE_LABEL starts a chain that
1895	goes through all the LABEL_REFs that jump to that label. The chain
1896	eventually winds up at the CODE_LABEL: it is circular. */
1897	#define LABEL_REFS(LABEL) XCEXP (LABEL, 3, CODE_LABEL)
1898
1899	/* Get the label that a LABEL_REF references. */
1900	inline rtx_insn *
1901	label_ref_label (const_rtx ref)
1902	{
1903	return as_a<rtx_insn *> (XCEXP (ref, 0, LABEL_REF));
1904	}
1905
1906	/* Set the label that LABEL_REF ref refers to. */
1907
1908	inline void
1909	set_label_ref_label (rtx ref, rtx_insn *label)
1910	{
1911	XCEXP (ref, 0, LABEL_REF) = label;
1912	}
1913
1914	/* For a REG rtx, REGNO extracts the register number. REGNO can only
1915	be used on RHS. Use SET_REGNO to change the value. */
1916	#define REGNO(RTX) (rhs_regno(RTX))
1917	#define SET_REGNO(RTX, N) (df_ref_change_reg_with_loc (RTX, N))
1918
1919	/* Return the number of consecutive registers in a REG. This is always
1920	1 for pseudo registers and is determined by TARGET_HARD_REGNO_NREGS for
1921	hard registers. */
1922	#define REG_NREGS(RTX) (REG_CHECK (RTX)->nregs)
1923
1924	/* ORIGINAL_REGNO holds the number the register originally had; for a
1925	pseudo register turned into a hard reg this will hold the old pseudo
1926	register number. */
1927	#define ORIGINAL_REGNO(RTX) \
1928	(RTL_FLAG_CHECK1 ("ORIGINAL_REGNO", (RTX), REG)->u2.original_regno)
1929
1930	/* Force the REGNO macro to only be used on the lhs. */
1931	inline unsigned int
1932	rhs_regno (const_rtx x)
1933	{
1934	return REG_CHECK (x)->regno;
1935	}
1936
1937	/* Return the final register in REG X plus one. */
1938	inline unsigned int
1939	END_REGNO (const_rtx x)
1940	{
1941	return REGNO (x) + REG_NREGS (x);
1942	}
1943
1944	/* Change the REGNO and REG_NREGS of REG X to the specified values,
1945	bypassing the df machinery. */
1946	inline void
1947	set_regno_raw (rtx x, unsigned int regno, unsigned int nregs)
1948	{
1949	reg_info *reg = REG_CHECK (x);
1950	reg->regno = regno;
1951	reg->nregs = nregs;
1952	}
1953
1954	/* 1 if RTX is a reg or parallel that is the current function's return
1955	value. */
1956	#define REG_FUNCTION_VALUE_P(RTX) \
1957	(RTL_FLAG_CHECK2 ("REG_FUNCTION_VALUE_P", (RTX), REG, PARALLEL)->return_val)
1958
1959	/* 1 if RTX is a reg that corresponds to a variable declared by the user. */
1960	#define REG_USERVAR_P(RTX) \
1961	(RTL_FLAG_CHECK1 ("REG_USERVAR_P", (RTX), REG)->volatil)
1962
1963	/* 1 if RTX is a reg that holds a pointer value. */
1964	#define REG_POINTER(RTX) \
1965	(RTL_FLAG_CHECK1 ("REG_POINTER", (RTX), REG)->frame_related)
1966
1967	/* 1 if RTX is a mem that holds a pointer value. */
1968	#define MEM_POINTER(RTX) \
1969	(RTL_FLAG_CHECK1 ("MEM_POINTER", (RTX), MEM)->frame_related)
1970
1971	/* 1 if the given register REG corresponds to a hard register. */
1972	#define HARD_REGISTER_P(REG) HARD_REGISTER_NUM_P (REGNO (REG))
1973
1974	/* 1 if the given register number REG_NO corresponds to a hard register. */
1975	#define HARD_REGISTER_NUM_P(REG_NO) ((REG_NO) < FIRST_PSEUDO_REGISTER)
1976
1977	/* 1 if the given register REG corresponds to a virtual register. */
1978	#define VIRTUAL_REGISTER_P(REG) VIRTUAL_REGISTER_NUM_P (REGNO (REG))
1979
1980	/* 1 if the given register number REG_NO corresponds to a virtual register. */
1981	#define VIRTUAL_REGISTER_NUM_P(REG_NO) \
1982	IN_RANGE (REG_NO, FIRST_VIRTUAL_REGISTER, LAST_VIRTUAL_REGISTER)
1983
1984	/* For a CONST_INT rtx, INTVAL extracts the integer. */
1985	#define INTVAL(RTX) XCWINT (RTX, 0, CONST_INT)
1986	#define UINTVAL(RTX) ((unsigned HOST_WIDE_INT) INTVAL (RTX))
1987
1988	/* For a CONST_WIDE_INT, CONST_WIDE_INT_NUNITS is the number of
1989	elements actually needed to represent the constant.
1990	CONST_WIDE_INT_ELT gets one of the elements. 0 is the least
1991	significant HOST_WIDE_INT. */
1992	#define CONST_WIDE_INT_VEC(RTX) HWIVEC_CHECK (RTX, CONST_WIDE_INT)
1993	#define CONST_WIDE_INT_NUNITS(RTX) CWI_GET_NUM_ELEM (RTX)
1994	#define CONST_WIDE_INT_ELT(RTX, N) CWI_ELT (RTX, N)
1995
1996	/* For a CONST_POLY_INT, CONST_POLY_INT_COEFFS gives access to the
1997	individual coefficients, in the form of a trailing_wide_ints structure. */
1998	#define CONST_POLY_INT_COEFFS(RTX) \
1999	(RTL_FLAG_CHECK1("CONST_POLY_INT_COEFFS", (RTX), \
2000	CONST_POLY_INT)->u.cpi.coeffs)
2001
2002	/* For a CONST_DOUBLE:
2003	#if TARGET_SUPPORTS_WIDE_INT == 0
2004	For a VOIDmode, there are two integers CONST_DOUBLE_LOW is the
2005	low-order word and ..._HIGH the high-order.
2006	#endif
2007	For a float, there is a REAL_VALUE_TYPE structure, and
2008	CONST_DOUBLE_REAL_VALUE(r) is a pointer to it. */
2009	#define CONST_DOUBLE_LOW(r) XCMWINT (r, 0, CONST_DOUBLE, VOIDmode)
2010	#define CONST_DOUBLE_HIGH(r) XCMWINT (r, 1, CONST_DOUBLE, VOIDmode)
2011	#define CONST_DOUBLE_REAL_VALUE(r) \
2012	((const struct real_value *) XCNMPRV (r, CONST_DOUBLE, VOIDmode))
2013
2014	#define CONST_FIXED_VALUE(r) \
2015	((const struct fixed_value *) XCNMPFV (r, CONST_FIXED, VOIDmode))
2016	#define CONST_FIXED_VALUE_HIGH(r) \
2017	((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.high))
2018	#define CONST_FIXED_VALUE_LOW(r) \
2019	((HOST_WIDE_INT) (CONST_FIXED_VALUE (r)->data.low))
2020
2021	/* For a CONST_VECTOR, return element #n. */
2022	#define CONST_VECTOR_ELT(RTX, N) const_vector_elt (RTX, N)
2023
2024	/* See rtl.texi for a description of these macros. */
2025	#define CONST_VECTOR_NPATTERNS(RTX) \
2026	(RTL_FLAG_CHECK1 ("CONST_VECTOR_NPATTERNS", (RTX), CONST_VECTOR) \
2027	->u2.const_vector.npatterns)
2028
2029	#define CONST_VECTOR_NELTS_PER_PATTERN(RTX) \
2030	(RTL_FLAG_CHECK1 ("CONST_VECTOR_NELTS_PER_PATTERN", (RTX), CONST_VECTOR) \
2031	->u2.const_vector.nelts_per_pattern)
2032
2033	#define CONST_VECTOR_DUPLICATE_P(RTX) \
2034	(CONST_VECTOR_NELTS_PER_PATTERN (RTX) == 1)
2035
2036	#define CONST_VECTOR_STEPPED_P(RTX) \
2037	(CONST_VECTOR_NELTS_PER_PATTERN (RTX) == 3)
2038
2039	#define CONST_VECTOR_ENCODED_ELT(RTX, N) XCVECEXP (RTX, 0, N, CONST_VECTOR)
2040
2041	/* Return the number of elements encoded directly in a CONST_VECTOR. */
2042
2043	inline unsigned int
2044	const_vector_encoded_nelts (const_rtx x)
2045	{
2046	return CONST_VECTOR_NPATTERNS (x) * CONST_VECTOR_NELTS_PER_PATTERN (x);
2047	}
2048
2049	/* For a CONST_VECTOR, return the number of elements in a vector. */
2050	#define CONST_VECTOR_NUNITS(RTX) GET_MODE_NUNITS (GET_MODE (RTX))
2051
2052	/* For a SUBREG rtx, SUBREG_REG extracts the value we want a subreg of.
2053	SUBREG_BYTE extracts the byte-number. */
2054
2055	#define SUBREG_REG(RTX) XCEXP (RTX, 0, SUBREG)
2056	#define SUBREG_BYTE(RTX) XCSUBREG (RTX, 1, SUBREG)
2057
2058	/* in rtlanal.cc */
2059	/* Return the right cost to give to an operation
2060	to make the cost of the corresponding register-to-register instruction
2061	N times that of a fast register-to-register instruction. */
2062	#define COSTS_N_INSNS(N) ((N) * 4)
2063
2064	/* Maximum cost of an rtl expression. This value has the special meaning
2065	not to use an rtx with this cost under any circumstances. */
2066	#define MAX_COST INT_MAX
2067
2068	/* Return true if CODE always has VOIDmode. */
2069
2070	inline bool
2071	always_void_p (enum rtx_code code)
2072	{
2073	return code == SET;
2074	}
2075
2076	/* A structure to hold all available cost information about an rtl
2077	expression. */
2078	struct full_rtx_costs
2079	{
2080	int speed;
2081	int size;
2082	};
2083
2084	/* Initialize a full_rtx_costs structure C to the maximum cost. */
2085	inline void
2086	init_costs_to_max (struct full_rtx_costs *c)
2087	{
2088	c->speed = MAX_COST;
2089	c->size = MAX_COST;
2090	}
2091
2092	/* Initialize a full_rtx_costs structure C to zero cost. */
2093	inline void
2094	init_costs_to_zero (struct full_rtx_costs *c)
2095	{
2096	c->speed = 0;
2097	c->size = 0;
2098	}
2099
2100	/* Compare two full_rtx_costs structures A and B, returning true
2101	if A < B when optimizing for speed. */
2102	inline bool
2103	costs_lt_p (struct full_rtx_costs *a, struct full_rtx_costs *b,
2104	bool speed)
2105	{
2106	if (speed)
2107	return (a->speed < b->speed
2108	|| (a->speed == b->speed && a->size < b->size));
2109	else
2110	return (a->size < b->size
2111	|| (a->size == b->size && a->speed < b->speed));
2112	}
2113
2114	/* Increase both members of the full_rtx_costs structure C by the
2115	cost of N insns. */
2116	inline void
2117	costs_add_n_insns (struct full_rtx_costs *c, int n)
2118	{
2119	c->speed += COSTS_N_INSNS (n);
2120	c->size += COSTS_N_INSNS (n);
2121	}
2122
2123	/* Describes the shape of a subreg:
2124
2125	inner_mode == the mode of the SUBREG_REG
2126	offset == the SUBREG_BYTE
2127	outer_mode == the mode of the SUBREG itself. */
2128	class subreg_shape {
2129	public:
2130	subreg_shape (machine_mode, poly_uint16, machine_mode);
2131	bool operator == (const subreg_shape &) const;
2132	bool operator != (const subreg_shape &) const;
2133	unsigned HOST_WIDE_INT unique_id () const;
2134
2135	machine_mode inner_mode;
2136	poly_uint16 offset;
2137	machine_mode outer_mode;
2138	};
2139
2140	inline
2141	subreg_shape::subreg_shape (machine_mode inner_mode_in,
2142	poly_uint16 offset_in,
2143	machine_mode outer_mode_in)
2144	: inner_mode (inner_mode_in), offset (offset_in), outer_mode (outer_mode_in)
2145	{}
2146
2147	inline bool
2148	subreg_shape::operator == (const subreg_shape &other) const
2149	{
2150	return (inner_mode == other.inner_mode
2151	&& known_eq (offset, other.offset)
2152	&& outer_mode == other.outer_mode);
2153	}
2154
2155	inline bool
2156	subreg_shape::operator != (const subreg_shape &other) const
2157	{
2158	return !operator == (other);
2159	}
2160
2161	/* Return an integer that uniquely identifies this shape. Structures
2162	like rtx_def assume that a mode can fit in an 8-bit bitfield and no
2163	current mode is anywhere near being 65536 bytes in size, so the
2164	id comfortably fits in an int. */
2165
2166	inline unsigned HOST_WIDE_INT
2167	subreg_shape::unique_id () const
2168	{
2169	{ STATIC_ASSERT (MAX_MACHINE_MODE <= (1 << MACHINE_MODE_BITSIZE)); }
2170	{ STATIC_ASSERT (NUM_POLY_INT_COEFFS <= 3); }
2171	{ STATIC_ASSERT (sizeof (offset.coeffs[0]) <= 2); }
2172	int res = (int) inner_mode + ((int) outer_mode << 8);
2173	for (int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2174	res += (HOST_WIDE_INT) offset.coeffs[i] << ((1 + i) * 16);
2175	return res;
2176	}
2177
2178	/* Return the shape of a SUBREG rtx. */
2179
2180	inline subreg_shape
2181	shape_of_subreg (const_rtx x)
2182	{
2183	return subreg_shape (GET_MODE (SUBREG_REG (x)),
2184	SUBREG_BYTE (x), GET_MODE (x));
2185	}
2186
2187	/* Information about an address. This structure is supposed to be able
2188	to represent all supported target addresses. Please extend it if it
2189	is not yet general enough. */
2190	struct address_info {
2191	/* The mode of the value being addressed, or VOIDmode if this is
2192	a load-address operation with no known address mode. */
2193	machine_mode mode;
2194
2195	/* The address space. */
2196	addr_space_t as;
2197
2198	/* True if this is an RTX_AUTOINC address. */
2199	bool autoinc_p;
2200
2201	/* A pointer to the top-level address. */
2202	rtx *outer;
2203
2204	/* A pointer to the inner address, after all address mutations
2205	have been stripped from the top-level address. It can be one
2206	of the following:
2207
2208	- A {PRE,POST}_{INC,DEC} of *BASE. SEGMENT, INDEX and DISP are null.
2209
2210	- A {PRE,POST}_MODIFY of *BASE. In this case either INDEX or DISP
2211	points to the step value, depending on whether the step is variable
2212	or constant respectively. SEGMENT is null.
2213
2214	- A plain sum of the form SEGMENT + BASE + INDEX + DISP,
2215	with null fields evaluating to 0. */
2216	rtx *inner;
2217
2218	/* Components that make up *INNER. Each one may be null or nonnull.
2219	When nonnull, their meanings are as follows:
2220
2221	- *SEGMENT is the "segment" of memory to which the address refers.
2222	This value is entirely target-specific and is only called a "segment"
2223	because that's its most typical use. It contains exactly one UNSPEC,
2224	pointed to by SEGMENT_TERM. The contents of *SEGMENT do not need
2225	reloading.
2226
2227	- *BASE is a variable expression representing a base address.
2228	It contains exactly one REG, SUBREG or MEM, pointed to by BASE_TERM.
2229
2230	- *INDEX is a variable expression representing an index value.
2231	It may be a scaled expression, such as a MULT. It has exactly
2232	one REG, SUBREG or MEM, pointed to by INDEX_TERM.
2233
2234	- *DISP is a constant, possibly mutated. DISP_TERM points to the
2235	unmutated RTX_CONST_OBJ. */
2236	rtx *segment;
2237	rtx *base;
2238	rtx *index;
2239	rtx *disp;
2240
2241	rtx *segment_term;
2242	rtx *base_term;
2243	rtx *index_term;
2244	rtx *disp_term;
2245
2246	/* In a {PRE,POST}_MODIFY address, this points to a second copy
2247	of BASE_TERM, otherwise it is null. */
2248	rtx *base_term2;
2249
2250	/* ADDRESS if this structure describes an address operand, MEM if
2251	it describes a MEM address. */
2252	enum rtx_code addr_outer_code;
2253
2254	/* If BASE is nonnull, this is the code of the rtx that contains it. */
2255	enum rtx_code base_outer_code;
2256	};
2257
2258	/* This is used to bundle an rtx and a mode together so that the pair
2259	can be used with the wi:: routines. If we ever put modes into rtx
2260	integer constants, this should go away and then just pass an rtx in. */
2261	typedef std::pair <rtx, machine_mode> rtx_mode_t;
2262
2263	namespace wi
2264	{
2265	template <>
2266	struct int_traits <rtx_mode_t>
2267	{
2268	static const enum precision_type precision_type = VAR_PRECISION;
2269	static const bool host_dependent_precision = false;
2270	/* This ought to be true, except for the special case that BImode
2271	is canonicalized to STORE_FLAG_VALUE, which might be 1. */
2272	static const bool is_sign_extended = false;
2273	static const bool needs_write_val_arg = false;
2274	static unsigned int get_precision (const rtx_mode_t &);
2275	static wi::storage_ref decompose (HOST_WIDE_INT *, unsigned int,
2276	const rtx_mode_t &);
2277	};
2278	}
2279
2280	inline unsigned int
2281	wi::int_traits <rtx_mode_t>::get_precision (const rtx_mode_t &x)
2282	{
2283	return GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: x.second));
2284	}
2285
2286	inline wi::storage_ref
2287	wi::int_traits <rtx_mode_t>::decompose (HOST_WIDE_INT *,
2288	unsigned int precision,
2289	const rtx_mode_t &x)
2290	{
2291	gcc_checking_assert (precision == get_precision (x));
2292	switch (GET_CODE (x.first))
2293	{
2294	case CONST_INT:
2295	if (precision < HOST_BITS_PER_WIDE_INT)
2296	/* Nonzero BImodes are stored as STORE_FLAG_VALUE, which on many
2297	targets is 1 rather than -1. */
2298	gcc_checking_assert (INTVAL (x.first)
2299	== sext_hwi (INTVAL (x.first), precision)
2300	|| (x.second == BImode && INTVAL (x.first) == 1));
2301
2302	return wi::storage_ref (&INTVAL (x.first), 1, precision);
2303
2304	case CONST_WIDE_INT:
2305	return wi::storage_ref (&CONST_WIDE_INT_ELT (x.first, 0),
2306	CONST_WIDE_INT_NUNITS (x.first), precision);
2307
2308	#if TARGET_SUPPORTS_WIDE_INT == 0
2309	case CONST_DOUBLE:
2310	return wi::storage_ref (&CONST_DOUBLE_LOW (x.first), 2, precision);
2311	#endif
2312
2313	default:
2314	gcc_unreachable ();
2315	}
2316	}
2317
2318	namespace wi
2319	{
2320	hwi_with_prec shwi (HOST_WIDE_INT, machine_mode mode);
2321	wide_int min_value (machine_mode, signop);
2322	wide_int max_value (machine_mode, signop);
2323	}
2324
2325	inline wi::hwi_with_prec
2326	wi::shwi (HOST_WIDE_INT val, machine_mode mode)
2327	{
2328	return shwi (val, precision: GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)));
2329	}
2330
2331	/* Produce the smallest number that is represented in MODE. The precision
2332	is taken from MODE and the sign from SGN. */
2333	inline wide_int
2334	wi::min_value (machine_mode mode, signop sgn)
2335	{
2336	return min_value (GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)), sgn);
2337	}
2338
2339	/* Produce the largest number that is represented in MODE. The precision
2340	is taken from MODE and the sign from SGN. */
2341	inline wide_int
2342	wi::max_value (machine_mode mode, signop sgn)
2343	{
2344	return max_value (GET_MODE_PRECISION (mode: as_a <scalar_mode> (m: mode)), sgn);
2345	}
2346
2347	namespace wi
2348	{
2349	typedef poly_int<NUM_POLY_INT_COEFFS,
2350	generic_wide_int <wide_int_ref_storage <false, false> > >
2351	rtx_to_poly_wide_ref;
2352	rtx_to_poly_wide_ref to_poly_wide (const_rtx, machine_mode);
2353	}
2354
2355	/* Return the value of a CONST_POLY_INT in its native precision. */
2356
2357	inline wi::rtx_to_poly_wide_ref
2358	const_poly_int_value (const_rtx x)
2359	{
2360	poly_int<NUM_POLY_INT_COEFFS, WIDE_INT_REF_FOR (wide_int)> res;
2361	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2362	res.coeffs[i] = CONST_POLY_INT_COEFFS (x)[i];
2363	return res;
2364	}
2365
2366	/* Return true if X is a scalar integer or a CONST_POLY_INT. The value
2367	can then be extracted using wi::to_poly_wide. */
2368
2369	inline bool
2370	poly_int_rtx_p (const_rtx x)
2371	{
2372	return CONST_SCALAR_INT_P (x) || CONST_POLY_INT_P (x);
2373	}
2374
2375	/* Access X (which satisfies poly_int_rtx_p) as a poly_wide_int.
2376	MODE is the mode of X. */
2377
2378	inline wi::rtx_to_poly_wide_ref
2379	wi::to_poly_wide (const_rtx x, machine_mode mode)
2380	{
2381	if (CONST_POLY_INT_P (x))
2382	return const_poly_int_value (x);
2383	return rtx_mode_t (const_cast<rtx> (x), mode);
2384	}
2385
2386	/* Return the value of X as a poly_int64. */
2387
2388	inline poly_int64
2389	rtx_to_poly_int64 (const_rtx x)
2390	{
2391	if (CONST_POLY_INT_P (x))
2392	{
2393	poly_int64 res;
2394	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2395	res.coeffs[i] = CONST_POLY_INT_COEFFS (x)[i].to_shwi ();
2396	return res;
2397	}
2398	return INTVAL (x);
2399	}
2400
2401	/* Return true if arbitrary value X is an integer constant that can
2402	be represented as a poly_int64. Store the value in *RES if so,
2403	otherwise leave it unmodified. */
2404
2405	inline bool
2406	poly_int_rtx_p (const_rtx x, poly_int64 *res)
2407	{
2408	if (CONST_INT_P (x))
2409	{
2410	*res = INTVAL (x);
2411	return true;
2412	}
2413	if (CONST_POLY_INT_P (x))
2414	{
2415	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2416	if (!wi::fits_shwi_p (CONST_POLY_INT_COEFFS (x)[i]))
2417	return false;
2418	for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2419	res->coeffs[i] = CONST_POLY_INT_COEFFS (x)[i].to_shwi ();
2420	return true;
2421	}
2422	return false;
2423	}
2424
2425	extern void init_rtlanal (void);
2426	extern int rtx_cost (rtx, machine_mode, enum rtx_code, int, bool);
2427	extern int address_cost (rtx, machine_mode, addr_space_t, bool);
2428	extern void get_full_rtx_cost (rtx, machine_mode, enum rtx_code, int,
2429	struct full_rtx_costs *);
2430	extern bool native_encode_rtx (machine_mode, rtx, vec<target_unit> &,
2431	unsigned int, unsigned int);
2432	extern rtx native_decode_rtx (machine_mode, const vec<target_unit> &,
2433	unsigned int);
2434	extern rtx native_decode_vector_rtx (machine_mode, const vec<target_unit> &,
2435	unsigned int, unsigned int, unsigned int);
2436	extern poly_uint64 subreg_lsb (const_rtx);
2437	extern poly_uint64 subreg_size_lsb (poly_uint64, poly_uint64, poly_uint64);
2438	extern poly_uint64 subreg_size_offset_from_lsb (poly_uint64, poly_uint64,
2439	poly_uint64);
2440	extern bool read_modify_subreg_p (const_rtx);
2441
2442	/* Given a subreg's OUTER_MODE, INNER_MODE, and SUBREG_BYTE, return the
2443	bit offset at which the subreg begins (counting from the least significant
2444	bit of the operand). */
2445
2446	inline poly_uint64
2447	subreg_lsb_1 (machine_mode outer_mode, machine_mode inner_mode,
2448	poly_uint64 subreg_byte)
2449	{
2450	return subreg_size_lsb (GET_MODE_SIZE (mode: outer_mode),
2451	GET_MODE_SIZE (mode: inner_mode), subreg_byte);
2452	}
2453
2454	/* Return the subreg byte offset for a subreg whose outer mode is
2455	OUTER_MODE, whose inner mode is INNER_MODE, and where there are
2456	LSB_SHIFT *bits* between the lsb of the outer value and the lsb of
2457	the inner value. This is the inverse of subreg_lsb_1 (which converts
2458	byte offsets to bit shifts). */
2459
2460	inline poly_uint64
2461	subreg_offset_from_lsb (machine_mode outer_mode,
2462	machine_mode inner_mode,
2463	poly_uint64 lsb_shift)
2464	{
2465	return subreg_size_offset_from_lsb (GET_MODE_SIZE (mode: outer_mode),
2466	GET_MODE_SIZE (mode: inner_mode), lsb_shift);
2467	}
2468
2469	extern unsigned int subreg_regno_offset (unsigned int, machine_mode,
2470	poly_uint64, machine_mode);
2471	extern bool subreg_offset_representable_p (unsigned int, machine_mode,
2472	poly_uint64, machine_mode);
2473	extern unsigned int subreg_regno (const_rtx);
2474	extern int simplify_subreg_regno (unsigned int, machine_mode,
2475	poly_uint64, machine_mode);
2476	extern int lowpart_subreg_regno (unsigned int, machine_mode,
2477	machine_mode);
2478	extern unsigned int subreg_nregs (const_rtx);
2479	extern unsigned int subreg_nregs_with_regno (unsigned int, const_rtx);
2480	extern unsigned HOST_WIDE_INT nonzero_bits (const_rtx, machine_mode);
2481	extern unsigned int num_sign_bit_copies (const_rtx, machine_mode);
2482	extern bool constant_pool_constant_p (rtx);
2483	extern bool truncated_to_mode (machine_mode, const_rtx);
2484	extern int low_bitmask_len (machine_mode, unsigned HOST_WIDE_INT);
2485	extern void split_double (rtx, rtx *, rtx *);
2486	extern rtx *strip_address_mutations (rtx *, enum rtx_code * = 0);
2487	extern void decompose_address (struct address_info *, rtx *,
2488	machine_mode, addr_space_t, enum rtx_code);
2489	extern void decompose_lea_address (struct address_info *, rtx *);
2490	extern void decompose_mem_address (struct address_info *, rtx);
2491	extern void update_address (struct address_info *);
2492	extern HOST_WIDE_INT get_index_scale (const struct address_info *);
2493	extern enum rtx_code get_index_code (const struct address_info *);
2494
2495	/* 1 if RTX is a subreg containing a reg that is already known to be
2496	sign- or zero-extended from the mode of the subreg to the mode of
2497	the reg. SUBREG_PROMOTED_UNSIGNED_P gives the signedness of the
2498	extension.
2499
2500	When used as a LHS, is means that this extension must be done
2501	when assigning to SUBREG_REG. */
2502
2503	#define SUBREG_PROMOTED_VAR_P(RTX) \
2504	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED", (RTX), SUBREG)->in_struct)
2505
2506	/* Valid for subregs which are SUBREG_PROMOTED_VAR_P(). In that case
2507	this gives the necessary extensions:
2508	0 - signed (SPR_SIGNED)
2509	1 - normal unsigned (SPR_UNSIGNED)
2510	2 - value is both sign and unsign extended for mode
2511	(SPR_SIGNED_AND_UNSIGNED).
2512	-1 - pointer unsigned, which most often can be handled like unsigned
2513	extension, except for generating instructions where we need to
2514	emit special code (ptr_extend insns) on some architectures
2515	(SPR_POINTER). */
2516
2517	const int SRP_POINTER = -1;
2518	const int SRP_SIGNED = 0;
2519	const int SRP_UNSIGNED = 1;
2520	const int SRP_SIGNED_AND_UNSIGNED = 2;
2521
2522	/* Sets promoted mode for SUBREG_PROMOTED_VAR_P(). */
2523	#define SUBREG_PROMOTED_SET(RTX, VAL) \
2524	do { \
2525	rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \
2526	(RTX), SUBREG); \
2527	switch (VAL) \
2528	{ \
2529	case SRP_POINTER: \
2530	_rtx->volatil = 0; \
2531	_rtx->unchanging = 0; \
2532	break; \
2533	case SRP_SIGNED: \
2534	_rtx->volatil = 0; \
2535	_rtx->unchanging = 1; \
2536	break; \
2537	case SRP_UNSIGNED: \
2538	_rtx->volatil = 1; \
2539	_rtx->unchanging = 0; \
2540	break; \
2541	case SRP_SIGNED_AND_UNSIGNED: \
2542	_rtx->volatil = 1; \
2543	_rtx->unchanging = 1; \
2544	break; \
2545	} \
2546	} while (0)
2547
2548	/* Gets the value stored in promoted mode for SUBREG_PROMOTED_VAR_P(),
2549	including SRP_SIGNED_AND_UNSIGNED if promoted for
2550	both signed and unsigned. */
2551	#define SUBREG_PROMOTED_GET(RTX) \
2552	(2 * (RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", (RTX), SUBREG)->volatil)\
2553	+ (RTX)->unchanging - 1)
2554
2555	/* Returns sign of promoted mode for SUBREG_PROMOTED_VAR_P(). */
2556	#define SUBREG_PROMOTED_SIGN(RTX) \
2557	((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGN", (RTX), SUBREG)->volatil) ? 1\
2558	: (RTX)->unchanging - 1)
2559
2560	/* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted
2561	for SIGNED type. */
2562	#define SUBREG_PROMOTED_SIGNED_P(RTX) \
2563	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGNED_P", (RTX), SUBREG)->unchanging)
2564
2565	/* Predicate to check if RTX of SUBREG_PROMOTED_VAR_P() is promoted
2566	for UNSIGNED type. */
2567	#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
2568	(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil)
2569
2570	/* Checks if RTX of SUBREG_PROMOTED_VAR_P() is promoted for given SIGN. */
2571	#define SUBREG_CHECK_PROMOTED_SIGN(RTX, SIGN) \
2572	((SIGN) == SRP_POINTER ? SUBREG_PROMOTED_GET (RTX) == SRP_POINTER \
2573	: (SIGN) == SRP_SIGNED ? SUBREG_PROMOTED_SIGNED_P (RTX) \
2574	: SUBREG_PROMOTED_UNSIGNED_P (RTX))
2575
2576	/* True if the REG is the static chain register for some CALL_INSN. */
2577	#define STATIC_CHAIN_REG_P(RTX) \
2578	(RTL_FLAG_CHECK1 ("STATIC_CHAIN_REG_P", (RTX), REG)->jump)
2579
2580	/* True if the subreg was generated by LRA for reload insns. Such
2581	subregs are valid only during LRA. */
2582	#define LRA_SUBREG_P(RTX) \
2583	(RTL_FLAG_CHECK1 ("LRA_SUBREG_P", (RTX), SUBREG)->jump)
2584
2585	/* Access various components of an ASM_OPERANDS rtx. */
2586
2587	#define ASM_OPERANDS_TEMPLATE(RTX) XCSTR (RTX, 0, ASM_OPERANDS)
2588	#define ASM_OPERANDS_OUTPUT_CONSTRAINT(RTX) XCSTR (RTX, 1, ASM_OPERANDS)
2589	#define ASM_OPERANDS_OUTPUT_IDX(RTX) XCINT (RTX, 2, ASM_OPERANDS)
2590	#define ASM_OPERANDS_INPUT_VEC(RTX) XCVEC (RTX, 3, ASM_OPERANDS)
2591	#define ASM_OPERANDS_INPUT_CONSTRAINT_VEC(RTX) XCVEC (RTX, 4, ASM_OPERANDS)
2592	#define ASM_OPERANDS_INPUT(RTX, N) XCVECEXP (RTX, 3, N, ASM_OPERANDS)
2593	#define ASM_OPERANDS_INPUT_LENGTH(RTX) XCVECLEN (RTX, 3, ASM_OPERANDS)
2594	#define ASM_OPERANDS_INPUT_CONSTRAINT_EXP(RTX, N) \
2595	XCVECEXP (RTX, 4, N, ASM_OPERANDS)
2596	#define ASM_OPERANDS_INPUT_CONSTRAINT(RTX, N) \
2597	XSTR (XCVECEXP (RTX, 4, N, ASM_OPERANDS), 0)
2598	#define ASM_OPERANDS_INPUT_MODE(RTX, N) \
2599	GET_MODE (XCVECEXP (RTX, 4, N, ASM_OPERANDS))
2600	#define ASM_OPERANDS_LABEL_VEC(RTX) XCVEC (RTX, 5, ASM_OPERANDS)
2601	#define ASM_OPERANDS_LABEL_LENGTH(RTX) XCVECLEN (RTX, 5, ASM_OPERANDS)
2602	#define ASM_OPERANDS_LABEL(RTX, N) XCVECEXP (RTX, 5, N, ASM_OPERANDS)
2603	#define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCUINT (RTX, 6, ASM_OPERANDS)
2604	#define ASM_INPUT_SOURCE_LOCATION(RTX) XCUINT (RTX, 1, ASM_INPUT)
2605
2606	/* 1 if RTX is a mem that is statically allocated in read-only memory. */
2607	#define MEM_READONLY_P(RTX) \
2608	(RTL_FLAG_CHECK1 ("MEM_READONLY_P", (RTX), MEM)->unchanging)
2609
2610	/* 1 if RTX is a mem and we should keep the alias set for this mem
2611	unchanged when we access a component. Set to 1, or example, when we
2612	are already in a non-addressable component of an aggregate. */
2613	#define MEM_KEEP_ALIAS_SET_P(RTX) \
2614	(RTL_FLAG_CHECK1 ("MEM_KEEP_ALIAS_SET_P", (RTX), MEM)->jump)
2615
2616	/* 1 if RTX is a mem or asm_operand for a volatile reference. */
2617	#define MEM_VOLATILE_P(RTX) \
2618	(RTL_FLAG_CHECK3 ("MEM_VOLATILE_P", (RTX), MEM, ASM_OPERANDS, \
2619	ASM_INPUT)->volatil)
2620
2621	/* 1 if RTX is a mem that cannot trap. */
2622	#define MEM_NOTRAP_P(RTX) \
2623	(RTL_FLAG_CHECK1 ("MEM_NOTRAP_P", (RTX), MEM)->call)
2624
2625	/* The memory attribute block. We provide access macros for each value
2626	in the block and provide defaults if none specified. */
2627	#define MEM_ATTRS(RTX) X0MEMATTR (RTX, 1)
2628
2629	/* The register attribute block. We provide access macros for each value
2630	in the block and provide defaults if none specified. */
2631	#define REG_ATTRS(RTX) (REG_CHECK (RTX)->attrs)
2632
2633	#ifndef GENERATOR_FILE
2634	/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias
2635	set, and may alias anything. Otherwise, the MEM can only alias
2636	MEMs in a conflicting alias set. This value is set in a
2637	language-dependent manner in the front-end, and should not be
2638	altered in the back-end. These set numbers are tested with
2639	alias_sets_conflict_p. */
2640	#define MEM_ALIAS_SET(RTX) (get_mem_attrs (RTX)->alias)
2641
2642	/* For a MEM rtx, the decl it is known to refer to, if it is known to
2643	refer to part of a DECL. It may also be a COMPONENT_REF. */
2644	#define MEM_EXPR(RTX) (get_mem_attrs (RTX)->expr)
2645
2646	/* For a MEM rtx, true if its MEM_OFFSET is known. */
2647	#define MEM_OFFSET_KNOWN_P(RTX) (get_mem_attrs (RTX)->offset_known_p)
2648
2649	/* For a MEM rtx, the offset from the start of MEM_EXPR. */
2650	#define MEM_OFFSET(RTX) (get_mem_attrs (RTX)->offset)
2651
2652	/* For a MEM rtx, the address space. */
2653	#define MEM_ADDR_SPACE(RTX) (get_mem_attrs (RTX)->addrspace)
2654
2655	/* For a MEM rtx, true if its MEM_SIZE is known. */
2656	#define MEM_SIZE_KNOWN_P(RTX) (get_mem_attrs (RTX)->size_known_p)
2657
2658	/* For a MEM rtx, the size in bytes of the MEM. */
2659	#define MEM_SIZE(RTX) (get_mem_attrs (RTX)->size)
2660
2661	/* For a MEM rtx, the alignment in bits. We can use the alignment of the
2662	mode as a default when STRICT_ALIGNMENT, but not if not. */
2663	#define MEM_ALIGN(RTX) (get_mem_attrs (RTX)->align)
2664	#else
2665	#define MEM_ADDR_SPACE(RTX) ADDR_SPACE_GENERIC
2666	#endif
2667
2668	/* For a REG rtx, the decl it is known to refer to, if it is known to
2669	refer to part of a DECL. */
2670	#define REG_EXPR(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->decl)
2671
2672	/* For a REG rtx, the offset from the start of REG_EXPR, if known, as an
2673	HOST_WIDE_INT. */
2674	#define REG_OFFSET(RTX) (REG_ATTRS (RTX) == 0 ? 0 : REG_ATTRS (RTX)->offset)
2675
2676	/* Copy the attributes that apply to memory locations from RHS to LHS. */
2677	#define MEM_COPY_ATTRIBUTES(LHS, RHS) \
2678	(MEM_VOLATILE_P (LHS) = MEM_VOLATILE_P (RHS), \
2679	MEM_NOTRAP_P (LHS) = MEM_NOTRAP_P (RHS), \
2680	MEM_READONLY_P (LHS) = MEM_READONLY_P (RHS), \
2681	MEM_KEEP_ALIAS_SET_P (LHS) = MEM_KEEP_ALIAS_SET_P (RHS), \
2682	MEM_POINTER (LHS) = MEM_POINTER (RHS), \
2683	MEM_ATTRS (LHS) = MEM_ATTRS (RHS))
2684
2685	/* 1 if RTX is a label_ref for a nonlocal label. */
2686	/* Likewise in an expr_list for a REG_LABEL_OPERAND or
2687	REG_LABEL_TARGET note. */
2688	#define LABEL_REF_NONLOCAL_P(RTX) \
2689	(RTL_FLAG_CHECK1 ("LABEL_REF_NONLOCAL_P", (RTX), LABEL_REF)->volatil)
2690
2691	/* 1 if RTX is a code_label that should always be considered to be needed. */
2692	#define LABEL_PRESERVE_P(RTX) \
2693	(RTL_FLAG_CHECK2 ("LABEL_PRESERVE_P", (RTX), CODE_LABEL, NOTE)->in_struct)
2694
2695	/* During sched, 1 if RTX is an insn that must be scheduled together
2696	with the preceding insn. */
2697	#define SCHED_GROUP_P(RTX) \
2698	(RTL_FLAG_CHECK4 ("SCHED_GROUP_P", (RTX), DEBUG_INSN, INSN, \
2699	JUMP_INSN, CALL_INSN)->in_struct)
2700
2701	/* For a SET rtx, SET_DEST is the place that is set
2702	and SET_SRC is the value it is set to. */
2703	#define SET_DEST(RTX) XC2EXP (RTX, 0, SET, CLOBBER)
2704	#define SET_SRC(RTX) XCEXP (RTX, 1, SET)
2705	#define SET_IS_RETURN_P(RTX) \
2706	(RTL_FLAG_CHECK1 ("SET_IS_RETURN_P", (RTX), SET)->jump)
2707
2708	/* For a TRAP_IF rtx, TRAP_CONDITION is an expression. */
2709	#define TRAP_CONDITION(RTX) XCEXP (RTX, 0, TRAP_IF)
2710	#define TRAP_CODE(RTX) XCEXP (RTX, 1, TRAP_IF)
2711
2712	/* For a COND_EXEC rtx, COND_EXEC_TEST is the condition to base
2713	conditionally executing the code on, COND_EXEC_CODE is the code
2714	to execute if the condition is true. */
2715	#define COND_EXEC_TEST(RTX) XCEXP (RTX, 0, COND_EXEC)
2716	#define COND_EXEC_CODE(RTX) XCEXP (RTX, 1, COND_EXEC)
2717
2718	/* 1 if RTX is a symbol_ref that addresses this function's rtl
2719	constants pool. */
2720	#define CONSTANT_POOL_ADDRESS_P(RTX) \
2721	(RTL_FLAG_CHECK1 ("CONSTANT_POOL_ADDRESS_P", (RTX), SYMBOL_REF)->unchanging)
2722
2723	/* 1 if RTX is a symbol_ref that addresses a value in the file's
2724	tree constant pool. This information is private to varasm.cc. */
2725	#define TREE_CONSTANT_POOL_ADDRESS_P(RTX) \
2726	(RTL_FLAG_CHECK1 ("TREE_CONSTANT_POOL_ADDRESS_P", \
2727	(RTX), SYMBOL_REF)->frame_related)
2728
2729	/* Used if RTX is a symbol_ref, for machine-specific purposes. */
2730	#define SYMBOL_REF_FLAG(RTX) \
2731	(RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAG", (RTX), SYMBOL_REF)->volatil)
2732
2733	/* 1 if RTX is a symbol_ref that has been the library function in
2734	emit_library_call. */
2735	#define SYMBOL_REF_USED(RTX) \
2736	(RTL_FLAG_CHECK1 ("SYMBOL_REF_USED", (RTX), SYMBOL_REF)->used)
2737
2738	/* 1 if RTX is a symbol_ref for a weak symbol. */
2739	#define SYMBOL_REF_WEAK(RTX) \
2740	(RTL_FLAG_CHECK1 ("SYMBOL_REF_WEAK", (RTX), SYMBOL_REF)->return_val)
2741
2742	/* A pointer attached to the SYMBOL_REF; either SYMBOL_REF_DECL or
2743	SYMBOL_REF_CONSTANT. */
2744	#define SYMBOL_REF_DATA(RTX) X0ANY ((RTX), 1)
2745
2746	/* Set RTX's SYMBOL_REF_DECL to DECL. RTX must not be a constant
2747	pool symbol. */
2748	#define SET_SYMBOL_REF_DECL(RTX, DECL) \
2749	(gcc_assert (!CONSTANT_POOL_ADDRESS_P (RTX)), X0TREE ((RTX), 1) = (DECL))
2750
2751	/* The tree (decl or constant) associated with the symbol, or null. */
2752	#define SYMBOL_REF_DECL(RTX) \
2753	(CONSTANT_POOL_ADDRESS_P (RTX) ? NULL : X0TREE ((RTX), 1))
2754
2755	/* Set RTX's SYMBOL_REF_CONSTANT to C. RTX must be a constant pool symbol. */
2756	#define SET_SYMBOL_REF_CONSTANT(RTX, C) \
2757	(gcc_assert (CONSTANT_POOL_ADDRESS_P (RTX)), X0CONSTANT ((RTX), 1) = (C))
2758
2759	/* The rtx constant pool entry for a symbol, or null. */
2760	#define SYMBOL_REF_CONSTANT(RTX) \
2761	(CONSTANT_POOL_ADDRESS_P (RTX) ? X0CONSTANT ((RTX), 1) : NULL)
2762
2763	/* A set of flags on a symbol_ref that are, in some respects, redundant with
2764	information derivable from the tree decl associated with this symbol.
2765	Except that we build a *lot* of SYMBOL_REFs that aren't associated with a
2766	decl. In some cases this is a bug. But beyond that, it's nice to cache
2767	this information to avoid recomputing it. Finally, this allows space for
2768	the target to store more than one bit of information, as with
2769	SYMBOL_REF_FLAG. */
2770	#define SYMBOL_REF_FLAGS(RTX) \
2771	(RTL_FLAG_CHECK1 ("SYMBOL_REF_FLAGS", (RTX), SYMBOL_REF) \
2772	->u2.symbol_ref_flags)
2773
2774	/* These flags are common enough to be defined for all targets. They
2775	are computed by the default version of targetm.encode_section_info. */
2776
2777	/* Set if this symbol is a function. */
2778	#define SYMBOL_FLAG_FUNCTION (1 << 0)
2779	#define SYMBOL_REF_FUNCTION_P(RTX) \
2780	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_FUNCTION) != 0)
2781	/* Set if targetm.binds_local_p is true. */
2782	#define SYMBOL_FLAG_LOCAL (1 << 1)
2783	#define SYMBOL_REF_LOCAL_P(RTX) \
2784	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_LOCAL) != 0)
2785	/* Set if targetm.in_small_data_p is true. */
2786	#define SYMBOL_FLAG_SMALL (1 << 2)
2787	#define SYMBOL_REF_SMALL_P(RTX) \
2788	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_SMALL) != 0)
2789	/* The three-bit field at [5:3] is true for TLS variables; use
2790	SYMBOL_REF_TLS_MODEL to extract the field as an enum tls_model. */
2791	#define SYMBOL_FLAG_TLS_SHIFT 3
2792	#define SYMBOL_REF_TLS_MODEL(RTX) \
2793	((enum tls_model) ((SYMBOL_REF_FLAGS (RTX) >> SYMBOL_FLAG_TLS_SHIFT) & 7))
2794	/* Set if this symbol is not defined in this translation unit. */
2795	#define SYMBOL_FLAG_EXTERNAL (1 << 6)
2796	#define SYMBOL_REF_EXTERNAL_P(RTX) \
2797	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_EXTERNAL) != 0)
2798	/* Set if this symbol has a block_symbol structure associated with it. */
2799	#define SYMBOL_FLAG_HAS_BLOCK_INFO (1 << 7)
2800	#define SYMBOL_REF_HAS_BLOCK_INFO_P(RTX) \
2801	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_HAS_BLOCK_INFO) != 0)
2802	/* Set if this symbol is a section anchor. SYMBOL_REF_ANCHOR_P implies
2803	SYMBOL_REF_HAS_BLOCK_INFO_P. */
2804	#define SYMBOL_FLAG_ANCHOR (1 << 8)
2805	#define SYMBOL_REF_ANCHOR_P(RTX) \
2806	((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_ANCHOR) != 0)
2807
2808	/* Subsequent bits are available for the target to use. */
2809	#define SYMBOL_FLAG_MACH_DEP_SHIFT 9
2810	#define SYMBOL_FLAG_MACH_DEP (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
2811
2812	/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the object_block
2813	structure to which the symbol belongs, or NULL if it has not been
2814	assigned a block. */
2815	#define SYMBOL_REF_BLOCK(RTX) (BLOCK_SYMBOL_CHECK (RTX)->block)
2816
2817	/* If SYMBOL_REF_HAS_BLOCK_INFO_P (RTX), this is the offset of RTX from
2818	the first object in SYMBOL_REF_BLOCK (RTX). The value is negative if
2819	RTX has not yet been assigned to a block, or it has not been given an
2820	offset within that block. */
2821	#define SYMBOL_REF_BLOCK_OFFSET(RTX) (BLOCK_SYMBOL_CHECK (RTX)->offset)
2822
2823	/* True if RTX is flagged to be a scheduling barrier. */
2824	#define PREFETCH_SCHEDULE_BARRIER_P(RTX) \
2825	(RTL_FLAG_CHECK1 ("PREFETCH_SCHEDULE_BARRIER_P", (RTX), PREFETCH)->volatil)
2826
2827	/* Indicate whether the machine has any sort of auto increment addressing.
2828	If not, we can avoid checking for REG_INC notes. */
2829
2830	#if (defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) \
2831	|| defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) \
2832	|| defined (HAVE_PRE_MODIFY_DISP) || defined (HAVE_POST_MODIFY_DISP) \
2833	|| defined (HAVE_PRE_MODIFY_REG) || defined (HAVE_POST_MODIFY_REG))
2834	#define AUTO_INC_DEC 1
2835	#else
2836	#define AUTO_INC_DEC 0
2837	#endif
2838
2839	/* Define a macro to look for REG_INC notes,
2840	but save time on machines where they never exist. */
2841
2842	#if AUTO_INC_DEC
2843	#define FIND_REG_INC_NOTE(INSN, REG) \
2844	((REG) != NULL_RTX && REG_P ((REG)) \
2845	? find_regno_note ((INSN), REG_INC, REGNO (REG)) \
2846	: find_reg_note ((INSN), REG_INC, (REG)))
2847	#else
2848	#define FIND_REG_INC_NOTE(INSN, REG) 0
2849	#endif
2850
2851	#ifndef HAVE_PRE_INCREMENT
2852	#define HAVE_PRE_INCREMENT 0
2853	#endif
2854
2855	#ifndef HAVE_PRE_DECREMENT
2856	#define HAVE_PRE_DECREMENT 0
2857	#endif
2858
2859	#ifndef HAVE_POST_INCREMENT
2860	#define HAVE_POST_INCREMENT 0
2861	#endif
2862
2863	#ifndef HAVE_POST_DECREMENT
2864	#define HAVE_POST_DECREMENT 0
2865	#endif
2866
2867	#ifndef HAVE_POST_MODIFY_DISP
2868	#define HAVE_POST_MODIFY_DISP 0
2869	#endif
2870
2871	#ifndef HAVE_POST_MODIFY_REG
2872	#define HAVE_POST_MODIFY_REG 0
2873	#endif
2874
2875	#ifndef HAVE_PRE_MODIFY_DISP
2876	#define HAVE_PRE_MODIFY_DISP 0
2877	#endif
2878
2879	#ifndef HAVE_PRE_MODIFY_REG
2880	#define HAVE_PRE_MODIFY_REG 0
2881	#endif
2882
2883
2884	/* Some architectures do not have complete pre/post increment/decrement
2885	instruction sets, or only move some modes efficiently. These macros
2886	allow us to tune autoincrement generation. */
2887
2888	#ifndef USE_LOAD_POST_INCREMENT
2889	#define USE_LOAD_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
2890	#endif
2891
2892	#ifndef USE_LOAD_POST_DECREMENT
2893	#define USE_LOAD_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
2894	#endif
2895
2896	#ifndef USE_LOAD_PRE_INCREMENT
2897	#define USE_LOAD_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
2898	#endif
2899
2900	#ifndef USE_LOAD_PRE_DECREMENT
2901	#define USE_LOAD_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
2902	#endif
2903
2904	#ifndef USE_STORE_POST_INCREMENT
2905	#define USE_STORE_POST_INCREMENT(MODE) HAVE_POST_INCREMENT
2906	#endif
2907
2908	#ifndef USE_STORE_POST_DECREMENT
2909	#define USE_STORE_POST_DECREMENT(MODE) HAVE_POST_DECREMENT
2910	#endif
2911
2912	#ifndef USE_STORE_PRE_INCREMENT
2913	#define USE_STORE_PRE_INCREMENT(MODE) HAVE_PRE_INCREMENT
2914	#endif
2915
2916	#ifndef USE_STORE_PRE_DECREMENT
2917	#define USE_STORE_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
2918	#endif
2919
2920	/* Nonzero when we are generating CONCATs. */
2921	extern int generating_concat_p;
2922
2923	/* Nonzero when we are expanding trees to RTL. */
2924	extern int currently_expanding_to_rtl;
2925
2926	/* Generally useful functions. */
2927
2928	#ifndef GENERATOR_FILE
2929	/* Return the cost of SET X. SPEED_P is true if optimizing for speed
2930	rather than size. */
2931
2932	inline int
2933	set_rtx_cost (rtx x, bool speed_p)
2934	{
2935	return rtx_cost (x, VOIDmode, INSN, 4, speed_p);
2936	}
2937
2938	/* Like set_rtx_cost, but return both the speed and size costs in C. */
2939
2940	inline void
2941	get_full_set_rtx_cost (rtx x, struct full_rtx_costs *c)
2942	{
2943	get_full_rtx_cost (x, VOIDmode, INSN, 4, c);
2944	}
2945
2946	/* Return the cost of moving X into a register, relative to the cost
2947	of a register move. SPEED_P is true if optimizing for speed rather
2948	than size. */
2949
2950	inline int
2951	set_src_cost (rtx x, machine_mode mode, bool speed_p)
2952	{
2953	return rtx_cost (x, mode, SET, 1, speed_p);
2954	}
2955
2956	/* Like set_src_cost, but return both the speed and size costs in C. */
2957
2958	inline void
2959	get_full_set_src_cost (rtx x, machine_mode mode, struct full_rtx_costs *c)
2960	{
2961	get_full_rtx_cost (x, mode, SET, 1, c);
2962	}
2963	#endif
2964
2965	/* A convenience macro to validate the arguments of a zero_extract
2966	expression. It determines whether SIZE lies inclusively within
2967	[1, RANGE], POS lies inclusively within between [0, RANGE - 1]
2968	and the sum lies inclusively within [1, RANGE]. RANGE must be
2969	>= 1, but SIZE and POS may be negative. */
2970	#define EXTRACT_ARGS_IN_RANGE(SIZE, POS, RANGE) \
2971	(IN_RANGE ((POS), 0, (unsigned HOST_WIDE_INT) (RANGE) - 1) \
2972	&& IN_RANGE ((SIZE), 1, (unsigned HOST_WIDE_INT) (RANGE) \
2973	- (unsigned HOST_WIDE_INT)(POS)))
2974
2975	/* In explow.cc */
2976	extern HOST_WIDE_INT trunc_int_for_mode (HOST_WIDE_INT, machine_mode);
2977	extern poly_int64 trunc_int_for_mode (poly_int64, machine_mode);
2978	extern rtx plus_constant (machine_mode, rtx, poly_int64, bool = false);
2979	extern HOST_WIDE_INT get_stack_check_protect (void);
2980
2981	/* In rtl.cc */
2982	extern rtx rtx_alloc (RTX_CODE CXX_MEM_STAT_INFO);
2983	inline rtx
2984	rtx_init (rtx rt, RTX_CODE code)
2985	{
2986	memset (s: rt, c: 0, RTX_HDR_SIZE);
2987	PUT_CODE (rt, code);
2988	return rt;
2989	}
2990	#define rtx_alloca(code) \
2991	rtx_init ((rtx) alloca (RTX_CODE_SIZE ((code))), (code))
2992	extern rtx rtx_alloc_stat_v (RTX_CODE MEM_STAT_DECL, int);
2993	#define rtx_alloc_v(c, SZ) rtx_alloc_stat_v (c MEM_STAT_INFO, SZ)
2994	#define const_wide_int_alloc(NWORDS) \
2995	rtx_alloc_v (CONST_WIDE_INT, \
2996	(sizeof (struct hwivec_def) \
2997	+ ((NWORDS)-1) * sizeof (HOST_WIDE_INT))) \
2998
2999	extern rtvec rtvec_alloc (size_t);
3000	extern rtvec shallow_copy_rtvec (rtvec);
3001	extern bool shared_const_p (const_rtx);
3002	extern rtx copy_rtx (rtx);
3003	extern enum rtx_code classify_insn (rtx);
3004	extern void dump_rtx_statistics (void);
3005
3006	/* In emit-rtl.cc */
3007	extern rtx copy_rtx_if_shared (rtx);
3008
3009	/* In rtl.cc */
3010	extern unsigned int rtx_size (const_rtx);
3011	extern rtx shallow_copy_rtx (const_rtx CXX_MEM_STAT_INFO);
3012
3013	typedef bool (*rtx_equal_p_callback_function) (const_rtx *, const_rtx *,
3014	rtx *, rtx *);
3015	extern bool rtx_equal_p (const_rtx, const_rtx,
3016	rtx_equal_p_callback_function = NULL);
3017
3018	extern bool rtvec_all_equal_p (const_rtvec);
3019	extern bool rtvec_series_p (rtvec, int);
3020
3021	/* Return true if X is a vector constant with a duplicated element value. */
3022
3023	inline bool
3024	const_vec_duplicate_p (const_rtx x)
3025	{
3026	return (GET_CODE (x) == CONST_VECTOR
3027	&& CONST_VECTOR_NPATTERNS (x) == 1
3028	&& CONST_VECTOR_DUPLICATE_P (x));
3029	}
3030
3031	/* Return true if X is a vector constant with a duplicated element value.
3032	Store the duplicated element in *ELT if so. */
3033
3034	template <typename T>
3035	inline bool
3036	const_vec_duplicate_p (T x, T *elt)
3037	{
3038	if (const_vec_duplicate_p (x))
3039	{
3040	*elt = CONST_VECTOR_ENCODED_ELT (x, 0);
3041	return true;
3042	}
3043	return false;
3044	}
3045
3046	/* Return true if X is a vector with a duplicated element value, either
3047	constant or nonconstant. Store the duplicated element in *ELT if so. */
3048
3049	template <typename T>
3050	inline bool
3051	vec_duplicate_p (T x, T *elt)
3052	{
3053	if (GET_CODE (x) == VEC_DUPLICATE
3054	&& !VECTOR_MODE_P (GET_MODE (XEXP (x, 0))))
3055	{
3056	*elt = XEXP (x, 0);
3057	return true;
3058	}
3059	return const_vec_duplicate_p (x, elt);
3060	}
3061
3062	/* If X is a vector constant with a duplicated element value, return that
3063	element value, otherwise return X. */
3064
3065	template <typename T>
3066	inline T
3067	unwrap_const_vec_duplicate (T x)
3068	{
3069	if (const_vec_duplicate_p (x))
3070	x = CONST_VECTOR_ELT (x, 0);
3071	return x;
3072	}
3073
3074	/* In emit-rtl.cc. */
3075	extern wide_int const_vector_int_elt (const_rtx, unsigned int);
3076	extern rtx const_vector_elt (const_rtx, unsigned int);
3077	extern bool const_vec_series_p_1 (const_rtx, rtx *, rtx *);
3078
3079	/* Return true if X is an integer constant vector that contains a linear
3080	series of the form:
3081
3082	{ B, B + S, B + 2 * S, B + 3 * S, ... }
3083
3084	for a nonzero S. Store B and S in *BASE_OUT and *STEP_OUT on sucess. */
3085
3086	inline bool
3087	const_vec_series_p (const_rtx x, rtx *base_out, rtx *step_out)
3088	{
3089	if (GET_CODE (x) == CONST_VECTOR
3090	&& CONST_VECTOR_NPATTERNS (x) == 1
3091	&& !CONST_VECTOR_DUPLICATE_P (x))
3092	return const_vec_series_p_1 (x, base_out, step_out);
3093	return false;
3094	}
3095
3096	/* Return true if X is a vector that contains a linear series of the
3097	form:
3098
3099	{ B, B + S, B + 2 * S, B + 3 * S, ... }
3100
3101	where B and S are constant or nonconstant. Store B and S in
3102	*BASE_OUT and *STEP_OUT on sucess. */
3103
3104	inline bool
3105	vec_series_p (const_rtx x, rtx *base_out, rtx *step_out)
3106	{
3107	if (GET_CODE (x) == VEC_SERIES)
3108	{
3109	*base_out = XEXP (x, 0);
3110	*step_out = XEXP (x, 1);
3111	return true;
3112	}
3113	return const_vec_series_p (x, base_out, step_out);
3114	}
3115
3116	/* Return true if CONST_VECTORs X and Y, which are known to have the same mode,
3117	also have the same encoding. This means that they are equal whenever their
3118	operands are equal. */
3119
3120	inline bool
3121	same_vector_encodings_p (const_rtx x, const_rtx y)
3122	{
3123	/* Don't be fussy about the encoding of constant-length vectors,
3124	since XVECEXP (X, 0) and XVECEXP (Y, 0) list all the elements anyway. */
3125	if (poly_uint64 (CONST_VECTOR_NUNITS (x)).is_constant ())
3126	return true;
3127
3128	return (CONST_VECTOR_NPATTERNS (x) == CONST_VECTOR_NPATTERNS (y)
3129	&& (CONST_VECTOR_NELTS_PER_PATTERN (x)
3130	== CONST_VECTOR_NELTS_PER_PATTERN (y)));
3131	}
3132
3133	/* Return the unpromoted (outer) mode of SUBREG_PROMOTED_VAR_P subreg X. */
3134
3135	inline scalar_int_mode
3136	subreg_unpromoted_mode (rtx x)
3137	{
3138	gcc_checking_assert (SUBREG_PROMOTED_VAR_P (x));
3139	return as_a <scalar_int_mode> (GET_MODE (x));
3140	}
3141
3142	/* Return the promoted (inner) mode of SUBREG_PROMOTED_VAR_P subreg X. */
3143
3144	inline scalar_int_mode
3145	subreg_promoted_mode (rtx x)
3146	{
3147	gcc_checking_assert (SUBREG_PROMOTED_VAR_P (x));
3148	return as_a <scalar_int_mode> (GET_MODE (SUBREG_REG (x)));
3149	}
3150
3151	/* In emit-rtl.cc */
3152	extern rtvec gen_rtvec_v (int, rtx *);
3153	extern rtvec gen_rtvec_v (int, rtx_insn **);
3154	extern rtx gen_reg_rtx (machine_mode);
3155	extern rtx gen_rtx_REG_offset (rtx, machine_mode, unsigned int, poly_int64);
3156	extern rtx gen_reg_rtx_offset (rtx, machine_mode, int);
3157	extern rtx gen_reg_rtx_and_attrs (rtx);
3158	extern rtx_code_label *gen_label_rtx (void);
3159	extern rtx gen_lowpart_common (machine_mode, rtx);
3160
3161	/* In cse.cc */
3162	extern rtx gen_lowpart_if_possible (machine_mode, rtx);
3163
3164	/* In emit-rtl.cc */
3165	extern rtx gen_highpart (machine_mode, rtx);
3166	extern rtx gen_highpart_mode (machine_mode, machine_mode, rtx);
3167	extern rtx operand_subword (rtx, poly_uint64, int, machine_mode);
3168
3169	/* In emit-rtl.cc */
3170	extern rtx operand_subword_force (rtx, poly_uint64, machine_mode);
3171	extern bool subreg_lowpart_p (const_rtx);
3172	extern poly_uint64 subreg_size_lowpart_offset (poly_uint64, poly_uint64);
3173
3174	/* Return true if a subreg of mode OUTERMODE would only access part of
3175	an inner register with mode INNERMODE. The other bits of the inner
3176	register would then be "don't care" on read. The behavior for writes
3177	depends on REGMODE_NATURAL_SIZE; bits in the same REGMODE_NATURAL_SIZE-d
3178	chunk would be clobbered but other bits would be preserved. */
3179
3180	inline bool
3181	partial_subreg_p (machine_mode outermode, machine_mode innermode)
3182	{
3183	/* Modes involved in a subreg must be ordered. In particular, we must
3184	always know at compile time whether the subreg is paradoxical. */
3185	poly_int64 outer_prec = GET_MODE_PRECISION (mode: outermode);
3186	poly_int64 inner_prec = GET_MODE_PRECISION (mode: innermode);
3187	gcc_checking_assert (ordered_p (outer_prec, inner_prec));
3188	return maybe_lt (a: outer_prec, b: inner_prec);
3189	}
3190
3191	/* Likewise return true if X is a subreg that is smaller than the inner
3192	register. Use read_modify_subreg_p to test whether writing to such
3193	a subreg preserves any part of the inner register. */
3194
3195	inline bool
3196	partial_subreg_p (const_rtx x)
3197	{
3198	if (GET_CODE (x) != SUBREG)
3199	return false;
3200	return partial_subreg_p (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3201	}
3202
3203	/* Return true if a subreg with the given outer and inner modes is
3204	paradoxical. */
3205
3206	inline bool
3207	paradoxical_subreg_p (machine_mode outermode, machine_mode innermode)
3208	{
3209	/* Modes involved in a subreg must be ordered. In particular, we must
3210	always know at compile time whether the subreg is paradoxical. */
3211	poly_int64 outer_prec = GET_MODE_PRECISION (mode: outermode);
3212	poly_int64 inner_prec = GET_MODE_PRECISION (mode: innermode);
3213	gcc_checking_assert (ordered_p (outer_prec, inner_prec));
3214	return maybe_gt (outer_prec, inner_prec);
3215	}
3216
3217	/* Return true if X is a paradoxical subreg, false otherwise. */
3218
3219	inline bool
3220	paradoxical_subreg_p (const_rtx x)
3221	{
3222	if (GET_CODE (x) != SUBREG)
3223	return false;
3224	return paradoxical_subreg_p (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3225	}
3226
3227	/* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
3228
3229	inline poly_uint64
3230	subreg_lowpart_offset (machine_mode outermode, machine_mode innermode)
3231	{
3232	return subreg_size_lowpart_offset (GET_MODE_SIZE (mode: outermode),
3233	GET_MODE_SIZE (mode: innermode));
3234	}
3235
3236	/* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE,
3237	return the smaller of the two modes if they are different sizes,
3238	otherwise return the outer mode. */
3239
3240	inline machine_mode
3241	narrower_subreg_mode (machine_mode outermode, machine_mode innermode)
3242	{
3243	return paradoxical_subreg_p (outermode, innermode) ? innermode : outermode;
3244	}
3245
3246	/* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE,
3247	return the mode that is big enough to hold both the outer and inner
3248	values. Prefer the outer mode in the event of a tie. */
3249
3250	inline machine_mode
3251	wider_subreg_mode (machine_mode outermode, machine_mode innermode)
3252	{
3253	return partial_subreg_p (outermode, innermode) ? innermode : outermode;
3254	}
3255
3256	/* Likewise for subreg X. */
3257
3258	inline machine_mode
3259	wider_subreg_mode (const_rtx x)
3260	{
3261	return wider_subreg_mode (GET_MODE (x), GET_MODE (SUBREG_REG (x)));
3262	}
3263
3264	extern poly_uint64 subreg_size_highpart_offset (poly_uint64, poly_uint64);
3265
3266	/* Return the SUBREG_BYTE for an OUTERMODE highpart of an INNERMODE value. */
3267
3268	inline poly_uint64
3269	subreg_highpart_offset (machine_mode outermode, machine_mode innermode)
3270	{
3271	return subreg_size_highpart_offset (GET_MODE_SIZE (mode: outermode),
3272	GET_MODE_SIZE (mode: innermode));
3273	}
3274
3275	extern poly_int64 byte_lowpart_offset (machine_mode, machine_mode);
3276	extern poly_int64 subreg_memory_offset (machine_mode, machine_mode,
3277	poly_uint64);
3278	extern poly_int64 subreg_memory_offset (const_rtx);
3279	extern rtx make_safe_from (rtx, rtx);
3280	extern rtx convert_memory_address_addr_space_1 (scalar_int_mode, rtx,
3281	addr_space_t, bool, bool);
3282	extern rtx convert_memory_address_addr_space (scalar_int_mode, rtx,
3283	addr_space_t);
3284	#define convert_memory_address(to_mode,x) \
3285	convert_memory_address_addr_space ((to_mode), (x), ADDR_SPACE_GENERIC)
3286	extern const char *get_insn_name (int);
3287	extern rtx_insn *get_last_insn_anywhere (void);
3288	extern rtx_insn *get_first_nonnote_insn (void);
3289	extern rtx_insn *get_last_nonnote_insn (void);
3290	extern void start_sequence (void);
3291	extern void push_to_sequence (rtx_insn *);
3292	extern void push_to_sequence2 (rtx_insn *, rtx_insn *);
3293	extern void end_sequence (void);
3294	#if TARGET_SUPPORTS_WIDE_INT == 0
3295	extern double_int rtx_to_double_int (const_rtx);
3296	#endif
3297	extern void cwi_output_hex (FILE *, const_rtx);
3298	#if TARGET_SUPPORTS_WIDE_INT == 0
3299	extern rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT,
3300	machine_mode);
3301	#endif
3302	extern rtx immed_wide_int_const (const poly_wide_int_ref &, machine_mode);
3303
3304	/* In varasm.cc */
3305	extern rtx force_const_mem (machine_mode, rtx);
3306
3307	/* In varasm.cc */
3308
3309	struct function;
3310	extern rtx get_pool_constant (const_rtx);
3311	extern rtx get_pool_constant_mark (rtx, bool *);
3312	extern fixed_size_mode get_pool_mode (const_rtx);
3313	extern rtx simplify_subtraction (rtx);
3314	extern void decide_function_section (tree);
3315
3316	/* In emit-rtl.cc */
3317	extern rtx_insn *emit_insn_before (rtx, rtx_insn *);
3318	extern rtx_insn *emit_insn_before_noloc (rtx, rtx_insn *, basic_block);
3319	extern rtx_insn *emit_insn_before_setloc (rtx, rtx_insn *, location_t);
3320	extern rtx_jump_insn *emit_jump_insn_before (rtx, rtx_insn *);
3321	extern rtx_jump_insn *emit_jump_insn_before_noloc (rtx, rtx_insn *);
3322	extern rtx_jump_insn *emit_jump_insn_before_setloc (rtx, rtx_insn *,
3323	location_t);
3324	extern rtx_insn *emit_call_insn_before (rtx, rtx_insn *);
3325	extern rtx_insn *emit_call_insn_before_noloc (rtx, rtx_insn *);
3326	extern rtx_insn *emit_call_insn_before_setloc (rtx, rtx_insn *, location_t);
3327	extern rtx_insn *emit_debug_insn_before (rtx, rtx_insn *);
3328	extern rtx_insn *emit_debug_insn_before_noloc (rtx, rtx_insn *);
3329	extern rtx_insn *emit_debug_insn_before_setloc (rtx, rtx_insn *, location_t);
3330	extern rtx_barrier *emit_barrier_before (rtx_insn *);
3331	extern rtx_code_label *emit_label_before (rtx_code_label *, rtx_insn *);
3332	extern rtx_note *emit_note_before (enum insn_note, rtx_insn *);
3333	extern rtx_insn *emit_insn_after (rtx, rtx_insn *);
3334	extern rtx_insn *emit_insn_after_noloc (rtx, rtx_insn *, basic_block);
3335	extern rtx_insn *emit_insn_after_setloc (rtx, rtx_insn *, location_t);
3336	extern rtx_jump_insn *emit_jump_insn_after (rtx, rtx_insn *);
3337	extern rtx_jump_insn *emit_jump_insn_after_noloc (rtx, rtx_insn *);
3338	extern rtx_jump_insn *emit_jump_insn_after_setloc (rtx, rtx_insn *, location_t);
3339	extern rtx_insn *emit_call_insn_after (rtx, rtx_insn *);
3340	extern rtx_insn *emit_call_insn_after_noloc (rtx, rtx_insn *);
3341	extern rtx_insn *emit_call_insn_after_setloc (rtx, rtx_insn *, location_t);
3342	extern rtx_insn *emit_debug_insn_after (rtx, rtx_insn *);
3343	extern rtx_insn *emit_debug_insn_after_noloc (rtx, rtx_insn *);
3344	extern rtx_insn *emit_debug_insn_after_setloc (rtx, rtx_insn *, location_t);
3345	extern rtx_barrier *emit_barrier_after (rtx_insn *);
3346	extern rtx_insn *emit_label_after (rtx_insn *, rtx_insn *);
3347	extern rtx_note *emit_note_after (enum insn_note, rtx_insn *);
3348	extern rtx_insn *emit_insn (rtx);
3349	extern rtx_insn *emit_debug_insn (rtx);
3350	extern rtx_insn *emit_jump_insn (rtx);
3351	extern rtx_insn *emit_likely_jump_insn (rtx);
3352	extern rtx_insn *emit_unlikely_jump_insn (rtx);
3353	extern rtx_insn *emit_call_insn (rtx);
3354	extern rtx_code_label *emit_label (rtx);
3355	extern rtx_jump_table_data *emit_jump_table_data (rtx);
3356	extern rtx_barrier *emit_barrier (void);
3357	extern rtx_note *emit_note (enum insn_note);
3358	extern rtx_note *emit_note_copy (rtx_note *);
3359	extern rtx_insn *gen_clobber (rtx);
3360	extern rtx_insn *emit_clobber (rtx);
3361	extern rtx_insn *gen_use (rtx);
3362	extern rtx_insn *emit_use (rtx);
3363	extern rtx_insn *make_insn_raw (rtx);
3364	extern void add_function_usage_to (rtx, rtx);
3365	extern rtx_call_insn *last_call_insn (void);
3366	extern rtx_insn *previous_insn (rtx_insn *);
3367	extern rtx_insn *next_insn (rtx_insn *);
3368	extern rtx_insn *prev_nonnote_insn (rtx_insn *);
3369	extern rtx_insn *next_nonnote_insn (rtx_insn *);
3370	extern rtx_insn *prev_nondebug_insn (rtx_insn *);
3371	extern rtx_insn *next_nondebug_insn (rtx_insn *);
3372	extern rtx_insn *prev_nonnote_nondebug_insn (rtx_insn *);
3373	extern rtx_insn *prev_nonnote_nondebug_insn_bb (rtx_insn *);
3374	extern rtx_insn *next_nonnote_nondebug_insn (rtx_insn *);
3375	extern rtx_insn *next_nonnote_nondebug_insn_bb (rtx_insn *);
3376	extern rtx_insn *prev_real_insn (rtx_insn *);
3377	extern rtx_insn *next_real_insn (rtx_insn *);
3378	extern rtx_insn *prev_real_nondebug_insn (rtx_insn *);
3379	extern rtx_insn *next_real_nondebug_insn (rtx);
3380	extern rtx_insn *prev_active_insn (rtx_insn *);
3381	extern rtx_insn *next_active_insn (rtx_insn *);
3382	extern bool active_insn_p (const rtx_insn *);
3383
3384	/* In emit-rtl.cc */
3385	extern int insn_line (const rtx_insn *);
3386	extern const char * insn_file (const rtx_insn *);
3387	extern tree insn_scope (const rtx_insn *);
3388	extern expanded_location insn_location (const rtx_insn *);
3389	extern int insn_discriminator (const rtx_insn *);
3390	extern location_t prologue_location, epilogue_location;
3391
3392	/* In jump.cc */
3393	extern enum rtx_code reverse_condition (enum rtx_code);
3394	extern enum rtx_code reverse_condition_maybe_unordered (enum rtx_code);
3395	extern enum rtx_code swap_condition (enum rtx_code);
3396	extern enum rtx_code unsigned_condition (enum rtx_code);
3397	extern enum rtx_code signed_condition (enum rtx_code);
3398	extern void mark_jump_label (rtx, rtx_insn *, int);
3399
3400	/* Return true if integer comparison operator CODE interprets its operands
3401	as unsigned. */
3402
3403	inline bool
3404	unsigned_condition_p (enum rtx_code code)
3405	{
3406	return unsigned_condition (code) == code;
3407	}
3408
3409	/* In jump.cc */
3410	extern rtx_insn *delete_related_insns (rtx);
3411
3412	/* In recog.cc */
3413	extern rtx *find_constant_term_loc (rtx *);
3414
3415	/* In emit-rtl.cc */
3416	extern rtx_insn *try_split (rtx, rtx_insn *, int);
3417
3418	/* In insn-recog.cc (generated by genrecog). */
3419	extern rtx_insn *split_insns (rtx, rtx_insn *);
3420
3421	/* In simplify-rtx.cc */
3422
3423	/* A class that records the context in which a simplification
3424	is being mode. */
3425	class simplify_context
3426	{
3427	public:
3428	rtx simplify_unary_operation (rtx_code, machine_mode, rtx, machine_mode);
3429	rtx simplify_binary_operation (rtx_code, machine_mode, rtx, rtx);
3430	rtx simplify_ternary_operation (rtx_code, machine_mode, machine_mode,
3431	rtx, rtx, rtx);
3432	rtx simplify_relational_operation (rtx_code, machine_mode, machine_mode,
3433	rtx, rtx);
3434	rtx simplify_subreg (machine_mode, rtx, machine_mode, poly_uint64);
3435
3436	rtx lowpart_subreg (machine_mode, rtx, machine_mode);
3437
3438	rtx simplify_merge_mask (rtx, rtx, int);
3439
3440	rtx simplify_gen_unary (rtx_code, machine_mode, rtx, machine_mode);
3441	rtx simplify_gen_binary (rtx_code, machine_mode, rtx, rtx);
3442	rtx simplify_gen_ternary (rtx_code, machine_mode, machine_mode,
3443	rtx, rtx, rtx);
3444	rtx simplify_gen_relational (rtx_code, machine_mode, machine_mode, rtx, rtx);
3445	rtx simplify_gen_subreg (machine_mode, rtx, machine_mode, poly_uint64);
3446	rtx simplify_gen_vec_select (rtx, unsigned int);
3447
3448	/* Tracks the level of MEM nesting for the value being simplified:
3449	0 means the value is not in a MEM, >0 means it is. This is needed
3450	because the canonical representation of multiplication is different
3451	inside a MEM than outside. */
3452	unsigned int mem_depth = 0;
3453
3454	/* Tracks number of simplify_associative_operation calls performed during
3455	outermost simplify* call. */
3456	unsigned int assoc_count = 0;
3457
3458	/* Limit for the above number, return NULL from
3459	simplify_associative_operation after we reach that assoc_count. */
3460	static const unsigned int max_assoc_count = 64;
3461
3462	private:
3463	rtx simplify_truncation (machine_mode, rtx, machine_mode);
3464	rtx simplify_byte_swapping_operation (rtx_code, machine_mode, rtx, rtx);
3465	rtx simplify_associative_operation (rtx_code, machine_mode, rtx, rtx);
3466	rtx simplify_distributive_operation (rtx_code, machine_mode, rtx, rtx);
3467	rtx simplify_logical_relational_operation (rtx_code, machine_mode, rtx, rtx);
3468	rtx simplify_binary_operation_series (rtx_code, machine_mode, rtx, rtx);
3469	rtx simplify_distribute_over_subregs (rtx_code, machine_mode, rtx, rtx);
3470	rtx simplify_shift_const_int (rtx_code, machine_mode, rtx, unsigned int);
3471	rtx simplify_plus_minus (rtx_code, machine_mode, rtx, rtx);
3472	rtx simplify_cond_clz_ctz (rtx, rtx_code, rtx, rtx);
3473
3474	rtx simplify_unary_operation_1 (rtx_code, machine_mode, rtx);
3475	rtx simplify_binary_operation_1 (rtx_code, machine_mode, rtx, rtx, rtx, rtx);
3476	rtx simplify_ternary_operation_1 (rtx_code, machine_mode, machine_mode,
3477	rtx, rtx, rtx);
3478	rtx simplify_relational_operation_1 (rtx_code, machine_mode, machine_mode,
3479	rtx, rtx);
3480	};
3481
3482	inline rtx
3483	simplify_unary_operation (rtx_code code, machine_mode mode, rtx op,
3484	machine_mode op_mode)
3485	{
3486	return simplify_context ().simplify_unary_operation (code, mode, op,
3487	op_mode);
3488	}
3489
3490	inline rtx
3491	simplify_binary_operation (rtx_code code, machine_mode mode, rtx op0, rtx op1)
3492	{
3493	return simplify_context ().simplify_binary_operation (code, mode, op0, op1);
3494	}
3495
3496	inline rtx
3497	simplify_ternary_operation (rtx_code code, machine_mode mode,
3498	machine_mode op0_mode, rtx op0, rtx op1, rtx op2)
3499	{
3500	return simplify_context ().simplify_ternary_operation (code, mode, op0_mode,
3501	op0, op1, op2);
3502	}
3503
3504	inline rtx
3505	simplify_relational_operation (rtx_code code, machine_mode mode,
3506	machine_mode op_mode, rtx op0, rtx op1)
3507	{
3508	return simplify_context ().simplify_relational_operation (code, mode,
3509	op_mode, op0, op1);
3510	}
3511
3512	inline rtx
3513	simplify_subreg (machine_mode outermode, rtx op, machine_mode innermode,
3514	poly_uint64 byte)
3515	{
3516	return simplify_context ().simplify_subreg (outermode, op, innermode, byte);
3517	}
3518
3519	inline rtx
3520	simplify_gen_unary (rtx_code code, machine_mode mode, rtx op,
3521	machine_mode op_mode)
3522	{
3523	return simplify_context ().simplify_gen_unary (code, mode, op, op_mode);
3524	}
3525
3526	inline rtx
3527	simplify_gen_binary (rtx_code code, machine_mode mode, rtx op0, rtx op1)
3528	{
3529	return simplify_context ().simplify_gen_binary (code, mode, op0, op1);
3530	}
3531
3532	inline rtx
3533	simplify_gen_ternary (rtx_code code, machine_mode mode, machine_mode op0_mode,
3534	rtx op0, rtx op1, rtx op2)
3535	{
3536	return simplify_context ().simplify_gen_ternary (code, mode, op0_mode,
3537	op0, op1, op2);
3538	}
3539
3540	inline rtx
3541	simplify_gen_relational (rtx_code code, machine_mode mode,
3542	machine_mode op_mode, rtx op0, rtx op1)
3543	{
3544	return simplify_context ().simplify_gen_relational (code, mode, op_mode,
3545	op0, op1);
3546	}
3547
3548	inline rtx
3549	simplify_gen_subreg (machine_mode outermode, rtx op, machine_mode innermode,
3550	poly_uint64 byte)
3551	{
3552	return simplify_context ().simplify_gen_subreg (outermode, op,
3553	innermode, byte);
3554	}
3555
3556	inline rtx
3557	simplify_gen_vec_select (rtx op, unsigned int index)
3558	{
3559	return simplify_context ().simplify_gen_vec_select (op, index);
3560	}
3561
3562	inline rtx
3563	lowpart_subreg (machine_mode outermode, rtx op, machine_mode innermode)
3564	{
3565	return simplify_context ().lowpart_subreg (outermode, op, innermode);
3566	}
3567
3568	extern rtx simplify_const_unary_operation (enum rtx_code, machine_mode,
3569	rtx, machine_mode);
3570	extern rtx simplify_const_binary_operation (enum rtx_code, machine_mode,
3571	rtx, rtx);
3572	extern rtx simplify_const_relational_operation (enum rtx_code,
3573	machine_mode, rtx, rtx);
3574	extern rtx simplify_replace_fn_rtx (rtx, const_rtx,
3575	rtx (*fn) (rtx, const_rtx, void *), void *);
3576	extern rtx simplify_replace_rtx (rtx, const_rtx, rtx);
3577	extern rtx simplify_rtx (const_rtx);
3578	extern rtx avoid_constant_pool_reference (rtx);
3579	extern rtx delegitimize_mem_from_attrs (rtx);
3580	extern bool mode_signbit_p (machine_mode, const_rtx);
3581	extern bool val_signbit_p (machine_mode, unsigned HOST_WIDE_INT);
3582	extern bool val_signbit_known_set_p (machine_mode,
3583	unsigned HOST_WIDE_INT);
3584	extern bool val_signbit_known_clear_p (machine_mode,
3585	unsigned HOST_WIDE_INT);
3586	extern bool reverse_rotate_by_imm_p (machine_mode, unsigned int, rtx);
3587
3588	/* In reginfo.cc */
3589	extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int,
3590	const predefined_function_abi *);
3591	extern const HARD_REG_SET &simplifiable_subregs (const subreg_shape &);
3592
3593	/* In emit-rtl.cc */
3594	extern rtx set_for_reg_notes (rtx);
3595	extern rtx set_unique_reg_note (rtx, enum reg_note, rtx);
3596	extern rtx set_dst_reg_note (rtx, enum reg_note, rtx, rtx);
3597	extern void set_insn_deleted (rtx_insn *);
3598
3599	/* Functions in rtlanal.cc */
3600
3601	extern rtx single_set_2 (const rtx_insn *, const_rtx);
3602	extern rtx simple_regno_set (rtx, unsigned int);
3603	extern bool contains_symbol_ref_p (const_rtx);
3604	extern bool contains_symbolic_reference_p (const_rtx);
3605	extern bool contains_constant_pool_address_p (const_rtx);
3606	extern void add_auto_inc_notes (rtx_insn *, rtx);
3607
3608	/* Handle the cheap and common cases inline for performance. */
3609
3610	inline rtx single_set (const rtx_insn *insn)
3611	{
3612	if (!INSN_P (insn))
3613	return NULL_RTX;
3614
3615	if (GET_CODE (PATTERN (insn)) == SET)
3616	return PATTERN (insn);
3617
3618	/* Defer to the more expensive case. */
3619	return single_set_2 (insn, PATTERN (insn));
3620	}
3621
3622	extern scalar_int_mode get_address_mode (rtx mem);
3623	extern bool rtx_addr_can_trap_p (const_rtx);
3624	extern bool nonzero_address_p (const_rtx);
3625	extern bool rtx_unstable_p (const_rtx);
3626	extern bool rtx_varies_p (const_rtx, bool);
3627	extern bool rtx_addr_varies_p (const_rtx, bool);
3628	extern rtx get_call_rtx_from (const rtx_insn *);
3629	extern tree get_call_fndecl (const rtx_insn *);
3630	extern HOST_WIDE_INT get_integer_term (const_rtx);
3631	extern rtx get_related_value (const_rtx);
3632	extern bool offset_within_block_p (const_rtx, HOST_WIDE_INT);
3633	extern void split_const (rtx, rtx *, rtx *);
3634	extern rtx strip_offset (rtx, poly_int64 *);
3635	extern poly_int64 get_args_size (const_rtx);
3636	extern bool unsigned_reg_p (rtx);
3637	extern bool reg_mentioned_p (const_rtx, const_rtx);
3638	extern int count_occurrences (const_rtx, const_rtx, int);
3639	extern bool reg_referenced_p (const_rtx, const_rtx);
3640	extern bool reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3641	extern bool reg_set_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3642	extern int commutative_operand_precedence (rtx);
3643	extern bool swap_commutative_operands_p (rtx, rtx);
3644	extern bool modified_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
3645	extern bool no_labels_between_p (const rtx_insn *, const rtx_insn *);
3646	extern bool modified_in_p (const_rtx, const_rtx);
3647	extern bool reg_set_p (const_rtx, const_rtx);
3648	extern bool multiple_sets (const_rtx);
3649	extern bool set_noop_p (const_rtx);
3650	extern bool noop_move_p (const rtx_insn *);
3651	extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
3652	extern bool reg_overlap_mentioned_p (const_rtx, const_rtx);
3653	extern const_rtx set_of (const_rtx, const_rtx);
3654	extern void record_hard_reg_sets (rtx, const_rtx, void *);
3655	extern void record_hard_reg_uses (rtx *, void *);
3656	extern void find_all_hard_regs (const_rtx, HARD_REG_SET *);
3657	extern void find_all_hard_reg_sets (const rtx_insn *, HARD_REG_SET *, bool);
3658	extern void note_pattern_stores (const_rtx,
3659	void (*) (rtx, const_rtx, void *), void *);
3660	extern void note_stores (const rtx_insn *,
3661	void (*) (rtx, const_rtx, void *), void *);
3662	extern void note_uses (rtx *, void (*) (rtx *, void *), void *);
3663	extern bool dead_or_set_p (const rtx_insn *, const_rtx);
3664	extern bool dead_or_set_regno_p (const rtx_insn *, unsigned int);
3665	extern rtx find_reg_note (const_rtx, enum reg_note, const_rtx);
3666	extern rtx find_regno_note (const_rtx, enum reg_note, unsigned int);
3667	extern rtx find_reg_equal_equiv_note (const_rtx);
3668	extern rtx find_constant_src (const rtx_insn *);
3669	extern bool find_reg_fusage (const_rtx, enum rtx_code, const_rtx);
3670	extern bool find_regno_fusage (const_rtx, enum rtx_code, unsigned int);
3671	extern rtx alloc_reg_note (enum reg_note, rtx, rtx);
3672	extern void add_reg_note (rtx, enum reg_note, rtx);
3673	extern void add_int_reg_note (rtx_insn *, enum reg_note, int);
3674	extern void add_args_size_note (rtx_insn *, poly_int64);
3675	extern void add_shallow_copy_of_reg_note (rtx_insn *, rtx);
3676	extern rtx duplicate_reg_note (rtx);
3677	extern void remove_note (rtx_insn *, const_rtx);
3678	extern bool remove_reg_equal_equiv_notes (rtx_insn *, bool = false);
3679	extern void remove_reg_equal_equiv_notes_for_regno (unsigned int);
3680	extern bool side_effects_p (const_rtx);
3681	extern bool volatile_refs_p (const_rtx);
3682	extern bool volatile_insn_p (const_rtx);
3683	extern bool may_trap_p_1 (const_rtx, unsigned);
3684	extern bool may_trap_p (const_rtx);
3685	extern bool may_trap_or_fault_p (const_rtx);
3686	extern bool can_throw_internal (const_rtx);
3687	extern bool can_throw_external (const_rtx);
3688	extern bool insn_could_throw_p (const_rtx);
3689	extern bool insn_nothrow_p (const_rtx);
3690	extern bool can_nonlocal_goto (const rtx_insn *);
3691	extern void copy_reg_eh_region_note_forward (rtx, rtx_insn *, rtx);
3692	extern void copy_reg_eh_region_note_backward (rtx, rtx_insn *, rtx);
3693	extern rtx replace_rtx (rtx, rtx, rtx, bool = false);
3694	extern void replace_label (rtx *, rtx, rtx, bool);
3695	extern void replace_label_in_insn (rtx_insn *, rtx_insn *, rtx_insn *, bool);
3696	extern bool rtx_referenced_p (const_rtx, const_rtx);
3697	extern bool tablejump_p (const rtx_insn *, rtx_insn **, rtx_jump_table_data **);
3698	extern rtx tablejump_casesi_pattern (const rtx_insn *insn);
3699	extern bool computed_jump_p (const rtx_insn *);
3700	extern bool tls_referenced_p (const_rtx);
3701	extern bool contains_mem_rtx_p (rtx x);
3702	extern bool register_asm_p (const_rtx);
3703
3704	/* Overload for refers_to_regno_p for checking a single register. */
3705	inline bool
3706	refers_to_regno_p (unsigned int regnum, const_rtx x, rtx* loc = NULL)
3707	{
3708	return refers_to_regno_p (regnum, regnum + 1, x, loc);
3709	}
3710
3711	/* Callback for for_each_inc_dec, to process the autoinc operation OP
3712	within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
3713	NULL. The callback is passed the same opaque ARG passed to
3714	for_each_inc_dec. Return zero to continue looking for other
3715	autoinc operations or any other value to interrupt the traversal and
3716	return that value to the caller of for_each_inc_dec. */
3717	typedef int (*for_each_inc_dec_fn) (rtx mem, rtx op, rtx dest, rtx src,
3718	rtx srcoff, void *arg);
3719	extern int for_each_inc_dec (rtx, for_each_inc_dec_fn, void *arg);
3720
3721	extern rtx regno_use_in (unsigned int, rtx);
3722	extern bool auto_inc_p (const_rtx);
3723	extern bool in_insn_list_p (const rtx_insn_list *, const rtx_insn *);
3724	extern void remove_node_from_insn_list (const rtx_insn *, rtx_insn_list **);
3725	extern bool loc_mentioned_in_p (rtx *, const_rtx);
3726	extern rtx_insn *find_first_parameter_load (rtx_insn *, rtx_insn *);
3727	extern bool keep_with_call_p (const rtx_insn *);
3728	extern bool label_is_jump_target_p (const_rtx, const rtx_insn *);
3729	extern int pattern_cost (rtx, bool);
3730	extern int insn_cost (rtx_insn *, bool);
3731	extern unsigned seq_cost (const rtx_insn *, bool);
3732
3733	/* Given an insn and condition, return a canonical description of
3734	the test being made. */
3735	extern rtx canonicalize_condition (rtx_insn *, rtx, int, rtx_insn **, rtx,
3736	int, int);
3737
3738	/* Given a JUMP_INSN, return a canonical description of the test
3739	being made. */
3740	extern rtx get_condition (rtx_insn *, rtx_insn **, int, int);
3741
3742	/* Information about a subreg of a hard register. */
3743	struct subreg_info
3744	{
3745	/* Offset of first hard register involved in the subreg. */
3746	int offset;
3747	/* Number of hard registers involved in the subreg. In the case of
3748	a paradoxical subreg, this is the number of registers that would
3749	be modified by writing to the subreg; some of them may be don't-care
3750	when reading from the subreg. */
3751	int nregs;
3752	/* Whether this subreg can be represented as a hard reg with the new
3753	mode (by adding OFFSET to the original hard register). */
3754	bool representable_p;
3755	};
3756
3757	extern void subreg_get_info (unsigned int, machine_mode,
3758	poly_uint64, machine_mode,
3759	struct subreg_info *);
3760
3761	/* lists.cc */
3762
3763	extern void free_EXPR_LIST_list (rtx_expr_list **);
3764	extern void free_INSN_LIST_list (rtx_insn_list **);
3765	extern void free_EXPR_LIST_node (rtx);
3766	extern void free_INSN_LIST_node (rtx);
3767	extern rtx_insn_list *alloc_INSN_LIST (rtx, rtx);
3768	extern rtx_insn_list *copy_INSN_LIST (rtx_insn_list *);
3769	extern rtx_insn_list *concat_INSN_LIST (rtx_insn_list *, rtx_insn_list *);
3770	extern rtx_expr_list *alloc_EXPR_LIST (int, rtx, rtx);
3771	extern void remove_free_INSN_LIST_elem (rtx_insn *, rtx_insn_list **);
3772	extern rtx remove_list_elem (rtx, rtx *);
3773	extern rtx_insn *remove_free_INSN_LIST_node (rtx_insn_list **);
3774	extern rtx remove_free_EXPR_LIST_node (rtx_expr_list **);
3775
3776
3777	/* reginfo.cc */
3778
3779	/* Resize reg info. */
3780	extern bool resize_reg_info (void);
3781	/* Free up register info memory. */
3782	extern void free_reg_info (void);
3783	extern void init_subregs_of_mode (void);
3784	extern void finish_subregs_of_mode (void);
3785	extern void reginfo_cc_finalize (void);
3786
3787	/* recog.cc */
3788	extern rtx extract_asm_operands (rtx);
3789	extern int asm_noperands (const_rtx);
3790	extern const char *decode_asm_operands (rtx, rtx *, rtx **, const char **,
3791	machine_mode *, location_t *);
3792	extern void get_referenced_operands (const char *, bool *, unsigned int);
3793
3794	extern enum reg_class reg_preferred_class (int);
3795	extern enum reg_class reg_alternate_class (int);
3796	extern enum reg_class reg_allocno_class (int);
3797	extern void setup_reg_classes (int, enum reg_class, enum reg_class,
3798	enum reg_class);
3799
3800	extern void split_all_insns (void);
3801	extern void split_all_insns_noflow (void);
3802
3803	#define MAX_SAVED_CONST_INT 64
3804	extern GTY(()) rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
3805
3806	#define const0_rtx (const_int_rtx[MAX_SAVED_CONST_INT])
3807	#define const1_rtx (const_int_rtx[MAX_SAVED_CONST_INT+1])
3808	#define const2_rtx (const_int_rtx[MAX_SAVED_CONST_INT+2])
3809	#define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1])
3810	extern GTY(()) rtx const_true_rtx;
3811
3812	extern GTY(()) rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
3813
3814	/* Returns a constant 0 rtx in mode MODE. Integer modes are treated the
3815	same as VOIDmode. */
3816
3817	#define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)])
3818
3819	/* Likewise, for the constants 1 and 2 and -1. */
3820
3821	#define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)])
3822	#define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)])
3823	#define CONSTM1_RTX(MODE) (const_tiny_rtx[3][(int) (MODE)])
3824
3825	extern GTY(()) rtx pc_rtx;
3826	extern GTY(()) rtx ret_rtx;
3827	extern GTY(()) rtx simple_return_rtx;
3828	extern GTY(()) rtx_insn *invalid_insn_rtx;
3829
3830	/* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg
3831	is used to represent the frame pointer. This is because the
3832	hard frame pointer and the automatic variables are separated by an amount
3833	that cannot be determined until after register allocation. We can assume
3834	that in this case ELIMINABLE_REGS will be defined, one action of which
3835	will be to eliminate FRAME_POINTER_REGNUM into HARD_FRAME_POINTER_REGNUM. */
3836	#ifndef HARD_FRAME_POINTER_REGNUM
3837	#define HARD_FRAME_POINTER_REGNUM FRAME_POINTER_REGNUM
3838	#endif
3839
3840	#ifndef HARD_FRAME_POINTER_IS_FRAME_POINTER
3841	#define HARD_FRAME_POINTER_IS_FRAME_POINTER \
3842	(HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3843	#endif
3844
3845	#ifndef HARD_FRAME_POINTER_IS_ARG_POINTER
3846	#define HARD_FRAME_POINTER_IS_ARG_POINTER \
3847	(HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3848	#endif
3849
3850	/* Index labels for global_rtl. */
3851	enum global_rtl_index
3852	{
3853	GR_STACK_POINTER,
3854	GR_FRAME_POINTER,
3855	/* For register elimination to work properly these hard_frame_pointer_rtx,
3856	frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
3857	the same register. */
3858	#if FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM
3859	GR_ARG_POINTER = GR_FRAME_POINTER,
3860	#endif
3861	#if HARD_FRAME_POINTER_IS_FRAME_POINTER
3862	GR_HARD_FRAME_POINTER = GR_FRAME_POINTER,
3863	#else
3864	GR_HARD_FRAME_POINTER,
3865	#endif
3866	#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3867	#if HARD_FRAME_POINTER_IS_ARG_POINTER
3868	GR_ARG_POINTER = GR_HARD_FRAME_POINTER,
3869	#else
3870	GR_ARG_POINTER,
3871	#endif
3872	#endif
3873	GR_VIRTUAL_INCOMING_ARGS,
3874	GR_VIRTUAL_STACK_ARGS,
3875	GR_VIRTUAL_STACK_DYNAMIC,
3876	GR_VIRTUAL_OUTGOING_ARGS,
3877	GR_VIRTUAL_CFA,
3878	GR_VIRTUAL_PREFERRED_STACK_BOUNDARY,
3879
3880	GR_MAX
3881	};
3882
3883	/* Target-dependent globals. */
3884	struct GTY(()) target_rtl {
3885	/* All references to the hard registers in global_rtl_index go through
3886	these unique rtl objects. On machines where the frame-pointer and
3887	arg-pointer are the same register, they use the same unique object.
3888
3889	After register allocation, other rtl objects which used to be pseudo-regs
3890	may be clobbered to refer to the frame-pointer register.
3891	But references that were originally to the frame-pointer can be
3892	distinguished from the others because they contain frame_pointer_rtx.
3893
3894	When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
3895	tricky: until register elimination has taken place hard_frame_pointer_rtx
3896	should be used if it is being set, and frame_pointer_rtx otherwise. After
3897	register elimination hard_frame_pointer_rtx should always be used.
3898	On machines where the two registers are same (most) then these are the
3899	same. */
3900	rtx x_global_rtl[GR_MAX];
3901
3902	/* A unique representation of (REG:Pmode PIC_OFFSET_TABLE_REGNUM). */
3903	rtx x_pic_offset_table_rtx;
3904
3905	/* A unique representation of (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM).
3906	This is used to implement __builtin_return_address for some machines;
3907	see for instance the MIPS port. */
3908	rtx x_return_address_pointer_rtx;
3909
3910	/* Commonly used RTL for hard registers. These objects are not
3911	necessarily unique, so we allocate them separately from global_rtl.
3912	They are initialized once per compilation unit, then copied into
3913	regno_reg_rtx at the beginning of each function. */
3914	rtx x_initial_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
3915
3916	/* A sample (mem:M stack_pointer_rtx) rtx for each mode M. */
3917	rtx x_top_of_stack[MAX_MACHINE_MODE];
3918
3919	/* Static hunks of RTL used by the aliasing code; these are treated
3920	as persistent to avoid unnecessary RTL allocations. */
3921	rtx x_static_reg_base_value[FIRST_PSEUDO_REGISTER];
3922
3923	/* The default memory attributes for each mode. */
3924	class mem_attrs *x_mode_mem_attrs[(int) MAX_MACHINE_MODE];
3925
3926	/* Track if RTL has been initialized. */
3927	bool target_specific_initialized;
3928	};
3929
3930	extern GTY(()) struct target_rtl default_target_rtl;
3931	#if SWITCHABLE_TARGET
3932	extern struct target_rtl *this_target_rtl;
3933	#else
3934	#define this_target_rtl (&default_target_rtl)
3935	#endif
3936
3937	#define global_rtl \
3938	(this_target_rtl->x_global_rtl)
3939	#define pic_offset_table_rtx \
3940	(this_target_rtl->x_pic_offset_table_rtx)
3941	#define return_address_pointer_rtx \
3942	(this_target_rtl->x_return_address_pointer_rtx)
3943	#define top_of_stack \
3944	(this_target_rtl->x_top_of_stack)
3945	#define mode_mem_attrs \
3946	(this_target_rtl->x_mode_mem_attrs)
3947
3948	/* All references to certain hard regs, except those created
3949	by allocating pseudo regs into them (when that's possible),
3950	go through these unique rtx objects. */
3951	#define stack_pointer_rtx (global_rtl[GR_STACK_POINTER])
3952	#define frame_pointer_rtx (global_rtl[GR_FRAME_POINTER])
3953	#define hard_frame_pointer_rtx (global_rtl[GR_HARD_FRAME_POINTER])
3954	#define arg_pointer_rtx (global_rtl[GR_ARG_POINTER])
3955
3956	#ifndef GENERATOR_FILE
3957	/* Return the attributes of a MEM rtx. */
3958	inline const class mem_attrs *
3959	get_mem_attrs (const_rtx x)
3960	{
3961	class mem_attrs *attrs;
3962
3963	attrs = MEM_ATTRS (x);
3964	if (!attrs)
3965	attrs = mode_mem_attrs[(int) GET_MODE (x)];
3966	return attrs;
3967	}
3968	#endif
3969
3970	/* Include the RTL generation functions. */
3971
3972	#ifndef GENERATOR_FILE
3973	#include "genrtl.h"
3974	#undef gen_rtx_ASM_INPUT
3975	#define gen_rtx_ASM_INPUT(MODE, ARG0) \
3976	gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), 0)
3977	#define gen_rtx_ASM_INPUT_loc(MODE, ARG0, LOC) \
3978	gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), (LOC))
3979	#endif
3980
3981	/* There are some RTL codes that require special attention; the
3982	generation functions included above do the raw handling. If you
3983	add to this list, modify special_rtx in gengenrtl.cc as well. */
3984
3985	extern rtx_expr_list *gen_rtx_EXPR_LIST (machine_mode, rtx, rtx);
3986	extern rtx_insn_list *gen_rtx_INSN_LIST (machine_mode, rtx, rtx);
3987	extern rtx_insn *
3988	gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
3989	basic_block bb, rtx pattern, int location, int code,
3990	rtx reg_notes);
3991	extern rtx gen_rtx_CONST_INT (machine_mode, HOST_WIDE_INT);
3992	extern rtx gen_rtx_CONST_VECTOR (machine_mode, rtvec);
3993	extern void set_mode_and_regno (rtx, machine_mode, unsigned int);
3994	extern rtx init_raw_REG (rtx, machine_mode, unsigned int);
3995	extern rtx gen_raw_REG (machine_mode, unsigned int);
3996	#define alloca_raw_REG(mode, regno) \
3997	init_raw_REG (rtx_alloca (REG), (mode), (regno))
3998	extern rtx gen_rtx_REG (machine_mode, unsigned int);
3999	extern rtx gen_rtx_SUBREG (machine_mode, rtx, poly_uint64);
4000	extern rtx gen_rtx_MEM (machine_mode, rtx);
4001	extern rtx gen_rtx_VAR_LOCATION (machine_mode, tree, rtx,
4002	enum var_init_status);
4003
4004	#ifdef GENERATOR_FILE
4005	#define PUT_MODE(RTX, MODE) PUT_MODE_RAW (RTX, MODE)
4006	#else
4007	inline void
4008	PUT_MODE (rtx x, machine_mode mode)
4009	{
4010	if (REG_P (x))
4011	set_mode_and_regno (x, mode, REGNO (x));
4012	else
4013	PUT_MODE_RAW (x, mode);
4014	}
4015	#endif
4016
4017	#define GEN_INT(N) gen_rtx_CONST_INT (VOIDmode, (N))
4018
4019	/* Virtual registers are used during RTL generation to refer to locations into
4020	the stack frame when the actual location isn't known until RTL generation
4021	is complete. The routine instantiate_virtual_regs replaces these with
4022	the proper value, which is normally {frame,arg,stack}_pointer_rtx plus
4023	a constant. */
4024
4025	#define FIRST_VIRTUAL_REGISTER (FIRST_PSEUDO_REGISTER)
4026
4027	/* This points to the first word of the incoming arguments passed on the stack,
4028	either by the caller or by the callee when pretending it was passed by the
4029	caller. */
4030
4031	#define virtual_incoming_args_rtx (global_rtl[GR_VIRTUAL_INCOMING_ARGS])
4032
4033	#define VIRTUAL_INCOMING_ARGS_REGNUM (FIRST_VIRTUAL_REGISTER)
4034
4035	/* If FRAME_GROWS_DOWNWARD, this points to immediately above the first
4036	variable on the stack. Otherwise, it points to the first variable on
4037	the stack. */
4038
4039	#define virtual_stack_vars_rtx (global_rtl[GR_VIRTUAL_STACK_ARGS])
4040
4041	#define VIRTUAL_STACK_VARS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 1)
4042
4043	/* This points to the location of dynamically-allocated memory on the stack
4044	immediately after the stack pointer has been adjusted by the amount
4045	desired. */
4046
4047	#define virtual_stack_dynamic_rtx (global_rtl[GR_VIRTUAL_STACK_DYNAMIC])
4048
4049	#define VIRTUAL_STACK_DYNAMIC_REGNUM ((FIRST_VIRTUAL_REGISTER) + 2)
4050
4051	/* This points to the location in the stack at which outgoing arguments should
4052	be written when the stack is pre-pushed (arguments pushed using push
4053	insns always use sp). */
4054
4055	#define virtual_outgoing_args_rtx (global_rtl[GR_VIRTUAL_OUTGOING_ARGS])
4056
4057	#define VIRTUAL_OUTGOING_ARGS_REGNUM ((FIRST_VIRTUAL_REGISTER) + 3)
4058
4059	/* This points to the Canonical Frame Address of the function. This
4060	should correspond to the CFA produced by INCOMING_FRAME_SP_OFFSET,
4061	but is calculated relative to the arg pointer for simplicity; the
4062	frame pointer nor stack pointer are necessarily fixed relative to
4063	the CFA until after reload. */
4064
4065	#define virtual_cfa_rtx (global_rtl[GR_VIRTUAL_CFA])
4066
4067	#define VIRTUAL_CFA_REGNUM ((FIRST_VIRTUAL_REGISTER) + 4)
4068
4069	#define LAST_VIRTUAL_POINTER_REGISTER ((FIRST_VIRTUAL_REGISTER) + 4)
4070
4071	/* This is replaced by crtl->preferred_stack_boundary / BITS_PER_UNIT
4072	when finalized. */
4073
4074	#define virtual_preferred_stack_boundary_rtx \
4075	(global_rtl[GR_VIRTUAL_PREFERRED_STACK_BOUNDARY])
4076
4077	#define VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM \
4078	((FIRST_VIRTUAL_REGISTER) + 5)
4079
4080	#define LAST_VIRTUAL_REGISTER ((FIRST_VIRTUAL_REGISTER) + 5)
4081
4082	/* Nonzero if REGNUM is a pointer into the stack frame. */
4083	#define REGNO_PTR_FRAME_P(REGNUM) \
4084	((REGNUM) == STACK_POINTER_REGNUM \
4085	|| (REGNUM) == FRAME_POINTER_REGNUM \
4086	|| (REGNUM) == HARD_FRAME_POINTER_REGNUM \
4087	|| (REGNUM) == ARG_POINTER_REGNUM \
4088	|| VIRTUAL_REGISTER_NUM_P (REGNUM))
4089
4090	/* REGNUM never really appearing in the INSN stream. */
4091	#define INVALID_REGNUM (~(unsigned int) 0)
4092
4093	/* REGNUM for which no debug information can be generated. */
4094	#define IGNORED_DWARF_REGNUM (INVALID_REGNUM - 1)
4095
4096	extern rtx output_constant_def (tree, int);
4097	extern rtx lookup_constant_def (tree);
4098
4099	/* Nonzero after end of reload pass.
4100	Set to 1 or 0 by reload1.cc. */
4101
4102	extern int reload_completed;
4103
4104	/* Nonzero after thread_prologue_and_epilogue_insns has run. */
4105	extern int epilogue_completed;
4106
4107	/* Set to 1 while reload_as_needed is operating.
4108	Required by some machines to handle any generated moves differently. */
4109
4110	extern int reload_in_progress;
4111
4112	/* Set to true while in IRA. */
4113	extern bool ira_in_progress;
4114
4115	/* Set to true while in LRA. */
4116	extern bool lra_in_progress;
4117
4118	/* This macro indicates whether you may create a new
4119	pseudo-register. */
4120
4121	#define can_create_pseudo_p() (!reload_in_progress && !reload_completed)
4122
4123	#ifdef STACK_REGS
4124	/* Nonzero after end of regstack pass.
4125	Set to 1 or 0 by reg-stack.cc. */
4126	extern int regstack_completed;
4127	#endif
4128
4129	/* If this is nonzero, we do not bother generating VOLATILE
4130	around volatile memory references, and we are willing to
4131	output indirect addresses. If cse is to follow, we reject
4132	indirect addresses so a useful potential cse is generated;
4133	if it is used only once, instruction combination will produce
4134	the same indirect address eventually. */
4135	extern int cse_not_expected;
4136
4137	/* Translates rtx code to tree code, for those codes needed by
4138	real_arithmetic. The function returns an int because the caller may not
4139	know what `enum tree_code' means. */
4140
4141	extern int rtx_to_tree_code (enum rtx_code);
4142
4143	/* In cse.cc */
4144	extern int delete_trivially_dead_insns (rtx_insn *, int);
4145	extern bool exp_equiv_p (const_rtx, const_rtx, int, bool);
4146
4147	typedef bool (*hash_rtx_callback_function) (const_rtx, machine_mode, rtx *,
4148	machine_mode *);
4149	extern unsigned hash_rtx (const_rtx, machine_mode, int *, int *,
4150	bool, hash_rtx_callback_function = NULL);
4151
4152	/* In dse.cc */
4153	extern bool check_for_inc_dec (rtx_insn *insn);
4154
4155	/* In jump.cc */
4156	extern bool comparison_dominates_p (enum rtx_code, enum rtx_code);
4157	extern bool jump_to_label_p (const rtx_insn *);
4158	extern bool condjump_p (const rtx_insn *);
4159	extern bool any_condjump_p (const rtx_insn *);
4160	extern bool any_uncondjump_p (const rtx_insn *);
4161	extern rtx pc_set (const rtx_insn *);
4162	extern rtx condjump_label (const rtx_insn *);
4163	extern bool simplejump_p (const rtx_insn *);
4164	extern bool returnjump_p (const rtx_insn *);
4165	extern bool eh_returnjump_p (rtx_insn *);
4166	extern bool onlyjump_p (const rtx_insn *);
4167	extern bool invert_jump_1 (rtx_jump_insn *, rtx);
4168	extern bool invert_jump (rtx_jump_insn *, rtx, int);
4169	extern bool rtx_renumbered_equal_p (const_rtx, const_rtx);
4170	extern int true_regnum (const_rtx);
4171	extern unsigned int reg_or_subregno (const_rtx);
4172	extern bool redirect_jump_1 (rtx_insn *, rtx);
4173	extern void redirect_jump_2 (rtx_jump_insn *, rtx, rtx, int, int);
4174	extern bool redirect_jump (rtx_jump_insn *, rtx, int);
4175	extern void rebuild_jump_labels (rtx_insn *);
4176	extern void rebuild_jump_labels_chain (rtx_insn *);
4177	extern rtx reversed_comparison (const_rtx, machine_mode);
4178	extern enum rtx_code reversed_comparison_code (const_rtx, const rtx_insn *);
4179	extern enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx,
4180	const_rtx, const rtx_insn *);
4181	extern void delete_for_peephole (rtx_insn *, rtx_insn *);
4182	extern bool condjump_in_parallel_p (const rtx_insn *);
4183
4184	/* In emit-rtl.cc. */
4185	extern int max_reg_num (void);
4186	extern int max_label_num (void);
4187	extern int get_first_label_num (void);
4188	extern void maybe_set_first_label_num (rtx_code_label *);
4189	extern void delete_insns_since (rtx_insn *);
4190	extern void mark_reg_pointer (rtx, int);
4191	extern void mark_user_reg (rtx);
4192	extern void reset_used_flags (rtx);
4193	extern void set_used_flags (rtx);
4194	extern void reorder_insns (rtx_insn *, rtx_insn *, rtx_insn *);
4195	extern void reorder_insns_nobb (rtx_insn *, rtx_insn *, rtx_insn *);
4196	extern int get_max_insn_count (void);
4197	extern bool in_sequence_p (void);
4198	extern void init_emit (void);
4199	extern void init_emit_regs (void);
4200	extern void init_derived_machine_modes (void);
4201	extern void init_emit_once (void);
4202	extern void push_topmost_sequence (void);
4203	extern void pop_topmost_sequence (void);
4204	extern void set_new_first_and_last_insn (rtx_insn *, rtx_insn *);
4205	extern void unshare_all_rtl (void);
4206	extern void unshare_all_rtl_again (rtx_insn *);
4207	extern void unshare_all_rtl_in_chain (rtx_insn *);
4208	extern void verify_rtl_sharing (void);
4209	extern void add_insn (rtx_insn *);
4210	extern void add_insn_before (rtx_insn *, rtx_insn *, basic_block);
4211	extern void add_insn_after (rtx_insn *, rtx_insn *, basic_block);
4212	extern void remove_insn (rtx_insn *);
4213	extern rtx_insn *emit (rtx, bool = true);
4214	extern void emit_insn_at_entry (rtx);
4215	extern rtx gen_lowpart_SUBREG (machine_mode, rtx);
4216	extern rtx gen_const_mem (machine_mode, rtx);
4217	extern rtx gen_frame_mem (machine_mode, rtx);
4218	extern rtx gen_tmp_stack_mem (machine_mode, rtx);
4219	extern bool validate_subreg (machine_mode, machine_mode,
4220	const_rtx, poly_uint64);
4221
4222	/* In combine.cc */
4223	extern unsigned int extended_count (const_rtx, machine_mode, bool);
4224	extern rtx remove_death (unsigned int, rtx_insn *);
4225	extern rtx make_compound_operation (rtx, enum rtx_code);
4226
4227	/* In sched-rgn.cc. */
4228	extern void schedule_insns (void);
4229
4230	/* In sched-ebb.cc. */
4231	extern void schedule_ebbs (void);
4232
4233	/* In sel-sched-dump.cc. */
4234	extern void sel_sched_fix_param (const char *param, const char *val);
4235
4236	/* In print-rtl.cc */
4237	extern const char *print_rtx_head;
4238	extern void debug (const rtx_def &ref);
4239	extern void debug (const rtx_def *ptr);
4240	extern void debug_rtx (const_rtx);
4241	extern void debug_rtx_list (const rtx_insn *, int);
4242	extern void debug_rtx_range (const rtx_insn *, const rtx_insn *);
4243	extern const rtx_insn *debug_rtx_find (const rtx_insn *, int);
4244	extern void print_mem_expr (FILE *, const_tree);
4245	extern void print_rtl (FILE *, const_rtx);
4246	extern void print_simple_rtl (FILE *, const_rtx);
4247	extern void print_rtl_single (FILE *, const_rtx);
4248	extern void print_rtl_single_with_indent (FILE *, const_rtx, int);
4249	extern void print_inline_rtx (FILE *, const_rtx, int);
4250
4251	/* In stmt.cc */
4252	extern void expand_null_return (void);
4253	extern void expand_naked_return (void);
4254	extern void emit_jump (rtx);
4255
4256	/* Memory operation built-ins differ by return value. Mapping
4257	of the enum values is following:
4258	- RETURN_BEGIN - return destination, e.g. memcpy
4259	- RETURN_END - return destination + n, e.g. mempcpy
4260	- RETURN_END_MINUS_ONE - return a pointer to the terminating
4261	null byte of the string, e.g. strcpy
4262	*/
4263
4264	enum memop_ret
4265	{
4266	RETURN_BEGIN,
4267	RETURN_END,
4268	RETURN_END_MINUS_ONE
4269	};
4270
4271	/* In expr.cc */
4272	extern rtx move_by_pieces (rtx, rtx, unsigned HOST_WIDE_INT,
4273	unsigned int, memop_ret);
4274	extern poly_int64 find_args_size_adjust (rtx_insn *);
4275	extern poly_int64 fixup_args_size_notes (rtx_insn *, rtx_insn *, poly_int64);
4276
4277	/* In expmed.cc */
4278	extern void init_expmed (void);
4279	extern void expand_inc (rtx, rtx);
4280	extern void expand_dec (rtx, rtx);
4281
4282	/* In lower-subreg.cc */
4283	extern void init_lower_subreg (void);
4284
4285	/* In gcse.cc */
4286	extern bool can_copy_p (machine_mode);
4287	extern bool can_assign_to_reg_without_clobbers_p (rtx, machine_mode);
4288	extern rtx_insn *prepare_copy_insn (rtx, rtx);
4289
4290	/* In cprop.cc */
4291	extern rtx fis_get_condition (rtx_insn *);
4292
4293	/* In ira.cc */
4294	extern HARD_REG_SET eliminable_regset;
4295	extern void mark_elimination (int, int);
4296
4297	/* In reginfo.cc */
4298	extern bool reg_classes_intersect_p (reg_class_t, reg_class_t);
4299	extern bool reg_class_subset_p (reg_class_t, reg_class_t);
4300	extern void globalize_reg (tree, int);
4301	extern void init_reg_modes_target (void);
4302	extern void init_regs (void);
4303	extern void reinit_regs (void);
4304	extern void init_fake_stack_mems (void);
4305	extern void save_register_info (void);
4306	extern void init_reg_sets (void);
4307	extern void regclass (rtx, int);
4308	extern void reg_scan (rtx_insn *, unsigned int);
4309	extern void fix_register (const char *, int, int);
4310	extern const HARD_REG_SET *valid_mode_changes_for_regno (unsigned int);
4311
4312	/* In reload1.cc */
4313	extern bool function_invariant_p (const_rtx);
4314
4315	/* In calls.cc */
4316	enum libcall_type
4317	{
4318	LCT_NORMAL = 0,
4319	LCT_CONST = 1,
4320	LCT_PURE = 2,
4321	LCT_NORETURN = 3,
4322	LCT_THROW = 4,
4323	LCT_RETURNS_TWICE = 5
4324	};
4325
4326	extern rtx emit_library_call_value_1 (int, rtx, rtx, enum libcall_type,
4327	machine_mode, int, rtx_mode_t *);
4328
4329	/* Output a library call and discard the returned value. FUN is the
4330	address of the function, as a SYMBOL_REF rtx, and OUTMODE is the mode
4331	of the (discarded) return value. FN_TYPE is LCT_NORMAL for `normal'
4332	calls, LCT_CONST for `const' calls, LCT_PURE for `pure' calls, or
4333	another LCT_ value for other types of library calls.
4334
4335	There are different overloads of this function for different numbers
4336	of arguments. In each case the argument value is followed by its mode. */
4337
4338	inline void
4339	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode)
4340	{
4341	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 0, NULL);
4342	}
4343
4344	inline void
4345	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4346	rtx arg1, machine_mode arg1_mode)
4347	{
4348	rtx_mode_t args[] = { rtx_mode_t (arg1, arg1_mode) };
4349	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 1, args);
4350	}
4351
4352	inline void
4353	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4354	rtx arg1, machine_mode arg1_mode,
4355	rtx arg2, machine_mode arg2_mode)
4356	{
4357	rtx_mode_t args[] = {
4358	rtx_mode_t (arg1, arg1_mode),
4359	rtx_mode_t (arg2, arg2_mode)
4360	};
4361	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 2, args);
4362	}
4363
4364	inline void
4365	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4366	rtx arg1, machine_mode arg1_mode,
4367	rtx arg2, machine_mode arg2_mode,
4368	rtx arg3, machine_mode arg3_mode)
4369	{
4370	rtx_mode_t args[] = {
4371	rtx_mode_t (arg1, arg1_mode),
4372	rtx_mode_t (arg2, arg2_mode),
4373	rtx_mode_t (arg3, arg3_mode)
4374	};
4375	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 3, args);
4376	}
4377
4378	inline void
4379	emit_library_call (rtx fun, libcall_type fn_type, machine_mode outmode,
4380	rtx arg1, machine_mode arg1_mode,
4381	rtx arg2, machine_mode arg2_mode,
4382	rtx arg3, machine_mode arg3_mode,
4383	rtx arg4, machine_mode arg4_mode)
4384	{
4385	rtx_mode_t args[] = {
4386	rtx_mode_t (arg1, arg1_mode),
4387	rtx_mode_t (arg2, arg2_mode),
4388	rtx_mode_t (arg3, arg3_mode),
4389	rtx_mode_t (arg4, arg4_mode)
4390	};
4391	emit_library_call_value_1 (0, fun, NULL_RTX, fn_type, outmode, 4, args);
4392	}
4393
4394	/* Like emit_library_call, but return the value produced by the call.
4395	Use VALUE to store the result if it is nonnull, otherwise pick a
4396	convenient location. */
4397
4398	inline rtx
4399	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4400	machine_mode outmode)
4401	{
4402	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 0, NULL);
4403	}
4404
4405	inline rtx
4406	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4407	machine_mode outmode,
4408	rtx arg1, machine_mode arg1_mode)
4409	{
4410	rtx_mode_t args[] = { rtx_mode_t (arg1, arg1_mode) };
4411	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 1, args);
4412	}
4413
4414	inline rtx
4415	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4416	machine_mode outmode,
4417	rtx arg1, machine_mode arg1_mode,
4418	rtx arg2, machine_mode arg2_mode)
4419	{
4420	rtx_mode_t args[] = {
4421	rtx_mode_t (arg1, arg1_mode),
4422	rtx_mode_t (arg2, arg2_mode)
4423	};
4424	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 2, args);
4425	}
4426
4427	inline rtx
4428	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4429	machine_mode outmode,
4430	rtx arg1, machine_mode arg1_mode,
4431	rtx arg2, machine_mode arg2_mode,
4432	rtx arg3, machine_mode arg3_mode)
4433	{
4434	rtx_mode_t args[] = {
4435	rtx_mode_t (arg1, arg1_mode),
4436	rtx_mode_t (arg2, arg2_mode),
4437	rtx_mode_t (arg3, arg3_mode)
4438	};
4439	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 3, args);
4440	}
4441
4442	inline rtx
4443	emit_library_call_value (rtx fun, rtx value, libcall_type fn_type,
4444	machine_mode outmode,
4445	rtx arg1, machine_mode arg1_mode,
4446	rtx arg2, machine_mode arg2_mode,
4447	rtx arg3, machine_mode arg3_mode,
4448	rtx arg4, machine_mode arg4_mode)
4449	{
4450	rtx_mode_t args[] = {
4451	rtx_mode_t (arg1, arg1_mode),
4452	rtx_mode_t (arg2, arg2_mode),
4453	rtx_mode_t (arg3, arg3_mode),
4454	rtx_mode_t (arg4, arg4_mode)
4455	};
4456	return emit_library_call_value_1 (1, fun, value, fn_type, outmode, 4, args);
4457	}
4458
4459	/* In varasm.cc */
4460	extern void init_varasm_once (void);
4461
4462	extern rtx make_debug_expr_from_rtl (const_rtx);
4463
4464	/* In read-rtl.cc */
4465	#ifdef GENERATOR_FILE
4466	extern bool read_rtx (const char *, vec<rtx> *);
4467	#endif
4468
4469	/* In alias.cc */
4470	extern rtx canon_rtx (rtx);
4471	extern rtx get_addr (rtx);
4472	extern bool read_dependence (const_rtx, const_rtx);
4473	extern bool true_dependence (const_rtx, machine_mode, const_rtx);
4474	extern bool canon_true_dependence (const_rtx, machine_mode, rtx,
4475	const_rtx, rtx);
4476	extern bool anti_dependence (const_rtx, const_rtx);
4477	extern bool canon_anti_dependence (const_rtx, bool,
4478	const_rtx, machine_mode, rtx);
4479	extern bool output_dependence (const_rtx, const_rtx);
4480	extern bool canon_output_dependence (const_rtx, bool,
4481	const_rtx, machine_mode, rtx);
4482	extern bool may_alias_p (const_rtx, const_rtx);
4483	extern void init_alias_target (void);
4484	extern void init_alias_analysis (void);
4485	extern void end_alias_analysis (void);
4486	extern void vt_equate_reg_base_value (const_rtx, const_rtx);
4487	extern bool memory_modified_in_insn_p (const_rtx, const_rtx);
4488	extern bool may_be_sp_based_p (rtx);
4489	extern rtx gen_hard_reg_clobber (machine_mode, unsigned int);
4490	extern rtx get_reg_known_value (unsigned int);
4491	extern bool get_reg_known_equiv_p (unsigned int);
4492	extern rtx get_reg_base_value (unsigned int);
4493	extern rtx extract_mem_from_operand (rtx);
4494
4495	#ifdef STACK_REGS
4496	extern bool stack_regs_mentioned (const_rtx insn);
4497	#endif
4498
4499	/* In toplev.cc */
4500	extern GTY(()) rtx stack_limit_rtx;
4501
4502	/* In var-tracking.cc */
4503	extern unsigned int variable_tracking_main (void);
4504	extern void delete_vta_debug_insns (bool);
4505
4506	/* In stor-layout.cc. */
4507	extern void get_mode_bounds (scalar_int_mode, int,
4508	scalar_int_mode, rtx *, rtx *);
4509
4510	/* In loop-iv.cc */
4511	extern rtx canon_condition (rtx);
4512	extern void simplify_using_condition (rtx, rtx *, bitmap);
4513
4514	/* In final.cc */
4515	extern void compute_alignments (void);
4516	extern void update_alignments (vec<rtx> &);
4517	extern int asm_str_count (const char *templ);
4518
4519	struct rtl_hooks
4520	{
4521	rtx (*gen_lowpart) (machine_mode, rtx);
4522	rtx (*gen_lowpart_no_emit) (machine_mode, rtx);
4523	rtx (*reg_nonzero_bits) (const_rtx, scalar_int_mode, scalar_int_mode,
4524	unsigned HOST_WIDE_INT *);
4525	rtx (*reg_num_sign_bit_copies) (const_rtx, scalar_int_mode, scalar_int_mode,
4526	unsigned int *);
4527	bool (*reg_truncated_to_mode) (machine_mode, const_rtx);
4528
4529	/* Whenever you add entries here, make sure you adjust rtlhooks-def.h. */
4530	};
4531
4532	/* Each pass can provide its own. */
4533	extern struct rtl_hooks rtl_hooks;
4534
4535	/* ... but then it has to restore these. */
4536	extern const struct rtl_hooks general_rtl_hooks;
4537
4538	/* Keep this for the nonce. */
4539	#define gen_lowpart rtl_hooks.gen_lowpart
4540
4541	extern void insn_locations_init (void);
4542	extern void insn_locations_finalize (void);
4543	extern void set_curr_insn_location (location_t);
4544	extern location_t curr_insn_location (void);
4545	extern void set_insn_locations (rtx_insn *, location_t);
4546
4547	/* rtl-error.cc */
4548	extern void _fatal_insn_not_found (const_rtx, const char *, int, const char *)
4549	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
4550	extern void _fatal_insn (const char *, const_rtx, const char *, int, const char *)
4551	ATTRIBUTE_NORETURN ATTRIBUTE_COLD;
4552
4553	#define fatal_insn(msgid, insn) \
4554	_fatal_insn (msgid, insn, __FILE__, __LINE__, __FUNCTION__)
4555	#define fatal_insn_not_found(insn) \
4556	_fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)
4557
4558	/* reginfo.cc */
4559	extern tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
4560
4561	/* Information about the function that is propagated by the RTL backend.
4562	Available only for functions that has been already assembled. */
4563
4564	struct GTY(()) cgraph_rtl_info {
4565	unsigned int preferred_incoming_stack_boundary;
4566
4567	/* Which registers the function clobbers, either directly or by
4568	calling another function. */
4569	HARD_REG_SET function_used_regs;
4570	};
4571
4572	/* If loads from memories of mode MODE always sign or zero extend,
4573	return SIGN_EXTEND or ZERO_EXTEND as appropriate. Return UNKNOWN
4574	otherwise. */
4575
4576	inline rtx_code
4577	load_extend_op (machine_mode mode)
4578	{
4579	scalar_int_mode int_mode;
4580	if (is_a <scalar_int_mode> (m: mode, result: &int_mode)
4581	&& GET_MODE_PRECISION (mode: int_mode) < BITS_PER_WORD)
4582	return LOAD_EXTEND_OP (int_mode);
4583	return UNKNOWN;
4584	}
4585
4586	/* If X is a PLUS of a base and a constant offset, add the constant to *OFFSET
4587	and return the base. Return X otherwise. */
4588
4589	inline rtx
4590	strip_offset_and_add (rtx x, poly_int64 *offset)
4591	{
4592	if (GET_CODE (x) == PLUS)
4593	{
4594	poly_int64 suboffset;
4595	x = strip_offset (x, &suboffset);
4596	*offset = poly_uint64 (*offset) + suboffset;
4597	}
4598	return x;
4599	}
4600
4601	/* Return true if X is an operation that always operates on the full
4602	registers for WORD_REGISTER_OPERATIONS architectures. */
4603
4604	inline bool
4605	word_register_operation_p (const_rtx x)
4606	{
4607	switch (GET_CODE (x))
4608	{
4609	case CONST_INT:
4610	case ROTATE:
4611	case ROTATERT:
4612	case SIGN_EXTRACT:
4613	case ZERO_EXTRACT:
4614	return false;
4615
4616	default:
4617	return true;
4618	}
4619	}
4620
4621	/* Holds an rtx comparison to simplify passing many parameters pertaining to a
4622	single comparison. */
4623
4624	struct rtx_comparison {
4625	rtx_code code;
4626	rtx op0, op1;
4627	machine_mode mode;
4628	};
4629
4630	/* gtype-desc.cc. */
4631	extern void gt_ggc_mx (rtx &);
4632	extern void gt_pch_nx (rtx &);
4633	extern void gt_pch_nx (rtx &, gt_pointer_operator, void *);
4634
4635	#endif /* ! GCC_RTL_H */
4636