1	/*
2	* Copyright © 2006 Intel Corporation
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.
14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21	* SOFTWARE.
22	*
23	* Authors:
24	* Eric Anholt <eric@anholt.net>
25	*
26	*/
27
28	#include <drm/display/drm_dp_helper.h>
29	#include <drm/display/drm_dsc_helper.h>
30	#include <drm/drm_edid.h>
31
32	#include "i915_drv.h"
33	#include "i915_reg.h"
34	#include "intel_display.h"
35	#include "intel_display_types.h"
36	#include "intel_gmbus.h"
37
38	#define _INTEL_BIOS_PRIVATE
39	#include "intel_vbt_defs.h"
40
41	/**
42	* DOC: Video BIOS Table (VBT)
43	*
44	* The Video BIOS Table, or VBT, provides platform and board specific
45	* configuration information to the driver that is not discoverable or available
46	* through other means. The configuration is mostly related to display
47	* hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
48	* the PCI ROM.
49	*
50	* The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
51	* Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
52	* contain the actual configuration information. The VBT Header, and thus the
53	* VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
54	* BDB Header. The data blocks are concatenated after the BDB Header. The data
55	* blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
56	* data. (Block 53, the MIPI Sequence Block is an exception.)
57	*
58	* The driver parses the VBT during load. The relevant information is stored in
59	* driver private data for ease of use, and the actual VBT is not read after
60	* that.
61	*/
62
63	/* Wrapper for VBT child device config */
64	struct intel_bios_encoder_data {
65	struct drm_i915_private *i915;
66
67	struct child_device_config child;
68	struct dsc_compression_parameters_entry *dsc;
69	struct list_head node;
70	};
71
72	#define SLAVE_ADDR1 0x70
73	#define SLAVE_ADDR2 0x72
74
75	/* Get BDB block size given a pointer to Block ID. */
76	static u32 _get_blocksize(const u8 *block_base)
77	{
78	/* The MIPI Sequence Block v3+ has a separate size field. */
79	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
80	return *((const u32 *)(block_base + 4));
81	else
82	return *((const u16 *)(block_base + 1));
83	}
84
85	/* Get BDB block size give a pointer to data after Block ID and Block Size. */
86	static u32 get_blocksize(const void *block_data)
87	{
88	return _get_blocksize(block_base: block_data - 3);
89	}
90
91	static const void *
92	find_raw_section(const void *_bdb, enum bdb_block_id section_id)
93	{
94	const struct bdb_header *bdb = _bdb;
95	const u8 *base = _bdb;
96	int index = 0;
97	u32 total, current_size;
98	enum bdb_block_id current_id;
99
100	/* skip to first section */
101	index += bdb->header_size;
102	total = bdb->bdb_size;
103
104	/* walk the sections looking for section_id */
105	while (index + 3 < total) {
106	current_id = *(base + index);
107	current_size = _get_blocksize(block_base: base + index);
108	index += 3;
109
110	if (index + current_size > total)
111	return NULL;
112
113	if (current_id == section_id)
114	return base + index;
115
116	index += current_size;
117	}
118
119	return NULL;
120	}
121
122	/*
123	* Offset from the start of BDB to the start of the
124	* block data (just past the block header).
125	*/
126	static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
127	{
128	const void *block;
129
130	block = find_raw_section(bdb: bdb, section_id);
131	if (!block)
132	return 0;
133
134	return block - bdb;
135	}
136
137	struct bdb_block_entry {
138	struct list_head node;
139	enum bdb_block_id section_id;
140	u8 data[];
141	};
142
143	static const void *
144	bdb_find_section(struct drm_i915_private *i915,
145	enum bdb_block_id section_id)
146	{
147	struct bdb_block_entry *entry;
148
149	list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
150	if (entry->section_id == section_id)
151	return entry->data + 3;
152	}
153
154	return NULL;
155	}
156
157	static const struct {
158	enum bdb_block_id section_id;
159	size_t min_size;
160	} bdb_blocks[] = {
161	{ .section_id = BDB_GENERAL_FEATURES,
162	.min_size = sizeof(struct bdb_general_features), },
163	{ .section_id = BDB_GENERAL_DEFINITIONS,
164	.min_size = sizeof(struct bdb_general_definitions), },
165	{ .section_id = BDB_PSR,
166	.min_size = sizeof(struct bdb_psr), },
167	{ .section_id = BDB_DRIVER_FEATURES,
168	.min_size = sizeof(struct bdb_driver_features), },
169	{ .section_id = BDB_SDVO_LVDS_OPTIONS,
170	.min_size = sizeof(struct bdb_sdvo_lvds_options), },
171	{ .section_id = BDB_SDVO_PANEL_DTDS,
172	.min_size = sizeof(struct bdb_sdvo_panel_dtds), },
173	{ .section_id = BDB_EDP,
174	.min_size = sizeof(struct bdb_edp), },
175	{ .section_id = BDB_LVDS_OPTIONS,
176	.min_size = sizeof(struct bdb_lvds_options), },
177	/*
178	* BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
179	* so keep the two ordered.
180	*/
181	{ .section_id = BDB_LVDS_LFP_DATA_PTRS,
182	.min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
183	{ .section_id = BDB_LVDS_LFP_DATA,
184	.min_size = 0, /* special case */ },
185	{ .section_id = BDB_LVDS_BACKLIGHT,
186	.min_size = sizeof(struct bdb_lfp_backlight_data), },
187	{ .section_id = BDB_LFP_POWER,
188	.min_size = sizeof(struct bdb_lfp_power), },
189	{ .section_id = BDB_MIPI_CONFIG,
190	.min_size = sizeof(struct bdb_mipi_config), },
191	{ .section_id = BDB_MIPI_SEQUENCE,
192	.min_size = sizeof(struct bdb_mipi_sequence) },
193	{ .section_id = BDB_COMPRESSION_PARAMETERS,
194	.min_size = sizeof(struct bdb_compression_parameters), },
195	{ .section_id = BDB_GENERIC_DTD,
196	.min_size = sizeof(struct bdb_generic_dtd), },
197	};
198
199	static size_t lfp_data_min_size(struct drm_i915_private *i915)
200	{
201	const struct bdb_lvds_lfp_data_ptrs *ptrs;
202	size_t size;
203
204	ptrs = bdb_find_section(i915, section_id: BDB_LVDS_LFP_DATA_PTRS);
205	if (!ptrs)
206	return 0;
207
208	size = sizeof(struct bdb_lvds_lfp_data);
209	if (ptrs->panel_name.table_size)
210	size = max(size, ptrs->panel_name.offset +
211	sizeof(struct bdb_lvds_lfp_data_tail));
212
213	return size;
214	}
215
216	static bool validate_lfp_data_ptrs(const void *bdb,
217	const struct bdb_lvds_lfp_data_ptrs *ptrs)
218	{
219	int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
220	int data_block_size, lfp_data_size;
221	const void *data_block;
222	int i;
223
224	data_block = find_raw_section(bdb: bdb, section_id: BDB_LVDS_LFP_DATA);
225	if (!data_block)
226	return false;
227
228	data_block_size = get_blocksize(block_data: data_block);
229	if (data_block_size == 0)
230	return false;
231
232	/* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
233	if (ptrs->lvds_entries != 3)
234	return false;
235
236	fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
237	dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
238	panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
239	panel_name_size = ptrs->panel_name.table_size;
240
241	/* fp_timing has variable size */
242	if (fp_timing_size < 32 ||
243	dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
244	panel_pnp_id_size != sizeof(struct lvds_pnp_id))
245	return false;
246
247	/* panel_name is not present in old VBTs */
248	if (panel_name_size != 0 &&
249	panel_name_size != sizeof(struct lvds_lfp_panel_name))
250	return false;
251
252	lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
253	if (16 * lfp_data_size > data_block_size)
254	return false;
255
256	/* make sure the table entries have uniform size */
257	for (i = 1; i < 16; i++) {
258	if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
259	ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
260	ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
261	return false;
262
263	if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
264	ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
265	ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
266	return false;
267	}
268
269	/*
270	* Except for vlv/chv machines all real VBTs seem to have 6
271	* unaccounted bytes in the fp_timing table. And it doesn't
272	* appear to be a really intentional hole as the fp_timing
273	* 0xffff terminator is always within those 6 missing bytes.
274	*/
275	if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
276	fp_timing_size += 6;
277
278	if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
279	return false;
280
281	if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
282	ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
283	ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
284	return false;
285
286	/* make sure the tables fit inside the data block */
287	for (i = 0; i < 16; i++) {
288	if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
289	ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
290	ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
291	return false;
292	}
293
294	if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
295	return false;
296
297	/* make sure fp_timing terminators are present at expected locations */
298	for (i = 0; i < 16; i++) {
299	const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
300	fp_timing_size - 2;
301
302	if (*t != 0xffff)
303	return false;
304	}
305
306	return true;
307	}
308
309	/* make the data table offsets relative to the data block */
310	static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
311	{
312	struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
313	u32 offset;
314	int i;
315
316	offset = raw_block_offset(bdb, section_id: BDB_LVDS_LFP_DATA);
317
318	for (i = 0; i < 16; i++) {
319	if (ptrs->ptr[i].fp_timing.offset < offset ||
320	ptrs->ptr[i].dvo_timing.offset < offset ||
321	ptrs->ptr[i].panel_pnp_id.offset < offset)
322	return false;
323
324	ptrs->ptr[i].fp_timing.offset -= offset;
325	ptrs->ptr[i].dvo_timing.offset -= offset;
326	ptrs->ptr[i].panel_pnp_id.offset -= offset;
327	}
328
329	if (ptrs->panel_name.table_size) {
330	if (ptrs->panel_name.offset < offset)
331	return false;
332
333	ptrs->panel_name.offset -= offset;
334	}
335
336	return validate_lfp_data_ptrs(bdb, ptrs);
337	}
338
339	static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
340	int table_size, int total_size)
341	{
342	if (total_size < table_size)
343	return total_size;
344
345	table->table_size = table_size;
346	table->offset = total_size - table_size;
347
348	return total_size - table_size;
349	}
350
351	static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
352	const struct lvds_lfp_data_ptr_table *prev,
353	int size)
354	{
355	next->table_size = prev->table_size;
356	next->offset = prev->offset + size;
357	}
358
359	static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
360	const void *bdb)
361	{
362	int i, size, table_size, block_size, offset, fp_timing_size;
363	struct bdb_lvds_lfp_data_ptrs *ptrs;
364	const void *block;
365	void *ptrs_block;
366
367	/*
368	* The hardcoded fp_timing_size is only valid for
369	* modernish VBTs. All older VBTs definitely should
370	* include block 41 and thus we don't need to
371	* generate one.
372	*/
373	if (i915->display.vbt.version < 155)
374	return NULL;
375
376	fp_timing_size = 38;
377
378	block = find_raw_section(bdb: bdb, section_id: BDB_LVDS_LFP_DATA);
379	if (!block)
380	return NULL;
381
382	drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
383
384	block_size = get_blocksize(block_data: block);
385
386	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
387	sizeof(struct lvds_pnp_id);
388	if (size * 16 > block_size)
389	return NULL;
390
391	ptrs_block = kzalloc(size: sizeof(*ptrs) + 3, GFP_KERNEL);
392	if (!ptrs_block)
393	return NULL;
394
395	*(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
396	*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
397	ptrs = ptrs_block + 3;
398
399	table_size = sizeof(struct lvds_pnp_id);
400	size = make_lfp_data_ptr(table: &ptrs->ptr[0].panel_pnp_id, table_size, total_size: size);
401
402	table_size = sizeof(struct lvds_dvo_timing);
403	size = make_lfp_data_ptr(table: &ptrs->ptr[0].dvo_timing, table_size, total_size: size);
404
405	table_size = fp_timing_size;
406	size = make_lfp_data_ptr(table: &ptrs->ptr[0].fp_timing, table_size, total_size: size);
407
408	if (ptrs->ptr[0].fp_timing.table_size)
409	ptrs->lvds_entries++;
410	if (ptrs->ptr[0].dvo_timing.table_size)
411	ptrs->lvds_entries++;
412	if (ptrs->ptr[0].panel_pnp_id.table_size)
413	ptrs->lvds_entries++;
414
415	if (size != 0 || ptrs->lvds_entries != 3) {
416	kfree(objp: ptrs_block);
417	return NULL;
418	}
419
420	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
421	sizeof(struct lvds_pnp_id);
422	for (i = 1; i < 16; i++) {
423	next_lfp_data_ptr(next: &ptrs->ptr[i].fp_timing, prev: &ptrs->ptr[i-1].fp_timing, size);
424	next_lfp_data_ptr(next: &ptrs->ptr[i].dvo_timing, prev: &ptrs->ptr[i-1].dvo_timing, size);
425	next_lfp_data_ptr(next: &ptrs->ptr[i].panel_pnp_id, prev: &ptrs->ptr[i-1].panel_pnp_id, size);
426	}
427
428	table_size = sizeof(struct lvds_lfp_panel_name);
429
430	if (16 * (size + table_size) <= block_size) {
431	ptrs->panel_name.table_size = table_size;
432	ptrs->panel_name.offset = size * 16;
433	}
434
435	offset = block - bdb;
436
437	for (i = 0; i < 16; i++) {
438	ptrs->ptr[i].fp_timing.offset += offset;
439	ptrs->ptr[i].dvo_timing.offset += offset;
440	ptrs->ptr[i].panel_pnp_id.offset += offset;
441	}
442
443	if (ptrs->panel_name.table_size)
444	ptrs->panel_name.offset += offset;
445
446	return ptrs_block;
447	}
448
449	static void
450	init_bdb_block(struct drm_i915_private *i915,
451	const void *bdb, enum bdb_block_id section_id,
452	size_t min_size)
453	{
454	struct bdb_block_entry *entry;
455	void *temp_block = NULL;
456	const void *block;
457	size_t block_size;
458
459	block = find_raw_section(bdb: bdb, section_id);
460
461	/* Modern VBTs lack the LFP data table pointers block, make one up */
462	if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
463	temp_block = generate_lfp_data_ptrs(i915, bdb);
464	if (temp_block)
465	block = temp_block + 3;
466	}
467	if (!block)
468	return;
469
470	drm_WARN(&i915->drm, min_size == 0,
471	"Block %d min_size is zero\n", section_id);
472
473	block_size = get_blocksize(block_data: block);
474
475	/*
476	* Version number and new block size are considered
477	* part of the header for MIPI sequenece block v3+.
478	*/
479	if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
480	block_size += 5;
481
482	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
483	GFP_KERNEL);
484	if (!entry) {
485	kfree(objp: temp_block);
486	return;
487	}
488
489	entry->section_id = section_id;
490	memcpy(entry->data, block - 3, block_size + 3);
491
492	kfree(objp: temp_block);
493
494	drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495	section_id, block_size, min_size);
496
497	if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498	!fixup_lfp_data_ptrs(bdb, ptrs_block: entry->data + 3)) {
499	drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
500	kfree(objp: entry);
501	return;
502	}
503
504	list_add_tail(new: &entry->node, head: &i915->display.vbt.bdb_blocks);
505	}
506
507	static void init_bdb_blocks(struct drm_i915_private *i915,
508	const void *bdb)
509	{
510	int i;
511
512	for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513	enum bdb_block_id section_id = bdb_blocks[i].section_id;
514	size_t min_size = bdb_blocks[i].min_size;
515
516	if (section_id == BDB_LVDS_LFP_DATA)
517	min_size = lfp_data_min_size(i915);
518
519	init_bdb_block(i915, bdb, section_id, min_size);
520	}
521	}
522
523	static void
524	fill_detail_timing_data(struct drm_i915_private *i915,
525	struct drm_display_mode *panel_fixed_mode,
526	const struct lvds_dvo_timing *dvo_timing)
527	{
528	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
529	dvo_timing->hactive_lo;
530	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
531	((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
532	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
533	((dvo_timing->hsync_pulse_width_hi << 8) |
534	dvo_timing->hsync_pulse_width_lo);
535	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
536	((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
537
538	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
539	dvo_timing->vactive_lo;
540	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
541	((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
542	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
543	((dvo_timing->vsync_pulse_width_hi << 4) |
544	dvo_timing->vsync_pulse_width_lo);
545	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
546	((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
547	panel_fixed_mode->clock = dvo_timing->clock * 10;
548	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
549
550	if (dvo_timing->hsync_positive)
551	panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
552	else
553	panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
554
555	if (dvo_timing->vsync_positive)
556	panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
557	else
558	panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
559
560	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
561	dvo_timing->himage_lo;
562	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
563	dvo_timing->vimage_lo;
564
565	/* Some VBTs have bogus h/vsync_end values */
566	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
567	drm_dbg_kms(&i915->drm, "reducing hsync_end %d->%d\n",
568	panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
569	panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
570	}
571	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
572	drm_dbg_kms(&i915->drm, "reducing vsync_end %d->%d\n",
573	panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
574	panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
575	}
576
577	drm_mode_set_name(mode: panel_fixed_mode);
578	}
579
580	static const struct lvds_dvo_timing *
581	get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
582	const struct bdb_lvds_lfp_data_ptrs *ptrs,
583	int index)
584	{
585	return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
586	}
587
588	static const struct lvds_fp_timing *
589	get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
590	const struct bdb_lvds_lfp_data_ptrs *ptrs,
591	int index)
592	{
593	return (const void *)data + ptrs->ptr[index].fp_timing.offset;
594	}
595
596	static const struct lvds_pnp_id *
597	get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
598	const struct bdb_lvds_lfp_data_ptrs *ptrs,
599	int index)
600	{
601	return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
602	}
603
604	static const struct bdb_lvds_lfp_data_tail *
605	get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
606	const struct bdb_lvds_lfp_data_ptrs *ptrs)
607	{
608	if (ptrs->panel_name.table_size)
609	return (const void *)data + ptrs->panel_name.offset;
610	else
611	return NULL;
612	}
613
614	static void dump_pnp_id(struct drm_i915_private *i915,
615	const struct lvds_pnp_id *pnp_id,
616	const char *name)
617	{
618	u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
619	char vend[4];
620
621	drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
622	name, drm_edid_decode_mfg_id(mfg_name, vend),
623	pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
624	pnp_id->mfg_week, pnp_id->mfg_year + 1990);
625	}
626
627	static int opregion_get_panel_type(struct drm_i915_private *i915,
628	const struct intel_bios_encoder_data *devdata,
629	const struct drm_edid *drm_edid, bool use_fallback)
630	{
631	return intel_opregion_get_panel_type(dev_priv: i915);
632	}
633
634	static int vbt_get_panel_type(struct drm_i915_private *i915,
635	const struct intel_bios_encoder_data *devdata,
636	const struct drm_edid *drm_edid, bool use_fallback)
637	{
638	const struct bdb_lvds_options *lvds_options;
639
640	lvds_options = bdb_find_section(i915, section_id: BDB_LVDS_OPTIONS);
641	if (!lvds_options)
642	return -1;
643
644	if (lvds_options->panel_type > 0xf &&
645	lvds_options->panel_type != 0xff) {
646	drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
647	lvds_options->panel_type);
648	return -1;
649	}
650
651	if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
652	return lvds_options->panel_type2;
653
654	drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
655
656	return lvds_options->panel_type;
657	}
658
659	static int pnpid_get_panel_type(struct drm_i915_private *i915,
660	const struct intel_bios_encoder_data *devdata,
661	const struct drm_edid *drm_edid, bool use_fallback)
662	{
663	const struct bdb_lvds_lfp_data *data;
664	const struct bdb_lvds_lfp_data_ptrs *ptrs;
665	const struct lvds_pnp_id *edid_id;
666	struct lvds_pnp_id edid_id_nodate;
667	const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
668	int i, best = -1;
669
670	if (!edid)
671	return -1;
672
673	edid_id = (const void *)&edid->mfg_id[0];
674
675	edid_id_nodate = *edid_id;
676	edid_id_nodate.mfg_week = 0;
677	edid_id_nodate.mfg_year = 0;
678
679	dump_pnp_id(i915, pnp_id: edid_id, name: "EDID");
680
681	ptrs = bdb_find_section(i915, section_id: BDB_LVDS_LFP_DATA_PTRS);
682	if (!ptrs)
683	return -1;
684
685	data = bdb_find_section(i915, section_id: BDB_LVDS_LFP_DATA);
686	if (!data)
687	return -1;
688
689	for (i = 0; i < 16; i++) {
690	const struct lvds_pnp_id *vbt_id =
691	get_lvds_pnp_id(data, ptrs, index: i);
692
693	/* full match? */
694	if (!memcmp(p: vbt_id, q: edid_id, size: sizeof(*vbt_id)))
695	return i;
696
697	/*
698	* Accept a match w/o date if no full match is found,
699	* and the VBT entry does not specify a date.
700	*/
701	if (best < 0 &&
702	!memcmp(p: vbt_id, q: &edid_id_nodate, size: sizeof(*vbt_id)))
703	best = i;
704	}
705
706	return best;
707	}
708
709	static int fallback_get_panel_type(struct drm_i915_private *i915,
710	const struct intel_bios_encoder_data *devdata,
711	const struct drm_edid *drm_edid, bool use_fallback)
712	{
713	return use_fallback ? 0 : -1;
714	}
715
716	enum panel_type {
717	PANEL_TYPE_OPREGION,
718	PANEL_TYPE_VBT,
719	PANEL_TYPE_PNPID,
720	PANEL_TYPE_FALLBACK,
721	};
722
723	static int get_panel_type(struct drm_i915_private *i915,
724	const struct intel_bios_encoder_data *devdata,
725	const struct drm_edid *drm_edid, bool use_fallback)
726	{
727	struct {
728	const char *name;
729	int (*get_panel_type)(struct drm_i915_private *i915,
730	const struct intel_bios_encoder_data *devdata,
731	const struct drm_edid *drm_edid, bool use_fallback);
732	int panel_type;
733	} panel_types[] = {
734	[PANEL_TYPE_OPREGION] = {
735	.name = "OpRegion",
736	.get_panel_type = opregion_get_panel_type,
737	},
738	[PANEL_TYPE_VBT] = {
739	.name = "VBT",
740	.get_panel_type = vbt_get_panel_type,
741	},
742	[PANEL_TYPE_PNPID] = {
743	.name = "PNPID",
744	.get_panel_type = pnpid_get_panel_type,
745	},
746	[PANEL_TYPE_FALLBACK] = {
747	.name = "fallback",
748	.get_panel_type = fallback_get_panel_type,
749	},
750	};
751	int i;
752
753	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
754	panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
755	drm_edid, use_fallback);
756
757	drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
758	panel_types[i].panel_type != 0xff);
759
760	if (panel_types[i].panel_type >= 0)
761	drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
762	panel_types[i].name, panel_types[i].panel_type);
763	}
764
765	if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
766	i = PANEL_TYPE_OPREGION;
767	else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
768	panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
769	i = PANEL_TYPE_PNPID;
770	else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
771	panel_types[PANEL_TYPE_VBT].panel_type >= 0)
772	i = PANEL_TYPE_VBT;
773	else
774	i = PANEL_TYPE_FALLBACK;
775
776	drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
777	panel_types[i].name, panel_types[i].panel_type);
778
779	return panel_types[i].panel_type;
780	}
781
782	static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
783	{
784	return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
785	}
786
787	static bool panel_bool(unsigned int value, int panel_type)
788	{
789	return panel_bits(value, panel_type, num_bits: 1);
790	}
791
792	/* Parse general panel options */
793	static void
794	parse_panel_options(struct drm_i915_private *i915,
795	struct intel_panel *panel)
796	{
797	const struct bdb_lvds_options *lvds_options;
798	int panel_type = panel->vbt.panel_type;
799	int drrs_mode;
800
801	lvds_options = bdb_find_section(i915, section_id: BDB_LVDS_OPTIONS);
802	if (!lvds_options)
803	return;
804
805	panel->vbt.lvds_dither = lvds_options->pixel_dither;
806
807	/*
808	* Empirical evidence indicates the block size can be
809	* either 4,14,16,24+ bytes. For older VBTs no clear
810	* relationship between the block size vs. BDB version.
811	*/
812	if (get_blocksize(block_data: lvds_options) < 16)
813	return;
814
815	drrs_mode = panel_bits(value: lvds_options->dps_panel_type_bits,
816	panel_type, num_bits: 2);
817	/*
818	* VBT has static DRRS = 0 and seamless DRRS = 2.
819	* The below piece of code is required to adjust vbt.drrs_type
820	* to match the enum drrs_support_type.
821	*/
822	switch (drrs_mode) {
823	case 0:
824	panel->vbt.drrs_type = DRRS_TYPE_STATIC;
825	drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
826	break;
827	case 2:
828	panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
829	drm_dbg_kms(&i915->drm,
830	"DRRS supported mode is seamless\n");
831	break;
832	default:
833	panel->vbt.drrs_type = DRRS_TYPE_NONE;
834	drm_dbg_kms(&i915->drm,
835	"DRRS not supported (VBT input)\n");
836	break;
837	}
838	}
839
840	static void
841	parse_lfp_panel_dtd(struct drm_i915_private *i915,
842	struct intel_panel *panel,
843	const struct bdb_lvds_lfp_data *lvds_lfp_data,
844	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
845	{
846	const struct lvds_dvo_timing *panel_dvo_timing;
847	const struct lvds_fp_timing *fp_timing;
848	struct drm_display_mode *panel_fixed_mode;
849	int panel_type = panel->vbt.panel_type;
850
851	panel_dvo_timing = get_lvds_dvo_timing(data: lvds_lfp_data,
852	ptrs: lvds_lfp_data_ptrs,
853	index: panel_type);
854
855	panel_fixed_mode = kzalloc(size: sizeof(*panel_fixed_mode), GFP_KERNEL);
856	if (!panel_fixed_mode)
857	return;
858
859	fill_detail_timing_data(i915, panel_fixed_mode, dvo_timing: panel_dvo_timing);
860
861	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
862
863	drm_dbg_kms(&i915->drm,
864	"Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
865	DRM_MODE_ARG(panel_fixed_mode));
866
867	fp_timing = get_lvds_fp_timing(data: lvds_lfp_data,
868	ptrs: lvds_lfp_data_ptrs,
869	index: panel_type);
870
871	/* check the resolution, just to be sure */
872	if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
873	fp_timing->y_res == panel_fixed_mode->vdisplay) {
874	panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
875	drm_dbg_kms(&i915->drm,
876	"VBT initial LVDS value %x\n",
877	panel->vbt.bios_lvds_val);
878	}
879	}
880
881	static void
882	parse_lfp_data(struct drm_i915_private *i915,
883	struct intel_panel *panel)
884	{
885	const struct bdb_lvds_lfp_data *data;
886	const struct bdb_lvds_lfp_data_tail *tail;
887	const struct bdb_lvds_lfp_data_ptrs *ptrs;
888	const struct lvds_pnp_id *pnp_id;
889	int panel_type = panel->vbt.panel_type;
890
891	ptrs = bdb_find_section(i915, section_id: BDB_LVDS_LFP_DATA_PTRS);
892	if (!ptrs)
893	return;
894
895	data = bdb_find_section(i915, section_id: BDB_LVDS_LFP_DATA);
896	if (!data)
897	return;
898
899	if (!panel->vbt.lfp_lvds_vbt_mode)
900	parse_lfp_panel_dtd(i915, panel, lvds_lfp_data: data, lvds_lfp_data_ptrs: ptrs);
901
902	pnp_id = get_lvds_pnp_id(data, ptrs, index: panel_type);
903	dump_pnp_id(i915, pnp_id, name: "Panel");
904
905	tail = get_lfp_data_tail(data, ptrs);
906	if (!tail)
907	return;
908
909	drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
910	(int)sizeof(tail->panel_name[0].name),
911	tail->panel_name[panel_type].name);
912
913	if (i915->display.vbt.version >= 188) {
914	panel->vbt.seamless_drrs_min_refresh_rate =
915	tail->seamless_drrs_min_refresh_rate[panel_type];
916	drm_dbg_kms(&i915->drm,
917	"Seamless DRRS min refresh rate: %d Hz\n",
918	panel->vbt.seamless_drrs_min_refresh_rate);
919	}
920	}
921
922	static void
923	parse_generic_dtd(struct drm_i915_private *i915,
924	struct intel_panel *panel)
925	{
926	const struct bdb_generic_dtd *generic_dtd;
927	const struct generic_dtd_entry *dtd;
928	struct drm_display_mode *panel_fixed_mode;
929	int num_dtd;
930
931	/*
932	* Older VBTs provided DTD information for internal displays through
933	* the "LFP panel tables" block (42). As of VBT revision 229 the
934	* DTD information should be provided via a newer "generic DTD"
935	* block (58). Just to be safe, we'll try the new generic DTD block
936	* first on VBT >= 229, but still fall back to trying the old LFP
937	* block if that fails.
938	*/
939	if (i915->display.vbt.version < 229)
940	return;
941
942	generic_dtd = bdb_find_section(i915, section_id: BDB_GENERIC_DTD);
943	if (!generic_dtd)
944	return;
945
946	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
947	drm_err(&i915->drm, "GDTD size %u is too small.\n",
948	generic_dtd->gdtd_size);
949	return;
950	} else if (generic_dtd->gdtd_size !=
951	sizeof(struct generic_dtd_entry)) {
952	drm_err(&i915->drm, "Unexpected GDTD size %u\n",
953	generic_dtd->gdtd_size);
954	/* DTD has unknown fields, but keep going */
955	}
956
957	num_dtd = (get_blocksize(block_data: generic_dtd) -
958	sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
959	if (panel->vbt.panel_type >= num_dtd) {
960	drm_err(&i915->drm,
961	"Panel type %d not found in table of %d DTD's\n",
962	panel->vbt.panel_type, num_dtd);
963	return;
964	}
965
966	dtd = &generic_dtd->dtd[panel->vbt.panel_type];
967
968	panel_fixed_mode = kzalloc(size: sizeof(*panel_fixed_mode), GFP_KERNEL);
969	if (!panel_fixed_mode)
970	return;
971
972	panel_fixed_mode->hdisplay = dtd->hactive;
973	panel_fixed_mode->hsync_start =
974	panel_fixed_mode->hdisplay + dtd->hfront_porch;
975	panel_fixed_mode->hsync_end =
976	panel_fixed_mode->hsync_start + dtd->hsync;
977	panel_fixed_mode->htotal =
978	panel_fixed_mode->hdisplay + dtd->hblank;
979
980	panel_fixed_mode->vdisplay = dtd->vactive;
981	panel_fixed_mode->vsync_start =
982	panel_fixed_mode->vdisplay + dtd->vfront_porch;
983	panel_fixed_mode->vsync_end =
984	panel_fixed_mode->vsync_start + dtd->vsync;
985	panel_fixed_mode->vtotal =
986	panel_fixed_mode->vdisplay + dtd->vblank;
987
988	panel_fixed_mode->clock = dtd->pixel_clock;
989	panel_fixed_mode->width_mm = dtd->width_mm;
990	panel_fixed_mode->height_mm = dtd->height_mm;
991
992	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
993	drm_mode_set_name(mode: panel_fixed_mode);
994
995	if (dtd->hsync_positive_polarity)
996	panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
997	else
998	panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
999
1000	if (dtd->vsync_positive_polarity)
1001	panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1002	else
1003	panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1004
1005	drm_dbg_kms(&i915->drm,
1006	"Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1007	DRM_MODE_ARG(panel_fixed_mode));
1008
1009	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1010	}
1011
1012	static void
1013	parse_lfp_backlight(struct drm_i915_private *i915,
1014	struct intel_panel *panel)
1015	{
1016	const struct bdb_lfp_backlight_data *backlight_data;
1017	const struct lfp_backlight_data_entry *entry;
1018	int panel_type = panel->vbt.panel_type;
1019	u16 level;
1020
1021	backlight_data = bdb_find_section(i915, section_id: BDB_LVDS_BACKLIGHT);
1022	if (!backlight_data)
1023	return;
1024
1025	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1026	drm_dbg_kms(&i915->drm,
1027	"Unsupported backlight data entry size %u\n",
1028	backlight_data->entry_size);
1029	return;
1030	}
1031
1032	entry = &backlight_data->data[panel_type];
1033
1034	panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1035	if (!panel->vbt.backlight.present) {
1036	drm_dbg_kms(&i915->drm,
1037	"PWM backlight not present in VBT (type %u)\n",
1038	entry->type);
1039	return;
1040	}
1041
1042	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1043	panel->vbt.backlight.controller = 0;
1044	if (i915->display.vbt.version >= 191) {
1045	size_t exp_size;
1046
1047	if (i915->display.vbt.version >= 236)
1048	exp_size = sizeof(struct bdb_lfp_backlight_data);
1049	else if (i915->display.vbt.version >= 234)
1050	exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1051	else
1052	exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1053
1054	if (get_blocksize(block_data: backlight_data) >= exp_size) {
1055	const struct lfp_backlight_control_method *method;
1056
1057	method = &backlight_data->backlight_control[panel_type];
1058	panel->vbt.backlight.type = method->type;
1059	panel->vbt.backlight.controller = method->controller;
1060	}
1061	}
1062
1063	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1064	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1065
1066	if (i915->display.vbt.version >= 234) {
1067	u16 min_level;
1068	bool scale;
1069
1070	level = backlight_data->brightness_level[panel_type].level;
1071	min_level = backlight_data->brightness_min_level[panel_type].level;
1072
1073	if (i915->display.vbt.version >= 236)
1074	scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1075	else
1076	scale = level > 255;
1077
1078	if (scale)
1079	min_level = min_level / 255;
1080
1081	if (min_level > 255) {
1082	drm_warn(&i915->drm, "Brightness min level > 255\n");
1083	level = 255;
1084	}
1085	panel->vbt.backlight.min_brightness = min_level;
1086
1087	panel->vbt.backlight.brightness_precision_bits =
1088	backlight_data->brightness_precision_bits[panel_type];
1089	} else {
1090	level = backlight_data->level[panel_type];
1091	panel->vbt.backlight.min_brightness = entry->min_brightness;
1092	}
1093
1094	if (i915->display.vbt.version >= 239)
1095	panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1096	DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1097	else
1098	panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1099
1100	drm_dbg_kms(&i915->drm,
1101	"VBT backlight PWM modulation frequency %u Hz, "
1102	"active %s, min brightness %u, level %u, controller %u\n",
1103	panel->vbt.backlight.pwm_freq_hz,
1104	panel->vbt.backlight.active_low_pwm ? "low" : "high",
1105	panel->vbt.backlight.min_brightness,
1106	level,
1107	panel->vbt.backlight.controller);
1108	}
1109
1110	/* Try to find sdvo panel data */
1111	static void
1112	parse_sdvo_panel_data(struct drm_i915_private *i915,
1113	struct intel_panel *panel)
1114	{
1115	const struct bdb_sdvo_panel_dtds *dtds;
1116	struct drm_display_mode *panel_fixed_mode;
1117	int index;
1118
1119	index = i915->display.params.vbt_sdvo_panel_type;
1120	if (index == -2) {
1121	drm_dbg_kms(&i915->drm,
1122	"Ignore SDVO panel mode from BIOS VBT tables.\n");
1123	return;
1124	}
1125
1126	if (index == -1) {
1127	const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1128
1129	sdvo_lvds_options = bdb_find_section(i915, section_id: BDB_SDVO_LVDS_OPTIONS);
1130	if (!sdvo_lvds_options)
1131	return;
1132
1133	index = sdvo_lvds_options->panel_type;
1134	}
1135
1136	dtds = bdb_find_section(i915, section_id: BDB_SDVO_PANEL_DTDS);
1137	if (!dtds)
1138	return;
1139
1140	panel_fixed_mode = kzalloc(size: sizeof(*panel_fixed_mode), GFP_KERNEL);
1141	if (!panel_fixed_mode)
1142	return;
1143
1144	fill_detail_timing_data(i915, panel_fixed_mode, dvo_timing: &dtds->dtds[index]);
1145
1146	panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1147
1148	drm_dbg_kms(&i915->drm,
1149	"Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1150	DRM_MODE_ARG(panel_fixed_mode));
1151	}
1152
1153	static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1154	bool alternate)
1155	{
1156	switch (DISPLAY_VER(i915)) {
1157	case 2:
1158	return alternate ? 66667 : 48000;
1159	case 3:
1160	case 4:
1161	return alternate ? 100000 : 96000;
1162	default:
1163	return alternate ? 100000 : 120000;
1164	}
1165	}
1166
1167	static void
1168	parse_general_features(struct drm_i915_private *i915)
1169	{
1170	const struct bdb_general_features *general;
1171
1172	general = bdb_find_section(i915, section_id: BDB_GENERAL_FEATURES);
1173	if (!general)
1174	return;
1175
1176	i915->display.vbt.int_tv_support = general->int_tv_support;
1177	/* int_crt_support can't be trusted on earlier platforms */
1178	if (i915->display.vbt.version >= 155 &&
1179	(HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1180	i915->display.vbt.int_crt_support = general->int_crt_support;
1181	i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1182	i915->display.vbt.lvds_ssc_freq =
1183	intel_bios_ssc_frequency(i915, alternate: general->ssc_freq);
1184	i915->display.vbt.display_clock_mode = general->display_clock_mode;
1185	i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1186	if (i915->display.vbt.version >= 181) {
1187	i915->display.vbt.orientation = general->rotate_180 ?
1188	DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1189	DRM_MODE_PANEL_ORIENTATION_NORMAL;
1190	} else {
1191	i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1192	}
1193
1194	if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1195	i915->display.vbt.override_afc_startup = true;
1196	i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1197	}
1198
1199	drm_dbg_kms(&i915->drm,
1200	"BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1201	i915->display.vbt.int_tv_support,
1202	i915->display.vbt.int_crt_support,
1203	i915->display.vbt.lvds_use_ssc,
1204	i915->display.vbt.lvds_ssc_freq,
1205	i915->display.vbt.display_clock_mode,
1206	i915->display.vbt.fdi_rx_polarity_inverted);
1207	}
1208
1209	static const struct child_device_config *
1210	child_device_ptr(const struct bdb_general_definitions *defs, int i)
1211	{
1212	return (const void *) &defs->devices[i * defs->child_dev_size];
1213	}
1214
1215	static void
1216	parse_sdvo_device_mapping(struct drm_i915_private *i915)
1217	{
1218	const struct intel_bios_encoder_data *devdata;
1219	int count = 0;
1220
1221	/*
1222	* Only parse SDVO mappings on gens that could have SDVO. This isn't
1223	* accurate and doesn't have to be, as long as it's not too strict.
1224	*/
1225	if (!IS_DISPLAY_VER(i915, 3, 7)) {
1226	drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1227	return;
1228	}
1229
1230	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1231	const struct child_device_config *child = &devdata->child;
1232	struct sdvo_device_mapping *mapping;
1233
1234	if (child->slave_addr != SLAVE_ADDR1 &&
1235	child->slave_addr != SLAVE_ADDR2) {
1236	/*
1237	* If the slave address is neither 0x70 nor 0x72,
1238	* it is not a SDVO device. Skip it.
1239	*/
1240	continue;
1241	}
1242	if (child->dvo_port != DEVICE_PORT_DVOB &&
1243	child->dvo_port != DEVICE_PORT_DVOC) {
1244	/* skip the incorrect SDVO port */
1245	drm_dbg_kms(&i915->drm,
1246	"Incorrect SDVO port. Skip it\n");
1247	continue;
1248	}
1249	drm_dbg_kms(&i915->drm,
1250	"the SDVO device with slave addr %2x is found on"
1251	" %s port\n",
1252	child->slave_addr,
1253	(child->dvo_port == DEVICE_PORT_DVOB) ?
1254	"SDVOB" : "SDVOC");
1255	mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1256	if (!mapping->initialized) {
1257	mapping->dvo_port = child->dvo_port;
1258	mapping->slave_addr = child->slave_addr;
1259	mapping->dvo_wiring = child->dvo_wiring;
1260	mapping->ddc_pin = child->ddc_pin;
1261	mapping->i2c_pin = child->i2c_pin;
1262	mapping->initialized = 1;
1263	drm_dbg_kms(&i915->drm,
1264	"SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1265	mapping->dvo_port, mapping->slave_addr,
1266	mapping->dvo_wiring, mapping->ddc_pin,
1267	mapping->i2c_pin);
1268	} else {
1269	drm_dbg_kms(&i915->drm,
1270	"Maybe one SDVO port is shared by "
1271	"two SDVO device.\n");
1272	}
1273	if (child->slave2_addr) {
1274	/* Maybe this is a SDVO device with multiple inputs */
1275	/* And the mapping info is not added */
1276	drm_dbg_kms(&i915->drm,
1277	"there exists the slave2_addr. Maybe this"
1278	" is a SDVO device with multiple inputs.\n");
1279	}
1280	count++;
1281	}
1282
1283	if (!count) {
1284	/* No SDVO device info is found */
1285	drm_dbg_kms(&i915->drm,
1286	"No SDVO device info is found in VBT\n");
1287	}
1288	}
1289
1290	static void
1291	parse_driver_features(struct drm_i915_private *i915)
1292	{
1293	const struct bdb_driver_features *driver;
1294
1295	driver = bdb_find_section(i915, section_id: BDB_DRIVER_FEATURES);
1296	if (!driver)
1297	return;
1298
1299	if (DISPLAY_VER(i915) >= 5) {
1300	/*
1301	* Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1302	* to mean "eDP". The VBT spec doesn't agree with that
1303	* interpretation, but real world VBTs seem to.
1304	*/
1305	if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1306	i915->display.vbt.int_lvds_support = 0;
1307	} else {
1308	/*
1309	* FIXME it's not clear which BDB version has the LVDS config
1310	* bits defined. Revision history in the VBT spec says:
1311	* "0.92 | Add two definitions for VBT value of LVDS Active
1312	* Config (00b and 11b values defined) | 06/13/2005"
1313	* but does not the specify the BDB version.
1314	*
1315	* So far version 134 (on i945gm) is the oldest VBT observed
1316	* in the wild with the bits correctly populated. Version
1317	* 108 (on i85x) does not have the bits correctly populated.
1318	*/
1319	if (i915->display.vbt.version >= 134 &&
1320	driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1321	driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1322	i915->display.vbt.int_lvds_support = 0;
1323	}
1324	}
1325
1326	static void
1327	parse_panel_driver_features(struct drm_i915_private *i915,
1328	struct intel_panel *panel)
1329	{
1330	const struct bdb_driver_features *driver;
1331
1332	driver = bdb_find_section(i915, section_id: BDB_DRIVER_FEATURES);
1333	if (!driver)
1334	return;
1335
1336	if (i915->display.vbt.version < 228) {
1337	drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1338	driver->drrs_enabled);
1339	/*
1340	* If DRRS is not supported, drrs_type has to be set to 0.
1341	* This is because, VBT is configured in such a way that
1342	* static DRRS is 0 and DRRS not supported is represented by
1343	* driver->drrs_enabled=false
1344	*/
1345	if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1346	/*
1347	* FIXME Should DMRRS perhaps be treated as seamless
1348	* but without the automatic downclocking?
1349	*/
1350	if (driver->dmrrs_enabled)
1351	panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1352	else
1353	panel->vbt.drrs_type = DRRS_TYPE_NONE;
1354	}
1355
1356	panel->vbt.psr.enable = driver->psr_enabled;
1357	}
1358	}
1359
1360	static void
1361	parse_power_conservation_features(struct drm_i915_private *i915,
1362	struct intel_panel *panel)
1363	{
1364	const struct bdb_lfp_power *power;
1365	u8 panel_type = panel->vbt.panel_type;
1366
1367	panel->vbt.vrr = true; /* matches Windows behaviour */
1368
1369	if (i915->display.vbt.version < 228)
1370	return;
1371
1372	power = bdb_find_section(i915, section_id: BDB_LFP_POWER);
1373	if (!power)
1374	return;
1375
1376	panel->vbt.psr.enable = panel_bool(value: power->psr, panel_type);
1377
1378	/*
1379	* If DRRS is not supported, drrs_type has to be set to 0.
1380	* This is because, VBT is configured in such a way that
1381	* static DRRS is 0 and DRRS not supported is represented by
1382	* power->drrs & BIT(panel_type)=false
1383	*/
1384	if (!panel_bool(value: power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1385	/*
1386	* FIXME Should DMRRS perhaps be treated as seamless
1387	* but without the automatic downclocking?
1388	*/
1389	if (panel_bool(value: power->dmrrs, panel_type))
1390	panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1391	else
1392	panel->vbt.drrs_type = DRRS_TYPE_NONE;
1393	}
1394
1395	if (i915->display.vbt.version >= 232)
1396	panel->vbt.edp.hobl = panel_bool(value: power->hobl, panel_type);
1397
1398	if (i915->display.vbt.version >= 233)
1399	panel->vbt.vrr = panel_bool(value: power->vrr_feature_enabled,
1400	panel_type);
1401	}
1402
1403	static void
1404	parse_edp(struct drm_i915_private *i915,
1405	struct intel_panel *panel)
1406	{
1407	const struct bdb_edp *edp;
1408	const struct edp_power_seq *edp_pps;
1409	const struct edp_fast_link_params *edp_link_params;
1410	int panel_type = panel->vbt.panel_type;
1411
1412	edp = bdb_find_section(i915, section_id: BDB_EDP);
1413	if (!edp)
1414	return;
1415
1416	switch (panel_bits(value: edp->color_depth, panel_type, num_bits: 2)) {
1417	case EDP_18BPP:
1418	panel->vbt.edp.bpp = 18;
1419	break;
1420	case EDP_24BPP:
1421	panel->vbt.edp.bpp = 24;
1422	break;
1423	case EDP_30BPP:
1424	panel->vbt.edp.bpp = 30;
1425	break;
1426	}
1427
1428	/* Get the eDP sequencing and link info */
1429	edp_pps = &edp->power_seqs[panel_type];
1430	edp_link_params = &edp->fast_link_params[panel_type];
1431
1432	panel->vbt.edp.pps = *edp_pps;
1433
1434	if (i915->display.vbt.version >= 224) {
1435	panel->vbt.edp.rate =
1436	edp->edp_fast_link_training_rate[panel_type] * 20;
1437	} else {
1438	switch (edp_link_params->rate) {
1439	case EDP_RATE_1_62:
1440	panel->vbt.edp.rate = 162000;
1441	break;
1442	case EDP_RATE_2_7:
1443	panel->vbt.edp.rate = 270000;
1444	break;
1445	case EDP_RATE_5_4:
1446	panel->vbt.edp.rate = 540000;
1447	break;
1448	default:
1449	drm_dbg_kms(&i915->drm,
1450	"VBT has unknown eDP link rate value %u\n",
1451	edp_link_params->rate);
1452	break;
1453	}
1454	}
1455
1456	switch (edp_link_params->lanes) {
1457	case EDP_LANE_1:
1458	panel->vbt.edp.lanes = 1;
1459	break;
1460	case EDP_LANE_2:
1461	panel->vbt.edp.lanes = 2;
1462	break;
1463	case EDP_LANE_4:
1464	panel->vbt.edp.lanes = 4;
1465	break;
1466	default:
1467	drm_dbg_kms(&i915->drm,
1468	"VBT has unknown eDP lane count value %u\n",
1469	edp_link_params->lanes);
1470	break;
1471	}
1472
1473	switch (edp_link_params->preemphasis) {
1474	case EDP_PREEMPHASIS_NONE:
1475	panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1476	break;
1477	case EDP_PREEMPHASIS_3_5dB:
1478	panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1479	break;
1480	case EDP_PREEMPHASIS_6dB:
1481	panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1482	break;
1483	case EDP_PREEMPHASIS_9_5dB:
1484	panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1485	break;
1486	default:
1487	drm_dbg_kms(&i915->drm,
1488	"VBT has unknown eDP pre-emphasis value %u\n",
1489	edp_link_params->preemphasis);
1490	break;
1491	}
1492
1493	switch (edp_link_params->vswing) {
1494	case EDP_VSWING_0_4V:
1495	panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1496	break;
1497	case EDP_VSWING_0_6V:
1498	panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1499	break;
1500	case EDP_VSWING_0_8V:
1501	panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1502	break;
1503	case EDP_VSWING_1_2V:
1504	panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1505	break;
1506	default:
1507	drm_dbg_kms(&i915->drm,
1508	"VBT has unknown eDP voltage swing value %u\n",
1509	edp_link_params->vswing);
1510	break;
1511	}
1512
1513	if (i915->display.vbt.version >= 173) {
1514	u8 vswing;
1515
1516	/* Don't read from VBT if module parameter has valid value*/
1517	if (i915->display.params.edp_vswing) {
1518	panel->vbt.edp.low_vswing =
1519	i915->display.params.edp_vswing == 1;
1520	} else {
1521	vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1522	panel->vbt.edp.low_vswing = vswing == 0;
1523	}
1524	}
1525
1526	panel->vbt.edp.drrs_msa_timing_delay =
1527	panel_bits(value: edp->sdrrs_msa_timing_delay, panel_type, num_bits: 2);
1528
1529	if (i915->display.vbt.version >= 244)
1530	panel->vbt.edp.max_link_rate =
1531	edp->edp_max_port_link_rate[panel_type] * 20;
1532	}
1533
1534	static void
1535	parse_psr(struct drm_i915_private *i915,
1536	struct intel_panel *panel)
1537	{
1538	const struct bdb_psr *psr;
1539	const struct psr_table *psr_table;
1540	int panel_type = panel->vbt.panel_type;
1541
1542	psr = bdb_find_section(i915, section_id: BDB_PSR);
1543	if (!psr) {
1544	drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1545	return;
1546	}
1547
1548	psr_table = &psr->psr_table[panel_type];
1549
1550	panel->vbt.psr.full_link = psr_table->full_link;
1551	panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1552
1553	/* Allowed VBT values goes from 0 to 15 */
1554	panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1555	psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1556
1557	/*
1558	* New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1559	* Old decimal value is wake up time in multiples of 100 us.
1560	*/
1561	if (i915->display.vbt.version >= 205 &&
1562	(DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1563	switch (psr_table->tp1_wakeup_time) {
1564	case 0:
1565	panel->vbt.psr.tp1_wakeup_time_us = 500;
1566	break;
1567	case 1:
1568	panel->vbt.psr.tp1_wakeup_time_us = 100;
1569	break;
1570	case 3:
1571	panel->vbt.psr.tp1_wakeup_time_us = 0;
1572	break;
1573	default:
1574	drm_dbg_kms(&i915->drm,
1575	"VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1576	psr_table->tp1_wakeup_time);
1577	fallthrough;
1578	case 2:
1579	panel->vbt.psr.tp1_wakeup_time_us = 2500;
1580	break;
1581	}
1582
1583	switch (psr_table->tp2_tp3_wakeup_time) {
1584	case 0:
1585	panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1586	break;
1587	case 1:
1588	panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1589	break;
1590	case 3:
1591	panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1592	break;
1593	default:
1594	drm_dbg_kms(&i915->drm,
1595	"VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1596	psr_table->tp2_tp3_wakeup_time);
1597	fallthrough;
1598	case 2:
1599	panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1600	break;
1601	}
1602	} else {
1603	panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1604	panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1605	}
1606
1607	if (i915->display.vbt.version >= 226) {
1608	u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1609
1610	wakeup_time = panel_bits(value: wakeup_time, panel_type, num_bits: 2);
1611	switch (wakeup_time) {
1612	case 0:
1613	wakeup_time = 500;
1614	break;
1615	case 1:
1616	wakeup_time = 100;
1617	break;
1618	case 3:
1619	wakeup_time = 50;
1620	break;
1621	default:
1622	case 2:
1623	wakeup_time = 2500;
1624	break;
1625	}
1626	panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1627	} else {
1628	/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1629	panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1630	}
1631	}
1632
1633	static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1634	struct intel_panel *panel,
1635	enum port port)
1636	{
1637	enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1638
1639	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1640	panel->vbt.dsi.bl_ports = BIT(port);
1641	if (panel->vbt.dsi.config->cabc_supported)
1642	panel->vbt.dsi.cabc_ports = BIT(port);
1643
1644	return;
1645	}
1646
1647	switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1648	case DL_DCS_PORT_A:
1649	panel->vbt.dsi.bl_ports = BIT(PORT_A);
1650	break;
1651	case DL_DCS_PORT_C:
1652	panel->vbt.dsi.bl_ports = BIT(port_bc);
1653	break;
1654	default:
1655	case DL_DCS_PORT_A_AND_C:
1656	panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1657	break;
1658	}
1659
1660	if (!panel->vbt.dsi.config->cabc_supported)
1661	return;
1662
1663	switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1664	case DL_DCS_PORT_A:
1665	panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1666	break;
1667	case DL_DCS_PORT_C:
1668	panel->vbt.dsi.cabc_ports = BIT(port_bc);
1669	break;
1670	default:
1671	case DL_DCS_PORT_A_AND_C:
1672	panel->vbt.dsi.cabc_ports =
1673	BIT(PORT_A) | BIT(port_bc);
1674	break;
1675	}
1676	}
1677
1678	static void
1679	parse_mipi_config(struct drm_i915_private *i915,
1680	struct intel_panel *panel)
1681	{
1682	const struct bdb_mipi_config *start;
1683	const struct mipi_config *config;
1684	const struct mipi_pps_data *pps;
1685	int panel_type = panel->vbt.panel_type;
1686	enum port port;
1687
1688	/* parse MIPI blocks only if LFP type is MIPI */
1689	if (!intel_bios_is_dsi_present(dev_priv: i915, port: &port))
1690	return;
1691
1692	/* Initialize this to undefined indicating no generic MIPI support */
1693	panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1694
1695	/* Block #40 is already parsed and panel_fixed_mode is
1696	* stored in i915->lfp_lvds_vbt_mode
1697	* resuse this when needed
1698	*/
1699
1700	/* Parse #52 for panel index used from panel_type already
1701	* parsed
1702	*/
1703	start = bdb_find_section(i915, section_id: BDB_MIPI_CONFIG);
1704	if (!start) {
1705	drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1706	return;
1707	}
1708
1709	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1710	panel_type);
1711
1712	/*
1713	* get hold of the correct configuration block and pps data as per
1714	* the panel_type as index
1715	*/
1716	config = &start->config[panel_type];
1717	pps = &start->pps[panel_type];
1718
1719	/* store as of now full data. Trim when we realise all is not needed */
1720	panel->vbt.dsi.config = kmemdup(p: config, size: sizeof(struct mipi_config), GFP_KERNEL);
1721	if (!panel->vbt.dsi.config)
1722	return;
1723
1724	panel->vbt.dsi.pps = kmemdup(p: pps, size: sizeof(struct mipi_pps_data), GFP_KERNEL);
1725	if (!panel->vbt.dsi.pps) {
1726	kfree(objp: panel->vbt.dsi.config);
1727	return;
1728	}
1729
1730	parse_dsi_backlight_ports(i915, panel, port);
1731
1732	/* FIXME is the 90 vs. 270 correct? */
1733	switch (config->rotation) {
1734	case ENABLE_ROTATION_0:
1735	/*
1736	* Most (all?) VBTs claim 0 degrees despite having
1737	* an upside down panel, thus we do not trust this.
1738	*/
1739	panel->vbt.dsi.orientation =
1740	DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1741	break;
1742	case ENABLE_ROTATION_90:
1743	panel->vbt.dsi.orientation =
1744	DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1745	break;
1746	case ENABLE_ROTATION_180:
1747	panel->vbt.dsi.orientation =
1748	DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1749	break;
1750	case ENABLE_ROTATION_270:
1751	panel->vbt.dsi.orientation =
1752	DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1753	break;
1754	}
1755
1756	/* We have mandatory mipi config blocks. Initialize as generic panel */
1757	panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1758	}
1759
1760	/* Find the sequence block and size for the given panel. */
1761	static const u8 *
1762	find_panel_sequence_block(struct drm_i915_private *i915,
1763	const struct bdb_mipi_sequence *sequence,
1764	u16 panel_id, u32 *seq_size)
1765	{
1766	u32 total = get_blocksize(block_data: sequence);
1767	const u8 *data = &sequence->data[0];
1768	u8 current_id;
1769	u32 current_size;
1770	int header_size = sequence->version >= 3 ? 5 : 3;
1771	int index = 0;
1772	int i;
1773
1774	/* skip new block size */
1775	if (sequence->version >= 3)
1776	data += 4;
1777
1778	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1779	if (index + header_size > total) {
1780	drm_err(&i915->drm, "Invalid sequence block (header)\n");
1781	return NULL;
1782	}
1783
1784	current_id = *(data + index);
1785	if (sequence->version >= 3)
1786	current_size = *((const u32 *)(data + index + 1));
1787	else
1788	current_size = *((const u16 *)(data + index + 1));
1789
1790	index += header_size;
1791
1792	if (index + current_size > total) {
1793	drm_err(&i915->drm, "Invalid sequence block\n");
1794	return NULL;
1795	}
1796
1797	if (current_id == panel_id) {
1798	*seq_size = current_size;
1799	return data + index;
1800	}
1801
1802	index += current_size;
1803	}
1804
1805	drm_err(&i915->drm, "Sequence block detected but no valid configuration\n");
1806
1807	return NULL;
1808	}
1809
1810	static int goto_next_sequence(struct drm_i915_private *i915,
1811	const u8 *data, int index, int total)
1812	{
1813	u16 len;
1814
1815	/* Skip Sequence Byte. */
1816	for (index = index + 1; index < total; index += len) {
1817	u8 operation_byte = *(data + index);
1818	index++;
1819
1820	switch (operation_byte) {
1821	case MIPI_SEQ_ELEM_END:
1822	return index;
1823	case MIPI_SEQ_ELEM_SEND_PKT:
1824	if (index + 4 > total)
1825	return 0;
1826
1827	len = *((const u16 *)(data + index + 2)) + 4;
1828	break;
1829	case MIPI_SEQ_ELEM_DELAY:
1830	len = 4;
1831	break;
1832	case MIPI_SEQ_ELEM_GPIO:
1833	len = 2;
1834	break;
1835	case MIPI_SEQ_ELEM_I2C:
1836	if (index + 7 > total)
1837	return 0;
1838	len = *(data + index + 6) + 7;
1839	break;
1840	default:
1841	drm_err(&i915->drm, "Unknown operation byte\n");
1842	return 0;
1843	}
1844	}
1845
1846	return 0;
1847	}
1848
1849	static int goto_next_sequence_v3(struct drm_i915_private *i915,
1850	const u8 *data, int index, int total)
1851	{
1852	int seq_end;
1853	u16 len;
1854	u32 size_of_sequence;
1855
1856	/*
1857	* Could skip sequence based on Size of Sequence alone, but also do some
1858	* checking on the structure.
1859	*/
1860	if (total < 5) {
1861	drm_err(&i915->drm, "Too small sequence size\n");
1862	return 0;
1863	}
1864
1865	/* Skip Sequence Byte. */
1866	index++;
1867
1868	/*
1869	* Size of Sequence. Excludes the Sequence Byte and the size itself,
1870	* includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1871	* byte.
1872	*/
1873	size_of_sequence = *((const u32 *)(data + index));
1874	index += 4;
1875
1876	seq_end = index + size_of_sequence;
1877	if (seq_end > total) {
1878	drm_err(&i915->drm, "Invalid sequence size\n");
1879	return 0;
1880	}
1881
1882	for (; index < total; index += len) {
1883	u8 operation_byte = *(data + index);
1884	index++;
1885
1886	if (operation_byte == MIPI_SEQ_ELEM_END) {
1887	if (index != seq_end) {
1888	drm_err(&i915->drm, "Invalid element structure\n");
1889	return 0;
1890	}
1891	return index;
1892	}
1893
1894	len = *(data + index);
1895	index++;
1896
1897	/*
1898	* FIXME: Would be nice to check elements like for v1/v2 in
1899	* goto_next_sequence() above.
1900	*/
1901	switch (operation_byte) {
1902	case MIPI_SEQ_ELEM_SEND_PKT:
1903	case MIPI_SEQ_ELEM_DELAY:
1904	case MIPI_SEQ_ELEM_GPIO:
1905	case MIPI_SEQ_ELEM_I2C:
1906	case MIPI_SEQ_ELEM_SPI:
1907	case MIPI_SEQ_ELEM_PMIC:
1908	break;
1909	default:
1910	drm_err(&i915->drm, "Unknown operation byte %u\n",
1911	operation_byte);
1912	break;
1913	}
1914	}
1915
1916	return 0;
1917	}
1918
1919	/*
1920	* Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1921	* skip all delay + gpio operands and stop at the first DSI packet op.
1922	*/
1923	static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1924	struct intel_panel *panel)
1925	{
1926	const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1927	int index, len;
1928
1929	if (drm_WARN_ON(&i915->drm,
1930	!data || panel->vbt.dsi.seq_version != 1))
1931	return 0;
1932
1933	/* index = 1 to skip sequence byte */
1934	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1935	switch (data[index]) {
1936	case MIPI_SEQ_ELEM_SEND_PKT:
1937	return index == 1 ? 0 : index;
1938	case MIPI_SEQ_ELEM_DELAY:
1939	len = 5; /* 1 byte for operand + uint32 */
1940	break;
1941	case MIPI_SEQ_ELEM_GPIO:
1942	len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1943	break;
1944	default:
1945	return 0;
1946	}
1947	}
1948
1949	return 0;
1950	}
1951
1952	/*
1953	* Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1954	* The deassert must be done before calling intel_dsi_device_ready, so for
1955	* these devices we split the init OTP sequence into a deassert sequence and
1956	* the actual init OTP part.
1957	*/
1958	static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915,
1959	struct intel_panel *panel)
1960	{
1961	u8 *init_otp;
1962	int len;
1963
1964	/* Limit this to v1 vid-mode sequences */
1965	if (panel->vbt.dsi.config->is_cmd_mode ||
1966	panel->vbt.dsi.seq_version != 1)
1967	return;
1968
1969	/* Only do this if there are otp and assert seqs and no deassert seq */
1970	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1971	!panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1972	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1973	return;
1974
1975	/* The deassert-sequence ends at the first DSI packet */
1976	len = get_init_otp_deassert_fragment_len(i915, panel);
1977	if (!len)
1978	return;
1979
1980	drm_dbg_kms(&i915->drm,
1981	"Using init OTP fragment to deassert reset\n");
1982
1983	/* Copy the fragment, update seq byte and terminate it */
1984	init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1985	panel->vbt.dsi.deassert_seq = kmemdup(p: init_otp, size: len + 1, GFP_KERNEL);
1986	if (!panel->vbt.dsi.deassert_seq)
1987	return;
1988	panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1989	panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1990	/* Use the copy for deassert */
1991	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1992	panel->vbt.dsi.deassert_seq;
1993	/* Replace the last byte of the fragment with init OTP seq byte */
1994	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1995	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1996	panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1997	}
1998
1999	/*
2000	* Some machines (eg. Lenovo 82TQ) appear to have broken
2001	* VBT sequences:
2002	* - INIT_OTP is not present at all
2003	* - what should be in INIT_OTP is in DISPLAY_ON
2004	* - what should be in DISPLAY_ON is in BACKLIGHT_ON
2005	* (along with the actual backlight stuff)
2006	*
2007	* To make those work we simply swap DISPLAY_ON and INIT_OTP.
2008	*
2009	* TODO: Do we need to limit this to specific machines,
2010	* or examine the contents of the sequences to
2011	* avoid false positives?
2012	*/
2013	static void icl_fixup_mipi_sequences(struct drm_i915_private *i915,
2014	struct intel_panel *panel)
2015	{
2016	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
2017	panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
2018	drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n");
2019
2020	swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
2021	panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
2022	}
2023	}
2024
2025	static void fixup_mipi_sequences(struct drm_i915_private *i915,
2026	struct intel_panel *panel)
2027	{
2028	if (DISPLAY_VER(i915) >= 11)
2029	icl_fixup_mipi_sequences(i915, panel);
2030	else if (IS_VALLEYVIEW(i915))
2031	vlv_fixup_mipi_sequences(i915, panel);
2032	}
2033
2034	static void
2035	parse_mipi_sequence(struct drm_i915_private *i915,
2036	struct intel_panel *panel)
2037	{
2038	int panel_type = panel->vbt.panel_type;
2039	const struct bdb_mipi_sequence *sequence;
2040	const u8 *seq_data;
2041	u32 seq_size;
2042	u8 *data;
2043	int index = 0;
2044
2045	/* Only our generic panel driver uses the sequence block. */
2046	if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2047	return;
2048
2049	sequence = bdb_find_section(i915, section_id: BDB_MIPI_SEQUENCE);
2050	if (!sequence) {
2051	drm_dbg_kms(&i915->drm,
2052	"No MIPI Sequence found, parsing complete\n");
2053	return;
2054	}
2055
2056	/* Fail gracefully for forward incompatible sequence block. */
2057	if (sequence->version >= 4) {
2058	drm_err(&i915->drm,
2059	"Unable to parse MIPI Sequence Block v%u\n",
2060	sequence->version);
2061	return;
2062	}
2063
2064	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2065	sequence->version);
2066
2067	seq_data = find_panel_sequence_block(i915, sequence, panel_id: panel_type, seq_size: &seq_size);
2068	if (!seq_data)
2069	return;
2070
2071	data = kmemdup(p: seq_data, size: seq_size, GFP_KERNEL);
2072	if (!data)
2073	return;
2074
2075	/* Parse the sequences, store pointers to each sequence. */
2076	for (;;) {
2077	u8 seq_id = *(data + index);
2078	if (seq_id == MIPI_SEQ_END)
2079	break;
2080
2081	if (seq_id >= MIPI_SEQ_MAX) {
2082	drm_err(&i915->drm, "Unknown sequence %u\n",
2083	seq_id);
2084	goto err;
2085	}
2086
2087	/* Log about presence of sequences we won't run. */
2088	if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2089	drm_dbg_kms(&i915->drm,
2090	"Unsupported sequence %u\n", seq_id);
2091
2092	panel->vbt.dsi.sequence[seq_id] = data + index;
2093
2094	if (sequence->version >= 3)
2095	index = goto_next_sequence_v3(i915, data, index, total: seq_size);
2096	else
2097	index = goto_next_sequence(i915, data, index, total: seq_size);
2098	if (!index) {
2099	drm_err(&i915->drm, "Invalid sequence %u\n",
2100	seq_id);
2101	goto err;
2102	}
2103	}
2104
2105	panel->vbt.dsi.data = data;
2106	panel->vbt.dsi.size = seq_size;
2107	panel->vbt.dsi.seq_version = sequence->version;
2108
2109	fixup_mipi_sequences(i915, panel);
2110
2111	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2112	return;
2113
2114	err:
2115	kfree(objp: data);
2116	memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2117	}
2118
2119	static void
2120	parse_compression_parameters(struct drm_i915_private *i915)
2121	{
2122	const struct bdb_compression_parameters *params;
2123	struct intel_bios_encoder_data *devdata;
2124	u16 block_size;
2125	int index;
2126
2127	if (i915->display.vbt.version < 198)
2128	return;
2129
2130	params = bdb_find_section(i915, section_id: BDB_COMPRESSION_PARAMETERS);
2131	if (params) {
2132	/* Sanity checks */
2133	if (params->entry_size != sizeof(params->data[0])) {
2134	drm_dbg_kms(&i915->drm,
2135	"VBT: unsupported compression param entry size\n");
2136	return;
2137	}
2138
2139	block_size = get_blocksize(block_data: params);
2140	if (block_size < sizeof(*params)) {
2141	drm_dbg_kms(&i915->drm,
2142	"VBT: expected 16 compression param entries\n");
2143	return;
2144	}
2145	}
2146
2147	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2148	const struct child_device_config *child = &devdata->child;
2149
2150	if (!child->compression_enable)
2151	continue;
2152
2153	if (!params) {
2154	drm_dbg_kms(&i915->drm,
2155	"VBT: compression params not available\n");
2156	continue;
2157	}
2158
2159	if (child->compression_method_cps) {
2160	drm_dbg_kms(&i915->drm,
2161	"VBT: CPS compression not supported\n");
2162	continue;
2163	}
2164
2165	index = child->compression_structure_index;
2166
2167	devdata->dsc = kmemdup(p: &params->data[index],
2168	size: sizeof(*devdata->dsc), GFP_KERNEL);
2169	}
2170	}
2171
2172	static u8 translate_iboost(struct drm_i915_private *i915, u8 val)
2173	{
2174	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2175
2176	if (val >= ARRAY_SIZE(mapping)) {
2177	drm_dbg_kms(&i915->drm,
2178	"Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2179	return 0;
2180	}
2181	return mapping[val];
2182	}
2183
2184	static const u8 cnp_ddc_pin_map[] = {
2185	[0] = 0, /* N/A */
2186	[GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2187	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2188	[GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2189	[GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2190	};
2191
2192	static const u8 icp_ddc_pin_map[] = {
2193	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2194	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2195	[GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2196	[GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2197	[GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2198	[GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2199	[GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2200	[GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2201	[GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2202	};
2203
2204	static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2205	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2206	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2207	[GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2208	[GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2209	};
2210
2211	static const u8 adls_ddc_pin_map[] = {
2212	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2213	[GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2214	[GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2215	[GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2216	[GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2217	};
2218
2219	static const u8 gen9bc_tgp_ddc_pin_map[] = {
2220	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2221	[GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2222	[GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2223	};
2224
2225	static const u8 adlp_ddc_pin_map[] = {
2226	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2227	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2228	[GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2229	[GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2230	[GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2231	[GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2232	};
2233
2234	static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2235	{
2236	const u8 *ddc_pin_map;
2237	int i, n_entries;
2238
2239	if (IS_DGFX(i915))
2240	return vbt_pin;
2241
2242	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
2243	ddc_pin_map = adlp_ddc_pin_map;
2244	n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2245	} else if (IS_ALDERLAKE_S(i915)) {
2246	ddc_pin_map = adls_ddc_pin_map;
2247	n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2248	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2249	ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2250	n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2251	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2252	ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2253	n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2254	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2255	ddc_pin_map = icp_ddc_pin_map;
2256	n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2257	} else if (HAS_PCH_CNP(i915)) {
2258	ddc_pin_map = cnp_ddc_pin_map;
2259	n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2260	} else {
2261	/* Assuming direct map */
2262	return vbt_pin;
2263	}
2264
2265	for (i = 0; i < n_entries; i++) {
2266	if (ddc_pin_map[i] == vbt_pin)
2267	return i;
2268	}
2269
2270	drm_dbg_kms(&i915->drm,
2271	"Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2272	vbt_pin);
2273	return 0;
2274	}
2275
2276	static u8 dvo_port_type(u8 dvo_port)
2277	{
2278	switch (dvo_port) {
2279	case DVO_PORT_HDMIA:
2280	case DVO_PORT_HDMIB:
2281	case DVO_PORT_HDMIC:
2282	case DVO_PORT_HDMID:
2283	case DVO_PORT_HDMIE:
2284	case DVO_PORT_HDMIF:
2285	case DVO_PORT_HDMIG:
2286	case DVO_PORT_HDMIH:
2287	case DVO_PORT_HDMII:
2288	return DVO_PORT_HDMIA;
2289	case DVO_PORT_DPA:
2290	case DVO_PORT_DPB:
2291	case DVO_PORT_DPC:
2292	case DVO_PORT_DPD:
2293	case DVO_PORT_DPE:
2294	case DVO_PORT_DPF:
2295	case DVO_PORT_DPG:
2296	case DVO_PORT_DPH:
2297	case DVO_PORT_DPI:
2298	return DVO_PORT_DPA;
2299	case DVO_PORT_MIPIA:
2300	case DVO_PORT_MIPIB:
2301	case DVO_PORT_MIPIC:
2302	case DVO_PORT_MIPID:
2303	return DVO_PORT_MIPIA;
2304	default:
2305	return dvo_port;
2306	}
2307	}
2308
2309	static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2310	const int port_mapping[][3], u8 dvo_port)
2311	{
2312	enum port port;
2313	int i;
2314
2315	for (port = PORT_A; port < n_ports; port++) {
2316	for (i = 0; i < n_dvo; i++) {
2317	if (port_mapping[port][i] == -1)
2318	break;
2319
2320	if (dvo_port == port_mapping[port][i])
2321	return port;
2322	}
2323	}
2324
2325	return PORT_NONE;
2326	}
2327
2328	static enum port dvo_port_to_port(struct drm_i915_private *i915,
2329	u8 dvo_port)
2330	{
2331	/*
2332	* Each DDI port can have more than one value on the "DVO Port" field,
2333	* so look for all the possible values for each port.
2334	*/
2335	static const int port_mapping[][3] = {
2336	[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2337	[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2338	[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2339	[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2340	[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2341	[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2342	[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2343	[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2344	[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2345	};
2346	/*
2347	* RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2348	* map to DDI A,B,TC1,TC2 respectively.
2349	*/
2350	static const int rkl_port_mapping[][3] = {
2351	[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2352	[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2353	[PORT_C] = { -1 },
2354	[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2355	[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2356	};
2357	/*
2358	* Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2359	* PORT_F and PORT_G, we need to map that to correct VBT sections.
2360	*/
2361	static const int adls_port_mapping[][3] = {
2362	[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2363	[PORT_B] = { -1 },
2364	[PORT_C] = { -1 },
2365	[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2366	[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2367	[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2368	[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2369	};
2370	static const int xelpd_port_mapping[][3] = {
2371	[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2372	[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2373	[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2374	[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2375	[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2376	[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2377	[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2378	[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2379	[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2380	};
2381
2382	if (DISPLAY_VER(i915) >= 13)
2383	return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2384	ARRAY_SIZE(xelpd_port_mapping[0]),
2385	port_mapping: xelpd_port_mapping,
2386	dvo_port);
2387	else if (IS_ALDERLAKE_S(i915))
2388	return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2389	ARRAY_SIZE(adls_port_mapping[0]),
2390	port_mapping: adls_port_mapping,
2391	dvo_port);
2392	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2393	return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2394	ARRAY_SIZE(rkl_port_mapping[0]),
2395	port_mapping: rkl_port_mapping,
2396	dvo_port);
2397	else
2398	return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2399	ARRAY_SIZE(port_mapping[0]),
2400	port_mapping,
2401	dvo_port);
2402	}
2403
2404	static enum port
2405	dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2406	{
2407	switch (dvo_port) {
2408	case DVO_PORT_MIPIA:
2409	return PORT_A;
2410	case DVO_PORT_MIPIC:
2411	if (DISPLAY_VER(i915) >= 11)
2412	return PORT_B;
2413	else
2414	return PORT_C;
2415	default:
2416	return PORT_NONE;
2417	}
2418	}
2419
2420	enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2421	{
2422	struct drm_i915_private *i915 = devdata->i915;
2423	const struct child_device_config *child = &devdata->child;
2424	enum port port;
2425
2426	port = dvo_port_to_port(i915, dvo_port: child->dvo_port);
2427	if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2428	port = dsi_dvo_port_to_port(i915, dvo_port: child->dvo_port);
2429
2430	return port;
2431	}
2432
2433	static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2434	{
2435	switch (vbt_max_link_rate) {
2436	default:
2437	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2438	return 0;
2439	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2440	return 2000000;
2441	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2442	return 1350000;
2443	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2444	return 1000000;
2445	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2446	return 810000;
2447	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2448	return 540000;
2449	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2450	return 270000;
2451	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2452	return 162000;
2453	}
2454	}
2455
2456	static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2457	{
2458	switch (vbt_max_link_rate) {
2459	default:
2460	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2461	return 810000;
2462	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2463	return 540000;
2464	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2465	return 270000;
2466	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2467	return 162000;
2468	}
2469	}
2470
2471	int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2472	{
2473	if (!devdata || devdata->i915->display.vbt.version < 216)
2474	return 0;
2475
2476	if (devdata->i915->display.vbt.version >= 230)
2477	return parse_bdb_230_dp_max_link_rate(vbt_max_link_rate: devdata->child.dp_max_link_rate);
2478	else
2479	return parse_bdb_216_dp_max_link_rate(vbt_max_link_rate: devdata->child.dp_max_link_rate);
2480	}
2481
2482	int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2483	{
2484	if (!devdata || devdata->i915->display.vbt.version < 244)
2485	return 0;
2486
2487	return devdata->child.dp_max_lane_count + 1;
2488	}
2489
2490	static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2491	enum port port)
2492	{
2493	struct drm_i915_private *i915 = devdata->i915;
2494	bool is_hdmi;
2495
2496	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2497	return;
2498
2499	if (!intel_bios_encoder_supports_dvi(devdata))
2500	return;
2501
2502	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2503
2504	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2505	is_hdmi ? "/HDMI" : "");
2506
2507	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2508	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2509	}
2510
2511	static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2512	enum port port)
2513	{
2514	struct drm_i915_private *i915 = devdata->i915;
2515
2516	if (!intel_bios_encoder_supports_dvi(devdata))
2517	return;
2518
2519	/*
2520	* Some BDW machines (eg. HP Pavilion 15-ab) shipped
2521	* with a HSW VBT where the level shifter value goes
2522	* up to 11, whereas the BDW max is 9.
2523	*/
2524	if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
2525	drm_dbg_kms(&i915->drm, "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2526	port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2527
2528	devdata->child.hdmi_level_shifter_value = 9;
2529	}
2530	}
2531
2532	static bool
2533	intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2534	{
2535	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2536	}
2537
2538	bool
2539	intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2540	{
2541	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2542	}
2543
2544	bool
2545	intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2546	{
2547	return intel_bios_encoder_supports_dvi(devdata) &&
2548	(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2549	}
2550
2551	bool
2552	intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2553	{
2554	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2555	}
2556
2557	bool
2558	intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2559	{
2560	return intel_bios_encoder_supports_dp(devdata) &&
2561	devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2562	}
2563
2564	bool
2565	intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2566	{
2567	return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2568	}
2569
2570	bool
2571	intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2572	{
2573	return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2574	}
2575
2576	/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2577	int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2578	{
2579	if (!devdata || devdata->i915->display.vbt.version < 158 ||
2580	DISPLAY_VER(devdata->i915) >= 14)
2581	return -1;
2582
2583	return devdata->child.hdmi_level_shifter_value;
2584	}
2585
2586	int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2587	{
2588	if (!devdata || devdata->i915->display.vbt.version < 204)
2589	return 0;
2590
2591	switch (devdata->child.hdmi_max_data_rate) {
2592	default:
2593	MISSING_CASE(devdata->child.hdmi_max_data_rate);
2594	fallthrough;
2595	case HDMI_MAX_DATA_RATE_PLATFORM:
2596	return 0;
2597	case HDMI_MAX_DATA_RATE_594:
2598	return 594000;
2599	case HDMI_MAX_DATA_RATE_340:
2600	return 340000;
2601	case HDMI_MAX_DATA_RATE_300:
2602	return 300000;
2603	case HDMI_MAX_DATA_RATE_297:
2604	return 297000;
2605	case HDMI_MAX_DATA_RATE_165:
2606	return 165000;
2607	}
2608	}
2609
2610	static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2611	{
2612	/*
2613	* On some ICL SKUs port F is not present, but broken VBTs mark
2614	* the port as present. Only try to initialize port F for the
2615	* SKUs that may actually have it.
2616	*/
2617	if (port == PORT_F && IS_ICELAKE(i915))
2618	return IS_ICL_WITH_PORT_F(i915);
2619
2620	return true;
2621	}
2622
2623	static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2624	{
2625	struct drm_i915_private *i915 = devdata->i915;
2626	const struct child_device_config *child = &devdata->child;
2627	bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2628	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2629	enum port port;
2630
2631	port = intel_bios_encoder_port(devdata);
2632	if (port == PORT_NONE)
2633	return;
2634
2635	is_dvi = intel_bios_encoder_supports_dvi(devdata);
2636	is_dp = intel_bios_encoder_supports_dp(devdata);
2637	is_crt = intel_bios_encoder_supports_crt(devdata);
2638	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2639	is_edp = intel_bios_encoder_supports_edp(devdata);
2640	is_dsi = intel_bios_encoder_supports_dsi(devdata);
2641
2642	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2643	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2644
2645	drm_dbg_kms(&i915->drm,
2646	"Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2647	port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2648	intel_bios_encoder_supports_dp_dual_mode(devdata),
2649	intel_bios_encoder_is_lspcon(devdata),
2650	supports_typec_usb, supports_tbt,
2651	devdata->dsc != NULL);
2652
2653	hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2654	if (hdmi_level_shift >= 0) {
2655	drm_dbg_kms(&i915->drm,
2656	"Port %c VBT HDMI level shift: %d\n",
2657	port_name(port), hdmi_level_shift);
2658	}
2659
2660	max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2661	if (max_tmds_clock)
2662	drm_dbg_kms(&i915->drm,
2663	"Port %c VBT HDMI max TMDS clock: %d kHz\n",
2664	port_name(port), max_tmds_clock);
2665
2666	/* I_boost config for SKL and above */
2667	dp_boost_level = intel_bios_dp_boost_level(devdata);
2668	if (dp_boost_level)
2669	drm_dbg_kms(&i915->drm,
2670	"Port %c VBT (e)DP boost level: %d\n",
2671	port_name(port), dp_boost_level);
2672
2673	hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2674	if (hdmi_boost_level)
2675	drm_dbg_kms(&i915->drm,
2676	"Port %c VBT HDMI boost level: %d\n",
2677	port_name(port), hdmi_boost_level);
2678
2679	dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2680	if (dp_max_link_rate)
2681	drm_dbg_kms(&i915->drm,
2682	"Port %c VBT DP max link rate: %d\n",
2683	port_name(port), dp_max_link_rate);
2684
2685	/*
2686	* FIXME need to implement support for VBT
2687	* vswing/preemph tables should this ever trigger.
2688	*/
2689	drm_WARN(&i915->drm, child->use_vbt_vswing,
2690	"Port %c asks to use VBT vswing/preemph tables\n",
2691	port_name(port));
2692	}
2693
2694	static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2695	{
2696	struct drm_i915_private *i915 = devdata->i915;
2697	enum port port;
2698
2699	port = intel_bios_encoder_port(devdata);
2700	if (port == PORT_NONE)
2701	return;
2702
2703	if (!is_port_valid(i915, port)) {
2704	drm_dbg_kms(&i915->drm,
2705	"VBT reports port %c as supported, but that can't be true: skipping\n",
2706	port_name(port));
2707	return;
2708	}
2709
2710	sanitize_device_type(devdata, port);
2711	sanitize_hdmi_level_shift(devdata, port);
2712	}
2713
2714	static bool has_ddi_port_info(struct drm_i915_private *i915)
2715	{
2716	return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2717	}
2718
2719	static void parse_ddi_ports(struct drm_i915_private *i915)
2720	{
2721	struct intel_bios_encoder_data *devdata;
2722
2723	if (!has_ddi_port_info(i915))
2724	return;
2725
2726	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2727	parse_ddi_port(devdata);
2728
2729	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2730	print_ddi_port(devdata);
2731	}
2732
2733	static void
2734	parse_general_definitions(struct drm_i915_private *i915)
2735	{
2736	const struct bdb_general_definitions *defs;
2737	struct intel_bios_encoder_data *devdata;
2738	const struct child_device_config *child;
2739	int i, child_device_num;
2740	u8 expected_size;
2741	u16 block_size;
2742	int bus_pin;
2743
2744	defs = bdb_find_section(i915, section_id: BDB_GENERAL_DEFINITIONS);
2745	if (!defs) {
2746	drm_dbg_kms(&i915->drm,
2747	"No general definition block is found, no devices defined.\n");
2748	return;
2749	}
2750
2751	block_size = get_blocksize(block_data: defs);
2752	if (block_size < sizeof(*defs)) {
2753	drm_dbg_kms(&i915->drm,
2754	"General definitions block too small (%u)\n",
2755	block_size);
2756	return;
2757	}
2758
2759	bus_pin = defs->crt_ddc_gmbus_pin;
2760	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2761	if (intel_gmbus_is_valid_pin(dev_priv: i915, pin: bus_pin))
2762	i915->display.vbt.crt_ddc_pin = bus_pin;
2763
2764	if (i915->display.vbt.version < 106) {
2765	expected_size = 22;
2766	} else if (i915->display.vbt.version < 111) {
2767	expected_size = 27;
2768	} else if (i915->display.vbt.version < 195) {
2769	expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2770	} else if (i915->display.vbt.version == 195) {
2771	expected_size = 37;
2772	} else if (i915->display.vbt.version <= 215) {
2773	expected_size = 38;
2774	} else if (i915->display.vbt.version <= 250) {
2775	expected_size = 39;
2776	} else {
2777	expected_size = sizeof(*child);
2778	BUILD_BUG_ON(sizeof(*child) < 39);
2779	drm_dbg(&i915->drm,
2780	"Expected child device config size for VBT version %u not known; assuming %u\n",
2781	i915->display.vbt.version, expected_size);
2782	}
2783
2784	/* Flag an error for unexpected size, but continue anyway. */
2785	if (defs->child_dev_size != expected_size)
2786	drm_err(&i915->drm,
2787	"Unexpected child device config size %u (expected %u for VBT version %u)\n",
2788	defs->child_dev_size, expected_size, i915->display.vbt.version);
2789
2790	/* The legacy sized child device config is the minimum we need. */
2791	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2792	drm_dbg_kms(&i915->drm,
2793	"Child device config size %u is too small.\n",
2794	defs->child_dev_size);
2795	return;
2796	}
2797
2798	/* get the number of child device */
2799	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2800
2801	for (i = 0; i < child_device_num; i++) {
2802	child = child_device_ptr(defs, i);
2803	if (!child->device_type)
2804	continue;
2805
2806	drm_dbg_kms(&i915->drm,
2807	"Found VBT child device with type 0x%x\n",
2808	child->device_type);
2809
2810	devdata = kzalloc(size: sizeof(*devdata), GFP_KERNEL);
2811	if (!devdata)
2812	break;
2813
2814	devdata->i915 = i915;
2815
2816	/*
2817	* Copy as much as we know (sizeof) and is available
2818	* (child_dev_size) of the child device config. Accessing the
2819	* data must depend on VBT version.
2820	*/
2821	memcpy(&devdata->child, child,
2822	min_t(size_t, defs->child_dev_size, sizeof(*child)));
2823
2824	list_add_tail(new: &devdata->node, head: &i915->display.vbt.display_devices);
2825	}
2826
2827	if (list_empty(head: &i915->display.vbt.display_devices))
2828	drm_dbg_kms(&i915->drm,
2829	"no child dev is parsed from VBT\n");
2830	}
2831
2832	/* Common defaults which may be overridden by VBT. */
2833	static void
2834	init_vbt_defaults(struct drm_i915_private *i915)
2835	{
2836	i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2837
2838	/* general features */
2839	i915->display.vbt.int_tv_support = 1;
2840	i915->display.vbt.int_crt_support = 1;
2841
2842	/* driver features */
2843	i915->display.vbt.int_lvds_support = 1;
2844
2845	/* Default to using SSC */
2846	i915->display.vbt.lvds_use_ssc = 1;
2847	/*
2848	* Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2849	* clock for LVDS.
2850	*/
2851	i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2852	alternate: !HAS_PCH_SPLIT(i915));
2853	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2854	i915->display.vbt.lvds_ssc_freq);
2855	}
2856
2857	/* Common defaults which may be overridden by VBT. */
2858	static void
2859	init_vbt_panel_defaults(struct intel_panel *panel)
2860	{
2861	/* Default to having backlight */
2862	panel->vbt.backlight.present = true;
2863
2864	/* LFP panel data */
2865	panel->vbt.lvds_dither = true;
2866	}
2867
2868	/* Defaults to initialize only if there is no VBT. */
2869	static void
2870	init_vbt_missing_defaults(struct drm_i915_private *i915)
2871	{
2872	enum port port;
2873	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2874	BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2875
2876	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2877	return;
2878
2879	for_each_port_masked(port, ports) {
2880	struct intel_bios_encoder_data *devdata;
2881	struct child_device_config *child;
2882	enum phy phy = intel_port_to_phy(i915, port);
2883
2884	/*
2885	* VBT has the TypeC mode (native,TBT/USB) and we don't want
2886	* to detect it.
2887	*/
2888	if (intel_phy_is_tc(dev_priv: i915, phy))
2889	continue;
2890
2891	/* Create fake child device config */
2892	devdata = kzalloc(size: sizeof(*devdata), GFP_KERNEL);
2893	if (!devdata)
2894	break;
2895
2896	devdata->i915 = i915;
2897	child = &devdata->child;
2898
2899	if (port == PORT_F)
2900	child->dvo_port = DVO_PORT_HDMIF;
2901	else if (port == PORT_E)
2902	child->dvo_port = DVO_PORT_HDMIE;
2903	else
2904	child->dvo_port = DVO_PORT_HDMIA + port;
2905
2906	if (port != PORT_A && port != PORT_E)
2907	child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2908
2909	if (port != PORT_E)
2910	child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2911
2912	if (port == PORT_A)
2913	child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2914
2915	list_add_tail(new: &devdata->node, head: &i915->display.vbt.display_devices);
2916
2917	drm_dbg_kms(&i915->drm,
2918	"Generating default VBT child device with type 0x04%x on port %c\n",
2919	child->device_type, port_name(port));
2920	}
2921
2922	/* Bypass some minimum baseline VBT version checks */
2923	i915->display.vbt.version = 155;
2924	}
2925
2926	static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2927	{
2928	const void *_vbt = vbt;
2929
2930	return _vbt + vbt->bdb_offset;
2931	}
2932
2933	/**
2934	* intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2935	* @i915: the device
2936	* @buf: pointer to a buffer to validate
2937	* @size: size of the buffer
2938	*
2939	* Returns true on valid VBT.
2940	*/
2941	bool intel_bios_is_valid_vbt(struct drm_i915_private *i915,
2942	const void *buf, size_t size)
2943	{
2944	const struct vbt_header *vbt = buf;
2945	const struct bdb_header *bdb;
2946
2947	if (!vbt)
2948	return false;
2949
2950	if (sizeof(struct vbt_header) > size) {
2951	drm_dbg_kms(&i915->drm, "VBT header incomplete\n");
2952	return false;
2953	}
2954
2955	if (memcmp(p: vbt->signature, q: "$VBT", size: 4)) {
2956	drm_dbg_kms(&i915->drm, "VBT invalid signature\n");
2957	return false;
2958	}
2959
2960	if (vbt->vbt_size > size) {
2961	drm_dbg_kms(&i915->drm, "VBT incomplete (vbt_size overflows)\n");
2962	return false;
2963	}
2964
2965	size = vbt->vbt_size;
2966
2967	if (range_overflows_t(size_t,
2968	vbt->bdb_offset,
2969	sizeof(struct bdb_header),
2970	size)) {
2971	drm_dbg_kms(&i915->drm, "BDB header incomplete\n");
2972	return false;
2973	}
2974
2975	bdb = get_bdb_header(vbt);
2976	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2977	drm_dbg_kms(&i915->drm, "BDB incomplete\n");
2978	return false;
2979	}
2980
2981	return vbt;
2982	}
2983
2984	static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
2985	{
2986	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, val: offset);
2987
2988	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
2989	}
2990
2991	static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2992	{
2993	u32 count, data, found, store = 0;
2994	u32 static_region, oprom_offset;
2995	u32 oprom_size = 0x200000;
2996	u16 vbt_size;
2997	u32 *vbt;
2998
2999	static_region = intel_uncore_read(uncore: &i915->uncore, SPI_STATIC_REGIONS);
3000	static_region &= OPTIONROM_SPI_REGIONID_MASK;
3001	intel_uncore_write(uncore: &i915->uncore, PRIMARY_SPI_REGIONID, val: static_region);
3002
3003	oprom_offset = intel_uncore_read(uncore: &i915->uncore, OROM_OFFSET);
3004	oprom_offset &= OROM_OFFSET_MASK;
3005
3006	for (count = 0; count < oprom_size; count += 4) {
3007	data = intel_spi_read(uncore: &i915->uncore, offset: oprom_offset + count);
3008	if (data == *((const u32 *)"$VBT")) {
3009	found = oprom_offset + count;
3010	break;
3011	}
3012	}
3013
3014	if (count >= oprom_size)
3015	goto err_not_found;
3016
3017	/* Get VBT size and allocate space for the VBT */
3018	vbt_size = intel_spi_read(uncore: &i915->uncore,
3019	offset: found + offsetof(struct vbt_header, vbt_size));
3020	vbt_size &= 0xffff;
3021
3022	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3023	if (!vbt)
3024	goto err_not_found;
3025
3026	for (count = 0; count < vbt_size; count += 4)
3027	*(vbt + store++) = intel_spi_read(uncore: &i915->uncore, offset: found + count);
3028
3029	if (!intel_bios_is_valid_vbt(i915, buf: vbt, size: vbt_size))
3030	goto err_free_vbt;
3031
3032	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3033
3034	return (struct vbt_header *)vbt;
3035
3036	err_free_vbt:
3037	kfree(objp: vbt);
3038	err_not_found:
3039	return NULL;
3040	}
3041
3042	static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3043	{
3044	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3045	void __iomem *p = NULL, *oprom;
3046	struct vbt_header *vbt;
3047	u16 vbt_size;
3048	size_t i, size;
3049
3050	oprom = pci_map_rom(pdev, size: &size);
3051	if (!oprom)
3052	return NULL;
3053
3054	/* Scour memory looking for the VBT signature. */
3055	for (i = 0; i + 4 < size; i += 4) {
3056	if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3057	continue;
3058
3059	p = oprom + i;
3060	size -= i;
3061	break;
3062	}
3063
3064	if (!p)
3065	goto err_unmap_oprom;
3066
3067	if (sizeof(struct vbt_header) > size) {
3068	drm_dbg(&i915->drm, "VBT header incomplete\n");
3069	goto err_unmap_oprom;
3070	}
3071
3072	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3073	if (vbt_size > size) {
3074	drm_dbg(&i915->drm,
3075	"VBT incomplete (vbt_size overflows)\n");
3076	goto err_unmap_oprom;
3077	}
3078
3079	/* The rest will be validated by intel_bios_is_valid_vbt() */
3080	vbt = kmalloc(size: vbt_size, GFP_KERNEL);
3081	if (!vbt)
3082	goto err_unmap_oprom;
3083
3084	memcpy_fromio(vbt, p, vbt_size);
3085
3086	if (!intel_bios_is_valid_vbt(i915, buf: vbt, size: vbt_size))
3087	goto err_free_vbt;
3088
3089	pci_unmap_rom(pdev, rom: oprom);
3090
3091	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3092
3093	return vbt;
3094
3095	err_free_vbt:
3096	kfree(objp: vbt);
3097	err_unmap_oprom:
3098	pci_unmap_rom(pdev, rom: oprom);
3099
3100	return NULL;
3101	}
3102
3103	/**
3104	* intel_bios_init - find VBT and initialize settings from the BIOS
3105	* @i915: i915 device instance
3106	*
3107	* Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3108	* was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3109	* initialize some defaults if the VBT is not present at all.
3110	*/
3111	void intel_bios_init(struct drm_i915_private *i915)
3112	{
3113	const struct vbt_header *vbt;
3114	struct vbt_header *oprom_vbt = NULL;
3115	const struct bdb_header *bdb;
3116
3117	INIT_LIST_HEAD(list: &i915->display.vbt.display_devices);
3118	INIT_LIST_HEAD(list: &i915->display.vbt.bdb_blocks);
3119
3120	if (!HAS_DISPLAY(i915)) {
3121	drm_dbg_kms(&i915->drm,
3122	"Skipping VBT init due to disabled display.\n");
3123	return;
3124	}
3125
3126	init_vbt_defaults(i915);
3127
3128	vbt = intel_opregion_get_vbt(i915, NULL);
3129
3130	/*
3131	* If the OpRegion does not have VBT, look in SPI flash through MMIO or
3132	* PCI mapping
3133	*/
3134	if (!vbt && IS_DGFX(i915)) {
3135	oprom_vbt = spi_oprom_get_vbt(i915);
3136	vbt = oprom_vbt;
3137	}
3138
3139	if (!vbt) {
3140	oprom_vbt = oprom_get_vbt(i915);
3141	vbt = oprom_vbt;
3142	}
3143
3144	if (!vbt)
3145	goto out;
3146
3147	bdb = get_bdb_header(vbt);
3148	i915->display.vbt.version = bdb->version;
3149
3150	drm_dbg_kms(&i915->drm,
3151	"VBT signature \"%.*s\", BDB version %d\n",
3152	(int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3153
3154	init_bdb_blocks(i915, bdb);
3155
3156	/* Grab useful general definitions */
3157	parse_general_features(i915);
3158	parse_general_definitions(i915);
3159	parse_driver_features(i915);
3160
3161	/* Depends on child device list */
3162	parse_compression_parameters(i915);
3163
3164	out:
3165	if (!vbt) {
3166	drm_info(&i915->drm,
3167	"Failed to find VBIOS tables (VBT)\n");
3168	init_vbt_missing_defaults(i915);
3169	}
3170
3171	/* Further processing on pre-parsed or generated child device data */
3172	parse_sdvo_device_mapping(i915);
3173	parse_ddi_ports(i915);
3174
3175	kfree(objp: oprom_vbt);
3176	}
3177
3178	static void intel_bios_init_panel(struct drm_i915_private *i915,
3179	struct intel_panel *panel,
3180	const struct intel_bios_encoder_data *devdata,
3181	const struct drm_edid *drm_edid,
3182	bool use_fallback)
3183	{
3184	/* already have it? */
3185	if (panel->vbt.panel_type >= 0) {
3186	drm_WARN_ON(&i915->drm, !use_fallback);
3187	return;
3188	}
3189
3190	panel->vbt.panel_type = get_panel_type(i915, devdata,
3191	drm_edid, use_fallback);
3192	if (panel->vbt.panel_type < 0) {
3193	drm_WARN_ON(&i915->drm, use_fallback);
3194	return;
3195	}
3196
3197	init_vbt_panel_defaults(panel);
3198
3199	parse_panel_options(i915, panel);
3200	parse_generic_dtd(i915, panel);
3201	parse_lfp_data(i915, panel);
3202	parse_lfp_backlight(i915, panel);
3203	parse_sdvo_panel_data(i915, panel);
3204	parse_panel_driver_features(i915, panel);
3205	parse_power_conservation_features(i915, panel);
3206	parse_edp(i915, panel);
3207	parse_psr(i915, panel);
3208	parse_mipi_config(i915, panel);
3209	parse_mipi_sequence(i915, panel);
3210	}
3211
3212	void intel_bios_init_panel_early(struct drm_i915_private *i915,
3213	struct intel_panel *panel,
3214	const struct intel_bios_encoder_data *devdata)
3215	{
3216	intel_bios_init_panel(i915, panel, devdata, NULL, use_fallback: false);
3217	}
3218
3219	void intel_bios_init_panel_late(struct drm_i915_private *i915,
3220	struct intel_panel *panel,
3221	const struct intel_bios_encoder_data *devdata,
3222	const struct drm_edid *drm_edid)
3223	{
3224	intel_bios_init_panel(i915, panel, devdata, drm_edid, use_fallback: true);
3225	}
3226
3227	/**
3228	* intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3229	* @i915: i915 device instance
3230	*/
3231	void intel_bios_driver_remove(struct drm_i915_private *i915)
3232	{
3233	struct intel_bios_encoder_data *devdata, *nd;
3234	struct bdb_block_entry *entry, *ne;
3235
3236	list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3237	list_del(entry: &devdata->node);
3238	kfree(objp: devdata->dsc);
3239	kfree(objp: devdata);
3240	}
3241
3242	list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3243	list_del(entry: &entry->node);
3244	kfree(objp: entry);
3245	}
3246	}
3247
3248	void intel_bios_fini_panel(struct intel_panel *panel)
3249	{
3250	kfree(objp: panel->vbt.sdvo_lvds_vbt_mode);
3251	panel->vbt.sdvo_lvds_vbt_mode = NULL;
3252	kfree(objp: panel->vbt.lfp_lvds_vbt_mode);
3253	panel->vbt.lfp_lvds_vbt_mode = NULL;
3254	kfree(objp: panel->vbt.dsi.data);
3255	panel->vbt.dsi.data = NULL;
3256	kfree(objp: panel->vbt.dsi.pps);
3257	panel->vbt.dsi.pps = NULL;
3258	kfree(objp: panel->vbt.dsi.config);
3259	panel->vbt.dsi.config = NULL;
3260	kfree(objp: panel->vbt.dsi.deassert_seq);
3261	panel->vbt.dsi.deassert_seq = NULL;
3262	}
3263
3264	/**
3265	* intel_bios_is_tv_present - is integrated TV present in VBT
3266	* @i915: i915 device instance
3267	*
3268	* Return true if TV is present. If no child devices were parsed from VBT,
3269	* assume TV is present.
3270	*/
3271	bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3272	{
3273	const struct intel_bios_encoder_data *devdata;
3274
3275	if (!i915->display.vbt.int_tv_support)
3276	return false;
3277
3278	if (list_empty(head: &i915->display.vbt.display_devices))
3279	return true;
3280
3281	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3282	const struct child_device_config *child = &devdata->child;
3283
3284	/*
3285	* If the device type is not TV, continue.
3286	*/
3287	switch (child->device_type) {
3288	case DEVICE_TYPE_INT_TV:
3289	case DEVICE_TYPE_TV:
3290	case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3291	break;
3292	default:
3293	continue;
3294	}
3295	/* Only when the addin_offset is non-zero, it is regarded
3296	* as present.
3297	*/
3298	if (child->addin_offset)
3299	return true;
3300	}
3301
3302	return false;
3303	}
3304
3305	/**
3306	* intel_bios_is_lvds_present - is LVDS present in VBT
3307	* @i915: i915 device instance
3308	* @i2c_pin: i2c pin for LVDS if present
3309	*
3310	* Return true if LVDS is present. If no child devices were parsed from VBT,
3311	* assume LVDS is present.
3312	*/
3313	bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3314	{
3315	const struct intel_bios_encoder_data *devdata;
3316
3317	if (list_empty(head: &i915->display.vbt.display_devices))
3318	return true;
3319
3320	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3321	const struct child_device_config *child = &devdata->child;
3322
3323	/* If the device type is not LFP, continue.
3324	* We have to check both the new identifiers as well as the
3325	* old for compatibility with some BIOSes.
3326	*/
3327	if (child->device_type != DEVICE_TYPE_INT_LFP &&
3328	child->device_type != DEVICE_TYPE_LFP)
3329	continue;
3330
3331	if (intel_gmbus_is_valid_pin(dev_priv: i915, pin: child->i2c_pin))
3332	*i2c_pin = child->i2c_pin;
3333
3334	/* However, we cannot trust the BIOS writers to populate
3335	* the VBT correctly. Since LVDS requires additional
3336	* information from AIM blocks, a non-zero addin offset is
3337	* a good indicator that the LVDS is actually present.
3338	*/
3339	if (child->addin_offset)
3340	return true;
3341
3342	/* But even then some BIOS writers perform some black magic
3343	* and instantiate the device without reference to any
3344	* additional data. Trust that if the VBT was written into
3345	* the OpRegion then they have validated the LVDS's existence.
3346	*/
3347	if (intel_opregion_get_vbt(i915, NULL))
3348	return true;
3349	}
3350
3351	return false;
3352	}
3353
3354	/**
3355	* intel_bios_is_port_present - is the specified digital port present
3356	* @i915: i915 device instance
3357	* @port: port to check
3358	*
3359	* Return true if the device in %port is present.
3360	*/
3361	bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3362	{
3363	const struct intel_bios_encoder_data *devdata;
3364
3365	if (WARN_ON(!has_ddi_port_info(i915)))
3366	return true;
3367
3368	if (!is_port_valid(i915, port))
3369	return false;
3370
3371	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3372	const struct child_device_config *child = &devdata->child;
3373
3374	if (dvo_port_to_port(i915, dvo_port: child->dvo_port) == port)
3375	return true;
3376	}
3377
3378	return false;
3379	}
3380
3381	bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3382	{
3383	const struct child_device_config *child = &devdata->child;
3384
3385	if (!devdata)
3386	return false;
3387
3388	if (!intel_bios_encoder_supports_dp(devdata) ||
3389	!intel_bios_encoder_supports_hdmi(devdata))
3390	return false;
3391
3392	if (dvo_port_type(dvo_port: child->dvo_port) == DVO_PORT_DPA)
3393	return true;
3394
3395	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3396	if (dvo_port_type(dvo_port: child->dvo_port) == DVO_PORT_HDMIA &&
3397	child->aux_channel != 0)
3398	return true;
3399
3400	return false;
3401	}
3402
3403	/**
3404	* intel_bios_is_dsi_present - is DSI present in VBT
3405	* @i915: i915 device instance
3406	* @port: port for DSI if present
3407	*
3408	* Return true if DSI is present, and return the port in %port.
3409	*/
3410	bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3411	enum port *port)
3412	{
3413	const struct intel_bios_encoder_data *devdata;
3414
3415	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3416	const struct child_device_config *child = &devdata->child;
3417	u8 dvo_port = child->dvo_port;
3418
3419	if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3420	continue;
3421
3422	if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3423	drm_dbg_kms(&i915->drm,
3424	"VBT has unsupported DSI port %c\n",
3425	port_name(dvo_port - DVO_PORT_MIPIA));
3426	continue;
3427	}
3428
3429	if (port)
3430	*port = dsi_dvo_port_to_port(i915, dvo_port);
3431	return true;
3432	}
3433
3434	return false;
3435	}
3436
3437	static void fill_dsc(struct intel_crtc_state *crtc_state,
3438	struct dsc_compression_parameters_entry *dsc,
3439	int dsc_max_bpc)
3440	{
3441	struct drm_i915_private *i915 = to_i915(dev: crtc_state->uapi.crtc->dev);
3442	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3443	int bpc = 8;
3444
3445	vdsc_cfg->dsc_version_major = dsc->version_major;
3446	vdsc_cfg->dsc_version_minor = dsc->version_minor;
3447
3448	if (dsc->support_12bpc && dsc_max_bpc >= 12)
3449	bpc = 12;
3450	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3451	bpc = 10;
3452	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3453	bpc = 8;
3454	else
3455	drm_dbg_kms(&i915->drm, "VBT: Unsupported BPC %d for DCS\n",
3456	dsc_max_bpc);
3457
3458	crtc_state->pipe_bpp = bpc * 3;
3459
3460	crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(min(crtc_state->pipe_bpp,
3461	VBT_DSC_MAX_BPP(dsc->max_bpp)));
3462
3463	/*
3464	* FIXME: This is ugly, and slice count should take DSC engine
3465	* throughput etc. into account.
3466	*
3467	* Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3468	*/
3469	if (dsc->slices_per_line & BIT(2)) {
3470	crtc_state->dsc.slice_count = 4;
3471	} else if (dsc->slices_per_line & BIT(1)) {
3472	crtc_state->dsc.slice_count = 2;
3473	} else {
3474	/* FIXME */
3475	if (!(dsc->slices_per_line & BIT(0)))
3476	drm_dbg_kms(&i915->drm, "VBT: Unsupported DSC slice count for DSI\n");
3477
3478	crtc_state->dsc.slice_count = 1;
3479	}
3480
3481	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3482	crtc_state->dsc.slice_count != 0)
3483	drm_dbg_kms(&i915->drm, "VBT: DSC hdisplay %d not divisible by slice count %d\n",
3484	crtc_state->hw.adjusted_mode.crtc_hdisplay,
3485	crtc_state->dsc.slice_count);
3486
3487	/*
3488	* The VBT rc_buffer_block_size and rc_buffer_size definitions
3489	* correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3490	*/
3491	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(rc_buffer_block_size: dsc->rc_buffer_block_size,
3492	rc_buffer_size: dsc->rc_buffer_size);
3493
3494	/* FIXME: DSI spec says bpc + 1 for this one */
3495	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3496
3497	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3498
3499	vdsc_cfg->slice_height = dsc->slice_height;
3500	}
3501
3502	/* FIXME: initially DSI specific */
3503	bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3504	struct intel_crtc_state *crtc_state,
3505	int dsc_max_bpc)
3506	{
3507	struct drm_i915_private *i915 = to_i915(dev: encoder->base.dev);
3508	const struct intel_bios_encoder_data *devdata;
3509
3510	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3511	const struct child_device_config *child = &devdata->child;
3512
3513	if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3514	continue;
3515
3516	if (dsi_dvo_port_to_port(i915, dvo_port: child->dvo_port) == encoder->port) {
3517	if (!devdata->dsc)
3518	return false;
3519
3520	fill_dsc(crtc_state, dsc: devdata->dsc, dsc_max_bpc);
3521
3522	return true;
3523	}
3524	}
3525
3526	return false;
3527	}
3528
3529	static const u8 adlp_aux_ch_map[] = {
3530	[AUX_CH_A] = DP_AUX_A,
3531	[AUX_CH_B] = DP_AUX_B,
3532	[AUX_CH_C] = DP_AUX_C,
3533	[AUX_CH_D_XELPD] = DP_AUX_D,
3534	[AUX_CH_E_XELPD] = DP_AUX_E,
3535	[AUX_CH_USBC1] = DP_AUX_F,
3536	[AUX_CH_USBC2] = DP_AUX_G,
3537	[AUX_CH_USBC3] = DP_AUX_H,
3538	[AUX_CH_USBC4] = DP_AUX_I,
3539	};
3540
3541	/*
3542	* ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3543	* map to DDI A,TC1,TC2,TC3,TC4 respectively.
3544	*/
3545	static const u8 adls_aux_ch_map[] = {
3546	[AUX_CH_A] = DP_AUX_A,
3547	[AUX_CH_USBC1] = DP_AUX_B,
3548	[AUX_CH_USBC2] = DP_AUX_C,
3549	[AUX_CH_USBC3] = DP_AUX_D,
3550	[AUX_CH_USBC4] = DP_AUX_E,
3551	};
3552
3553	/*
3554	* RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3555	* map to DDI A,B,TC1,TC2 respectively.
3556	*/
3557	static const u8 rkl_aux_ch_map[] = {
3558	[AUX_CH_A] = DP_AUX_A,
3559	[AUX_CH_B] = DP_AUX_B,
3560	[AUX_CH_USBC1] = DP_AUX_C,
3561	[AUX_CH_USBC2] = DP_AUX_D,
3562	};
3563
3564	static const u8 direct_aux_ch_map[] = {
3565	[AUX_CH_A] = DP_AUX_A,
3566	[AUX_CH_B] = DP_AUX_B,
3567	[AUX_CH_C] = DP_AUX_C,
3568	[AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3569	[AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3570	[AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3571	[AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3572	[AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3573	[AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3574	};
3575
3576	static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3577	{
3578	const u8 *aux_ch_map;
3579	int i, n_entries;
3580
3581	if (DISPLAY_VER(i915) >= 13) {
3582	aux_ch_map = adlp_aux_ch_map;
3583	n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3584	} else if (IS_ALDERLAKE_S(i915)) {
3585	aux_ch_map = adls_aux_ch_map;
3586	n_entries = ARRAY_SIZE(adls_aux_ch_map);
3587	} else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3588	aux_ch_map = rkl_aux_ch_map;
3589	n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3590	} else {
3591	aux_ch_map = direct_aux_ch_map;
3592	n_entries = ARRAY_SIZE(direct_aux_ch_map);
3593	}
3594
3595	for (i = 0; i < n_entries; i++) {
3596	if (aux_ch_map[i] == aux_channel)
3597	return i;
3598	}
3599
3600	drm_dbg_kms(&i915->drm,
3601	"Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3602	aux_channel);
3603
3604	return AUX_CH_NONE;
3605	}
3606
3607	enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3608	{
3609	if (!devdata || !devdata->child.aux_channel)
3610	return AUX_CH_NONE;
3611
3612	return map_aux_ch(i915: devdata->i915, aux_channel: devdata->child.aux_channel);
3613	}
3614
3615	bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3616	{
3617	struct drm_i915_private *i915;
3618	u8 aux_channel;
3619	int count = 0;
3620
3621	if (!devdata || !devdata->child.aux_channel)
3622	return false;
3623
3624	i915 = devdata->i915;
3625	aux_channel = devdata->child.aux_channel;
3626
3627	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3628	if (intel_bios_encoder_supports_dp(devdata) &&
3629	aux_channel == devdata->child.aux_channel)
3630	count++;
3631	}
3632
3633	return count > 1;
3634	}
3635
3636	int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3637	{
3638	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3639	return 0;
3640
3641	return translate_iboost(i915: devdata->i915, val: devdata->child.dp_iboost_level);
3642	}
3643
3644	int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3645	{
3646	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3647	return 0;
3648
3649	return translate_iboost(i915: devdata->i915, val: devdata->child.hdmi_iboost_level);
3650	}
3651
3652	int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3653	{
3654	if (!devdata || !devdata->child.ddc_pin)
3655	return 0;
3656
3657	return map_ddc_pin(i915: devdata->i915, vbt_pin: devdata->child.ddc_pin);
3658	}
3659
3660	bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3661	{
3662	return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3663	}
3664
3665	bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3666	{
3667	return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3668	}
3669
3670	bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3671	{
3672	return devdata && devdata->child.lane_reversal;
3673	}
3674
3675	bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3676	{
3677	return devdata && devdata->child.hpd_invert;
3678	}
3679
3680	const struct intel_bios_encoder_data *
3681	intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3682	{
3683	struct intel_bios_encoder_data *devdata;
3684
3685	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3686	if (intel_bios_encoder_port(devdata) == port)
3687	return devdata;
3688	}
3689
3690	return NULL;
3691	}
3692
3693	void intel_bios_for_each_encoder(struct drm_i915_private *i915,
3694	void (*func)(struct drm_i915_private *i915,
3695	const struct intel_bios_encoder_data *devdata))
3696	{
3697	struct intel_bios_encoder_data *devdata;
3698
3699	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
3700	func(i915, devdata);
3701	}
3702
3703	static int intel_bios_vbt_show(struct seq_file *m, void *unused)
3704	{
3705	struct drm_i915_private *i915 = m->private;
3706	const void *vbt;
3707	size_t vbt_size;
3708
3709	/*
3710	* FIXME: VBT might originate from other places than opregion, and then
3711	* this would be incorrect.
3712	*/
3713	vbt = intel_opregion_get_vbt(i915, size: &vbt_size);
3714	if (vbt)
3715	seq_write(seq: m, data: vbt, len: vbt_size);
3716
3717	return 0;
3718	}
3719
3720	DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt);
3721
3722	void intel_bios_debugfs_register(struct drm_i915_private *i915)
3723	{
3724	struct drm_minor *minor = i915->drm.primary;
3725
3726	debugfs_create_file(name: "i915_vbt", mode: 0444, parent: minor->debugfs_root,
3727	data: i915, fops: &intel_bios_vbt_fops);
3728	}
3729