1 | // SPDX-License-Identifier: GPL-2.0-or-later |
---|---|
2 | /* |
3 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support |
4 | * |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> |
6 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> |
7 | */ |
8 | #define pr_fmt(fmt) "ACPI: " fmt |
9 | |
10 | #include <linux/init.h> |
11 | #include <linux/acpi.h> |
12 | #include <linux/acpi_pmtmr.h> |
13 | #include <linux/efi.h> |
14 | #include <linux/cpumask.h> |
15 | #include <linux/export.h> |
16 | #include <linux/dmi.h> |
17 | #include <linux/irq.h> |
18 | #include <linux/slab.h> |
19 | #include <linux/memblock.h> |
20 | #include <linux/ioport.h> |
21 | #include <linux/pci.h> |
22 | #include <linux/efi-bgrt.h> |
23 | #include <linux/serial_core.h> |
24 | #include <linux/pgtable.h> |
25 | |
26 | #include <xen/xen.h> |
27 | |
28 | #include <asm/e820/api.h> |
29 | #include <asm/irqdomain.h> |
30 | #include <asm/pci_x86.h> |
31 | #include <asm/io_apic.h> |
32 | #include <asm/apic.h> |
33 | #include <asm/io.h> |
34 | #include <asm/mpspec.h> |
35 | #include <asm/smp.h> |
36 | #include <asm/i8259.h> |
37 | #include <asm/setup.h> |
38 | |
39 | #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ |
40 | static int __initdata acpi_force = 0; |
41 | int acpi_disabled; |
42 | EXPORT_SYMBOL(acpi_disabled); |
43 | |
44 | #ifdef CONFIG_X86_64 |
45 | # include <asm/proto.h> |
46 | #endif /* X86 */ |
47 | |
48 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
49 | static int acpi_nobgrt; /* skip ACPI BGRT */ |
50 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
51 | EXPORT_SYMBOL(acpi_pci_disabled); |
52 | |
53 | int acpi_lapic; |
54 | int acpi_ioapic; |
55 | int acpi_strict; |
56 | int acpi_disable_cmcff; |
57 | bool acpi_int_src_ovr[NR_IRQS_LEGACY]; |
58 | |
59 | /* ACPI SCI override configuration */ |
60 | u8 acpi_sci_flags __initdata; |
61 | u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ; |
62 | int acpi_skip_timer_override __initdata; |
63 | int acpi_use_timer_override __initdata; |
64 | int acpi_fix_pin2_polarity __initdata; |
65 | |
66 | #ifdef CONFIG_X86_LOCAL_APIC |
67 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; |
68 | static bool has_lapic_cpus __initdata; |
69 | static bool acpi_support_online_capable; |
70 | #endif |
71 | |
72 | #ifdef CONFIG_X86_IO_APIC |
73 | /* |
74 | * Locks related to IOAPIC hotplug |
75 | * Hotplug side: |
76 | * ->device_hotplug_lock |
77 | * ->acpi_ioapic_lock |
78 | * ->ioapic_lock |
79 | * Interrupt mapping side: |
80 | * ->acpi_ioapic_lock |
81 | * ->ioapic_mutex |
82 | * ->ioapic_lock |
83 | */ |
84 | static DEFINE_MUTEX(acpi_ioapic_lock); |
85 | #endif |
86 | |
87 | /* -------------------------------------------------------------------------- |
88 | Boot-time Configuration |
89 | -------------------------------------------------------------------------- */ |
90 | |
91 | /* |
92 | * The default interrupt routing model is PIC (8259). This gets |
93 | * overridden if IOAPICs are enumerated (below). |
94 | */ |
95 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
96 | |
97 | |
98 | /* |
99 | * ISA irqs by default are the first 16 gsis but can be |
100 | * any gsi as specified by an interrupt source override. |
101 | */ |
102 | static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { |
103 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 |
104 | }; |
105 | |
106 | /* |
107 | * This is just a simple wrapper around early_memremap(), |
108 | * with sanity checks for phys == 0 and size == 0. |
109 | */ |
110 | void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) |
111 | { |
112 | |
113 | if (!phys || !size) |
114 | return NULL; |
115 | |
116 | return early_memremap(phys_addr: phys, size); |
117 | } |
118 | |
119 | void __init __acpi_unmap_table(void __iomem *map, unsigned long size) |
120 | { |
121 | if (!map || !size) |
122 | return; |
123 | |
124 | early_memunmap(addr: map, size); |
125 | } |
126 | |
127 | #ifdef CONFIG_X86_LOCAL_APIC |
128 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
129 | { |
130 | struct acpi_table_madt *madt = NULL; |
131 | |
132 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
133 | return -EINVAL; |
134 | |
135 | madt = (struct acpi_table_madt *)table; |
136 | if (!madt) { |
137 | pr_warn("Unable to map MADT\n"); |
138 | return -ENODEV; |
139 | } |
140 | |
141 | if (madt->address) { |
142 | acpi_lapic_addr = (u64) madt->address; |
143 | |
144 | pr_debug("Local APIC address 0x%08x\n", madt->address); |
145 | } |
146 | |
147 | if (madt->flags & ACPI_MADT_PCAT_COMPAT) |
148 | legacy_pic_pcat_compat(); |
149 | |
150 | /* ACPI 6.3 and newer support the online capable bit. */ |
151 | if (acpi_gbl_FADT.header.revision > 6 || |
152 | (acpi_gbl_FADT.header.revision == 6 && |
153 | acpi_gbl_FADT.minor_revision >= 3)) |
154 | acpi_support_online_capable = true; |
155 | |
156 | default_acpi_madt_oem_check(madt->header.oem_id, |
157 | madt->header.oem_table_id); |
158 | |
159 | return 0; |
160 | } |
161 | |
162 | static bool __init acpi_is_processor_usable(u32 lapic_flags) |
163 | { |
164 | if (lapic_flags & ACPI_MADT_ENABLED) |
165 | return true; |
166 | |
167 | if (!acpi_support_online_capable || |
168 | (lapic_flags & ACPI_MADT_ONLINE_CAPABLE)) |
169 | return true; |
170 | |
171 | return false; |
172 | } |
173 | |
174 | static int __init |
175 | acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end) |
176 | { |
177 | struct acpi_madt_local_x2apic *processor = NULL; |
178 | #ifdef CONFIG_X86_X2APIC |
179 | u32 apic_id; |
180 | u8 enabled; |
181 | #endif |
182 | |
183 | processor = (struct acpi_madt_local_x2apic *)header; |
184 | |
185 | if (BAD_MADT_ENTRY(processor, end)) |
186 | return -EINVAL; |
187 | |
188 | acpi_table_print_madt_entry(madt: &header->common); |
189 | |
190 | #ifdef CONFIG_X86_X2APIC |
191 | apic_id = processor->local_apic_id; |
192 | enabled = processor->lapic_flags & ACPI_MADT_ENABLED; |
193 | |
194 | /* Ignore invalid ID */ |
195 | if (apic_id == 0xffffffff) |
196 | return 0; |
197 | |
198 | /* don't register processors that cannot be onlined */ |
199 | if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags)) |
200 | return 0; |
201 | |
202 | /* |
203 | * According to https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#processor-local-x2apic-structure |
204 | * when MADT provides both valid LAPIC and x2APIC entries, the APIC ID |
205 | * in x2APIC must be equal or greater than 0xff. |
206 | */ |
207 | if (has_lapic_cpus && apic_id < 0xff) |
208 | return 0; |
209 | |
210 | /* |
211 | * We need to register disabled CPU as well to permit |
212 | * counting disabled CPUs. This allows us to size |
213 | * cpus_possible_map more accurately, to permit |
214 | * to not preallocating memory for all NR_CPUS |
215 | * when we use CPU hotplug. |
216 | */ |
217 | if (!apic_id_valid(apic_id)) { |
218 | if (enabled) |
219 | pr_warn("x2apic entry ignored\n"); |
220 | return 0; |
221 | } |
222 | |
223 | topology_register_apic(apic_id, acpi_id: processor->uid, present: enabled); |
224 | #else |
225 | pr_warn("x2apic entry ignored\n"); |
226 | #endif |
227 | |
228 | return 0; |
229 | } |
230 | |
231 | static int __init |
232 | acpi_check_lapic(union acpi_subtable_headers *header, const unsigned long end) |
233 | { |
234 | struct acpi_madt_local_apic *processor = NULL; |
235 | |
236 | processor = (struct acpi_madt_local_apic *)header; |
237 | |
238 | if (BAD_MADT_ENTRY(processor, end)) |
239 | return -EINVAL; |
240 | |
241 | /* Ignore invalid ID */ |
242 | if (processor->id == 0xff) |
243 | return 0; |
244 | |
245 | /* Ignore processors that can not be onlined */ |
246 | if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags)) |
247 | return 0; |
248 | |
249 | has_lapic_cpus = true; |
250 | return 0; |
251 | } |
252 | |
253 | static int __init |
254 | acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end) |
255 | { |
256 | struct acpi_madt_local_apic *processor = NULL; |
257 | |
258 | processor = (struct acpi_madt_local_apic *)header; |
259 | |
260 | if (BAD_MADT_ENTRY(processor, end)) |
261 | return -EINVAL; |
262 | |
263 | acpi_table_print_madt_entry(madt: &header->common); |
264 | |
265 | /* Ignore invalid ID */ |
266 | if (processor->id == 0xff) |
267 | return 0; |
268 | |
269 | /* don't register processors that can not be onlined */ |
270 | if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags)) |
271 | return 0; |
272 | |
273 | /* |
274 | * We need to register disabled CPU as well to permit |
275 | * counting disabled CPUs. This allows us to size |
276 | * cpus_possible_map more accurately, to permit |
277 | * to not preallocating memory for all NR_CPUS |
278 | * when we use CPU hotplug. |
279 | */ |
280 | topology_register_apic(apic_id: processor->id, /* APIC ID */ |
281 | acpi_id: processor->processor_id, /* ACPI ID */ |
282 | present: processor->lapic_flags & ACPI_MADT_ENABLED); |
283 | |
284 | return 0; |
285 | } |
286 | |
287 | static int __init |
288 | acpi_parse_sapic(union acpi_subtable_headers *header, const unsigned long end) |
289 | { |
290 | struct acpi_madt_local_sapic *processor = NULL; |
291 | |
292 | processor = (struct acpi_madt_local_sapic *)header; |
293 | |
294 | if (BAD_MADT_ENTRY(processor, end)) |
295 | return -EINVAL; |
296 | |
297 | acpi_table_print_madt_entry(madt: &header->common); |
298 | |
299 | topology_register_apic(apic_id: (processor->id << 8) | processor->eid,/* APIC ID */ |
300 | acpi_id: processor->processor_id, /* ACPI ID */ |
301 | present: processor->lapic_flags & ACPI_MADT_ENABLED); |
302 | |
303 | return 0; |
304 | } |
305 | |
306 | static int __init |
307 | acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * header, |
308 | const unsigned long end) |
309 | { |
310 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
311 | |
312 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
313 | |
314 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) |
315 | return -EINVAL; |
316 | |
317 | acpi_table_print_madt_entry(madt: &header->common); |
318 | |
319 | acpi_lapic_addr = lapic_addr_ovr->address; |
320 | |
321 | return 0; |
322 | } |
323 | |
324 | static int __init |
325 | acpi_parse_x2apic_nmi(union acpi_subtable_headers *header, |
326 | const unsigned long end) |
327 | { |
328 | struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL; |
329 | |
330 | x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header; |
331 | |
332 | if (BAD_MADT_ENTRY(x2apic_nmi, end)) |
333 | return -EINVAL; |
334 | |
335 | acpi_table_print_madt_entry(madt: &header->common); |
336 | |
337 | if (x2apic_nmi->lint != 1) |
338 | pr_warn("NMI not connected to LINT 1!\n"); |
339 | |
340 | return 0; |
341 | } |
342 | |
343 | static int __init |
344 | acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long end) |
345 | { |
346 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
347 | |
348 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
349 | |
350 | if (BAD_MADT_ENTRY(lapic_nmi, end)) |
351 | return -EINVAL; |
352 | |
353 | acpi_table_print_madt_entry(madt: &header->common); |
354 | |
355 | if (lapic_nmi->lint != 1) |
356 | pr_warn("NMI not connected to LINT 1!\n"); |
357 | |
358 | return 0; |
359 | } |
360 | #endif /* CONFIG_X86_LOCAL_APIC */ |
361 | |
362 | #ifdef CONFIG_X86_IO_APIC |
363 | #define MP_ISA_BUS 0 |
364 | |
365 | static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, |
366 | u8 trigger, u32 gsi); |
367 | |
368 | static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, |
369 | u32 gsi) |
370 | { |
371 | /* |
372 | * Check bus_irq boundary. |
373 | */ |
374 | if (bus_irq >= NR_IRQS_LEGACY) { |
375 | pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq); |
376 | return; |
377 | } |
378 | |
379 | /* |
380 | * TBD: This check is for faulty timer entries, where the override |
381 | * erroneously sets the trigger to level, resulting in a HUGE |
382 | * increase of timer interrupts! |
383 | */ |
384 | if ((bus_irq == 0) && (trigger == 3)) |
385 | trigger = 1; |
386 | |
387 | if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0) |
388 | return; |
389 | /* |
390 | * Reset default identity mapping if gsi is also an legacy IRQ, |
391 | * otherwise there will be more than one entry with the same GSI |
392 | * and acpi_isa_irq_to_gsi() may give wrong result. |
393 | */ |
394 | if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) |
395 | isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ; |
396 | isa_irq_to_gsi[bus_irq] = gsi; |
397 | } |
398 | |
399 | static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, |
400 | int polarity) |
401 | { |
402 | #ifdef CONFIG_X86_MPPARSE |
403 | struct mpc_intsrc mp_irq; |
404 | struct pci_dev *pdev; |
405 | unsigned char number; |
406 | unsigned int devfn; |
407 | int ioapic; |
408 | u8 pin; |
409 | |
410 | if (!acpi_ioapic) |
411 | return; |
412 | if (!dev || !dev_is_pci(dev)) |
413 | return; |
414 | |
415 | pdev = to_pci_dev(dev); |
416 | number = pdev->bus->number; |
417 | devfn = pdev->devfn; |
418 | pin = pdev->pin; |
419 | /* print the entry should happen on mptable identically */ |
420 | mp_irq.type = MP_INTSRC; |
421 | mp_irq.irqtype = mp_INT; |
422 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | |
423 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
424 | mp_irq.srcbus = number; |
425 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); |
426 | ioapic = mp_find_ioapic(gsi); |
427 | mp_irq.dstapic = mpc_ioapic_id(ioapic); |
428 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); |
429 | |
430 | mp_save_irq(m: &mp_irq); |
431 | #endif |
432 | } |
433 | |
434 | static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, |
435 | u8 trigger, u32 gsi) |
436 | { |
437 | struct mpc_intsrc mp_irq; |
438 | int ioapic, pin; |
439 | |
440 | /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */ |
441 | ioapic = mp_find_ioapic(gsi); |
442 | if (ioapic < 0) { |
443 | pr_warn("Failed to find ioapic for gsi : %u\n", gsi); |
444 | return ioapic; |
445 | } |
446 | |
447 | pin = mp_find_ioapic_pin(ioapic, gsi); |
448 | |
449 | mp_irq.type = MP_INTSRC; |
450 | mp_irq.irqtype = mp_INT; |
451 | mp_irq.irqflag = (trigger << 2) | polarity; |
452 | mp_irq.srcbus = MP_ISA_BUS; |
453 | mp_irq.srcbusirq = bus_irq; |
454 | mp_irq.dstapic = mpc_ioapic_id(ioapic); |
455 | mp_irq.dstirq = pin; |
456 | |
457 | mp_save_irq(m: &mp_irq); |
458 | |
459 | return 0; |
460 | } |
461 | |
462 | static int __init |
463 | acpi_parse_ioapic(union acpi_subtable_headers * header, const unsigned long end) |
464 | { |
465 | struct acpi_madt_io_apic *ioapic = NULL; |
466 | struct ioapic_domain_cfg cfg = { |
467 | .type = IOAPIC_DOMAIN_DYNAMIC, |
468 | .ops = &mp_ioapic_irqdomain_ops, |
469 | }; |
470 | |
471 | ioapic = (struct acpi_madt_io_apic *)header; |
472 | |
473 | if (BAD_MADT_ENTRY(ioapic, end)) |
474 | return -EINVAL; |
475 | |
476 | acpi_table_print_madt_entry(madt: &header->common); |
477 | |
478 | /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */ |
479 | if (ioapic->global_irq_base < nr_legacy_irqs()) |
480 | cfg.type = IOAPIC_DOMAIN_LEGACY; |
481 | |
482 | mp_register_ioapic(id: ioapic->id, address: ioapic->address, gsi_base: ioapic->global_irq_base, |
483 | cfg: &cfg); |
484 | |
485 | return 0; |
486 | } |
487 | |
488 | /* |
489 | * Parse Interrupt Source Override for the ACPI SCI |
490 | */ |
491 | static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi) |
492 | { |
493 | if (trigger == 0) /* compatible SCI trigger is level */ |
494 | trigger = 3; |
495 | |
496 | if (polarity == 0) /* compatible SCI polarity is low */ |
497 | polarity = 3; |
498 | |
499 | /* Command-line over-ride via acpi_sci= */ |
500 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
501 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; |
502 | |
503 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
504 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; |
505 | |
506 | if (bus_irq < NR_IRQS_LEGACY) |
507 | mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); |
508 | else |
509 | mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi); |
510 | |
511 | acpi_penalize_sci_irq(irq: bus_irq, trigger, polarity); |
512 | |
513 | /* |
514 | * stash over-ride to indicate we've been here |
515 | * and for later update of acpi_gbl_FADT |
516 | */ |
517 | acpi_sci_override_gsi = gsi; |
518 | return; |
519 | } |
520 | |
521 | static int __init |
522 | acpi_parse_int_src_ovr(union acpi_subtable_headers * header, |
523 | const unsigned long end) |
524 | { |
525 | struct acpi_madt_interrupt_override *intsrc = NULL; |
526 | |
527 | intsrc = (struct acpi_madt_interrupt_override *)header; |
528 | |
529 | if (BAD_MADT_ENTRY(intsrc, end)) |
530 | return -EINVAL; |
531 | |
532 | acpi_table_print_madt_entry(madt: &header->common); |
533 | |
534 | if (intsrc->source_irq < NR_IRQS_LEGACY) |
535 | acpi_int_src_ovr[intsrc->source_irq] = true; |
536 | |
537 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
538 | acpi_sci_ioapic_setup(bus_irq: intsrc->source_irq, |
539 | polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
540 | trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, |
541 | gsi: intsrc->global_irq); |
542 | return 0; |
543 | } |
544 | |
545 | if (intsrc->source_irq == 0) { |
546 | if (acpi_skip_timer_override) { |
547 | pr_warn("BIOS IRQ0 override ignored.\n"); |
548 | return 0; |
549 | } |
550 | |
551 | if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity |
552 | && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { |
553 | intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; |
554 | pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); |
555 | } |
556 | } |
557 | |
558 | mp_override_legacy_irq(bus_irq: intsrc->source_irq, |
559 | polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
560 | trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, |
561 | gsi: intsrc->global_irq); |
562 | |
563 | return 0; |
564 | } |
565 | |
566 | static int __init |
567 | acpi_parse_nmi_src(union acpi_subtable_headers * header, const unsigned long end) |
568 | { |
569 | struct acpi_madt_nmi_source *nmi_src = NULL; |
570 | |
571 | nmi_src = (struct acpi_madt_nmi_source *)header; |
572 | |
573 | if (BAD_MADT_ENTRY(nmi_src, end)) |
574 | return -EINVAL; |
575 | |
576 | acpi_table_print_madt_entry(madt: &header->common); |
577 | |
578 | /* TBD: Support nimsrc entries? */ |
579 | |
580 | return 0; |
581 | } |
582 | |
583 | #endif /* CONFIG_X86_IO_APIC */ |
584 | |
585 | /* |
586 | * acpi_pic_sci_set_trigger() |
587 | * |
588 | * use ELCR to set PIC-mode trigger type for SCI |
589 | * |
590 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's |
591 | * it may require Edge Trigger -- use "acpi_sci=edge" |
592 | * |
593 | * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers |
594 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. |
595 | * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
596 | * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0) |
597 | */ |
598 | |
599 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
600 | { |
601 | unsigned int mask = 1 << irq; |
602 | unsigned int old, new; |
603 | |
604 | /* Real old ELCR mask */ |
605 | old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8); |
606 | |
607 | /* |
608 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
609 | * since we will set it correctly as we enable the PCI irq |
610 | * routing. |
611 | */ |
612 | new = acpi_noirq ? old : 0; |
613 | |
614 | /* |
615 | * Update SCI information in the ELCR, it isn't in the PCI |
616 | * routing tables.. |
617 | */ |
618 | switch (trigger) { |
619 | case 1: /* Edge - clear */ |
620 | new &= ~mask; |
621 | break; |
622 | case 3: /* Level - set */ |
623 | new |= mask; |
624 | break; |
625 | } |
626 | |
627 | if (old == new) |
628 | return; |
629 | |
630 | pr_warn("setting ELCR to %04x (from %04x)\n", new, old); |
631 | outb(value: new, PIC_ELCR1); |
632 | outb(value: new >> 8, PIC_ELCR2); |
633 | } |
634 | |
635 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) |
636 | { |
637 | int rc, irq, trigger, polarity; |
638 | |
639 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { |
640 | *irqp = gsi; |
641 | return 0; |
642 | } |
643 | |
644 | rc = acpi_get_override_irq(gsi, trigger: &trigger, polarity: &polarity); |
645 | if (rc) |
646 | return rc; |
647 | |
648 | trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; |
649 | polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; |
650 | irq = acpi_register_gsi(NULL, gsi, triggering: trigger, polarity); |
651 | if (irq < 0) |
652 | return irq; |
653 | |
654 | *irqp = irq; |
655 | return 0; |
656 | } |
657 | EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); |
658 | |
659 | int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) |
660 | { |
661 | if (isa_irq < nr_legacy_irqs() && |
662 | isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) { |
663 | *gsi = isa_irq_to_gsi[isa_irq]; |
664 | return 0; |
665 | } |
666 | |
667 | return -1; |
668 | } |
669 | |
670 | static int acpi_register_gsi_pic(struct device *dev, u32 gsi, |
671 | int trigger, int polarity) |
672 | { |
673 | #ifdef CONFIG_PCI |
674 | /* |
675 | * Make sure all (legacy) PCI IRQs are set as level-triggered. |
676 | */ |
677 | if (trigger == ACPI_LEVEL_SENSITIVE) |
678 | elcr_set_level_irq(irq: gsi); |
679 | #endif |
680 | |
681 | return gsi; |
682 | } |
683 | |
684 | #ifdef CONFIG_X86_LOCAL_APIC |
685 | static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, |
686 | int trigger, int polarity) |
687 | { |
688 | int irq = gsi; |
689 | #ifdef CONFIG_X86_IO_APIC |
690 | int node; |
691 | struct irq_alloc_info info; |
692 | |
693 | node = dev ? dev_to_node(dev) : NUMA_NO_NODE; |
694 | trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; |
695 | polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; |
696 | ioapic_set_alloc_attr(info: &info, node, trigger, polarity); |
697 | |
698 | mutex_lock(&acpi_ioapic_lock); |
699 | irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, info: &info); |
700 | /* Don't set up the ACPI SCI because it's already set up */ |
701 | if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt) |
702 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); |
703 | mutex_unlock(lock: &acpi_ioapic_lock); |
704 | #endif |
705 | |
706 | return irq; |
707 | } |
708 | |
709 | static void acpi_unregister_gsi_ioapic(u32 gsi) |
710 | { |
711 | #ifdef CONFIG_X86_IO_APIC |
712 | int irq; |
713 | |
714 | mutex_lock(&acpi_ioapic_lock); |
715 | irq = mp_map_gsi_to_irq(gsi, flags: 0, NULL); |
716 | if (irq > 0) |
717 | mp_unmap_irq(irq); |
718 | mutex_unlock(lock: &acpi_ioapic_lock); |
719 | #endif |
720 | } |
721 | #endif |
722 | |
723 | int (*__acpi_register_gsi)(struct device *dev, u32 gsi, |
724 | int trigger, int polarity) = acpi_register_gsi_pic; |
725 | void (*__acpi_unregister_gsi)(u32 gsi) = NULL; |
726 | |
727 | #ifdef CONFIG_ACPI_SLEEP |
728 | int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel; |
729 | #else |
730 | int (*acpi_suspend_lowlevel)(void); |
731 | #endif |
732 | |
733 | /* |
734 | * success: return IRQ number (>=0) |
735 | * failure: return < 0 |
736 | */ |
737 | int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) |
738 | { |
739 | return __acpi_register_gsi(dev, gsi, trigger, polarity); |
740 | } |
741 | EXPORT_SYMBOL_GPL(acpi_register_gsi); |
742 | |
743 | void acpi_unregister_gsi(u32 gsi) |
744 | { |
745 | if (__acpi_unregister_gsi) |
746 | __acpi_unregister_gsi(gsi); |
747 | } |
748 | EXPORT_SYMBOL_GPL(acpi_unregister_gsi); |
749 | |
750 | #ifdef CONFIG_X86_LOCAL_APIC |
751 | static void __init acpi_set_irq_model_ioapic(void) |
752 | { |
753 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; |
754 | __acpi_register_gsi = acpi_register_gsi_ioapic; |
755 | __acpi_unregister_gsi = acpi_unregister_gsi_ioapic; |
756 | acpi_ioapic = 1; |
757 | } |
758 | #endif |
759 | |
760 | /* |
761 | * ACPI based hotplug support for CPU |
762 | */ |
763 | #ifdef CONFIG_ACPI_HOTPLUG_CPU |
764 | #include <acpi/processor.h> |
765 | |
766 | static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) |
767 | { |
768 | #ifdef CONFIG_ACPI_NUMA |
769 | int nid; |
770 | |
771 | nid = acpi_get_node(handle); |
772 | if (nid != NUMA_NO_NODE) { |
773 | set_apicid_to_node(apicid: physid, node: nid); |
774 | numa_set_node(cpu, node: nid); |
775 | } |
776 | #endif |
777 | return 0; |
778 | } |
779 | |
780 | int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, int *pcpu) |
781 | { |
782 | int cpu = topology_hotplug_apic(apic_id: physid, acpi_id); |
783 | |
784 | if (cpu < 0) { |
785 | pr_info("Unable to map lapic to logical cpu number\n"); |
786 | return cpu; |
787 | } |
788 | |
789 | acpi_processor_set_pdc(handle); |
790 | acpi_map_cpu2node(handle, cpu, physid); |
791 | |
792 | *pcpu = cpu; |
793 | return 0; |
794 | } |
795 | EXPORT_SYMBOL(acpi_map_cpu); |
796 | |
797 | int acpi_unmap_cpu(int cpu) |
798 | { |
799 | #ifdef CONFIG_ACPI_NUMA |
800 | set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); |
801 | #endif |
802 | topology_hotunplug_apic(cpu); |
803 | return 0; |
804 | } |
805 | EXPORT_SYMBOL(acpi_unmap_cpu); |
806 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
807 | |
808 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
809 | { |
810 | int ret = -ENOSYS; |
811 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
812 | int ioapic_id; |
813 | u64 addr; |
814 | struct ioapic_domain_cfg cfg = { |
815 | .type = IOAPIC_DOMAIN_DYNAMIC, |
816 | .ops = &mp_ioapic_irqdomain_ops, |
817 | }; |
818 | |
819 | ioapic_id = acpi_get_ioapic_id(handle, gsi_base, phys_addr: &addr); |
820 | if (ioapic_id < 0) { |
821 | unsigned long long uid; |
822 | acpi_status status; |
823 | |
824 | status = acpi_evaluate_integer(handle, METHOD_NAME__UID, |
825 | NULL, data: &uid); |
826 | if (ACPI_FAILURE(status)) { |
827 | acpi_handle_warn(handle, "failed to get IOAPIC ID.\n"); |
828 | return -EINVAL; |
829 | } |
830 | ioapic_id = (int)uid; |
831 | } |
832 | |
833 | mutex_lock(&acpi_ioapic_lock); |
834 | ret = mp_register_ioapic(id: ioapic_id, address: phys_addr, gsi_base, cfg: &cfg); |
835 | mutex_unlock(lock: &acpi_ioapic_lock); |
836 | #endif |
837 | |
838 | return ret; |
839 | } |
840 | EXPORT_SYMBOL(acpi_register_ioapic); |
841 | |
842 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
843 | { |
844 | int ret = -ENOSYS; |
845 | |
846 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
847 | mutex_lock(&acpi_ioapic_lock); |
848 | ret = mp_unregister_ioapic(gsi_base); |
849 | mutex_unlock(lock: &acpi_ioapic_lock); |
850 | #endif |
851 | |
852 | return ret; |
853 | } |
854 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
855 | |
856 | /** |
857 | * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base |
858 | * has been registered |
859 | * @handle: ACPI handle of the IOAPIC device |
860 | * @gsi_base: GSI base associated with the IOAPIC |
861 | * |
862 | * Assume caller holds some type of lock to serialize acpi_ioapic_registered() |
863 | * with acpi_register_ioapic()/acpi_unregister_ioapic(). |
864 | */ |
865 | int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base) |
866 | { |
867 | int ret = 0; |
868 | |
869 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
870 | mutex_lock(&acpi_ioapic_lock); |
871 | ret = mp_ioapic_registered(gsi_base); |
872 | mutex_unlock(lock: &acpi_ioapic_lock); |
873 | #endif |
874 | |
875 | return ret; |
876 | } |
877 | |
878 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
879 | { |
880 | struct acpi_table_boot *sb = (struct acpi_table_boot *)table; |
881 | |
882 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
883 | |
884 | return 0; |
885 | } |
886 | |
887 | #ifdef CONFIG_HPET_TIMER |
888 | #include <asm/hpet.h> |
889 | |
890 | static struct resource *hpet_res __initdata; |
891 | |
892 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
893 | { |
894 | struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table; |
895 | |
896 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
897 | pr_warn("HPET timers must be located in memory.\n"); |
898 | return -1; |
899 | } |
900 | |
901 | hpet_address = hpet_tbl->address.address; |
902 | hpet_blockid = hpet_tbl->sequence; |
903 | |
904 | /* |
905 | * Some broken BIOSes advertise HPET at 0x0. We really do not |
906 | * want to allocate a resource there. |
907 | */ |
908 | if (!hpet_address) { |
909 | pr_warn("HPET id: %#x base: %#lx is invalid\n", hpet_tbl->id, hpet_address); |
910 | return 0; |
911 | } |
912 | #ifdef CONFIG_X86_64 |
913 | /* |
914 | * Some even more broken BIOSes advertise HPET at |
915 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add |
916 | * some noise: |
917 | */ |
918 | if (hpet_address == 0xfed0000000000000UL) { |
919 | if (!hpet_force_user) { |
920 | pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n", |
921 | hpet_tbl->id); |
922 | hpet_address = 0; |
923 | return 0; |
924 | } |
925 | pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n", |
926 | hpet_tbl->id); |
927 | hpet_address >>= 32; |
928 | } |
929 | #endif |
930 | pr_info("HPET id: %#x base: %#lx\n", hpet_tbl->id, hpet_address); |
931 | |
932 | /* |
933 | * Allocate and initialize the HPET firmware resource for adding into |
934 | * the resource tree during the lateinit timeframe. |
935 | */ |
936 | #define HPET_RESOURCE_NAME_SIZE 9 |
937 | hpet_res = memblock_alloc_or_panic(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE, |
938 | SMP_CACHE_BYTES); |
939 | |
940 | hpet_res->name = (void *)&hpet_res[1]; |
941 | hpet_res->flags = IORESOURCE_MEM; |
942 | snprintf(buf: (char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, fmt: "HPET %u", |
943 | hpet_tbl->sequence); |
944 | |
945 | hpet_res->start = hpet_address; |
946 | hpet_res->end = hpet_address + (1 * 1024) - 1; |
947 | |
948 | return 0; |
949 | } |
950 | |
951 | /* |
952 | * hpet_insert_resource inserts the HPET resources used into the resource |
953 | * tree. |
954 | */ |
955 | static __init int hpet_insert_resource(void) |
956 | { |
957 | if (!hpet_res) |
958 | return 1; |
959 | |
960 | return insert_resource(parent: &iomem_resource, new: hpet_res); |
961 | } |
962 | |
963 | late_initcall(hpet_insert_resource); |
964 | |
965 | #else |
966 | #define acpi_parse_hpet NULL |
967 | #endif |
968 | |
969 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
970 | { |
971 | if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) { |
972 | pr_debug("no legacy devices present\n"); |
973 | x86_platform.legacy.devices.pnpbios = 0; |
974 | } |
975 | |
976 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
977 | !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) && |
978 | x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) { |
979 | pr_debug("i8042 controller is absent\n"); |
980 | x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT; |
981 | } |
982 | |
983 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) { |
984 | pr_debug("not registering RTC platform device\n"); |
985 | x86_platform.legacy.rtc = 0; |
986 | } |
987 | |
988 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) { |
989 | pr_debug("probing for VGA not safe\n"); |
990 | x86_platform.legacy.no_vga = 1; |
991 | } |
992 | |
993 | #ifdef CONFIG_X86_PM_TIMER |
994 | /* detect the location of the ACPI PM Timer */ |
995 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
996 | /* FADT rev. 2 */ |
997 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
998 | ACPI_ADR_SPACE_SYSTEM_IO) |
999 | return 0; |
1000 | |
1001 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
1002 | /* |
1003 | * "X" fields are optional extensions to the original V1.0 |
1004 | * fields, so we must selectively expand V1.0 fields if the |
1005 | * corresponding X field is zero. |
1006 | */ |
1007 | if (!pmtmr_ioport) |
1008 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1009 | } else { |
1010 | /* FADT rev. 1 */ |
1011 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1012 | } |
1013 | if (pmtmr_ioport) |
1014 | pr_info("PM-Timer IO Port: %#x\n", pmtmr_ioport); |
1015 | #endif |
1016 | return 0; |
1017 | } |
1018 | |
1019 | #ifdef CONFIG_X86_LOCAL_APIC |
1020 | /* |
1021 | * Parse LAPIC entries in MADT |
1022 | * returns 0 on success, < 0 on error |
1023 | */ |
1024 | |
1025 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
1026 | { |
1027 | int count; |
1028 | |
1029 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1030 | return -ENODEV; |
1031 | |
1032 | /* |
1033 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
1034 | * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value). |
1035 | */ |
1036 | |
1037 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
1038 | handler: acpi_parse_lapic_addr_ovr, max_entries: 0); |
1039 | if (count < 0) { |
1040 | pr_err("Error parsing LAPIC address override entry\n"); |
1041 | return count; |
1042 | } |
1043 | |
1044 | register_lapic_address(address: acpi_lapic_addr); |
1045 | |
1046 | return count; |
1047 | } |
1048 | |
1049 | static int __init acpi_parse_madt_lapic_entries(void) |
1050 | { |
1051 | int count, x2count = 0; |
1052 | struct acpi_subtable_proc madt_proc[2]; |
1053 | int ret; |
1054 | |
1055 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1056 | return -ENODEV; |
1057 | |
1058 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_SAPIC, |
1059 | handler: acpi_parse_sapic, MAX_LOCAL_APIC); |
1060 | |
1061 | if (!count) { |
1062 | /* Check if there are valid LAPIC entries */ |
1063 | acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC, handler: acpi_check_lapic, MAX_LOCAL_APIC); |
1064 | |
1065 | /* |
1066 | * Enumerate the APIC IDs in the order that they appear in the |
1067 | * MADT, no matter LAPIC entry or x2APIC entry is used. |
1068 | */ |
1069 | memset(madt_proc, 0, sizeof(madt_proc)); |
1070 | madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC; |
1071 | madt_proc[0].handler = acpi_parse_lapic; |
1072 | madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC; |
1073 | madt_proc[1].handler = acpi_parse_x2apic; |
1074 | ret = acpi_table_parse_entries_array(ACPI_SIG_MADT, |
1075 | table_size: sizeof(struct acpi_table_madt), |
1076 | proc: madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC); |
1077 | if (ret < 0) { |
1078 | pr_err("Error parsing LAPIC/X2APIC entries\n"); |
1079 | return ret; |
1080 | } |
1081 | count = madt_proc[0].count; |
1082 | x2count = madt_proc[1].count; |
1083 | } |
1084 | if (!count && !x2count) { |
1085 | pr_err("No LAPIC entries present\n"); |
1086 | /* TBD: Cleanup to allow fallback to MPS */ |
1087 | return -ENODEV; |
1088 | } else if (count < 0 || x2count < 0) { |
1089 | pr_err("Error parsing LAPIC entry\n"); |
1090 | /* TBD: Cleanup to allow fallback to MPS */ |
1091 | return count; |
1092 | } |
1093 | |
1094 | x2count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_X2APIC_NMI, |
1095 | handler: acpi_parse_x2apic_nmi, max_entries: 0); |
1096 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_NMI, |
1097 | handler: acpi_parse_lapic_nmi, max_entries: 0); |
1098 | if (count < 0 || x2count < 0) { |
1099 | pr_err("Error parsing LAPIC NMI entry\n"); |
1100 | /* TBD: Cleanup to allow fallback to MPS */ |
1101 | return count; |
1102 | } |
1103 | return 0; |
1104 | } |
1105 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1106 | |
1107 | #ifdef CONFIG_X86_IO_APIC |
1108 | static void __init mp_config_acpi_legacy_irqs(void) |
1109 | { |
1110 | int i; |
1111 | struct mpc_intsrc mp_irq; |
1112 | |
1113 | #ifdef CONFIG_EISA |
1114 | /* |
1115 | * Fabricate the legacy ISA bus (bus #31). |
1116 | */ |
1117 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; |
1118 | #endif |
1119 | set_bit(MP_ISA_BUS, addr: mp_bus_not_pci); |
1120 | pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs()); |
1121 | |
1122 | /* |
1123 | * Use the default configuration for the IRQs 0-15. Unless |
1124 | * overridden by (MADT) interrupt source override entries. |
1125 | */ |
1126 | for (i = 0; i < nr_legacy_irqs(); i++) { |
1127 | int ioapic, pin; |
1128 | unsigned int dstapic; |
1129 | int idx; |
1130 | u32 gsi; |
1131 | |
1132 | /* Locate the gsi that irq i maps to. */ |
1133 | if (acpi_isa_irq_to_gsi(isa_irq: i, gsi: &gsi)) |
1134 | continue; |
1135 | |
1136 | /* |
1137 | * Locate the IOAPIC that manages the ISA IRQ. |
1138 | */ |
1139 | ioapic = mp_find_ioapic(gsi); |
1140 | if (ioapic < 0) |
1141 | continue; |
1142 | pin = mp_find_ioapic_pin(ioapic, gsi); |
1143 | dstapic = mpc_ioapic_id(ioapic); |
1144 | |
1145 | for (idx = 0; idx < mp_irq_entries; idx++) { |
1146 | struct mpc_intsrc *irq = mp_irqs + idx; |
1147 | |
1148 | /* Do we already have a mapping for this ISA IRQ? */ |
1149 | if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) |
1150 | break; |
1151 | |
1152 | /* Do we already have a mapping for this IOAPIC pin */ |
1153 | if (irq->dstapic == dstapic && irq->dstirq == pin) |
1154 | break; |
1155 | } |
1156 | |
1157 | if (idx != mp_irq_entries) { |
1158 | pr_debug("ACPI: IRQ%d used by override.\n", i); |
1159 | continue; /* IRQ already used */ |
1160 | } |
1161 | |
1162 | mp_irq.type = MP_INTSRC; |
1163 | mp_irq.irqflag = 0; /* Conforming */ |
1164 | mp_irq.srcbus = MP_ISA_BUS; |
1165 | mp_irq.dstapic = dstapic; |
1166 | mp_irq.irqtype = mp_INT; |
1167 | mp_irq.srcbusirq = i; /* Identity mapped */ |
1168 | mp_irq.dstirq = pin; |
1169 | |
1170 | mp_save_irq(m: &mp_irq); |
1171 | } |
1172 | } |
1173 | |
1174 | /* |
1175 | * Parse IOAPIC related entries in MADT |
1176 | * returns 0 on success, < 0 on error |
1177 | */ |
1178 | static int __init acpi_parse_madt_ioapic_entries(void) |
1179 | { |
1180 | int count; |
1181 | |
1182 | /* |
1183 | * ACPI interpreter is required to complete interrupt setup, |
1184 | * so if it is off, don't enumerate the io-apics with ACPI. |
1185 | * If MPS is present, it will handle them, |
1186 | * otherwise the system will stay in PIC mode |
1187 | */ |
1188 | if (acpi_disabled || acpi_noirq) |
1189 | return -ENODEV; |
1190 | |
1191 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1192 | return -ENODEV; |
1193 | |
1194 | /* |
1195 | * if "noapic" boot option, don't look for IO-APICs |
1196 | */ |
1197 | if (ioapic_is_disabled) { |
1198 | pr_info("Skipping IOAPIC probe due to 'noapic' option.\n"); |
1199 | return -ENODEV; |
1200 | } |
1201 | |
1202 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_IO_APIC, handler: acpi_parse_ioapic, |
1203 | MAX_IO_APICS); |
1204 | if (!count) { |
1205 | pr_err("No IOAPIC entries present\n"); |
1206 | return -ENODEV; |
1207 | } else if (count < 0) { |
1208 | pr_err("Error parsing IOAPIC entry\n"); |
1209 | return count; |
1210 | } |
1211 | |
1212 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, |
1213 | handler: acpi_parse_int_src_ovr, |
1214 | max_entries: irq_get_nr_irqs()); |
1215 | if (count < 0) { |
1216 | pr_err("Error parsing interrupt source overrides entry\n"); |
1217 | /* TBD: Cleanup to allow fallback to MPS */ |
1218 | return count; |
1219 | } |
1220 | |
1221 | /* |
1222 | * If BIOS did not supply an INT_SRC_OVR for the SCI |
1223 | * pretend we got one so we can set the SCI flags. |
1224 | * But ignore setting up SCI on hardware reduced platforms. |
1225 | */ |
1226 | if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware) |
1227 | acpi_sci_ioapic_setup(bus_irq: acpi_gbl_FADT.sci_interrupt, polarity: 0, trigger: 0, |
1228 | gsi: acpi_gbl_FADT.sci_interrupt); |
1229 | |
1230 | /* Fill in identity legacy mappings where no override */ |
1231 | mp_config_acpi_legacy_irqs(); |
1232 | |
1233 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_NMI_SOURCE, |
1234 | handler: acpi_parse_nmi_src, |
1235 | max_entries: irq_get_nr_irqs()); |
1236 | if (count < 0) { |
1237 | pr_err("Error parsing NMI SRC entry\n"); |
1238 | /* TBD: Cleanup to allow fallback to MPS */ |
1239 | return count; |
1240 | } |
1241 | |
1242 | return 0; |
1243 | } |
1244 | #else |
1245 | static inline int acpi_parse_madt_ioapic_entries(void) |
1246 | { |
1247 | return -1; |
1248 | } |
1249 | #endif /* !CONFIG_X86_IO_APIC */ |
1250 | |
1251 | static void __init early_acpi_process_madt(void) |
1252 | { |
1253 | #ifdef CONFIG_X86_LOCAL_APIC |
1254 | int error; |
1255 | |
1256 | if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) { |
1257 | |
1258 | /* |
1259 | * Parse MADT LAPIC entries |
1260 | */ |
1261 | error = early_acpi_parse_madt_lapic_addr_ovr(); |
1262 | if (!error) { |
1263 | acpi_lapic = 1; |
1264 | smp_found_config = 1; |
1265 | } |
1266 | if (error == -EINVAL) { |
1267 | /* |
1268 | * Dell Precision Workstation 410, 610 come here. |
1269 | */ |
1270 | pr_err("Invalid BIOS MADT, disabling ACPI\n"); |
1271 | disable_acpi(); |
1272 | } |
1273 | } |
1274 | #endif |
1275 | } |
1276 | |
1277 | static void __init acpi_process_madt(void) |
1278 | { |
1279 | #ifdef CONFIG_X86_LOCAL_APIC |
1280 | int error; |
1281 | |
1282 | if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) { |
1283 | |
1284 | /* |
1285 | * Parse MADT LAPIC entries |
1286 | */ |
1287 | error = acpi_parse_madt_lapic_entries(); |
1288 | if (!error) { |
1289 | acpi_lapic = 1; |
1290 | |
1291 | /* |
1292 | * Parse MADT IO-APIC entries |
1293 | */ |
1294 | mutex_lock(&acpi_ioapic_lock); |
1295 | error = acpi_parse_madt_ioapic_entries(); |
1296 | mutex_unlock(lock: &acpi_ioapic_lock); |
1297 | if (!error) { |
1298 | acpi_set_irq_model_ioapic(); |
1299 | |
1300 | smp_found_config = 1; |
1301 | } |
1302 | |
1303 | #ifdef CONFIG_ACPI_MADT_WAKEUP |
1304 | /* |
1305 | * Parse MADT MP Wake entry. |
1306 | */ |
1307 | acpi_table_parse_madt(id: ACPI_MADT_TYPE_MULTIPROC_WAKEUP, |
1308 | handler: acpi_parse_mp_wake, max_entries: 1); |
1309 | #endif |
1310 | } |
1311 | if (error == -EINVAL) { |
1312 | /* |
1313 | * Dell Precision Workstation 410, 610 come here. |
1314 | */ |
1315 | pr_err("Invalid BIOS MADT, disabling ACPI\n"); |
1316 | disable_acpi(); |
1317 | } |
1318 | } else { |
1319 | /* |
1320 | * ACPI found no MADT, and so ACPI wants UP PIC mode. |
1321 | * In the event an MPS table was found, forget it. |
1322 | * Boot with "acpi=off" to use MPS on such a system. |
1323 | */ |
1324 | if (smp_found_config) { |
1325 | pr_warn("No APIC-table, disabling MPS\n"); |
1326 | smp_found_config = 0; |
1327 | } |
1328 | } |
1329 | |
1330 | /* |
1331 | * ACPI supports both logical (e.g. Hyper-Threading) and physical |
1332 | * processors, where MPS only supports physical. |
1333 | */ |
1334 | if (acpi_lapic && acpi_ioapic) |
1335 | pr_info("Using ACPI (MADT) for SMP configuration information\n"); |
1336 | else if (acpi_lapic) |
1337 | pr_info("Using ACPI for processor (LAPIC) configuration information\n"); |
1338 | #endif |
1339 | return; |
1340 | } |
1341 | |
1342 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
1343 | { |
1344 | if (!acpi_force) { |
1345 | pr_notice("%s detected: force use of acpi=noirq\n", d->ident); |
1346 | acpi_noirq_set(); |
1347 | } |
1348 | return 0; |
1349 | } |
1350 | |
1351 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
1352 | { |
1353 | if (!acpi_force) { |
1354 | pr_notice("%s detected: force use of pci=noacpi\n", d->ident); |
1355 | acpi_disable_pci(); |
1356 | } |
1357 | return 0; |
1358 | } |
1359 | |
1360 | static int __init disable_acpi_xsdt(const struct dmi_system_id *d) |
1361 | { |
1362 | if (!acpi_force) { |
1363 | pr_notice("%s detected: force use of acpi=rsdt\n", d->ident); |
1364 | acpi_gbl_do_not_use_xsdt = TRUE; |
1365 | } else { |
1366 | pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n"); |
1367 | } |
1368 | return 0; |
1369 | } |
1370 | |
1371 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
1372 | { |
1373 | if (!acpi_force) { |
1374 | pr_notice("%s detected: acpi off\n", d->ident); |
1375 | disable_acpi(); |
1376 | } else { |
1377 | pr_notice("Warning: DMI blacklist says broken, but acpi forced\n"); |
1378 | } |
1379 | return 0; |
1380 | } |
1381 | |
1382 | /* |
1383 | * Force ignoring BIOS IRQ0 override |
1384 | */ |
1385 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) |
1386 | { |
1387 | if (!acpi_skip_timer_override) { |
1388 | pr_notice("%s detected: Ignoring BIOS IRQ0 override\n", |
1389 | d->ident); |
1390 | acpi_skip_timer_override = 1; |
1391 | } |
1392 | return 0; |
1393 | } |
1394 | |
1395 | /* |
1396 | * ACPI offers an alternative platform interface model that removes |
1397 | * ACPI hardware requirements for platforms that do not implement |
1398 | * the PC Architecture. |
1399 | * |
1400 | * We initialize the Hardware-reduced ACPI model here: |
1401 | */ |
1402 | void __init acpi_generic_reduced_hw_init(void) |
1403 | { |
1404 | /* |
1405 | * Override x86_init functions and bypass legacy PIC in |
1406 | * hardware reduced ACPI mode. |
1407 | */ |
1408 | x86_init.timers.timer_init = x86_init_noop; |
1409 | x86_init.irqs.pre_vector_init = x86_init_noop; |
1410 | legacy_pic = &null_legacy_pic; |
1411 | } |
1412 | |
1413 | static void __init acpi_reduced_hw_init(void) |
1414 | { |
1415 | if (acpi_gbl_reduced_hardware) |
1416 | x86_init.acpi.reduced_hw_early_init(); |
1417 | } |
1418 | |
1419 | /* |
1420 | * If your system is blacklisted here, but you find that acpi=force |
1421 | * works for you, please contact linux-acpi@vger.kernel.org |
1422 | */ |
1423 | static const struct dmi_system_id acpi_dmi_table[] __initconst = { |
1424 | /* |
1425 | * Boxes that need ACPI disabled |
1426 | */ |
1427 | { |
1428 | .callback = dmi_disable_acpi, |
1429 | .ident = "IBM Thinkpad", |
1430 | .matches = { |
1431 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), |
1432 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), |
1433 | }, |
1434 | }, |
1435 | |
1436 | /* |
1437 | * Boxes that need ACPI PCI IRQ routing disabled |
1438 | */ |
1439 | { |
1440 | .callback = disable_acpi_irq, |
1441 | .ident = "ASUS A7V", |
1442 | .matches = { |
1443 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), |
1444 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), |
1445 | /* newer BIOS, Revision 1011, does work */ |
1446 | DMI_MATCH(DMI_BIOS_VERSION, |
1447 | "ASUS A7V ACPI BIOS Revision 1007"), |
1448 | }, |
1449 | }, |
1450 | { |
1451 | /* |
1452 | * Latest BIOS for IBM 600E (1.16) has bad pcinum |
1453 | * for LPC bridge, which is needed for the PCI |
1454 | * interrupt links to work. DSDT fix is in bug 5966. |
1455 | * 2645, 2646 model numbers are shared with 600/600E/600X |
1456 | */ |
1457 | .callback = disable_acpi_irq, |
1458 | .ident = "IBM Thinkpad 600 Series 2645", |
1459 | .matches = { |
1460 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), |
1461 | DMI_MATCH(DMI_BOARD_NAME, "2645"), |
1462 | }, |
1463 | }, |
1464 | { |
1465 | .callback = disable_acpi_irq, |
1466 | .ident = "IBM Thinkpad 600 Series 2646", |
1467 | .matches = { |
1468 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), |
1469 | DMI_MATCH(DMI_BOARD_NAME, "2646"), |
1470 | }, |
1471 | }, |
1472 | /* |
1473 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled |
1474 | */ |
1475 | { /* _BBN 0 bug */ |
1476 | .callback = disable_acpi_pci, |
1477 | .ident = "ASUS PR-DLS", |
1478 | .matches = { |
1479 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
1480 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), |
1481 | DMI_MATCH(DMI_BIOS_VERSION, |
1482 | "ASUS PR-DLS ACPI BIOS Revision 1010"), |
1483 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") |
1484 | }, |
1485 | }, |
1486 | { |
1487 | .callback = disable_acpi_pci, |
1488 | .ident = "Acer TravelMate 36x Laptop", |
1489 | .matches = { |
1490 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
1491 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), |
1492 | }, |
1493 | }, |
1494 | /* |
1495 | * Boxes that need ACPI XSDT use disabled due to corrupted tables |
1496 | */ |
1497 | { |
1498 | .callback = disable_acpi_xsdt, |
1499 | .ident = "Advantech DAC-BJ01", |
1500 | .matches = { |
1501 | DMI_MATCH(DMI_SYS_VENDOR, "NEC"), |
1502 | DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board"), |
1503 | DMI_MATCH(DMI_BIOS_VERSION, "V1.12"), |
1504 | DMI_MATCH(DMI_BIOS_DATE, "02/01/2011"), |
1505 | }, |
1506 | }, |
1507 | {} |
1508 | }; |
1509 | |
1510 | /* second table for DMI checks that should run after early-quirks */ |
1511 | static const struct dmi_system_id acpi_dmi_table_late[] __initconst = { |
1512 | /* |
1513 | * HP laptops which use a DSDT reporting as HP/SB400/10000, |
1514 | * which includes some code which overrides all temperature |
1515 | * trip points to 16C if the INTIN2 input of the I/O APIC |
1516 | * is enabled. This input is incorrectly designated the |
1517 | * ISA IRQ 0 via an interrupt source override even though |
1518 | * it is wired to the output of the master 8259A and INTIN0 |
1519 | * is not connected at all. Force ignoring BIOS IRQ0 |
1520 | * override in that cases. |
1521 | */ |
1522 | { |
1523 | .callback = dmi_ignore_irq0_timer_override, |
1524 | .ident = "HP nx6115 laptop", |
1525 | .matches = { |
1526 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
1527 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), |
1528 | }, |
1529 | }, |
1530 | { |
1531 | .callback = dmi_ignore_irq0_timer_override, |
1532 | .ident = "HP NX6125 laptop", |
1533 | .matches = { |
1534 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
1535 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), |
1536 | }, |
1537 | }, |
1538 | { |
1539 | .callback = dmi_ignore_irq0_timer_override, |
1540 | .ident = "HP NX6325 laptop", |
1541 | .matches = { |
1542 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
1543 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), |
1544 | }, |
1545 | }, |
1546 | { |
1547 | .callback = dmi_ignore_irq0_timer_override, |
1548 | .ident = "HP 6715b laptop", |
1549 | .matches = { |
1550 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
1551 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), |
1552 | }, |
1553 | }, |
1554 | { |
1555 | .callback = dmi_ignore_irq0_timer_override, |
1556 | .ident = "FUJITSU SIEMENS", |
1557 | .matches = { |
1558 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), |
1559 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"), |
1560 | }, |
1561 | }, |
1562 | {} |
1563 | }; |
1564 | |
1565 | /* |
1566 | * acpi_boot_table_init() and acpi_boot_init() |
1567 | * called from setup_arch(), always. |
1568 | * 1. checksums all tables |
1569 | * 2. enumerates lapics |
1570 | * 3. enumerates io-apics |
1571 | * |
1572 | * acpi_table_init() is separate to allow reading SRAT without |
1573 | * other side effects. |
1574 | * |
1575 | * side effects of acpi_boot_init: |
1576 | * acpi_lapic = 1 if LAPIC found |
1577 | * acpi_ioapic = 1 if IOAPIC found |
1578 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; |
1579 | * if acpi_blacklisted() acpi_disabled = 1; |
1580 | * acpi_irq_model=... |
1581 | * ... |
1582 | */ |
1583 | |
1584 | void __init acpi_boot_table_init(void) |
1585 | { |
1586 | dmi_check_system(list: acpi_dmi_table); |
1587 | |
1588 | /* |
1589 | * If acpi_disabled, bail out |
1590 | */ |
1591 | if (acpi_disabled) |
1592 | return; |
1593 | |
1594 | /* |
1595 | * Initialize the ACPI boot-time table parser. |
1596 | */ |
1597 | if (acpi_locate_initial_tables()) |
1598 | disable_acpi(); |
1599 | else |
1600 | acpi_reserve_initial_tables(); |
1601 | } |
1602 | |
1603 | int __init early_acpi_boot_init(void) |
1604 | { |
1605 | if (acpi_disabled) |
1606 | return 1; |
1607 | |
1608 | acpi_table_init_complete(); |
1609 | |
1610 | acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf); |
1611 | |
1612 | /* |
1613 | * blacklist may disable ACPI entirely |
1614 | */ |
1615 | if (acpi_blacklisted()) { |
1616 | if (acpi_force) { |
1617 | pr_warn("acpi=force override\n"); |
1618 | } else { |
1619 | pr_warn("Disabling ACPI support\n"); |
1620 | disable_acpi(); |
1621 | return 1; |
1622 | } |
1623 | } |
1624 | |
1625 | /* |
1626 | * Process the Multiple APIC Description Table (MADT), if present |
1627 | */ |
1628 | early_acpi_process_madt(); |
1629 | |
1630 | /* |
1631 | * Hardware-reduced ACPI mode initialization: |
1632 | */ |
1633 | acpi_reduced_hw_init(); |
1634 | |
1635 | return 0; |
1636 | } |
1637 | |
1638 | int __init acpi_boot_init(void) |
1639 | { |
1640 | /* those are executed after early-quirks are executed */ |
1641 | dmi_check_system(list: acpi_dmi_table_late); |
1642 | |
1643 | /* |
1644 | * If acpi_disabled, bail out |
1645 | */ |
1646 | if (acpi_disabled) |
1647 | return 1; |
1648 | |
1649 | acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf); |
1650 | |
1651 | /* |
1652 | * set sci_int and PM timer address |
1653 | */ |
1654 | acpi_table_parse(ACPI_SIG_FADT, handler: acpi_parse_fadt); |
1655 | |
1656 | /* |
1657 | * Process the Multiple APIC Description Table (MADT), if present |
1658 | */ |
1659 | acpi_process_madt(); |
1660 | |
1661 | acpi_table_parse(ACPI_SIG_HPET, handler: acpi_parse_hpet); |
1662 | if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt) |
1663 | acpi_table_parse(ACPI_SIG_BGRT, handler: acpi_parse_bgrt); |
1664 | |
1665 | if (!acpi_noirq) |
1666 | x86_init.pci.init = pci_acpi_init; |
1667 | |
1668 | /* Do not enable ACPI SPCR console by default */ |
1669 | acpi_parse_spcr(enable_earlycon: earlycon_acpi_spcr_enable, enable_console: false); |
1670 | return 0; |
1671 | } |
1672 | |
1673 | static int __init parse_acpi(char *arg) |
1674 | { |
1675 | if (!arg) |
1676 | return -EINVAL; |
1677 | |
1678 | /* "acpi=off" disables both ACPI table parsing and interpreter */ |
1679 | if (strcmp(arg, "off") == 0) { |
1680 | disable_acpi(); |
1681 | } |
1682 | /* acpi=force to over-ride black-list */ |
1683 | else if (strcmp(arg, "force") == 0) { |
1684 | acpi_force = 1; |
1685 | acpi_disabled = 0; |
1686 | } |
1687 | /* acpi=strict disables out-of-spec workarounds */ |
1688 | else if (strcmp(arg, "strict") == 0) { |
1689 | acpi_strict = 1; |
1690 | } |
1691 | /* acpi=rsdt use RSDT instead of XSDT */ |
1692 | else if (strcmp(arg, "rsdt") == 0) { |
1693 | acpi_gbl_do_not_use_xsdt = TRUE; |
1694 | } |
1695 | /* "acpi=noirq" disables ACPI interrupt routing */ |
1696 | else if (strcmp(arg, "noirq") == 0) { |
1697 | acpi_noirq_set(); |
1698 | } |
1699 | /* "acpi=copy_dsdt" copies DSDT */ |
1700 | else if (strcmp(arg, "copy_dsdt") == 0) { |
1701 | acpi_gbl_copy_dsdt_locally = 1; |
1702 | } |
1703 | /* "acpi=nocmcff" disables FF mode for corrected errors */ |
1704 | else if (strcmp(arg, "nocmcff") == 0) { |
1705 | acpi_disable_cmcff = 1; |
1706 | } else { |
1707 | /* Core will printk when we return error. */ |
1708 | return -EINVAL; |
1709 | } |
1710 | return 0; |
1711 | } |
1712 | early_param("acpi", parse_acpi); |
1713 | |
1714 | static int __init parse_acpi_bgrt(char *arg) |
1715 | { |
1716 | acpi_nobgrt = true; |
1717 | return 0; |
1718 | } |
1719 | early_param("bgrt_disable", parse_acpi_bgrt); |
1720 | |
1721 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ |
1722 | static int __init parse_pci(char *arg) |
1723 | { |
1724 | if (arg && strcmp(arg, "noacpi") == 0) |
1725 | acpi_disable_pci(); |
1726 | return 0; |
1727 | } |
1728 | early_param("pci", parse_pci); |
1729 | |
1730 | int __init acpi_mps_check(void) |
1731 | { |
1732 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) |
1733 | /* mptable code is not built-in*/ |
1734 | |
1735 | /* |
1736 | * Xen disables ACPI in PV DomU guests but it still emulates APIC and |
1737 | * supports SMP. Returning early here ensures that APIC is not disabled |
1738 | * unnecessarily and the guest is not limited to a single vCPU. |
1739 | */ |
1740 | if (xen_pv_domain() && !xen_initial_domain()) |
1741 | return 0; |
1742 | |
1743 | if (acpi_disabled || acpi_noirq) { |
1744 | pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n"); |
1745 | return 1; |
1746 | } |
1747 | #endif |
1748 | return 0; |
1749 | } |
1750 | |
1751 | #ifdef CONFIG_X86_IO_APIC |
1752 | static int __init parse_acpi_skip_timer_override(char *arg) |
1753 | { |
1754 | acpi_skip_timer_override = 1; |
1755 | return 0; |
1756 | } |
1757 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); |
1758 | |
1759 | static int __init parse_acpi_use_timer_override(char *arg) |
1760 | { |
1761 | acpi_use_timer_override = 1; |
1762 | return 0; |
1763 | } |
1764 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); |
1765 | #endif /* CONFIG_X86_IO_APIC */ |
1766 | |
1767 | static int __init setup_acpi_sci(char *s) |
1768 | { |
1769 | if (!s) |
1770 | return -EINVAL; |
1771 | if (!strcmp(s, "edge")) |
1772 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1773 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); |
1774 | else if (!strcmp(s, "level")) |
1775 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1776 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); |
1777 | else if (!strcmp(s, "high")) |
1778 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1779 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); |
1780 | else if (!strcmp(s, "low")) |
1781 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1782 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); |
1783 | else |
1784 | return -EINVAL; |
1785 | return 0; |
1786 | } |
1787 | early_param("acpi_sci", setup_acpi_sci); |
1788 | |
1789 | int __acpi_acquire_global_lock(unsigned int *lock) |
1790 | { |
1791 | unsigned int old, new, val; |
1792 | |
1793 | old = READ_ONCE(*lock); |
1794 | do { |
1795 | val = (old >> 1) & 0x1; |
1796 | new = (old & ~0x3) + 2 + val; |
1797 | } while (!try_cmpxchg(lock, &old, new)); |
1798 | |
1799 | if (val) |
1800 | return 0; |
1801 | |
1802 | return -1; |
1803 | } |
1804 | |
1805 | int __acpi_release_global_lock(unsigned int *lock) |
1806 | { |
1807 | unsigned int old, new; |
1808 | |
1809 | old = READ_ONCE(*lock); |
1810 | do { |
1811 | new = old & ~0x3; |
1812 | } while (!try_cmpxchg(lock, &old, new)); |
1813 | return old & 0x1; |
1814 | } |
1815 | |
1816 | void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size) |
1817 | { |
1818 | e820__range_add(start: addr, size, type: E820_TYPE_NVS); |
1819 | e820__update_table_print(); |
1820 | } |
1821 | |
1822 | void x86_default_set_root_pointer(u64 addr) |
1823 | { |
1824 | boot_params.acpi_rsdp_addr = addr; |
1825 | } |
1826 | |
1827 | u64 x86_default_get_root_pointer(void) |
1828 | { |
1829 | return boot_params.acpi_rsdp_addr; |
1830 | } |
1831 | |
1832 | #ifdef CONFIG_XEN_PV |
1833 | void __iomem *x86_acpi_os_ioremap(acpi_physical_address phys, acpi_size size) |
1834 | { |
1835 | return ioremap_cache(offset: phys, size); |
1836 | } |
1837 | |
1838 | void __iomem * (*acpi_os_ioremap)(acpi_physical_address phys, acpi_size size) = |
1839 | x86_acpi_os_ioremap; |
1840 | EXPORT_SYMBOL_GPL(acpi_os_ioremap); |
1841 | #endif |
1842 |
Definitions
- acpi_force
- acpi_disabled
- acpi_noirq
- acpi_nobgrt
- acpi_pci_disabled
- acpi_lapic
- acpi_ioapic
- acpi_strict
- acpi_disable_cmcff
- acpi_int_src_ovr
- acpi_sci_flags
- acpi_sci_override_gsi
- acpi_skip_timer_override
- acpi_use_timer_override
- acpi_fix_pin2_polarity
- acpi_lapic_addr
- has_lapic_cpus
- acpi_support_online_capable
- acpi_ioapic_lock
- acpi_irq_model
- isa_irq_to_gsi
- __acpi_map_table
- __acpi_unmap_table
- acpi_parse_madt
- acpi_is_processor_usable
- acpi_parse_x2apic
- acpi_check_lapic
- acpi_parse_lapic
- acpi_parse_sapic
- acpi_parse_lapic_addr_ovr
- acpi_parse_x2apic_nmi
- acpi_parse_lapic_nmi
- mp_override_legacy_irq
- mp_config_acpi_gsi
- mp_register_ioapic_irq
- acpi_parse_ioapic
- acpi_sci_ioapic_setup
- acpi_parse_int_src_ovr
- acpi_parse_nmi_src
- acpi_pic_sci_set_trigger
- acpi_gsi_to_irq
- acpi_isa_irq_to_gsi
- acpi_register_gsi_pic
- acpi_register_gsi_ioapic
- acpi_unregister_gsi_ioapic
- __acpi_register_gsi
- __acpi_unregister_gsi
- acpi_suspend_lowlevel
- acpi_register_gsi
- acpi_unregister_gsi
- acpi_set_irq_model_ioapic
- acpi_map_cpu2node
- acpi_map_cpu
- acpi_unmap_cpu
- acpi_register_ioapic
- acpi_unregister_ioapic
- acpi_ioapic_registered
- acpi_parse_sbf
- hpet_res
- acpi_parse_hpet
- hpet_insert_resource
- acpi_parse_fadt
- early_acpi_parse_madt_lapic_addr_ovr
- acpi_parse_madt_lapic_entries
- mp_config_acpi_legacy_irqs
- acpi_parse_madt_ioapic_entries
- early_acpi_process_madt
- acpi_process_madt
- disable_acpi_irq
- disable_acpi_pci
- disable_acpi_xsdt
- dmi_disable_acpi
- dmi_ignore_irq0_timer_override
- acpi_generic_reduced_hw_init
- acpi_reduced_hw_init
- acpi_dmi_table
- acpi_dmi_table_late
- acpi_boot_table_init
- early_acpi_boot_init
- acpi_boot_init
- parse_acpi
- parse_acpi_bgrt
- parse_pci
- acpi_mps_check
- parse_acpi_skip_timer_override
- parse_acpi_use_timer_override
- setup_acpi_sci
- __acpi_acquire_global_lock
- __acpi_release_global_lock
- arch_reserve_mem_area
- x86_default_set_root_pointer
- x86_default_get_root_pointer
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